These are the errors returned by Decode.
var (
ErrInvalidMode = errors.New("invalid x86 mode in Decode")
ErrTruncated = errors.New("truncated instruction")
ErrUnrecognized = errors.New("unrecognized instruction")
)
func GNUSyntax(inst Inst, pc uint64, symname SymLookup) string
GNUSyntax returns the GNU assembler syntax for the instruction, as defined by GNU binutils. This general form is often called “AT&T syntax” as a reference to AT&T System V Unix.
func GoSyntax(inst Inst, pc uint64, symname SymLookup) string
GoSyntax returns the Go assembler syntax for the instruction. The syntax was originally defined by Plan 9. The pc is the program counter of the instruction, used for expanding PC-relative addresses into absolute ones. The symname function queries the symbol table for the program being disassembled. Given a target address it returns the name and base address of the symbol containing the target, if any; otherwise it returns "", 0.
func IntelSyntax(inst Inst, pc uint64, symname SymLookup) string
IntelSyntax returns the Intel assembler syntax for the instruction, as defined by Intel's XED tool.
An Arg is a single instruction argument, one of these types: Reg, Mem, Imm, Rel.
type Arg interface {
String() string
// contains filtered or unexported methods
}
An Args holds the instruction arguments. If an instruction has fewer than 4 arguments, the final elements in the array are nil.
type Args [6]Arg
An Imm is an integer constant.
type Imm int64
func (i Imm) String() string
An Inst is a single instruction.
type Inst struct {
Prefix Prefixes // Prefixes applied to the instruction.
Op Op // Opcode mnemonic
Opcode uint32 // Encoded opcode bits, left aligned (first byte is Opcode>>24, etc)
Args Args // Instruction arguments, in Intel order
Mode int // processor mode in bits: 16, 32, or 64
AddrSize int // address size in bits: 16, 32, or 64
DataSize int // operand size in bits: 16, 32, or 64
MemBytes int // size of memory argument in bytes: 1, 2, 4, 8, 16, and so on.
Len int // length of encoded instruction in bytes
PCRel int // length of PC-relative address in instruction encoding
PCRelOff int // index of start of PC-relative address in instruction encoding
// AVX-512 flags
Broadcast bool // EVEX broadcast
Zeroing bool // EVEX zeroing
SAE bool // Suppress All Exceptions
Rounding int8 // Rounding control (0-3), valid only when SAE is true
}
func Decode(src []byte, mode int) (inst Inst, err error)
Decode decodes the leading bytes in src as a single instruction. The mode arguments specifies the assumed processor mode: 16, 32, or 64 for 16-, 32-, and 64-bit execution modes.
func (i Inst) String() string
A Mem is a memory reference. The general form is Segment:[Base+Scale*Index+Disp].
type Mem struct {
Segment Reg
Base Reg
Scale uint8
Index Reg
Disp int64
}
func (m Mem) String() string
An Op is an x86 opcode.
type Op uint32
const (
KADDB Op
KADDD
KADDQ
KADDW
KANDB
KANDD
KANDNB
KANDND
KANDNQ
KANDNW
KANDQ
KANDW
KMOVB
KMOVD
KMOVQ
KMOVW
KNOTB
KNOTD
KNOTQ
KNOTW
KORB
KORD
KORQ
KORTESTB
KORTESTD
KORTESTQ
KORTESTW
KORW
KSHIFTLB
KSHIFTLD
KSHIFTLQ
KSHIFTLW
KSHIFTRB
KSHIFTRD
KSHIFTRQ
KSHIFTRW
KTESTB
KTESTD
KTESTQ
KTESTW
KUNPCKBW
KUNPCKDQ
KUNPCKWD
KXNORB
KXNORD
KXNORQ
KXNORW
KXORB
KXORD
KXORQ
KXORW
V4FMADDPS
V4FMADDSS
V4FNMADDPS
V4FNMADDSS
VADDBF16
VADDPD
VADDPH
VADDPS
VADDSD
VADDSH
VADDSS
VADDSUBPD
VADDSUBPS
VAESDEC
VAESDECLAST
VAESENC
VAESENCLAST
VAESIMC
VAESKEYGENASSIST
VALIGND
VALIGNQ
VANDNPD
VANDNPS
VANDPD
VANDPS
VBCSTNEBF162PS
VBCSTNESH2PS
VBLENDMPD
VBLENDMPS
VBLENDPD
VBLENDPS
VBLENDVPD
VBLENDVPS
VBROADCASTF128
VBROADCASTF32X2
VBROADCASTF32X4
VBROADCASTF32X8
VBROADCASTF64X2
VBROADCASTF64X4
VBROADCASTI128
VBROADCASTI32X2
VBROADCASTI32X4
VBROADCASTI32X8
VBROADCASTI64X2
VBROADCASTI64X4
VBROADCASTSD
VBROADCASTSS
VCMPBF16
VCMPPD
VCMPPH
VCMPPS
VCMPSD
VCMPSH
VCMPSS
VCOMISBF16
VCOMISD
VCOMISH
VCOMISS
VCOMPRESSPD
VCOMPRESSPS
VCOMXSD
VCOMXSH
VCOMXSS
VCVT2PH2BF8
VCVT2PH2BF8S
VCVT2PH2HF8
VCVT2PH2HF8S
VCVT2PS2PHX
VCVTBF162IBS
VCVTBF162IUBS
VCVTBIASPH2BF8
VCVTBIASPH2BF8S
VCVTBIASPH2HF8
VCVTBIASPH2HF8S
VCVTDQ2PD
VCVTDQ2PH
VCVTDQ2PS
VCVTHF82PH
VCVTNE2PS2BF16
VCVTNEEBF162PS
VCVTNEEPH2PS
VCVTNEOBF162PS
VCVTNEOPH2PS
VCVTNEPS2BF16
VCVTPD2DQ
VCVTPD2PH
VCVTPD2PS
VCVTPD2QQ
VCVTPD2UDQ
VCVTPD2UQQ
VCVTPH2BF8
VCVTPH2BF8S
VCVTPH2DQ
VCVTPH2HF8
VCVTPH2HF8S
VCVTPH2IBS
VCVTPH2IUBS
VCVTPH2PD
VCVTPH2PS
VCVTPH2PSX
VCVTPH2QQ
VCVTPH2UDQ
VCVTPH2UQQ
VCVTPH2UW
VCVTPH2W
VCVTPS2DQ
VCVTPS2IBS
VCVTPS2IUBS
VCVTPS2PD
VCVTPS2PH
VCVTPS2PHX
VCVTPS2QQ
VCVTPS2UDQ
VCVTPS2UQQ
VCVTQQ2PD
VCVTQQ2PH
VCVTQQ2PS
VCVTSD2SH
VCVTSD2SI
VCVTSD2SS
VCVTSD2USI
VCVTSH2SD
VCVTSH2SI
VCVTSH2SS
VCVTSH2USI
VCVTSI2SD
VCVTSI2SH
VCVTSI2SS
VCVTSS2SD
VCVTSS2SH
VCVTSS2SI
VCVTSS2USI
VCVTTBF162IBS
VCVTTBF162IUBS
VCVTTPD2DQ
VCVTTPD2DQS
VCVTTPD2QQ
VCVTTPD2QQS
VCVTTPD2UDQ
VCVTTPD2UDQS
VCVTTPD2UQQ
VCVTTPD2UQQS
VCVTTPH2DQ
VCVTTPH2IBS
VCVTTPH2IUBS
VCVTTPH2QQ
VCVTTPH2UDQ
VCVTTPH2UQQ
VCVTTPH2UW
VCVTTPH2W
VCVTTPS2DQ
VCVTTPS2DQS
VCVTTPS2IBS
VCVTTPS2IUBS
VCVTTPS2QQ
VCVTTPS2QQS
VCVTTPS2UDQ
VCVTTPS2UDQS
VCVTTPS2UQQ
VCVTTPS2UQQS
VCVTTSD2SI
VCVTTSD2SIS
VCVTTSD2USI
VCVTTSD2USIS
VCVTTSH2SI
VCVTTSH2USI
VCVTTSS2SI
VCVTTSS2SIS
VCVTTSS2USI
VCVTTSS2USIS
VCVTUDQ2PD
VCVTUDQ2PH
VCVTUDQ2PS
VCVTUQQ2PD
VCVTUQQ2PH
VCVTUQQ2PS
VCVTUSI2SD
VCVTUSI2SH
VCVTUSI2SS
VCVTUW2PH
VCVTW2PH
VDBPSADBW
VDIVBF16
VDIVPD
VDIVPH
VDIVPS
VDIVSD
VDIVSH
VDIVSS
VDPBF16PS
VDPPD
VDPPHPS
VDPPS
VEXP2PD
VEXP2PS
VEXPANDPD
VEXPANDPS
VEXTRACTF128
VEXTRACTF32X4
VEXTRACTF32X8
VEXTRACTF64X2
VEXTRACTF64X4
VEXTRACTI128
VEXTRACTI32X4
VEXTRACTI32X8
VEXTRACTI64X2
VEXTRACTI64X4
VEXTRACTPS
VFCMADDCPH
VFCMADDCSH
VFCMULCPH
VFCMULCSH
VFIXUPIMMPD
VFIXUPIMMPS
VFIXUPIMMSD
VFIXUPIMMSS
VFMADD132BF16
VFMADD132PD
VFMADD132PH
VFMADD132PS
VFMADD132SD
VFMADD132SH
VFMADD132SS
VFMADD213BF16
VFMADD213PD
VFMADD213PH
VFMADD213PS
VFMADD213SD
VFMADD213SH
VFMADD213SS
VFMADD231BF16
VFMADD231PD
VFMADD231PH
VFMADD231PS
VFMADD231SD
VFMADD231SH
VFMADD231SS
VFMADDCPH
VFMADDCSH
VFMADDSUB132PD
VFMADDSUB132PH
VFMADDSUB132PS
VFMADDSUB213PD
VFMADDSUB213PH
VFMADDSUB213PS
VFMADDSUB231PD
VFMADDSUB231PH
VFMADDSUB231PS
VFMSUB132BF16
VFMSUB132PD
VFMSUB132PH
VFMSUB132PS
VFMSUB132SD
VFMSUB132SH
VFMSUB132SS
VFMSUB213BF16
VFMSUB213PD
VFMSUB213PH
VFMSUB213PS
VFMSUB213SD
VFMSUB213SH
VFMSUB213SS
VFMSUB231BF16
VFMSUB231PD
VFMSUB231PH
VFMSUB231PS
VFMSUB231SD
VFMSUB231SH
VFMSUB231SS
VFMSUBADD132PD
VFMSUBADD132PH
VFMSUBADD132PS
VFMSUBADD213PD
VFMSUBADD213PH
VFMSUBADD213PS
VFMSUBADD231PD
VFMSUBADD231PH
VFMSUBADD231PS
VFMULCPH
VFMULCSH
VFNMADD132BF16
VFNMADD132PD
VFNMADD132PH
VFNMADD132PS
VFNMADD132SD
VFNMADD132SH
VFNMADD132SS
VFNMADD213BF16
VFNMADD213PD
VFNMADD213PH
VFNMADD213PS
VFNMADD213SD
VFNMADD213SH
VFNMADD213SS
VFNMADD231BF16
VFNMADD231PD
VFNMADD231PH
VFNMADD231PS
VFNMADD231SD
VFNMADD231SH
VFNMADD231SS
VFNMSUB132BF16
VFNMSUB132PD
VFNMSUB132PH
VFNMSUB132PS
VFNMSUB132SD
VFNMSUB132SH
VFNMSUB132SS
VFNMSUB213BF16
VFNMSUB213PD
VFNMSUB213PH
VFNMSUB213PS
VFNMSUB213SD
VFNMSUB213SH
VFNMSUB213SS
VFNMSUB231BF16
VFNMSUB231PD
VFNMSUB231PH
VFNMSUB231PS
VFNMSUB231SD
VFNMSUB231SH
VFNMSUB231SS
VFPCLASSBF16
VFPCLASSPD
VFPCLASSPH
VFPCLASSPS
VFPCLASSSD
VFPCLASSSH
VFPCLASSSS
VGATHERDPD
VGATHERDPS
VGATHERPF0DPD
VGATHERPF0DPS
VGATHERPF0QPD
VGATHERPF0QPS
VGATHERPF1DPD
VGATHERPF1DPS
VGATHERPF1QPD
VGATHERPF1QPS
VGATHERQPD
VGATHERQPS
VGETEXPBF16
VGETEXPPD
VGETEXPPH
VGETEXPPS
VGETEXPSD
VGETEXPSH
VGETEXPSS
VGETMANTBF16
VGETMANTPD
VGETMANTPH
VGETMANTPS
VGETMANTSD
VGETMANTSH
VGETMANTSS
VGF2P8AFFINEINVQB
VGF2P8AFFINEQB
VGF2P8MULB
VHADDPD
VHADDPS
VHSUBPD
VHSUBPS
VINSERTF128
VINSERTF32X4
VINSERTF32X8
VINSERTF64X2
VINSERTF64X4
VINSERTI128
VINSERTI32X4
VINSERTI32X8
VINSERTI64X2
VINSERTI64X4
VINSERTPS
VLDDQU
VLDMXCSR
VMASKMOVDQU
VMASKMOVPD
VMASKMOVPS
VMAXBF16
VMAXPD
VMAXPH
VMAXPS
VMAXSD
VMAXSH
VMAXSS
VMINBF16
VMINMAXBF16
VMINMAXPD
VMINMAXPH
VMINMAXPS
VMINMAXSD
VMINMAXSH
VMINMAXSS
VMINPD
VMINPH
VMINPS
VMINSD
VMINSH
VMINSS
VMOVAPD
VMOVAPS
VMOVD
VMOVDDUP
VMOVDQA
VMOVDQA32
VMOVDQA64
VMOVDQU
VMOVDQU16
VMOVDQU32
VMOVDQU64
VMOVDQU8
VMOVHLPS
VMOVHPD
VMOVHPS
VMOVLHPS
VMOVLPD
VMOVLPS
VMOVMSKPD
VMOVMSKPS
VMOVNTDQ
VMOVNTDQA
VMOVNTPD
VMOVNTPS
VMOVQ
VMOVRSB
VMOVRSD
VMOVRSQ
VMOVRSW
VMOVSD
VMOVSH
VMOVSHDUP
VMOVSLDUP
VMOVSS
VMOVUPD
VMOVUPS
VMOVW
VMPSADBW
VMULBF16
VMULPD
VMULPH
VMULPS
VMULSD
VMULSH
VMULSS
VORPD
VORPS
VP2INTERSECTD
VP2INTERSECTQ
VP4DPWSSD
VP4DPWSSDS
VPABSB
VPABSD
VPABSQ
VPABSW
VPACKSSDW
VPACKSSWB
VPACKUSDW
VPACKUSWB
VPADDB
VPADDD
VPADDQ
VPADDSB
VPADDSW
VPADDUSB
VPADDUSW
VPADDW
VPALIGNR
VPAND
VPANDD
VPANDN
VPANDND
VPANDNQ
VPANDQ
VPAVGB
VPAVGW
VPBLENDD
VPBLENDMB
VPBLENDMD
VPBLENDMQ
VPBLENDMW
VPBLENDVB
VPBLENDW
VPBROADCASTB
VPBROADCASTD
VPBROADCASTMB2Q
VPBROADCASTMW2D
VPBROADCASTQ
VPBROADCASTW
VPCLMULQDQ
VPCMPB
VPCMPD
VPCMPEQB
VPCMPEQD
VPCMPEQQ
VPCMPEQW
VPCMPESTRI
VPCMPESTRI64
VPCMPESTRM
VPCMPESTRM64
VPCMPGTB
VPCMPGTD
VPCMPGTQ
VPCMPGTW
VPCMPISTRI
VPCMPISTRI64
VPCMPISTRM
VPCMPQ
VPCMPUB
VPCMPUD
VPCMPUQ
VPCMPUW
VPCMPW
VPCOMPRESSB
VPCOMPRESSD
VPCOMPRESSQ
VPCOMPRESSW
VPCONFLICTD
VPCONFLICTQ
VPDPBSSD
VPDPBSSDS
VPDPBSUD
VPDPBSUDS
VPDPBUSD
VPDPBUSDS
VPDPBUUD
VPDPBUUDS
VPDPWSSD
VPDPWSSDS
VPDPWSUD
VPDPWSUDS
VPDPWUSD
VPDPWUSDS
VPDPWUUD
VPDPWUUDS
VPERM2F128
VPERM2I128
VPERMB
VPERMD
VPERMI2B
VPERMI2D
VPERMI2PD
VPERMI2PS
VPERMI2Q
VPERMI2W
VPERMILPD
VPERMILPS
VPERMPD
VPERMPS
VPERMQ
VPERMT2B
VPERMT2D
VPERMT2PD
VPERMT2PS
VPERMT2Q
VPERMT2W
VPERMW
VPEXPANDB
VPEXPANDD
VPEXPANDQ
VPEXPANDW
VPEXTRB
VPEXTRD
VPEXTRQ
VPEXTRW
VPEXTRW_C5
VPGATHERDD
VPGATHERDQ
VPGATHERQD
VPGATHERQQ
VPHADDD
VPHADDSW
VPHADDW
VPHMINPOSUW
VPHSUBD
VPHSUBSW
VPHSUBW
VPINSRB
VPINSRD
VPINSRQ
VPINSRW
VPLZCNTD
VPLZCNTQ
VPMADD52HUQ
VPMADD52LUQ
VPMADDUBSW
VPMADDWD
VPMASKMOVD
VPMASKMOVQ
VPMAXSB
VPMAXSD
VPMAXSQ
VPMAXSW
VPMAXUB
VPMAXUD
VPMAXUQ
VPMAXUW
VPMINSB
VPMINSD
VPMINSQ
VPMINSW
VPMINUB
VPMINUD
VPMINUQ
VPMINUW
VPMOVB2M
VPMOVD2M
VPMOVDB
VPMOVDW
VPMOVM2B
VPMOVM2D
VPMOVM2Q
VPMOVM2W
VPMOVMSKB
VPMOVQ2M
VPMOVQB
VPMOVQD
VPMOVQW
VPMOVSDB
VPMOVSDW
VPMOVSQB
VPMOVSQD
VPMOVSQW
VPMOVSWB
VPMOVSXBD
VPMOVSXBQ
VPMOVSXBW
VPMOVSXDQ
VPMOVSXWD
VPMOVSXWQ
VPMOVUSDB
VPMOVUSDW
VPMOVUSQB
VPMOVUSQD
VPMOVUSQW
VPMOVUSWB
VPMOVW2M
VPMOVWB
VPMOVZXBD
VPMOVZXBQ
VPMOVZXBW
VPMOVZXDQ
VPMOVZXWD
VPMOVZXWQ
VPMULDQ
VPMULHRSW
VPMULHUW
VPMULHW
VPMULLD
VPMULLQ
VPMULLW
VPMULTISHIFTQB
VPMULUDQ
VPOPCNTB
VPOPCNTD
VPOPCNTQ
VPOPCNTW
VPOR
VPORD
VPORQ
VPROLD
VPROLQ
VPROLVD
VPROLVQ
VPRORD
VPRORQ
VPRORVD
VPRORVQ
VPSADBW
VPSCATTERDD
VPSCATTERDQ
VPSCATTERQD
VPSCATTERQQ
VPSHLDD
VPSHLDQ
VPSHLDVD
VPSHLDVQ
VPSHLDVW
VPSHLDW
VPSHRDD
VPSHRDQ
VPSHRDVD
VPSHRDVQ
VPSHRDVW
VPSHRDW
VPSHUFB
VPSHUFBITQMB
VPSHUFD
VPSHUFHW
VPSHUFLW
VPSIGNB
VPSIGND
VPSIGNW
VPSLLD
VPSLLDQ
VPSLLQ
VPSLLVD
VPSLLVQ
VPSLLVW
VPSLLW
VPSRAD
VPSRAQ
VPSRAVD
VPSRAVQ
VPSRAVW
VPSRAW
VPSRLD
VPSRLDQ
VPSRLQ
VPSRLVD
VPSRLVQ
VPSRLVW
VPSRLW
VPSUBB
VPSUBD
VPSUBQ
VPSUBSB
VPSUBSW
VPSUBUSB
VPSUBUSW
VPSUBW
VPTERNLOGD
VPTERNLOGQ
VPTEST
VPTESTMB
VPTESTMD
VPTESTMQ
VPTESTMW
VPTESTNMB
VPTESTNMD
VPTESTNMQ
VPTESTNMW
VPUNPCKHBW
VPUNPCKHDQ
VPUNPCKHQDQ
VPUNPCKHWD
VPUNPCKLBW
VPUNPCKLDQ
VPUNPCKLQDQ
VPUNPCKLWD
VPXOR
VPXORD
VPXORQ
VRANGEPD
VRANGEPS
VRANGESD
VRANGESS
VRCP14PD
VRCP14PS
VRCP14SD
VRCP14SS
VRCP28PD
VRCP28PS
VRCP28SD
VRCP28SS
VRCPBF16
VRCPPH
VRCPPS
VRCPSH
VRCPSS
VREDUCEBF16
VREDUCEPD
VREDUCEPH
VREDUCEPS
VREDUCESD
VREDUCESH
VREDUCESS
VRNDSCALEBF16
VRNDSCALEPD
VRNDSCALEPH
VRNDSCALEPS
VRNDSCALESD
VRNDSCALESH
VRNDSCALESS
VROUNDPD
VROUNDPS
VROUNDSD
VROUNDSS
VRSQRT14PD
VRSQRT14PS
VRSQRT14SD
VRSQRT14SS
VRSQRT28PD
VRSQRT28PS
VRSQRT28SD
VRSQRT28SS
VRSQRTBF16
VRSQRTPH
VRSQRTPS
VRSQRTSH
VRSQRTSS
VSCALEFBF16
VSCALEFPD
VSCALEFPH
VSCALEFPS
VSCALEFSD
VSCALEFSH
VSCALEFSS
VSCATTERDPD
VSCATTERDPS
VSCATTERPF0DPD
VSCATTERPF0DPS
VSCATTERPF0QPD
VSCATTERPF0QPS
VSCATTERPF1DPD
VSCATTERPF1DPS
VSCATTERPF1QPD
VSCATTERPF1QPS
VSCATTERQPD
VSCATTERQPS
VSHA512MSG1
VSHA512MSG2
VSHA512RNDS2
VSHUFF32X4
VSHUFF64X2
VSHUFI32X4
VSHUFI64X2
VSHUFPD
VSHUFPS
VSM3MSG1
VSM3MSG2
VSM3RNDS2
VSM4KEY4
VSM4RNDS4
VSQRTBF16
VSQRTPD
VSQRTPH
VSQRTPS
VSQRTSD
VSQRTSH
VSQRTSS
VSTMXCSR
VSUBBF16
VSUBPD
VSUBPH
VSUBPS
VSUBSD
VSUBSH
VSUBSS
VTESTPD
VTESTPS
VUCOMISD
VUCOMISH
VUCOMISS
VUCOMXSD
VUCOMXSH
VUCOMXSS
VUNPCKHPD
VUNPCKHPS
VUNPCKLPD
VUNPCKLPS
VXORPD
VXORPS
VZEROALL
VZEROUPPER
)
const (
AAA Op
AAD
AAM
AAS
ADC
ADD
ADDPD
ADDPS
ADDSD
ADDSS
ADDSUBPD
ADDSUBPS
AESDEC
AESDECLAST
AESENC
AESENCLAST
AESIMC
AESKEYGENASSIST
AND
ANDNPD
ANDNPS
ANDPD
ANDPS
ARPL
BLENDPD
BLENDPS
BLENDVPD
BLENDVPS
BOUND
BSF
BSR
BSWAP
BT
BTC
BTR
BTS
CALL
CBW
CDQ
CDQE
CLC
CLD
CLFLUSH
CLI
CLTS
CMC
CMOVA
CMOVAE
CMOVB
CMOVBE
CMOVE
CMOVG
CMOVGE
CMOVL
CMOVLE
CMOVNE
CMOVNO
CMOVNP
CMOVNS
CMOVO
CMOVP
CMOVS
CMP
CMPPD
CMPPS
CMPSB
CMPSD
CMPSD_XMM
CMPSQ
CMPSS
CMPSW
CMPXCHG
CMPXCHG16B
CMPXCHG8B
COMISD
COMISS
CPUID
CQO
CRC32
CVTDQ2PD
CVTDQ2PS
CVTPD2DQ
CVTPD2PI
CVTPD2PS
CVTPI2PD
CVTPI2PS
CVTPS2DQ
CVTPS2PD
CVTPS2PI
CVTSD2SI
CVTSD2SS
CVTSI2SD
CVTSI2SS
CVTSS2SD
CVTSS2SI
CVTTPD2DQ
CVTTPD2PI
CVTTPS2DQ
CVTTPS2PI
CVTTSD2SI
CVTTSS2SI
CWD
CWDE
DAA
DAS
DEC
DIV
DIVPD
DIVPS
DIVSD
DIVSS
DPPD
DPPS
EMMS
ENTER
EXTRACTPS
F2XM1
FABS
FADD
FADDP
FBLD
FBSTP
FCHS
FCMOVB
FCMOVBE
FCMOVE
FCMOVNB
FCMOVNBE
FCMOVNE
FCMOVNU
FCMOVU
FCOM
FCOMI
FCOMIP
FCOMP
FCOMPP
FCOS
FDECSTP
FDIV
FDIVP
FDIVR
FDIVRP
FFREE
FFREEP
FIADD
FICOM
FICOMP
FIDIV
FIDIVR
FILD
FIMUL
FINCSTP
FIST
FISTP
FISTTP
FISUB
FISUBR
FLD
FLD1
FLDCW
FLDENV
FLDL2E
FLDL2T
FLDLG2
FLDLN2
FLDPI
FLDZ
FMUL
FMULP
FNCLEX
FNINIT
FNOP
FNSAVE
FNSTCW
FNSTENV
FNSTSW
FPATAN
FPREM
FPREM1
FPTAN
FRNDINT
FRSTOR
FSCALE
FSIN
FSINCOS
FSQRT
FST
FSTP
FSUB
FSUBP
FSUBR
FSUBRP
FTST
FUCOM
FUCOMI
FUCOMIP
FUCOMP
FUCOMPP
FWAIT
FXAM
FXCH
FXRSTOR
FXRSTOR64
FXSAVE
FXSAVE64
FXTRACT
FYL2X
FYL2XP1
HADDPD
HADDPS
HLT
HSUBPD
HSUBPS
ICEBP
IDIV
IMUL
IN
INC
INSB
INSD
INSERTPS
INSW
INT
INTO
INVD
INVLPG
INVPCID
IRET
IRETD
IRETQ
JA
JAE
JB
JBE
JCXZ
JE
JECXZ
JG
JGE
JL
JLE
JMP
JNE
JNO
JNP
JNS
JO
JP
JRCXZ
JS
LAHF
LAR
LCALL
LDDQU
LDMXCSR
LDS
LEA
LEAVE
LES
LFENCE
LFS
LGDT
LGS
LIDT
LJMP
LLDT
LMSW
LODSB
LODSD
LODSQ
LODSW
LOOP
LOOPE
LOOPNE
LRET
LSL
LSS
LTR
LZCNT
MASKMOVDQU
MASKMOVQ
MAXPD
MAXPS
MAXSD
MAXSS
MFENCE
MINPD
MINPS
MINSD
MINSS
MONITOR
MOV
MOVAPD
MOVAPS
MOVBE
MOVD
MOVDDUP
MOVDQ2Q
MOVDQA
MOVDQU
MOVHLPS
MOVHPD
MOVHPS
MOVLHPS
MOVLPD
MOVLPS
MOVMSKPD
MOVMSKPS
MOVNTDQ
MOVNTDQA
MOVNTI
MOVNTPD
MOVNTPS
MOVNTQ
MOVNTSD
MOVNTSS
MOVQ
MOVQ2DQ
MOVSB
MOVSD
MOVSD_XMM
MOVSHDUP
MOVSLDUP
MOVSQ
MOVSS
MOVSW
MOVSX
MOVSXD
MOVUPD
MOVUPS
MOVZX
MPSADBW
MUL
MULPD
MULPS
MULSD
MULSS
MWAIT
NEG
NOP
NOT
OR
ORPD
ORPS
OUT
OUTSB
OUTSD
OUTSW
PABSB
PABSD
PABSW
PACKSSDW
PACKSSWB
PACKUSDW
PACKUSWB
PADDB
PADDD
PADDQ
PADDSB
PADDSW
PADDUSB
PADDUSW
PADDW
PALIGNR
PAND
PANDN
PAUSE
PAVGB
PAVGW
PBLENDVB
PBLENDW
PCLMULQDQ
PCMPEQB
PCMPEQD
PCMPEQQ
PCMPEQW
PCMPESTRI
PCMPESTRM
PCMPGTB
PCMPGTD
PCMPGTQ
PCMPGTW
PCMPISTRI
PCMPISTRM
PEXTRB
PEXTRD
PEXTRQ
PEXTRW
PHADDD
PHADDSW
PHADDW
PHMINPOSUW
PHSUBD
PHSUBSW
PHSUBW
PINSRB
PINSRD
PINSRQ
PINSRW
PMADDUBSW
PMADDWD
PMAXSB
PMAXSD
PMAXSW
PMAXUB
PMAXUD
PMAXUW
PMINSB
PMINSD
PMINSW
PMINUB
PMINUD
PMINUW
PMOVMSKB
PMOVSXBD
PMOVSXBQ
PMOVSXBW
PMOVSXDQ
PMOVSXWD
PMOVSXWQ
PMOVZXBD
PMOVZXBQ
PMOVZXBW
PMOVZXDQ
PMOVZXWD
PMOVZXWQ
PMULDQ
PMULHRSW
PMULHUW
PMULHW
PMULLD
PMULLW
PMULUDQ
POP
POPA
POPAD
POPCNT
POPF
POPFD
POPFQ
POR
PREFETCHNTA
PREFETCHT0
PREFETCHT1
PREFETCHT2
PREFETCHW
PSADBW
PSHUFB
PSHUFD
PSHUFHW
PSHUFLW
PSHUFW
PSIGNB
PSIGND
PSIGNW
PSLLD
PSLLDQ
PSLLQ
PSLLW
PSRAD
PSRAW
PSRLD
PSRLDQ
PSRLQ
PSRLW
PSUBB
PSUBD
PSUBQ
PSUBSB
PSUBSW
PSUBUSB
PSUBUSW
PSUBW
PTEST
PUNPCKHBW
PUNPCKHDQ
PUNPCKHQDQ
PUNPCKHWD
PUNPCKLBW
PUNPCKLDQ
PUNPCKLQDQ
PUNPCKLWD
PUSH
PUSHA
PUSHAD
PUSHF
PUSHFD
PUSHFQ
PXOR
RCL
RCPPS
RCPSS
RCR
RDFSBASE
RDGSBASE
RDMSR
RDPMC
RDRAND
RDTSC
RDTSCP
RET
ROL
ROR
ROUNDPD
ROUNDPS
ROUNDSD
ROUNDSS
RSM
RSQRTPS
RSQRTSS
SAHF
SAR
SBB
SCASB
SCASD
SCASQ
SCASW
SETA
SETAE
SETB
SETBE
SETE
SETG
SETGE
SETL
SETLE
SETNE
SETNO
SETNP
SETNS
SETO
SETP
SETS
SFENCE
SGDT
SHA1MSG1
SHA1MSG2
SHA1NEXTE
SHA1RNDS4
SHA256MSG1
SHA256MSG2
SHA256RNDS2
SHL
SHLD
SHR
SHRD
SHUFPD
SHUFPS
SIDT
SLDT
SMSW
SQRTPD
SQRTPS
SQRTSD
SQRTSS
STC
STD
STI
STMXCSR
STOSB
STOSD
STOSQ
STOSW
STR
SUB
SUBPD
SUBPS
SUBSD
SUBSS
SWAPGS
SYSCALL
SYSENTER
SYSEXIT
SYSRET
TEST
TZCNT
UCOMISD
UCOMISS
UD0
UD1
UD2
UNPCKHPD
UNPCKHPS
UNPCKLPD
UNPCKLPS
VERR
VERW
WBINVD
WRFSBASE
WRGSBASE
WRMSR
XABORT
XADD
XBEGIN
XCHG
XEND
XGETBV
XLATB
XOR
XORPD
XORPS
XRSTOR
XRSTOR64
XRSTORS
XRSTORS64
XSAVE
XSAVE64
XSAVEC
XSAVEC64
XSAVEOPT
XSAVEOPT64
XSAVES
XSAVES64
XSETBV
XTEST
)
func (op Op) String() string
A Prefix represents an Intel instruction prefix. The low 8 bits are the actual prefix byte encoding, and the top 8 bits contain distinguishing bits and metadata.
type Prefix uint16
const (
// Metadata about the role of a prefix in an instruction.
PrefixImplicit Prefix = 0x8000 // prefix is implied by instruction text
PrefixIgnored Prefix = 0x4000 // prefix is ignored: either irrelevant or overridden by a later prefix
PrefixInvalid Prefix = 0x2000 // prefix makes entire instruction invalid (bad LOCK)
// Memory segment overrides.
PrefixES Prefix = 0x26 // ES segment override
PrefixCS Prefix = 0x2E // CS segment override
PrefixSS Prefix = 0x36 // SS segment override
PrefixDS Prefix = 0x3E // DS segment override
PrefixFS Prefix = 0x64 // FS segment override
PrefixGS Prefix = 0x65 // GS segment override
// Branch prediction.
PrefixPN Prefix = 0x12E // predict not taken (conditional branch only)
PrefixPT Prefix = 0x13E // predict taken (conditional branch only)
// Size attributes.
PrefixDataSize Prefix = 0x66 // operand size override
PrefixData16 Prefix = 0x166
PrefixData32 Prefix = 0x266
PrefixAddrSize Prefix = 0x67 // address size override
PrefixAddr16 Prefix = 0x167
PrefixAddr32 Prefix = 0x267
// One of a kind.
PrefixLOCK Prefix = 0xF0 // lock
PrefixREPN Prefix = 0xF2 // repeat not zero
PrefixXACQUIRE Prefix = 0x1F2
PrefixBND Prefix = 0x2F2
PrefixREP Prefix = 0xF3 // repeat
PrefixXRELEASE Prefix = 0x1F3
// The REX prefixes must be in the range [PrefixREX, PrefixREX+0x10).
// the other bits are set or not according to the intended use.
PrefixREX Prefix = 0x40 // REX 64-bit extension prefix
PrefixREXW Prefix = 0x08 // extension bit W (64-bit instruction width)
PrefixREXR Prefix = 0x04 // extension bit R (r field in modrm)
PrefixREXX Prefix = 0x02 // extension bit X (index field in sib)
PrefixREXB Prefix = 0x01 // extension bit B (r/m field in modrm or base field in sib)
PrefixVEX2Bytes Prefix = 0xC5 // Short form of vex prefix
PrefixVEX3Bytes Prefix = 0xC4 // Long form of vex prefix
PrefixEVEX Prefix = 0x62 // EVEX prefix
)
func (p Prefix) IsEVEX() bool
func (p Prefix) IsREX() bool
IsREX reports whether p is a REX prefix byte.
func (p Prefix) IsVEX() bool
func (p Prefix) String() string
Prefixes is an array of prefixes associated with a single instruction. The prefixes are listed in the same order as found in the instruction: each prefix byte corresponds to one slot in the array. The first zero in the array marks the end of the prefixes.
type Prefixes [14]Prefix
A Reg is a single register. The zero Reg value has no name but indicates “no register.”
type Reg uint8
const (
// 8-bit
AL Reg
CL
DL
BL
AH
CH
DH
BH
SPB
BPB
SIB
DIB
R8B
R9B
R10B
R11B
R12B
R13B
R14B
R15B
// 16-bit
AX
CX
DX
BX
SP
BP
SI
DI
R8W
R9W
R10W
R11W
R12W
R13W
R14W
R15W
// 32-bit
EAX
ECX
EDX
EBX
ESP
EBP
ESI
EDI
R8L
R9L
R10L
R11L
R12L
R13L
R14L
R15L
// 64-bit
RAX
RCX
RDX
RBX
RSP
RBP
RSI
RDI
R8
R9
R10
R11
R12
R13
R14
R15
// Instruction pointer.
IP // 16-bit
EIP // 32-bit
RIP // 64-bit
// 387 floating point registers.
F0
F1
F2
F3
F4
F5
F6
F7
// MMX registers.
M0
M1
M2
M3
M4
M5
M6
M7
// XMM registers.
X0
X1
X2
X3
X4
X5
X6
X7
X8
X9
X10
X11
X12
X13
X14
X15
X16
X17
X18
X19
X20
X21
X22
X23
X24
X25
X26
X27
X28
X29
X30
X31
// YMM registers.
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y31
// ZMM registers.
Z0
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
Z10
Z11
Z12
Z13
Z14
Z15
Z16
Z17
Z18
Z19
Z20
Z21
Z22
Z23
Z24
Z25
Z26
Z27
Z28
Z29
Z30
Z31
// Mask registers.
K0
K1
K2
K3
K4
K5
K6
K7
// Segment registers.
ES
CS
SS
DS
FS
GS
// System registers.
GDTR
IDTR
LDTR
MSW
TASK
// Control registers.
CR0
CR1
CR2
CR3
CR4
CR5
CR6
CR7
CR8
CR9
CR10
CR11
CR12
CR13
CR14
CR15
// Debug registers.
DR0
DR1
DR2
DR3
DR4
DR5
DR6
DR7
DR8
DR9
DR10
DR11
DR12
DR13
DR14
DR15
// Task registers.
TR0
TR1
TR2
TR3
TR4
TR5
TR6
TR7
)
func (r Reg) String() string
A Rel is an offset relative to the current instruction pointer.
type Rel int32
func (r Rel) String() string
type SymLookup func(uint64) (string, uint64)