1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105
106 BlockMIPSEQ
107 BlockMIPSNE
108 BlockMIPSLTZ
109 BlockMIPSLEZ
110 BlockMIPSGTZ
111 BlockMIPSGEZ
112 BlockMIPSFPT
113 BlockMIPSFPF
114
115 BlockMIPS64EQ
116 BlockMIPS64NE
117 BlockMIPS64LTZ
118 BlockMIPS64LEZ
119 BlockMIPS64GTZ
120 BlockMIPS64GEZ
121 BlockMIPS64FPT
122 BlockMIPS64FPF
123
124 BlockPPC64EQ
125 BlockPPC64NE
126 BlockPPC64LT
127 BlockPPC64LE
128 BlockPPC64GT
129 BlockPPC64GE
130 BlockPPC64FLT
131 BlockPPC64FLE
132 BlockPPC64FGT
133 BlockPPC64FGE
134
135 BlockRISCV64BEQ
136 BlockRISCV64BNE
137 BlockRISCV64BLT
138 BlockRISCV64BGE
139 BlockRISCV64BLTU
140 BlockRISCV64BGEU
141 BlockRISCV64BEQZ
142 BlockRISCV64BNEZ
143 BlockRISCV64BLEZ
144 BlockRISCV64BGEZ
145 BlockRISCV64BLTZ
146 BlockRISCV64BGTZ
147
148 BlockS390XBRC
149 BlockS390XCRJ
150 BlockS390XCGRJ
151 BlockS390XCLRJ
152 BlockS390XCLGRJ
153 BlockS390XCIJ
154 BlockS390XCGIJ
155 BlockS390XCLIJ
156 BlockS390XCLGIJ
157
158 BlockPlain
159 BlockIf
160 BlockDefer
161 BlockRet
162 BlockRetJmp
163 BlockExit
164 BlockJumpTable
165 BlockFirst
166 )
167
168 var blockString = [...]string{
169 BlockInvalid: "BlockInvalid",
170
171 Block386EQ: "EQ",
172 Block386NE: "NE",
173 Block386LT: "LT",
174 Block386LE: "LE",
175 Block386GT: "GT",
176 Block386GE: "GE",
177 Block386OS: "OS",
178 Block386OC: "OC",
179 Block386ULT: "ULT",
180 Block386ULE: "ULE",
181 Block386UGT: "UGT",
182 Block386UGE: "UGE",
183 Block386EQF: "EQF",
184 Block386NEF: "NEF",
185 Block386ORD: "ORD",
186 Block386NAN: "NAN",
187
188 BlockAMD64EQ: "EQ",
189 BlockAMD64NE: "NE",
190 BlockAMD64LT: "LT",
191 BlockAMD64LE: "LE",
192 BlockAMD64GT: "GT",
193 BlockAMD64GE: "GE",
194 BlockAMD64OS: "OS",
195 BlockAMD64OC: "OC",
196 BlockAMD64ULT: "ULT",
197 BlockAMD64ULE: "ULE",
198 BlockAMD64UGT: "UGT",
199 BlockAMD64UGE: "UGE",
200 BlockAMD64EQF: "EQF",
201 BlockAMD64NEF: "NEF",
202 BlockAMD64ORD: "ORD",
203 BlockAMD64NAN: "NAN",
204 BlockAMD64JUMPTABLE: "JUMPTABLE",
205
206 BlockARMEQ: "EQ",
207 BlockARMNE: "NE",
208 BlockARMLT: "LT",
209 BlockARMLE: "LE",
210 BlockARMGT: "GT",
211 BlockARMGE: "GE",
212 BlockARMULT: "ULT",
213 BlockARMULE: "ULE",
214 BlockARMUGT: "UGT",
215 BlockARMUGE: "UGE",
216 BlockARMLTnoov: "LTnoov",
217 BlockARMLEnoov: "LEnoov",
218 BlockARMGTnoov: "GTnoov",
219 BlockARMGEnoov: "GEnoov",
220
221 BlockARM64EQ: "EQ",
222 BlockARM64NE: "NE",
223 BlockARM64LT: "LT",
224 BlockARM64LE: "LE",
225 BlockARM64GT: "GT",
226 BlockARM64GE: "GE",
227 BlockARM64ULT: "ULT",
228 BlockARM64ULE: "ULE",
229 BlockARM64UGT: "UGT",
230 BlockARM64UGE: "UGE",
231 BlockARM64Z: "Z",
232 BlockARM64NZ: "NZ",
233 BlockARM64ZW: "ZW",
234 BlockARM64NZW: "NZW",
235 BlockARM64TBZ: "TBZ",
236 BlockARM64TBNZ: "TBNZ",
237 BlockARM64FLT: "FLT",
238 BlockARM64FLE: "FLE",
239 BlockARM64FGT: "FGT",
240 BlockARM64FGE: "FGE",
241 BlockARM64LTnoov: "LTnoov",
242 BlockARM64LEnoov: "LEnoov",
243 BlockARM64GTnoov: "GTnoov",
244 BlockARM64GEnoov: "GEnoov",
245 BlockARM64JUMPTABLE: "JUMPTABLE",
246
247 BlockLOONG64EQ: "EQ",
248 BlockLOONG64NE: "NE",
249 BlockLOONG64LTZ: "LTZ",
250 BlockLOONG64LEZ: "LEZ",
251 BlockLOONG64GTZ: "GTZ",
252 BlockLOONG64GEZ: "GEZ",
253 BlockLOONG64FPT: "FPT",
254 BlockLOONG64FPF: "FPF",
255
256 BlockMIPSEQ: "EQ",
257 BlockMIPSNE: "NE",
258 BlockMIPSLTZ: "LTZ",
259 BlockMIPSLEZ: "LEZ",
260 BlockMIPSGTZ: "GTZ",
261 BlockMIPSGEZ: "GEZ",
262 BlockMIPSFPT: "FPT",
263 BlockMIPSFPF: "FPF",
264
265 BlockMIPS64EQ: "EQ",
266 BlockMIPS64NE: "NE",
267 BlockMIPS64LTZ: "LTZ",
268 BlockMIPS64LEZ: "LEZ",
269 BlockMIPS64GTZ: "GTZ",
270 BlockMIPS64GEZ: "GEZ",
271 BlockMIPS64FPT: "FPT",
272 BlockMIPS64FPF: "FPF",
273
274 BlockPPC64EQ: "EQ",
275 BlockPPC64NE: "NE",
276 BlockPPC64LT: "LT",
277 BlockPPC64LE: "LE",
278 BlockPPC64GT: "GT",
279 BlockPPC64GE: "GE",
280 BlockPPC64FLT: "FLT",
281 BlockPPC64FLE: "FLE",
282 BlockPPC64FGT: "FGT",
283 BlockPPC64FGE: "FGE",
284
285 BlockRISCV64BEQ: "BEQ",
286 BlockRISCV64BNE: "BNE",
287 BlockRISCV64BLT: "BLT",
288 BlockRISCV64BGE: "BGE",
289 BlockRISCV64BLTU: "BLTU",
290 BlockRISCV64BGEU: "BGEU",
291 BlockRISCV64BEQZ: "BEQZ",
292 BlockRISCV64BNEZ: "BNEZ",
293 BlockRISCV64BLEZ: "BLEZ",
294 BlockRISCV64BGEZ: "BGEZ",
295 BlockRISCV64BLTZ: "BLTZ",
296 BlockRISCV64BGTZ: "BGTZ",
297
298 BlockS390XBRC: "BRC",
299 BlockS390XCRJ: "CRJ",
300 BlockS390XCGRJ: "CGRJ",
301 BlockS390XCLRJ: "CLRJ",
302 BlockS390XCLGRJ: "CLGRJ",
303 BlockS390XCIJ: "CIJ",
304 BlockS390XCGIJ: "CGIJ",
305 BlockS390XCLIJ: "CLIJ",
306 BlockS390XCLGIJ: "CLGIJ",
307
308 BlockPlain: "Plain",
309 BlockIf: "If",
310 BlockDefer: "Defer",
311 BlockRet: "Ret",
312 BlockRetJmp: "RetJmp",
313 BlockExit: "Exit",
314 BlockJumpTable: "JumpTable",
315 BlockFirst: "First",
316 }
317
318 func (k BlockKind) String() string { return blockString[k] }
319 func (k BlockKind) AuxIntType() string {
320 switch k {
321 case BlockARM64TBZ:
322 return "int64"
323 case BlockARM64TBNZ:
324 return "int64"
325 case BlockS390XCIJ:
326 return "int8"
327 case BlockS390XCGIJ:
328 return "int8"
329 case BlockS390XCLIJ:
330 return "uint8"
331 case BlockS390XCLGIJ:
332 return "uint8"
333 }
334 return ""
335 }
336
337 const (
338 OpInvalid Op = iota
339
340 Op386ADDSS
341 Op386ADDSD
342 Op386SUBSS
343 Op386SUBSD
344 Op386MULSS
345 Op386MULSD
346 Op386DIVSS
347 Op386DIVSD
348 Op386MOVSSload
349 Op386MOVSDload
350 Op386MOVSSconst
351 Op386MOVSDconst
352 Op386MOVSSloadidx1
353 Op386MOVSSloadidx4
354 Op386MOVSDloadidx1
355 Op386MOVSDloadidx8
356 Op386MOVSSstore
357 Op386MOVSDstore
358 Op386MOVSSstoreidx1
359 Op386MOVSSstoreidx4
360 Op386MOVSDstoreidx1
361 Op386MOVSDstoreidx8
362 Op386ADDSSload
363 Op386ADDSDload
364 Op386SUBSSload
365 Op386SUBSDload
366 Op386MULSSload
367 Op386MULSDload
368 Op386DIVSSload
369 Op386DIVSDload
370 Op386ADDL
371 Op386ADDLconst
372 Op386ADDLcarry
373 Op386ADDLconstcarry
374 Op386ADCL
375 Op386ADCLconst
376 Op386SUBL
377 Op386SUBLconst
378 Op386SUBLcarry
379 Op386SUBLconstcarry
380 Op386SBBL
381 Op386SBBLconst
382 Op386MULL
383 Op386MULLconst
384 Op386MULLU
385 Op386HMULL
386 Op386HMULLU
387 Op386MULLQU
388 Op386AVGLU
389 Op386DIVL
390 Op386DIVW
391 Op386DIVLU
392 Op386DIVWU
393 Op386MODL
394 Op386MODW
395 Op386MODLU
396 Op386MODWU
397 Op386ANDL
398 Op386ANDLconst
399 Op386ORL
400 Op386ORLconst
401 Op386XORL
402 Op386XORLconst
403 Op386CMPL
404 Op386CMPW
405 Op386CMPB
406 Op386CMPLconst
407 Op386CMPWconst
408 Op386CMPBconst
409 Op386CMPLload
410 Op386CMPWload
411 Op386CMPBload
412 Op386CMPLconstload
413 Op386CMPWconstload
414 Op386CMPBconstload
415 Op386UCOMISS
416 Op386UCOMISD
417 Op386TESTL
418 Op386TESTW
419 Op386TESTB
420 Op386TESTLconst
421 Op386TESTWconst
422 Op386TESTBconst
423 Op386SHLL
424 Op386SHLLconst
425 Op386SHRL
426 Op386SHRW
427 Op386SHRB
428 Op386SHRLconst
429 Op386SHRWconst
430 Op386SHRBconst
431 Op386SARL
432 Op386SARW
433 Op386SARB
434 Op386SARLconst
435 Op386SARWconst
436 Op386SARBconst
437 Op386ROLL
438 Op386ROLW
439 Op386ROLB
440 Op386ROLLconst
441 Op386ROLWconst
442 Op386ROLBconst
443 Op386ADDLload
444 Op386SUBLload
445 Op386MULLload
446 Op386ANDLload
447 Op386ORLload
448 Op386XORLload
449 Op386ADDLloadidx4
450 Op386SUBLloadidx4
451 Op386MULLloadidx4
452 Op386ANDLloadidx4
453 Op386ORLloadidx4
454 Op386XORLloadidx4
455 Op386NEGL
456 Op386NOTL
457 Op386BSFL
458 Op386BSFW
459 Op386LoweredCtz32
460 Op386BSRL
461 Op386BSRW
462 Op386BSWAPL
463 Op386SQRTSD
464 Op386SQRTSS
465 Op386SBBLcarrymask
466 Op386SETEQ
467 Op386SETNE
468 Op386SETL
469 Op386SETLE
470 Op386SETG
471 Op386SETGE
472 Op386SETB
473 Op386SETBE
474 Op386SETA
475 Op386SETAE
476 Op386SETO
477 Op386SETEQF
478 Op386SETNEF
479 Op386SETORD
480 Op386SETNAN
481 Op386SETGF
482 Op386SETGEF
483 Op386MOVBLSX
484 Op386MOVBLZX
485 Op386MOVWLSX
486 Op386MOVWLZX
487 Op386MOVLconst
488 Op386CVTTSD2SL
489 Op386CVTTSS2SL
490 Op386CVTSL2SS
491 Op386CVTSL2SD
492 Op386CVTSD2SS
493 Op386CVTSS2SD
494 Op386PXOR
495 Op386LEAL
496 Op386LEAL1
497 Op386LEAL2
498 Op386LEAL4
499 Op386LEAL8
500 Op386MOVBload
501 Op386MOVBLSXload
502 Op386MOVWload
503 Op386MOVWLSXload
504 Op386MOVLload
505 Op386MOVBstore
506 Op386MOVWstore
507 Op386MOVLstore
508 Op386ADDLmodify
509 Op386SUBLmodify
510 Op386ANDLmodify
511 Op386ORLmodify
512 Op386XORLmodify
513 Op386ADDLmodifyidx4
514 Op386SUBLmodifyidx4
515 Op386ANDLmodifyidx4
516 Op386ORLmodifyidx4
517 Op386XORLmodifyidx4
518 Op386ADDLconstmodify
519 Op386ANDLconstmodify
520 Op386ORLconstmodify
521 Op386XORLconstmodify
522 Op386ADDLconstmodifyidx4
523 Op386ANDLconstmodifyidx4
524 Op386ORLconstmodifyidx4
525 Op386XORLconstmodifyidx4
526 Op386MOVBloadidx1
527 Op386MOVWloadidx1
528 Op386MOVWloadidx2
529 Op386MOVLloadidx1
530 Op386MOVLloadidx4
531 Op386MOVBstoreidx1
532 Op386MOVWstoreidx1
533 Op386MOVWstoreidx2
534 Op386MOVLstoreidx1
535 Op386MOVLstoreidx4
536 Op386MOVBstoreconst
537 Op386MOVWstoreconst
538 Op386MOVLstoreconst
539 Op386MOVBstoreconstidx1
540 Op386MOVWstoreconstidx1
541 Op386MOVWstoreconstidx2
542 Op386MOVLstoreconstidx1
543 Op386MOVLstoreconstidx4
544 Op386DUFFZERO
545 Op386REPSTOSL
546 Op386CALLstatic
547 Op386CALLtail
548 Op386CALLclosure
549 Op386CALLinter
550 Op386DUFFCOPY
551 Op386REPMOVSL
552 Op386InvertFlags
553 Op386LoweredGetG
554 Op386LoweredGetClosurePtr
555 Op386LoweredGetCallerPC
556 Op386LoweredGetCallerSP
557 Op386LoweredNilCheck
558 Op386LoweredWB
559 Op386LoweredPanicBoundsA
560 Op386LoweredPanicBoundsB
561 Op386LoweredPanicBoundsC
562 Op386LoweredPanicExtendA
563 Op386LoweredPanicExtendB
564 Op386LoweredPanicExtendC
565 Op386FlagEQ
566 Op386FlagLT_ULT
567 Op386FlagLT_UGT
568 Op386FlagGT_UGT
569 Op386FlagGT_ULT
570 Op386MOVSSconst1
571 Op386MOVSDconst1
572 Op386MOVSSconst2
573 Op386MOVSDconst2
574
575 OpAMD64ADDSS
576 OpAMD64ADDSD
577 OpAMD64SUBSS
578 OpAMD64SUBSD
579 OpAMD64MULSS
580 OpAMD64MULSD
581 OpAMD64DIVSS
582 OpAMD64DIVSD
583 OpAMD64MOVSSload
584 OpAMD64MOVSDload
585 OpAMD64MOVSSconst
586 OpAMD64MOVSDconst
587 OpAMD64MOVSSloadidx1
588 OpAMD64MOVSSloadidx4
589 OpAMD64MOVSDloadidx1
590 OpAMD64MOVSDloadidx8
591 OpAMD64MOVSSstore
592 OpAMD64MOVSDstore
593 OpAMD64MOVSSstoreidx1
594 OpAMD64MOVSSstoreidx4
595 OpAMD64MOVSDstoreidx1
596 OpAMD64MOVSDstoreidx8
597 OpAMD64ADDSSload
598 OpAMD64ADDSDload
599 OpAMD64SUBSSload
600 OpAMD64SUBSDload
601 OpAMD64MULSSload
602 OpAMD64MULSDload
603 OpAMD64DIVSSload
604 OpAMD64DIVSDload
605 OpAMD64ADDSSloadidx1
606 OpAMD64ADDSSloadidx4
607 OpAMD64ADDSDloadidx1
608 OpAMD64ADDSDloadidx8
609 OpAMD64SUBSSloadidx1
610 OpAMD64SUBSSloadidx4
611 OpAMD64SUBSDloadidx1
612 OpAMD64SUBSDloadidx8
613 OpAMD64MULSSloadidx1
614 OpAMD64MULSSloadidx4
615 OpAMD64MULSDloadidx1
616 OpAMD64MULSDloadidx8
617 OpAMD64DIVSSloadidx1
618 OpAMD64DIVSSloadidx4
619 OpAMD64DIVSDloadidx1
620 OpAMD64DIVSDloadidx8
621 OpAMD64ADDQ
622 OpAMD64ADDL
623 OpAMD64ADDQconst
624 OpAMD64ADDLconst
625 OpAMD64ADDQconstmodify
626 OpAMD64ADDLconstmodify
627 OpAMD64SUBQ
628 OpAMD64SUBL
629 OpAMD64SUBQconst
630 OpAMD64SUBLconst
631 OpAMD64MULQ
632 OpAMD64MULL
633 OpAMD64MULQconst
634 OpAMD64MULLconst
635 OpAMD64MULLU
636 OpAMD64MULQU
637 OpAMD64HMULQ
638 OpAMD64HMULL
639 OpAMD64HMULQU
640 OpAMD64HMULLU
641 OpAMD64AVGQU
642 OpAMD64DIVQ
643 OpAMD64DIVL
644 OpAMD64DIVW
645 OpAMD64DIVQU
646 OpAMD64DIVLU
647 OpAMD64DIVWU
648 OpAMD64NEGLflags
649 OpAMD64ADDQcarry
650 OpAMD64ADCQ
651 OpAMD64ADDQconstcarry
652 OpAMD64ADCQconst
653 OpAMD64SUBQborrow
654 OpAMD64SBBQ
655 OpAMD64SUBQconstborrow
656 OpAMD64SBBQconst
657 OpAMD64MULQU2
658 OpAMD64DIVQU2
659 OpAMD64ANDQ
660 OpAMD64ANDL
661 OpAMD64ANDQconst
662 OpAMD64ANDLconst
663 OpAMD64ANDQconstmodify
664 OpAMD64ANDLconstmodify
665 OpAMD64ORQ
666 OpAMD64ORL
667 OpAMD64ORQconst
668 OpAMD64ORLconst
669 OpAMD64ORQconstmodify
670 OpAMD64ORLconstmodify
671 OpAMD64XORQ
672 OpAMD64XORL
673 OpAMD64XORQconst
674 OpAMD64XORLconst
675 OpAMD64XORQconstmodify
676 OpAMD64XORLconstmodify
677 OpAMD64CMPQ
678 OpAMD64CMPL
679 OpAMD64CMPW
680 OpAMD64CMPB
681 OpAMD64CMPQconst
682 OpAMD64CMPLconst
683 OpAMD64CMPWconst
684 OpAMD64CMPBconst
685 OpAMD64CMPQload
686 OpAMD64CMPLload
687 OpAMD64CMPWload
688 OpAMD64CMPBload
689 OpAMD64CMPQconstload
690 OpAMD64CMPLconstload
691 OpAMD64CMPWconstload
692 OpAMD64CMPBconstload
693 OpAMD64CMPQloadidx8
694 OpAMD64CMPQloadidx1
695 OpAMD64CMPLloadidx4
696 OpAMD64CMPLloadidx1
697 OpAMD64CMPWloadidx2
698 OpAMD64CMPWloadidx1
699 OpAMD64CMPBloadidx1
700 OpAMD64CMPQconstloadidx8
701 OpAMD64CMPQconstloadidx1
702 OpAMD64CMPLconstloadidx4
703 OpAMD64CMPLconstloadidx1
704 OpAMD64CMPWconstloadidx2
705 OpAMD64CMPWconstloadidx1
706 OpAMD64CMPBconstloadidx1
707 OpAMD64UCOMISS
708 OpAMD64UCOMISD
709 OpAMD64BTL
710 OpAMD64BTQ
711 OpAMD64BTCL
712 OpAMD64BTCQ
713 OpAMD64BTRL
714 OpAMD64BTRQ
715 OpAMD64BTSL
716 OpAMD64BTSQ
717 OpAMD64BTLconst
718 OpAMD64BTQconst
719 OpAMD64BTCQconst
720 OpAMD64BTRQconst
721 OpAMD64BTSQconst
722 OpAMD64BTSQconstmodify
723 OpAMD64BTRQconstmodify
724 OpAMD64BTCQconstmodify
725 OpAMD64TESTQ
726 OpAMD64TESTL
727 OpAMD64TESTW
728 OpAMD64TESTB
729 OpAMD64TESTQconst
730 OpAMD64TESTLconst
731 OpAMD64TESTWconst
732 OpAMD64TESTBconst
733 OpAMD64SHLQ
734 OpAMD64SHLL
735 OpAMD64SHLQconst
736 OpAMD64SHLLconst
737 OpAMD64SHRQ
738 OpAMD64SHRL
739 OpAMD64SHRW
740 OpAMD64SHRB
741 OpAMD64SHRQconst
742 OpAMD64SHRLconst
743 OpAMD64SHRWconst
744 OpAMD64SHRBconst
745 OpAMD64SARQ
746 OpAMD64SARL
747 OpAMD64SARW
748 OpAMD64SARB
749 OpAMD64SARQconst
750 OpAMD64SARLconst
751 OpAMD64SARWconst
752 OpAMD64SARBconst
753 OpAMD64SHRDQ
754 OpAMD64SHLDQ
755 OpAMD64ROLQ
756 OpAMD64ROLL
757 OpAMD64ROLW
758 OpAMD64ROLB
759 OpAMD64RORQ
760 OpAMD64RORL
761 OpAMD64RORW
762 OpAMD64RORB
763 OpAMD64ROLQconst
764 OpAMD64ROLLconst
765 OpAMD64ROLWconst
766 OpAMD64ROLBconst
767 OpAMD64ADDLload
768 OpAMD64ADDQload
769 OpAMD64SUBQload
770 OpAMD64SUBLload
771 OpAMD64ANDLload
772 OpAMD64ANDQload
773 OpAMD64ORQload
774 OpAMD64ORLload
775 OpAMD64XORQload
776 OpAMD64XORLload
777 OpAMD64ADDLloadidx1
778 OpAMD64ADDLloadidx4
779 OpAMD64ADDLloadidx8
780 OpAMD64ADDQloadidx1
781 OpAMD64ADDQloadidx8
782 OpAMD64SUBLloadidx1
783 OpAMD64SUBLloadidx4
784 OpAMD64SUBLloadidx8
785 OpAMD64SUBQloadidx1
786 OpAMD64SUBQloadidx8
787 OpAMD64ANDLloadidx1
788 OpAMD64ANDLloadidx4
789 OpAMD64ANDLloadidx8
790 OpAMD64ANDQloadidx1
791 OpAMD64ANDQloadidx8
792 OpAMD64ORLloadidx1
793 OpAMD64ORLloadidx4
794 OpAMD64ORLloadidx8
795 OpAMD64ORQloadidx1
796 OpAMD64ORQloadidx8
797 OpAMD64XORLloadidx1
798 OpAMD64XORLloadidx4
799 OpAMD64XORLloadidx8
800 OpAMD64XORQloadidx1
801 OpAMD64XORQloadidx8
802 OpAMD64ADDQmodify
803 OpAMD64SUBQmodify
804 OpAMD64ANDQmodify
805 OpAMD64ORQmodify
806 OpAMD64XORQmodify
807 OpAMD64ADDLmodify
808 OpAMD64SUBLmodify
809 OpAMD64ANDLmodify
810 OpAMD64ORLmodify
811 OpAMD64XORLmodify
812 OpAMD64ADDQmodifyidx1
813 OpAMD64ADDQmodifyidx8
814 OpAMD64SUBQmodifyidx1
815 OpAMD64SUBQmodifyidx8
816 OpAMD64ANDQmodifyidx1
817 OpAMD64ANDQmodifyidx8
818 OpAMD64ORQmodifyidx1
819 OpAMD64ORQmodifyidx8
820 OpAMD64XORQmodifyidx1
821 OpAMD64XORQmodifyidx8
822 OpAMD64ADDLmodifyidx1
823 OpAMD64ADDLmodifyidx4
824 OpAMD64ADDLmodifyidx8
825 OpAMD64SUBLmodifyidx1
826 OpAMD64SUBLmodifyidx4
827 OpAMD64SUBLmodifyidx8
828 OpAMD64ANDLmodifyidx1
829 OpAMD64ANDLmodifyidx4
830 OpAMD64ANDLmodifyidx8
831 OpAMD64ORLmodifyidx1
832 OpAMD64ORLmodifyidx4
833 OpAMD64ORLmodifyidx8
834 OpAMD64XORLmodifyidx1
835 OpAMD64XORLmodifyidx4
836 OpAMD64XORLmodifyidx8
837 OpAMD64ADDQconstmodifyidx1
838 OpAMD64ADDQconstmodifyidx8
839 OpAMD64ANDQconstmodifyidx1
840 OpAMD64ANDQconstmodifyidx8
841 OpAMD64ORQconstmodifyidx1
842 OpAMD64ORQconstmodifyidx8
843 OpAMD64XORQconstmodifyidx1
844 OpAMD64XORQconstmodifyidx8
845 OpAMD64ADDLconstmodifyidx1
846 OpAMD64ADDLconstmodifyidx4
847 OpAMD64ADDLconstmodifyidx8
848 OpAMD64ANDLconstmodifyidx1
849 OpAMD64ANDLconstmodifyidx4
850 OpAMD64ANDLconstmodifyidx8
851 OpAMD64ORLconstmodifyidx1
852 OpAMD64ORLconstmodifyidx4
853 OpAMD64ORLconstmodifyidx8
854 OpAMD64XORLconstmodifyidx1
855 OpAMD64XORLconstmodifyidx4
856 OpAMD64XORLconstmodifyidx8
857 OpAMD64NEGQ
858 OpAMD64NEGL
859 OpAMD64NOTQ
860 OpAMD64NOTL
861 OpAMD64BSFQ
862 OpAMD64BSFL
863 OpAMD64BSRQ
864 OpAMD64BSRL
865 OpAMD64CMOVQEQ
866 OpAMD64CMOVQNE
867 OpAMD64CMOVQLT
868 OpAMD64CMOVQGT
869 OpAMD64CMOVQLE
870 OpAMD64CMOVQGE
871 OpAMD64CMOVQLS
872 OpAMD64CMOVQHI
873 OpAMD64CMOVQCC
874 OpAMD64CMOVQCS
875 OpAMD64CMOVLEQ
876 OpAMD64CMOVLNE
877 OpAMD64CMOVLLT
878 OpAMD64CMOVLGT
879 OpAMD64CMOVLLE
880 OpAMD64CMOVLGE
881 OpAMD64CMOVLLS
882 OpAMD64CMOVLHI
883 OpAMD64CMOVLCC
884 OpAMD64CMOVLCS
885 OpAMD64CMOVWEQ
886 OpAMD64CMOVWNE
887 OpAMD64CMOVWLT
888 OpAMD64CMOVWGT
889 OpAMD64CMOVWLE
890 OpAMD64CMOVWGE
891 OpAMD64CMOVWLS
892 OpAMD64CMOVWHI
893 OpAMD64CMOVWCC
894 OpAMD64CMOVWCS
895 OpAMD64CMOVQEQF
896 OpAMD64CMOVQNEF
897 OpAMD64CMOVQGTF
898 OpAMD64CMOVQGEF
899 OpAMD64CMOVLEQF
900 OpAMD64CMOVLNEF
901 OpAMD64CMOVLGTF
902 OpAMD64CMOVLGEF
903 OpAMD64CMOVWEQF
904 OpAMD64CMOVWNEF
905 OpAMD64CMOVWGTF
906 OpAMD64CMOVWGEF
907 OpAMD64BSWAPQ
908 OpAMD64BSWAPL
909 OpAMD64POPCNTQ
910 OpAMD64POPCNTL
911 OpAMD64SQRTSD
912 OpAMD64SQRTSS
913 OpAMD64ROUNDSD
914 OpAMD64VFMADD231SD
915 OpAMD64MINSD
916 OpAMD64MINSS
917 OpAMD64SBBQcarrymask
918 OpAMD64SBBLcarrymask
919 OpAMD64SETEQ
920 OpAMD64SETNE
921 OpAMD64SETL
922 OpAMD64SETLE
923 OpAMD64SETG
924 OpAMD64SETGE
925 OpAMD64SETB
926 OpAMD64SETBE
927 OpAMD64SETA
928 OpAMD64SETAE
929 OpAMD64SETO
930 OpAMD64SETEQstore
931 OpAMD64SETNEstore
932 OpAMD64SETLstore
933 OpAMD64SETLEstore
934 OpAMD64SETGstore
935 OpAMD64SETGEstore
936 OpAMD64SETBstore
937 OpAMD64SETBEstore
938 OpAMD64SETAstore
939 OpAMD64SETAEstore
940 OpAMD64SETEQstoreidx1
941 OpAMD64SETNEstoreidx1
942 OpAMD64SETLstoreidx1
943 OpAMD64SETLEstoreidx1
944 OpAMD64SETGstoreidx1
945 OpAMD64SETGEstoreidx1
946 OpAMD64SETBstoreidx1
947 OpAMD64SETBEstoreidx1
948 OpAMD64SETAstoreidx1
949 OpAMD64SETAEstoreidx1
950 OpAMD64SETEQF
951 OpAMD64SETNEF
952 OpAMD64SETORD
953 OpAMD64SETNAN
954 OpAMD64SETGF
955 OpAMD64SETGEF
956 OpAMD64MOVBQSX
957 OpAMD64MOVBQZX
958 OpAMD64MOVWQSX
959 OpAMD64MOVWQZX
960 OpAMD64MOVLQSX
961 OpAMD64MOVLQZX
962 OpAMD64MOVLconst
963 OpAMD64MOVQconst
964 OpAMD64CVTTSD2SL
965 OpAMD64CVTTSD2SQ
966 OpAMD64CVTTSS2SL
967 OpAMD64CVTTSS2SQ
968 OpAMD64CVTSL2SS
969 OpAMD64CVTSL2SD
970 OpAMD64CVTSQ2SS
971 OpAMD64CVTSQ2SD
972 OpAMD64CVTSD2SS
973 OpAMD64CVTSS2SD
974 OpAMD64MOVQi2f
975 OpAMD64MOVQf2i
976 OpAMD64MOVLi2f
977 OpAMD64MOVLf2i
978 OpAMD64PXOR
979 OpAMD64POR
980 OpAMD64LEAQ
981 OpAMD64LEAL
982 OpAMD64LEAW
983 OpAMD64LEAQ1
984 OpAMD64LEAL1
985 OpAMD64LEAW1
986 OpAMD64LEAQ2
987 OpAMD64LEAL2
988 OpAMD64LEAW2
989 OpAMD64LEAQ4
990 OpAMD64LEAL4
991 OpAMD64LEAW4
992 OpAMD64LEAQ8
993 OpAMD64LEAL8
994 OpAMD64LEAW8
995 OpAMD64MOVBload
996 OpAMD64MOVBQSXload
997 OpAMD64MOVWload
998 OpAMD64MOVWQSXload
999 OpAMD64MOVLload
1000 OpAMD64MOVLQSXload
1001 OpAMD64MOVQload
1002 OpAMD64MOVBstore
1003 OpAMD64MOVWstore
1004 OpAMD64MOVLstore
1005 OpAMD64MOVQstore
1006 OpAMD64MOVOload
1007 OpAMD64MOVOstore
1008 OpAMD64MOVBloadidx1
1009 OpAMD64MOVWloadidx1
1010 OpAMD64MOVWloadidx2
1011 OpAMD64MOVLloadidx1
1012 OpAMD64MOVLloadidx4
1013 OpAMD64MOVLloadidx8
1014 OpAMD64MOVQloadidx1
1015 OpAMD64MOVQloadidx8
1016 OpAMD64MOVBstoreidx1
1017 OpAMD64MOVWstoreidx1
1018 OpAMD64MOVWstoreidx2
1019 OpAMD64MOVLstoreidx1
1020 OpAMD64MOVLstoreidx4
1021 OpAMD64MOVLstoreidx8
1022 OpAMD64MOVQstoreidx1
1023 OpAMD64MOVQstoreidx8
1024 OpAMD64MOVBstoreconst
1025 OpAMD64MOVWstoreconst
1026 OpAMD64MOVLstoreconst
1027 OpAMD64MOVQstoreconst
1028 OpAMD64MOVOstoreconst
1029 OpAMD64MOVBstoreconstidx1
1030 OpAMD64MOVWstoreconstidx1
1031 OpAMD64MOVWstoreconstidx2
1032 OpAMD64MOVLstoreconstidx1
1033 OpAMD64MOVLstoreconstidx4
1034 OpAMD64MOVQstoreconstidx1
1035 OpAMD64MOVQstoreconstidx8
1036 OpAMD64DUFFZERO
1037 OpAMD64REPSTOSQ
1038 OpAMD64CALLstatic
1039 OpAMD64CALLtail
1040 OpAMD64CALLclosure
1041 OpAMD64CALLinter
1042 OpAMD64DUFFCOPY
1043 OpAMD64REPMOVSQ
1044 OpAMD64InvertFlags
1045 OpAMD64LoweredGetG
1046 OpAMD64LoweredGetClosurePtr
1047 OpAMD64LoweredGetCallerPC
1048 OpAMD64LoweredGetCallerSP
1049 OpAMD64LoweredNilCheck
1050 OpAMD64LoweredWB
1051 OpAMD64LoweredHasCPUFeature
1052 OpAMD64LoweredPanicBoundsA
1053 OpAMD64LoweredPanicBoundsB
1054 OpAMD64LoweredPanicBoundsC
1055 OpAMD64FlagEQ
1056 OpAMD64FlagLT_ULT
1057 OpAMD64FlagLT_UGT
1058 OpAMD64FlagGT_UGT
1059 OpAMD64FlagGT_ULT
1060 OpAMD64MOVBatomicload
1061 OpAMD64MOVLatomicload
1062 OpAMD64MOVQatomicload
1063 OpAMD64XCHGB
1064 OpAMD64XCHGL
1065 OpAMD64XCHGQ
1066 OpAMD64XADDLlock
1067 OpAMD64XADDQlock
1068 OpAMD64AddTupleFirst32
1069 OpAMD64AddTupleFirst64
1070 OpAMD64CMPXCHGLlock
1071 OpAMD64CMPXCHGQlock
1072 OpAMD64ANDBlock
1073 OpAMD64ANDLlock
1074 OpAMD64ORBlock
1075 OpAMD64ORLlock
1076 OpAMD64PrefetchT0
1077 OpAMD64PrefetchNTA
1078 OpAMD64ANDNQ
1079 OpAMD64ANDNL
1080 OpAMD64BLSIQ
1081 OpAMD64BLSIL
1082 OpAMD64BLSMSKQ
1083 OpAMD64BLSMSKL
1084 OpAMD64BLSRQ
1085 OpAMD64BLSRL
1086 OpAMD64TZCNTQ
1087 OpAMD64TZCNTL
1088 OpAMD64LZCNTQ
1089 OpAMD64LZCNTL
1090 OpAMD64MOVBEWstore
1091 OpAMD64MOVBELload
1092 OpAMD64MOVBELstore
1093 OpAMD64MOVBEQload
1094 OpAMD64MOVBEQstore
1095 OpAMD64MOVBELloadidx1
1096 OpAMD64MOVBELloadidx4
1097 OpAMD64MOVBELloadidx8
1098 OpAMD64MOVBEQloadidx1
1099 OpAMD64MOVBEQloadidx8
1100 OpAMD64MOVBEWstoreidx1
1101 OpAMD64MOVBEWstoreidx2
1102 OpAMD64MOVBELstoreidx1
1103 OpAMD64MOVBELstoreidx4
1104 OpAMD64MOVBELstoreidx8
1105 OpAMD64MOVBEQstoreidx1
1106 OpAMD64MOVBEQstoreidx8
1107 OpAMD64SARXQ
1108 OpAMD64SARXL
1109 OpAMD64SHLXQ
1110 OpAMD64SHLXL
1111 OpAMD64SHRXQ
1112 OpAMD64SHRXL
1113 OpAMD64SARXLload
1114 OpAMD64SARXQload
1115 OpAMD64SHLXLload
1116 OpAMD64SHLXQload
1117 OpAMD64SHRXLload
1118 OpAMD64SHRXQload
1119 OpAMD64SARXLloadidx1
1120 OpAMD64SARXLloadidx4
1121 OpAMD64SARXLloadidx8
1122 OpAMD64SARXQloadidx1
1123 OpAMD64SARXQloadidx8
1124 OpAMD64SHLXLloadidx1
1125 OpAMD64SHLXLloadidx4
1126 OpAMD64SHLXLloadidx8
1127 OpAMD64SHLXQloadidx1
1128 OpAMD64SHLXQloadidx8
1129 OpAMD64SHRXLloadidx1
1130 OpAMD64SHRXLloadidx4
1131 OpAMD64SHRXLloadidx8
1132 OpAMD64SHRXQloadidx1
1133 OpAMD64SHRXQloadidx8
1134
1135 OpARMADD
1136 OpARMADDconst
1137 OpARMSUB
1138 OpARMSUBconst
1139 OpARMRSB
1140 OpARMRSBconst
1141 OpARMMUL
1142 OpARMHMUL
1143 OpARMHMULU
1144 OpARMCALLudiv
1145 OpARMADDS
1146 OpARMADDSconst
1147 OpARMADC
1148 OpARMADCconst
1149 OpARMSUBS
1150 OpARMSUBSconst
1151 OpARMRSBSconst
1152 OpARMSBC
1153 OpARMSBCconst
1154 OpARMRSCconst
1155 OpARMMULLU
1156 OpARMMULA
1157 OpARMMULS
1158 OpARMADDF
1159 OpARMADDD
1160 OpARMSUBF
1161 OpARMSUBD
1162 OpARMMULF
1163 OpARMMULD
1164 OpARMNMULF
1165 OpARMNMULD
1166 OpARMDIVF
1167 OpARMDIVD
1168 OpARMMULAF
1169 OpARMMULAD
1170 OpARMMULSF
1171 OpARMMULSD
1172 OpARMFMULAD
1173 OpARMAND
1174 OpARMANDconst
1175 OpARMOR
1176 OpARMORconst
1177 OpARMXOR
1178 OpARMXORconst
1179 OpARMBIC
1180 OpARMBICconst
1181 OpARMBFX
1182 OpARMBFXU
1183 OpARMMVN
1184 OpARMNEGF
1185 OpARMNEGD
1186 OpARMSQRTD
1187 OpARMSQRTF
1188 OpARMABSD
1189 OpARMCLZ
1190 OpARMREV
1191 OpARMREV16
1192 OpARMRBIT
1193 OpARMSLL
1194 OpARMSLLconst
1195 OpARMSRL
1196 OpARMSRLconst
1197 OpARMSRA
1198 OpARMSRAconst
1199 OpARMSRR
1200 OpARMSRRconst
1201 OpARMADDshiftLL
1202 OpARMADDshiftRL
1203 OpARMADDshiftRA
1204 OpARMSUBshiftLL
1205 OpARMSUBshiftRL
1206 OpARMSUBshiftRA
1207 OpARMRSBshiftLL
1208 OpARMRSBshiftRL
1209 OpARMRSBshiftRA
1210 OpARMANDshiftLL
1211 OpARMANDshiftRL
1212 OpARMANDshiftRA
1213 OpARMORshiftLL
1214 OpARMORshiftRL
1215 OpARMORshiftRA
1216 OpARMXORshiftLL
1217 OpARMXORshiftRL
1218 OpARMXORshiftRA
1219 OpARMXORshiftRR
1220 OpARMBICshiftLL
1221 OpARMBICshiftRL
1222 OpARMBICshiftRA
1223 OpARMMVNshiftLL
1224 OpARMMVNshiftRL
1225 OpARMMVNshiftRA
1226 OpARMADCshiftLL
1227 OpARMADCshiftRL
1228 OpARMADCshiftRA
1229 OpARMSBCshiftLL
1230 OpARMSBCshiftRL
1231 OpARMSBCshiftRA
1232 OpARMRSCshiftLL
1233 OpARMRSCshiftRL
1234 OpARMRSCshiftRA
1235 OpARMADDSshiftLL
1236 OpARMADDSshiftRL
1237 OpARMADDSshiftRA
1238 OpARMSUBSshiftLL
1239 OpARMSUBSshiftRL
1240 OpARMSUBSshiftRA
1241 OpARMRSBSshiftLL
1242 OpARMRSBSshiftRL
1243 OpARMRSBSshiftRA
1244 OpARMADDshiftLLreg
1245 OpARMADDshiftRLreg
1246 OpARMADDshiftRAreg
1247 OpARMSUBshiftLLreg
1248 OpARMSUBshiftRLreg
1249 OpARMSUBshiftRAreg
1250 OpARMRSBshiftLLreg
1251 OpARMRSBshiftRLreg
1252 OpARMRSBshiftRAreg
1253 OpARMANDshiftLLreg
1254 OpARMANDshiftRLreg
1255 OpARMANDshiftRAreg
1256 OpARMORshiftLLreg
1257 OpARMORshiftRLreg
1258 OpARMORshiftRAreg
1259 OpARMXORshiftLLreg
1260 OpARMXORshiftRLreg
1261 OpARMXORshiftRAreg
1262 OpARMBICshiftLLreg
1263 OpARMBICshiftRLreg
1264 OpARMBICshiftRAreg
1265 OpARMMVNshiftLLreg
1266 OpARMMVNshiftRLreg
1267 OpARMMVNshiftRAreg
1268 OpARMADCshiftLLreg
1269 OpARMADCshiftRLreg
1270 OpARMADCshiftRAreg
1271 OpARMSBCshiftLLreg
1272 OpARMSBCshiftRLreg
1273 OpARMSBCshiftRAreg
1274 OpARMRSCshiftLLreg
1275 OpARMRSCshiftRLreg
1276 OpARMRSCshiftRAreg
1277 OpARMADDSshiftLLreg
1278 OpARMADDSshiftRLreg
1279 OpARMADDSshiftRAreg
1280 OpARMSUBSshiftLLreg
1281 OpARMSUBSshiftRLreg
1282 OpARMSUBSshiftRAreg
1283 OpARMRSBSshiftLLreg
1284 OpARMRSBSshiftRLreg
1285 OpARMRSBSshiftRAreg
1286 OpARMCMP
1287 OpARMCMPconst
1288 OpARMCMN
1289 OpARMCMNconst
1290 OpARMTST
1291 OpARMTSTconst
1292 OpARMTEQ
1293 OpARMTEQconst
1294 OpARMCMPF
1295 OpARMCMPD
1296 OpARMCMPshiftLL
1297 OpARMCMPshiftRL
1298 OpARMCMPshiftRA
1299 OpARMCMNshiftLL
1300 OpARMCMNshiftRL
1301 OpARMCMNshiftRA
1302 OpARMTSTshiftLL
1303 OpARMTSTshiftRL
1304 OpARMTSTshiftRA
1305 OpARMTEQshiftLL
1306 OpARMTEQshiftRL
1307 OpARMTEQshiftRA
1308 OpARMCMPshiftLLreg
1309 OpARMCMPshiftRLreg
1310 OpARMCMPshiftRAreg
1311 OpARMCMNshiftLLreg
1312 OpARMCMNshiftRLreg
1313 OpARMCMNshiftRAreg
1314 OpARMTSTshiftLLreg
1315 OpARMTSTshiftRLreg
1316 OpARMTSTshiftRAreg
1317 OpARMTEQshiftLLreg
1318 OpARMTEQshiftRLreg
1319 OpARMTEQshiftRAreg
1320 OpARMCMPF0
1321 OpARMCMPD0
1322 OpARMMOVWconst
1323 OpARMMOVFconst
1324 OpARMMOVDconst
1325 OpARMMOVWaddr
1326 OpARMMOVBload
1327 OpARMMOVBUload
1328 OpARMMOVHload
1329 OpARMMOVHUload
1330 OpARMMOVWload
1331 OpARMMOVFload
1332 OpARMMOVDload
1333 OpARMMOVBstore
1334 OpARMMOVHstore
1335 OpARMMOVWstore
1336 OpARMMOVFstore
1337 OpARMMOVDstore
1338 OpARMMOVWloadidx
1339 OpARMMOVWloadshiftLL
1340 OpARMMOVWloadshiftRL
1341 OpARMMOVWloadshiftRA
1342 OpARMMOVBUloadidx
1343 OpARMMOVBloadidx
1344 OpARMMOVHUloadidx
1345 OpARMMOVHloadidx
1346 OpARMMOVWstoreidx
1347 OpARMMOVWstoreshiftLL
1348 OpARMMOVWstoreshiftRL
1349 OpARMMOVWstoreshiftRA
1350 OpARMMOVBstoreidx
1351 OpARMMOVHstoreidx
1352 OpARMMOVBreg
1353 OpARMMOVBUreg
1354 OpARMMOVHreg
1355 OpARMMOVHUreg
1356 OpARMMOVWreg
1357 OpARMMOVWnop
1358 OpARMMOVWF
1359 OpARMMOVWD
1360 OpARMMOVWUF
1361 OpARMMOVWUD
1362 OpARMMOVFW
1363 OpARMMOVDW
1364 OpARMMOVFWU
1365 OpARMMOVDWU
1366 OpARMMOVFD
1367 OpARMMOVDF
1368 OpARMCMOVWHSconst
1369 OpARMCMOVWLSconst
1370 OpARMSRAcond
1371 OpARMCALLstatic
1372 OpARMCALLtail
1373 OpARMCALLclosure
1374 OpARMCALLinter
1375 OpARMLoweredNilCheck
1376 OpARMEqual
1377 OpARMNotEqual
1378 OpARMLessThan
1379 OpARMLessEqual
1380 OpARMGreaterThan
1381 OpARMGreaterEqual
1382 OpARMLessThanU
1383 OpARMLessEqualU
1384 OpARMGreaterThanU
1385 OpARMGreaterEqualU
1386 OpARMDUFFZERO
1387 OpARMDUFFCOPY
1388 OpARMLoweredZero
1389 OpARMLoweredMove
1390 OpARMLoweredGetClosurePtr
1391 OpARMLoweredGetCallerSP
1392 OpARMLoweredGetCallerPC
1393 OpARMLoweredPanicBoundsA
1394 OpARMLoweredPanicBoundsB
1395 OpARMLoweredPanicBoundsC
1396 OpARMLoweredPanicExtendA
1397 OpARMLoweredPanicExtendB
1398 OpARMLoweredPanicExtendC
1399 OpARMFlagConstant
1400 OpARMInvertFlags
1401 OpARMLoweredWB
1402
1403 OpARM64ADCSflags
1404 OpARM64ADCzerocarry
1405 OpARM64ADD
1406 OpARM64ADDconst
1407 OpARM64ADDSconstflags
1408 OpARM64ADDSflags
1409 OpARM64SUB
1410 OpARM64SUBconst
1411 OpARM64SBCSflags
1412 OpARM64SUBSflags
1413 OpARM64MUL
1414 OpARM64MULW
1415 OpARM64MNEG
1416 OpARM64MNEGW
1417 OpARM64MULH
1418 OpARM64UMULH
1419 OpARM64MULL
1420 OpARM64UMULL
1421 OpARM64DIV
1422 OpARM64UDIV
1423 OpARM64DIVW
1424 OpARM64UDIVW
1425 OpARM64MOD
1426 OpARM64UMOD
1427 OpARM64MODW
1428 OpARM64UMODW
1429 OpARM64FADDS
1430 OpARM64FADDD
1431 OpARM64FSUBS
1432 OpARM64FSUBD
1433 OpARM64FMULS
1434 OpARM64FMULD
1435 OpARM64FNMULS
1436 OpARM64FNMULD
1437 OpARM64FDIVS
1438 OpARM64FDIVD
1439 OpARM64AND
1440 OpARM64ANDconst
1441 OpARM64OR
1442 OpARM64ORconst
1443 OpARM64XOR
1444 OpARM64XORconst
1445 OpARM64BIC
1446 OpARM64EON
1447 OpARM64ORN
1448 OpARM64MVN
1449 OpARM64NEG
1450 OpARM64NEGSflags
1451 OpARM64NGCzerocarry
1452 OpARM64FABSD
1453 OpARM64FNEGS
1454 OpARM64FNEGD
1455 OpARM64FSQRTD
1456 OpARM64FSQRTS
1457 OpARM64FMIND
1458 OpARM64FMINS
1459 OpARM64FMAXD
1460 OpARM64FMAXS
1461 OpARM64REV
1462 OpARM64REVW
1463 OpARM64REV16
1464 OpARM64REV16W
1465 OpARM64RBIT
1466 OpARM64RBITW
1467 OpARM64CLZ
1468 OpARM64CLZW
1469 OpARM64VCNT
1470 OpARM64VUADDLV
1471 OpARM64LoweredRound32F
1472 OpARM64LoweredRound64F
1473 OpARM64FMADDS
1474 OpARM64FMADDD
1475 OpARM64FNMADDS
1476 OpARM64FNMADDD
1477 OpARM64FMSUBS
1478 OpARM64FMSUBD
1479 OpARM64FNMSUBS
1480 OpARM64FNMSUBD
1481 OpARM64MADD
1482 OpARM64MADDW
1483 OpARM64MSUB
1484 OpARM64MSUBW
1485 OpARM64SLL
1486 OpARM64SLLconst
1487 OpARM64SRL
1488 OpARM64SRLconst
1489 OpARM64SRA
1490 OpARM64SRAconst
1491 OpARM64ROR
1492 OpARM64RORW
1493 OpARM64RORconst
1494 OpARM64RORWconst
1495 OpARM64EXTRconst
1496 OpARM64EXTRWconst
1497 OpARM64CMP
1498 OpARM64CMPconst
1499 OpARM64CMPW
1500 OpARM64CMPWconst
1501 OpARM64CMN
1502 OpARM64CMNconst
1503 OpARM64CMNW
1504 OpARM64CMNWconst
1505 OpARM64TST
1506 OpARM64TSTconst
1507 OpARM64TSTW
1508 OpARM64TSTWconst
1509 OpARM64FCMPS
1510 OpARM64FCMPD
1511 OpARM64FCMPS0
1512 OpARM64FCMPD0
1513 OpARM64MVNshiftLL
1514 OpARM64MVNshiftRL
1515 OpARM64MVNshiftRA
1516 OpARM64MVNshiftRO
1517 OpARM64NEGshiftLL
1518 OpARM64NEGshiftRL
1519 OpARM64NEGshiftRA
1520 OpARM64ADDshiftLL
1521 OpARM64ADDshiftRL
1522 OpARM64ADDshiftRA
1523 OpARM64SUBshiftLL
1524 OpARM64SUBshiftRL
1525 OpARM64SUBshiftRA
1526 OpARM64ANDshiftLL
1527 OpARM64ANDshiftRL
1528 OpARM64ANDshiftRA
1529 OpARM64ANDshiftRO
1530 OpARM64ORshiftLL
1531 OpARM64ORshiftRL
1532 OpARM64ORshiftRA
1533 OpARM64ORshiftRO
1534 OpARM64XORshiftLL
1535 OpARM64XORshiftRL
1536 OpARM64XORshiftRA
1537 OpARM64XORshiftRO
1538 OpARM64BICshiftLL
1539 OpARM64BICshiftRL
1540 OpARM64BICshiftRA
1541 OpARM64BICshiftRO
1542 OpARM64EONshiftLL
1543 OpARM64EONshiftRL
1544 OpARM64EONshiftRA
1545 OpARM64EONshiftRO
1546 OpARM64ORNshiftLL
1547 OpARM64ORNshiftRL
1548 OpARM64ORNshiftRA
1549 OpARM64ORNshiftRO
1550 OpARM64CMPshiftLL
1551 OpARM64CMPshiftRL
1552 OpARM64CMPshiftRA
1553 OpARM64CMNshiftLL
1554 OpARM64CMNshiftRL
1555 OpARM64CMNshiftRA
1556 OpARM64TSTshiftLL
1557 OpARM64TSTshiftRL
1558 OpARM64TSTshiftRA
1559 OpARM64TSTshiftRO
1560 OpARM64BFI
1561 OpARM64BFXIL
1562 OpARM64SBFIZ
1563 OpARM64SBFX
1564 OpARM64UBFIZ
1565 OpARM64UBFX
1566 OpARM64MOVDconst
1567 OpARM64FMOVSconst
1568 OpARM64FMOVDconst
1569 OpARM64MOVDaddr
1570 OpARM64MOVBload
1571 OpARM64MOVBUload
1572 OpARM64MOVHload
1573 OpARM64MOVHUload
1574 OpARM64MOVWload
1575 OpARM64MOVWUload
1576 OpARM64MOVDload
1577 OpARM64LDP
1578 OpARM64FMOVSload
1579 OpARM64FMOVDload
1580 OpARM64MOVDloadidx
1581 OpARM64MOVWloadidx
1582 OpARM64MOVWUloadidx
1583 OpARM64MOVHloadidx
1584 OpARM64MOVHUloadidx
1585 OpARM64MOVBloadidx
1586 OpARM64MOVBUloadidx
1587 OpARM64FMOVSloadidx
1588 OpARM64FMOVDloadidx
1589 OpARM64MOVHloadidx2
1590 OpARM64MOVHUloadidx2
1591 OpARM64MOVWloadidx4
1592 OpARM64MOVWUloadidx4
1593 OpARM64MOVDloadidx8
1594 OpARM64FMOVSloadidx4
1595 OpARM64FMOVDloadidx8
1596 OpARM64MOVBstore
1597 OpARM64MOVHstore
1598 OpARM64MOVWstore
1599 OpARM64MOVDstore
1600 OpARM64STP
1601 OpARM64FMOVSstore
1602 OpARM64FMOVDstore
1603 OpARM64MOVBstoreidx
1604 OpARM64MOVHstoreidx
1605 OpARM64MOVWstoreidx
1606 OpARM64MOVDstoreidx
1607 OpARM64FMOVSstoreidx
1608 OpARM64FMOVDstoreidx
1609 OpARM64MOVHstoreidx2
1610 OpARM64MOVWstoreidx4
1611 OpARM64MOVDstoreidx8
1612 OpARM64FMOVSstoreidx4
1613 OpARM64FMOVDstoreidx8
1614 OpARM64MOVBstorezero
1615 OpARM64MOVHstorezero
1616 OpARM64MOVWstorezero
1617 OpARM64MOVDstorezero
1618 OpARM64MOVQstorezero
1619 OpARM64MOVBstorezeroidx
1620 OpARM64MOVHstorezeroidx
1621 OpARM64MOVWstorezeroidx
1622 OpARM64MOVDstorezeroidx
1623 OpARM64MOVHstorezeroidx2
1624 OpARM64MOVWstorezeroidx4
1625 OpARM64MOVDstorezeroidx8
1626 OpARM64FMOVDgpfp
1627 OpARM64FMOVDfpgp
1628 OpARM64FMOVSgpfp
1629 OpARM64FMOVSfpgp
1630 OpARM64MOVBreg
1631 OpARM64MOVBUreg
1632 OpARM64MOVHreg
1633 OpARM64MOVHUreg
1634 OpARM64MOVWreg
1635 OpARM64MOVWUreg
1636 OpARM64MOVDreg
1637 OpARM64MOVDnop
1638 OpARM64SCVTFWS
1639 OpARM64SCVTFWD
1640 OpARM64UCVTFWS
1641 OpARM64UCVTFWD
1642 OpARM64SCVTFS
1643 OpARM64SCVTFD
1644 OpARM64UCVTFS
1645 OpARM64UCVTFD
1646 OpARM64FCVTZSSW
1647 OpARM64FCVTZSDW
1648 OpARM64FCVTZUSW
1649 OpARM64FCVTZUDW
1650 OpARM64FCVTZSS
1651 OpARM64FCVTZSD
1652 OpARM64FCVTZUS
1653 OpARM64FCVTZUD
1654 OpARM64FCVTSD
1655 OpARM64FCVTDS
1656 OpARM64FRINTAD
1657 OpARM64FRINTMD
1658 OpARM64FRINTND
1659 OpARM64FRINTPD
1660 OpARM64FRINTZD
1661 OpARM64CSEL
1662 OpARM64CSEL0
1663 OpARM64CSINC
1664 OpARM64CSINV
1665 OpARM64CSNEG
1666 OpARM64CSETM
1667 OpARM64CALLstatic
1668 OpARM64CALLtail
1669 OpARM64CALLclosure
1670 OpARM64CALLinter
1671 OpARM64LoweredNilCheck
1672 OpARM64Equal
1673 OpARM64NotEqual
1674 OpARM64LessThan
1675 OpARM64LessEqual
1676 OpARM64GreaterThan
1677 OpARM64GreaterEqual
1678 OpARM64LessThanU
1679 OpARM64LessEqualU
1680 OpARM64GreaterThanU
1681 OpARM64GreaterEqualU
1682 OpARM64LessThanF
1683 OpARM64LessEqualF
1684 OpARM64GreaterThanF
1685 OpARM64GreaterEqualF
1686 OpARM64NotLessThanF
1687 OpARM64NotLessEqualF
1688 OpARM64NotGreaterThanF
1689 OpARM64NotGreaterEqualF
1690 OpARM64LessThanNoov
1691 OpARM64GreaterEqualNoov
1692 OpARM64DUFFZERO
1693 OpARM64LoweredZero
1694 OpARM64DUFFCOPY
1695 OpARM64LoweredMove
1696 OpARM64LoweredGetClosurePtr
1697 OpARM64LoweredGetCallerSP
1698 OpARM64LoweredGetCallerPC
1699 OpARM64FlagConstant
1700 OpARM64InvertFlags
1701 OpARM64LDAR
1702 OpARM64LDARB
1703 OpARM64LDARW
1704 OpARM64STLRB
1705 OpARM64STLR
1706 OpARM64STLRW
1707 OpARM64LoweredAtomicExchange64
1708 OpARM64LoweredAtomicExchange32
1709 OpARM64LoweredAtomicExchange64Variant
1710 OpARM64LoweredAtomicExchange32Variant
1711 OpARM64LoweredAtomicAdd64
1712 OpARM64LoweredAtomicAdd32
1713 OpARM64LoweredAtomicAdd64Variant
1714 OpARM64LoweredAtomicAdd32Variant
1715 OpARM64LoweredAtomicCas64
1716 OpARM64LoweredAtomicCas32
1717 OpARM64LoweredAtomicCas64Variant
1718 OpARM64LoweredAtomicCas32Variant
1719 OpARM64LoweredAtomicAnd8
1720 OpARM64LoweredAtomicOr8
1721 OpARM64LoweredAtomicAnd64
1722 OpARM64LoweredAtomicOr64
1723 OpARM64LoweredAtomicAnd32
1724 OpARM64LoweredAtomicOr32
1725 OpARM64LoweredAtomicAnd8Variant
1726 OpARM64LoweredAtomicOr8Variant
1727 OpARM64LoweredAtomicAnd64Variant
1728 OpARM64LoweredAtomicOr64Variant
1729 OpARM64LoweredAtomicAnd32Variant
1730 OpARM64LoweredAtomicOr32Variant
1731 OpARM64LoweredWB
1732 OpARM64LoweredPanicBoundsA
1733 OpARM64LoweredPanicBoundsB
1734 OpARM64LoweredPanicBoundsC
1735 OpARM64PRFM
1736 OpARM64DMB
1737
1738 OpLOONG64ADDV
1739 OpLOONG64ADDVconst
1740 OpLOONG64SUBV
1741 OpLOONG64SUBVconst
1742 OpLOONG64MULV
1743 OpLOONG64MULHV
1744 OpLOONG64MULHVU
1745 OpLOONG64DIVV
1746 OpLOONG64DIVVU
1747 OpLOONG64REMV
1748 OpLOONG64REMVU
1749 OpLOONG64ADDF
1750 OpLOONG64ADDD
1751 OpLOONG64SUBF
1752 OpLOONG64SUBD
1753 OpLOONG64MULF
1754 OpLOONG64MULD
1755 OpLOONG64DIVF
1756 OpLOONG64DIVD
1757 OpLOONG64AND
1758 OpLOONG64ANDconst
1759 OpLOONG64OR
1760 OpLOONG64ORconst
1761 OpLOONG64XOR
1762 OpLOONG64XORconst
1763 OpLOONG64NOR
1764 OpLOONG64NORconst
1765 OpLOONG64NEGV
1766 OpLOONG64NEGF
1767 OpLOONG64NEGD
1768 OpLOONG64SQRTD
1769 OpLOONG64SQRTF
1770 OpLOONG64MASKEQZ
1771 OpLOONG64MASKNEZ
1772 OpLOONG64SLLV
1773 OpLOONG64SLLVconst
1774 OpLOONG64SRLV
1775 OpLOONG64SRLVconst
1776 OpLOONG64SRAV
1777 OpLOONG64SRAVconst
1778 OpLOONG64ROTR
1779 OpLOONG64ROTRV
1780 OpLOONG64ROTRconst
1781 OpLOONG64ROTRVconst
1782 OpLOONG64SGT
1783 OpLOONG64SGTconst
1784 OpLOONG64SGTU
1785 OpLOONG64SGTUconst
1786 OpLOONG64CMPEQF
1787 OpLOONG64CMPEQD
1788 OpLOONG64CMPGEF
1789 OpLOONG64CMPGED
1790 OpLOONG64CMPGTF
1791 OpLOONG64CMPGTD
1792 OpLOONG64MOVVconst
1793 OpLOONG64MOVFconst
1794 OpLOONG64MOVDconst
1795 OpLOONG64MOVVaddr
1796 OpLOONG64MOVBload
1797 OpLOONG64MOVBUload
1798 OpLOONG64MOVHload
1799 OpLOONG64MOVHUload
1800 OpLOONG64MOVWload
1801 OpLOONG64MOVWUload
1802 OpLOONG64MOVVload
1803 OpLOONG64MOVFload
1804 OpLOONG64MOVDload
1805 OpLOONG64MOVBstore
1806 OpLOONG64MOVHstore
1807 OpLOONG64MOVWstore
1808 OpLOONG64MOVVstore
1809 OpLOONG64MOVFstore
1810 OpLOONG64MOVDstore
1811 OpLOONG64MOVBstorezero
1812 OpLOONG64MOVHstorezero
1813 OpLOONG64MOVWstorezero
1814 OpLOONG64MOVVstorezero
1815 OpLOONG64MOVBreg
1816 OpLOONG64MOVBUreg
1817 OpLOONG64MOVHreg
1818 OpLOONG64MOVHUreg
1819 OpLOONG64MOVWreg
1820 OpLOONG64MOVWUreg
1821 OpLOONG64MOVVreg
1822 OpLOONG64MOVVnop
1823 OpLOONG64MOVWF
1824 OpLOONG64MOVWD
1825 OpLOONG64MOVVF
1826 OpLOONG64MOVVD
1827 OpLOONG64TRUNCFW
1828 OpLOONG64TRUNCDW
1829 OpLOONG64TRUNCFV
1830 OpLOONG64TRUNCDV
1831 OpLOONG64MOVFD
1832 OpLOONG64MOVDF
1833 OpLOONG64CALLstatic
1834 OpLOONG64CALLtail
1835 OpLOONG64CALLclosure
1836 OpLOONG64CALLinter
1837 OpLOONG64DUFFZERO
1838 OpLOONG64DUFFCOPY
1839 OpLOONG64LoweredZero
1840 OpLOONG64LoweredMove
1841 OpLOONG64LoweredAtomicLoad8
1842 OpLOONG64LoweredAtomicLoad32
1843 OpLOONG64LoweredAtomicLoad64
1844 OpLOONG64LoweredAtomicStore8
1845 OpLOONG64LoweredAtomicStore32
1846 OpLOONG64LoweredAtomicStore64
1847 OpLOONG64LoweredAtomicStorezero32
1848 OpLOONG64LoweredAtomicStorezero64
1849 OpLOONG64LoweredAtomicExchange32
1850 OpLOONG64LoweredAtomicExchange64
1851 OpLOONG64LoweredAtomicAdd32
1852 OpLOONG64LoweredAtomicAdd64
1853 OpLOONG64LoweredAtomicAddconst32
1854 OpLOONG64LoweredAtomicAddconst64
1855 OpLOONG64LoweredAtomicCas32
1856 OpLOONG64LoweredAtomicCas64
1857 OpLOONG64LoweredNilCheck
1858 OpLOONG64FPFlagTrue
1859 OpLOONG64FPFlagFalse
1860 OpLOONG64LoweredGetClosurePtr
1861 OpLOONG64LoweredGetCallerSP
1862 OpLOONG64LoweredGetCallerPC
1863 OpLOONG64LoweredWB
1864 OpLOONG64LoweredPanicBoundsA
1865 OpLOONG64LoweredPanicBoundsB
1866 OpLOONG64LoweredPanicBoundsC
1867
1868 OpMIPSADD
1869 OpMIPSADDconst
1870 OpMIPSSUB
1871 OpMIPSSUBconst
1872 OpMIPSMUL
1873 OpMIPSMULT
1874 OpMIPSMULTU
1875 OpMIPSDIV
1876 OpMIPSDIVU
1877 OpMIPSADDF
1878 OpMIPSADDD
1879 OpMIPSSUBF
1880 OpMIPSSUBD
1881 OpMIPSMULF
1882 OpMIPSMULD
1883 OpMIPSDIVF
1884 OpMIPSDIVD
1885 OpMIPSAND
1886 OpMIPSANDconst
1887 OpMIPSOR
1888 OpMIPSORconst
1889 OpMIPSXOR
1890 OpMIPSXORconst
1891 OpMIPSNOR
1892 OpMIPSNORconst
1893 OpMIPSNEG
1894 OpMIPSNEGF
1895 OpMIPSNEGD
1896 OpMIPSABSD
1897 OpMIPSSQRTD
1898 OpMIPSSQRTF
1899 OpMIPSSLL
1900 OpMIPSSLLconst
1901 OpMIPSSRL
1902 OpMIPSSRLconst
1903 OpMIPSSRA
1904 OpMIPSSRAconst
1905 OpMIPSCLZ
1906 OpMIPSSGT
1907 OpMIPSSGTconst
1908 OpMIPSSGTzero
1909 OpMIPSSGTU
1910 OpMIPSSGTUconst
1911 OpMIPSSGTUzero
1912 OpMIPSCMPEQF
1913 OpMIPSCMPEQD
1914 OpMIPSCMPGEF
1915 OpMIPSCMPGED
1916 OpMIPSCMPGTF
1917 OpMIPSCMPGTD
1918 OpMIPSMOVWconst
1919 OpMIPSMOVFconst
1920 OpMIPSMOVDconst
1921 OpMIPSMOVWaddr
1922 OpMIPSMOVBload
1923 OpMIPSMOVBUload
1924 OpMIPSMOVHload
1925 OpMIPSMOVHUload
1926 OpMIPSMOVWload
1927 OpMIPSMOVFload
1928 OpMIPSMOVDload
1929 OpMIPSMOVBstore
1930 OpMIPSMOVHstore
1931 OpMIPSMOVWstore
1932 OpMIPSMOVFstore
1933 OpMIPSMOVDstore
1934 OpMIPSMOVBstorezero
1935 OpMIPSMOVHstorezero
1936 OpMIPSMOVWstorezero
1937 OpMIPSMOVWfpgp
1938 OpMIPSMOVWgpfp
1939 OpMIPSMOVBreg
1940 OpMIPSMOVBUreg
1941 OpMIPSMOVHreg
1942 OpMIPSMOVHUreg
1943 OpMIPSMOVWreg
1944 OpMIPSMOVWnop
1945 OpMIPSCMOVZ
1946 OpMIPSCMOVZzero
1947 OpMIPSMOVWF
1948 OpMIPSMOVWD
1949 OpMIPSTRUNCFW
1950 OpMIPSTRUNCDW
1951 OpMIPSMOVFD
1952 OpMIPSMOVDF
1953 OpMIPSCALLstatic
1954 OpMIPSCALLtail
1955 OpMIPSCALLclosure
1956 OpMIPSCALLinter
1957 OpMIPSLoweredAtomicLoad8
1958 OpMIPSLoweredAtomicLoad32
1959 OpMIPSLoweredAtomicStore8
1960 OpMIPSLoweredAtomicStore32
1961 OpMIPSLoweredAtomicStorezero
1962 OpMIPSLoweredAtomicExchange
1963 OpMIPSLoweredAtomicAdd
1964 OpMIPSLoweredAtomicAddconst
1965 OpMIPSLoweredAtomicCas
1966 OpMIPSLoweredAtomicAnd
1967 OpMIPSLoweredAtomicOr
1968 OpMIPSLoweredZero
1969 OpMIPSLoweredMove
1970 OpMIPSLoweredNilCheck
1971 OpMIPSFPFlagTrue
1972 OpMIPSFPFlagFalse
1973 OpMIPSLoweredGetClosurePtr
1974 OpMIPSLoweredGetCallerSP
1975 OpMIPSLoweredGetCallerPC
1976 OpMIPSLoweredWB
1977 OpMIPSLoweredPanicBoundsA
1978 OpMIPSLoweredPanicBoundsB
1979 OpMIPSLoweredPanicBoundsC
1980 OpMIPSLoweredPanicExtendA
1981 OpMIPSLoweredPanicExtendB
1982 OpMIPSLoweredPanicExtendC
1983
1984 OpMIPS64ADDV
1985 OpMIPS64ADDVconst
1986 OpMIPS64SUBV
1987 OpMIPS64SUBVconst
1988 OpMIPS64MULV
1989 OpMIPS64MULVU
1990 OpMIPS64DIVV
1991 OpMIPS64DIVVU
1992 OpMIPS64ADDF
1993 OpMIPS64ADDD
1994 OpMIPS64SUBF
1995 OpMIPS64SUBD
1996 OpMIPS64MULF
1997 OpMIPS64MULD
1998 OpMIPS64DIVF
1999 OpMIPS64DIVD
2000 OpMIPS64AND
2001 OpMIPS64ANDconst
2002 OpMIPS64OR
2003 OpMIPS64ORconst
2004 OpMIPS64XOR
2005 OpMIPS64XORconst
2006 OpMIPS64NOR
2007 OpMIPS64NORconst
2008 OpMIPS64NEGV
2009 OpMIPS64NEGF
2010 OpMIPS64NEGD
2011 OpMIPS64ABSD
2012 OpMIPS64SQRTD
2013 OpMIPS64SQRTF
2014 OpMIPS64SLLV
2015 OpMIPS64SLLVconst
2016 OpMIPS64SRLV
2017 OpMIPS64SRLVconst
2018 OpMIPS64SRAV
2019 OpMIPS64SRAVconst
2020 OpMIPS64SGT
2021 OpMIPS64SGTconst
2022 OpMIPS64SGTU
2023 OpMIPS64SGTUconst
2024 OpMIPS64CMPEQF
2025 OpMIPS64CMPEQD
2026 OpMIPS64CMPGEF
2027 OpMIPS64CMPGED
2028 OpMIPS64CMPGTF
2029 OpMIPS64CMPGTD
2030 OpMIPS64MOVVconst
2031 OpMIPS64MOVFconst
2032 OpMIPS64MOVDconst
2033 OpMIPS64MOVVaddr
2034 OpMIPS64MOVBload
2035 OpMIPS64MOVBUload
2036 OpMIPS64MOVHload
2037 OpMIPS64MOVHUload
2038 OpMIPS64MOVWload
2039 OpMIPS64MOVWUload
2040 OpMIPS64MOVVload
2041 OpMIPS64MOVFload
2042 OpMIPS64MOVDload
2043 OpMIPS64MOVBstore
2044 OpMIPS64MOVHstore
2045 OpMIPS64MOVWstore
2046 OpMIPS64MOVVstore
2047 OpMIPS64MOVFstore
2048 OpMIPS64MOVDstore
2049 OpMIPS64MOVBstorezero
2050 OpMIPS64MOVHstorezero
2051 OpMIPS64MOVWstorezero
2052 OpMIPS64MOVVstorezero
2053 OpMIPS64MOVWfpgp
2054 OpMIPS64MOVWgpfp
2055 OpMIPS64MOVVfpgp
2056 OpMIPS64MOVVgpfp
2057 OpMIPS64MOVBreg
2058 OpMIPS64MOVBUreg
2059 OpMIPS64MOVHreg
2060 OpMIPS64MOVHUreg
2061 OpMIPS64MOVWreg
2062 OpMIPS64MOVWUreg
2063 OpMIPS64MOVVreg
2064 OpMIPS64MOVVnop
2065 OpMIPS64MOVWF
2066 OpMIPS64MOVWD
2067 OpMIPS64MOVVF
2068 OpMIPS64MOVVD
2069 OpMIPS64TRUNCFW
2070 OpMIPS64TRUNCDW
2071 OpMIPS64TRUNCFV
2072 OpMIPS64TRUNCDV
2073 OpMIPS64MOVFD
2074 OpMIPS64MOVDF
2075 OpMIPS64CALLstatic
2076 OpMIPS64CALLtail
2077 OpMIPS64CALLclosure
2078 OpMIPS64CALLinter
2079 OpMIPS64DUFFZERO
2080 OpMIPS64DUFFCOPY
2081 OpMIPS64LoweredZero
2082 OpMIPS64LoweredMove
2083 OpMIPS64LoweredAtomicAnd32
2084 OpMIPS64LoweredAtomicOr32
2085 OpMIPS64LoweredAtomicLoad8
2086 OpMIPS64LoweredAtomicLoad32
2087 OpMIPS64LoweredAtomicLoad64
2088 OpMIPS64LoweredAtomicStore8
2089 OpMIPS64LoweredAtomicStore32
2090 OpMIPS64LoweredAtomicStore64
2091 OpMIPS64LoweredAtomicStorezero32
2092 OpMIPS64LoweredAtomicStorezero64
2093 OpMIPS64LoweredAtomicExchange32
2094 OpMIPS64LoweredAtomicExchange64
2095 OpMIPS64LoweredAtomicAdd32
2096 OpMIPS64LoweredAtomicAdd64
2097 OpMIPS64LoweredAtomicAddconst32
2098 OpMIPS64LoweredAtomicAddconst64
2099 OpMIPS64LoweredAtomicCas32
2100 OpMIPS64LoweredAtomicCas64
2101 OpMIPS64LoweredNilCheck
2102 OpMIPS64FPFlagTrue
2103 OpMIPS64FPFlagFalse
2104 OpMIPS64LoweredGetClosurePtr
2105 OpMIPS64LoweredGetCallerSP
2106 OpMIPS64LoweredGetCallerPC
2107 OpMIPS64LoweredWB
2108 OpMIPS64LoweredPanicBoundsA
2109 OpMIPS64LoweredPanicBoundsB
2110 OpMIPS64LoweredPanicBoundsC
2111
2112 OpPPC64ADD
2113 OpPPC64ADDCC
2114 OpPPC64ADDconst
2115 OpPPC64ADDCCconst
2116 OpPPC64FADD
2117 OpPPC64FADDS
2118 OpPPC64SUB
2119 OpPPC64SUBCC
2120 OpPPC64SUBFCconst
2121 OpPPC64FSUB
2122 OpPPC64FSUBS
2123 OpPPC64XSMINJDP
2124 OpPPC64XSMAXJDP
2125 OpPPC64MULLD
2126 OpPPC64MULLW
2127 OpPPC64MULLDconst
2128 OpPPC64MULLWconst
2129 OpPPC64MADDLD
2130 OpPPC64MULHD
2131 OpPPC64MULHW
2132 OpPPC64MULHDU
2133 OpPPC64MULHWU
2134 OpPPC64FMUL
2135 OpPPC64FMULS
2136 OpPPC64FMADD
2137 OpPPC64FMADDS
2138 OpPPC64FMSUB
2139 OpPPC64FMSUBS
2140 OpPPC64SRAD
2141 OpPPC64SRAW
2142 OpPPC64SRD
2143 OpPPC64SRW
2144 OpPPC64SLD
2145 OpPPC64SLW
2146 OpPPC64ROTL
2147 OpPPC64ROTLW
2148 OpPPC64CLRLSLWI
2149 OpPPC64CLRLSLDI
2150 OpPPC64ADDC
2151 OpPPC64SUBC
2152 OpPPC64ADDCconst
2153 OpPPC64SUBCconst
2154 OpPPC64ADDE
2155 OpPPC64ADDZE
2156 OpPPC64SUBE
2157 OpPPC64ADDZEzero
2158 OpPPC64SUBZEzero
2159 OpPPC64SRADconst
2160 OpPPC64SRAWconst
2161 OpPPC64SRDconst
2162 OpPPC64SRWconst
2163 OpPPC64SLDconst
2164 OpPPC64SLWconst
2165 OpPPC64ROTLconst
2166 OpPPC64ROTLWconst
2167 OpPPC64EXTSWSLconst
2168 OpPPC64RLWINM
2169 OpPPC64RLWNM
2170 OpPPC64RLWMI
2171 OpPPC64RLDICL
2172 OpPPC64RLDICLCC
2173 OpPPC64RLDICR
2174 OpPPC64CNTLZD
2175 OpPPC64CNTLZDCC
2176 OpPPC64CNTLZW
2177 OpPPC64CNTTZD
2178 OpPPC64CNTTZW
2179 OpPPC64POPCNTD
2180 OpPPC64POPCNTW
2181 OpPPC64POPCNTB
2182 OpPPC64FDIV
2183 OpPPC64FDIVS
2184 OpPPC64DIVD
2185 OpPPC64DIVW
2186 OpPPC64DIVDU
2187 OpPPC64DIVWU
2188 OpPPC64MODUD
2189 OpPPC64MODSD
2190 OpPPC64MODUW
2191 OpPPC64MODSW
2192 OpPPC64FCTIDZ
2193 OpPPC64FCTIWZ
2194 OpPPC64FCFID
2195 OpPPC64FCFIDS
2196 OpPPC64FRSP
2197 OpPPC64MFVSRD
2198 OpPPC64MTVSRD
2199 OpPPC64AND
2200 OpPPC64ANDN
2201 OpPPC64ANDNCC
2202 OpPPC64ANDCC
2203 OpPPC64OR
2204 OpPPC64ORN
2205 OpPPC64ORCC
2206 OpPPC64NOR
2207 OpPPC64NORCC
2208 OpPPC64XOR
2209 OpPPC64XORCC
2210 OpPPC64EQV
2211 OpPPC64NEG
2212 OpPPC64NEGCC
2213 OpPPC64BRD
2214 OpPPC64BRW
2215 OpPPC64BRH
2216 OpPPC64FNEG
2217 OpPPC64FSQRT
2218 OpPPC64FSQRTS
2219 OpPPC64FFLOOR
2220 OpPPC64FCEIL
2221 OpPPC64FTRUNC
2222 OpPPC64FROUND
2223 OpPPC64FABS
2224 OpPPC64FNABS
2225 OpPPC64FCPSGN
2226 OpPPC64ORconst
2227 OpPPC64XORconst
2228 OpPPC64ANDCCconst
2229 OpPPC64ANDconst
2230 OpPPC64MOVBreg
2231 OpPPC64MOVBZreg
2232 OpPPC64MOVHreg
2233 OpPPC64MOVHZreg
2234 OpPPC64MOVWreg
2235 OpPPC64MOVWZreg
2236 OpPPC64MOVBZload
2237 OpPPC64MOVHload
2238 OpPPC64MOVHZload
2239 OpPPC64MOVWload
2240 OpPPC64MOVWZload
2241 OpPPC64MOVDload
2242 OpPPC64MOVDBRload
2243 OpPPC64MOVWBRload
2244 OpPPC64MOVHBRload
2245 OpPPC64MOVBZloadidx
2246 OpPPC64MOVHloadidx
2247 OpPPC64MOVHZloadidx
2248 OpPPC64MOVWloadidx
2249 OpPPC64MOVWZloadidx
2250 OpPPC64MOVDloadidx
2251 OpPPC64MOVHBRloadidx
2252 OpPPC64MOVWBRloadidx
2253 OpPPC64MOVDBRloadidx
2254 OpPPC64FMOVDloadidx
2255 OpPPC64FMOVSloadidx
2256 OpPPC64DCBT
2257 OpPPC64MOVDBRstore
2258 OpPPC64MOVWBRstore
2259 OpPPC64MOVHBRstore
2260 OpPPC64FMOVDload
2261 OpPPC64FMOVSload
2262 OpPPC64MOVBstore
2263 OpPPC64MOVHstore
2264 OpPPC64MOVWstore
2265 OpPPC64MOVDstore
2266 OpPPC64FMOVDstore
2267 OpPPC64FMOVSstore
2268 OpPPC64MOVBstoreidx
2269 OpPPC64MOVHstoreidx
2270 OpPPC64MOVWstoreidx
2271 OpPPC64MOVDstoreidx
2272 OpPPC64FMOVDstoreidx
2273 OpPPC64FMOVSstoreidx
2274 OpPPC64MOVHBRstoreidx
2275 OpPPC64MOVWBRstoreidx
2276 OpPPC64MOVDBRstoreidx
2277 OpPPC64MOVBstorezero
2278 OpPPC64MOVHstorezero
2279 OpPPC64MOVWstorezero
2280 OpPPC64MOVDstorezero
2281 OpPPC64MOVDaddr
2282 OpPPC64MOVDconst
2283 OpPPC64FMOVDconst
2284 OpPPC64FMOVSconst
2285 OpPPC64FCMPU
2286 OpPPC64CMP
2287 OpPPC64CMPU
2288 OpPPC64CMPW
2289 OpPPC64CMPWU
2290 OpPPC64CMPconst
2291 OpPPC64CMPUconst
2292 OpPPC64CMPWconst
2293 OpPPC64CMPWUconst
2294 OpPPC64ISEL
2295 OpPPC64ISELZ
2296 OpPPC64SETBC
2297 OpPPC64SETBCR
2298 OpPPC64Equal
2299 OpPPC64NotEqual
2300 OpPPC64LessThan
2301 OpPPC64FLessThan
2302 OpPPC64LessEqual
2303 OpPPC64FLessEqual
2304 OpPPC64GreaterThan
2305 OpPPC64FGreaterThan
2306 OpPPC64GreaterEqual
2307 OpPPC64FGreaterEqual
2308 OpPPC64LoweredGetClosurePtr
2309 OpPPC64LoweredGetCallerSP
2310 OpPPC64LoweredGetCallerPC
2311 OpPPC64LoweredNilCheck
2312 OpPPC64LoweredRound32F
2313 OpPPC64LoweredRound64F
2314 OpPPC64CALLstatic
2315 OpPPC64CALLtail
2316 OpPPC64CALLclosure
2317 OpPPC64CALLinter
2318 OpPPC64LoweredZero
2319 OpPPC64LoweredZeroShort
2320 OpPPC64LoweredQuadZeroShort
2321 OpPPC64LoweredQuadZero
2322 OpPPC64LoweredMove
2323 OpPPC64LoweredMoveShort
2324 OpPPC64LoweredQuadMove
2325 OpPPC64LoweredQuadMoveShort
2326 OpPPC64LoweredAtomicStore8
2327 OpPPC64LoweredAtomicStore32
2328 OpPPC64LoweredAtomicStore64
2329 OpPPC64LoweredAtomicLoad8
2330 OpPPC64LoweredAtomicLoad32
2331 OpPPC64LoweredAtomicLoad64
2332 OpPPC64LoweredAtomicLoadPtr
2333 OpPPC64LoweredAtomicAdd32
2334 OpPPC64LoweredAtomicAdd64
2335 OpPPC64LoweredAtomicExchange32
2336 OpPPC64LoweredAtomicExchange64
2337 OpPPC64LoweredAtomicCas64
2338 OpPPC64LoweredAtomicCas32
2339 OpPPC64LoweredAtomicAnd8
2340 OpPPC64LoweredAtomicAnd32
2341 OpPPC64LoweredAtomicOr8
2342 OpPPC64LoweredAtomicOr32
2343 OpPPC64LoweredWB
2344 OpPPC64LoweredPubBarrier
2345 OpPPC64LoweredPanicBoundsA
2346 OpPPC64LoweredPanicBoundsB
2347 OpPPC64LoweredPanicBoundsC
2348 OpPPC64InvertFlags
2349 OpPPC64FlagEQ
2350 OpPPC64FlagLT
2351 OpPPC64FlagGT
2352
2353 OpRISCV64ADD
2354 OpRISCV64ADDI
2355 OpRISCV64ADDIW
2356 OpRISCV64NEG
2357 OpRISCV64NEGW
2358 OpRISCV64SUB
2359 OpRISCV64SUBW
2360 OpRISCV64MUL
2361 OpRISCV64MULW
2362 OpRISCV64MULH
2363 OpRISCV64MULHU
2364 OpRISCV64LoweredMuluhilo
2365 OpRISCV64LoweredMuluover
2366 OpRISCV64DIV
2367 OpRISCV64DIVU
2368 OpRISCV64DIVW
2369 OpRISCV64DIVUW
2370 OpRISCV64REM
2371 OpRISCV64REMU
2372 OpRISCV64REMW
2373 OpRISCV64REMUW
2374 OpRISCV64MOVaddr
2375 OpRISCV64MOVDconst
2376 OpRISCV64MOVBload
2377 OpRISCV64MOVHload
2378 OpRISCV64MOVWload
2379 OpRISCV64MOVDload
2380 OpRISCV64MOVBUload
2381 OpRISCV64MOVHUload
2382 OpRISCV64MOVWUload
2383 OpRISCV64MOVBstore
2384 OpRISCV64MOVHstore
2385 OpRISCV64MOVWstore
2386 OpRISCV64MOVDstore
2387 OpRISCV64MOVBstorezero
2388 OpRISCV64MOVHstorezero
2389 OpRISCV64MOVWstorezero
2390 OpRISCV64MOVDstorezero
2391 OpRISCV64MOVBreg
2392 OpRISCV64MOVHreg
2393 OpRISCV64MOVWreg
2394 OpRISCV64MOVDreg
2395 OpRISCV64MOVBUreg
2396 OpRISCV64MOVHUreg
2397 OpRISCV64MOVWUreg
2398 OpRISCV64MOVDnop
2399 OpRISCV64SLL
2400 OpRISCV64SLLW
2401 OpRISCV64SRA
2402 OpRISCV64SRAW
2403 OpRISCV64SRL
2404 OpRISCV64SRLW
2405 OpRISCV64SLLI
2406 OpRISCV64SLLIW
2407 OpRISCV64SRAI
2408 OpRISCV64SRAIW
2409 OpRISCV64SRLI
2410 OpRISCV64SRLIW
2411 OpRISCV64AND
2412 OpRISCV64ANDI
2413 OpRISCV64NOT
2414 OpRISCV64OR
2415 OpRISCV64ORI
2416 OpRISCV64ROL
2417 OpRISCV64ROLW
2418 OpRISCV64ROR
2419 OpRISCV64RORI
2420 OpRISCV64RORIW
2421 OpRISCV64RORW
2422 OpRISCV64XOR
2423 OpRISCV64XORI
2424 OpRISCV64SEQZ
2425 OpRISCV64SNEZ
2426 OpRISCV64SLT
2427 OpRISCV64SLTI
2428 OpRISCV64SLTU
2429 OpRISCV64SLTIU
2430 OpRISCV64LoweredRound32F
2431 OpRISCV64LoweredRound64F
2432 OpRISCV64CALLstatic
2433 OpRISCV64CALLtail
2434 OpRISCV64CALLclosure
2435 OpRISCV64CALLinter
2436 OpRISCV64DUFFZERO
2437 OpRISCV64DUFFCOPY
2438 OpRISCV64LoweredZero
2439 OpRISCV64LoweredMove
2440 OpRISCV64LoweredAtomicLoad8
2441 OpRISCV64LoweredAtomicLoad32
2442 OpRISCV64LoweredAtomicLoad64
2443 OpRISCV64LoweredAtomicStore8
2444 OpRISCV64LoweredAtomicStore32
2445 OpRISCV64LoweredAtomicStore64
2446 OpRISCV64LoweredAtomicExchange32
2447 OpRISCV64LoweredAtomicExchange64
2448 OpRISCV64LoweredAtomicAdd32
2449 OpRISCV64LoweredAtomicAdd64
2450 OpRISCV64LoweredAtomicCas32
2451 OpRISCV64LoweredAtomicCas64
2452 OpRISCV64LoweredAtomicAnd32
2453 OpRISCV64LoweredAtomicOr32
2454 OpRISCV64LoweredNilCheck
2455 OpRISCV64LoweredGetClosurePtr
2456 OpRISCV64LoweredGetCallerSP
2457 OpRISCV64LoweredGetCallerPC
2458 OpRISCV64LoweredWB
2459 OpRISCV64LoweredPubBarrier
2460 OpRISCV64LoweredPanicBoundsA
2461 OpRISCV64LoweredPanicBoundsB
2462 OpRISCV64LoweredPanicBoundsC
2463 OpRISCV64FADDS
2464 OpRISCV64FSUBS
2465 OpRISCV64FMULS
2466 OpRISCV64FDIVS
2467 OpRISCV64FMADDS
2468 OpRISCV64FMSUBS
2469 OpRISCV64FNMADDS
2470 OpRISCV64FNMSUBS
2471 OpRISCV64FSQRTS
2472 OpRISCV64FNEGS
2473 OpRISCV64FMVSX
2474 OpRISCV64FCVTSW
2475 OpRISCV64FCVTSL
2476 OpRISCV64FCVTWS
2477 OpRISCV64FCVTLS
2478 OpRISCV64FMOVWload
2479 OpRISCV64FMOVWstore
2480 OpRISCV64FEQS
2481 OpRISCV64FNES
2482 OpRISCV64FLTS
2483 OpRISCV64FLES
2484 OpRISCV64LoweredFMAXS
2485 OpRISCV64LoweredFMINS
2486 OpRISCV64FADDD
2487 OpRISCV64FSUBD
2488 OpRISCV64FMULD
2489 OpRISCV64FDIVD
2490 OpRISCV64FMADDD
2491 OpRISCV64FMSUBD
2492 OpRISCV64FNMADDD
2493 OpRISCV64FNMSUBD
2494 OpRISCV64FSQRTD
2495 OpRISCV64FNEGD
2496 OpRISCV64FABSD
2497 OpRISCV64FSGNJD
2498 OpRISCV64FMVDX
2499 OpRISCV64FCVTDW
2500 OpRISCV64FCVTDL
2501 OpRISCV64FCVTWD
2502 OpRISCV64FCVTLD
2503 OpRISCV64FCVTDS
2504 OpRISCV64FCVTSD
2505 OpRISCV64FMOVDload
2506 OpRISCV64FMOVDstore
2507 OpRISCV64FEQD
2508 OpRISCV64FNED
2509 OpRISCV64FLTD
2510 OpRISCV64FLED
2511 OpRISCV64LoweredFMIND
2512 OpRISCV64LoweredFMAXD
2513
2514 OpS390XFADDS
2515 OpS390XFADD
2516 OpS390XFSUBS
2517 OpS390XFSUB
2518 OpS390XFMULS
2519 OpS390XFMUL
2520 OpS390XFDIVS
2521 OpS390XFDIV
2522 OpS390XFNEGS
2523 OpS390XFNEG
2524 OpS390XFMADDS
2525 OpS390XFMADD
2526 OpS390XFMSUBS
2527 OpS390XFMSUB
2528 OpS390XLPDFR
2529 OpS390XLNDFR
2530 OpS390XCPSDR
2531 OpS390XFIDBR
2532 OpS390XFMOVSload
2533 OpS390XFMOVDload
2534 OpS390XFMOVSconst
2535 OpS390XFMOVDconst
2536 OpS390XFMOVSloadidx
2537 OpS390XFMOVDloadidx
2538 OpS390XFMOVSstore
2539 OpS390XFMOVDstore
2540 OpS390XFMOVSstoreidx
2541 OpS390XFMOVDstoreidx
2542 OpS390XADD
2543 OpS390XADDW
2544 OpS390XADDconst
2545 OpS390XADDWconst
2546 OpS390XADDload
2547 OpS390XADDWload
2548 OpS390XSUB
2549 OpS390XSUBW
2550 OpS390XSUBconst
2551 OpS390XSUBWconst
2552 OpS390XSUBload
2553 OpS390XSUBWload
2554 OpS390XMULLD
2555 OpS390XMULLW
2556 OpS390XMULLDconst
2557 OpS390XMULLWconst
2558 OpS390XMULLDload
2559 OpS390XMULLWload
2560 OpS390XMULHD
2561 OpS390XMULHDU
2562 OpS390XDIVD
2563 OpS390XDIVW
2564 OpS390XDIVDU
2565 OpS390XDIVWU
2566 OpS390XMODD
2567 OpS390XMODW
2568 OpS390XMODDU
2569 OpS390XMODWU
2570 OpS390XAND
2571 OpS390XANDW
2572 OpS390XANDconst
2573 OpS390XANDWconst
2574 OpS390XANDload
2575 OpS390XANDWload
2576 OpS390XOR
2577 OpS390XORW
2578 OpS390XORconst
2579 OpS390XORWconst
2580 OpS390XORload
2581 OpS390XORWload
2582 OpS390XXOR
2583 OpS390XXORW
2584 OpS390XXORconst
2585 OpS390XXORWconst
2586 OpS390XXORload
2587 OpS390XXORWload
2588 OpS390XADDC
2589 OpS390XADDCconst
2590 OpS390XADDE
2591 OpS390XSUBC
2592 OpS390XSUBE
2593 OpS390XCMP
2594 OpS390XCMPW
2595 OpS390XCMPU
2596 OpS390XCMPWU
2597 OpS390XCMPconst
2598 OpS390XCMPWconst
2599 OpS390XCMPUconst
2600 OpS390XCMPWUconst
2601 OpS390XFCMPS
2602 OpS390XFCMP
2603 OpS390XLTDBR
2604 OpS390XLTEBR
2605 OpS390XSLD
2606 OpS390XSLW
2607 OpS390XSLDconst
2608 OpS390XSLWconst
2609 OpS390XSRD
2610 OpS390XSRW
2611 OpS390XSRDconst
2612 OpS390XSRWconst
2613 OpS390XSRAD
2614 OpS390XSRAW
2615 OpS390XSRADconst
2616 OpS390XSRAWconst
2617 OpS390XRLLG
2618 OpS390XRLL
2619 OpS390XRLLconst
2620 OpS390XRXSBG
2621 OpS390XRISBGZ
2622 OpS390XNEG
2623 OpS390XNEGW
2624 OpS390XNOT
2625 OpS390XNOTW
2626 OpS390XFSQRT
2627 OpS390XFSQRTS
2628 OpS390XLOCGR
2629 OpS390XMOVBreg
2630 OpS390XMOVBZreg
2631 OpS390XMOVHreg
2632 OpS390XMOVHZreg
2633 OpS390XMOVWreg
2634 OpS390XMOVWZreg
2635 OpS390XMOVDconst
2636 OpS390XLDGR
2637 OpS390XLGDR
2638 OpS390XCFDBRA
2639 OpS390XCGDBRA
2640 OpS390XCFEBRA
2641 OpS390XCGEBRA
2642 OpS390XCEFBRA
2643 OpS390XCDFBRA
2644 OpS390XCEGBRA
2645 OpS390XCDGBRA
2646 OpS390XCLFEBR
2647 OpS390XCLFDBR
2648 OpS390XCLGEBR
2649 OpS390XCLGDBR
2650 OpS390XCELFBR
2651 OpS390XCDLFBR
2652 OpS390XCELGBR
2653 OpS390XCDLGBR
2654 OpS390XLEDBR
2655 OpS390XLDEBR
2656 OpS390XMOVDaddr
2657 OpS390XMOVDaddridx
2658 OpS390XMOVBZload
2659 OpS390XMOVBload
2660 OpS390XMOVHZload
2661 OpS390XMOVHload
2662 OpS390XMOVWZload
2663 OpS390XMOVWload
2664 OpS390XMOVDload
2665 OpS390XMOVWBR
2666 OpS390XMOVDBR
2667 OpS390XMOVHBRload
2668 OpS390XMOVWBRload
2669 OpS390XMOVDBRload
2670 OpS390XMOVBstore
2671 OpS390XMOVHstore
2672 OpS390XMOVWstore
2673 OpS390XMOVDstore
2674 OpS390XMOVHBRstore
2675 OpS390XMOVWBRstore
2676 OpS390XMOVDBRstore
2677 OpS390XMVC
2678 OpS390XMOVBZloadidx
2679 OpS390XMOVBloadidx
2680 OpS390XMOVHZloadidx
2681 OpS390XMOVHloadidx
2682 OpS390XMOVWZloadidx
2683 OpS390XMOVWloadidx
2684 OpS390XMOVDloadidx
2685 OpS390XMOVHBRloadidx
2686 OpS390XMOVWBRloadidx
2687 OpS390XMOVDBRloadidx
2688 OpS390XMOVBstoreidx
2689 OpS390XMOVHstoreidx
2690 OpS390XMOVWstoreidx
2691 OpS390XMOVDstoreidx
2692 OpS390XMOVHBRstoreidx
2693 OpS390XMOVWBRstoreidx
2694 OpS390XMOVDBRstoreidx
2695 OpS390XMOVBstoreconst
2696 OpS390XMOVHstoreconst
2697 OpS390XMOVWstoreconst
2698 OpS390XMOVDstoreconst
2699 OpS390XCLEAR
2700 OpS390XCALLstatic
2701 OpS390XCALLtail
2702 OpS390XCALLclosure
2703 OpS390XCALLinter
2704 OpS390XInvertFlags
2705 OpS390XLoweredGetG
2706 OpS390XLoweredGetClosurePtr
2707 OpS390XLoweredGetCallerSP
2708 OpS390XLoweredGetCallerPC
2709 OpS390XLoweredNilCheck
2710 OpS390XLoweredRound32F
2711 OpS390XLoweredRound64F
2712 OpS390XLoweredWB
2713 OpS390XLoweredPanicBoundsA
2714 OpS390XLoweredPanicBoundsB
2715 OpS390XLoweredPanicBoundsC
2716 OpS390XFlagEQ
2717 OpS390XFlagLT
2718 OpS390XFlagGT
2719 OpS390XFlagOV
2720 OpS390XSYNC
2721 OpS390XMOVBZatomicload
2722 OpS390XMOVWZatomicload
2723 OpS390XMOVDatomicload
2724 OpS390XMOVBatomicstore
2725 OpS390XMOVWatomicstore
2726 OpS390XMOVDatomicstore
2727 OpS390XLAA
2728 OpS390XLAAG
2729 OpS390XAddTupleFirst32
2730 OpS390XAddTupleFirst64
2731 OpS390XLAN
2732 OpS390XLANfloor
2733 OpS390XLAO
2734 OpS390XLAOfloor
2735 OpS390XLoweredAtomicCas32
2736 OpS390XLoweredAtomicCas64
2737 OpS390XLoweredAtomicExchange32
2738 OpS390XLoweredAtomicExchange64
2739 OpS390XFLOGR
2740 OpS390XPOPCNT
2741 OpS390XMLGR
2742 OpS390XSumBytes2
2743 OpS390XSumBytes4
2744 OpS390XSumBytes8
2745 OpS390XSTMG2
2746 OpS390XSTMG3
2747 OpS390XSTMG4
2748 OpS390XSTM2
2749 OpS390XSTM3
2750 OpS390XSTM4
2751 OpS390XLoweredMove
2752 OpS390XLoweredZero
2753
2754 OpWasmLoweredStaticCall
2755 OpWasmLoweredTailCall
2756 OpWasmLoweredClosureCall
2757 OpWasmLoweredInterCall
2758 OpWasmLoweredAddr
2759 OpWasmLoweredMove
2760 OpWasmLoweredZero
2761 OpWasmLoweredGetClosurePtr
2762 OpWasmLoweredGetCallerPC
2763 OpWasmLoweredGetCallerSP
2764 OpWasmLoweredNilCheck
2765 OpWasmLoweredWB
2766 OpWasmLoweredConvert
2767 OpWasmSelect
2768 OpWasmI64Load8U
2769 OpWasmI64Load8S
2770 OpWasmI64Load16U
2771 OpWasmI64Load16S
2772 OpWasmI64Load32U
2773 OpWasmI64Load32S
2774 OpWasmI64Load
2775 OpWasmI64Store8
2776 OpWasmI64Store16
2777 OpWasmI64Store32
2778 OpWasmI64Store
2779 OpWasmF32Load
2780 OpWasmF64Load
2781 OpWasmF32Store
2782 OpWasmF64Store
2783 OpWasmI64Const
2784 OpWasmF32Const
2785 OpWasmF64Const
2786 OpWasmI64Eqz
2787 OpWasmI64Eq
2788 OpWasmI64Ne
2789 OpWasmI64LtS
2790 OpWasmI64LtU
2791 OpWasmI64GtS
2792 OpWasmI64GtU
2793 OpWasmI64LeS
2794 OpWasmI64LeU
2795 OpWasmI64GeS
2796 OpWasmI64GeU
2797 OpWasmF32Eq
2798 OpWasmF32Ne
2799 OpWasmF32Lt
2800 OpWasmF32Gt
2801 OpWasmF32Le
2802 OpWasmF32Ge
2803 OpWasmF64Eq
2804 OpWasmF64Ne
2805 OpWasmF64Lt
2806 OpWasmF64Gt
2807 OpWasmF64Le
2808 OpWasmF64Ge
2809 OpWasmI64Add
2810 OpWasmI64AddConst
2811 OpWasmI64Sub
2812 OpWasmI64Mul
2813 OpWasmI64DivS
2814 OpWasmI64DivU
2815 OpWasmI64RemS
2816 OpWasmI64RemU
2817 OpWasmI64And
2818 OpWasmI64Or
2819 OpWasmI64Xor
2820 OpWasmI64Shl
2821 OpWasmI64ShrS
2822 OpWasmI64ShrU
2823 OpWasmF32Neg
2824 OpWasmF32Add
2825 OpWasmF32Sub
2826 OpWasmF32Mul
2827 OpWasmF32Div
2828 OpWasmF64Neg
2829 OpWasmF64Add
2830 OpWasmF64Sub
2831 OpWasmF64Mul
2832 OpWasmF64Div
2833 OpWasmI64TruncSatF64S
2834 OpWasmI64TruncSatF64U
2835 OpWasmI64TruncSatF32S
2836 OpWasmI64TruncSatF32U
2837 OpWasmF32ConvertI64S
2838 OpWasmF32ConvertI64U
2839 OpWasmF64ConvertI64S
2840 OpWasmF64ConvertI64U
2841 OpWasmF32DemoteF64
2842 OpWasmF64PromoteF32
2843 OpWasmI64Extend8S
2844 OpWasmI64Extend16S
2845 OpWasmI64Extend32S
2846 OpWasmF32Sqrt
2847 OpWasmF32Trunc
2848 OpWasmF32Ceil
2849 OpWasmF32Floor
2850 OpWasmF32Nearest
2851 OpWasmF32Abs
2852 OpWasmF32Copysign
2853 OpWasmF64Sqrt
2854 OpWasmF64Trunc
2855 OpWasmF64Ceil
2856 OpWasmF64Floor
2857 OpWasmF64Nearest
2858 OpWasmF64Abs
2859 OpWasmF64Copysign
2860 OpWasmI64Ctz
2861 OpWasmI64Clz
2862 OpWasmI32Rotl
2863 OpWasmI64Rotl
2864 OpWasmI64Popcnt
2865
2866 OpAdd8
2867 OpAdd16
2868 OpAdd32
2869 OpAdd64
2870 OpAddPtr
2871 OpAdd32F
2872 OpAdd64F
2873 OpSub8
2874 OpSub16
2875 OpSub32
2876 OpSub64
2877 OpSubPtr
2878 OpSub32F
2879 OpSub64F
2880 OpMul8
2881 OpMul16
2882 OpMul32
2883 OpMul64
2884 OpMul32F
2885 OpMul64F
2886 OpDiv32F
2887 OpDiv64F
2888 OpHmul32
2889 OpHmul32u
2890 OpHmul64
2891 OpHmul64u
2892 OpMul32uhilo
2893 OpMul64uhilo
2894 OpMul32uover
2895 OpMul64uover
2896 OpAvg32u
2897 OpAvg64u
2898 OpDiv8
2899 OpDiv8u
2900 OpDiv16
2901 OpDiv16u
2902 OpDiv32
2903 OpDiv32u
2904 OpDiv64
2905 OpDiv64u
2906 OpDiv128u
2907 OpMod8
2908 OpMod8u
2909 OpMod16
2910 OpMod16u
2911 OpMod32
2912 OpMod32u
2913 OpMod64
2914 OpMod64u
2915 OpAnd8
2916 OpAnd16
2917 OpAnd32
2918 OpAnd64
2919 OpOr8
2920 OpOr16
2921 OpOr32
2922 OpOr64
2923 OpXor8
2924 OpXor16
2925 OpXor32
2926 OpXor64
2927 OpLsh8x8
2928 OpLsh8x16
2929 OpLsh8x32
2930 OpLsh8x64
2931 OpLsh16x8
2932 OpLsh16x16
2933 OpLsh16x32
2934 OpLsh16x64
2935 OpLsh32x8
2936 OpLsh32x16
2937 OpLsh32x32
2938 OpLsh32x64
2939 OpLsh64x8
2940 OpLsh64x16
2941 OpLsh64x32
2942 OpLsh64x64
2943 OpRsh8x8
2944 OpRsh8x16
2945 OpRsh8x32
2946 OpRsh8x64
2947 OpRsh16x8
2948 OpRsh16x16
2949 OpRsh16x32
2950 OpRsh16x64
2951 OpRsh32x8
2952 OpRsh32x16
2953 OpRsh32x32
2954 OpRsh32x64
2955 OpRsh64x8
2956 OpRsh64x16
2957 OpRsh64x32
2958 OpRsh64x64
2959 OpRsh8Ux8
2960 OpRsh8Ux16
2961 OpRsh8Ux32
2962 OpRsh8Ux64
2963 OpRsh16Ux8
2964 OpRsh16Ux16
2965 OpRsh16Ux32
2966 OpRsh16Ux64
2967 OpRsh32Ux8
2968 OpRsh32Ux16
2969 OpRsh32Ux32
2970 OpRsh32Ux64
2971 OpRsh64Ux8
2972 OpRsh64Ux16
2973 OpRsh64Ux32
2974 OpRsh64Ux64
2975 OpEq8
2976 OpEq16
2977 OpEq32
2978 OpEq64
2979 OpEqPtr
2980 OpEqInter
2981 OpEqSlice
2982 OpEq32F
2983 OpEq64F
2984 OpNeq8
2985 OpNeq16
2986 OpNeq32
2987 OpNeq64
2988 OpNeqPtr
2989 OpNeqInter
2990 OpNeqSlice
2991 OpNeq32F
2992 OpNeq64F
2993 OpLess8
2994 OpLess8U
2995 OpLess16
2996 OpLess16U
2997 OpLess32
2998 OpLess32U
2999 OpLess64
3000 OpLess64U
3001 OpLess32F
3002 OpLess64F
3003 OpLeq8
3004 OpLeq8U
3005 OpLeq16
3006 OpLeq16U
3007 OpLeq32
3008 OpLeq32U
3009 OpLeq64
3010 OpLeq64U
3011 OpLeq32F
3012 OpLeq64F
3013 OpCondSelect
3014 OpAndB
3015 OpOrB
3016 OpEqB
3017 OpNeqB
3018 OpNot
3019 OpNeg8
3020 OpNeg16
3021 OpNeg32
3022 OpNeg64
3023 OpNeg32F
3024 OpNeg64F
3025 OpCom8
3026 OpCom16
3027 OpCom32
3028 OpCom64
3029 OpCtz8
3030 OpCtz16
3031 OpCtz32
3032 OpCtz64
3033 OpCtz8NonZero
3034 OpCtz16NonZero
3035 OpCtz32NonZero
3036 OpCtz64NonZero
3037 OpBitLen8
3038 OpBitLen16
3039 OpBitLen32
3040 OpBitLen64
3041 OpBswap16
3042 OpBswap32
3043 OpBswap64
3044 OpBitRev8
3045 OpBitRev16
3046 OpBitRev32
3047 OpBitRev64
3048 OpPopCount8
3049 OpPopCount16
3050 OpPopCount32
3051 OpPopCount64
3052 OpRotateLeft64
3053 OpRotateLeft32
3054 OpRotateLeft16
3055 OpRotateLeft8
3056 OpSqrt
3057 OpSqrt32
3058 OpFloor
3059 OpCeil
3060 OpTrunc
3061 OpRound
3062 OpRoundToEven
3063 OpAbs
3064 OpCopysign
3065 OpMin64F
3066 OpMin32F
3067 OpMax64F
3068 OpMax32F
3069 OpFMA
3070 OpPhi
3071 OpCopy
3072 OpConvert
3073 OpConstBool
3074 OpConstString
3075 OpConstNil
3076 OpConst8
3077 OpConst16
3078 OpConst32
3079 OpConst64
3080 OpConst32F
3081 OpConst64F
3082 OpConstInterface
3083 OpConstSlice
3084 OpInitMem
3085 OpArg
3086 OpArgIntReg
3087 OpArgFloatReg
3088 OpAddr
3089 OpLocalAddr
3090 OpSP
3091 OpSB
3092 OpSPanchored
3093 OpLoad
3094 OpDereference
3095 OpStore
3096 OpMove
3097 OpZero
3098 OpStoreWB
3099 OpMoveWB
3100 OpZeroWB
3101 OpWBend
3102 OpWB
3103 OpHasCPUFeature
3104 OpPanicBounds
3105 OpPanicExtend
3106 OpClosureCall
3107 OpStaticCall
3108 OpInterCall
3109 OpTailCall
3110 OpClosureLECall
3111 OpStaticLECall
3112 OpInterLECall
3113 OpTailLECall
3114 OpSignExt8to16
3115 OpSignExt8to32
3116 OpSignExt8to64
3117 OpSignExt16to32
3118 OpSignExt16to64
3119 OpSignExt32to64
3120 OpZeroExt8to16
3121 OpZeroExt8to32
3122 OpZeroExt8to64
3123 OpZeroExt16to32
3124 OpZeroExt16to64
3125 OpZeroExt32to64
3126 OpTrunc16to8
3127 OpTrunc32to8
3128 OpTrunc32to16
3129 OpTrunc64to8
3130 OpTrunc64to16
3131 OpTrunc64to32
3132 OpCvt32to32F
3133 OpCvt32to64F
3134 OpCvt64to32F
3135 OpCvt64to64F
3136 OpCvt32Fto32
3137 OpCvt32Fto64
3138 OpCvt64Fto32
3139 OpCvt64Fto64
3140 OpCvt32Fto64F
3141 OpCvt64Fto32F
3142 OpCvtBoolToUint8
3143 OpRound32F
3144 OpRound64F
3145 OpIsNonNil
3146 OpIsInBounds
3147 OpIsSliceInBounds
3148 OpNilCheck
3149 OpGetG
3150 OpGetClosurePtr
3151 OpGetCallerPC
3152 OpGetCallerSP
3153 OpPtrIndex
3154 OpOffPtr
3155 OpSliceMake
3156 OpSlicePtr
3157 OpSliceLen
3158 OpSliceCap
3159 OpSlicePtrUnchecked
3160 OpComplexMake
3161 OpComplexReal
3162 OpComplexImag
3163 OpStringMake
3164 OpStringPtr
3165 OpStringLen
3166 OpIMake
3167 OpITab
3168 OpIData
3169 OpStructMake0
3170 OpStructMake1
3171 OpStructMake2
3172 OpStructMake3
3173 OpStructMake4
3174 OpStructSelect
3175 OpArrayMake0
3176 OpArrayMake1
3177 OpArraySelect
3178 OpStoreReg
3179 OpLoadReg
3180 OpFwdRef
3181 OpUnknown
3182 OpVarDef
3183 OpVarLive
3184 OpKeepAlive
3185 OpInlMark
3186 OpInt64Make
3187 OpInt64Hi
3188 OpInt64Lo
3189 OpAdd32carry
3190 OpAdd32withcarry
3191 OpSub32carry
3192 OpSub32withcarry
3193 OpAdd64carry
3194 OpSub64borrow
3195 OpSignmask
3196 OpZeromask
3197 OpSlicemask
3198 OpSpectreIndex
3199 OpSpectreSliceIndex
3200 OpCvt32Uto32F
3201 OpCvt32Uto64F
3202 OpCvt32Fto32U
3203 OpCvt64Fto32U
3204 OpCvt64Uto32F
3205 OpCvt64Uto64F
3206 OpCvt32Fto64U
3207 OpCvt64Fto64U
3208 OpSelect0
3209 OpSelect1
3210 OpSelectN
3211 OpSelectNAddr
3212 OpMakeResult
3213 OpAtomicLoad8
3214 OpAtomicLoad32
3215 OpAtomicLoad64
3216 OpAtomicLoadPtr
3217 OpAtomicLoadAcq32
3218 OpAtomicLoadAcq64
3219 OpAtomicStore8
3220 OpAtomicStore32
3221 OpAtomicStore64
3222 OpAtomicStorePtrNoWB
3223 OpAtomicStoreRel32
3224 OpAtomicStoreRel64
3225 OpAtomicExchange32
3226 OpAtomicExchange64
3227 OpAtomicAdd32
3228 OpAtomicAdd64
3229 OpAtomicCompareAndSwap32
3230 OpAtomicCompareAndSwap64
3231 OpAtomicCompareAndSwapRel32
3232 OpAtomicAnd8
3233 OpAtomicOr8
3234 OpAtomicAnd64
3235 OpAtomicAnd32
3236 OpAtomicOr64
3237 OpAtomicOr32
3238 OpAtomicAdd32Variant
3239 OpAtomicAdd64Variant
3240 OpAtomicExchange32Variant
3241 OpAtomicExchange64Variant
3242 OpAtomicCompareAndSwap32Variant
3243 OpAtomicCompareAndSwap64Variant
3244 OpAtomicAnd8Variant
3245 OpAtomicOr8Variant
3246 OpAtomicAnd64Variant
3247 OpAtomicOr64Variant
3248 OpAtomicAnd32Variant
3249 OpAtomicOr32Variant
3250 OpPubBarrier
3251 OpClobber
3252 OpClobberReg
3253 OpPrefetchCache
3254 OpPrefetchCacheStreamed
3255 )
3256
3257 var opcodeTable = [...]opInfo{
3258 {name: "OpInvalid"},
3259
3260 {
3261 name: "ADDSS",
3262 argLen: 2,
3263 commutative: true,
3264 resultInArg0: true,
3265 asm: x86.AADDSS,
3266 reg: regInfo{
3267 inputs: []inputInfo{
3268 {0, 65280},
3269 {1, 65280},
3270 },
3271 outputs: []outputInfo{
3272 {0, 65280},
3273 },
3274 },
3275 },
3276 {
3277 name: "ADDSD",
3278 argLen: 2,
3279 commutative: true,
3280 resultInArg0: true,
3281 asm: x86.AADDSD,
3282 reg: regInfo{
3283 inputs: []inputInfo{
3284 {0, 65280},
3285 {1, 65280},
3286 },
3287 outputs: []outputInfo{
3288 {0, 65280},
3289 },
3290 },
3291 },
3292 {
3293 name: "SUBSS",
3294 argLen: 2,
3295 resultInArg0: true,
3296 asm: x86.ASUBSS,
3297 reg: regInfo{
3298 inputs: []inputInfo{
3299 {0, 65280},
3300 {1, 65280},
3301 },
3302 outputs: []outputInfo{
3303 {0, 65280},
3304 },
3305 },
3306 },
3307 {
3308 name: "SUBSD",
3309 argLen: 2,
3310 resultInArg0: true,
3311 asm: x86.ASUBSD,
3312 reg: regInfo{
3313 inputs: []inputInfo{
3314 {0, 65280},
3315 {1, 65280},
3316 },
3317 outputs: []outputInfo{
3318 {0, 65280},
3319 },
3320 },
3321 },
3322 {
3323 name: "MULSS",
3324 argLen: 2,
3325 commutative: true,
3326 resultInArg0: true,
3327 asm: x86.AMULSS,
3328 reg: regInfo{
3329 inputs: []inputInfo{
3330 {0, 65280},
3331 {1, 65280},
3332 },
3333 outputs: []outputInfo{
3334 {0, 65280},
3335 },
3336 },
3337 },
3338 {
3339 name: "MULSD",
3340 argLen: 2,
3341 commutative: true,
3342 resultInArg0: true,
3343 asm: x86.AMULSD,
3344 reg: regInfo{
3345 inputs: []inputInfo{
3346 {0, 65280},
3347 {1, 65280},
3348 },
3349 outputs: []outputInfo{
3350 {0, 65280},
3351 },
3352 },
3353 },
3354 {
3355 name: "DIVSS",
3356 argLen: 2,
3357 resultInArg0: true,
3358 asm: x86.ADIVSS,
3359 reg: regInfo{
3360 inputs: []inputInfo{
3361 {0, 65280},
3362 {1, 65280},
3363 },
3364 outputs: []outputInfo{
3365 {0, 65280},
3366 },
3367 },
3368 },
3369 {
3370 name: "DIVSD",
3371 argLen: 2,
3372 resultInArg0: true,
3373 asm: x86.ADIVSD,
3374 reg: regInfo{
3375 inputs: []inputInfo{
3376 {0, 65280},
3377 {1, 65280},
3378 },
3379 outputs: []outputInfo{
3380 {0, 65280},
3381 },
3382 },
3383 },
3384 {
3385 name: "MOVSSload",
3386 auxType: auxSymOff,
3387 argLen: 2,
3388 faultOnNilArg0: true,
3389 symEffect: SymRead,
3390 asm: x86.AMOVSS,
3391 reg: regInfo{
3392 inputs: []inputInfo{
3393 {0, 65791},
3394 },
3395 outputs: []outputInfo{
3396 {0, 65280},
3397 },
3398 },
3399 },
3400 {
3401 name: "MOVSDload",
3402 auxType: auxSymOff,
3403 argLen: 2,
3404 faultOnNilArg0: true,
3405 symEffect: SymRead,
3406 asm: x86.AMOVSD,
3407 reg: regInfo{
3408 inputs: []inputInfo{
3409 {0, 65791},
3410 },
3411 outputs: []outputInfo{
3412 {0, 65280},
3413 },
3414 },
3415 },
3416 {
3417 name: "MOVSSconst",
3418 auxType: auxFloat32,
3419 argLen: 0,
3420 rematerializeable: true,
3421 asm: x86.AMOVSS,
3422 reg: regInfo{
3423 outputs: []outputInfo{
3424 {0, 65280},
3425 },
3426 },
3427 },
3428 {
3429 name: "MOVSDconst",
3430 auxType: auxFloat64,
3431 argLen: 0,
3432 rematerializeable: true,
3433 asm: x86.AMOVSD,
3434 reg: regInfo{
3435 outputs: []outputInfo{
3436 {0, 65280},
3437 },
3438 },
3439 },
3440 {
3441 name: "MOVSSloadidx1",
3442 auxType: auxSymOff,
3443 argLen: 3,
3444 symEffect: SymRead,
3445 asm: x86.AMOVSS,
3446 reg: regInfo{
3447 inputs: []inputInfo{
3448 {1, 255},
3449 {0, 65791},
3450 },
3451 outputs: []outputInfo{
3452 {0, 65280},
3453 },
3454 },
3455 },
3456 {
3457 name: "MOVSSloadidx4",
3458 auxType: auxSymOff,
3459 argLen: 3,
3460 symEffect: SymRead,
3461 asm: x86.AMOVSS,
3462 reg: regInfo{
3463 inputs: []inputInfo{
3464 {1, 255},
3465 {0, 65791},
3466 },
3467 outputs: []outputInfo{
3468 {0, 65280},
3469 },
3470 },
3471 },
3472 {
3473 name: "MOVSDloadidx1",
3474 auxType: auxSymOff,
3475 argLen: 3,
3476 symEffect: SymRead,
3477 asm: x86.AMOVSD,
3478 reg: regInfo{
3479 inputs: []inputInfo{
3480 {1, 255},
3481 {0, 65791},
3482 },
3483 outputs: []outputInfo{
3484 {0, 65280},
3485 },
3486 },
3487 },
3488 {
3489 name: "MOVSDloadidx8",
3490 auxType: auxSymOff,
3491 argLen: 3,
3492 symEffect: SymRead,
3493 asm: x86.AMOVSD,
3494 reg: regInfo{
3495 inputs: []inputInfo{
3496 {1, 255},
3497 {0, 65791},
3498 },
3499 outputs: []outputInfo{
3500 {0, 65280},
3501 },
3502 },
3503 },
3504 {
3505 name: "MOVSSstore",
3506 auxType: auxSymOff,
3507 argLen: 3,
3508 faultOnNilArg0: true,
3509 symEffect: SymWrite,
3510 asm: x86.AMOVSS,
3511 reg: regInfo{
3512 inputs: []inputInfo{
3513 {1, 65280},
3514 {0, 65791},
3515 },
3516 },
3517 },
3518 {
3519 name: "MOVSDstore",
3520 auxType: auxSymOff,
3521 argLen: 3,
3522 faultOnNilArg0: true,
3523 symEffect: SymWrite,
3524 asm: x86.AMOVSD,
3525 reg: regInfo{
3526 inputs: []inputInfo{
3527 {1, 65280},
3528 {0, 65791},
3529 },
3530 },
3531 },
3532 {
3533 name: "MOVSSstoreidx1",
3534 auxType: auxSymOff,
3535 argLen: 4,
3536 symEffect: SymWrite,
3537 asm: x86.AMOVSS,
3538 reg: regInfo{
3539 inputs: []inputInfo{
3540 {1, 255},
3541 {2, 65280},
3542 {0, 65791},
3543 },
3544 },
3545 },
3546 {
3547 name: "MOVSSstoreidx4",
3548 auxType: auxSymOff,
3549 argLen: 4,
3550 symEffect: SymWrite,
3551 asm: x86.AMOVSS,
3552 reg: regInfo{
3553 inputs: []inputInfo{
3554 {1, 255},
3555 {2, 65280},
3556 {0, 65791},
3557 },
3558 },
3559 },
3560 {
3561 name: "MOVSDstoreidx1",
3562 auxType: auxSymOff,
3563 argLen: 4,
3564 symEffect: SymWrite,
3565 asm: x86.AMOVSD,
3566 reg: regInfo{
3567 inputs: []inputInfo{
3568 {1, 255},
3569 {2, 65280},
3570 {0, 65791},
3571 },
3572 },
3573 },
3574 {
3575 name: "MOVSDstoreidx8",
3576 auxType: auxSymOff,
3577 argLen: 4,
3578 symEffect: SymWrite,
3579 asm: x86.AMOVSD,
3580 reg: regInfo{
3581 inputs: []inputInfo{
3582 {1, 255},
3583 {2, 65280},
3584 {0, 65791},
3585 },
3586 },
3587 },
3588 {
3589 name: "ADDSSload",
3590 auxType: auxSymOff,
3591 argLen: 3,
3592 resultInArg0: true,
3593 faultOnNilArg1: true,
3594 symEffect: SymRead,
3595 asm: x86.AADDSS,
3596 reg: regInfo{
3597 inputs: []inputInfo{
3598 {0, 65280},
3599 {1, 65791},
3600 },
3601 outputs: []outputInfo{
3602 {0, 65280},
3603 },
3604 },
3605 },
3606 {
3607 name: "ADDSDload",
3608 auxType: auxSymOff,
3609 argLen: 3,
3610 resultInArg0: true,
3611 faultOnNilArg1: true,
3612 symEffect: SymRead,
3613 asm: x86.AADDSD,
3614 reg: regInfo{
3615 inputs: []inputInfo{
3616 {0, 65280},
3617 {1, 65791},
3618 },
3619 outputs: []outputInfo{
3620 {0, 65280},
3621 },
3622 },
3623 },
3624 {
3625 name: "SUBSSload",
3626 auxType: auxSymOff,
3627 argLen: 3,
3628 resultInArg0: true,
3629 faultOnNilArg1: true,
3630 symEffect: SymRead,
3631 asm: x86.ASUBSS,
3632 reg: regInfo{
3633 inputs: []inputInfo{
3634 {0, 65280},
3635 {1, 65791},
3636 },
3637 outputs: []outputInfo{
3638 {0, 65280},
3639 },
3640 },
3641 },
3642 {
3643 name: "SUBSDload",
3644 auxType: auxSymOff,
3645 argLen: 3,
3646 resultInArg0: true,
3647 faultOnNilArg1: true,
3648 symEffect: SymRead,
3649 asm: x86.ASUBSD,
3650 reg: regInfo{
3651 inputs: []inputInfo{
3652 {0, 65280},
3653 {1, 65791},
3654 },
3655 outputs: []outputInfo{
3656 {0, 65280},
3657 },
3658 },
3659 },
3660 {
3661 name: "MULSSload",
3662 auxType: auxSymOff,
3663 argLen: 3,
3664 resultInArg0: true,
3665 faultOnNilArg1: true,
3666 symEffect: SymRead,
3667 asm: x86.AMULSS,
3668 reg: regInfo{
3669 inputs: []inputInfo{
3670 {0, 65280},
3671 {1, 65791},
3672 },
3673 outputs: []outputInfo{
3674 {0, 65280},
3675 },
3676 },
3677 },
3678 {
3679 name: "MULSDload",
3680 auxType: auxSymOff,
3681 argLen: 3,
3682 resultInArg0: true,
3683 faultOnNilArg1: true,
3684 symEffect: SymRead,
3685 asm: x86.AMULSD,
3686 reg: regInfo{
3687 inputs: []inputInfo{
3688 {0, 65280},
3689 {1, 65791},
3690 },
3691 outputs: []outputInfo{
3692 {0, 65280},
3693 },
3694 },
3695 },
3696 {
3697 name: "DIVSSload",
3698 auxType: auxSymOff,
3699 argLen: 3,
3700 resultInArg0: true,
3701 faultOnNilArg1: true,
3702 symEffect: SymRead,
3703 asm: x86.ADIVSS,
3704 reg: regInfo{
3705 inputs: []inputInfo{
3706 {0, 65280},
3707 {1, 65791},
3708 },
3709 outputs: []outputInfo{
3710 {0, 65280},
3711 },
3712 },
3713 },
3714 {
3715 name: "DIVSDload",
3716 auxType: auxSymOff,
3717 argLen: 3,
3718 resultInArg0: true,
3719 faultOnNilArg1: true,
3720 symEffect: SymRead,
3721 asm: x86.ADIVSD,
3722 reg: regInfo{
3723 inputs: []inputInfo{
3724 {0, 65280},
3725 {1, 65791},
3726 },
3727 outputs: []outputInfo{
3728 {0, 65280},
3729 },
3730 },
3731 },
3732 {
3733 name: "ADDL",
3734 argLen: 2,
3735 commutative: true,
3736 clobberFlags: true,
3737 asm: x86.AADDL,
3738 reg: regInfo{
3739 inputs: []inputInfo{
3740 {1, 239},
3741 {0, 255},
3742 },
3743 outputs: []outputInfo{
3744 {0, 239},
3745 },
3746 },
3747 },
3748 {
3749 name: "ADDLconst",
3750 auxType: auxInt32,
3751 argLen: 1,
3752 clobberFlags: true,
3753 asm: x86.AADDL,
3754 reg: regInfo{
3755 inputs: []inputInfo{
3756 {0, 255},
3757 },
3758 outputs: []outputInfo{
3759 {0, 239},
3760 },
3761 },
3762 },
3763 {
3764 name: "ADDLcarry",
3765 argLen: 2,
3766 commutative: true,
3767 resultInArg0: true,
3768 asm: x86.AADDL,
3769 reg: regInfo{
3770 inputs: []inputInfo{
3771 {0, 239},
3772 {1, 239},
3773 },
3774 outputs: []outputInfo{
3775 {1, 0},
3776 {0, 239},
3777 },
3778 },
3779 },
3780 {
3781 name: "ADDLconstcarry",
3782 auxType: auxInt32,
3783 argLen: 1,
3784 resultInArg0: true,
3785 asm: x86.AADDL,
3786 reg: regInfo{
3787 inputs: []inputInfo{
3788 {0, 239},
3789 },
3790 outputs: []outputInfo{
3791 {1, 0},
3792 {0, 239},
3793 },
3794 },
3795 },
3796 {
3797 name: "ADCL",
3798 argLen: 3,
3799 commutative: true,
3800 resultInArg0: true,
3801 clobberFlags: true,
3802 asm: x86.AADCL,
3803 reg: regInfo{
3804 inputs: []inputInfo{
3805 {0, 239},
3806 {1, 239},
3807 },
3808 outputs: []outputInfo{
3809 {0, 239},
3810 },
3811 },
3812 },
3813 {
3814 name: "ADCLconst",
3815 auxType: auxInt32,
3816 argLen: 2,
3817 resultInArg0: true,
3818 clobberFlags: true,
3819 asm: x86.AADCL,
3820 reg: regInfo{
3821 inputs: []inputInfo{
3822 {0, 239},
3823 },
3824 outputs: []outputInfo{
3825 {0, 239},
3826 },
3827 },
3828 },
3829 {
3830 name: "SUBL",
3831 argLen: 2,
3832 resultInArg0: true,
3833 clobberFlags: true,
3834 asm: x86.ASUBL,
3835 reg: regInfo{
3836 inputs: []inputInfo{
3837 {0, 239},
3838 {1, 239},
3839 },
3840 outputs: []outputInfo{
3841 {0, 239},
3842 },
3843 },
3844 },
3845 {
3846 name: "SUBLconst",
3847 auxType: auxInt32,
3848 argLen: 1,
3849 resultInArg0: true,
3850 clobberFlags: true,
3851 asm: x86.ASUBL,
3852 reg: regInfo{
3853 inputs: []inputInfo{
3854 {0, 239},
3855 },
3856 outputs: []outputInfo{
3857 {0, 239},
3858 },
3859 },
3860 },
3861 {
3862 name: "SUBLcarry",
3863 argLen: 2,
3864 resultInArg0: true,
3865 asm: x86.ASUBL,
3866 reg: regInfo{
3867 inputs: []inputInfo{
3868 {0, 239},
3869 {1, 239},
3870 },
3871 outputs: []outputInfo{
3872 {1, 0},
3873 {0, 239},
3874 },
3875 },
3876 },
3877 {
3878 name: "SUBLconstcarry",
3879 auxType: auxInt32,
3880 argLen: 1,
3881 resultInArg0: true,
3882 asm: x86.ASUBL,
3883 reg: regInfo{
3884 inputs: []inputInfo{
3885 {0, 239},
3886 },
3887 outputs: []outputInfo{
3888 {1, 0},
3889 {0, 239},
3890 },
3891 },
3892 },
3893 {
3894 name: "SBBL",
3895 argLen: 3,
3896 resultInArg0: true,
3897 clobberFlags: true,
3898 asm: x86.ASBBL,
3899 reg: regInfo{
3900 inputs: []inputInfo{
3901 {0, 239},
3902 {1, 239},
3903 },
3904 outputs: []outputInfo{
3905 {0, 239},
3906 },
3907 },
3908 },
3909 {
3910 name: "SBBLconst",
3911 auxType: auxInt32,
3912 argLen: 2,
3913 resultInArg0: true,
3914 clobberFlags: true,
3915 asm: x86.ASBBL,
3916 reg: regInfo{
3917 inputs: []inputInfo{
3918 {0, 239},
3919 },
3920 outputs: []outputInfo{
3921 {0, 239},
3922 },
3923 },
3924 },
3925 {
3926 name: "MULL",
3927 argLen: 2,
3928 commutative: true,
3929 resultInArg0: true,
3930 clobberFlags: true,
3931 asm: x86.AIMULL,
3932 reg: regInfo{
3933 inputs: []inputInfo{
3934 {0, 239},
3935 {1, 239},
3936 },
3937 outputs: []outputInfo{
3938 {0, 239},
3939 },
3940 },
3941 },
3942 {
3943 name: "MULLconst",
3944 auxType: auxInt32,
3945 argLen: 1,
3946 clobberFlags: true,
3947 asm: x86.AIMUL3L,
3948 reg: regInfo{
3949 inputs: []inputInfo{
3950 {0, 239},
3951 },
3952 outputs: []outputInfo{
3953 {0, 239},
3954 },
3955 },
3956 },
3957 {
3958 name: "MULLU",
3959 argLen: 2,
3960 commutative: true,
3961 clobberFlags: true,
3962 asm: x86.AMULL,
3963 reg: regInfo{
3964 inputs: []inputInfo{
3965 {0, 1},
3966 {1, 255},
3967 },
3968 clobbers: 4,
3969 outputs: []outputInfo{
3970 {1, 0},
3971 {0, 1},
3972 },
3973 },
3974 },
3975 {
3976 name: "HMULL",
3977 argLen: 2,
3978 commutative: true,
3979 clobberFlags: true,
3980 asm: x86.AIMULL,
3981 reg: regInfo{
3982 inputs: []inputInfo{
3983 {0, 1},
3984 {1, 255},
3985 },
3986 clobbers: 1,
3987 outputs: []outputInfo{
3988 {0, 4},
3989 },
3990 },
3991 },
3992 {
3993 name: "HMULLU",
3994 argLen: 2,
3995 commutative: true,
3996 clobberFlags: true,
3997 asm: x86.AMULL,
3998 reg: regInfo{
3999 inputs: []inputInfo{
4000 {0, 1},
4001 {1, 255},
4002 },
4003 clobbers: 1,
4004 outputs: []outputInfo{
4005 {0, 4},
4006 },
4007 },
4008 },
4009 {
4010 name: "MULLQU",
4011 argLen: 2,
4012 commutative: true,
4013 clobberFlags: true,
4014 asm: x86.AMULL,
4015 reg: regInfo{
4016 inputs: []inputInfo{
4017 {0, 1},
4018 {1, 255},
4019 },
4020 outputs: []outputInfo{
4021 {0, 4},
4022 {1, 1},
4023 },
4024 },
4025 },
4026 {
4027 name: "AVGLU",
4028 argLen: 2,
4029 commutative: true,
4030 resultInArg0: true,
4031 clobberFlags: true,
4032 reg: regInfo{
4033 inputs: []inputInfo{
4034 {0, 239},
4035 {1, 239},
4036 },
4037 outputs: []outputInfo{
4038 {0, 239},
4039 },
4040 },
4041 },
4042 {
4043 name: "DIVL",
4044 auxType: auxBool,
4045 argLen: 2,
4046 clobberFlags: true,
4047 asm: x86.AIDIVL,
4048 reg: regInfo{
4049 inputs: []inputInfo{
4050 {0, 1},
4051 {1, 251},
4052 },
4053 clobbers: 4,
4054 outputs: []outputInfo{
4055 {0, 1},
4056 },
4057 },
4058 },
4059 {
4060 name: "DIVW",
4061 auxType: auxBool,
4062 argLen: 2,
4063 clobberFlags: true,
4064 asm: x86.AIDIVW,
4065 reg: regInfo{
4066 inputs: []inputInfo{
4067 {0, 1},
4068 {1, 251},
4069 },
4070 clobbers: 4,
4071 outputs: []outputInfo{
4072 {0, 1},
4073 },
4074 },
4075 },
4076 {
4077 name: "DIVLU",
4078 argLen: 2,
4079 clobberFlags: true,
4080 asm: x86.ADIVL,
4081 reg: regInfo{
4082 inputs: []inputInfo{
4083 {0, 1},
4084 {1, 251},
4085 },
4086 clobbers: 4,
4087 outputs: []outputInfo{
4088 {0, 1},
4089 },
4090 },
4091 },
4092 {
4093 name: "DIVWU",
4094 argLen: 2,
4095 clobberFlags: true,
4096 asm: x86.ADIVW,
4097 reg: regInfo{
4098 inputs: []inputInfo{
4099 {0, 1},
4100 {1, 251},
4101 },
4102 clobbers: 4,
4103 outputs: []outputInfo{
4104 {0, 1},
4105 },
4106 },
4107 },
4108 {
4109 name: "MODL",
4110 auxType: auxBool,
4111 argLen: 2,
4112 clobberFlags: true,
4113 asm: x86.AIDIVL,
4114 reg: regInfo{
4115 inputs: []inputInfo{
4116 {0, 1},
4117 {1, 251},
4118 },
4119 clobbers: 1,
4120 outputs: []outputInfo{
4121 {0, 4},
4122 },
4123 },
4124 },
4125 {
4126 name: "MODW",
4127 auxType: auxBool,
4128 argLen: 2,
4129 clobberFlags: true,
4130 asm: x86.AIDIVW,
4131 reg: regInfo{
4132 inputs: []inputInfo{
4133 {0, 1},
4134 {1, 251},
4135 },
4136 clobbers: 1,
4137 outputs: []outputInfo{
4138 {0, 4},
4139 },
4140 },
4141 },
4142 {
4143 name: "MODLU",
4144 argLen: 2,
4145 clobberFlags: true,
4146 asm: x86.ADIVL,
4147 reg: regInfo{
4148 inputs: []inputInfo{
4149 {0, 1},
4150 {1, 251},
4151 },
4152 clobbers: 1,
4153 outputs: []outputInfo{
4154 {0, 4},
4155 },
4156 },
4157 },
4158 {
4159 name: "MODWU",
4160 argLen: 2,
4161 clobberFlags: true,
4162 asm: x86.ADIVW,
4163 reg: regInfo{
4164 inputs: []inputInfo{
4165 {0, 1},
4166 {1, 251},
4167 },
4168 clobbers: 1,
4169 outputs: []outputInfo{
4170 {0, 4},
4171 },
4172 },
4173 },
4174 {
4175 name: "ANDL",
4176 argLen: 2,
4177 commutative: true,
4178 resultInArg0: true,
4179 clobberFlags: true,
4180 asm: x86.AANDL,
4181 reg: regInfo{
4182 inputs: []inputInfo{
4183 {0, 239},
4184 {1, 239},
4185 },
4186 outputs: []outputInfo{
4187 {0, 239},
4188 },
4189 },
4190 },
4191 {
4192 name: "ANDLconst",
4193 auxType: auxInt32,
4194 argLen: 1,
4195 resultInArg0: true,
4196 clobberFlags: true,
4197 asm: x86.AANDL,
4198 reg: regInfo{
4199 inputs: []inputInfo{
4200 {0, 239},
4201 },
4202 outputs: []outputInfo{
4203 {0, 239},
4204 },
4205 },
4206 },
4207 {
4208 name: "ORL",
4209 argLen: 2,
4210 commutative: true,
4211 resultInArg0: true,
4212 clobberFlags: true,
4213 asm: x86.AORL,
4214 reg: regInfo{
4215 inputs: []inputInfo{
4216 {0, 239},
4217 {1, 239},
4218 },
4219 outputs: []outputInfo{
4220 {0, 239},
4221 },
4222 },
4223 },
4224 {
4225 name: "ORLconst",
4226 auxType: auxInt32,
4227 argLen: 1,
4228 resultInArg0: true,
4229 clobberFlags: true,
4230 asm: x86.AORL,
4231 reg: regInfo{
4232 inputs: []inputInfo{
4233 {0, 239},
4234 },
4235 outputs: []outputInfo{
4236 {0, 239},
4237 },
4238 },
4239 },
4240 {
4241 name: "XORL",
4242 argLen: 2,
4243 commutative: true,
4244 resultInArg0: true,
4245 clobberFlags: true,
4246 asm: x86.AXORL,
4247 reg: regInfo{
4248 inputs: []inputInfo{
4249 {0, 239},
4250 {1, 239},
4251 },
4252 outputs: []outputInfo{
4253 {0, 239},
4254 },
4255 },
4256 },
4257 {
4258 name: "XORLconst",
4259 auxType: auxInt32,
4260 argLen: 1,
4261 resultInArg0: true,
4262 clobberFlags: true,
4263 asm: x86.AXORL,
4264 reg: regInfo{
4265 inputs: []inputInfo{
4266 {0, 239},
4267 },
4268 outputs: []outputInfo{
4269 {0, 239},
4270 },
4271 },
4272 },
4273 {
4274 name: "CMPL",
4275 argLen: 2,
4276 asm: x86.ACMPL,
4277 reg: regInfo{
4278 inputs: []inputInfo{
4279 {0, 255},
4280 {1, 255},
4281 },
4282 },
4283 },
4284 {
4285 name: "CMPW",
4286 argLen: 2,
4287 asm: x86.ACMPW,
4288 reg: regInfo{
4289 inputs: []inputInfo{
4290 {0, 255},
4291 {1, 255},
4292 },
4293 },
4294 },
4295 {
4296 name: "CMPB",
4297 argLen: 2,
4298 asm: x86.ACMPB,
4299 reg: regInfo{
4300 inputs: []inputInfo{
4301 {0, 255},
4302 {1, 255},
4303 },
4304 },
4305 },
4306 {
4307 name: "CMPLconst",
4308 auxType: auxInt32,
4309 argLen: 1,
4310 asm: x86.ACMPL,
4311 reg: regInfo{
4312 inputs: []inputInfo{
4313 {0, 255},
4314 },
4315 },
4316 },
4317 {
4318 name: "CMPWconst",
4319 auxType: auxInt16,
4320 argLen: 1,
4321 asm: x86.ACMPW,
4322 reg: regInfo{
4323 inputs: []inputInfo{
4324 {0, 255},
4325 },
4326 },
4327 },
4328 {
4329 name: "CMPBconst",
4330 auxType: auxInt8,
4331 argLen: 1,
4332 asm: x86.ACMPB,
4333 reg: regInfo{
4334 inputs: []inputInfo{
4335 {0, 255},
4336 },
4337 },
4338 },
4339 {
4340 name: "CMPLload",
4341 auxType: auxSymOff,
4342 argLen: 3,
4343 faultOnNilArg0: true,
4344 symEffect: SymRead,
4345 asm: x86.ACMPL,
4346 reg: regInfo{
4347 inputs: []inputInfo{
4348 {1, 255},
4349 {0, 65791},
4350 },
4351 },
4352 },
4353 {
4354 name: "CMPWload",
4355 auxType: auxSymOff,
4356 argLen: 3,
4357 faultOnNilArg0: true,
4358 symEffect: SymRead,
4359 asm: x86.ACMPW,
4360 reg: regInfo{
4361 inputs: []inputInfo{
4362 {1, 255},
4363 {0, 65791},
4364 },
4365 },
4366 },
4367 {
4368 name: "CMPBload",
4369 auxType: auxSymOff,
4370 argLen: 3,
4371 faultOnNilArg0: true,
4372 symEffect: SymRead,
4373 asm: x86.ACMPB,
4374 reg: regInfo{
4375 inputs: []inputInfo{
4376 {1, 255},
4377 {0, 65791},
4378 },
4379 },
4380 },
4381 {
4382 name: "CMPLconstload",
4383 auxType: auxSymValAndOff,
4384 argLen: 2,
4385 faultOnNilArg0: true,
4386 symEffect: SymRead,
4387 asm: x86.ACMPL,
4388 reg: regInfo{
4389 inputs: []inputInfo{
4390 {0, 65791},
4391 },
4392 },
4393 },
4394 {
4395 name: "CMPWconstload",
4396 auxType: auxSymValAndOff,
4397 argLen: 2,
4398 faultOnNilArg0: true,
4399 symEffect: SymRead,
4400 asm: x86.ACMPW,
4401 reg: regInfo{
4402 inputs: []inputInfo{
4403 {0, 65791},
4404 },
4405 },
4406 },
4407 {
4408 name: "CMPBconstload",
4409 auxType: auxSymValAndOff,
4410 argLen: 2,
4411 faultOnNilArg0: true,
4412 symEffect: SymRead,
4413 asm: x86.ACMPB,
4414 reg: regInfo{
4415 inputs: []inputInfo{
4416 {0, 65791},
4417 },
4418 },
4419 },
4420 {
4421 name: "UCOMISS",
4422 argLen: 2,
4423 asm: x86.AUCOMISS,
4424 reg: regInfo{
4425 inputs: []inputInfo{
4426 {0, 65280},
4427 {1, 65280},
4428 },
4429 },
4430 },
4431 {
4432 name: "UCOMISD",
4433 argLen: 2,
4434 asm: x86.AUCOMISD,
4435 reg: regInfo{
4436 inputs: []inputInfo{
4437 {0, 65280},
4438 {1, 65280},
4439 },
4440 },
4441 },
4442 {
4443 name: "TESTL",
4444 argLen: 2,
4445 commutative: true,
4446 asm: x86.ATESTL,
4447 reg: regInfo{
4448 inputs: []inputInfo{
4449 {0, 255},
4450 {1, 255},
4451 },
4452 },
4453 },
4454 {
4455 name: "TESTW",
4456 argLen: 2,
4457 commutative: true,
4458 asm: x86.ATESTW,
4459 reg: regInfo{
4460 inputs: []inputInfo{
4461 {0, 255},
4462 {1, 255},
4463 },
4464 },
4465 },
4466 {
4467 name: "TESTB",
4468 argLen: 2,
4469 commutative: true,
4470 asm: x86.ATESTB,
4471 reg: regInfo{
4472 inputs: []inputInfo{
4473 {0, 255},
4474 {1, 255},
4475 },
4476 },
4477 },
4478 {
4479 name: "TESTLconst",
4480 auxType: auxInt32,
4481 argLen: 1,
4482 asm: x86.ATESTL,
4483 reg: regInfo{
4484 inputs: []inputInfo{
4485 {0, 255},
4486 },
4487 },
4488 },
4489 {
4490 name: "TESTWconst",
4491 auxType: auxInt16,
4492 argLen: 1,
4493 asm: x86.ATESTW,
4494 reg: regInfo{
4495 inputs: []inputInfo{
4496 {0, 255},
4497 },
4498 },
4499 },
4500 {
4501 name: "TESTBconst",
4502 auxType: auxInt8,
4503 argLen: 1,
4504 asm: x86.ATESTB,
4505 reg: regInfo{
4506 inputs: []inputInfo{
4507 {0, 255},
4508 },
4509 },
4510 },
4511 {
4512 name: "SHLL",
4513 argLen: 2,
4514 resultInArg0: true,
4515 clobberFlags: true,
4516 asm: x86.ASHLL,
4517 reg: regInfo{
4518 inputs: []inputInfo{
4519 {1, 2},
4520 {0, 239},
4521 },
4522 outputs: []outputInfo{
4523 {0, 239},
4524 },
4525 },
4526 },
4527 {
4528 name: "SHLLconst",
4529 auxType: auxInt32,
4530 argLen: 1,
4531 resultInArg0: true,
4532 clobberFlags: true,
4533 asm: x86.ASHLL,
4534 reg: regInfo{
4535 inputs: []inputInfo{
4536 {0, 239},
4537 },
4538 outputs: []outputInfo{
4539 {0, 239},
4540 },
4541 },
4542 },
4543 {
4544 name: "SHRL",
4545 argLen: 2,
4546 resultInArg0: true,
4547 clobberFlags: true,
4548 asm: x86.ASHRL,
4549 reg: regInfo{
4550 inputs: []inputInfo{
4551 {1, 2},
4552 {0, 239},
4553 },
4554 outputs: []outputInfo{
4555 {0, 239},
4556 },
4557 },
4558 },
4559 {
4560 name: "SHRW",
4561 argLen: 2,
4562 resultInArg0: true,
4563 clobberFlags: true,
4564 asm: x86.ASHRW,
4565 reg: regInfo{
4566 inputs: []inputInfo{
4567 {1, 2},
4568 {0, 239},
4569 },
4570 outputs: []outputInfo{
4571 {0, 239},
4572 },
4573 },
4574 },
4575 {
4576 name: "SHRB",
4577 argLen: 2,
4578 resultInArg0: true,
4579 clobberFlags: true,
4580 asm: x86.ASHRB,
4581 reg: regInfo{
4582 inputs: []inputInfo{
4583 {1, 2},
4584 {0, 239},
4585 },
4586 outputs: []outputInfo{
4587 {0, 239},
4588 },
4589 },
4590 },
4591 {
4592 name: "SHRLconst",
4593 auxType: auxInt32,
4594 argLen: 1,
4595 resultInArg0: true,
4596 clobberFlags: true,
4597 asm: x86.ASHRL,
4598 reg: regInfo{
4599 inputs: []inputInfo{
4600 {0, 239},
4601 },
4602 outputs: []outputInfo{
4603 {0, 239},
4604 },
4605 },
4606 },
4607 {
4608 name: "SHRWconst",
4609 auxType: auxInt16,
4610 argLen: 1,
4611 resultInArg0: true,
4612 clobberFlags: true,
4613 asm: x86.ASHRW,
4614 reg: regInfo{
4615 inputs: []inputInfo{
4616 {0, 239},
4617 },
4618 outputs: []outputInfo{
4619 {0, 239},
4620 },
4621 },
4622 },
4623 {
4624 name: "SHRBconst",
4625 auxType: auxInt8,
4626 argLen: 1,
4627 resultInArg0: true,
4628 clobberFlags: true,
4629 asm: x86.ASHRB,
4630 reg: regInfo{
4631 inputs: []inputInfo{
4632 {0, 239},
4633 },
4634 outputs: []outputInfo{
4635 {0, 239},
4636 },
4637 },
4638 },
4639 {
4640 name: "SARL",
4641 argLen: 2,
4642 resultInArg0: true,
4643 clobberFlags: true,
4644 asm: x86.ASARL,
4645 reg: regInfo{
4646 inputs: []inputInfo{
4647 {1, 2},
4648 {0, 239},
4649 },
4650 outputs: []outputInfo{
4651 {0, 239},
4652 },
4653 },
4654 },
4655 {
4656 name: "SARW",
4657 argLen: 2,
4658 resultInArg0: true,
4659 clobberFlags: true,
4660 asm: x86.ASARW,
4661 reg: regInfo{
4662 inputs: []inputInfo{
4663 {1, 2},
4664 {0, 239},
4665 },
4666 outputs: []outputInfo{
4667 {0, 239},
4668 },
4669 },
4670 },
4671 {
4672 name: "SARB",
4673 argLen: 2,
4674 resultInArg0: true,
4675 clobberFlags: true,
4676 asm: x86.ASARB,
4677 reg: regInfo{
4678 inputs: []inputInfo{
4679 {1, 2},
4680 {0, 239},
4681 },
4682 outputs: []outputInfo{
4683 {0, 239},
4684 },
4685 },
4686 },
4687 {
4688 name: "SARLconst",
4689 auxType: auxInt32,
4690 argLen: 1,
4691 resultInArg0: true,
4692 clobberFlags: true,
4693 asm: x86.ASARL,
4694 reg: regInfo{
4695 inputs: []inputInfo{
4696 {0, 239},
4697 },
4698 outputs: []outputInfo{
4699 {0, 239},
4700 },
4701 },
4702 },
4703 {
4704 name: "SARWconst",
4705 auxType: auxInt16,
4706 argLen: 1,
4707 resultInArg0: true,
4708 clobberFlags: true,
4709 asm: x86.ASARW,
4710 reg: regInfo{
4711 inputs: []inputInfo{
4712 {0, 239},
4713 },
4714 outputs: []outputInfo{
4715 {0, 239},
4716 },
4717 },
4718 },
4719 {
4720 name: "SARBconst",
4721 auxType: auxInt8,
4722 argLen: 1,
4723 resultInArg0: true,
4724 clobberFlags: true,
4725 asm: x86.ASARB,
4726 reg: regInfo{
4727 inputs: []inputInfo{
4728 {0, 239},
4729 },
4730 outputs: []outputInfo{
4731 {0, 239},
4732 },
4733 },
4734 },
4735 {
4736 name: "ROLL",
4737 argLen: 2,
4738 resultInArg0: true,
4739 clobberFlags: true,
4740 asm: x86.AROLL,
4741 reg: regInfo{
4742 inputs: []inputInfo{
4743 {1, 2},
4744 {0, 239},
4745 },
4746 outputs: []outputInfo{
4747 {0, 239},
4748 },
4749 },
4750 },
4751 {
4752 name: "ROLW",
4753 argLen: 2,
4754 resultInArg0: true,
4755 clobberFlags: true,
4756 asm: x86.AROLW,
4757 reg: regInfo{
4758 inputs: []inputInfo{
4759 {1, 2},
4760 {0, 239},
4761 },
4762 outputs: []outputInfo{
4763 {0, 239},
4764 },
4765 },
4766 },
4767 {
4768 name: "ROLB",
4769 argLen: 2,
4770 resultInArg0: true,
4771 clobberFlags: true,
4772 asm: x86.AROLB,
4773 reg: regInfo{
4774 inputs: []inputInfo{
4775 {1, 2},
4776 {0, 239},
4777 },
4778 outputs: []outputInfo{
4779 {0, 239},
4780 },
4781 },
4782 },
4783 {
4784 name: "ROLLconst",
4785 auxType: auxInt32,
4786 argLen: 1,
4787 resultInArg0: true,
4788 clobberFlags: true,
4789 asm: x86.AROLL,
4790 reg: regInfo{
4791 inputs: []inputInfo{
4792 {0, 239},
4793 },
4794 outputs: []outputInfo{
4795 {0, 239},
4796 },
4797 },
4798 },
4799 {
4800 name: "ROLWconst",
4801 auxType: auxInt16,
4802 argLen: 1,
4803 resultInArg0: true,
4804 clobberFlags: true,
4805 asm: x86.AROLW,
4806 reg: regInfo{
4807 inputs: []inputInfo{
4808 {0, 239},
4809 },
4810 outputs: []outputInfo{
4811 {0, 239},
4812 },
4813 },
4814 },
4815 {
4816 name: "ROLBconst",
4817 auxType: auxInt8,
4818 argLen: 1,
4819 resultInArg0: true,
4820 clobberFlags: true,
4821 asm: x86.AROLB,
4822 reg: regInfo{
4823 inputs: []inputInfo{
4824 {0, 239},
4825 },
4826 outputs: []outputInfo{
4827 {0, 239},
4828 },
4829 },
4830 },
4831 {
4832 name: "ADDLload",
4833 auxType: auxSymOff,
4834 argLen: 3,
4835 resultInArg0: true,
4836 clobberFlags: true,
4837 faultOnNilArg1: true,
4838 symEffect: SymRead,
4839 asm: x86.AADDL,
4840 reg: regInfo{
4841 inputs: []inputInfo{
4842 {0, 239},
4843 {1, 65791},
4844 },
4845 outputs: []outputInfo{
4846 {0, 239},
4847 },
4848 },
4849 },
4850 {
4851 name: "SUBLload",
4852 auxType: auxSymOff,
4853 argLen: 3,
4854 resultInArg0: true,
4855 clobberFlags: true,
4856 faultOnNilArg1: true,
4857 symEffect: SymRead,
4858 asm: x86.ASUBL,
4859 reg: regInfo{
4860 inputs: []inputInfo{
4861 {0, 239},
4862 {1, 65791},
4863 },
4864 outputs: []outputInfo{
4865 {0, 239},
4866 },
4867 },
4868 },
4869 {
4870 name: "MULLload",
4871 auxType: auxSymOff,
4872 argLen: 3,
4873 resultInArg0: true,
4874 clobberFlags: true,
4875 faultOnNilArg1: true,
4876 symEffect: SymRead,
4877 asm: x86.AIMULL,
4878 reg: regInfo{
4879 inputs: []inputInfo{
4880 {0, 239},
4881 {1, 65791},
4882 },
4883 outputs: []outputInfo{
4884 {0, 239},
4885 },
4886 },
4887 },
4888 {
4889 name: "ANDLload",
4890 auxType: auxSymOff,
4891 argLen: 3,
4892 resultInArg0: true,
4893 clobberFlags: true,
4894 faultOnNilArg1: true,
4895 symEffect: SymRead,
4896 asm: x86.AANDL,
4897 reg: regInfo{
4898 inputs: []inputInfo{
4899 {0, 239},
4900 {1, 65791},
4901 },
4902 outputs: []outputInfo{
4903 {0, 239},
4904 },
4905 },
4906 },
4907 {
4908 name: "ORLload",
4909 auxType: auxSymOff,
4910 argLen: 3,
4911 resultInArg0: true,
4912 clobberFlags: true,
4913 faultOnNilArg1: true,
4914 symEffect: SymRead,
4915 asm: x86.AORL,
4916 reg: regInfo{
4917 inputs: []inputInfo{
4918 {0, 239},
4919 {1, 65791},
4920 },
4921 outputs: []outputInfo{
4922 {0, 239},
4923 },
4924 },
4925 },
4926 {
4927 name: "XORLload",
4928 auxType: auxSymOff,
4929 argLen: 3,
4930 resultInArg0: true,
4931 clobberFlags: true,
4932 faultOnNilArg1: true,
4933 symEffect: SymRead,
4934 asm: x86.AXORL,
4935 reg: regInfo{
4936 inputs: []inputInfo{
4937 {0, 239},
4938 {1, 65791},
4939 },
4940 outputs: []outputInfo{
4941 {0, 239},
4942 },
4943 },
4944 },
4945 {
4946 name: "ADDLloadidx4",
4947 auxType: auxSymOff,
4948 argLen: 4,
4949 resultInArg0: true,
4950 clobberFlags: true,
4951 symEffect: SymRead,
4952 asm: x86.AADDL,
4953 reg: regInfo{
4954 inputs: []inputInfo{
4955 {0, 239},
4956 {2, 255},
4957 {1, 65791},
4958 },
4959 outputs: []outputInfo{
4960 {0, 239},
4961 },
4962 },
4963 },
4964 {
4965 name: "SUBLloadidx4",
4966 auxType: auxSymOff,
4967 argLen: 4,
4968 resultInArg0: true,
4969 clobberFlags: true,
4970 symEffect: SymRead,
4971 asm: x86.ASUBL,
4972 reg: regInfo{
4973 inputs: []inputInfo{
4974 {0, 239},
4975 {2, 255},
4976 {1, 65791},
4977 },
4978 outputs: []outputInfo{
4979 {0, 239},
4980 },
4981 },
4982 },
4983 {
4984 name: "MULLloadidx4",
4985 auxType: auxSymOff,
4986 argLen: 4,
4987 resultInArg0: true,
4988 clobberFlags: true,
4989 symEffect: SymRead,
4990 asm: x86.AIMULL,
4991 reg: regInfo{
4992 inputs: []inputInfo{
4993 {0, 239},
4994 {2, 255},
4995 {1, 65791},
4996 },
4997 outputs: []outputInfo{
4998 {0, 239},
4999 },
5000 },
5001 },
5002 {
5003 name: "ANDLloadidx4",
5004 auxType: auxSymOff,
5005 argLen: 4,
5006 resultInArg0: true,
5007 clobberFlags: true,
5008 symEffect: SymRead,
5009 asm: x86.AANDL,
5010 reg: regInfo{
5011 inputs: []inputInfo{
5012 {0, 239},
5013 {2, 255},
5014 {1, 65791},
5015 },
5016 outputs: []outputInfo{
5017 {0, 239},
5018 },
5019 },
5020 },
5021 {
5022 name: "ORLloadidx4",
5023 auxType: auxSymOff,
5024 argLen: 4,
5025 resultInArg0: true,
5026 clobberFlags: true,
5027 symEffect: SymRead,
5028 asm: x86.AORL,
5029 reg: regInfo{
5030 inputs: []inputInfo{
5031 {0, 239},
5032 {2, 255},
5033 {1, 65791},
5034 },
5035 outputs: []outputInfo{
5036 {0, 239},
5037 },
5038 },
5039 },
5040 {
5041 name: "XORLloadidx4",
5042 auxType: auxSymOff,
5043 argLen: 4,
5044 resultInArg0: true,
5045 clobberFlags: true,
5046 symEffect: SymRead,
5047 asm: x86.AXORL,
5048 reg: regInfo{
5049 inputs: []inputInfo{
5050 {0, 239},
5051 {2, 255},
5052 {1, 65791},
5053 },
5054 outputs: []outputInfo{
5055 {0, 239},
5056 },
5057 },
5058 },
5059 {
5060 name: "NEGL",
5061 argLen: 1,
5062 resultInArg0: true,
5063 clobberFlags: true,
5064 asm: x86.ANEGL,
5065 reg: regInfo{
5066 inputs: []inputInfo{
5067 {0, 239},
5068 },
5069 outputs: []outputInfo{
5070 {0, 239},
5071 },
5072 },
5073 },
5074 {
5075 name: "NOTL",
5076 argLen: 1,
5077 resultInArg0: true,
5078 asm: x86.ANOTL,
5079 reg: regInfo{
5080 inputs: []inputInfo{
5081 {0, 239},
5082 },
5083 outputs: []outputInfo{
5084 {0, 239},
5085 },
5086 },
5087 },
5088 {
5089 name: "BSFL",
5090 argLen: 1,
5091 clobberFlags: true,
5092 asm: x86.ABSFL,
5093 reg: regInfo{
5094 inputs: []inputInfo{
5095 {0, 239},
5096 },
5097 outputs: []outputInfo{
5098 {0, 239},
5099 },
5100 },
5101 },
5102 {
5103 name: "BSFW",
5104 argLen: 1,
5105 clobberFlags: true,
5106 asm: x86.ABSFW,
5107 reg: regInfo{
5108 inputs: []inputInfo{
5109 {0, 239},
5110 },
5111 outputs: []outputInfo{
5112 {0, 239},
5113 },
5114 },
5115 },
5116 {
5117 name: "LoweredCtz32",
5118 argLen: 1,
5119 clobberFlags: true,
5120 reg: regInfo{
5121 inputs: []inputInfo{
5122 {0, 239},
5123 },
5124 outputs: []outputInfo{
5125 {0, 239},
5126 },
5127 },
5128 },
5129 {
5130 name: "BSRL",
5131 argLen: 1,
5132 clobberFlags: true,
5133 asm: x86.ABSRL,
5134 reg: regInfo{
5135 inputs: []inputInfo{
5136 {0, 239},
5137 },
5138 outputs: []outputInfo{
5139 {0, 239},
5140 },
5141 },
5142 },
5143 {
5144 name: "BSRW",
5145 argLen: 1,
5146 clobberFlags: true,
5147 asm: x86.ABSRW,
5148 reg: regInfo{
5149 inputs: []inputInfo{
5150 {0, 239},
5151 },
5152 outputs: []outputInfo{
5153 {0, 239},
5154 },
5155 },
5156 },
5157 {
5158 name: "BSWAPL",
5159 argLen: 1,
5160 resultInArg0: true,
5161 asm: x86.ABSWAPL,
5162 reg: regInfo{
5163 inputs: []inputInfo{
5164 {0, 239},
5165 },
5166 outputs: []outputInfo{
5167 {0, 239},
5168 },
5169 },
5170 },
5171 {
5172 name: "SQRTSD",
5173 argLen: 1,
5174 asm: x86.ASQRTSD,
5175 reg: regInfo{
5176 inputs: []inputInfo{
5177 {0, 65280},
5178 },
5179 outputs: []outputInfo{
5180 {0, 65280},
5181 },
5182 },
5183 },
5184 {
5185 name: "SQRTSS",
5186 argLen: 1,
5187 asm: x86.ASQRTSS,
5188 reg: regInfo{
5189 inputs: []inputInfo{
5190 {0, 65280},
5191 },
5192 outputs: []outputInfo{
5193 {0, 65280},
5194 },
5195 },
5196 },
5197 {
5198 name: "SBBLcarrymask",
5199 argLen: 1,
5200 asm: x86.ASBBL,
5201 reg: regInfo{
5202 outputs: []outputInfo{
5203 {0, 239},
5204 },
5205 },
5206 },
5207 {
5208 name: "SETEQ",
5209 argLen: 1,
5210 asm: x86.ASETEQ,
5211 reg: regInfo{
5212 outputs: []outputInfo{
5213 {0, 239},
5214 },
5215 },
5216 },
5217 {
5218 name: "SETNE",
5219 argLen: 1,
5220 asm: x86.ASETNE,
5221 reg: regInfo{
5222 outputs: []outputInfo{
5223 {0, 239},
5224 },
5225 },
5226 },
5227 {
5228 name: "SETL",
5229 argLen: 1,
5230 asm: x86.ASETLT,
5231 reg: regInfo{
5232 outputs: []outputInfo{
5233 {0, 239},
5234 },
5235 },
5236 },
5237 {
5238 name: "SETLE",
5239 argLen: 1,
5240 asm: x86.ASETLE,
5241 reg: regInfo{
5242 outputs: []outputInfo{
5243 {0, 239},
5244 },
5245 },
5246 },
5247 {
5248 name: "SETG",
5249 argLen: 1,
5250 asm: x86.ASETGT,
5251 reg: regInfo{
5252 outputs: []outputInfo{
5253 {0, 239},
5254 },
5255 },
5256 },
5257 {
5258 name: "SETGE",
5259 argLen: 1,
5260 asm: x86.ASETGE,
5261 reg: regInfo{
5262 outputs: []outputInfo{
5263 {0, 239},
5264 },
5265 },
5266 },
5267 {
5268 name: "SETB",
5269 argLen: 1,
5270 asm: x86.ASETCS,
5271 reg: regInfo{
5272 outputs: []outputInfo{
5273 {0, 239},
5274 },
5275 },
5276 },
5277 {
5278 name: "SETBE",
5279 argLen: 1,
5280 asm: x86.ASETLS,
5281 reg: regInfo{
5282 outputs: []outputInfo{
5283 {0, 239},
5284 },
5285 },
5286 },
5287 {
5288 name: "SETA",
5289 argLen: 1,
5290 asm: x86.ASETHI,
5291 reg: regInfo{
5292 outputs: []outputInfo{
5293 {0, 239},
5294 },
5295 },
5296 },
5297 {
5298 name: "SETAE",
5299 argLen: 1,
5300 asm: x86.ASETCC,
5301 reg: regInfo{
5302 outputs: []outputInfo{
5303 {0, 239},
5304 },
5305 },
5306 },
5307 {
5308 name: "SETO",
5309 argLen: 1,
5310 asm: x86.ASETOS,
5311 reg: regInfo{
5312 outputs: []outputInfo{
5313 {0, 239},
5314 },
5315 },
5316 },
5317 {
5318 name: "SETEQF",
5319 argLen: 1,
5320 clobberFlags: true,
5321 asm: x86.ASETEQ,
5322 reg: regInfo{
5323 clobbers: 1,
5324 outputs: []outputInfo{
5325 {0, 238},
5326 },
5327 },
5328 },
5329 {
5330 name: "SETNEF",
5331 argLen: 1,
5332 clobberFlags: true,
5333 asm: x86.ASETNE,
5334 reg: regInfo{
5335 clobbers: 1,
5336 outputs: []outputInfo{
5337 {0, 238},
5338 },
5339 },
5340 },
5341 {
5342 name: "SETORD",
5343 argLen: 1,
5344 asm: x86.ASETPC,
5345 reg: regInfo{
5346 outputs: []outputInfo{
5347 {0, 239},
5348 },
5349 },
5350 },
5351 {
5352 name: "SETNAN",
5353 argLen: 1,
5354 asm: x86.ASETPS,
5355 reg: regInfo{
5356 outputs: []outputInfo{
5357 {0, 239},
5358 },
5359 },
5360 },
5361 {
5362 name: "SETGF",
5363 argLen: 1,
5364 asm: x86.ASETHI,
5365 reg: regInfo{
5366 outputs: []outputInfo{
5367 {0, 239},
5368 },
5369 },
5370 },
5371 {
5372 name: "SETGEF",
5373 argLen: 1,
5374 asm: x86.ASETCC,
5375 reg: regInfo{
5376 outputs: []outputInfo{
5377 {0, 239},
5378 },
5379 },
5380 },
5381 {
5382 name: "MOVBLSX",
5383 argLen: 1,
5384 asm: x86.AMOVBLSX,
5385 reg: regInfo{
5386 inputs: []inputInfo{
5387 {0, 239},
5388 },
5389 outputs: []outputInfo{
5390 {0, 239},
5391 },
5392 },
5393 },
5394 {
5395 name: "MOVBLZX",
5396 argLen: 1,
5397 asm: x86.AMOVBLZX,
5398 reg: regInfo{
5399 inputs: []inputInfo{
5400 {0, 239},
5401 },
5402 outputs: []outputInfo{
5403 {0, 239},
5404 },
5405 },
5406 },
5407 {
5408 name: "MOVWLSX",
5409 argLen: 1,
5410 asm: x86.AMOVWLSX,
5411 reg: regInfo{
5412 inputs: []inputInfo{
5413 {0, 239},
5414 },
5415 outputs: []outputInfo{
5416 {0, 239},
5417 },
5418 },
5419 },
5420 {
5421 name: "MOVWLZX",
5422 argLen: 1,
5423 asm: x86.AMOVWLZX,
5424 reg: regInfo{
5425 inputs: []inputInfo{
5426 {0, 239},
5427 },
5428 outputs: []outputInfo{
5429 {0, 239},
5430 },
5431 },
5432 },
5433 {
5434 name: "MOVLconst",
5435 auxType: auxInt32,
5436 argLen: 0,
5437 rematerializeable: true,
5438 asm: x86.AMOVL,
5439 reg: regInfo{
5440 outputs: []outputInfo{
5441 {0, 239},
5442 },
5443 },
5444 },
5445 {
5446 name: "CVTTSD2SL",
5447 argLen: 1,
5448 asm: x86.ACVTTSD2SL,
5449 reg: regInfo{
5450 inputs: []inputInfo{
5451 {0, 65280},
5452 },
5453 outputs: []outputInfo{
5454 {0, 239},
5455 },
5456 },
5457 },
5458 {
5459 name: "CVTTSS2SL",
5460 argLen: 1,
5461 asm: x86.ACVTTSS2SL,
5462 reg: regInfo{
5463 inputs: []inputInfo{
5464 {0, 65280},
5465 },
5466 outputs: []outputInfo{
5467 {0, 239},
5468 },
5469 },
5470 },
5471 {
5472 name: "CVTSL2SS",
5473 argLen: 1,
5474 asm: x86.ACVTSL2SS,
5475 reg: regInfo{
5476 inputs: []inputInfo{
5477 {0, 239},
5478 },
5479 outputs: []outputInfo{
5480 {0, 65280},
5481 },
5482 },
5483 },
5484 {
5485 name: "CVTSL2SD",
5486 argLen: 1,
5487 asm: x86.ACVTSL2SD,
5488 reg: regInfo{
5489 inputs: []inputInfo{
5490 {0, 239},
5491 },
5492 outputs: []outputInfo{
5493 {0, 65280},
5494 },
5495 },
5496 },
5497 {
5498 name: "CVTSD2SS",
5499 argLen: 1,
5500 asm: x86.ACVTSD2SS,
5501 reg: regInfo{
5502 inputs: []inputInfo{
5503 {0, 65280},
5504 },
5505 outputs: []outputInfo{
5506 {0, 65280},
5507 },
5508 },
5509 },
5510 {
5511 name: "CVTSS2SD",
5512 argLen: 1,
5513 asm: x86.ACVTSS2SD,
5514 reg: regInfo{
5515 inputs: []inputInfo{
5516 {0, 65280},
5517 },
5518 outputs: []outputInfo{
5519 {0, 65280},
5520 },
5521 },
5522 },
5523 {
5524 name: "PXOR",
5525 argLen: 2,
5526 commutative: true,
5527 resultInArg0: true,
5528 asm: x86.APXOR,
5529 reg: regInfo{
5530 inputs: []inputInfo{
5531 {0, 65280},
5532 {1, 65280},
5533 },
5534 outputs: []outputInfo{
5535 {0, 65280},
5536 },
5537 },
5538 },
5539 {
5540 name: "LEAL",
5541 auxType: auxSymOff,
5542 argLen: 1,
5543 rematerializeable: true,
5544 symEffect: SymAddr,
5545 reg: regInfo{
5546 inputs: []inputInfo{
5547 {0, 65791},
5548 },
5549 outputs: []outputInfo{
5550 {0, 239},
5551 },
5552 },
5553 },
5554 {
5555 name: "LEAL1",
5556 auxType: auxSymOff,
5557 argLen: 2,
5558 commutative: true,
5559 symEffect: SymAddr,
5560 reg: regInfo{
5561 inputs: []inputInfo{
5562 {1, 255},
5563 {0, 65791},
5564 },
5565 outputs: []outputInfo{
5566 {0, 239},
5567 },
5568 },
5569 },
5570 {
5571 name: "LEAL2",
5572 auxType: auxSymOff,
5573 argLen: 2,
5574 symEffect: SymAddr,
5575 reg: regInfo{
5576 inputs: []inputInfo{
5577 {1, 255},
5578 {0, 65791},
5579 },
5580 outputs: []outputInfo{
5581 {0, 239},
5582 },
5583 },
5584 },
5585 {
5586 name: "LEAL4",
5587 auxType: auxSymOff,
5588 argLen: 2,
5589 symEffect: SymAddr,
5590 reg: regInfo{
5591 inputs: []inputInfo{
5592 {1, 255},
5593 {0, 65791},
5594 },
5595 outputs: []outputInfo{
5596 {0, 239},
5597 },
5598 },
5599 },
5600 {
5601 name: "LEAL8",
5602 auxType: auxSymOff,
5603 argLen: 2,
5604 symEffect: SymAddr,
5605 reg: regInfo{
5606 inputs: []inputInfo{
5607 {1, 255},
5608 {0, 65791},
5609 },
5610 outputs: []outputInfo{
5611 {0, 239},
5612 },
5613 },
5614 },
5615 {
5616 name: "MOVBload",
5617 auxType: auxSymOff,
5618 argLen: 2,
5619 faultOnNilArg0: true,
5620 symEffect: SymRead,
5621 asm: x86.AMOVBLZX,
5622 reg: regInfo{
5623 inputs: []inputInfo{
5624 {0, 65791},
5625 },
5626 outputs: []outputInfo{
5627 {0, 239},
5628 },
5629 },
5630 },
5631 {
5632 name: "MOVBLSXload",
5633 auxType: auxSymOff,
5634 argLen: 2,
5635 faultOnNilArg0: true,
5636 symEffect: SymRead,
5637 asm: x86.AMOVBLSX,
5638 reg: regInfo{
5639 inputs: []inputInfo{
5640 {0, 65791},
5641 },
5642 outputs: []outputInfo{
5643 {0, 239},
5644 },
5645 },
5646 },
5647 {
5648 name: "MOVWload",
5649 auxType: auxSymOff,
5650 argLen: 2,
5651 faultOnNilArg0: true,
5652 symEffect: SymRead,
5653 asm: x86.AMOVWLZX,
5654 reg: regInfo{
5655 inputs: []inputInfo{
5656 {0, 65791},
5657 },
5658 outputs: []outputInfo{
5659 {0, 239},
5660 },
5661 },
5662 },
5663 {
5664 name: "MOVWLSXload",
5665 auxType: auxSymOff,
5666 argLen: 2,
5667 faultOnNilArg0: true,
5668 symEffect: SymRead,
5669 asm: x86.AMOVWLSX,
5670 reg: regInfo{
5671 inputs: []inputInfo{
5672 {0, 65791},
5673 },
5674 outputs: []outputInfo{
5675 {0, 239},
5676 },
5677 },
5678 },
5679 {
5680 name: "MOVLload",
5681 auxType: auxSymOff,
5682 argLen: 2,
5683 faultOnNilArg0: true,
5684 symEffect: SymRead,
5685 asm: x86.AMOVL,
5686 reg: regInfo{
5687 inputs: []inputInfo{
5688 {0, 65791},
5689 },
5690 outputs: []outputInfo{
5691 {0, 239},
5692 },
5693 },
5694 },
5695 {
5696 name: "MOVBstore",
5697 auxType: auxSymOff,
5698 argLen: 3,
5699 faultOnNilArg0: true,
5700 symEffect: SymWrite,
5701 asm: x86.AMOVB,
5702 reg: regInfo{
5703 inputs: []inputInfo{
5704 {1, 255},
5705 {0, 65791},
5706 },
5707 },
5708 },
5709 {
5710 name: "MOVWstore",
5711 auxType: auxSymOff,
5712 argLen: 3,
5713 faultOnNilArg0: true,
5714 symEffect: SymWrite,
5715 asm: x86.AMOVW,
5716 reg: regInfo{
5717 inputs: []inputInfo{
5718 {1, 255},
5719 {0, 65791},
5720 },
5721 },
5722 },
5723 {
5724 name: "MOVLstore",
5725 auxType: auxSymOff,
5726 argLen: 3,
5727 faultOnNilArg0: true,
5728 symEffect: SymWrite,
5729 asm: x86.AMOVL,
5730 reg: regInfo{
5731 inputs: []inputInfo{
5732 {1, 255},
5733 {0, 65791},
5734 },
5735 },
5736 },
5737 {
5738 name: "ADDLmodify",
5739 auxType: auxSymOff,
5740 argLen: 3,
5741 clobberFlags: true,
5742 faultOnNilArg0: true,
5743 symEffect: SymRead | SymWrite,
5744 asm: x86.AADDL,
5745 reg: regInfo{
5746 inputs: []inputInfo{
5747 {1, 255},
5748 {0, 65791},
5749 },
5750 },
5751 },
5752 {
5753 name: "SUBLmodify",
5754 auxType: auxSymOff,
5755 argLen: 3,
5756 clobberFlags: true,
5757 faultOnNilArg0: true,
5758 symEffect: SymRead | SymWrite,
5759 asm: x86.ASUBL,
5760 reg: regInfo{
5761 inputs: []inputInfo{
5762 {1, 255},
5763 {0, 65791},
5764 },
5765 },
5766 },
5767 {
5768 name: "ANDLmodify",
5769 auxType: auxSymOff,
5770 argLen: 3,
5771 clobberFlags: true,
5772 faultOnNilArg0: true,
5773 symEffect: SymRead | SymWrite,
5774 asm: x86.AANDL,
5775 reg: regInfo{
5776 inputs: []inputInfo{
5777 {1, 255},
5778 {0, 65791},
5779 },
5780 },
5781 },
5782 {
5783 name: "ORLmodify",
5784 auxType: auxSymOff,
5785 argLen: 3,
5786 clobberFlags: true,
5787 faultOnNilArg0: true,
5788 symEffect: SymRead | SymWrite,
5789 asm: x86.AORL,
5790 reg: regInfo{
5791 inputs: []inputInfo{
5792 {1, 255},
5793 {0, 65791},
5794 },
5795 },
5796 },
5797 {
5798 name: "XORLmodify",
5799 auxType: auxSymOff,
5800 argLen: 3,
5801 clobberFlags: true,
5802 faultOnNilArg0: true,
5803 symEffect: SymRead | SymWrite,
5804 asm: x86.AXORL,
5805 reg: regInfo{
5806 inputs: []inputInfo{
5807 {1, 255},
5808 {0, 65791},
5809 },
5810 },
5811 },
5812 {
5813 name: "ADDLmodifyidx4",
5814 auxType: auxSymOff,
5815 argLen: 4,
5816 clobberFlags: true,
5817 symEffect: SymRead | SymWrite,
5818 asm: x86.AADDL,
5819 reg: regInfo{
5820 inputs: []inputInfo{
5821 {1, 255},
5822 {2, 255},
5823 {0, 65791},
5824 },
5825 },
5826 },
5827 {
5828 name: "SUBLmodifyidx4",
5829 auxType: auxSymOff,
5830 argLen: 4,
5831 clobberFlags: true,
5832 symEffect: SymRead | SymWrite,
5833 asm: x86.ASUBL,
5834 reg: regInfo{
5835 inputs: []inputInfo{
5836 {1, 255},
5837 {2, 255},
5838 {0, 65791},
5839 },
5840 },
5841 },
5842 {
5843 name: "ANDLmodifyidx4",
5844 auxType: auxSymOff,
5845 argLen: 4,
5846 clobberFlags: true,
5847 symEffect: SymRead | SymWrite,
5848 asm: x86.AANDL,
5849 reg: regInfo{
5850 inputs: []inputInfo{
5851 {1, 255},
5852 {2, 255},
5853 {0, 65791},
5854 },
5855 },
5856 },
5857 {
5858 name: "ORLmodifyidx4",
5859 auxType: auxSymOff,
5860 argLen: 4,
5861 clobberFlags: true,
5862 symEffect: SymRead | SymWrite,
5863 asm: x86.AORL,
5864 reg: regInfo{
5865 inputs: []inputInfo{
5866 {1, 255},
5867 {2, 255},
5868 {0, 65791},
5869 },
5870 },
5871 },
5872 {
5873 name: "XORLmodifyidx4",
5874 auxType: auxSymOff,
5875 argLen: 4,
5876 clobberFlags: true,
5877 symEffect: SymRead | SymWrite,
5878 asm: x86.AXORL,
5879 reg: regInfo{
5880 inputs: []inputInfo{
5881 {1, 255},
5882 {2, 255},
5883 {0, 65791},
5884 },
5885 },
5886 },
5887 {
5888 name: "ADDLconstmodify",
5889 auxType: auxSymValAndOff,
5890 argLen: 2,
5891 clobberFlags: true,
5892 faultOnNilArg0: true,
5893 symEffect: SymRead | SymWrite,
5894 asm: x86.AADDL,
5895 reg: regInfo{
5896 inputs: []inputInfo{
5897 {0, 65791},
5898 },
5899 },
5900 },
5901 {
5902 name: "ANDLconstmodify",
5903 auxType: auxSymValAndOff,
5904 argLen: 2,
5905 clobberFlags: true,
5906 faultOnNilArg0: true,
5907 symEffect: SymRead | SymWrite,
5908 asm: x86.AANDL,
5909 reg: regInfo{
5910 inputs: []inputInfo{
5911 {0, 65791},
5912 },
5913 },
5914 },
5915 {
5916 name: "ORLconstmodify",
5917 auxType: auxSymValAndOff,
5918 argLen: 2,
5919 clobberFlags: true,
5920 faultOnNilArg0: true,
5921 symEffect: SymRead | SymWrite,
5922 asm: x86.AORL,
5923 reg: regInfo{
5924 inputs: []inputInfo{
5925 {0, 65791},
5926 },
5927 },
5928 },
5929 {
5930 name: "XORLconstmodify",
5931 auxType: auxSymValAndOff,
5932 argLen: 2,
5933 clobberFlags: true,
5934 faultOnNilArg0: true,
5935 symEffect: SymRead | SymWrite,
5936 asm: x86.AXORL,
5937 reg: regInfo{
5938 inputs: []inputInfo{
5939 {0, 65791},
5940 },
5941 },
5942 },
5943 {
5944 name: "ADDLconstmodifyidx4",
5945 auxType: auxSymValAndOff,
5946 argLen: 3,
5947 clobberFlags: true,
5948 symEffect: SymRead | SymWrite,
5949 asm: x86.AADDL,
5950 reg: regInfo{
5951 inputs: []inputInfo{
5952 {1, 255},
5953 {0, 65791},
5954 },
5955 },
5956 },
5957 {
5958 name: "ANDLconstmodifyidx4",
5959 auxType: auxSymValAndOff,
5960 argLen: 3,
5961 clobberFlags: true,
5962 symEffect: SymRead | SymWrite,
5963 asm: x86.AANDL,
5964 reg: regInfo{
5965 inputs: []inputInfo{
5966 {1, 255},
5967 {0, 65791},
5968 },
5969 },
5970 },
5971 {
5972 name: "ORLconstmodifyidx4",
5973 auxType: auxSymValAndOff,
5974 argLen: 3,
5975 clobberFlags: true,
5976 symEffect: SymRead | SymWrite,
5977 asm: x86.AORL,
5978 reg: regInfo{
5979 inputs: []inputInfo{
5980 {1, 255},
5981 {0, 65791},
5982 },
5983 },
5984 },
5985 {
5986 name: "XORLconstmodifyidx4",
5987 auxType: auxSymValAndOff,
5988 argLen: 3,
5989 clobberFlags: true,
5990 symEffect: SymRead | SymWrite,
5991 asm: x86.AXORL,
5992 reg: regInfo{
5993 inputs: []inputInfo{
5994 {1, 255},
5995 {0, 65791},
5996 },
5997 },
5998 },
5999 {
6000 name: "MOVBloadidx1",
6001 auxType: auxSymOff,
6002 argLen: 3,
6003 commutative: true,
6004 symEffect: SymRead,
6005 asm: x86.AMOVBLZX,
6006 reg: regInfo{
6007 inputs: []inputInfo{
6008 {1, 255},
6009 {0, 65791},
6010 },
6011 outputs: []outputInfo{
6012 {0, 239},
6013 },
6014 },
6015 },
6016 {
6017 name: "MOVWloadidx1",
6018 auxType: auxSymOff,
6019 argLen: 3,
6020 commutative: true,
6021 symEffect: SymRead,
6022 asm: x86.AMOVWLZX,
6023 reg: regInfo{
6024 inputs: []inputInfo{
6025 {1, 255},
6026 {0, 65791},
6027 },
6028 outputs: []outputInfo{
6029 {0, 239},
6030 },
6031 },
6032 },
6033 {
6034 name: "MOVWloadidx2",
6035 auxType: auxSymOff,
6036 argLen: 3,
6037 symEffect: SymRead,
6038 asm: x86.AMOVWLZX,
6039 reg: regInfo{
6040 inputs: []inputInfo{
6041 {1, 255},
6042 {0, 65791},
6043 },
6044 outputs: []outputInfo{
6045 {0, 239},
6046 },
6047 },
6048 },
6049 {
6050 name: "MOVLloadidx1",
6051 auxType: auxSymOff,
6052 argLen: 3,
6053 commutative: true,
6054 symEffect: SymRead,
6055 asm: x86.AMOVL,
6056 reg: regInfo{
6057 inputs: []inputInfo{
6058 {1, 255},
6059 {0, 65791},
6060 },
6061 outputs: []outputInfo{
6062 {0, 239},
6063 },
6064 },
6065 },
6066 {
6067 name: "MOVLloadidx4",
6068 auxType: auxSymOff,
6069 argLen: 3,
6070 symEffect: SymRead,
6071 asm: x86.AMOVL,
6072 reg: regInfo{
6073 inputs: []inputInfo{
6074 {1, 255},
6075 {0, 65791},
6076 },
6077 outputs: []outputInfo{
6078 {0, 239},
6079 },
6080 },
6081 },
6082 {
6083 name: "MOVBstoreidx1",
6084 auxType: auxSymOff,
6085 argLen: 4,
6086 commutative: true,
6087 symEffect: SymWrite,
6088 asm: x86.AMOVB,
6089 reg: regInfo{
6090 inputs: []inputInfo{
6091 {1, 255},
6092 {2, 255},
6093 {0, 65791},
6094 },
6095 },
6096 },
6097 {
6098 name: "MOVWstoreidx1",
6099 auxType: auxSymOff,
6100 argLen: 4,
6101 commutative: true,
6102 symEffect: SymWrite,
6103 asm: x86.AMOVW,
6104 reg: regInfo{
6105 inputs: []inputInfo{
6106 {1, 255},
6107 {2, 255},
6108 {0, 65791},
6109 },
6110 },
6111 },
6112 {
6113 name: "MOVWstoreidx2",
6114 auxType: auxSymOff,
6115 argLen: 4,
6116 symEffect: SymWrite,
6117 asm: x86.AMOVW,
6118 reg: regInfo{
6119 inputs: []inputInfo{
6120 {1, 255},
6121 {2, 255},
6122 {0, 65791},
6123 },
6124 },
6125 },
6126 {
6127 name: "MOVLstoreidx1",
6128 auxType: auxSymOff,
6129 argLen: 4,
6130 commutative: true,
6131 symEffect: SymWrite,
6132 asm: x86.AMOVL,
6133 reg: regInfo{
6134 inputs: []inputInfo{
6135 {1, 255},
6136 {2, 255},
6137 {0, 65791},
6138 },
6139 },
6140 },
6141 {
6142 name: "MOVLstoreidx4",
6143 auxType: auxSymOff,
6144 argLen: 4,
6145 symEffect: SymWrite,
6146 asm: x86.AMOVL,
6147 reg: regInfo{
6148 inputs: []inputInfo{
6149 {1, 255},
6150 {2, 255},
6151 {0, 65791},
6152 },
6153 },
6154 },
6155 {
6156 name: "MOVBstoreconst",
6157 auxType: auxSymValAndOff,
6158 argLen: 2,
6159 faultOnNilArg0: true,
6160 symEffect: SymWrite,
6161 asm: x86.AMOVB,
6162 reg: regInfo{
6163 inputs: []inputInfo{
6164 {0, 65791},
6165 },
6166 },
6167 },
6168 {
6169 name: "MOVWstoreconst",
6170 auxType: auxSymValAndOff,
6171 argLen: 2,
6172 faultOnNilArg0: true,
6173 symEffect: SymWrite,
6174 asm: x86.AMOVW,
6175 reg: regInfo{
6176 inputs: []inputInfo{
6177 {0, 65791},
6178 },
6179 },
6180 },
6181 {
6182 name: "MOVLstoreconst",
6183 auxType: auxSymValAndOff,
6184 argLen: 2,
6185 faultOnNilArg0: true,
6186 symEffect: SymWrite,
6187 asm: x86.AMOVL,
6188 reg: regInfo{
6189 inputs: []inputInfo{
6190 {0, 65791},
6191 },
6192 },
6193 },
6194 {
6195 name: "MOVBstoreconstidx1",
6196 auxType: auxSymValAndOff,
6197 argLen: 3,
6198 symEffect: SymWrite,
6199 asm: x86.AMOVB,
6200 reg: regInfo{
6201 inputs: []inputInfo{
6202 {1, 255},
6203 {0, 65791},
6204 },
6205 },
6206 },
6207 {
6208 name: "MOVWstoreconstidx1",
6209 auxType: auxSymValAndOff,
6210 argLen: 3,
6211 symEffect: SymWrite,
6212 asm: x86.AMOVW,
6213 reg: regInfo{
6214 inputs: []inputInfo{
6215 {1, 255},
6216 {0, 65791},
6217 },
6218 },
6219 },
6220 {
6221 name: "MOVWstoreconstidx2",
6222 auxType: auxSymValAndOff,
6223 argLen: 3,
6224 symEffect: SymWrite,
6225 asm: x86.AMOVW,
6226 reg: regInfo{
6227 inputs: []inputInfo{
6228 {1, 255},
6229 {0, 65791},
6230 },
6231 },
6232 },
6233 {
6234 name: "MOVLstoreconstidx1",
6235 auxType: auxSymValAndOff,
6236 argLen: 3,
6237 symEffect: SymWrite,
6238 asm: x86.AMOVL,
6239 reg: regInfo{
6240 inputs: []inputInfo{
6241 {1, 255},
6242 {0, 65791},
6243 },
6244 },
6245 },
6246 {
6247 name: "MOVLstoreconstidx4",
6248 auxType: auxSymValAndOff,
6249 argLen: 3,
6250 symEffect: SymWrite,
6251 asm: x86.AMOVL,
6252 reg: regInfo{
6253 inputs: []inputInfo{
6254 {1, 255},
6255 {0, 65791},
6256 },
6257 },
6258 },
6259 {
6260 name: "DUFFZERO",
6261 auxType: auxInt64,
6262 argLen: 3,
6263 faultOnNilArg0: true,
6264 reg: regInfo{
6265 inputs: []inputInfo{
6266 {0, 128},
6267 {1, 1},
6268 },
6269 clobbers: 130,
6270 },
6271 },
6272 {
6273 name: "REPSTOSL",
6274 argLen: 4,
6275 faultOnNilArg0: true,
6276 reg: regInfo{
6277 inputs: []inputInfo{
6278 {0, 128},
6279 {1, 2},
6280 {2, 1},
6281 },
6282 clobbers: 130,
6283 },
6284 },
6285 {
6286 name: "CALLstatic",
6287 auxType: auxCallOff,
6288 argLen: 1,
6289 clobberFlags: true,
6290 call: true,
6291 reg: regInfo{
6292 clobbers: 65519,
6293 },
6294 },
6295 {
6296 name: "CALLtail",
6297 auxType: auxCallOff,
6298 argLen: 1,
6299 clobberFlags: true,
6300 call: true,
6301 tailCall: true,
6302 reg: regInfo{
6303 clobbers: 65519,
6304 },
6305 },
6306 {
6307 name: "CALLclosure",
6308 auxType: auxCallOff,
6309 argLen: 3,
6310 clobberFlags: true,
6311 call: true,
6312 reg: regInfo{
6313 inputs: []inputInfo{
6314 {1, 4},
6315 {0, 255},
6316 },
6317 clobbers: 65519,
6318 },
6319 },
6320 {
6321 name: "CALLinter",
6322 auxType: auxCallOff,
6323 argLen: 2,
6324 clobberFlags: true,
6325 call: true,
6326 reg: regInfo{
6327 inputs: []inputInfo{
6328 {0, 239},
6329 },
6330 clobbers: 65519,
6331 },
6332 },
6333 {
6334 name: "DUFFCOPY",
6335 auxType: auxInt64,
6336 argLen: 3,
6337 clobberFlags: true,
6338 faultOnNilArg0: true,
6339 faultOnNilArg1: true,
6340 reg: regInfo{
6341 inputs: []inputInfo{
6342 {0, 128},
6343 {1, 64},
6344 },
6345 clobbers: 194,
6346 },
6347 },
6348 {
6349 name: "REPMOVSL",
6350 argLen: 4,
6351 faultOnNilArg0: true,
6352 faultOnNilArg1: true,
6353 reg: regInfo{
6354 inputs: []inputInfo{
6355 {0, 128},
6356 {1, 64},
6357 {2, 2},
6358 },
6359 clobbers: 194,
6360 },
6361 },
6362 {
6363 name: "InvertFlags",
6364 argLen: 1,
6365 reg: regInfo{},
6366 },
6367 {
6368 name: "LoweredGetG",
6369 argLen: 1,
6370 reg: regInfo{
6371 outputs: []outputInfo{
6372 {0, 239},
6373 },
6374 },
6375 },
6376 {
6377 name: "LoweredGetClosurePtr",
6378 argLen: 0,
6379 zeroWidth: true,
6380 reg: regInfo{
6381 outputs: []outputInfo{
6382 {0, 4},
6383 },
6384 },
6385 },
6386 {
6387 name: "LoweredGetCallerPC",
6388 argLen: 0,
6389 rematerializeable: true,
6390 reg: regInfo{
6391 outputs: []outputInfo{
6392 {0, 239},
6393 },
6394 },
6395 },
6396 {
6397 name: "LoweredGetCallerSP",
6398 argLen: 1,
6399 rematerializeable: true,
6400 reg: regInfo{
6401 outputs: []outputInfo{
6402 {0, 239},
6403 },
6404 },
6405 },
6406 {
6407 name: "LoweredNilCheck",
6408 argLen: 2,
6409 clobberFlags: true,
6410 nilCheck: true,
6411 faultOnNilArg0: true,
6412 reg: regInfo{
6413 inputs: []inputInfo{
6414 {0, 255},
6415 },
6416 },
6417 },
6418 {
6419 name: "LoweredWB",
6420 auxType: auxInt64,
6421 argLen: 1,
6422 clobberFlags: true,
6423 reg: regInfo{
6424 clobbers: 65280,
6425 outputs: []outputInfo{
6426 {0, 128},
6427 },
6428 },
6429 },
6430 {
6431 name: "LoweredPanicBoundsA",
6432 auxType: auxInt64,
6433 argLen: 3,
6434 call: true,
6435 reg: regInfo{
6436 inputs: []inputInfo{
6437 {0, 4},
6438 {1, 8},
6439 },
6440 },
6441 },
6442 {
6443 name: "LoweredPanicBoundsB",
6444 auxType: auxInt64,
6445 argLen: 3,
6446 call: true,
6447 reg: regInfo{
6448 inputs: []inputInfo{
6449 {0, 2},
6450 {1, 4},
6451 },
6452 },
6453 },
6454 {
6455 name: "LoweredPanicBoundsC",
6456 auxType: auxInt64,
6457 argLen: 3,
6458 call: true,
6459 reg: regInfo{
6460 inputs: []inputInfo{
6461 {0, 1},
6462 {1, 2},
6463 },
6464 },
6465 },
6466 {
6467 name: "LoweredPanicExtendA",
6468 auxType: auxInt64,
6469 argLen: 4,
6470 call: true,
6471 reg: regInfo{
6472 inputs: []inputInfo{
6473 {0, 64},
6474 {1, 4},
6475 {2, 8},
6476 },
6477 },
6478 },
6479 {
6480 name: "LoweredPanicExtendB",
6481 auxType: auxInt64,
6482 argLen: 4,
6483 call: true,
6484 reg: regInfo{
6485 inputs: []inputInfo{
6486 {0, 64},
6487 {1, 2},
6488 {2, 4},
6489 },
6490 },
6491 },
6492 {
6493 name: "LoweredPanicExtendC",
6494 auxType: auxInt64,
6495 argLen: 4,
6496 call: true,
6497 reg: regInfo{
6498 inputs: []inputInfo{
6499 {0, 64},
6500 {1, 1},
6501 {2, 2},
6502 },
6503 },
6504 },
6505 {
6506 name: "FlagEQ",
6507 argLen: 0,
6508 reg: regInfo{},
6509 },
6510 {
6511 name: "FlagLT_ULT",
6512 argLen: 0,
6513 reg: regInfo{},
6514 },
6515 {
6516 name: "FlagLT_UGT",
6517 argLen: 0,
6518 reg: regInfo{},
6519 },
6520 {
6521 name: "FlagGT_UGT",
6522 argLen: 0,
6523 reg: regInfo{},
6524 },
6525 {
6526 name: "FlagGT_ULT",
6527 argLen: 0,
6528 reg: regInfo{},
6529 },
6530 {
6531 name: "MOVSSconst1",
6532 auxType: auxFloat32,
6533 argLen: 0,
6534 reg: regInfo{
6535 outputs: []outputInfo{
6536 {0, 239},
6537 },
6538 },
6539 },
6540 {
6541 name: "MOVSDconst1",
6542 auxType: auxFloat64,
6543 argLen: 0,
6544 reg: regInfo{
6545 outputs: []outputInfo{
6546 {0, 239},
6547 },
6548 },
6549 },
6550 {
6551 name: "MOVSSconst2",
6552 argLen: 1,
6553 asm: x86.AMOVSS,
6554 reg: regInfo{
6555 inputs: []inputInfo{
6556 {0, 239},
6557 },
6558 outputs: []outputInfo{
6559 {0, 65280},
6560 },
6561 },
6562 },
6563 {
6564 name: "MOVSDconst2",
6565 argLen: 1,
6566 asm: x86.AMOVSD,
6567 reg: regInfo{
6568 inputs: []inputInfo{
6569 {0, 239},
6570 },
6571 outputs: []outputInfo{
6572 {0, 65280},
6573 },
6574 },
6575 },
6576
6577 {
6578 name: "ADDSS",
6579 argLen: 2,
6580 commutative: true,
6581 resultInArg0: true,
6582 asm: x86.AADDSS,
6583 reg: regInfo{
6584 inputs: []inputInfo{
6585 {0, 2147418112},
6586 {1, 2147418112},
6587 },
6588 outputs: []outputInfo{
6589 {0, 2147418112},
6590 },
6591 },
6592 },
6593 {
6594 name: "ADDSD",
6595 argLen: 2,
6596 commutative: true,
6597 resultInArg0: true,
6598 asm: x86.AADDSD,
6599 reg: regInfo{
6600 inputs: []inputInfo{
6601 {0, 2147418112},
6602 {1, 2147418112},
6603 },
6604 outputs: []outputInfo{
6605 {0, 2147418112},
6606 },
6607 },
6608 },
6609 {
6610 name: "SUBSS",
6611 argLen: 2,
6612 resultInArg0: true,
6613 asm: x86.ASUBSS,
6614 reg: regInfo{
6615 inputs: []inputInfo{
6616 {0, 2147418112},
6617 {1, 2147418112},
6618 },
6619 outputs: []outputInfo{
6620 {0, 2147418112},
6621 },
6622 },
6623 },
6624 {
6625 name: "SUBSD",
6626 argLen: 2,
6627 resultInArg0: true,
6628 asm: x86.ASUBSD,
6629 reg: regInfo{
6630 inputs: []inputInfo{
6631 {0, 2147418112},
6632 {1, 2147418112},
6633 },
6634 outputs: []outputInfo{
6635 {0, 2147418112},
6636 },
6637 },
6638 },
6639 {
6640 name: "MULSS",
6641 argLen: 2,
6642 commutative: true,
6643 resultInArg0: true,
6644 asm: x86.AMULSS,
6645 reg: regInfo{
6646 inputs: []inputInfo{
6647 {0, 2147418112},
6648 {1, 2147418112},
6649 },
6650 outputs: []outputInfo{
6651 {0, 2147418112},
6652 },
6653 },
6654 },
6655 {
6656 name: "MULSD",
6657 argLen: 2,
6658 commutative: true,
6659 resultInArg0: true,
6660 asm: x86.AMULSD,
6661 reg: regInfo{
6662 inputs: []inputInfo{
6663 {0, 2147418112},
6664 {1, 2147418112},
6665 },
6666 outputs: []outputInfo{
6667 {0, 2147418112},
6668 },
6669 },
6670 },
6671 {
6672 name: "DIVSS",
6673 argLen: 2,
6674 resultInArg0: true,
6675 asm: x86.ADIVSS,
6676 reg: regInfo{
6677 inputs: []inputInfo{
6678 {0, 2147418112},
6679 {1, 2147418112},
6680 },
6681 outputs: []outputInfo{
6682 {0, 2147418112},
6683 },
6684 },
6685 },
6686 {
6687 name: "DIVSD",
6688 argLen: 2,
6689 resultInArg0: true,
6690 asm: x86.ADIVSD,
6691 reg: regInfo{
6692 inputs: []inputInfo{
6693 {0, 2147418112},
6694 {1, 2147418112},
6695 },
6696 outputs: []outputInfo{
6697 {0, 2147418112},
6698 },
6699 },
6700 },
6701 {
6702 name: "MOVSSload",
6703 auxType: auxSymOff,
6704 argLen: 2,
6705 faultOnNilArg0: true,
6706 symEffect: SymRead,
6707 asm: x86.AMOVSS,
6708 reg: regInfo{
6709 inputs: []inputInfo{
6710 {0, 4295016447},
6711 },
6712 outputs: []outputInfo{
6713 {0, 2147418112},
6714 },
6715 },
6716 },
6717 {
6718 name: "MOVSDload",
6719 auxType: auxSymOff,
6720 argLen: 2,
6721 faultOnNilArg0: true,
6722 symEffect: SymRead,
6723 asm: x86.AMOVSD,
6724 reg: regInfo{
6725 inputs: []inputInfo{
6726 {0, 4295016447},
6727 },
6728 outputs: []outputInfo{
6729 {0, 2147418112},
6730 },
6731 },
6732 },
6733 {
6734 name: "MOVSSconst",
6735 auxType: auxFloat32,
6736 argLen: 0,
6737 rematerializeable: true,
6738 asm: x86.AMOVSS,
6739 reg: regInfo{
6740 outputs: []outputInfo{
6741 {0, 2147418112},
6742 },
6743 },
6744 },
6745 {
6746 name: "MOVSDconst",
6747 auxType: auxFloat64,
6748 argLen: 0,
6749 rematerializeable: true,
6750 asm: x86.AMOVSD,
6751 reg: regInfo{
6752 outputs: []outputInfo{
6753 {0, 2147418112},
6754 },
6755 },
6756 },
6757 {
6758 name: "MOVSSloadidx1",
6759 auxType: auxSymOff,
6760 argLen: 3,
6761 symEffect: SymRead,
6762 asm: x86.AMOVSS,
6763 scale: 1,
6764 reg: regInfo{
6765 inputs: []inputInfo{
6766 {1, 49151},
6767 {0, 4295016447},
6768 },
6769 outputs: []outputInfo{
6770 {0, 2147418112},
6771 },
6772 },
6773 },
6774 {
6775 name: "MOVSSloadidx4",
6776 auxType: auxSymOff,
6777 argLen: 3,
6778 symEffect: SymRead,
6779 asm: x86.AMOVSS,
6780 scale: 4,
6781 reg: regInfo{
6782 inputs: []inputInfo{
6783 {1, 49151},
6784 {0, 4295016447},
6785 },
6786 outputs: []outputInfo{
6787 {0, 2147418112},
6788 },
6789 },
6790 },
6791 {
6792 name: "MOVSDloadidx1",
6793 auxType: auxSymOff,
6794 argLen: 3,
6795 symEffect: SymRead,
6796 asm: x86.AMOVSD,
6797 scale: 1,
6798 reg: regInfo{
6799 inputs: []inputInfo{
6800 {1, 49151},
6801 {0, 4295016447},
6802 },
6803 outputs: []outputInfo{
6804 {0, 2147418112},
6805 },
6806 },
6807 },
6808 {
6809 name: "MOVSDloadidx8",
6810 auxType: auxSymOff,
6811 argLen: 3,
6812 symEffect: SymRead,
6813 asm: x86.AMOVSD,
6814 scale: 8,
6815 reg: regInfo{
6816 inputs: []inputInfo{
6817 {1, 49151},
6818 {0, 4295016447},
6819 },
6820 outputs: []outputInfo{
6821 {0, 2147418112},
6822 },
6823 },
6824 },
6825 {
6826 name: "MOVSSstore",
6827 auxType: auxSymOff,
6828 argLen: 3,
6829 faultOnNilArg0: true,
6830 symEffect: SymWrite,
6831 asm: x86.AMOVSS,
6832 reg: regInfo{
6833 inputs: []inputInfo{
6834 {1, 2147418112},
6835 {0, 4295016447},
6836 },
6837 },
6838 },
6839 {
6840 name: "MOVSDstore",
6841 auxType: auxSymOff,
6842 argLen: 3,
6843 faultOnNilArg0: true,
6844 symEffect: SymWrite,
6845 asm: x86.AMOVSD,
6846 reg: regInfo{
6847 inputs: []inputInfo{
6848 {1, 2147418112},
6849 {0, 4295016447},
6850 },
6851 },
6852 },
6853 {
6854 name: "MOVSSstoreidx1",
6855 auxType: auxSymOff,
6856 argLen: 4,
6857 symEffect: SymWrite,
6858 asm: x86.AMOVSS,
6859 scale: 1,
6860 reg: regInfo{
6861 inputs: []inputInfo{
6862 {1, 49151},
6863 {2, 2147418112},
6864 {0, 4295016447},
6865 },
6866 },
6867 },
6868 {
6869 name: "MOVSSstoreidx4",
6870 auxType: auxSymOff,
6871 argLen: 4,
6872 symEffect: SymWrite,
6873 asm: x86.AMOVSS,
6874 scale: 4,
6875 reg: regInfo{
6876 inputs: []inputInfo{
6877 {1, 49151},
6878 {2, 2147418112},
6879 {0, 4295016447},
6880 },
6881 },
6882 },
6883 {
6884 name: "MOVSDstoreidx1",
6885 auxType: auxSymOff,
6886 argLen: 4,
6887 symEffect: SymWrite,
6888 asm: x86.AMOVSD,
6889 scale: 1,
6890 reg: regInfo{
6891 inputs: []inputInfo{
6892 {1, 49151},
6893 {2, 2147418112},
6894 {0, 4295016447},
6895 },
6896 },
6897 },
6898 {
6899 name: "MOVSDstoreidx8",
6900 auxType: auxSymOff,
6901 argLen: 4,
6902 symEffect: SymWrite,
6903 asm: x86.AMOVSD,
6904 scale: 8,
6905 reg: regInfo{
6906 inputs: []inputInfo{
6907 {1, 49151},
6908 {2, 2147418112},
6909 {0, 4295016447},
6910 },
6911 },
6912 },
6913 {
6914 name: "ADDSSload",
6915 auxType: auxSymOff,
6916 argLen: 3,
6917 resultInArg0: true,
6918 faultOnNilArg1: true,
6919 symEffect: SymRead,
6920 asm: x86.AADDSS,
6921 reg: regInfo{
6922 inputs: []inputInfo{
6923 {0, 2147418112},
6924 {1, 4295032831},
6925 },
6926 outputs: []outputInfo{
6927 {0, 2147418112},
6928 },
6929 },
6930 },
6931 {
6932 name: "ADDSDload",
6933 auxType: auxSymOff,
6934 argLen: 3,
6935 resultInArg0: true,
6936 faultOnNilArg1: true,
6937 symEffect: SymRead,
6938 asm: x86.AADDSD,
6939 reg: regInfo{
6940 inputs: []inputInfo{
6941 {0, 2147418112},
6942 {1, 4295032831},
6943 },
6944 outputs: []outputInfo{
6945 {0, 2147418112},
6946 },
6947 },
6948 },
6949 {
6950 name: "SUBSSload",
6951 auxType: auxSymOff,
6952 argLen: 3,
6953 resultInArg0: true,
6954 faultOnNilArg1: true,
6955 symEffect: SymRead,
6956 asm: x86.ASUBSS,
6957 reg: regInfo{
6958 inputs: []inputInfo{
6959 {0, 2147418112},
6960 {1, 4295032831},
6961 },
6962 outputs: []outputInfo{
6963 {0, 2147418112},
6964 },
6965 },
6966 },
6967 {
6968 name: "SUBSDload",
6969 auxType: auxSymOff,
6970 argLen: 3,
6971 resultInArg0: true,
6972 faultOnNilArg1: true,
6973 symEffect: SymRead,
6974 asm: x86.ASUBSD,
6975 reg: regInfo{
6976 inputs: []inputInfo{
6977 {0, 2147418112},
6978 {1, 4295032831},
6979 },
6980 outputs: []outputInfo{
6981 {0, 2147418112},
6982 },
6983 },
6984 },
6985 {
6986 name: "MULSSload",
6987 auxType: auxSymOff,
6988 argLen: 3,
6989 resultInArg0: true,
6990 faultOnNilArg1: true,
6991 symEffect: SymRead,
6992 asm: x86.AMULSS,
6993 reg: regInfo{
6994 inputs: []inputInfo{
6995 {0, 2147418112},
6996 {1, 4295032831},
6997 },
6998 outputs: []outputInfo{
6999 {0, 2147418112},
7000 },
7001 },
7002 },
7003 {
7004 name: "MULSDload",
7005 auxType: auxSymOff,
7006 argLen: 3,
7007 resultInArg0: true,
7008 faultOnNilArg1: true,
7009 symEffect: SymRead,
7010 asm: x86.AMULSD,
7011 reg: regInfo{
7012 inputs: []inputInfo{
7013 {0, 2147418112},
7014 {1, 4295032831},
7015 },
7016 outputs: []outputInfo{
7017 {0, 2147418112},
7018 },
7019 },
7020 },
7021 {
7022 name: "DIVSSload",
7023 auxType: auxSymOff,
7024 argLen: 3,
7025 resultInArg0: true,
7026 faultOnNilArg1: true,
7027 symEffect: SymRead,
7028 asm: x86.ADIVSS,
7029 reg: regInfo{
7030 inputs: []inputInfo{
7031 {0, 2147418112},
7032 {1, 4295032831},
7033 },
7034 outputs: []outputInfo{
7035 {0, 2147418112},
7036 },
7037 },
7038 },
7039 {
7040 name: "DIVSDload",
7041 auxType: auxSymOff,
7042 argLen: 3,
7043 resultInArg0: true,
7044 faultOnNilArg1: true,
7045 symEffect: SymRead,
7046 asm: x86.ADIVSD,
7047 reg: regInfo{
7048 inputs: []inputInfo{
7049 {0, 2147418112},
7050 {1, 4295032831},
7051 },
7052 outputs: []outputInfo{
7053 {0, 2147418112},
7054 },
7055 },
7056 },
7057 {
7058 name: "ADDSSloadidx1",
7059 auxType: auxSymOff,
7060 argLen: 4,
7061 resultInArg0: true,
7062 symEffect: SymRead,
7063 asm: x86.AADDSS,
7064 scale: 1,
7065 reg: regInfo{
7066 inputs: []inputInfo{
7067 {0, 2147418112},
7068 {2, 4295016447},
7069 {1, 4295032831},
7070 },
7071 outputs: []outputInfo{
7072 {0, 2147418112},
7073 },
7074 },
7075 },
7076 {
7077 name: "ADDSSloadidx4",
7078 auxType: auxSymOff,
7079 argLen: 4,
7080 resultInArg0: true,
7081 symEffect: SymRead,
7082 asm: x86.AADDSS,
7083 scale: 4,
7084 reg: regInfo{
7085 inputs: []inputInfo{
7086 {0, 2147418112},
7087 {2, 4295016447},
7088 {1, 4295032831},
7089 },
7090 outputs: []outputInfo{
7091 {0, 2147418112},
7092 },
7093 },
7094 },
7095 {
7096 name: "ADDSDloadidx1",
7097 auxType: auxSymOff,
7098 argLen: 4,
7099 resultInArg0: true,
7100 symEffect: SymRead,
7101 asm: x86.AADDSD,
7102 scale: 1,
7103 reg: regInfo{
7104 inputs: []inputInfo{
7105 {0, 2147418112},
7106 {2, 4295016447},
7107 {1, 4295032831},
7108 },
7109 outputs: []outputInfo{
7110 {0, 2147418112},
7111 },
7112 },
7113 },
7114 {
7115 name: "ADDSDloadidx8",
7116 auxType: auxSymOff,
7117 argLen: 4,
7118 resultInArg0: true,
7119 symEffect: SymRead,
7120 asm: x86.AADDSD,
7121 scale: 8,
7122 reg: regInfo{
7123 inputs: []inputInfo{
7124 {0, 2147418112},
7125 {2, 4295016447},
7126 {1, 4295032831},
7127 },
7128 outputs: []outputInfo{
7129 {0, 2147418112},
7130 },
7131 },
7132 },
7133 {
7134 name: "SUBSSloadidx1",
7135 auxType: auxSymOff,
7136 argLen: 4,
7137 resultInArg0: true,
7138 symEffect: SymRead,
7139 asm: x86.ASUBSS,
7140 scale: 1,
7141 reg: regInfo{
7142 inputs: []inputInfo{
7143 {0, 2147418112},
7144 {2, 4295016447},
7145 {1, 4295032831},
7146 },
7147 outputs: []outputInfo{
7148 {0, 2147418112},
7149 },
7150 },
7151 },
7152 {
7153 name: "SUBSSloadidx4",
7154 auxType: auxSymOff,
7155 argLen: 4,
7156 resultInArg0: true,
7157 symEffect: SymRead,
7158 asm: x86.ASUBSS,
7159 scale: 4,
7160 reg: regInfo{
7161 inputs: []inputInfo{
7162 {0, 2147418112},
7163 {2, 4295016447},
7164 {1, 4295032831},
7165 },
7166 outputs: []outputInfo{
7167 {0, 2147418112},
7168 },
7169 },
7170 },
7171 {
7172 name: "SUBSDloadidx1",
7173 auxType: auxSymOff,
7174 argLen: 4,
7175 resultInArg0: true,
7176 symEffect: SymRead,
7177 asm: x86.ASUBSD,
7178 scale: 1,
7179 reg: regInfo{
7180 inputs: []inputInfo{
7181 {0, 2147418112},
7182 {2, 4295016447},
7183 {1, 4295032831},
7184 },
7185 outputs: []outputInfo{
7186 {0, 2147418112},
7187 },
7188 },
7189 },
7190 {
7191 name: "SUBSDloadidx8",
7192 auxType: auxSymOff,
7193 argLen: 4,
7194 resultInArg0: true,
7195 symEffect: SymRead,
7196 asm: x86.ASUBSD,
7197 scale: 8,
7198 reg: regInfo{
7199 inputs: []inputInfo{
7200 {0, 2147418112},
7201 {2, 4295016447},
7202 {1, 4295032831},
7203 },
7204 outputs: []outputInfo{
7205 {0, 2147418112},
7206 },
7207 },
7208 },
7209 {
7210 name: "MULSSloadidx1",
7211 auxType: auxSymOff,
7212 argLen: 4,
7213 resultInArg0: true,
7214 symEffect: SymRead,
7215 asm: x86.AMULSS,
7216 scale: 1,
7217 reg: regInfo{
7218 inputs: []inputInfo{
7219 {0, 2147418112},
7220 {2, 4295016447},
7221 {1, 4295032831},
7222 },
7223 outputs: []outputInfo{
7224 {0, 2147418112},
7225 },
7226 },
7227 },
7228 {
7229 name: "MULSSloadidx4",
7230 auxType: auxSymOff,
7231 argLen: 4,
7232 resultInArg0: true,
7233 symEffect: SymRead,
7234 asm: x86.AMULSS,
7235 scale: 4,
7236 reg: regInfo{
7237 inputs: []inputInfo{
7238 {0, 2147418112},
7239 {2, 4295016447},
7240 {1, 4295032831},
7241 },
7242 outputs: []outputInfo{
7243 {0, 2147418112},
7244 },
7245 },
7246 },
7247 {
7248 name: "MULSDloadidx1",
7249 auxType: auxSymOff,
7250 argLen: 4,
7251 resultInArg0: true,
7252 symEffect: SymRead,
7253 asm: x86.AMULSD,
7254 scale: 1,
7255 reg: regInfo{
7256 inputs: []inputInfo{
7257 {0, 2147418112},
7258 {2, 4295016447},
7259 {1, 4295032831},
7260 },
7261 outputs: []outputInfo{
7262 {0, 2147418112},
7263 },
7264 },
7265 },
7266 {
7267 name: "MULSDloadidx8",
7268 auxType: auxSymOff,
7269 argLen: 4,
7270 resultInArg0: true,
7271 symEffect: SymRead,
7272 asm: x86.AMULSD,
7273 scale: 8,
7274 reg: regInfo{
7275 inputs: []inputInfo{
7276 {0, 2147418112},
7277 {2, 4295016447},
7278 {1, 4295032831},
7279 },
7280 outputs: []outputInfo{
7281 {0, 2147418112},
7282 },
7283 },
7284 },
7285 {
7286 name: "DIVSSloadidx1",
7287 auxType: auxSymOff,
7288 argLen: 4,
7289 resultInArg0: true,
7290 symEffect: SymRead,
7291 asm: x86.ADIVSS,
7292 scale: 1,
7293 reg: regInfo{
7294 inputs: []inputInfo{
7295 {0, 2147418112},
7296 {2, 4295016447},
7297 {1, 4295032831},
7298 },
7299 outputs: []outputInfo{
7300 {0, 2147418112},
7301 },
7302 },
7303 },
7304 {
7305 name: "DIVSSloadidx4",
7306 auxType: auxSymOff,
7307 argLen: 4,
7308 resultInArg0: true,
7309 symEffect: SymRead,
7310 asm: x86.ADIVSS,
7311 scale: 4,
7312 reg: regInfo{
7313 inputs: []inputInfo{
7314 {0, 2147418112},
7315 {2, 4295016447},
7316 {1, 4295032831},
7317 },
7318 outputs: []outputInfo{
7319 {0, 2147418112},
7320 },
7321 },
7322 },
7323 {
7324 name: "DIVSDloadidx1",
7325 auxType: auxSymOff,
7326 argLen: 4,
7327 resultInArg0: true,
7328 symEffect: SymRead,
7329 asm: x86.ADIVSD,
7330 scale: 1,
7331 reg: regInfo{
7332 inputs: []inputInfo{
7333 {0, 2147418112},
7334 {2, 4295016447},
7335 {1, 4295032831},
7336 },
7337 outputs: []outputInfo{
7338 {0, 2147418112},
7339 },
7340 },
7341 },
7342 {
7343 name: "DIVSDloadidx8",
7344 auxType: auxSymOff,
7345 argLen: 4,
7346 resultInArg0: true,
7347 symEffect: SymRead,
7348 asm: x86.ADIVSD,
7349 scale: 8,
7350 reg: regInfo{
7351 inputs: []inputInfo{
7352 {0, 2147418112},
7353 {2, 4295016447},
7354 {1, 4295032831},
7355 },
7356 outputs: []outputInfo{
7357 {0, 2147418112},
7358 },
7359 },
7360 },
7361 {
7362 name: "ADDQ",
7363 argLen: 2,
7364 commutative: true,
7365 clobberFlags: true,
7366 asm: x86.AADDQ,
7367 reg: regInfo{
7368 inputs: []inputInfo{
7369 {1, 49135},
7370 {0, 49151},
7371 },
7372 outputs: []outputInfo{
7373 {0, 49135},
7374 },
7375 },
7376 },
7377 {
7378 name: "ADDL",
7379 argLen: 2,
7380 commutative: true,
7381 clobberFlags: true,
7382 asm: x86.AADDL,
7383 reg: regInfo{
7384 inputs: []inputInfo{
7385 {1, 49135},
7386 {0, 49151},
7387 },
7388 outputs: []outputInfo{
7389 {0, 49135},
7390 },
7391 },
7392 },
7393 {
7394 name: "ADDQconst",
7395 auxType: auxInt32,
7396 argLen: 1,
7397 clobberFlags: true,
7398 asm: x86.AADDQ,
7399 reg: regInfo{
7400 inputs: []inputInfo{
7401 {0, 49151},
7402 },
7403 outputs: []outputInfo{
7404 {0, 49135},
7405 },
7406 },
7407 },
7408 {
7409 name: "ADDLconst",
7410 auxType: auxInt32,
7411 argLen: 1,
7412 clobberFlags: true,
7413 asm: x86.AADDL,
7414 reg: regInfo{
7415 inputs: []inputInfo{
7416 {0, 49151},
7417 },
7418 outputs: []outputInfo{
7419 {0, 49135},
7420 },
7421 },
7422 },
7423 {
7424 name: "ADDQconstmodify",
7425 auxType: auxSymValAndOff,
7426 argLen: 2,
7427 clobberFlags: true,
7428 faultOnNilArg0: true,
7429 symEffect: SymRead | SymWrite,
7430 asm: x86.AADDQ,
7431 reg: regInfo{
7432 inputs: []inputInfo{
7433 {0, 4295032831},
7434 },
7435 },
7436 },
7437 {
7438 name: "ADDLconstmodify",
7439 auxType: auxSymValAndOff,
7440 argLen: 2,
7441 clobberFlags: true,
7442 faultOnNilArg0: true,
7443 symEffect: SymRead | SymWrite,
7444 asm: x86.AADDL,
7445 reg: regInfo{
7446 inputs: []inputInfo{
7447 {0, 4295032831},
7448 },
7449 },
7450 },
7451 {
7452 name: "SUBQ",
7453 argLen: 2,
7454 resultInArg0: true,
7455 clobberFlags: true,
7456 asm: x86.ASUBQ,
7457 reg: regInfo{
7458 inputs: []inputInfo{
7459 {0, 49135},
7460 {1, 49135},
7461 },
7462 outputs: []outputInfo{
7463 {0, 49135},
7464 },
7465 },
7466 },
7467 {
7468 name: "SUBL",
7469 argLen: 2,
7470 resultInArg0: true,
7471 clobberFlags: true,
7472 asm: x86.ASUBL,
7473 reg: regInfo{
7474 inputs: []inputInfo{
7475 {0, 49135},
7476 {1, 49135},
7477 },
7478 outputs: []outputInfo{
7479 {0, 49135},
7480 },
7481 },
7482 },
7483 {
7484 name: "SUBQconst",
7485 auxType: auxInt32,
7486 argLen: 1,
7487 resultInArg0: true,
7488 clobberFlags: true,
7489 asm: x86.ASUBQ,
7490 reg: regInfo{
7491 inputs: []inputInfo{
7492 {0, 49135},
7493 },
7494 outputs: []outputInfo{
7495 {0, 49135},
7496 },
7497 },
7498 },
7499 {
7500 name: "SUBLconst",
7501 auxType: auxInt32,
7502 argLen: 1,
7503 resultInArg0: true,
7504 clobberFlags: true,
7505 asm: x86.ASUBL,
7506 reg: regInfo{
7507 inputs: []inputInfo{
7508 {0, 49135},
7509 },
7510 outputs: []outputInfo{
7511 {0, 49135},
7512 },
7513 },
7514 },
7515 {
7516 name: "MULQ",
7517 argLen: 2,
7518 commutative: true,
7519 resultInArg0: true,
7520 clobberFlags: true,
7521 asm: x86.AIMULQ,
7522 reg: regInfo{
7523 inputs: []inputInfo{
7524 {0, 49135},
7525 {1, 49135},
7526 },
7527 outputs: []outputInfo{
7528 {0, 49135},
7529 },
7530 },
7531 },
7532 {
7533 name: "MULL",
7534 argLen: 2,
7535 commutative: true,
7536 resultInArg0: true,
7537 clobberFlags: true,
7538 asm: x86.AIMULL,
7539 reg: regInfo{
7540 inputs: []inputInfo{
7541 {0, 49135},
7542 {1, 49135},
7543 },
7544 outputs: []outputInfo{
7545 {0, 49135},
7546 },
7547 },
7548 },
7549 {
7550 name: "MULQconst",
7551 auxType: auxInt32,
7552 argLen: 1,
7553 clobberFlags: true,
7554 asm: x86.AIMUL3Q,
7555 reg: regInfo{
7556 inputs: []inputInfo{
7557 {0, 49135},
7558 },
7559 outputs: []outputInfo{
7560 {0, 49135},
7561 },
7562 },
7563 },
7564 {
7565 name: "MULLconst",
7566 auxType: auxInt32,
7567 argLen: 1,
7568 clobberFlags: true,
7569 asm: x86.AIMUL3L,
7570 reg: regInfo{
7571 inputs: []inputInfo{
7572 {0, 49135},
7573 },
7574 outputs: []outputInfo{
7575 {0, 49135},
7576 },
7577 },
7578 },
7579 {
7580 name: "MULLU",
7581 argLen: 2,
7582 commutative: true,
7583 clobberFlags: true,
7584 asm: x86.AMULL,
7585 reg: regInfo{
7586 inputs: []inputInfo{
7587 {0, 1},
7588 {1, 49151},
7589 },
7590 clobbers: 4,
7591 outputs: []outputInfo{
7592 {1, 0},
7593 {0, 1},
7594 },
7595 },
7596 },
7597 {
7598 name: "MULQU",
7599 argLen: 2,
7600 commutative: true,
7601 clobberFlags: true,
7602 asm: x86.AMULQ,
7603 reg: regInfo{
7604 inputs: []inputInfo{
7605 {0, 1},
7606 {1, 49151},
7607 },
7608 clobbers: 4,
7609 outputs: []outputInfo{
7610 {1, 0},
7611 {0, 1},
7612 },
7613 },
7614 },
7615 {
7616 name: "HMULQ",
7617 argLen: 2,
7618 clobberFlags: true,
7619 asm: x86.AIMULQ,
7620 reg: regInfo{
7621 inputs: []inputInfo{
7622 {0, 1},
7623 {1, 49151},
7624 },
7625 clobbers: 1,
7626 outputs: []outputInfo{
7627 {0, 4},
7628 },
7629 },
7630 },
7631 {
7632 name: "HMULL",
7633 argLen: 2,
7634 clobberFlags: true,
7635 asm: x86.AIMULL,
7636 reg: regInfo{
7637 inputs: []inputInfo{
7638 {0, 1},
7639 {1, 49151},
7640 },
7641 clobbers: 1,
7642 outputs: []outputInfo{
7643 {0, 4},
7644 },
7645 },
7646 },
7647 {
7648 name: "HMULQU",
7649 argLen: 2,
7650 clobberFlags: true,
7651 asm: x86.AMULQ,
7652 reg: regInfo{
7653 inputs: []inputInfo{
7654 {0, 1},
7655 {1, 49151},
7656 },
7657 clobbers: 1,
7658 outputs: []outputInfo{
7659 {0, 4},
7660 },
7661 },
7662 },
7663 {
7664 name: "HMULLU",
7665 argLen: 2,
7666 clobberFlags: true,
7667 asm: x86.AMULL,
7668 reg: regInfo{
7669 inputs: []inputInfo{
7670 {0, 1},
7671 {1, 49151},
7672 },
7673 clobbers: 1,
7674 outputs: []outputInfo{
7675 {0, 4},
7676 },
7677 },
7678 },
7679 {
7680 name: "AVGQU",
7681 argLen: 2,
7682 commutative: true,
7683 resultInArg0: true,
7684 clobberFlags: true,
7685 reg: regInfo{
7686 inputs: []inputInfo{
7687 {0, 49135},
7688 {1, 49135},
7689 },
7690 outputs: []outputInfo{
7691 {0, 49135},
7692 },
7693 },
7694 },
7695 {
7696 name: "DIVQ",
7697 auxType: auxBool,
7698 argLen: 2,
7699 clobberFlags: true,
7700 asm: x86.AIDIVQ,
7701 reg: regInfo{
7702 inputs: []inputInfo{
7703 {0, 1},
7704 {1, 49147},
7705 },
7706 outputs: []outputInfo{
7707 {0, 1},
7708 {1, 4},
7709 },
7710 },
7711 },
7712 {
7713 name: "DIVL",
7714 auxType: auxBool,
7715 argLen: 2,
7716 clobberFlags: true,
7717 asm: x86.AIDIVL,
7718 reg: regInfo{
7719 inputs: []inputInfo{
7720 {0, 1},
7721 {1, 49147},
7722 },
7723 outputs: []outputInfo{
7724 {0, 1},
7725 {1, 4},
7726 },
7727 },
7728 },
7729 {
7730 name: "DIVW",
7731 auxType: auxBool,
7732 argLen: 2,
7733 clobberFlags: true,
7734 asm: x86.AIDIVW,
7735 reg: regInfo{
7736 inputs: []inputInfo{
7737 {0, 1},
7738 {1, 49147},
7739 },
7740 outputs: []outputInfo{
7741 {0, 1},
7742 {1, 4},
7743 },
7744 },
7745 },
7746 {
7747 name: "DIVQU",
7748 argLen: 2,
7749 clobberFlags: true,
7750 asm: x86.ADIVQ,
7751 reg: regInfo{
7752 inputs: []inputInfo{
7753 {0, 1},
7754 {1, 49147},
7755 },
7756 outputs: []outputInfo{
7757 {0, 1},
7758 {1, 4},
7759 },
7760 },
7761 },
7762 {
7763 name: "DIVLU",
7764 argLen: 2,
7765 clobberFlags: true,
7766 asm: x86.ADIVL,
7767 reg: regInfo{
7768 inputs: []inputInfo{
7769 {0, 1},
7770 {1, 49147},
7771 },
7772 outputs: []outputInfo{
7773 {0, 1},
7774 {1, 4},
7775 },
7776 },
7777 },
7778 {
7779 name: "DIVWU",
7780 argLen: 2,
7781 clobberFlags: true,
7782 asm: x86.ADIVW,
7783 reg: regInfo{
7784 inputs: []inputInfo{
7785 {0, 1},
7786 {1, 49147},
7787 },
7788 outputs: []outputInfo{
7789 {0, 1},
7790 {1, 4},
7791 },
7792 },
7793 },
7794 {
7795 name: "NEGLflags",
7796 argLen: 1,
7797 resultInArg0: true,
7798 asm: x86.ANEGL,
7799 reg: regInfo{
7800 inputs: []inputInfo{
7801 {0, 49135},
7802 },
7803 outputs: []outputInfo{
7804 {1, 0},
7805 {0, 49135},
7806 },
7807 },
7808 },
7809 {
7810 name: "ADDQcarry",
7811 argLen: 2,
7812 commutative: true,
7813 resultInArg0: true,
7814 asm: x86.AADDQ,
7815 reg: regInfo{
7816 inputs: []inputInfo{
7817 {0, 49135},
7818 {1, 49135},
7819 },
7820 outputs: []outputInfo{
7821 {1, 0},
7822 {0, 49135},
7823 },
7824 },
7825 },
7826 {
7827 name: "ADCQ",
7828 argLen: 3,
7829 commutative: true,
7830 resultInArg0: true,
7831 asm: x86.AADCQ,
7832 reg: regInfo{
7833 inputs: []inputInfo{
7834 {0, 49135},
7835 {1, 49135},
7836 },
7837 outputs: []outputInfo{
7838 {1, 0},
7839 {0, 49135},
7840 },
7841 },
7842 },
7843 {
7844 name: "ADDQconstcarry",
7845 auxType: auxInt32,
7846 argLen: 1,
7847 resultInArg0: true,
7848 asm: x86.AADDQ,
7849 reg: regInfo{
7850 inputs: []inputInfo{
7851 {0, 49135},
7852 },
7853 outputs: []outputInfo{
7854 {1, 0},
7855 {0, 49135},
7856 },
7857 },
7858 },
7859 {
7860 name: "ADCQconst",
7861 auxType: auxInt32,
7862 argLen: 2,
7863 resultInArg0: true,
7864 asm: x86.AADCQ,
7865 reg: regInfo{
7866 inputs: []inputInfo{
7867 {0, 49135},
7868 },
7869 outputs: []outputInfo{
7870 {1, 0},
7871 {0, 49135},
7872 },
7873 },
7874 },
7875 {
7876 name: "SUBQborrow",
7877 argLen: 2,
7878 resultInArg0: true,
7879 asm: x86.ASUBQ,
7880 reg: regInfo{
7881 inputs: []inputInfo{
7882 {0, 49135},
7883 {1, 49135},
7884 },
7885 outputs: []outputInfo{
7886 {1, 0},
7887 {0, 49135},
7888 },
7889 },
7890 },
7891 {
7892 name: "SBBQ",
7893 argLen: 3,
7894 resultInArg0: true,
7895 asm: x86.ASBBQ,
7896 reg: regInfo{
7897 inputs: []inputInfo{
7898 {0, 49135},
7899 {1, 49135},
7900 },
7901 outputs: []outputInfo{
7902 {1, 0},
7903 {0, 49135},
7904 },
7905 },
7906 },
7907 {
7908 name: "SUBQconstborrow",
7909 auxType: auxInt32,
7910 argLen: 1,
7911 resultInArg0: true,
7912 asm: x86.ASUBQ,
7913 reg: regInfo{
7914 inputs: []inputInfo{
7915 {0, 49135},
7916 },
7917 outputs: []outputInfo{
7918 {1, 0},
7919 {0, 49135},
7920 },
7921 },
7922 },
7923 {
7924 name: "SBBQconst",
7925 auxType: auxInt32,
7926 argLen: 2,
7927 resultInArg0: true,
7928 asm: x86.ASBBQ,
7929 reg: regInfo{
7930 inputs: []inputInfo{
7931 {0, 49135},
7932 },
7933 outputs: []outputInfo{
7934 {1, 0},
7935 {0, 49135},
7936 },
7937 },
7938 },
7939 {
7940 name: "MULQU2",
7941 argLen: 2,
7942 commutative: true,
7943 clobberFlags: true,
7944 asm: x86.AMULQ,
7945 reg: regInfo{
7946 inputs: []inputInfo{
7947 {0, 1},
7948 {1, 49151},
7949 },
7950 outputs: []outputInfo{
7951 {0, 4},
7952 {1, 1},
7953 },
7954 },
7955 },
7956 {
7957 name: "DIVQU2",
7958 argLen: 3,
7959 clobberFlags: true,
7960 asm: x86.ADIVQ,
7961 reg: regInfo{
7962 inputs: []inputInfo{
7963 {0, 4},
7964 {1, 1},
7965 {2, 49151},
7966 },
7967 outputs: []outputInfo{
7968 {0, 1},
7969 {1, 4},
7970 },
7971 },
7972 },
7973 {
7974 name: "ANDQ",
7975 argLen: 2,
7976 commutative: true,
7977 resultInArg0: true,
7978 clobberFlags: true,
7979 asm: x86.AANDQ,
7980 reg: regInfo{
7981 inputs: []inputInfo{
7982 {0, 49135},
7983 {1, 49135},
7984 },
7985 outputs: []outputInfo{
7986 {0, 49135},
7987 },
7988 },
7989 },
7990 {
7991 name: "ANDL",
7992 argLen: 2,
7993 commutative: true,
7994 resultInArg0: true,
7995 clobberFlags: true,
7996 asm: x86.AANDL,
7997 reg: regInfo{
7998 inputs: []inputInfo{
7999 {0, 49135},
8000 {1, 49135},
8001 },
8002 outputs: []outputInfo{
8003 {0, 49135},
8004 },
8005 },
8006 },
8007 {
8008 name: "ANDQconst",
8009 auxType: auxInt32,
8010 argLen: 1,
8011 resultInArg0: true,
8012 clobberFlags: true,
8013 asm: x86.AANDQ,
8014 reg: regInfo{
8015 inputs: []inputInfo{
8016 {0, 49135},
8017 },
8018 outputs: []outputInfo{
8019 {0, 49135},
8020 },
8021 },
8022 },
8023 {
8024 name: "ANDLconst",
8025 auxType: auxInt32,
8026 argLen: 1,
8027 resultInArg0: true,
8028 clobberFlags: true,
8029 asm: x86.AANDL,
8030 reg: regInfo{
8031 inputs: []inputInfo{
8032 {0, 49135},
8033 },
8034 outputs: []outputInfo{
8035 {0, 49135},
8036 },
8037 },
8038 },
8039 {
8040 name: "ANDQconstmodify",
8041 auxType: auxSymValAndOff,
8042 argLen: 2,
8043 clobberFlags: true,
8044 faultOnNilArg0: true,
8045 symEffect: SymRead | SymWrite,
8046 asm: x86.AANDQ,
8047 reg: regInfo{
8048 inputs: []inputInfo{
8049 {0, 4295032831},
8050 },
8051 },
8052 },
8053 {
8054 name: "ANDLconstmodify",
8055 auxType: auxSymValAndOff,
8056 argLen: 2,
8057 clobberFlags: true,
8058 faultOnNilArg0: true,
8059 symEffect: SymRead | SymWrite,
8060 asm: x86.AANDL,
8061 reg: regInfo{
8062 inputs: []inputInfo{
8063 {0, 4295032831},
8064 },
8065 },
8066 },
8067 {
8068 name: "ORQ",
8069 argLen: 2,
8070 commutative: true,
8071 resultInArg0: true,
8072 clobberFlags: true,
8073 asm: x86.AORQ,
8074 reg: regInfo{
8075 inputs: []inputInfo{
8076 {0, 49135},
8077 {1, 49135},
8078 },
8079 outputs: []outputInfo{
8080 {0, 49135},
8081 },
8082 },
8083 },
8084 {
8085 name: "ORL",
8086 argLen: 2,
8087 commutative: true,
8088 resultInArg0: true,
8089 clobberFlags: true,
8090 asm: x86.AORL,
8091 reg: regInfo{
8092 inputs: []inputInfo{
8093 {0, 49135},
8094 {1, 49135},
8095 },
8096 outputs: []outputInfo{
8097 {0, 49135},
8098 },
8099 },
8100 },
8101 {
8102 name: "ORQconst",
8103 auxType: auxInt32,
8104 argLen: 1,
8105 resultInArg0: true,
8106 clobberFlags: true,
8107 asm: x86.AORQ,
8108 reg: regInfo{
8109 inputs: []inputInfo{
8110 {0, 49135},
8111 },
8112 outputs: []outputInfo{
8113 {0, 49135},
8114 },
8115 },
8116 },
8117 {
8118 name: "ORLconst",
8119 auxType: auxInt32,
8120 argLen: 1,
8121 resultInArg0: true,
8122 clobberFlags: true,
8123 asm: x86.AORL,
8124 reg: regInfo{
8125 inputs: []inputInfo{
8126 {0, 49135},
8127 },
8128 outputs: []outputInfo{
8129 {0, 49135},
8130 },
8131 },
8132 },
8133 {
8134 name: "ORQconstmodify",
8135 auxType: auxSymValAndOff,
8136 argLen: 2,
8137 clobberFlags: true,
8138 faultOnNilArg0: true,
8139 symEffect: SymRead | SymWrite,
8140 asm: x86.AORQ,
8141 reg: regInfo{
8142 inputs: []inputInfo{
8143 {0, 4295032831},
8144 },
8145 },
8146 },
8147 {
8148 name: "ORLconstmodify",
8149 auxType: auxSymValAndOff,
8150 argLen: 2,
8151 clobberFlags: true,
8152 faultOnNilArg0: true,
8153 symEffect: SymRead | SymWrite,
8154 asm: x86.AORL,
8155 reg: regInfo{
8156 inputs: []inputInfo{
8157 {0, 4295032831},
8158 },
8159 },
8160 },
8161 {
8162 name: "XORQ",
8163 argLen: 2,
8164 commutative: true,
8165 resultInArg0: true,
8166 clobberFlags: true,
8167 asm: x86.AXORQ,
8168 reg: regInfo{
8169 inputs: []inputInfo{
8170 {0, 49135},
8171 {1, 49135},
8172 },
8173 outputs: []outputInfo{
8174 {0, 49135},
8175 },
8176 },
8177 },
8178 {
8179 name: "XORL",
8180 argLen: 2,
8181 commutative: true,
8182 resultInArg0: true,
8183 clobberFlags: true,
8184 asm: x86.AXORL,
8185 reg: regInfo{
8186 inputs: []inputInfo{
8187 {0, 49135},
8188 {1, 49135},
8189 },
8190 outputs: []outputInfo{
8191 {0, 49135},
8192 },
8193 },
8194 },
8195 {
8196 name: "XORQconst",
8197 auxType: auxInt32,
8198 argLen: 1,
8199 resultInArg0: true,
8200 clobberFlags: true,
8201 asm: x86.AXORQ,
8202 reg: regInfo{
8203 inputs: []inputInfo{
8204 {0, 49135},
8205 },
8206 outputs: []outputInfo{
8207 {0, 49135},
8208 },
8209 },
8210 },
8211 {
8212 name: "XORLconst",
8213 auxType: auxInt32,
8214 argLen: 1,
8215 resultInArg0: true,
8216 clobberFlags: true,
8217 asm: x86.AXORL,
8218 reg: regInfo{
8219 inputs: []inputInfo{
8220 {0, 49135},
8221 },
8222 outputs: []outputInfo{
8223 {0, 49135},
8224 },
8225 },
8226 },
8227 {
8228 name: "XORQconstmodify",
8229 auxType: auxSymValAndOff,
8230 argLen: 2,
8231 clobberFlags: true,
8232 faultOnNilArg0: true,
8233 symEffect: SymRead | SymWrite,
8234 asm: x86.AXORQ,
8235 reg: regInfo{
8236 inputs: []inputInfo{
8237 {0, 4295032831},
8238 },
8239 },
8240 },
8241 {
8242 name: "XORLconstmodify",
8243 auxType: auxSymValAndOff,
8244 argLen: 2,
8245 clobberFlags: true,
8246 faultOnNilArg0: true,
8247 symEffect: SymRead | SymWrite,
8248 asm: x86.AXORL,
8249 reg: regInfo{
8250 inputs: []inputInfo{
8251 {0, 4295032831},
8252 },
8253 },
8254 },
8255 {
8256 name: "CMPQ",
8257 argLen: 2,
8258 asm: x86.ACMPQ,
8259 reg: regInfo{
8260 inputs: []inputInfo{
8261 {0, 49151},
8262 {1, 49151},
8263 },
8264 },
8265 },
8266 {
8267 name: "CMPL",
8268 argLen: 2,
8269 asm: x86.ACMPL,
8270 reg: regInfo{
8271 inputs: []inputInfo{
8272 {0, 49151},
8273 {1, 49151},
8274 },
8275 },
8276 },
8277 {
8278 name: "CMPW",
8279 argLen: 2,
8280 asm: x86.ACMPW,
8281 reg: regInfo{
8282 inputs: []inputInfo{
8283 {0, 49151},
8284 {1, 49151},
8285 },
8286 },
8287 },
8288 {
8289 name: "CMPB",
8290 argLen: 2,
8291 asm: x86.ACMPB,
8292 reg: regInfo{
8293 inputs: []inputInfo{
8294 {0, 49151},
8295 {1, 49151},
8296 },
8297 },
8298 },
8299 {
8300 name: "CMPQconst",
8301 auxType: auxInt32,
8302 argLen: 1,
8303 asm: x86.ACMPQ,
8304 reg: regInfo{
8305 inputs: []inputInfo{
8306 {0, 49151},
8307 },
8308 },
8309 },
8310 {
8311 name: "CMPLconst",
8312 auxType: auxInt32,
8313 argLen: 1,
8314 asm: x86.ACMPL,
8315 reg: regInfo{
8316 inputs: []inputInfo{
8317 {0, 49151},
8318 },
8319 },
8320 },
8321 {
8322 name: "CMPWconst",
8323 auxType: auxInt16,
8324 argLen: 1,
8325 asm: x86.ACMPW,
8326 reg: regInfo{
8327 inputs: []inputInfo{
8328 {0, 49151},
8329 },
8330 },
8331 },
8332 {
8333 name: "CMPBconst",
8334 auxType: auxInt8,
8335 argLen: 1,
8336 asm: x86.ACMPB,
8337 reg: regInfo{
8338 inputs: []inputInfo{
8339 {0, 49151},
8340 },
8341 },
8342 },
8343 {
8344 name: "CMPQload",
8345 auxType: auxSymOff,
8346 argLen: 3,
8347 faultOnNilArg0: true,
8348 symEffect: SymRead,
8349 asm: x86.ACMPQ,
8350 reg: regInfo{
8351 inputs: []inputInfo{
8352 {1, 49151},
8353 {0, 4295032831},
8354 },
8355 },
8356 },
8357 {
8358 name: "CMPLload",
8359 auxType: auxSymOff,
8360 argLen: 3,
8361 faultOnNilArg0: true,
8362 symEffect: SymRead,
8363 asm: x86.ACMPL,
8364 reg: regInfo{
8365 inputs: []inputInfo{
8366 {1, 49151},
8367 {0, 4295032831},
8368 },
8369 },
8370 },
8371 {
8372 name: "CMPWload",
8373 auxType: auxSymOff,
8374 argLen: 3,
8375 faultOnNilArg0: true,
8376 symEffect: SymRead,
8377 asm: x86.ACMPW,
8378 reg: regInfo{
8379 inputs: []inputInfo{
8380 {1, 49151},
8381 {0, 4295032831},
8382 },
8383 },
8384 },
8385 {
8386 name: "CMPBload",
8387 auxType: auxSymOff,
8388 argLen: 3,
8389 faultOnNilArg0: true,
8390 symEffect: SymRead,
8391 asm: x86.ACMPB,
8392 reg: regInfo{
8393 inputs: []inputInfo{
8394 {1, 49151},
8395 {0, 4295032831},
8396 },
8397 },
8398 },
8399 {
8400 name: "CMPQconstload",
8401 auxType: auxSymValAndOff,
8402 argLen: 2,
8403 faultOnNilArg0: true,
8404 symEffect: SymRead,
8405 asm: x86.ACMPQ,
8406 reg: regInfo{
8407 inputs: []inputInfo{
8408 {0, 4295032831},
8409 },
8410 },
8411 },
8412 {
8413 name: "CMPLconstload",
8414 auxType: auxSymValAndOff,
8415 argLen: 2,
8416 faultOnNilArg0: true,
8417 symEffect: SymRead,
8418 asm: x86.ACMPL,
8419 reg: regInfo{
8420 inputs: []inputInfo{
8421 {0, 4295032831},
8422 },
8423 },
8424 },
8425 {
8426 name: "CMPWconstload",
8427 auxType: auxSymValAndOff,
8428 argLen: 2,
8429 faultOnNilArg0: true,
8430 symEffect: SymRead,
8431 asm: x86.ACMPW,
8432 reg: regInfo{
8433 inputs: []inputInfo{
8434 {0, 4295032831},
8435 },
8436 },
8437 },
8438 {
8439 name: "CMPBconstload",
8440 auxType: auxSymValAndOff,
8441 argLen: 2,
8442 faultOnNilArg0: true,
8443 symEffect: SymRead,
8444 asm: x86.ACMPB,
8445 reg: regInfo{
8446 inputs: []inputInfo{
8447 {0, 4295032831},
8448 },
8449 },
8450 },
8451 {
8452 name: "CMPQloadidx8",
8453 auxType: auxSymOff,
8454 argLen: 4,
8455 symEffect: SymRead,
8456 asm: x86.ACMPQ,
8457 scale: 8,
8458 reg: regInfo{
8459 inputs: []inputInfo{
8460 {1, 49151},
8461 {2, 49151},
8462 {0, 4295032831},
8463 },
8464 },
8465 },
8466 {
8467 name: "CMPQloadidx1",
8468 auxType: auxSymOff,
8469 argLen: 4,
8470 commutative: true,
8471 symEffect: SymRead,
8472 asm: x86.ACMPQ,
8473 scale: 1,
8474 reg: regInfo{
8475 inputs: []inputInfo{
8476 {1, 49151},
8477 {2, 49151},
8478 {0, 4295032831},
8479 },
8480 },
8481 },
8482 {
8483 name: "CMPLloadidx4",
8484 auxType: auxSymOff,
8485 argLen: 4,
8486 symEffect: SymRead,
8487 asm: x86.ACMPL,
8488 scale: 4,
8489 reg: regInfo{
8490 inputs: []inputInfo{
8491 {1, 49151},
8492 {2, 49151},
8493 {0, 4295032831},
8494 },
8495 },
8496 },
8497 {
8498 name: "CMPLloadidx1",
8499 auxType: auxSymOff,
8500 argLen: 4,
8501 commutative: true,
8502 symEffect: SymRead,
8503 asm: x86.ACMPL,
8504 scale: 1,
8505 reg: regInfo{
8506 inputs: []inputInfo{
8507 {1, 49151},
8508 {2, 49151},
8509 {0, 4295032831},
8510 },
8511 },
8512 },
8513 {
8514 name: "CMPWloadidx2",
8515 auxType: auxSymOff,
8516 argLen: 4,
8517 symEffect: SymRead,
8518 asm: x86.ACMPW,
8519 scale: 2,
8520 reg: regInfo{
8521 inputs: []inputInfo{
8522 {1, 49151},
8523 {2, 49151},
8524 {0, 4295032831},
8525 },
8526 },
8527 },
8528 {
8529 name: "CMPWloadidx1",
8530 auxType: auxSymOff,
8531 argLen: 4,
8532 commutative: true,
8533 symEffect: SymRead,
8534 asm: x86.ACMPW,
8535 scale: 1,
8536 reg: regInfo{
8537 inputs: []inputInfo{
8538 {1, 49151},
8539 {2, 49151},
8540 {0, 4295032831},
8541 },
8542 },
8543 },
8544 {
8545 name: "CMPBloadidx1",
8546 auxType: auxSymOff,
8547 argLen: 4,
8548 commutative: true,
8549 symEffect: SymRead,
8550 asm: x86.ACMPB,
8551 scale: 1,
8552 reg: regInfo{
8553 inputs: []inputInfo{
8554 {1, 49151},
8555 {2, 49151},
8556 {0, 4295032831},
8557 },
8558 },
8559 },
8560 {
8561 name: "CMPQconstloadidx8",
8562 auxType: auxSymValAndOff,
8563 argLen: 3,
8564 symEffect: SymRead,
8565 asm: x86.ACMPQ,
8566 scale: 8,
8567 reg: regInfo{
8568 inputs: []inputInfo{
8569 {1, 49151},
8570 {0, 4295032831},
8571 },
8572 },
8573 },
8574 {
8575 name: "CMPQconstloadidx1",
8576 auxType: auxSymValAndOff,
8577 argLen: 3,
8578 commutative: true,
8579 symEffect: SymRead,
8580 asm: x86.ACMPQ,
8581 scale: 1,
8582 reg: regInfo{
8583 inputs: []inputInfo{
8584 {1, 49151},
8585 {0, 4295032831},
8586 },
8587 },
8588 },
8589 {
8590 name: "CMPLconstloadidx4",
8591 auxType: auxSymValAndOff,
8592 argLen: 3,
8593 symEffect: SymRead,
8594 asm: x86.ACMPL,
8595 scale: 4,
8596 reg: regInfo{
8597 inputs: []inputInfo{
8598 {1, 49151},
8599 {0, 4295032831},
8600 },
8601 },
8602 },
8603 {
8604 name: "CMPLconstloadidx1",
8605 auxType: auxSymValAndOff,
8606 argLen: 3,
8607 commutative: true,
8608 symEffect: SymRead,
8609 asm: x86.ACMPL,
8610 scale: 1,
8611 reg: regInfo{
8612 inputs: []inputInfo{
8613 {1, 49151},
8614 {0, 4295032831},
8615 },
8616 },
8617 },
8618 {
8619 name: "CMPWconstloadidx2",
8620 auxType: auxSymValAndOff,
8621 argLen: 3,
8622 symEffect: SymRead,
8623 asm: x86.ACMPW,
8624 scale: 2,
8625 reg: regInfo{
8626 inputs: []inputInfo{
8627 {1, 49151},
8628 {0, 4295032831},
8629 },
8630 },
8631 },
8632 {
8633 name: "CMPWconstloadidx1",
8634 auxType: auxSymValAndOff,
8635 argLen: 3,
8636 commutative: true,
8637 symEffect: SymRead,
8638 asm: x86.ACMPW,
8639 scale: 1,
8640 reg: regInfo{
8641 inputs: []inputInfo{
8642 {1, 49151},
8643 {0, 4295032831},
8644 },
8645 },
8646 },
8647 {
8648 name: "CMPBconstloadidx1",
8649 auxType: auxSymValAndOff,
8650 argLen: 3,
8651 commutative: true,
8652 symEffect: SymRead,
8653 asm: x86.ACMPB,
8654 scale: 1,
8655 reg: regInfo{
8656 inputs: []inputInfo{
8657 {1, 49151},
8658 {0, 4295032831},
8659 },
8660 },
8661 },
8662 {
8663 name: "UCOMISS",
8664 argLen: 2,
8665 asm: x86.AUCOMISS,
8666 reg: regInfo{
8667 inputs: []inputInfo{
8668 {0, 2147418112},
8669 {1, 2147418112},
8670 },
8671 },
8672 },
8673 {
8674 name: "UCOMISD",
8675 argLen: 2,
8676 asm: x86.AUCOMISD,
8677 reg: regInfo{
8678 inputs: []inputInfo{
8679 {0, 2147418112},
8680 {1, 2147418112},
8681 },
8682 },
8683 },
8684 {
8685 name: "BTL",
8686 argLen: 2,
8687 asm: x86.ABTL,
8688 reg: regInfo{
8689 inputs: []inputInfo{
8690 {0, 49151},
8691 {1, 49151},
8692 },
8693 },
8694 },
8695 {
8696 name: "BTQ",
8697 argLen: 2,
8698 asm: x86.ABTQ,
8699 reg: regInfo{
8700 inputs: []inputInfo{
8701 {0, 49151},
8702 {1, 49151},
8703 },
8704 },
8705 },
8706 {
8707 name: "BTCL",
8708 argLen: 2,
8709 resultInArg0: true,
8710 clobberFlags: true,
8711 asm: x86.ABTCL,
8712 reg: regInfo{
8713 inputs: []inputInfo{
8714 {0, 49135},
8715 {1, 49135},
8716 },
8717 outputs: []outputInfo{
8718 {0, 49135},
8719 },
8720 },
8721 },
8722 {
8723 name: "BTCQ",
8724 argLen: 2,
8725 resultInArg0: true,
8726 clobberFlags: true,
8727 asm: x86.ABTCQ,
8728 reg: regInfo{
8729 inputs: []inputInfo{
8730 {0, 49135},
8731 {1, 49135},
8732 },
8733 outputs: []outputInfo{
8734 {0, 49135},
8735 },
8736 },
8737 },
8738 {
8739 name: "BTRL",
8740 argLen: 2,
8741 resultInArg0: true,
8742 clobberFlags: true,
8743 asm: x86.ABTRL,
8744 reg: regInfo{
8745 inputs: []inputInfo{
8746 {0, 49135},
8747 {1, 49135},
8748 },
8749 outputs: []outputInfo{
8750 {0, 49135},
8751 },
8752 },
8753 },
8754 {
8755 name: "BTRQ",
8756 argLen: 2,
8757 resultInArg0: true,
8758 clobberFlags: true,
8759 asm: x86.ABTRQ,
8760 reg: regInfo{
8761 inputs: []inputInfo{
8762 {0, 49135},
8763 {1, 49135},
8764 },
8765 outputs: []outputInfo{
8766 {0, 49135},
8767 },
8768 },
8769 },
8770 {
8771 name: "BTSL",
8772 argLen: 2,
8773 resultInArg0: true,
8774 clobberFlags: true,
8775 asm: x86.ABTSL,
8776 reg: regInfo{
8777 inputs: []inputInfo{
8778 {0, 49135},
8779 {1, 49135},
8780 },
8781 outputs: []outputInfo{
8782 {0, 49135},
8783 },
8784 },
8785 },
8786 {
8787 name: "BTSQ",
8788 argLen: 2,
8789 resultInArg0: true,
8790 clobberFlags: true,
8791 asm: x86.ABTSQ,
8792 reg: regInfo{
8793 inputs: []inputInfo{
8794 {0, 49135},
8795 {1, 49135},
8796 },
8797 outputs: []outputInfo{
8798 {0, 49135},
8799 },
8800 },
8801 },
8802 {
8803 name: "BTLconst",
8804 auxType: auxInt8,
8805 argLen: 1,
8806 asm: x86.ABTL,
8807 reg: regInfo{
8808 inputs: []inputInfo{
8809 {0, 49151},
8810 },
8811 },
8812 },
8813 {
8814 name: "BTQconst",
8815 auxType: auxInt8,
8816 argLen: 1,
8817 asm: x86.ABTQ,
8818 reg: regInfo{
8819 inputs: []inputInfo{
8820 {0, 49151},
8821 },
8822 },
8823 },
8824 {
8825 name: "BTCQconst",
8826 auxType: auxInt8,
8827 argLen: 1,
8828 resultInArg0: true,
8829 clobberFlags: true,
8830 asm: x86.ABTCQ,
8831 reg: regInfo{
8832 inputs: []inputInfo{
8833 {0, 49135},
8834 },
8835 outputs: []outputInfo{
8836 {0, 49135},
8837 },
8838 },
8839 },
8840 {
8841 name: "BTRQconst",
8842 auxType: auxInt8,
8843 argLen: 1,
8844 resultInArg0: true,
8845 clobberFlags: true,
8846 asm: x86.ABTRQ,
8847 reg: regInfo{
8848 inputs: []inputInfo{
8849 {0, 49135},
8850 },
8851 outputs: []outputInfo{
8852 {0, 49135},
8853 },
8854 },
8855 },
8856 {
8857 name: "BTSQconst",
8858 auxType: auxInt8,
8859 argLen: 1,
8860 resultInArg0: true,
8861 clobberFlags: true,
8862 asm: x86.ABTSQ,
8863 reg: regInfo{
8864 inputs: []inputInfo{
8865 {0, 49135},
8866 },
8867 outputs: []outputInfo{
8868 {0, 49135},
8869 },
8870 },
8871 },
8872 {
8873 name: "BTSQconstmodify",
8874 auxType: auxSymValAndOff,
8875 argLen: 2,
8876 clobberFlags: true,
8877 faultOnNilArg0: true,
8878 symEffect: SymRead | SymWrite,
8879 asm: x86.ABTSQ,
8880 reg: regInfo{
8881 inputs: []inputInfo{
8882 {0, 4295032831},
8883 },
8884 },
8885 },
8886 {
8887 name: "BTRQconstmodify",
8888 auxType: auxSymValAndOff,
8889 argLen: 2,
8890 clobberFlags: true,
8891 faultOnNilArg0: true,
8892 symEffect: SymRead | SymWrite,
8893 asm: x86.ABTRQ,
8894 reg: regInfo{
8895 inputs: []inputInfo{
8896 {0, 4295032831},
8897 },
8898 },
8899 },
8900 {
8901 name: "BTCQconstmodify",
8902 auxType: auxSymValAndOff,
8903 argLen: 2,
8904 clobberFlags: true,
8905 faultOnNilArg0: true,
8906 symEffect: SymRead | SymWrite,
8907 asm: x86.ABTCQ,
8908 reg: regInfo{
8909 inputs: []inputInfo{
8910 {0, 4295032831},
8911 },
8912 },
8913 },
8914 {
8915 name: "TESTQ",
8916 argLen: 2,
8917 commutative: true,
8918 asm: x86.ATESTQ,
8919 reg: regInfo{
8920 inputs: []inputInfo{
8921 {0, 49151},
8922 {1, 49151},
8923 },
8924 },
8925 },
8926 {
8927 name: "TESTL",
8928 argLen: 2,
8929 commutative: true,
8930 asm: x86.ATESTL,
8931 reg: regInfo{
8932 inputs: []inputInfo{
8933 {0, 49151},
8934 {1, 49151},
8935 },
8936 },
8937 },
8938 {
8939 name: "TESTW",
8940 argLen: 2,
8941 commutative: true,
8942 asm: x86.ATESTW,
8943 reg: regInfo{
8944 inputs: []inputInfo{
8945 {0, 49151},
8946 {1, 49151},
8947 },
8948 },
8949 },
8950 {
8951 name: "TESTB",
8952 argLen: 2,
8953 commutative: true,
8954 asm: x86.ATESTB,
8955 reg: regInfo{
8956 inputs: []inputInfo{
8957 {0, 49151},
8958 {1, 49151},
8959 },
8960 },
8961 },
8962 {
8963 name: "TESTQconst",
8964 auxType: auxInt32,
8965 argLen: 1,
8966 asm: x86.ATESTQ,
8967 reg: regInfo{
8968 inputs: []inputInfo{
8969 {0, 49151},
8970 },
8971 },
8972 },
8973 {
8974 name: "TESTLconst",
8975 auxType: auxInt32,
8976 argLen: 1,
8977 asm: x86.ATESTL,
8978 reg: regInfo{
8979 inputs: []inputInfo{
8980 {0, 49151},
8981 },
8982 },
8983 },
8984 {
8985 name: "TESTWconst",
8986 auxType: auxInt16,
8987 argLen: 1,
8988 asm: x86.ATESTW,
8989 reg: regInfo{
8990 inputs: []inputInfo{
8991 {0, 49151},
8992 },
8993 },
8994 },
8995 {
8996 name: "TESTBconst",
8997 auxType: auxInt8,
8998 argLen: 1,
8999 asm: x86.ATESTB,
9000 reg: regInfo{
9001 inputs: []inputInfo{
9002 {0, 49151},
9003 },
9004 },
9005 },
9006 {
9007 name: "SHLQ",
9008 argLen: 2,
9009 resultInArg0: true,
9010 clobberFlags: true,
9011 asm: x86.ASHLQ,
9012 reg: regInfo{
9013 inputs: []inputInfo{
9014 {1, 2},
9015 {0, 49135},
9016 },
9017 outputs: []outputInfo{
9018 {0, 49135},
9019 },
9020 },
9021 },
9022 {
9023 name: "SHLL",
9024 argLen: 2,
9025 resultInArg0: true,
9026 clobberFlags: true,
9027 asm: x86.ASHLL,
9028 reg: regInfo{
9029 inputs: []inputInfo{
9030 {1, 2},
9031 {0, 49135},
9032 },
9033 outputs: []outputInfo{
9034 {0, 49135},
9035 },
9036 },
9037 },
9038 {
9039 name: "SHLQconst",
9040 auxType: auxInt8,
9041 argLen: 1,
9042 resultInArg0: true,
9043 clobberFlags: true,
9044 asm: x86.ASHLQ,
9045 reg: regInfo{
9046 inputs: []inputInfo{
9047 {0, 49135},
9048 },
9049 outputs: []outputInfo{
9050 {0, 49135},
9051 },
9052 },
9053 },
9054 {
9055 name: "SHLLconst",
9056 auxType: auxInt8,
9057 argLen: 1,
9058 resultInArg0: true,
9059 clobberFlags: true,
9060 asm: x86.ASHLL,
9061 reg: regInfo{
9062 inputs: []inputInfo{
9063 {0, 49135},
9064 },
9065 outputs: []outputInfo{
9066 {0, 49135},
9067 },
9068 },
9069 },
9070 {
9071 name: "SHRQ",
9072 argLen: 2,
9073 resultInArg0: true,
9074 clobberFlags: true,
9075 asm: x86.ASHRQ,
9076 reg: regInfo{
9077 inputs: []inputInfo{
9078 {1, 2},
9079 {0, 49135},
9080 },
9081 outputs: []outputInfo{
9082 {0, 49135},
9083 },
9084 },
9085 },
9086 {
9087 name: "SHRL",
9088 argLen: 2,
9089 resultInArg0: true,
9090 clobberFlags: true,
9091 asm: x86.ASHRL,
9092 reg: regInfo{
9093 inputs: []inputInfo{
9094 {1, 2},
9095 {0, 49135},
9096 },
9097 outputs: []outputInfo{
9098 {0, 49135},
9099 },
9100 },
9101 },
9102 {
9103 name: "SHRW",
9104 argLen: 2,
9105 resultInArg0: true,
9106 clobberFlags: true,
9107 asm: x86.ASHRW,
9108 reg: regInfo{
9109 inputs: []inputInfo{
9110 {1, 2},
9111 {0, 49135},
9112 },
9113 outputs: []outputInfo{
9114 {0, 49135},
9115 },
9116 },
9117 },
9118 {
9119 name: "SHRB",
9120 argLen: 2,
9121 resultInArg0: true,
9122 clobberFlags: true,
9123 asm: x86.ASHRB,
9124 reg: regInfo{
9125 inputs: []inputInfo{
9126 {1, 2},
9127 {0, 49135},
9128 },
9129 outputs: []outputInfo{
9130 {0, 49135},
9131 },
9132 },
9133 },
9134 {
9135 name: "SHRQconst",
9136 auxType: auxInt8,
9137 argLen: 1,
9138 resultInArg0: true,
9139 clobberFlags: true,
9140 asm: x86.ASHRQ,
9141 reg: regInfo{
9142 inputs: []inputInfo{
9143 {0, 49135},
9144 },
9145 outputs: []outputInfo{
9146 {0, 49135},
9147 },
9148 },
9149 },
9150 {
9151 name: "SHRLconst",
9152 auxType: auxInt8,
9153 argLen: 1,
9154 resultInArg0: true,
9155 clobberFlags: true,
9156 asm: x86.ASHRL,
9157 reg: regInfo{
9158 inputs: []inputInfo{
9159 {0, 49135},
9160 },
9161 outputs: []outputInfo{
9162 {0, 49135},
9163 },
9164 },
9165 },
9166 {
9167 name: "SHRWconst",
9168 auxType: auxInt8,
9169 argLen: 1,
9170 resultInArg0: true,
9171 clobberFlags: true,
9172 asm: x86.ASHRW,
9173 reg: regInfo{
9174 inputs: []inputInfo{
9175 {0, 49135},
9176 },
9177 outputs: []outputInfo{
9178 {0, 49135},
9179 },
9180 },
9181 },
9182 {
9183 name: "SHRBconst",
9184 auxType: auxInt8,
9185 argLen: 1,
9186 resultInArg0: true,
9187 clobberFlags: true,
9188 asm: x86.ASHRB,
9189 reg: regInfo{
9190 inputs: []inputInfo{
9191 {0, 49135},
9192 },
9193 outputs: []outputInfo{
9194 {0, 49135},
9195 },
9196 },
9197 },
9198 {
9199 name: "SARQ",
9200 argLen: 2,
9201 resultInArg0: true,
9202 clobberFlags: true,
9203 asm: x86.ASARQ,
9204 reg: regInfo{
9205 inputs: []inputInfo{
9206 {1, 2},
9207 {0, 49135},
9208 },
9209 outputs: []outputInfo{
9210 {0, 49135},
9211 },
9212 },
9213 },
9214 {
9215 name: "SARL",
9216 argLen: 2,
9217 resultInArg0: true,
9218 clobberFlags: true,
9219 asm: x86.ASARL,
9220 reg: regInfo{
9221 inputs: []inputInfo{
9222 {1, 2},
9223 {0, 49135},
9224 },
9225 outputs: []outputInfo{
9226 {0, 49135},
9227 },
9228 },
9229 },
9230 {
9231 name: "SARW",
9232 argLen: 2,
9233 resultInArg0: true,
9234 clobberFlags: true,
9235 asm: x86.ASARW,
9236 reg: regInfo{
9237 inputs: []inputInfo{
9238 {1, 2},
9239 {0, 49135},
9240 },
9241 outputs: []outputInfo{
9242 {0, 49135},
9243 },
9244 },
9245 },
9246 {
9247 name: "SARB",
9248 argLen: 2,
9249 resultInArg0: true,
9250 clobberFlags: true,
9251 asm: x86.ASARB,
9252 reg: regInfo{
9253 inputs: []inputInfo{
9254 {1, 2},
9255 {0, 49135},
9256 },
9257 outputs: []outputInfo{
9258 {0, 49135},
9259 },
9260 },
9261 },
9262 {
9263 name: "SARQconst",
9264 auxType: auxInt8,
9265 argLen: 1,
9266 resultInArg0: true,
9267 clobberFlags: true,
9268 asm: x86.ASARQ,
9269 reg: regInfo{
9270 inputs: []inputInfo{
9271 {0, 49135},
9272 },
9273 outputs: []outputInfo{
9274 {0, 49135},
9275 },
9276 },
9277 },
9278 {
9279 name: "SARLconst",
9280 auxType: auxInt8,
9281 argLen: 1,
9282 resultInArg0: true,
9283 clobberFlags: true,
9284 asm: x86.ASARL,
9285 reg: regInfo{
9286 inputs: []inputInfo{
9287 {0, 49135},
9288 },
9289 outputs: []outputInfo{
9290 {0, 49135},
9291 },
9292 },
9293 },
9294 {
9295 name: "SARWconst",
9296 auxType: auxInt8,
9297 argLen: 1,
9298 resultInArg0: true,
9299 clobberFlags: true,
9300 asm: x86.ASARW,
9301 reg: regInfo{
9302 inputs: []inputInfo{
9303 {0, 49135},
9304 },
9305 outputs: []outputInfo{
9306 {0, 49135},
9307 },
9308 },
9309 },
9310 {
9311 name: "SARBconst",
9312 auxType: auxInt8,
9313 argLen: 1,
9314 resultInArg0: true,
9315 clobberFlags: true,
9316 asm: x86.ASARB,
9317 reg: regInfo{
9318 inputs: []inputInfo{
9319 {0, 49135},
9320 },
9321 outputs: []outputInfo{
9322 {0, 49135},
9323 },
9324 },
9325 },
9326 {
9327 name: "SHRDQ",
9328 argLen: 3,
9329 resultInArg0: true,
9330 clobberFlags: true,
9331 asm: x86.ASHRQ,
9332 reg: regInfo{
9333 inputs: []inputInfo{
9334 {2, 2},
9335 {0, 49135},
9336 {1, 49135},
9337 },
9338 outputs: []outputInfo{
9339 {0, 49135},
9340 },
9341 },
9342 },
9343 {
9344 name: "SHLDQ",
9345 argLen: 3,
9346 resultInArg0: true,
9347 clobberFlags: true,
9348 asm: x86.ASHLQ,
9349 reg: regInfo{
9350 inputs: []inputInfo{
9351 {2, 2},
9352 {0, 49135},
9353 {1, 49135},
9354 },
9355 outputs: []outputInfo{
9356 {0, 49135},
9357 },
9358 },
9359 },
9360 {
9361 name: "ROLQ",
9362 argLen: 2,
9363 resultInArg0: true,
9364 clobberFlags: true,
9365 asm: x86.AROLQ,
9366 reg: regInfo{
9367 inputs: []inputInfo{
9368 {1, 2},
9369 {0, 49135},
9370 },
9371 outputs: []outputInfo{
9372 {0, 49135},
9373 },
9374 },
9375 },
9376 {
9377 name: "ROLL",
9378 argLen: 2,
9379 resultInArg0: true,
9380 clobberFlags: true,
9381 asm: x86.AROLL,
9382 reg: regInfo{
9383 inputs: []inputInfo{
9384 {1, 2},
9385 {0, 49135},
9386 },
9387 outputs: []outputInfo{
9388 {0, 49135},
9389 },
9390 },
9391 },
9392 {
9393 name: "ROLW",
9394 argLen: 2,
9395 resultInArg0: true,
9396 clobberFlags: true,
9397 asm: x86.AROLW,
9398 reg: regInfo{
9399 inputs: []inputInfo{
9400 {1, 2},
9401 {0, 49135},
9402 },
9403 outputs: []outputInfo{
9404 {0, 49135},
9405 },
9406 },
9407 },
9408 {
9409 name: "ROLB",
9410 argLen: 2,
9411 resultInArg0: true,
9412 clobberFlags: true,
9413 asm: x86.AROLB,
9414 reg: regInfo{
9415 inputs: []inputInfo{
9416 {1, 2},
9417 {0, 49135},
9418 },
9419 outputs: []outputInfo{
9420 {0, 49135},
9421 },
9422 },
9423 },
9424 {
9425 name: "RORQ",
9426 argLen: 2,
9427 resultInArg0: true,
9428 clobberFlags: true,
9429 asm: x86.ARORQ,
9430 reg: regInfo{
9431 inputs: []inputInfo{
9432 {1, 2},
9433 {0, 49135},
9434 },
9435 outputs: []outputInfo{
9436 {0, 49135},
9437 },
9438 },
9439 },
9440 {
9441 name: "RORL",
9442 argLen: 2,
9443 resultInArg0: true,
9444 clobberFlags: true,
9445 asm: x86.ARORL,
9446 reg: regInfo{
9447 inputs: []inputInfo{
9448 {1, 2},
9449 {0, 49135},
9450 },
9451 outputs: []outputInfo{
9452 {0, 49135},
9453 },
9454 },
9455 },
9456 {
9457 name: "RORW",
9458 argLen: 2,
9459 resultInArg0: true,
9460 clobberFlags: true,
9461 asm: x86.ARORW,
9462 reg: regInfo{
9463 inputs: []inputInfo{
9464 {1, 2},
9465 {0, 49135},
9466 },
9467 outputs: []outputInfo{
9468 {0, 49135},
9469 },
9470 },
9471 },
9472 {
9473 name: "RORB",
9474 argLen: 2,
9475 resultInArg0: true,
9476 clobberFlags: true,
9477 asm: x86.ARORB,
9478 reg: regInfo{
9479 inputs: []inputInfo{
9480 {1, 2},
9481 {0, 49135},
9482 },
9483 outputs: []outputInfo{
9484 {0, 49135},
9485 },
9486 },
9487 },
9488 {
9489 name: "ROLQconst",
9490 auxType: auxInt8,
9491 argLen: 1,
9492 resultInArg0: true,
9493 clobberFlags: true,
9494 asm: x86.AROLQ,
9495 reg: regInfo{
9496 inputs: []inputInfo{
9497 {0, 49135},
9498 },
9499 outputs: []outputInfo{
9500 {0, 49135},
9501 },
9502 },
9503 },
9504 {
9505 name: "ROLLconst",
9506 auxType: auxInt8,
9507 argLen: 1,
9508 resultInArg0: true,
9509 clobberFlags: true,
9510 asm: x86.AROLL,
9511 reg: regInfo{
9512 inputs: []inputInfo{
9513 {0, 49135},
9514 },
9515 outputs: []outputInfo{
9516 {0, 49135},
9517 },
9518 },
9519 },
9520 {
9521 name: "ROLWconst",
9522 auxType: auxInt8,
9523 argLen: 1,
9524 resultInArg0: true,
9525 clobberFlags: true,
9526 asm: x86.AROLW,
9527 reg: regInfo{
9528 inputs: []inputInfo{
9529 {0, 49135},
9530 },
9531 outputs: []outputInfo{
9532 {0, 49135},
9533 },
9534 },
9535 },
9536 {
9537 name: "ROLBconst",
9538 auxType: auxInt8,
9539 argLen: 1,
9540 resultInArg0: true,
9541 clobberFlags: true,
9542 asm: x86.AROLB,
9543 reg: regInfo{
9544 inputs: []inputInfo{
9545 {0, 49135},
9546 },
9547 outputs: []outputInfo{
9548 {0, 49135},
9549 },
9550 },
9551 },
9552 {
9553 name: "ADDLload",
9554 auxType: auxSymOff,
9555 argLen: 3,
9556 resultInArg0: true,
9557 clobberFlags: true,
9558 faultOnNilArg1: true,
9559 symEffect: SymRead,
9560 asm: x86.AADDL,
9561 reg: regInfo{
9562 inputs: []inputInfo{
9563 {0, 49135},
9564 {1, 4295032831},
9565 },
9566 outputs: []outputInfo{
9567 {0, 49135},
9568 },
9569 },
9570 },
9571 {
9572 name: "ADDQload",
9573 auxType: auxSymOff,
9574 argLen: 3,
9575 resultInArg0: true,
9576 clobberFlags: true,
9577 faultOnNilArg1: true,
9578 symEffect: SymRead,
9579 asm: x86.AADDQ,
9580 reg: regInfo{
9581 inputs: []inputInfo{
9582 {0, 49135},
9583 {1, 4295032831},
9584 },
9585 outputs: []outputInfo{
9586 {0, 49135},
9587 },
9588 },
9589 },
9590 {
9591 name: "SUBQload",
9592 auxType: auxSymOff,
9593 argLen: 3,
9594 resultInArg0: true,
9595 clobberFlags: true,
9596 faultOnNilArg1: true,
9597 symEffect: SymRead,
9598 asm: x86.ASUBQ,
9599 reg: regInfo{
9600 inputs: []inputInfo{
9601 {0, 49135},
9602 {1, 4295032831},
9603 },
9604 outputs: []outputInfo{
9605 {0, 49135},
9606 },
9607 },
9608 },
9609 {
9610 name: "SUBLload",
9611 auxType: auxSymOff,
9612 argLen: 3,
9613 resultInArg0: true,
9614 clobberFlags: true,
9615 faultOnNilArg1: true,
9616 symEffect: SymRead,
9617 asm: x86.ASUBL,
9618 reg: regInfo{
9619 inputs: []inputInfo{
9620 {0, 49135},
9621 {1, 4295032831},
9622 },
9623 outputs: []outputInfo{
9624 {0, 49135},
9625 },
9626 },
9627 },
9628 {
9629 name: "ANDLload",
9630 auxType: auxSymOff,
9631 argLen: 3,
9632 resultInArg0: true,
9633 clobberFlags: true,
9634 faultOnNilArg1: true,
9635 symEffect: SymRead,
9636 asm: x86.AANDL,
9637 reg: regInfo{
9638 inputs: []inputInfo{
9639 {0, 49135},
9640 {1, 4295032831},
9641 },
9642 outputs: []outputInfo{
9643 {0, 49135},
9644 },
9645 },
9646 },
9647 {
9648 name: "ANDQload",
9649 auxType: auxSymOff,
9650 argLen: 3,
9651 resultInArg0: true,
9652 clobberFlags: true,
9653 faultOnNilArg1: true,
9654 symEffect: SymRead,
9655 asm: x86.AANDQ,
9656 reg: regInfo{
9657 inputs: []inputInfo{
9658 {0, 49135},
9659 {1, 4295032831},
9660 },
9661 outputs: []outputInfo{
9662 {0, 49135},
9663 },
9664 },
9665 },
9666 {
9667 name: "ORQload",
9668 auxType: auxSymOff,
9669 argLen: 3,
9670 resultInArg0: true,
9671 clobberFlags: true,
9672 faultOnNilArg1: true,
9673 symEffect: SymRead,
9674 asm: x86.AORQ,
9675 reg: regInfo{
9676 inputs: []inputInfo{
9677 {0, 49135},
9678 {1, 4295032831},
9679 },
9680 outputs: []outputInfo{
9681 {0, 49135},
9682 },
9683 },
9684 },
9685 {
9686 name: "ORLload",
9687 auxType: auxSymOff,
9688 argLen: 3,
9689 resultInArg0: true,
9690 clobberFlags: true,
9691 faultOnNilArg1: true,
9692 symEffect: SymRead,
9693 asm: x86.AORL,
9694 reg: regInfo{
9695 inputs: []inputInfo{
9696 {0, 49135},
9697 {1, 4295032831},
9698 },
9699 outputs: []outputInfo{
9700 {0, 49135},
9701 },
9702 },
9703 },
9704 {
9705 name: "XORQload",
9706 auxType: auxSymOff,
9707 argLen: 3,
9708 resultInArg0: true,
9709 clobberFlags: true,
9710 faultOnNilArg1: true,
9711 symEffect: SymRead,
9712 asm: x86.AXORQ,
9713 reg: regInfo{
9714 inputs: []inputInfo{
9715 {0, 49135},
9716 {1, 4295032831},
9717 },
9718 outputs: []outputInfo{
9719 {0, 49135},
9720 },
9721 },
9722 },
9723 {
9724 name: "XORLload",
9725 auxType: auxSymOff,
9726 argLen: 3,
9727 resultInArg0: true,
9728 clobberFlags: true,
9729 faultOnNilArg1: true,
9730 symEffect: SymRead,
9731 asm: x86.AXORL,
9732 reg: regInfo{
9733 inputs: []inputInfo{
9734 {0, 49135},
9735 {1, 4295032831},
9736 },
9737 outputs: []outputInfo{
9738 {0, 49135},
9739 },
9740 },
9741 },
9742 {
9743 name: "ADDLloadidx1",
9744 auxType: auxSymOff,
9745 argLen: 4,
9746 resultInArg0: true,
9747 clobberFlags: true,
9748 symEffect: SymRead,
9749 asm: x86.AADDL,
9750 scale: 1,
9751 reg: regInfo{
9752 inputs: []inputInfo{
9753 {0, 49135},
9754 {2, 49151},
9755 {1, 4295032831},
9756 },
9757 outputs: []outputInfo{
9758 {0, 49135},
9759 },
9760 },
9761 },
9762 {
9763 name: "ADDLloadidx4",
9764 auxType: auxSymOff,
9765 argLen: 4,
9766 resultInArg0: true,
9767 clobberFlags: true,
9768 symEffect: SymRead,
9769 asm: x86.AADDL,
9770 scale: 4,
9771 reg: regInfo{
9772 inputs: []inputInfo{
9773 {0, 49135},
9774 {2, 49151},
9775 {1, 4295032831},
9776 },
9777 outputs: []outputInfo{
9778 {0, 49135},
9779 },
9780 },
9781 },
9782 {
9783 name: "ADDLloadidx8",
9784 auxType: auxSymOff,
9785 argLen: 4,
9786 resultInArg0: true,
9787 clobberFlags: true,
9788 symEffect: SymRead,
9789 asm: x86.AADDL,
9790 scale: 8,
9791 reg: regInfo{
9792 inputs: []inputInfo{
9793 {0, 49135},
9794 {2, 49151},
9795 {1, 4295032831},
9796 },
9797 outputs: []outputInfo{
9798 {0, 49135},
9799 },
9800 },
9801 },
9802 {
9803 name: "ADDQloadidx1",
9804 auxType: auxSymOff,
9805 argLen: 4,
9806 resultInArg0: true,
9807 clobberFlags: true,
9808 symEffect: SymRead,
9809 asm: x86.AADDQ,
9810 scale: 1,
9811 reg: regInfo{
9812 inputs: []inputInfo{
9813 {0, 49135},
9814 {2, 49151},
9815 {1, 4295032831},
9816 },
9817 outputs: []outputInfo{
9818 {0, 49135},
9819 },
9820 },
9821 },
9822 {
9823 name: "ADDQloadidx8",
9824 auxType: auxSymOff,
9825 argLen: 4,
9826 resultInArg0: true,
9827 clobberFlags: true,
9828 symEffect: SymRead,
9829 asm: x86.AADDQ,
9830 scale: 8,
9831 reg: regInfo{
9832 inputs: []inputInfo{
9833 {0, 49135},
9834 {2, 49151},
9835 {1, 4295032831},
9836 },
9837 outputs: []outputInfo{
9838 {0, 49135},
9839 },
9840 },
9841 },
9842 {
9843 name: "SUBLloadidx1",
9844 auxType: auxSymOff,
9845 argLen: 4,
9846 resultInArg0: true,
9847 clobberFlags: true,
9848 symEffect: SymRead,
9849 asm: x86.ASUBL,
9850 scale: 1,
9851 reg: regInfo{
9852 inputs: []inputInfo{
9853 {0, 49135},
9854 {2, 49151},
9855 {1, 4295032831},
9856 },
9857 outputs: []outputInfo{
9858 {0, 49135},
9859 },
9860 },
9861 },
9862 {
9863 name: "SUBLloadidx4",
9864 auxType: auxSymOff,
9865 argLen: 4,
9866 resultInArg0: true,
9867 clobberFlags: true,
9868 symEffect: SymRead,
9869 asm: x86.ASUBL,
9870 scale: 4,
9871 reg: regInfo{
9872 inputs: []inputInfo{
9873 {0, 49135},
9874 {2, 49151},
9875 {1, 4295032831},
9876 },
9877 outputs: []outputInfo{
9878 {0, 49135},
9879 },
9880 },
9881 },
9882 {
9883 name: "SUBLloadidx8",
9884 auxType: auxSymOff,
9885 argLen: 4,
9886 resultInArg0: true,
9887 clobberFlags: true,
9888 symEffect: SymRead,
9889 asm: x86.ASUBL,
9890 scale: 8,
9891 reg: regInfo{
9892 inputs: []inputInfo{
9893 {0, 49135},
9894 {2, 49151},
9895 {1, 4295032831},
9896 },
9897 outputs: []outputInfo{
9898 {0, 49135},
9899 },
9900 },
9901 },
9902 {
9903 name: "SUBQloadidx1",
9904 auxType: auxSymOff,
9905 argLen: 4,
9906 resultInArg0: true,
9907 clobberFlags: true,
9908 symEffect: SymRead,
9909 asm: x86.ASUBQ,
9910 scale: 1,
9911 reg: regInfo{
9912 inputs: []inputInfo{
9913 {0, 49135},
9914 {2, 49151},
9915 {1, 4295032831},
9916 },
9917 outputs: []outputInfo{
9918 {0, 49135},
9919 },
9920 },
9921 },
9922 {
9923 name: "SUBQloadidx8",
9924 auxType: auxSymOff,
9925 argLen: 4,
9926 resultInArg0: true,
9927 clobberFlags: true,
9928 symEffect: SymRead,
9929 asm: x86.ASUBQ,
9930 scale: 8,
9931 reg: regInfo{
9932 inputs: []inputInfo{
9933 {0, 49135},
9934 {2, 49151},
9935 {1, 4295032831},
9936 },
9937 outputs: []outputInfo{
9938 {0, 49135},
9939 },
9940 },
9941 },
9942 {
9943 name: "ANDLloadidx1",
9944 auxType: auxSymOff,
9945 argLen: 4,
9946 resultInArg0: true,
9947 clobberFlags: true,
9948 symEffect: SymRead,
9949 asm: x86.AANDL,
9950 scale: 1,
9951 reg: regInfo{
9952 inputs: []inputInfo{
9953 {0, 49135},
9954 {2, 49151},
9955 {1, 4295032831},
9956 },
9957 outputs: []outputInfo{
9958 {0, 49135},
9959 },
9960 },
9961 },
9962 {
9963 name: "ANDLloadidx4",
9964 auxType: auxSymOff,
9965 argLen: 4,
9966 resultInArg0: true,
9967 clobberFlags: true,
9968 symEffect: SymRead,
9969 asm: x86.AANDL,
9970 scale: 4,
9971 reg: regInfo{
9972 inputs: []inputInfo{
9973 {0, 49135},
9974 {2, 49151},
9975 {1, 4295032831},
9976 },
9977 outputs: []outputInfo{
9978 {0, 49135},
9979 },
9980 },
9981 },
9982 {
9983 name: "ANDLloadidx8",
9984 auxType: auxSymOff,
9985 argLen: 4,
9986 resultInArg0: true,
9987 clobberFlags: true,
9988 symEffect: SymRead,
9989 asm: x86.AANDL,
9990 scale: 8,
9991 reg: regInfo{
9992 inputs: []inputInfo{
9993 {0, 49135},
9994 {2, 49151},
9995 {1, 4295032831},
9996 },
9997 outputs: []outputInfo{
9998 {0, 49135},
9999 },
10000 },
10001 },
10002 {
10003 name: "ANDQloadidx1",
10004 auxType: auxSymOff,
10005 argLen: 4,
10006 resultInArg0: true,
10007 clobberFlags: true,
10008 symEffect: SymRead,
10009 asm: x86.AANDQ,
10010 scale: 1,
10011 reg: regInfo{
10012 inputs: []inputInfo{
10013 {0, 49135},
10014 {2, 49151},
10015 {1, 4295032831},
10016 },
10017 outputs: []outputInfo{
10018 {0, 49135},
10019 },
10020 },
10021 },
10022 {
10023 name: "ANDQloadidx8",
10024 auxType: auxSymOff,
10025 argLen: 4,
10026 resultInArg0: true,
10027 clobberFlags: true,
10028 symEffect: SymRead,
10029 asm: x86.AANDQ,
10030 scale: 8,
10031 reg: regInfo{
10032 inputs: []inputInfo{
10033 {0, 49135},
10034 {2, 49151},
10035 {1, 4295032831},
10036 },
10037 outputs: []outputInfo{
10038 {0, 49135},
10039 },
10040 },
10041 },
10042 {
10043 name: "ORLloadidx1",
10044 auxType: auxSymOff,
10045 argLen: 4,
10046 resultInArg0: true,
10047 clobberFlags: true,
10048 symEffect: SymRead,
10049 asm: x86.AORL,
10050 scale: 1,
10051 reg: regInfo{
10052 inputs: []inputInfo{
10053 {0, 49135},
10054 {2, 49151},
10055 {1, 4295032831},
10056 },
10057 outputs: []outputInfo{
10058 {0, 49135},
10059 },
10060 },
10061 },
10062 {
10063 name: "ORLloadidx4",
10064 auxType: auxSymOff,
10065 argLen: 4,
10066 resultInArg0: true,
10067 clobberFlags: true,
10068 symEffect: SymRead,
10069 asm: x86.AORL,
10070 scale: 4,
10071 reg: regInfo{
10072 inputs: []inputInfo{
10073 {0, 49135},
10074 {2, 49151},
10075 {1, 4295032831},
10076 },
10077 outputs: []outputInfo{
10078 {0, 49135},
10079 },
10080 },
10081 },
10082 {
10083 name: "ORLloadidx8",
10084 auxType: auxSymOff,
10085 argLen: 4,
10086 resultInArg0: true,
10087 clobberFlags: true,
10088 symEffect: SymRead,
10089 asm: x86.AORL,
10090 scale: 8,
10091 reg: regInfo{
10092 inputs: []inputInfo{
10093 {0, 49135},
10094 {2, 49151},
10095 {1, 4295032831},
10096 },
10097 outputs: []outputInfo{
10098 {0, 49135},
10099 },
10100 },
10101 },
10102 {
10103 name: "ORQloadidx1",
10104 auxType: auxSymOff,
10105 argLen: 4,
10106 resultInArg0: true,
10107 clobberFlags: true,
10108 symEffect: SymRead,
10109 asm: x86.AORQ,
10110 scale: 1,
10111 reg: regInfo{
10112 inputs: []inputInfo{
10113 {0, 49135},
10114 {2, 49151},
10115 {1, 4295032831},
10116 },
10117 outputs: []outputInfo{
10118 {0, 49135},
10119 },
10120 },
10121 },
10122 {
10123 name: "ORQloadidx8",
10124 auxType: auxSymOff,
10125 argLen: 4,
10126 resultInArg0: true,
10127 clobberFlags: true,
10128 symEffect: SymRead,
10129 asm: x86.AORQ,
10130 scale: 8,
10131 reg: regInfo{
10132 inputs: []inputInfo{
10133 {0, 49135},
10134 {2, 49151},
10135 {1, 4295032831},
10136 },
10137 outputs: []outputInfo{
10138 {0, 49135},
10139 },
10140 },
10141 },
10142 {
10143 name: "XORLloadidx1",
10144 auxType: auxSymOff,
10145 argLen: 4,
10146 resultInArg0: true,
10147 clobberFlags: true,
10148 symEffect: SymRead,
10149 asm: x86.AXORL,
10150 scale: 1,
10151 reg: regInfo{
10152 inputs: []inputInfo{
10153 {0, 49135},
10154 {2, 49151},
10155 {1, 4295032831},
10156 },
10157 outputs: []outputInfo{
10158 {0, 49135},
10159 },
10160 },
10161 },
10162 {
10163 name: "XORLloadidx4",
10164 auxType: auxSymOff,
10165 argLen: 4,
10166 resultInArg0: true,
10167 clobberFlags: true,
10168 symEffect: SymRead,
10169 asm: x86.AXORL,
10170 scale: 4,
10171 reg: regInfo{
10172 inputs: []inputInfo{
10173 {0, 49135},
10174 {2, 49151},
10175 {1, 4295032831},
10176 },
10177 outputs: []outputInfo{
10178 {0, 49135},
10179 },
10180 },
10181 },
10182 {
10183 name: "XORLloadidx8",
10184 auxType: auxSymOff,
10185 argLen: 4,
10186 resultInArg0: true,
10187 clobberFlags: true,
10188 symEffect: SymRead,
10189 asm: x86.AXORL,
10190 scale: 8,
10191 reg: regInfo{
10192 inputs: []inputInfo{
10193 {0, 49135},
10194 {2, 49151},
10195 {1, 4295032831},
10196 },
10197 outputs: []outputInfo{
10198 {0, 49135},
10199 },
10200 },
10201 },
10202 {
10203 name: "XORQloadidx1",
10204 auxType: auxSymOff,
10205 argLen: 4,
10206 resultInArg0: true,
10207 clobberFlags: true,
10208 symEffect: SymRead,
10209 asm: x86.AXORQ,
10210 scale: 1,
10211 reg: regInfo{
10212 inputs: []inputInfo{
10213 {0, 49135},
10214 {2, 49151},
10215 {1, 4295032831},
10216 },
10217 outputs: []outputInfo{
10218 {0, 49135},
10219 },
10220 },
10221 },
10222 {
10223 name: "XORQloadidx8",
10224 auxType: auxSymOff,
10225 argLen: 4,
10226 resultInArg0: true,
10227 clobberFlags: true,
10228 symEffect: SymRead,
10229 asm: x86.AXORQ,
10230 scale: 8,
10231 reg: regInfo{
10232 inputs: []inputInfo{
10233 {0, 49135},
10234 {2, 49151},
10235 {1, 4295032831},
10236 },
10237 outputs: []outputInfo{
10238 {0, 49135},
10239 },
10240 },
10241 },
10242 {
10243 name: "ADDQmodify",
10244 auxType: auxSymOff,
10245 argLen: 3,
10246 clobberFlags: true,
10247 faultOnNilArg0: true,
10248 symEffect: SymRead | SymWrite,
10249 asm: x86.AADDQ,
10250 reg: regInfo{
10251 inputs: []inputInfo{
10252 {1, 49151},
10253 {0, 4295032831},
10254 },
10255 },
10256 },
10257 {
10258 name: "SUBQmodify",
10259 auxType: auxSymOff,
10260 argLen: 3,
10261 clobberFlags: true,
10262 faultOnNilArg0: true,
10263 symEffect: SymRead | SymWrite,
10264 asm: x86.ASUBQ,
10265 reg: regInfo{
10266 inputs: []inputInfo{
10267 {1, 49151},
10268 {0, 4295032831},
10269 },
10270 },
10271 },
10272 {
10273 name: "ANDQmodify",
10274 auxType: auxSymOff,
10275 argLen: 3,
10276 clobberFlags: true,
10277 faultOnNilArg0: true,
10278 symEffect: SymRead | SymWrite,
10279 asm: x86.AANDQ,
10280 reg: regInfo{
10281 inputs: []inputInfo{
10282 {1, 49151},
10283 {0, 4295032831},
10284 },
10285 },
10286 },
10287 {
10288 name: "ORQmodify",
10289 auxType: auxSymOff,
10290 argLen: 3,
10291 clobberFlags: true,
10292 faultOnNilArg0: true,
10293 symEffect: SymRead | SymWrite,
10294 asm: x86.AORQ,
10295 reg: regInfo{
10296 inputs: []inputInfo{
10297 {1, 49151},
10298 {0, 4295032831},
10299 },
10300 },
10301 },
10302 {
10303 name: "XORQmodify",
10304 auxType: auxSymOff,
10305 argLen: 3,
10306 clobberFlags: true,
10307 faultOnNilArg0: true,
10308 symEffect: SymRead | SymWrite,
10309 asm: x86.AXORQ,
10310 reg: regInfo{
10311 inputs: []inputInfo{
10312 {1, 49151},
10313 {0, 4295032831},
10314 },
10315 },
10316 },
10317 {
10318 name: "ADDLmodify",
10319 auxType: auxSymOff,
10320 argLen: 3,
10321 clobberFlags: true,
10322 faultOnNilArg0: true,
10323 symEffect: SymRead | SymWrite,
10324 asm: x86.AADDL,
10325 reg: regInfo{
10326 inputs: []inputInfo{
10327 {1, 49151},
10328 {0, 4295032831},
10329 },
10330 },
10331 },
10332 {
10333 name: "SUBLmodify",
10334 auxType: auxSymOff,
10335 argLen: 3,
10336 clobberFlags: true,
10337 faultOnNilArg0: true,
10338 symEffect: SymRead | SymWrite,
10339 asm: x86.ASUBL,
10340 reg: regInfo{
10341 inputs: []inputInfo{
10342 {1, 49151},
10343 {0, 4295032831},
10344 },
10345 },
10346 },
10347 {
10348 name: "ANDLmodify",
10349 auxType: auxSymOff,
10350 argLen: 3,
10351 clobberFlags: true,
10352 faultOnNilArg0: true,
10353 symEffect: SymRead | SymWrite,
10354 asm: x86.AANDL,
10355 reg: regInfo{
10356 inputs: []inputInfo{
10357 {1, 49151},
10358 {0, 4295032831},
10359 },
10360 },
10361 },
10362 {
10363 name: "ORLmodify",
10364 auxType: auxSymOff,
10365 argLen: 3,
10366 clobberFlags: true,
10367 faultOnNilArg0: true,
10368 symEffect: SymRead | SymWrite,
10369 asm: x86.AORL,
10370 reg: regInfo{
10371 inputs: []inputInfo{
10372 {1, 49151},
10373 {0, 4295032831},
10374 },
10375 },
10376 },
10377 {
10378 name: "XORLmodify",
10379 auxType: auxSymOff,
10380 argLen: 3,
10381 clobberFlags: true,
10382 faultOnNilArg0: true,
10383 symEffect: SymRead | SymWrite,
10384 asm: x86.AXORL,
10385 reg: regInfo{
10386 inputs: []inputInfo{
10387 {1, 49151},
10388 {0, 4295032831},
10389 },
10390 },
10391 },
10392 {
10393 name: "ADDQmodifyidx1",
10394 auxType: auxSymOff,
10395 argLen: 4,
10396 clobberFlags: true,
10397 symEffect: SymRead | SymWrite,
10398 asm: x86.AADDQ,
10399 scale: 1,
10400 reg: regInfo{
10401 inputs: []inputInfo{
10402 {1, 49151},
10403 {2, 49151},
10404 {0, 4295032831},
10405 },
10406 },
10407 },
10408 {
10409 name: "ADDQmodifyidx8",
10410 auxType: auxSymOff,
10411 argLen: 4,
10412 clobberFlags: true,
10413 symEffect: SymRead | SymWrite,
10414 asm: x86.AADDQ,
10415 scale: 8,
10416 reg: regInfo{
10417 inputs: []inputInfo{
10418 {1, 49151},
10419 {2, 49151},
10420 {0, 4295032831},
10421 },
10422 },
10423 },
10424 {
10425 name: "SUBQmodifyidx1",
10426 auxType: auxSymOff,
10427 argLen: 4,
10428 clobberFlags: true,
10429 symEffect: SymRead | SymWrite,
10430 asm: x86.ASUBQ,
10431 scale: 1,
10432 reg: regInfo{
10433 inputs: []inputInfo{
10434 {1, 49151},
10435 {2, 49151},
10436 {0, 4295032831},
10437 },
10438 },
10439 },
10440 {
10441 name: "SUBQmodifyidx8",
10442 auxType: auxSymOff,
10443 argLen: 4,
10444 clobberFlags: true,
10445 symEffect: SymRead | SymWrite,
10446 asm: x86.ASUBQ,
10447 scale: 8,
10448 reg: regInfo{
10449 inputs: []inputInfo{
10450 {1, 49151},
10451 {2, 49151},
10452 {0, 4295032831},
10453 },
10454 },
10455 },
10456 {
10457 name: "ANDQmodifyidx1",
10458 auxType: auxSymOff,
10459 argLen: 4,
10460 clobberFlags: true,
10461 symEffect: SymRead | SymWrite,
10462 asm: x86.AANDQ,
10463 scale: 1,
10464 reg: regInfo{
10465 inputs: []inputInfo{
10466 {1, 49151},
10467 {2, 49151},
10468 {0, 4295032831},
10469 },
10470 },
10471 },
10472 {
10473 name: "ANDQmodifyidx8",
10474 auxType: auxSymOff,
10475 argLen: 4,
10476 clobberFlags: true,
10477 symEffect: SymRead | SymWrite,
10478 asm: x86.AANDQ,
10479 scale: 8,
10480 reg: regInfo{
10481 inputs: []inputInfo{
10482 {1, 49151},
10483 {2, 49151},
10484 {0, 4295032831},
10485 },
10486 },
10487 },
10488 {
10489 name: "ORQmodifyidx1",
10490 auxType: auxSymOff,
10491 argLen: 4,
10492 clobberFlags: true,
10493 symEffect: SymRead | SymWrite,
10494 asm: x86.AORQ,
10495 scale: 1,
10496 reg: regInfo{
10497 inputs: []inputInfo{
10498 {1, 49151},
10499 {2, 49151},
10500 {0, 4295032831},
10501 },
10502 },
10503 },
10504 {
10505 name: "ORQmodifyidx8",
10506 auxType: auxSymOff,
10507 argLen: 4,
10508 clobberFlags: true,
10509 symEffect: SymRead | SymWrite,
10510 asm: x86.AORQ,
10511 scale: 8,
10512 reg: regInfo{
10513 inputs: []inputInfo{
10514 {1, 49151},
10515 {2, 49151},
10516 {0, 4295032831},
10517 },
10518 },
10519 },
10520 {
10521 name: "XORQmodifyidx1",
10522 auxType: auxSymOff,
10523 argLen: 4,
10524 clobberFlags: true,
10525 symEffect: SymRead | SymWrite,
10526 asm: x86.AXORQ,
10527 scale: 1,
10528 reg: regInfo{
10529 inputs: []inputInfo{
10530 {1, 49151},
10531 {2, 49151},
10532 {0, 4295032831},
10533 },
10534 },
10535 },
10536 {
10537 name: "XORQmodifyidx8",
10538 auxType: auxSymOff,
10539 argLen: 4,
10540 clobberFlags: true,
10541 symEffect: SymRead | SymWrite,
10542 asm: x86.AXORQ,
10543 scale: 8,
10544 reg: regInfo{
10545 inputs: []inputInfo{
10546 {1, 49151},
10547 {2, 49151},
10548 {0, 4295032831},
10549 },
10550 },
10551 },
10552 {
10553 name: "ADDLmodifyidx1",
10554 auxType: auxSymOff,
10555 argLen: 4,
10556 clobberFlags: true,
10557 symEffect: SymRead | SymWrite,
10558 asm: x86.AADDL,
10559 scale: 1,
10560 reg: regInfo{
10561 inputs: []inputInfo{
10562 {1, 49151},
10563 {2, 49151},
10564 {0, 4295032831},
10565 },
10566 },
10567 },
10568 {
10569 name: "ADDLmodifyidx4",
10570 auxType: auxSymOff,
10571 argLen: 4,
10572 clobberFlags: true,
10573 symEffect: SymRead | SymWrite,
10574 asm: x86.AADDL,
10575 scale: 4,
10576 reg: regInfo{
10577 inputs: []inputInfo{
10578 {1, 49151},
10579 {2, 49151},
10580 {0, 4295032831},
10581 },
10582 },
10583 },
10584 {
10585 name: "ADDLmodifyidx8",
10586 auxType: auxSymOff,
10587 argLen: 4,
10588 clobberFlags: true,
10589 symEffect: SymRead | SymWrite,
10590 asm: x86.AADDL,
10591 scale: 8,
10592 reg: regInfo{
10593 inputs: []inputInfo{
10594 {1, 49151},
10595 {2, 49151},
10596 {0, 4295032831},
10597 },
10598 },
10599 },
10600 {
10601 name: "SUBLmodifyidx1",
10602 auxType: auxSymOff,
10603 argLen: 4,
10604 clobberFlags: true,
10605 symEffect: SymRead | SymWrite,
10606 asm: x86.ASUBL,
10607 scale: 1,
10608 reg: regInfo{
10609 inputs: []inputInfo{
10610 {1, 49151},
10611 {2, 49151},
10612 {0, 4295032831},
10613 },
10614 },
10615 },
10616 {
10617 name: "SUBLmodifyidx4",
10618 auxType: auxSymOff,
10619 argLen: 4,
10620 clobberFlags: true,
10621 symEffect: SymRead | SymWrite,
10622 asm: x86.ASUBL,
10623 scale: 4,
10624 reg: regInfo{
10625 inputs: []inputInfo{
10626 {1, 49151},
10627 {2, 49151},
10628 {0, 4295032831},
10629 },
10630 },
10631 },
10632 {
10633 name: "SUBLmodifyidx8",
10634 auxType: auxSymOff,
10635 argLen: 4,
10636 clobberFlags: true,
10637 symEffect: SymRead | SymWrite,
10638 asm: x86.ASUBL,
10639 scale: 8,
10640 reg: regInfo{
10641 inputs: []inputInfo{
10642 {1, 49151},
10643 {2, 49151},
10644 {0, 4295032831},
10645 },
10646 },
10647 },
10648 {
10649 name: "ANDLmodifyidx1",
10650 auxType: auxSymOff,
10651 argLen: 4,
10652 clobberFlags: true,
10653 symEffect: SymRead | SymWrite,
10654 asm: x86.AANDL,
10655 scale: 1,
10656 reg: regInfo{
10657 inputs: []inputInfo{
10658 {1, 49151},
10659 {2, 49151},
10660 {0, 4295032831},
10661 },
10662 },
10663 },
10664 {
10665 name: "ANDLmodifyidx4",
10666 auxType: auxSymOff,
10667 argLen: 4,
10668 clobberFlags: true,
10669 symEffect: SymRead | SymWrite,
10670 asm: x86.AANDL,
10671 scale: 4,
10672 reg: regInfo{
10673 inputs: []inputInfo{
10674 {1, 49151},
10675 {2, 49151},
10676 {0, 4295032831},
10677 },
10678 },
10679 },
10680 {
10681 name: "ANDLmodifyidx8",
10682 auxType: auxSymOff,
10683 argLen: 4,
10684 clobberFlags: true,
10685 symEffect: SymRead | SymWrite,
10686 asm: x86.AANDL,
10687 scale: 8,
10688 reg: regInfo{
10689 inputs: []inputInfo{
10690 {1, 49151},
10691 {2, 49151},
10692 {0, 4295032831},
10693 },
10694 },
10695 },
10696 {
10697 name: "ORLmodifyidx1",
10698 auxType: auxSymOff,
10699 argLen: 4,
10700 clobberFlags: true,
10701 symEffect: SymRead | SymWrite,
10702 asm: x86.AORL,
10703 scale: 1,
10704 reg: regInfo{
10705 inputs: []inputInfo{
10706 {1, 49151},
10707 {2, 49151},
10708 {0, 4295032831},
10709 },
10710 },
10711 },
10712 {
10713 name: "ORLmodifyidx4",
10714 auxType: auxSymOff,
10715 argLen: 4,
10716 clobberFlags: true,
10717 symEffect: SymRead | SymWrite,
10718 asm: x86.AORL,
10719 scale: 4,
10720 reg: regInfo{
10721 inputs: []inputInfo{
10722 {1, 49151},
10723 {2, 49151},
10724 {0, 4295032831},
10725 },
10726 },
10727 },
10728 {
10729 name: "ORLmodifyidx8",
10730 auxType: auxSymOff,
10731 argLen: 4,
10732 clobberFlags: true,
10733 symEffect: SymRead | SymWrite,
10734 asm: x86.AORL,
10735 scale: 8,
10736 reg: regInfo{
10737 inputs: []inputInfo{
10738 {1, 49151},
10739 {2, 49151},
10740 {0, 4295032831},
10741 },
10742 },
10743 },
10744 {
10745 name: "XORLmodifyidx1",
10746 auxType: auxSymOff,
10747 argLen: 4,
10748 clobberFlags: true,
10749 symEffect: SymRead | SymWrite,
10750 asm: x86.AXORL,
10751 scale: 1,
10752 reg: regInfo{
10753 inputs: []inputInfo{
10754 {1, 49151},
10755 {2, 49151},
10756 {0, 4295032831},
10757 },
10758 },
10759 },
10760 {
10761 name: "XORLmodifyidx4",
10762 auxType: auxSymOff,
10763 argLen: 4,
10764 clobberFlags: true,
10765 symEffect: SymRead | SymWrite,
10766 asm: x86.AXORL,
10767 scale: 4,
10768 reg: regInfo{
10769 inputs: []inputInfo{
10770 {1, 49151},
10771 {2, 49151},
10772 {0, 4295032831},
10773 },
10774 },
10775 },
10776 {
10777 name: "XORLmodifyidx8",
10778 auxType: auxSymOff,
10779 argLen: 4,
10780 clobberFlags: true,
10781 symEffect: SymRead | SymWrite,
10782 asm: x86.AXORL,
10783 scale: 8,
10784 reg: regInfo{
10785 inputs: []inputInfo{
10786 {1, 49151},
10787 {2, 49151},
10788 {0, 4295032831},
10789 },
10790 },
10791 },
10792 {
10793 name: "ADDQconstmodifyidx1",
10794 auxType: auxSymValAndOff,
10795 argLen: 3,
10796 clobberFlags: true,
10797 symEffect: SymRead | SymWrite,
10798 asm: x86.AADDQ,
10799 scale: 1,
10800 reg: regInfo{
10801 inputs: []inputInfo{
10802 {1, 49151},
10803 {0, 4295032831},
10804 },
10805 },
10806 },
10807 {
10808 name: "ADDQconstmodifyidx8",
10809 auxType: auxSymValAndOff,
10810 argLen: 3,
10811 clobberFlags: true,
10812 symEffect: SymRead | SymWrite,
10813 asm: x86.AADDQ,
10814 scale: 8,
10815 reg: regInfo{
10816 inputs: []inputInfo{
10817 {1, 49151},
10818 {0, 4295032831},
10819 },
10820 },
10821 },
10822 {
10823 name: "ANDQconstmodifyidx1",
10824 auxType: auxSymValAndOff,
10825 argLen: 3,
10826 clobberFlags: true,
10827 symEffect: SymRead | SymWrite,
10828 asm: x86.AANDQ,
10829 scale: 1,
10830 reg: regInfo{
10831 inputs: []inputInfo{
10832 {1, 49151},
10833 {0, 4295032831},
10834 },
10835 },
10836 },
10837 {
10838 name: "ANDQconstmodifyidx8",
10839 auxType: auxSymValAndOff,
10840 argLen: 3,
10841 clobberFlags: true,
10842 symEffect: SymRead | SymWrite,
10843 asm: x86.AANDQ,
10844 scale: 8,
10845 reg: regInfo{
10846 inputs: []inputInfo{
10847 {1, 49151},
10848 {0, 4295032831},
10849 },
10850 },
10851 },
10852 {
10853 name: "ORQconstmodifyidx1",
10854 auxType: auxSymValAndOff,
10855 argLen: 3,
10856 clobberFlags: true,
10857 symEffect: SymRead | SymWrite,
10858 asm: x86.AORQ,
10859 scale: 1,
10860 reg: regInfo{
10861 inputs: []inputInfo{
10862 {1, 49151},
10863 {0, 4295032831},
10864 },
10865 },
10866 },
10867 {
10868 name: "ORQconstmodifyidx8",
10869 auxType: auxSymValAndOff,
10870 argLen: 3,
10871 clobberFlags: true,
10872 symEffect: SymRead | SymWrite,
10873 asm: x86.AORQ,
10874 scale: 8,
10875 reg: regInfo{
10876 inputs: []inputInfo{
10877 {1, 49151},
10878 {0, 4295032831},
10879 },
10880 },
10881 },
10882 {
10883 name: "XORQconstmodifyidx1",
10884 auxType: auxSymValAndOff,
10885 argLen: 3,
10886 clobberFlags: true,
10887 symEffect: SymRead | SymWrite,
10888 asm: x86.AXORQ,
10889 scale: 1,
10890 reg: regInfo{
10891 inputs: []inputInfo{
10892 {1, 49151},
10893 {0, 4295032831},
10894 },
10895 },
10896 },
10897 {
10898 name: "XORQconstmodifyidx8",
10899 auxType: auxSymValAndOff,
10900 argLen: 3,
10901 clobberFlags: true,
10902 symEffect: SymRead | SymWrite,
10903 asm: x86.AXORQ,
10904 scale: 8,
10905 reg: regInfo{
10906 inputs: []inputInfo{
10907 {1, 49151},
10908 {0, 4295032831},
10909 },
10910 },
10911 },
10912 {
10913 name: "ADDLconstmodifyidx1",
10914 auxType: auxSymValAndOff,
10915 argLen: 3,
10916 clobberFlags: true,
10917 symEffect: SymRead | SymWrite,
10918 asm: x86.AADDL,
10919 scale: 1,
10920 reg: regInfo{
10921 inputs: []inputInfo{
10922 {1, 49151},
10923 {0, 4295032831},
10924 },
10925 },
10926 },
10927 {
10928 name: "ADDLconstmodifyidx4",
10929 auxType: auxSymValAndOff,
10930 argLen: 3,
10931 clobberFlags: true,
10932 symEffect: SymRead | SymWrite,
10933 asm: x86.AADDL,
10934 scale: 4,
10935 reg: regInfo{
10936 inputs: []inputInfo{
10937 {1, 49151},
10938 {0, 4295032831},
10939 },
10940 },
10941 },
10942 {
10943 name: "ADDLconstmodifyidx8",
10944 auxType: auxSymValAndOff,
10945 argLen: 3,
10946 clobberFlags: true,
10947 symEffect: SymRead | SymWrite,
10948 asm: x86.AADDL,
10949 scale: 8,
10950 reg: regInfo{
10951 inputs: []inputInfo{
10952 {1, 49151},
10953 {0, 4295032831},
10954 },
10955 },
10956 },
10957 {
10958 name: "ANDLconstmodifyidx1",
10959 auxType: auxSymValAndOff,
10960 argLen: 3,
10961 clobberFlags: true,
10962 symEffect: SymRead | SymWrite,
10963 asm: x86.AANDL,
10964 scale: 1,
10965 reg: regInfo{
10966 inputs: []inputInfo{
10967 {1, 49151},
10968 {0, 4295032831},
10969 },
10970 },
10971 },
10972 {
10973 name: "ANDLconstmodifyidx4",
10974 auxType: auxSymValAndOff,
10975 argLen: 3,
10976 clobberFlags: true,
10977 symEffect: SymRead | SymWrite,
10978 asm: x86.AANDL,
10979 scale: 4,
10980 reg: regInfo{
10981 inputs: []inputInfo{
10982 {1, 49151},
10983 {0, 4295032831},
10984 },
10985 },
10986 },
10987 {
10988 name: "ANDLconstmodifyidx8",
10989 auxType: auxSymValAndOff,
10990 argLen: 3,
10991 clobberFlags: true,
10992 symEffect: SymRead | SymWrite,
10993 asm: x86.AANDL,
10994 scale: 8,
10995 reg: regInfo{
10996 inputs: []inputInfo{
10997 {1, 49151},
10998 {0, 4295032831},
10999 },
11000 },
11001 },
11002 {
11003 name: "ORLconstmodifyidx1",
11004 auxType: auxSymValAndOff,
11005 argLen: 3,
11006 clobberFlags: true,
11007 symEffect: SymRead | SymWrite,
11008 asm: x86.AORL,
11009 scale: 1,
11010 reg: regInfo{
11011 inputs: []inputInfo{
11012 {1, 49151},
11013 {0, 4295032831},
11014 },
11015 },
11016 },
11017 {
11018 name: "ORLconstmodifyidx4",
11019 auxType: auxSymValAndOff,
11020 argLen: 3,
11021 clobberFlags: true,
11022 symEffect: SymRead | SymWrite,
11023 asm: x86.AORL,
11024 scale: 4,
11025 reg: regInfo{
11026 inputs: []inputInfo{
11027 {1, 49151},
11028 {0, 4295032831},
11029 },
11030 },
11031 },
11032 {
11033 name: "ORLconstmodifyidx8",
11034 auxType: auxSymValAndOff,
11035 argLen: 3,
11036 clobberFlags: true,
11037 symEffect: SymRead | SymWrite,
11038 asm: x86.AORL,
11039 scale: 8,
11040 reg: regInfo{
11041 inputs: []inputInfo{
11042 {1, 49151},
11043 {0, 4295032831},
11044 },
11045 },
11046 },
11047 {
11048 name: "XORLconstmodifyidx1",
11049 auxType: auxSymValAndOff,
11050 argLen: 3,
11051 clobberFlags: true,
11052 symEffect: SymRead | SymWrite,
11053 asm: x86.AXORL,
11054 scale: 1,
11055 reg: regInfo{
11056 inputs: []inputInfo{
11057 {1, 49151},
11058 {0, 4295032831},
11059 },
11060 },
11061 },
11062 {
11063 name: "XORLconstmodifyidx4",
11064 auxType: auxSymValAndOff,
11065 argLen: 3,
11066 clobberFlags: true,
11067 symEffect: SymRead | SymWrite,
11068 asm: x86.AXORL,
11069 scale: 4,
11070 reg: regInfo{
11071 inputs: []inputInfo{
11072 {1, 49151},
11073 {0, 4295032831},
11074 },
11075 },
11076 },
11077 {
11078 name: "XORLconstmodifyidx8",
11079 auxType: auxSymValAndOff,
11080 argLen: 3,
11081 clobberFlags: true,
11082 symEffect: SymRead | SymWrite,
11083 asm: x86.AXORL,
11084 scale: 8,
11085 reg: regInfo{
11086 inputs: []inputInfo{
11087 {1, 49151},
11088 {0, 4295032831},
11089 },
11090 },
11091 },
11092 {
11093 name: "NEGQ",
11094 argLen: 1,
11095 resultInArg0: true,
11096 clobberFlags: true,
11097 asm: x86.ANEGQ,
11098 reg: regInfo{
11099 inputs: []inputInfo{
11100 {0, 49135},
11101 },
11102 outputs: []outputInfo{
11103 {0, 49135},
11104 },
11105 },
11106 },
11107 {
11108 name: "NEGL",
11109 argLen: 1,
11110 resultInArg0: true,
11111 clobberFlags: true,
11112 asm: x86.ANEGL,
11113 reg: regInfo{
11114 inputs: []inputInfo{
11115 {0, 49135},
11116 },
11117 outputs: []outputInfo{
11118 {0, 49135},
11119 },
11120 },
11121 },
11122 {
11123 name: "NOTQ",
11124 argLen: 1,
11125 resultInArg0: true,
11126 asm: x86.ANOTQ,
11127 reg: regInfo{
11128 inputs: []inputInfo{
11129 {0, 49135},
11130 },
11131 outputs: []outputInfo{
11132 {0, 49135},
11133 },
11134 },
11135 },
11136 {
11137 name: "NOTL",
11138 argLen: 1,
11139 resultInArg0: true,
11140 asm: x86.ANOTL,
11141 reg: regInfo{
11142 inputs: []inputInfo{
11143 {0, 49135},
11144 },
11145 outputs: []outputInfo{
11146 {0, 49135},
11147 },
11148 },
11149 },
11150 {
11151 name: "BSFQ",
11152 argLen: 1,
11153 asm: x86.ABSFQ,
11154 reg: regInfo{
11155 inputs: []inputInfo{
11156 {0, 49135},
11157 },
11158 outputs: []outputInfo{
11159 {1, 0},
11160 {0, 49135},
11161 },
11162 },
11163 },
11164 {
11165 name: "BSFL",
11166 argLen: 1,
11167 clobberFlags: true,
11168 asm: x86.ABSFL,
11169 reg: regInfo{
11170 inputs: []inputInfo{
11171 {0, 49135},
11172 },
11173 outputs: []outputInfo{
11174 {0, 49135},
11175 },
11176 },
11177 },
11178 {
11179 name: "BSRQ",
11180 argLen: 1,
11181 asm: x86.ABSRQ,
11182 reg: regInfo{
11183 inputs: []inputInfo{
11184 {0, 49135},
11185 },
11186 outputs: []outputInfo{
11187 {1, 0},
11188 {0, 49135},
11189 },
11190 },
11191 },
11192 {
11193 name: "BSRL",
11194 argLen: 1,
11195 clobberFlags: true,
11196 asm: x86.ABSRL,
11197 reg: regInfo{
11198 inputs: []inputInfo{
11199 {0, 49135},
11200 },
11201 outputs: []outputInfo{
11202 {0, 49135},
11203 },
11204 },
11205 },
11206 {
11207 name: "CMOVQEQ",
11208 argLen: 3,
11209 resultInArg0: true,
11210 asm: x86.ACMOVQEQ,
11211 reg: regInfo{
11212 inputs: []inputInfo{
11213 {0, 49135},
11214 {1, 49135},
11215 },
11216 outputs: []outputInfo{
11217 {0, 49135},
11218 },
11219 },
11220 },
11221 {
11222 name: "CMOVQNE",
11223 argLen: 3,
11224 resultInArg0: true,
11225 asm: x86.ACMOVQNE,
11226 reg: regInfo{
11227 inputs: []inputInfo{
11228 {0, 49135},
11229 {1, 49135},
11230 },
11231 outputs: []outputInfo{
11232 {0, 49135},
11233 },
11234 },
11235 },
11236 {
11237 name: "CMOVQLT",
11238 argLen: 3,
11239 resultInArg0: true,
11240 asm: x86.ACMOVQLT,
11241 reg: regInfo{
11242 inputs: []inputInfo{
11243 {0, 49135},
11244 {1, 49135},
11245 },
11246 outputs: []outputInfo{
11247 {0, 49135},
11248 },
11249 },
11250 },
11251 {
11252 name: "CMOVQGT",
11253 argLen: 3,
11254 resultInArg0: true,
11255 asm: x86.ACMOVQGT,
11256 reg: regInfo{
11257 inputs: []inputInfo{
11258 {0, 49135},
11259 {1, 49135},
11260 },
11261 outputs: []outputInfo{
11262 {0, 49135},
11263 },
11264 },
11265 },
11266 {
11267 name: "CMOVQLE",
11268 argLen: 3,
11269 resultInArg0: true,
11270 asm: x86.ACMOVQLE,
11271 reg: regInfo{
11272 inputs: []inputInfo{
11273 {0, 49135},
11274 {1, 49135},
11275 },
11276 outputs: []outputInfo{
11277 {0, 49135},
11278 },
11279 },
11280 },
11281 {
11282 name: "CMOVQGE",
11283 argLen: 3,
11284 resultInArg0: true,
11285 asm: x86.ACMOVQGE,
11286 reg: regInfo{
11287 inputs: []inputInfo{
11288 {0, 49135},
11289 {1, 49135},
11290 },
11291 outputs: []outputInfo{
11292 {0, 49135},
11293 },
11294 },
11295 },
11296 {
11297 name: "CMOVQLS",
11298 argLen: 3,
11299 resultInArg0: true,
11300 asm: x86.ACMOVQLS,
11301 reg: regInfo{
11302 inputs: []inputInfo{
11303 {0, 49135},
11304 {1, 49135},
11305 },
11306 outputs: []outputInfo{
11307 {0, 49135},
11308 },
11309 },
11310 },
11311 {
11312 name: "CMOVQHI",
11313 argLen: 3,
11314 resultInArg0: true,
11315 asm: x86.ACMOVQHI,
11316 reg: regInfo{
11317 inputs: []inputInfo{
11318 {0, 49135},
11319 {1, 49135},
11320 },
11321 outputs: []outputInfo{
11322 {0, 49135},
11323 },
11324 },
11325 },
11326 {
11327 name: "CMOVQCC",
11328 argLen: 3,
11329 resultInArg0: true,
11330 asm: x86.ACMOVQCC,
11331 reg: regInfo{
11332 inputs: []inputInfo{
11333 {0, 49135},
11334 {1, 49135},
11335 },
11336 outputs: []outputInfo{
11337 {0, 49135},
11338 },
11339 },
11340 },
11341 {
11342 name: "CMOVQCS",
11343 argLen: 3,
11344 resultInArg0: true,
11345 asm: x86.ACMOVQCS,
11346 reg: regInfo{
11347 inputs: []inputInfo{
11348 {0, 49135},
11349 {1, 49135},
11350 },
11351 outputs: []outputInfo{
11352 {0, 49135},
11353 },
11354 },
11355 },
11356 {
11357 name: "CMOVLEQ",
11358 argLen: 3,
11359 resultInArg0: true,
11360 asm: x86.ACMOVLEQ,
11361 reg: regInfo{
11362 inputs: []inputInfo{
11363 {0, 49135},
11364 {1, 49135},
11365 },
11366 outputs: []outputInfo{
11367 {0, 49135},
11368 },
11369 },
11370 },
11371 {
11372 name: "CMOVLNE",
11373 argLen: 3,
11374 resultInArg0: true,
11375 asm: x86.ACMOVLNE,
11376 reg: regInfo{
11377 inputs: []inputInfo{
11378 {0, 49135},
11379 {1, 49135},
11380 },
11381 outputs: []outputInfo{
11382 {0, 49135},
11383 },
11384 },
11385 },
11386 {
11387 name: "CMOVLLT",
11388 argLen: 3,
11389 resultInArg0: true,
11390 asm: x86.ACMOVLLT,
11391 reg: regInfo{
11392 inputs: []inputInfo{
11393 {0, 49135},
11394 {1, 49135},
11395 },
11396 outputs: []outputInfo{
11397 {0, 49135},
11398 },
11399 },
11400 },
11401 {
11402 name: "CMOVLGT",
11403 argLen: 3,
11404 resultInArg0: true,
11405 asm: x86.ACMOVLGT,
11406 reg: regInfo{
11407 inputs: []inputInfo{
11408 {0, 49135},
11409 {1, 49135},
11410 },
11411 outputs: []outputInfo{
11412 {0, 49135},
11413 },
11414 },
11415 },
11416 {
11417 name: "CMOVLLE",
11418 argLen: 3,
11419 resultInArg0: true,
11420 asm: x86.ACMOVLLE,
11421 reg: regInfo{
11422 inputs: []inputInfo{
11423 {0, 49135},
11424 {1, 49135},
11425 },
11426 outputs: []outputInfo{
11427 {0, 49135},
11428 },
11429 },
11430 },
11431 {
11432 name: "CMOVLGE",
11433 argLen: 3,
11434 resultInArg0: true,
11435 asm: x86.ACMOVLGE,
11436 reg: regInfo{
11437 inputs: []inputInfo{
11438 {0, 49135},
11439 {1, 49135},
11440 },
11441 outputs: []outputInfo{
11442 {0, 49135},
11443 },
11444 },
11445 },
11446 {
11447 name: "CMOVLLS",
11448 argLen: 3,
11449 resultInArg0: true,
11450 asm: x86.ACMOVLLS,
11451 reg: regInfo{
11452 inputs: []inputInfo{
11453 {0, 49135},
11454 {1, 49135},
11455 },
11456 outputs: []outputInfo{
11457 {0, 49135},
11458 },
11459 },
11460 },
11461 {
11462 name: "CMOVLHI",
11463 argLen: 3,
11464 resultInArg0: true,
11465 asm: x86.ACMOVLHI,
11466 reg: regInfo{
11467 inputs: []inputInfo{
11468 {0, 49135},
11469 {1, 49135},
11470 },
11471 outputs: []outputInfo{
11472 {0, 49135},
11473 },
11474 },
11475 },
11476 {
11477 name: "CMOVLCC",
11478 argLen: 3,
11479 resultInArg0: true,
11480 asm: x86.ACMOVLCC,
11481 reg: regInfo{
11482 inputs: []inputInfo{
11483 {0, 49135},
11484 {1, 49135},
11485 },
11486 outputs: []outputInfo{
11487 {0, 49135},
11488 },
11489 },
11490 },
11491 {
11492 name: "CMOVLCS",
11493 argLen: 3,
11494 resultInArg0: true,
11495 asm: x86.ACMOVLCS,
11496 reg: regInfo{
11497 inputs: []inputInfo{
11498 {0, 49135},
11499 {1, 49135},
11500 },
11501 outputs: []outputInfo{
11502 {0, 49135},
11503 },
11504 },
11505 },
11506 {
11507 name: "CMOVWEQ",
11508 argLen: 3,
11509 resultInArg0: true,
11510 asm: x86.ACMOVWEQ,
11511 reg: regInfo{
11512 inputs: []inputInfo{
11513 {0, 49135},
11514 {1, 49135},
11515 },
11516 outputs: []outputInfo{
11517 {0, 49135},
11518 },
11519 },
11520 },
11521 {
11522 name: "CMOVWNE",
11523 argLen: 3,
11524 resultInArg0: true,
11525 asm: x86.ACMOVWNE,
11526 reg: regInfo{
11527 inputs: []inputInfo{
11528 {0, 49135},
11529 {1, 49135},
11530 },
11531 outputs: []outputInfo{
11532 {0, 49135},
11533 },
11534 },
11535 },
11536 {
11537 name: "CMOVWLT",
11538 argLen: 3,
11539 resultInArg0: true,
11540 asm: x86.ACMOVWLT,
11541 reg: regInfo{
11542 inputs: []inputInfo{
11543 {0, 49135},
11544 {1, 49135},
11545 },
11546 outputs: []outputInfo{
11547 {0, 49135},
11548 },
11549 },
11550 },
11551 {
11552 name: "CMOVWGT",
11553 argLen: 3,
11554 resultInArg0: true,
11555 asm: x86.ACMOVWGT,
11556 reg: regInfo{
11557 inputs: []inputInfo{
11558 {0, 49135},
11559 {1, 49135},
11560 },
11561 outputs: []outputInfo{
11562 {0, 49135},
11563 },
11564 },
11565 },
11566 {
11567 name: "CMOVWLE",
11568 argLen: 3,
11569 resultInArg0: true,
11570 asm: x86.ACMOVWLE,
11571 reg: regInfo{
11572 inputs: []inputInfo{
11573 {0, 49135},
11574 {1, 49135},
11575 },
11576 outputs: []outputInfo{
11577 {0, 49135},
11578 },
11579 },
11580 },
11581 {
11582 name: "CMOVWGE",
11583 argLen: 3,
11584 resultInArg0: true,
11585 asm: x86.ACMOVWGE,
11586 reg: regInfo{
11587 inputs: []inputInfo{
11588 {0, 49135},
11589 {1, 49135},
11590 },
11591 outputs: []outputInfo{
11592 {0, 49135},
11593 },
11594 },
11595 },
11596 {
11597 name: "CMOVWLS",
11598 argLen: 3,
11599 resultInArg0: true,
11600 asm: x86.ACMOVWLS,
11601 reg: regInfo{
11602 inputs: []inputInfo{
11603 {0, 49135},
11604 {1, 49135},
11605 },
11606 outputs: []outputInfo{
11607 {0, 49135},
11608 },
11609 },
11610 },
11611 {
11612 name: "CMOVWHI",
11613 argLen: 3,
11614 resultInArg0: true,
11615 asm: x86.ACMOVWHI,
11616 reg: regInfo{
11617 inputs: []inputInfo{
11618 {0, 49135},
11619 {1, 49135},
11620 },
11621 outputs: []outputInfo{
11622 {0, 49135},
11623 },
11624 },
11625 },
11626 {
11627 name: "CMOVWCC",
11628 argLen: 3,
11629 resultInArg0: true,
11630 asm: x86.ACMOVWCC,
11631 reg: regInfo{
11632 inputs: []inputInfo{
11633 {0, 49135},
11634 {1, 49135},
11635 },
11636 outputs: []outputInfo{
11637 {0, 49135},
11638 },
11639 },
11640 },
11641 {
11642 name: "CMOVWCS",
11643 argLen: 3,
11644 resultInArg0: true,
11645 asm: x86.ACMOVWCS,
11646 reg: regInfo{
11647 inputs: []inputInfo{
11648 {0, 49135},
11649 {1, 49135},
11650 },
11651 outputs: []outputInfo{
11652 {0, 49135},
11653 },
11654 },
11655 },
11656 {
11657 name: "CMOVQEQF",
11658 argLen: 3,
11659 resultInArg0: true,
11660 needIntTemp: true,
11661 asm: x86.ACMOVQNE,
11662 reg: regInfo{
11663 inputs: []inputInfo{
11664 {0, 49135},
11665 {1, 49135},
11666 },
11667 outputs: []outputInfo{
11668 {0, 49135},
11669 },
11670 },
11671 },
11672 {
11673 name: "CMOVQNEF",
11674 argLen: 3,
11675 resultInArg0: true,
11676 asm: x86.ACMOVQNE,
11677 reg: regInfo{
11678 inputs: []inputInfo{
11679 {0, 49135},
11680 {1, 49135},
11681 },
11682 outputs: []outputInfo{
11683 {0, 49135},
11684 },
11685 },
11686 },
11687 {
11688 name: "CMOVQGTF",
11689 argLen: 3,
11690 resultInArg0: true,
11691 asm: x86.ACMOVQHI,
11692 reg: regInfo{
11693 inputs: []inputInfo{
11694 {0, 49135},
11695 {1, 49135},
11696 },
11697 outputs: []outputInfo{
11698 {0, 49135},
11699 },
11700 },
11701 },
11702 {
11703 name: "CMOVQGEF",
11704 argLen: 3,
11705 resultInArg0: true,
11706 asm: x86.ACMOVQCC,
11707 reg: regInfo{
11708 inputs: []inputInfo{
11709 {0, 49135},
11710 {1, 49135},
11711 },
11712 outputs: []outputInfo{
11713 {0, 49135},
11714 },
11715 },
11716 },
11717 {
11718 name: "CMOVLEQF",
11719 argLen: 3,
11720 resultInArg0: true,
11721 needIntTemp: true,
11722 asm: x86.ACMOVLNE,
11723 reg: regInfo{
11724 inputs: []inputInfo{
11725 {0, 49135},
11726 {1, 49135},
11727 },
11728 outputs: []outputInfo{
11729 {0, 49135},
11730 },
11731 },
11732 },
11733 {
11734 name: "CMOVLNEF",
11735 argLen: 3,
11736 resultInArg0: true,
11737 asm: x86.ACMOVLNE,
11738 reg: regInfo{
11739 inputs: []inputInfo{
11740 {0, 49135},
11741 {1, 49135},
11742 },
11743 outputs: []outputInfo{
11744 {0, 49135},
11745 },
11746 },
11747 },
11748 {
11749 name: "CMOVLGTF",
11750 argLen: 3,
11751 resultInArg0: true,
11752 asm: x86.ACMOVLHI,
11753 reg: regInfo{
11754 inputs: []inputInfo{
11755 {0, 49135},
11756 {1, 49135},
11757 },
11758 outputs: []outputInfo{
11759 {0, 49135},
11760 },
11761 },
11762 },
11763 {
11764 name: "CMOVLGEF",
11765 argLen: 3,
11766 resultInArg0: true,
11767 asm: x86.ACMOVLCC,
11768 reg: regInfo{
11769 inputs: []inputInfo{
11770 {0, 49135},
11771 {1, 49135},
11772 },
11773 outputs: []outputInfo{
11774 {0, 49135},
11775 },
11776 },
11777 },
11778 {
11779 name: "CMOVWEQF",
11780 argLen: 3,
11781 resultInArg0: true,
11782 needIntTemp: true,
11783 asm: x86.ACMOVWNE,
11784 reg: regInfo{
11785 inputs: []inputInfo{
11786 {0, 49135},
11787 {1, 49135},
11788 },
11789 outputs: []outputInfo{
11790 {0, 49135},
11791 },
11792 },
11793 },
11794 {
11795 name: "CMOVWNEF",
11796 argLen: 3,
11797 resultInArg0: true,
11798 asm: x86.ACMOVWNE,
11799 reg: regInfo{
11800 inputs: []inputInfo{
11801 {0, 49135},
11802 {1, 49135},
11803 },
11804 outputs: []outputInfo{
11805 {0, 49135},
11806 },
11807 },
11808 },
11809 {
11810 name: "CMOVWGTF",
11811 argLen: 3,
11812 resultInArg0: true,
11813 asm: x86.ACMOVWHI,
11814 reg: regInfo{
11815 inputs: []inputInfo{
11816 {0, 49135},
11817 {1, 49135},
11818 },
11819 outputs: []outputInfo{
11820 {0, 49135},
11821 },
11822 },
11823 },
11824 {
11825 name: "CMOVWGEF",
11826 argLen: 3,
11827 resultInArg0: true,
11828 asm: x86.ACMOVWCC,
11829 reg: regInfo{
11830 inputs: []inputInfo{
11831 {0, 49135},
11832 {1, 49135},
11833 },
11834 outputs: []outputInfo{
11835 {0, 49135},
11836 },
11837 },
11838 },
11839 {
11840 name: "BSWAPQ",
11841 argLen: 1,
11842 resultInArg0: true,
11843 asm: x86.ABSWAPQ,
11844 reg: regInfo{
11845 inputs: []inputInfo{
11846 {0, 49135},
11847 },
11848 outputs: []outputInfo{
11849 {0, 49135},
11850 },
11851 },
11852 },
11853 {
11854 name: "BSWAPL",
11855 argLen: 1,
11856 resultInArg0: true,
11857 asm: x86.ABSWAPL,
11858 reg: regInfo{
11859 inputs: []inputInfo{
11860 {0, 49135},
11861 },
11862 outputs: []outputInfo{
11863 {0, 49135},
11864 },
11865 },
11866 },
11867 {
11868 name: "POPCNTQ",
11869 argLen: 1,
11870 clobberFlags: true,
11871 asm: x86.APOPCNTQ,
11872 reg: regInfo{
11873 inputs: []inputInfo{
11874 {0, 49135},
11875 },
11876 outputs: []outputInfo{
11877 {0, 49135},
11878 },
11879 },
11880 },
11881 {
11882 name: "POPCNTL",
11883 argLen: 1,
11884 clobberFlags: true,
11885 asm: x86.APOPCNTL,
11886 reg: regInfo{
11887 inputs: []inputInfo{
11888 {0, 49135},
11889 },
11890 outputs: []outputInfo{
11891 {0, 49135},
11892 },
11893 },
11894 },
11895 {
11896 name: "SQRTSD",
11897 argLen: 1,
11898 asm: x86.ASQRTSD,
11899 reg: regInfo{
11900 inputs: []inputInfo{
11901 {0, 2147418112},
11902 },
11903 outputs: []outputInfo{
11904 {0, 2147418112},
11905 },
11906 },
11907 },
11908 {
11909 name: "SQRTSS",
11910 argLen: 1,
11911 asm: x86.ASQRTSS,
11912 reg: regInfo{
11913 inputs: []inputInfo{
11914 {0, 2147418112},
11915 },
11916 outputs: []outputInfo{
11917 {0, 2147418112},
11918 },
11919 },
11920 },
11921 {
11922 name: "ROUNDSD",
11923 auxType: auxInt8,
11924 argLen: 1,
11925 asm: x86.AROUNDSD,
11926 reg: regInfo{
11927 inputs: []inputInfo{
11928 {0, 2147418112},
11929 },
11930 outputs: []outputInfo{
11931 {0, 2147418112},
11932 },
11933 },
11934 },
11935 {
11936 name: "VFMADD231SD",
11937 argLen: 3,
11938 resultInArg0: true,
11939 asm: x86.AVFMADD231SD,
11940 reg: regInfo{
11941 inputs: []inputInfo{
11942 {0, 2147418112},
11943 {1, 2147418112},
11944 {2, 2147418112},
11945 },
11946 outputs: []outputInfo{
11947 {0, 2147418112},
11948 },
11949 },
11950 },
11951 {
11952 name: "MINSD",
11953 argLen: 2,
11954 resultInArg0: true,
11955 asm: x86.AMINSD,
11956 reg: regInfo{
11957 inputs: []inputInfo{
11958 {0, 2147418112},
11959 {1, 2147418112},
11960 },
11961 outputs: []outputInfo{
11962 {0, 2147418112},
11963 },
11964 },
11965 },
11966 {
11967 name: "MINSS",
11968 argLen: 2,
11969 resultInArg0: true,
11970 asm: x86.AMINSS,
11971 reg: regInfo{
11972 inputs: []inputInfo{
11973 {0, 2147418112},
11974 {1, 2147418112},
11975 },
11976 outputs: []outputInfo{
11977 {0, 2147418112},
11978 },
11979 },
11980 },
11981 {
11982 name: "SBBQcarrymask",
11983 argLen: 1,
11984 asm: x86.ASBBQ,
11985 reg: regInfo{
11986 outputs: []outputInfo{
11987 {0, 49135},
11988 },
11989 },
11990 },
11991 {
11992 name: "SBBLcarrymask",
11993 argLen: 1,
11994 asm: x86.ASBBL,
11995 reg: regInfo{
11996 outputs: []outputInfo{
11997 {0, 49135},
11998 },
11999 },
12000 },
12001 {
12002 name: "SETEQ",
12003 argLen: 1,
12004 asm: x86.ASETEQ,
12005 reg: regInfo{
12006 outputs: []outputInfo{
12007 {0, 49135},
12008 },
12009 },
12010 },
12011 {
12012 name: "SETNE",
12013 argLen: 1,
12014 asm: x86.ASETNE,
12015 reg: regInfo{
12016 outputs: []outputInfo{
12017 {0, 49135},
12018 },
12019 },
12020 },
12021 {
12022 name: "SETL",
12023 argLen: 1,
12024 asm: x86.ASETLT,
12025 reg: regInfo{
12026 outputs: []outputInfo{
12027 {0, 49135},
12028 },
12029 },
12030 },
12031 {
12032 name: "SETLE",
12033 argLen: 1,
12034 asm: x86.ASETLE,
12035 reg: regInfo{
12036 outputs: []outputInfo{
12037 {0, 49135},
12038 },
12039 },
12040 },
12041 {
12042 name: "SETG",
12043 argLen: 1,
12044 asm: x86.ASETGT,
12045 reg: regInfo{
12046 outputs: []outputInfo{
12047 {0, 49135},
12048 },
12049 },
12050 },
12051 {
12052 name: "SETGE",
12053 argLen: 1,
12054 asm: x86.ASETGE,
12055 reg: regInfo{
12056 outputs: []outputInfo{
12057 {0, 49135},
12058 },
12059 },
12060 },
12061 {
12062 name: "SETB",
12063 argLen: 1,
12064 asm: x86.ASETCS,
12065 reg: regInfo{
12066 outputs: []outputInfo{
12067 {0, 49135},
12068 },
12069 },
12070 },
12071 {
12072 name: "SETBE",
12073 argLen: 1,
12074 asm: x86.ASETLS,
12075 reg: regInfo{
12076 outputs: []outputInfo{
12077 {0, 49135},
12078 },
12079 },
12080 },
12081 {
12082 name: "SETA",
12083 argLen: 1,
12084 asm: x86.ASETHI,
12085 reg: regInfo{
12086 outputs: []outputInfo{
12087 {0, 49135},
12088 },
12089 },
12090 },
12091 {
12092 name: "SETAE",
12093 argLen: 1,
12094 asm: x86.ASETCC,
12095 reg: regInfo{
12096 outputs: []outputInfo{
12097 {0, 49135},
12098 },
12099 },
12100 },
12101 {
12102 name: "SETO",
12103 argLen: 1,
12104 asm: x86.ASETOS,
12105 reg: regInfo{
12106 outputs: []outputInfo{
12107 {0, 49135},
12108 },
12109 },
12110 },
12111 {
12112 name: "SETEQstore",
12113 auxType: auxSymOff,
12114 argLen: 3,
12115 faultOnNilArg0: true,
12116 symEffect: SymWrite,
12117 asm: x86.ASETEQ,
12118 reg: regInfo{
12119 inputs: []inputInfo{
12120 {0, 4295032831},
12121 },
12122 },
12123 },
12124 {
12125 name: "SETNEstore",
12126 auxType: auxSymOff,
12127 argLen: 3,
12128 faultOnNilArg0: true,
12129 symEffect: SymWrite,
12130 asm: x86.ASETNE,
12131 reg: regInfo{
12132 inputs: []inputInfo{
12133 {0, 4295032831},
12134 },
12135 },
12136 },
12137 {
12138 name: "SETLstore",
12139 auxType: auxSymOff,
12140 argLen: 3,
12141 faultOnNilArg0: true,
12142 symEffect: SymWrite,
12143 asm: x86.ASETLT,
12144 reg: regInfo{
12145 inputs: []inputInfo{
12146 {0, 4295032831},
12147 },
12148 },
12149 },
12150 {
12151 name: "SETLEstore",
12152 auxType: auxSymOff,
12153 argLen: 3,
12154 faultOnNilArg0: true,
12155 symEffect: SymWrite,
12156 asm: x86.ASETLE,
12157 reg: regInfo{
12158 inputs: []inputInfo{
12159 {0, 4295032831},
12160 },
12161 },
12162 },
12163 {
12164 name: "SETGstore",
12165 auxType: auxSymOff,
12166 argLen: 3,
12167 faultOnNilArg0: true,
12168 symEffect: SymWrite,
12169 asm: x86.ASETGT,
12170 reg: regInfo{
12171 inputs: []inputInfo{
12172 {0, 4295032831},
12173 },
12174 },
12175 },
12176 {
12177 name: "SETGEstore",
12178 auxType: auxSymOff,
12179 argLen: 3,
12180 faultOnNilArg0: true,
12181 symEffect: SymWrite,
12182 asm: x86.ASETGE,
12183 reg: regInfo{
12184 inputs: []inputInfo{
12185 {0, 4295032831},
12186 },
12187 },
12188 },
12189 {
12190 name: "SETBstore",
12191 auxType: auxSymOff,
12192 argLen: 3,
12193 faultOnNilArg0: true,
12194 symEffect: SymWrite,
12195 asm: x86.ASETCS,
12196 reg: regInfo{
12197 inputs: []inputInfo{
12198 {0, 4295032831},
12199 },
12200 },
12201 },
12202 {
12203 name: "SETBEstore",
12204 auxType: auxSymOff,
12205 argLen: 3,
12206 faultOnNilArg0: true,
12207 symEffect: SymWrite,
12208 asm: x86.ASETLS,
12209 reg: regInfo{
12210 inputs: []inputInfo{
12211 {0, 4295032831},
12212 },
12213 },
12214 },
12215 {
12216 name: "SETAstore",
12217 auxType: auxSymOff,
12218 argLen: 3,
12219 faultOnNilArg0: true,
12220 symEffect: SymWrite,
12221 asm: x86.ASETHI,
12222 reg: regInfo{
12223 inputs: []inputInfo{
12224 {0, 4295032831},
12225 },
12226 },
12227 },
12228 {
12229 name: "SETAEstore",
12230 auxType: auxSymOff,
12231 argLen: 3,
12232 faultOnNilArg0: true,
12233 symEffect: SymWrite,
12234 asm: x86.ASETCC,
12235 reg: regInfo{
12236 inputs: []inputInfo{
12237 {0, 4295032831},
12238 },
12239 },
12240 },
12241 {
12242 name: "SETEQstoreidx1",
12243 auxType: auxSymOff,
12244 argLen: 4,
12245 commutative: true,
12246 symEffect: SymWrite,
12247 asm: x86.ASETEQ,
12248 scale: 1,
12249 reg: regInfo{
12250 inputs: []inputInfo{
12251 {1, 49151},
12252 {0, 4295032831},
12253 },
12254 },
12255 },
12256 {
12257 name: "SETNEstoreidx1",
12258 auxType: auxSymOff,
12259 argLen: 4,
12260 commutative: true,
12261 symEffect: SymWrite,
12262 asm: x86.ASETNE,
12263 scale: 1,
12264 reg: regInfo{
12265 inputs: []inputInfo{
12266 {1, 49151},
12267 {0, 4295032831},
12268 },
12269 },
12270 },
12271 {
12272 name: "SETLstoreidx1",
12273 auxType: auxSymOff,
12274 argLen: 4,
12275 commutative: true,
12276 symEffect: SymWrite,
12277 asm: x86.ASETLT,
12278 scale: 1,
12279 reg: regInfo{
12280 inputs: []inputInfo{
12281 {1, 49151},
12282 {0, 4295032831},
12283 },
12284 },
12285 },
12286 {
12287 name: "SETLEstoreidx1",
12288 auxType: auxSymOff,
12289 argLen: 4,
12290 commutative: true,
12291 symEffect: SymWrite,
12292 asm: x86.ASETLE,
12293 scale: 1,
12294 reg: regInfo{
12295 inputs: []inputInfo{
12296 {1, 49151},
12297 {0, 4295032831},
12298 },
12299 },
12300 },
12301 {
12302 name: "SETGstoreidx1",
12303 auxType: auxSymOff,
12304 argLen: 4,
12305 commutative: true,
12306 symEffect: SymWrite,
12307 asm: x86.ASETGT,
12308 scale: 1,
12309 reg: regInfo{
12310 inputs: []inputInfo{
12311 {1, 49151},
12312 {0, 4295032831},
12313 },
12314 },
12315 },
12316 {
12317 name: "SETGEstoreidx1",
12318 auxType: auxSymOff,
12319 argLen: 4,
12320 commutative: true,
12321 symEffect: SymWrite,
12322 asm: x86.ASETGE,
12323 scale: 1,
12324 reg: regInfo{
12325 inputs: []inputInfo{
12326 {1, 49151},
12327 {0, 4295032831},
12328 },
12329 },
12330 },
12331 {
12332 name: "SETBstoreidx1",
12333 auxType: auxSymOff,
12334 argLen: 4,
12335 commutative: true,
12336 symEffect: SymWrite,
12337 asm: x86.ASETCS,
12338 scale: 1,
12339 reg: regInfo{
12340 inputs: []inputInfo{
12341 {1, 49151},
12342 {0, 4295032831},
12343 },
12344 },
12345 },
12346 {
12347 name: "SETBEstoreidx1",
12348 auxType: auxSymOff,
12349 argLen: 4,
12350 commutative: true,
12351 symEffect: SymWrite,
12352 asm: x86.ASETLS,
12353 scale: 1,
12354 reg: regInfo{
12355 inputs: []inputInfo{
12356 {1, 49151},
12357 {0, 4295032831},
12358 },
12359 },
12360 },
12361 {
12362 name: "SETAstoreidx1",
12363 auxType: auxSymOff,
12364 argLen: 4,
12365 commutative: true,
12366 symEffect: SymWrite,
12367 asm: x86.ASETHI,
12368 scale: 1,
12369 reg: regInfo{
12370 inputs: []inputInfo{
12371 {1, 49151},
12372 {0, 4295032831},
12373 },
12374 },
12375 },
12376 {
12377 name: "SETAEstoreidx1",
12378 auxType: auxSymOff,
12379 argLen: 4,
12380 commutative: true,
12381 symEffect: SymWrite,
12382 asm: x86.ASETCC,
12383 scale: 1,
12384 reg: regInfo{
12385 inputs: []inputInfo{
12386 {1, 49151},
12387 {0, 4295032831},
12388 },
12389 },
12390 },
12391 {
12392 name: "SETEQF",
12393 argLen: 1,
12394 clobberFlags: true,
12395 needIntTemp: true,
12396 asm: x86.ASETEQ,
12397 reg: regInfo{
12398 outputs: []outputInfo{
12399 {0, 49135},
12400 },
12401 },
12402 },
12403 {
12404 name: "SETNEF",
12405 argLen: 1,
12406 clobberFlags: true,
12407 needIntTemp: true,
12408 asm: x86.ASETNE,
12409 reg: regInfo{
12410 outputs: []outputInfo{
12411 {0, 49135},
12412 },
12413 },
12414 },
12415 {
12416 name: "SETORD",
12417 argLen: 1,
12418 asm: x86.ASETPC,
12419 reg: regInfo{
12420 outputs: []outputInfo{
12421 {0, 49135},
12422 },
12423 },
12424 },
12425 {
12426 name: "SETNAN",
12427 argLen: 1,
12428 asm: x86.ASETPS,
12429 reg: regInfo{
12430 outputs: []outputInfo{
12431 {0, 49135},
12432 },
12433 },
12434 },
12435 {
12436 name: "SETGF",
12437 argLen: 1,
12438 asm: x86.ASETHI,
12439 reg: regInfo{
12440 outputs: []outputInfo{
12441 {0, 49135},
12442 },
12443 },
12444 },
12445 {
12446 name: "SETGEF",
12447 argLen: 1,
12448 asm: x86.ASETCC,
12449 reg: regInfo{
12450 outputs: []outputInfo{
12451 {0, 49135},
12452 },
12453 },
12454 },
12455 {
12456 name: "MOVBQSX",
12457 argLen: 1,
12458 asm: x86.AMOVBQSX,
12459 reg: regInfo{
12460 inputs: []inputInfo{
12461 {0, 49135},
12462 },
12463 outputs: []outputInfo{
12464 {0, 49135},
12465 },
12466 },
12467 },
12468 {
12469 name: "MOVBQZX",
12470 argLen: 1,
12471 asm: x86.AMOVBLZX,
12472 reg: regInfo{
12473 inputs: []inputInfo{
12474 {0, 49135},
12475 },
12476 outputs: []outputInfo{
12477 {0, 49135},
12478 },
12479 },
12480 },
12481 {
12482 name: "MOVWQSX",
12483 argLen: 1,
12484 asm: x86.AMOVWQSX,
12485 reg: regInfo{
12486 inputs: []inputInfo{
12487 {0, 49135},
12488 },
12489 outputs: []outputInfo{
12490 {0, 49135},
12491 },
12492 },
12493 },
12494 {
12495 name: "MOVWQZX",
12496 argLen: 1,
12497 asm: x86.AMOVWLZX,
12498 reg: regInfo{
12499 inputs: []inputInfo{
12500 {0, 49135},
12501 },
12502 outputs: []outputInfo{
12503 {0, 49135},
12504 },
12505 },
12506 },
12507 {
12508 name: "MOVLQSX",
12509 argLen: 1,
12510 asm: x86.AMOVLQSX,
12511 reg: regInfo{
12512 inputs: []inputInfo{
12513 {0, 49135},
12514 },
12515 outputs: []outputInfo{
12516 {0, 49135},
12517 },
12518 },
12519 },
12520 {
12521 name: "MOVLQZX",
12522 argLen: 1,
12523 asm: x86.AMOVL,
12524 reg: regInfo{
12525 inputs: []inputInfo{
12526 {0, 49135},
12527 },
12528 outputs: []outputInfo{
12529 {0, 49135},
12530 },
12531 },
12532 },
12533 {
12534 name: "MOVLconst",
12535 auxType: auxInt32,
12536 argLen: 0,
12537 rematerializeable: true,
12538 asm: x86.AMOVL,
12539 reg: regInfo{
12540 outputs: []outputInfo{
12541 {0, 49135},
12542 },
12543 },
12544 },
12545 {
12546 name: "MOVQconst",
12547 auxType: auxInt64,
12548 argLen: 0,
12549 rematerializeable: true,
12550 asm: x86.AMOVQ,
12551 reg: regInfo{
12552 outputs: []outputInfo{
12553 {0, 49135},
12554 },
12555 },
12556 },
12557 {
12558 name: "CVTTSD2SL",
12559 argLen: 1,
12560 asm: x86.ACVTTSD2SL,
12561 reg: regInfo{
12562 inputs: []inputInfo{
12563 {0, 2147418112},
12564 },
12565 outputs: []outputInfo{
12566 {0, 49135},
12567 },
12568 },
12569 },
12570 {
12571 name: "CVTTSD2SQ",
12572 argLen: 1,
12573 asm: x86.ACVTTSD2SQ,
12574 reg: regInfo{
12575 inputs: []inputInfo{
12576 {0, 2147418112},
12577 },
12578 outputs: []outputInfo{
12579 {0, 49135},
12580 },
12581 },
12582 },
12583 {
12584 name: "CVTTSS2SL",
12585 argLen: 1,
12586 asm: x86.ACVTTSS2SL,
12587 reg: regInfo{
12588 inputs: []inputInfo{
12589 {0, 2147418112},
12590 },
12591 outputs: []outputInfo{
12592 {0, 49135},
12593 },
12594 },
12595 },
12596 {
12597 name: "CVTTSS2SQ",
12598 argLen: 1,
12599 asm: x86.ACVTTSS2SQ,
12600 reg: regInfo{
12601 inputs: []inputInfo{
12602 {0, 2147418112},
12603 },
12604 outputs: []outputInfo{
12605 {0, 49135},
12606 },
12607 },
12608 },
12609 {
12610 name: "CVTSL2SS",
12611 argLen: 1,
12612 asm: x86.ACVTSL2SS,
12613 reg: regInfo{
12614 inputs: []inputInfo{
12615 {0, 49135},
12616 },
12617 outputs: []outputInfo{
12618 {0, 2147418112},
12619 },
12620 },
12621 },
12622 {
12623 name: "CVTSL2SD",
12624 argLen: 1,
12625 asm: x86.ACVTSL2SD,
12626 reg: regInfo{
12627 inputs: []inputInfo{
12628 {0, 49135},
12629 },
12630 outputs: []outputInfo{
12631 {0, 2147418112},
12632 },
12633 },
12634 },
12635 {
12636 name: "CVTSQ2SS",
12637 argLen: 1,
12638 asm: x86.ACVTSQ2SS,
12639 reg: regInfo{
12640 inputs: []inputInfo{
12641 {0, 49135},
12642 },
12643 outputs: []outputInfo{
12644 {0, 2147418112},
12645 },
12646 },
12647 },
12648 {
12649 name: "CVTSQ2SD",
12650 argLen: 1,
12651 asm: x86.ACVTSQ2SD,
12652 reg: regInfo{
12653 inputs: []inputInfo{
12654 {0, 49135},
12655 },
12656 outputs: []outputInfo{
12657 {0, 2147418112},
12658 },
12659 },
12660 },
12661 {
12662 name: "CVTSD2SS",
12663 argLen: 1,
12664 asm: x86.ACVTSD2SS,
12665 reg: regInfo{
12666 inputs: []inputInfo{
12667 {0, 2147418112},
12668 },
12669 outputs: []outputInfo{
12670 {0, 2147418112},
12671 },
12672 },
12673 },
12674 {
12675 name: "CVTSS2SD",
12676 argLen: 1,
12677 asm: x86.ACVTSS2SD,
12678 reg: regInfo{
12679 inputs: []inputInfo{
12680 {0, 2147418112},
12681 },
12682 outputs: []outputInfo{
12683 {0, 2147418112},
12684 },
12685 },
12686 },
12687 {
12688 name: "MOVQi2f",
12689 argLen: 1,
12690 reg: regInfo{
12691 inputs: []inputInfo{
12692 {0, 49135},
12693 },
12694 outputs: []outputInfo{
12695 {0, 2147418112},
12696 },
12697 },
12698 },
12699 {
12700 name: "MOVQf2i",
12701 argLen: 1,
12702 reg: regInfo{
12703 inputs: []inputInfo{
12704 {0, 2147418112},
12705 },
12706 outputs: []outputInfo{
12707 {0, 49135},
12708 },
12709 },
12710 },
12711 {
12712 name: "MOVLi2f",
12713 argLen: 1,
12714 reg: regInfo{
12715 inputs: []inputInfo{
12716 {0, 49135},
12717 },
12718 outputs: []outputInfo{
12719 {0, 2147418112},
12720 },
12721 },
12722 },
12723 {
12724 name: "MOVLf2i",
12725 argLen: 1,
12726 reg: regInfo{
12727 inputs: []inputInfo{
12728 {0, 2147418112},
12729 },
12730 outputs: []outputInfo{
12731 {0, 49135},
12732 },
12733 },
12734 },
12735 {
12736 name: "PXOR",
12737 argLen: 2,
12738 commutative: true,
12739 resultInArg0: true,
12740 asm: x86.APXOR,
12741 reg: regInfo{
12742 inputs: []inputInfo{
12743 {0, 2147418112},
12744 {1, 2147418112},
12745 },
12746 outputs: []outputInfo{
12747 {0, 2147418112},
12748 },
12749 },
12750 },
12751 {
12752 name: "POR",
12753 argLen: 2,
12754 commutative: true,
12755 resultInArg0: true,
12756 asm: x86.APOR,
12757 reg: regInfo{
12758 inputs: []inputInfo{
12759 {0, 2147418112},
12760 {1, 2147418112},
12761 },
12762 outputs: []outputInfo{
12763 {0, 2147418112},
12764 },
12765 },
12766 },
12767 {
12768 name: "LEAQ",
12769 auxType: auxSymOff,
12770 argLen: 1,
12771 rematerializeable: true,
12772 symEffect: SymAddr,
12773 asm: x86.ALEAQ,
12774 reg: regInfo{
12775 inputs: []inputInfo{
12776 {0, 4295032831},
12777 },
12778 outputs: []outputInfo{
12779 {0, 49135},
12780 },
12781 },
12782 },
12783 {
12784 name: "LEAL",
12785 auxType: auxSymOff,
12786 argLen: 1,
12787 rematerializeable: true,
12788 symEffect: SymAddr,
12789 asm: x86.ALEAL,
12790 reg: regInfo{
12791 inputs: []inputInfo{
12792 {0, 4295032831},
12793 },
12794 outputs: []outputInfo{
12795 {0, 49135},
12796 },
12797 },
12798 },
12799 {
12800 name: "LEAW",
12801 auxType: auxSymOff,
12802 argLen: 1,
12803 rematerializeable: true,
12804 symEffect: SymAddr,
12805 asm: x86.ALEAW,
12806 reg: regInfo{
12807 inputs: []inputInfo{
12808 {0, 4295032831},
12809 },
12810 outputs: []outputInfo{
12811 {0, 49135},
12812 },
12813 },
12814 },
12815 {
12816 name: "LEAQ1",
12817 auxType: auxSymOff,
12818 argLen: 2,
12819 commutative: true,
12820 symEffect: SymAddr,
12821 asm: x86.ALEAQ,
12822 scale: 1,
12823 reg: regInfo{
12824 inputs: []inputInfo{
12825 {1, 49151},
12826 {0, 4295032831},
12827 },
12828 outputs: []outputInfo{
12829 {0, 49135},
12830 },
12831 },
12832 },
12833 {
12834 name: "LEAL1",
12835 auxType: auxSymOff,
12836 argLen: 2,
12837 commutative: true,
12838 symEffect: SymAddr,
12839 asm: x86.ALEAL,
12840 scale: 1,
12841 reg: regInfo{
12842 inputs: []inputInfo{
12843 {1, 49151},
12844 {0, 4295032831},
12845 },
12846 outputs: []outputInfo{
12847 {0, 49135},
12848 },
12849 },
12850 },
12851 {
12852 name: "LEAW1",
12853 auxType: auxSymOff,
12854 argLen: 2,
12855 commutative: true,
12856 symEffect: SymAddr,
12857 asm: x86.ALEAW,
12858 scale: 1,
12859 reg: regInfo{
12860 inputs: []inputInfo{
12861 {1, 49151},
12862 {0, 4295032831},
12863 },
12864 outputs: []outputInfo{
12865 {0, 49135},
12866 },
12867 },
12868 },
12869 {
12870 name: "LEAQ2",
12871 auxType: auxSymOff,
12872 argLen: 2,
12873 symEffect: SymAddr,
12874 asm: x86.ALEAQ,
12875 scale: 2,
12876 reg: regInfo{
12877 inputs: []inputInfo{
12878 {1, 49151},
12879 {0, 4295032831},
12880 },
12881 outputs: []outputInfo{
12882 {0, 49135},
12883 },
12884 },
12885 },
12886 {
12887 name: "LEAL2",
12888 auxType: auxSymOff,
12889 argLen: 2,
12890 symEffect: SymAddr,
12891 asm: x86.ALEAL,
12892 scale: 2,
12893 reg: regInfo{
12894 inputs: []inputInfo{
12895 {1, 49151},
12896 {0, 4295032831},
12897 },
12898 outputs: []outputInfo{
12899 {0, 49135},
12900 },
12901 },
12902 },
12903 {
12904 name: "LEAW2",
12905 auxType: auxSymOff,
12906 argLen: 2,
12907 symEffect: SymAddr,
12908 asm: x86.ALEAW,
12909 scale: 2,
12910 reg: regInfo{
12911 inputs: []inputInfo{
12912 {1, 49151},
12913 {0, 4295032831},
12914 },
12915 outputs: []outputInfo{
12916 {0, 49135},
12917 },
12918 },
12919 },
12920 {
12921 name: "LEAQ4",
12922 auxType: auxSymOff,
12923 argLen: 2,
12924 symEffect: SymAddr,
12925 asm: x86.ALEAQ,
12926 scale: 4,
12927 reg: regInfo{
12928 inputs: []inputInfo{
12929 {1, 49151},
12930 {0, 4295032831},
12931 },
12932 outputs: []outputInfo{
12933 {0, 49135},
12934 },
12935 },
12936 },
12937 {
12938 name: "LEAL4",
12939 auxType: auxSymOff,
12940 argLen: 2,
12941 symEffect: SymAddr,
12942 asm: x86.ALEAL,
12943 scale: 4,
12944 reg: regInfo{
12945 inputs: []inputInfo{
12946 {1, 49151},
12947 {0, 4295032831},
12948 },
12949 outputs: []outputInfo{
12950 {0, 49135},
12951 },
12952 },
12953 },
12954 {
12955 name: "LEAW4",
12956 auxType: auxSymOff,
12957 argLen: 2,
12958 symEffect: SymAddr,
12959 asm: x86.ALEAW,
12960 scale: 4,
12961 reg: regInfo{
12962 inputs: []inputInfo{
12963 {1, 49151},
12964 {0, 4295032831},
12965 },
12966 outputs: []outputInfo{
12967 {0, 49135},
12968 },
12969 },
12970 },
12971 {
12972 name: "LEAQ8",
12973 auxType: auxSymOff,
12974 argLen: 2,
12975 symEffect: SymAddr,
12976 asm: x86.ALEAQ,
12977 scale: 8,
12978 reg: regInfo{
12979 inputs: []inputInfo{
12980 {1, 49151},
12981 {0, 4295032831},
12982 },
12983 outputs: []outputInfo{
12984 {0, 49135},
12985 },
12986 },
12987 },
12988 {
12989 name: "LEAL8",
12990 auxType: auxSymOff,
12991 argLen: 2,
12992 symEffect: SymAddr,
12993 asm: x86.ALEAL,
12994 scale: 8,
12995 reg: regInfo{
12996 inputs: []inputInfo{
12997 {1, 49151},
12998 {0, 4295032831},
12999 },
13000 outputs: []outputInfo{
13001 {0, 49135},
13002 },
13003 },
13004 },
13005 {
13006 name: "LEAW8",
13007 auxType: auxSymOff,
13008 argLen: 2,
13009 symEffect: SymAddr,
13010 asm: x86.ALEAW,
13011 scale: 8,
13012 reg: regInfo{
13013 inputs: []inputInfo{
13014 {1, 49151},
13015 {0, 4295032831},
13016 },
13017 outputs: []outputInfo{
13018 {0, 49135},
13019 },
13020 },
13021 },
13022 {
13023 name: "MOVBload",
13024 auxType: auxSymOff,
13025 argLen: 2,
13026 faultOnNilArg0: true,
13027 symEffect: SymRead,
13028 asm: x86.AMOVBLZX,
13029 reg: regInfo{
13030 inputs: []inputInfo{
13031 {0, 4295032831},
13032 },
13033 outputs: []outputInfo{
13034 {0, 49135},
13035 },
13036 },
13037 },
13038 {
13039 name: "MOVBQSXload",
13040 auxType: auxSymOff,
13041 argLen: 2,
13042 faultOnNilArg0: true,
13043 symEffect: SymRead,
13044 asm: x86.AMOVBQSX,
13045 reg: regInfo{
13046 inputs: []inputInfo{
13047 {0, 4295032831},
13048 },
13049 outputs: []outputInfo{
13050 {0, 49135},
13051 },
13052 },
13053 },
13054 {
13055 name: "MOVWload",
13056 auxType: auxSymOff,
13057 argLen: 2,
13058 faultOnNilArg0: true,
13059 symEffect: SymRead,
13060 asm: x86.AMOVWLZX,
13061 reg: regInfo{
13062 inputs: []inputInfo{
13063 {0, 4295032831},
13064 },
13065 outputs: []outputInfo{
13066 {0, 49135},
13067 },
13068 },
13069 },
13070 {
13071 name: "MOVWQSXload",
13072 auxType: auxSymOff,
13073 argLen: 2,
13074 faultOnNilArg0: true,
13075 symEffect: SymRead,
13076 asm: x86.AMOVWQSX,
13077 reg: regInfo{
13078 inputs: []inputInfo{
13079 {0, 4295032831},
13080 },
13081 outputs: []outputInfo{
13082 {0, 49135},
13083 },
13084 },
13085 },
13086 {
13087 name: "MOVLload",
13088 auxType: auxSymOff,
13089 argLen: 2,
13090 faultOnNilArg0: true,
13091 symEffect: SymRead,
13092 asm: x86.AMOVL,
13093 reg: regInfo{
13094 inputs: []inputInfo{
13095 {0, 4295032831},
13096 },
13097 outputs: []outputInfo{
13098 {0, 49135},
13099 },
13100 },
13101 },
13102 {
13103 name: "MOVLQSXload",
13104 auxType: auxSymOff,
13105 argLen: 2,
13106 faultOnNilArg0: true,
13107 symEffect: SymRead,
13108 asm: x86.AMOVLQSX,
13109 reg: regInfo{
13110 inputs: []inputInfo{
13111 {0, 4295032831},
13112 },
13113 outputs: []outputInfo{
13114 {0, 49135},
13115 },
13116 },
13117 },
13118 {
13119 name: "MOVQload",
13120 auxType: auxSymOff,
13121 argLen: 2,
13122 faultOnNilArg0: true,
13123 symEffect: SymRead,
13124 asm: x86.AMOVQ,
13125 reg: regInfo{
13126 inputs: []inputInfo{
13127 {0, 4295032831},
13128 },
13129 outputs: []outputInfo{
13130 {0, 49135},
13131 },
13132 },
13133 },
13134 {
13135 name: "MOVBstore",
13136 auxType: auxSymOff,
13137 argLen: 3,
13138 faultOnNilArg0: true,
13139 symEffect: SymWrite,
13140 asm: x86.AMOVB,
13141 reg: regInfo{
13142 inputs: []inputInfo{
13143 {1, 49151},
13144 {0, 4295032831},
13145 },
13146 },
13147 },
13148 {
13149 name: "MOVWstore",
13150 auxType: auxSymOff,
13151 argLen: 3,
13152 faultOnNilArg0: true,
13153 symEffect: SymWrite,
13154 asm: x86.AMOVW,
13155 reg: regInfo{
13156 inputs: []inputInfo{
13157 {1, 49151},
13158 {0, 4295032831},
13159 },
13160 },
13161 },
13162 {
13163 name: "MOVLstore",
13164 auxType: auxSymOff,
13165 argLen: 3,
13166 faultOnNilArg0: true,
13167 symEffect: SymWrite,
13168 asm: x86.AMOVL,
13169 reg: regInfo{
13170 inputs: []inputInfo{
13171 {1, 49151},
13172 {0, 4295032831},
13173 },
13174 },
13175 },
13176 {
13177 name: "MOVQstore",
13178 auxType: auxSymOff,
13179 argLen: 3,
13180 faultOnNilArg0: true,
13181 symEffect: SymWrite,
13182 asm: x86.AMOVQ,
13183 reg: regInfo{
13184 inputs: []inputInfo{
13185 {1, 49151},
13186 {0, 4295032831},
13187 },
13188 },
13189 },
13190 {
13191 name: "MOVOload",
13192 auxType: auxSymOff,
13193 argLen: 2,
13194 faultOnNilArg0: true,
13195 symEffect: SymRead,
13196 asm: x86.AMOVUPS,
13197 reg: regInfo{
13198 inputs: []inputInfo{
13199 {0, 4295016447},
13200 },
13201 outputs: []outputInfo{
13202 {0, 2147418112},
13203 },
13204 },
13205 },
13206 {
13207 name: "MOVOstore",
13208 auxType: auxSymOff,
13209 argLen: 3,
13210 faultOnNilArg0: true,
13211 symEffect: SymWrite,
13212 asm: x86.AMOVUPS,
13213 reg: regInfo{
13214 inputs: []inputInfo{
13215 {1, 2147418112},
13216 {0, 4295016447},
13217 },
13218 },
13219 },
13220 {
13221 name: "MOVBloadidx1",
13222 auxType: auxSymOff,
13223 argLen: 3,
13224 commutative: true,
13225 symEffect: SymRead,
13226 asm: x86.AMOVBLZX,
13227 scale: 1,
13228 reg: regInfo{
13229 inputs: []inputInfo{
13230 {1, 49151},
13231 {0, 4295032831},
13232 },
13233 outputs: []outputInfo{
13234 {0, 49135},
13235 },
13236 },
13237 },
13238 {
13239 name: "MOVWloadidx1",
13240 auxType: auxSymOff,
13241 argLen: 3,
13242 commutative: true,
13243 symEffect: SymRead,
13244 asm: x86.AMOVWLZX,
13245 scale: 1,
13246 reg: regInfo{
13247 inputs: []inputInfo{
13248 {1, 49151},
13249 {0, 4295032831},
13250 },
13251 outputs: []outputInfo{
13252 {0, 49135},
13253 },
13254 },
13255 },
13256 {
13257 name: "MOVWloadidx2",
13258 auxType: auxSymOff,
13259 argLen: 3,
13260 symEffect: SymRead,
13261 asm: x86.AMOVWLZX,
13262 scale: 2,
13263 reg: regInfo{
13264 inputs: []inputInfo{
13265 {1, 49151},
13266 {0, 4295032831},
13267 },
13268 outputs: []outputInfo{
13269 {0, 49135},
13270 },
13271 },
13272 },
13273 {
13274 name: "MOVLloadidx1",
13275 auxType: auxSymOff,
13276 argLen: 3,
13277 commutative: true,
13278 symEffect: SymRead,
13279 asm: x86.AMOVL,
13280 scale: 1,
13281 reg: regInfo{
13282 inputs: []inputInfo{
13283 {1, 49151},
13284 {0, 4295032831},
13285 },
13286 outputs: []outputInfo{
13287 {0, 49135},
13288 },
13289 },
13290 },
13291 {
13292 name: "MOVLloadidx4",
13293 auxType: auxSymOff,
13294 argLen: 3,
13295 symEffect: SymRead,
13296 asm: x86.AMOVL,
13297 scale: 4,
13298 reg: regInfo{
13299 inputs: []inputInfo{
13300 {1, 49151},
13301 {0, 4295032831},
13302 },
13303 outputs: []outputInfo{
13304 {0, 49135},
13305 },
13306 },
13307 },
13308 {
13309 name: "MOVLloadidx8",
13310 auxType: auxSymOff,
13311 argLen: 3,
13312 symEffect: SymRead,
13313 asm: x86.AMOVL,
13314 scale: 8,
13315 reg: regInfo{
13316 inputs: []inputInfo{
13317 {1, 49151},
13318 {0, 4295032831},
13319 },
13320 outputs: []outputInfo{
13321 {0, 49135},
13322 },
13323 },
13324 },
13325 {
13326 name: "MOVQloadidx1",
13327 auxType: auxSymOff,
13328 argLen: 3,
13329 commutative: true,
13330 symEffect: SymRead,
13331 asm: x86.AMOVQ,
13332 scale: 1,
13333 reg: regInfo{
13334 inputs: []inputInfo{
13335 {1, 49151},
13336 {0, 4295032831},
13337 },
13338 outputs: []outputInfo{
13339 {0, 49135},
13340 },
13341 },
13342 },
13343 {
13344 name: "MOVQloadidx8",
13345 auxType: auxSymOff,
13346 argLen: 3,
13347 symEffect: SymRead,
13348 asm: x86.AMOVQ,
13349 scale: 8,
13350 reg: regInfo{
13351 inputs: []inputInfo{
13352 {1, 49151},
13353 {0, 4295032831},
13354 },
13355 outputs: []outputInfo{
13356 {0, 49135},
13357 },
13358 },
13359 },
13360 {
13361 name: "MOVBstoreidx1",
13362 auxType: auxSymOff,
13363 argLen: 4,
13364 commutative: true,
13365 symEffect: SymWrite,
13366 asm: x86.AMOVB,
13367 scale: 1,
13368 reg: regInfo{
13369 inputs: []inputInfo{
13370 {1, 49151},
13371 {2, 49151},
13372 {0, 4295032831},
13373 },
13374 },
13375 },
13376 {
13377 name: "MOVWstoreidx1",
13378 auxType: auxSymOff,
13379 argLen: 4,
13380 commutative: true,
13381 symEffect: SymWrite,
13382 asm: x86.AMOVW,
13383 scale: 1,
13384 reg: regInfo{
13385 inputs: []inputInfo{
13386 {1, 49151},
13387 {2, 49151},
13388 {0, 4295032831},
13389 },
13390 },
13391 },
13392 {
13393 name: "MOVWstoreidx2",
13394 auxType: auxSymOff,
13395 argLen: 4,
13396 symEffect: SymWrite,
13397 asm: x86.AMOVW,
13398 scale: 2,
13399 reg: regInfo{
13400 inputs: []inputInfo{
13401 {1, 49151},
13402 {2, 49151},
13403 {0, 4295032831},
13404 },
13405 },
13406 },
13407 {
13408 name: "MOVLstoreidx1",
13409 auxType: auxSymOff,
13410 argLen: 4,
13411 commutative: true,
13412 symEffect: SymWrite,
13413 asm: x86.AMOVL,
13414 scale: 1,
13415 reg: regInfo{
13416 inputs: []inputInfo{
13417 {1, 49151},
13418 {2, 49151},
13419 {0, 4295032831},
13420 },
13421 },
13422 },
13423 {
13424 name: "MOVLstoreidx4",
13425 auxType: auxSymOff,
13426 argLen: 4,
13427 symEffect: SymWrite,
13428 asm: x86.AMOVL,
13429 scale: 4,
13430 reg: regInfo{
13431 inputs: []inputInfo{
13432 {1, 49151},
13433 {2, 49151},
13434 {0, 4295032831},
13435 },
13436 },
13437 },
13438 {
13439 name: "MOVLstoreidx8",
13440 auxType: auxSymOff,
13441 argLen: 4,
13442 symEffect: SymWrite,
13443 asm: x86.AMOVL,
13444 scale: 8,
13445 reg: regInfo{
13446 inputs: []inputInfo{
13447 {1, 49151},
13448 {2, 49151},
13449 {0, 4295032831},
13450 },
13451 },
13452 },
13453 {
13454 name: "MOVQstoreidx1",
13455 auxType: auxSymOff,
13456 argLen: 4,
13457 commutative: true,
13458 symEffect: SymWrite,
13459 asm: x86.AMOVQ,
13460 scale: 1,
13461 reg: regInfo{
13462 inputs: []inputInfo{
13463 {1, 49151},
13464 {2, 49151},
13465 {0, 4295032831},
13466 },
13467 },
13468 },
13469 {
13470 name: "MOVQstoreidx8",
13471 auxType: auxSymOff,
13472 argLen: 4,
13473 symEffect: SymWrite,
13474 asm: x86.AMOVQ,
13475 scale: 8,
13476 reg: regInfo{
13477 inputs: []inputInfo{
13478 {1, 49151},
13479 {2, 49151},
13480 {0, 4295032831},
13481 },
13482 },
13483 },
13484 {
13485 name: "MOVBstoreconst",
13486 auxType: auxSymValAndOff,
13487 argLen: 2,
13488 faultOnNilArg0: true,
13489 symEffect: SymWrite,
13490 asm: x86.AMOVB,
13491 reg: regInfo{
13492 inputs: []inputInfo{
13493 {0, 4295032831},
13494 },
13495 },
13496 },
13497 {
13498 name: "MOVWstoreconst",
13499 auxType: auxSymValAndOff,
13500 argLen: 2,
13501 faultOnNilArg0: true,
13502 symEffect: SymWrite,
13503 asm: x86.AMOVW,
13504 reg: regInfo{
13505 inputs: []inputInfo{
13506 {0, 4295032831},
13507 },
13508 },
13509 },
13510 {
13511 name: "MOVLstoreconst",
13512 auxType: auxSymValAndOff,
13513 argLen: 2,
13514 faultOnNilArg0: true,
13515 symEffect: SymWrite,
13516 asm: x86.AMOVL,
13517 reg: regInfo{
13518 inputs: []inputInfo{
13519 {0, 4295032831},
13520 },
13521 },
13522 },
13523 {
13524 name: "MOVQstoreconst",
13525 auxType: auxSymValAndOff,
13526 argLen: 2,
13527 faultOnNilArg0: true,
13528 symEffect: SymWrite,
13529 asm: x86.AMOVQ,
13530 reg: regInfo{
13531 inputs: []inputInfo{
13532 {0, 4295032831},
13533 },
13534 },
13535 },
13536 {
13537 name: "MOVOstoreconst",
13538 auxType: auxSymValAndOff,
13539 argLen: 2,
13540 faultOnNilArg0: true,
13541 symEffect: SymWrite,
13542 asm: x86.AMOVUPS,
13543 reg: regInfo{
13544 inputs: []inputInfo{
13545 {0, 4295032831},
13546 },
13547 },
13548 },
13549 {
13550 name: "MOVBstoreconstidx1",
13551 auxType: auxSymValAndOff,
13552 argLen: 3,
13553 commutative: true,
13554 symEffect: SymWrite,
13555 asm: x86.AMOVB,
13556 scale: 1,
13557 reg: regInfo{
13558 inputs: []inputInfo{
13559 {1, 49151},
13560 {0, 4295032831},
13561 },
13562 },
13563 },
13564 {
13565 name: "MOVWstoreconstidx1",
13566 auxType: auxSymValAndOff,
13567 argLen: 3,
13568 commutative: true,
13569 symEffect: SymWrite,
13570 asm: x86.AMOVW,
13571 scale: 1,
13572 reg: regInfo{
13573 inputs: []inputInfo{
13574 {1, 49151},
13575 {0, 4295032831},
13576 },
13577 },
13578 },
13579 {
13580 name: "MOVWstoreconstidx2",
13581 auxType: auxSymValAndOff,
13582 argLen: 3,
13583 symEffect: SymWrite,
13584 asm: x86.AMOVW,
13585 scale: 2,
13586 reg: regInfo{
13587 inputs: []inputInfo{
13588 {1, 49151},
13589 {0, 4295032831},
13590 },
13591 },
13592 },
13593 {
13594 name: "MOVLstoreconstidx1",
13595 auxType: auxSymValAndOff,
13596 argLen: 3,
13597 commutative: true,
13598 symEffect: SymWrite,
13599 asm: x86.AMOVL,
13600 scale: 1,
13601 reg: regInfo{
13602 inputs: []inputInfo{
13603 {1, 49151},
13604 {0, 4295032831},
13605 },
13606 },
13607 },
13608 {
13609 name: "MOVLstoreconstidx4",
13610 auxType: auxSymValAndOff,
13611 argLen: 3,
13612 symEffect: SymWrite,
13613 asm: x86.AMOVL,
13614 scale: 4,
13615 reg: regInfo{
13616 inputs: []inputInfo{
13617 {1, 49151},
13618 {0, 4295032831},
13619 },
13620 },
13621 },
13622 {
13623 name: "MOVQstoreconstidx1",
13624 auxType: auxSymValAndOff,
13625 argLen: 3,
13626 commutative: true,
13627 symEffect: SymWrite,
13628 asm: x86.AMOVQ,
13629 scale: 1,
13630 reg: regInfo{
13631 inputs: []inputInfo{
13632 {1, 49151},
13633 {0, 4295032831},
13634 },
13635 },
13636 },
13637 {
13638 name: "MOVQstoreconstidx8",
13639 auxType: auxSymValAndOff,
13640 argLen: 3,
13641 symEffect: SymWrite,
13642 asm: x86.AMOVQ,
13643 scale: 8,
13644 reg: regInfo{
13645 inputs: []inputInfo{
13646 {1, 49151},
13647 {0, 4295032831},
13648 },
13649 },
13650 },
13651 {
13652 name: "DUFFZERO",
13653 auxType: auxInt64,
13654 argLen: 2,
13655 faultOnNilArg0: true,
13656 unsafePoint: true,
13657 reg: regInfo{
13658 inputs: []inputInfo{
13659 {0, 128},
13660 },
13661 clobbers: 128,
13662 },
13663 },
13664 {
13665 name: "REPSTOSQ",
13666 argLen: 4,
13667 faultOnNilArg0: true,
13668 reg: regInfo{
13669 inputs: []inputInfo{
13670 {0, 128},
13671 {1, 2},
13672 {2, 1},
13673 },
13674 clobbers: 130,
13675 },
13676 },
13677 {
13678 name: "CALLstatic",
13679 auxType: auxCallOff,
13680 argLen: -1,
13681 clobberFlags: true,
13682 call: true,
13683 reg: regInfo{
13684 clobbers: 2147483631,
13685 },
13686 },
13687 {
13688 name: "CALLtail",
13689 auxType: auxCallOff,
13690 argLen: -1,
13691 clobberFlags: true,
13692 call: true,
13693 tailCall: true,
13694 reg: regInfo{
13695 clobbers: 2147483631,
13696 },
13697 },
13698 {
13699 name: "CALLclosure",
13700 auxType: auxCallOff,
13701 argLen: -1,
13702 clobberFlags: true,
13703 call: true,
13704 reg: regInfo{
13705 inputs: []inputInfo{
13706 {1, 4},
13707 {0, 49151},
13708 },
13709 clobbers: 2147483631,
13710 },
13711 },
13712 {
13713 name: "CALLinter",
13714 auxType: auxCallOff,
13715 argLen: -1,
13716 clobberFlags: true,
13717 call: true,
13718 reg: regInfo{
13719 inputs: []inputInfo{
13720 {0, 49135},
13721 },
13722 clobbers: 2147483631,
13723 },
13724 },
13725 {
13726 name: "DUFFCOPY",
13727 auxType: auxInt64,
13728 argLen: 3,
13729 clobberFlags: true,
13730 faultOnNilArg0: true,
13731 faultOnNilArg1: true,
13732 unsafePoint: true,
13733 reg: regInfo{
13734 inputs: []inputInfo{
13735 {0, 128},
13736 {1, 64},
13737 },
13738 clobbers: 65728,
13739 },
13740 },
13741 {
13742 name: "REPMOVSQ",
13743 argLen: 4,
13744 faultOnNilArg0: true,
13745 faultOnNilArg1: true,
13746 reg: regInfo{
13747 inputs: []inputInfo{
13748 {0, 128},
13749 {1, 64},
13750 {2, 2},
13751 },
13752 clobbers: 194,
13753 },
13754 },
13755 {
13756 name: "InvertFlags",
13757 argLen: 1,
13758 reg: regInfo{},
13759 },
13760 {
13761 name: "LoweredGetG",
13762 argLen: 1,
13763 reg: regInfo{
13764 outputs: []outputInfo{
13765 {0, 49135},
13766 },
13767 },
13768 },
13769 {
13770 name: "LoweredGetClosurePtr",
13771 argLen: 0,
13772 zeroWidth: true,
13773 reg: regInfo{
13774 outputs: []outputInfo{
13775 {0, 4},
13776 },
13777 },
13778 },
13779 {
13780 name: "LoweredGetCallerPC",
13781 argLen: 0,
13782 rematerializeable: true,
13783 reg: regInfo{
13784 outputs: []outputInfo{
13785 {0, 49135},
13786 },
13787 },
13788 },
13789 {
13790 name: "LoweredGetCallerSP",
13791 argLen: 1,
13792 rematerializeable: true,
13793 reg: regInfo{
13794 outputs: []outputInfo{
13795 {0, 49135},
13796 },
13797 },
13798 },
13799 {
13800 name: "LoweredNilCheck",
13801 argLen: 2,
13802 clobberFlags: true,
13803 nilCheck: true,
13804 faultOnNilArg0: true,
13805 reg: regInfo{
13806 inputs: []inputInfo{
13807 {0, 49151},
13808 },
13809 },
13810 },
13811 {
13812 name: "LoweredWB",
13813 auxType: auxInt64,
13814 argLen: 1,
13815 clobberFlags: true,
13816 reg: regInfo{
13817 clobbers: 2147418112,
13818 outputs: []outputInfo{
13819 {0, 2048},
13820 },
13821 },
13822 },
13823 {
13824 name: "LoweredHasCPUFeature",
13825 auxType: auxSym,
13826 argLen: 0,
13827 rematerializeable: true,
13828 symEffect: SymNone,
13829 reg: regInfo{
13830 outputs: []outputInfo{
13831 {0, 49135},
13832 },
13833 },
13834 },
13835 {
13836 name: "LoweredPanicBoundsA",
13837 auxType: auxInt64,
13838 argLen: 3,
13839 call: true,
13840 reg: regInfo{
13841 inputs: []inputInfo{
13842 {0, 4},
13843 {1, 8},
13844 },
13845 },
13846 },
13847 {
13848 name: "LoweredPanicBoundsB",
13849 auxType: auxInt64,
13850 argLen: 3,
13851 call: true,
13852 reg: regInfo{
13853 inputs: []inputInfo{
13854 {0, 2},
13855 {1, 4},
13856 },
13857 },
13858 },
13859 {
13860 name: "LoweredPanicBoundsC",
13861 auxType: auxInt64,
13862 argLen: 3,
13863 call: true,
13864 reg: regInfo{
13865 inputs: []inputInfo{
13866 {0, 1},
13867 {1, 2},
13868 },
13869 },
13870 },
13871 {
13872 name: "FlagEQ",
13873 argLen: 0,
13874 reg: regInfo{},
13875 },
13876 {
13877 name: "FlagLT_ULT",
13878 argLen: 0,
13879 reg: regInfo{},
13880 },
13881 {
13882 name: "FlagLT_UGT",
13883 argLen: 0,
13884 reg: regInfo{},
13885 },
13886 {
13887 name: "FlagGT_UGT",
13888 argLen: 0,
13889 reg: regInfo{},
13890 },
13891 {
13892 name: "FlagGT_ULT",
13893 argLen: 0,
13894 reg: regInfo{},
13895 },
13896 {
13897 name: "MOVBatomicload",
13898 auxType: auxSymOff,
13899 argLen: 2,
13900 faultOnNilArg0: true,
13901 symEffect: SymRead,
13902 asm: x86.AMOVB,
13903 reg: regInfo{
13904 inputs: []inputInfo{
13905 {0, 4295032831},
13906 },
13907 outputs: []outputInfo{
13908 {0, 49135},
13909 },
13910 },
13911 },
13912 {
13913 name: "MOVLatomicload",
13914 auxType: auxSymOff,
13915 argLen: 2,
13916 faultOnNilArg0: true,
13917 symEffect: SymRead,
13918 asm: x86.AMOVL,
13919 reg: regInfo{
13920 inputs: []inputInfo{
13921 {0, 4295032831},
13922 },
13923 outputs: []outputInfo{
13924 {0, 49135},
13925 },
13926 },
13927 },
13928 {
13929 name: "MOVQatomicload",
13930 auxType: auxSymOff,
13931 argLen: 2,
13932 faultOnNilArg0: true,
13933 symEffect: SymRead,
13934 asm: x86.AMOVQ,
13935 reg: regInfo{
13936 inputs: []inputInfo{
13937 {0, 4295032831},
13938 },
13939 outputs: []outputInfo{
13940 {0, 49135},
13941 },
13942 },
13943 },
13944 {
13945 name: "XCHGB",
13946 auxType: auxSymOff,
13947 argLen: 3,
13948 resultInArg0: true,
13949 faultOnNilArg1: true,
13950 hasSideEffects: true,
13951 symEffect: SymRdWr,
13952 asm: x86.AXCHGB,
13953 reg: regInfo{
13954 inputs: []inputInfo{
13955 {0, 49135},
13956 {1, 4295032831},
13957 },
13958 outputs: []outputInfo{
13959 {0, 49135},
13960 },
13961 },
13962 },
13963 {
13964 name: "XCHGL",
13965 auxType: auxSymOff,
13966 argLen: 3,
13967 resultInArg0: true,
13968 faultOnNilArg1: true,
13969 hasSideEffects: true,
13970 symEffect: SymRdWr,
13971 asm: x86.AXCHGL,
13972 reg: regInfo{
13973 inputs: []inputInfo{
13974 {0, 49135},
13975 {1, 4295032831},
13976 },
13977 outputs: []outputInfo{
13978 {0, 49135},
13979 },
13980 },
13981 },
13982 {
13983 name: "XCHGQ",
13984 auxType: auxSymOff,
13985 argLen: 3,
13986 resultInArg0: true,
13987 faultOnNilArg1: true,
13988 hasSideEffects: true,
13989 symEffect: SymRdWr,
13990 asm: x86.AXCHGQ,
13991 reg: regInfo{
13992 inputs: []inputInfo{
13993 {0, 49135},
13994 {1, 4295032831},
13995 },
13996 outputs: []outputInfo{
13997 {0, 49135},
13998 },
13999 },
14000 },
14001 {
14002 name: "XADDLlock",
14003 auxType: auxSymOff,
14004 argLen: 3,
14005 resultInArg0: true,
14006 clobberFlags: true,
14007 faultOnNilArg1: true,
14008 hasSideEffects: true,
14009 symEffect: SymRdWr,
14010 asm: x86.AXADDL,
14011 reg: regInfo{
14012 inputs: []inputInfo{
14013 {0, 49135},
14014 {1, 4295032831},
14015 },
14016 outputs: []outputInfo{
14017 {0, 49135},
14018 },
14019 },
14020 },
14021 {
14022 name: "XADDQlock",
14023 auxType: auxSymOff,
14024 argLen: 3,
14025 resultInArg0: true,
14026 clobberFlags: true,
14027 faultOnNilArg1: true,
14028 hasSideEffects: true,
14029 symEffect: SymRdWr,
14030 asm: x86.AXADDQ,
14031 reg: regInfo{
14032 inputs: []inputInfo{
14033 {0, 49135},
14034 {1, 4295032831},
14035 },
14036 outputs: []outputInfo{
14037 {0, 49135},
14038 },
14039 },
14040 },
14041 {
14042 name: "AddTupleFirst32",
14043 argLen: 2,
14044 reg: regInfo{},
14045 },
14046 {
14047 name: "AddTupleFirst64",
14048 argLen: 2,
14049 reg: regInfo{},
14050 },
14051 {
14052 name: "CMPXCHGLlock",
14053 auxType: auxSymOff,
14054 argLen: 4,
14055 clobberFlags: true,
14056 faultOnNilArg0: true,
14057 hasSideEffects: true,
14058 symEffect: SymRdWr,
14059 asm: x86.ACMPXCHGL,
14060 reg: regInfo{
14061 inputs: []inputInfo{
14062 {1, 1},
14063 {0, 49135},
14064 {2, 49135},
14065 },
14066 clobbers: 1,
14067 outputs: []outputInfo{
14068 {1, 0},
14069 {0, 49135},
14070 },
14071 },
14072 },
14073 {
14074 name: "CMPXCHGQlock",
14075 auxType: auxSymOff,
14076 argLen: 4,
14077 clobberFlags: true,
14078 faultOnNilArg0: true,
14079 hasSideEffects: true,
14080 symEffect: SymRdWr,
14081 asm: x86.ACMPXCHGQ,
14082 reg: regInfo{
14083 inputs: []inputInfo{
14084 {1, 1},
14085 {0, 49135},
14086 {2, 49135},
14087 },
14088 clobbers: 1,
14089 outputs: []outputInfo{
14090 {1, 0},
14091 {0, 49135},
14092 },
14093 },
14094 },
14095 {
14096 name: "ANDBlock",
14097 auxType: auxSymOff,
14098 argLen: 3,
14099 clobberFlags: true,
14100 faultOnNilArg0: true,
14101 hasSideEffects: true,
14102 symEffect: SymRdWr,
14103 asm: x86.AANDB,
14104 reg: regInfo{
14105 inputs: []inputInfo{
14106 {1, 49151},
14107 {0, 4295032831},
14108 },
14109 },
14110 },
14111 {
14112 name: "ANDLlock",
14113 auxType: auxSymOff,
14114 argLen: 3,
14115 clobberFlags: true,
14116 faultOnNilArg0: true,
14117 hasSideEffects: true,
14118 symEffect: SymRdWr,
14119 asm: x86.AANDL,
14120 reg: regInfo{
14121 inputs: []inputInfo{
14122 {1, 49151},
14123 {0, 4295032831},
14124 },
14125 },
14126 },
14127 {
14128 name: "ORBlock",
14129 auxType: auxSymOff,
14130 argLen: 3,
14131 clobberFlags: true,
14132 faultOnNilArg0: true,
14133 hasSideEffects: true,
14134 symEffect: SymRdWr,
14135 asm: x86.AORB,
14136 reg: regInfo{
14137 inputs: []inputInfo{
14138 {1, 49151},
14139 {0, 4295032831},
14140 },
14141 },
14142 },
14143 {
14144 name: "ORLlock",
14145 auxType: auxSymOff,
14146 argLen: 3,
14147 clobberFlags: true,
14148 faultOnNilArg0: true,
14149 hasSideEffects: true,
14150 symEffect: SymRdWr,
14151 asm: x86.AORL,
14152 reg: regInfo{
14153 inputs: []inputInfo{
14154 {1, 49151},
14155 {0, 4295032831},
14156 },
14157 },
14158 },
14159 {
14160 name: "PrefetchT0",
14161 argLen: 2,
14162 hasSideEffects: true,
14163 asm: x86.APREFETCHT0,
14164 reg: regInfo{
14165 inputs: []inputInfo{
14166 {0, 4295032831},
14167 },
14168 },
14169 },
14170 {
14171 name: "PrefetchNTA",
14172 argLen: 2,
14173 hasSideEffects: true,
14174 asm: x86.APREFETCHNTA,
14175 reg: regInfo{
14176 inputs: []inputInfo{
14177 {0, 4295032831},
14178 },
14179 },
14180 },
14181 {
14182 name: "ANDNQ",
14183 argLen: 2,
14184 clobberFlags: true,
14185 asm: x86.AANDNQ,
14186 reg: regInfo{
14187 inputs: []inputInfo{
14188 {0, 49135},
14189 {1, 49135},
14190 },
14191 outputs: []outputInfo{
14192 {0, 49135},
14193 },
14194 },
14195 },
14196 {
14197 name: "ANDNL",
14198 argLen: 2,
14199 clobberFlags: true,
14200 asm: x86.AANDNL,
14201 reg: regInfo{
14202 inputs: []inputInfo{
14203 {0, 49135},
14204 {1, 49135},
14205 },
14206 outputs: []outputInfo{
14207 {0, 49135},
14208 },
14209 },
14210 },
14211 {
14212 name: "BLSIQ",
14213 argLen: 1,
14214 clobberFlags: true,
14215 asm: x86.ABLSIQ,
14216 reg: regInfo{
14217 inputs: []inputInfo{
14218 {0, 49135},
14219 },
14220 outputs: []outputInfo{
14221 {0, 49135},
14222 },
14223 },
14224 },
14225 {
14226 name: "BLSIL",
14227 argLen: 1,
14228 clobberFlags: true,
14229 asm: x86.ABLSIL,
14230 reg: regInfo{
14231 inputs: []inputInfo{
14232 {0, 49135},
14233 },
14234 outputs: []outputInfo{
14235 {0, 49135},
14236 },
14237 },
14238 },
14239 {
14240 name: "BLSMSKQ",
14241 argLen: 1,
14242 clobberFlags: true,
14243 asm: x86.ABLSMSKQ,
14244 reg: regInfo{
14245 inputs: []inputInfo{
14246 {0, 49135},
14247 },
14248 outputs: []outputInfo{
14249 {0, 49135},
14250 },
14251 },
14252 },
14253 {
14254 name: "BLSMSKL",
14255 argLen: 1,
14256 clobberFlags: true,
14257 asm: x86.ABLSMSKL,
14258 reg: regInfo{
14259 inputs: []inputInfo{
14260 {0, 49135},
14261 },
14262 outputs: []outputInfo{
14263 {0, 49135},
14264 },
14265 },
14266 },
14267 {
14268 name: "BLSRQ",
14269 argLen: 1,
14270 asm: x86.ABLSRQ,
14271 reg: regInfo{
14272 inputs: []inputInfo{
14273 {0, 49135},
14274 },
14275 outputs: []outputInfo{
14276 {1, 0},
14277 {0, 49135},
14278 },
14279 },
14280 },
14281 {
14282 name: "BLSRL",
14283 argLen: 1,
14284 asm: x86.ABLSRL,
14285 reg: regInfo{
14286 inputs: []inputInfo{
14287 {0, 49135},
14288 },
14289 outputs: []outputInfo{
14290 {1, 0},
14291 {0, 49135},
14292 },
14293 },
14294 },
14295 {
14296 name: "TZCNTQ",
14297 argLen: 1,
14298 clobberFlags: true,
14299 asm: x86.ATZCNTQ,
14300 reg: regInfo{
14301 inputs: []inputInfo{
14302 {0, 49135},
14303 },
14304 outputs: []outputInfo{
14305 {0, 49135},
14306 },
14307 },
14308 },
14309 {
14310 name: "TZCNTL",
14311 argLen: 1,
14312 clobberFlags: true,
14313 asm: x86.ATZCNTL,
14314 reg: regInfo{
14315 inputs: []inputInfo{
14316 {0, 49135},
14317 },
14318 outputs: []outputInfo{
14319 {0, 49135},
14320 },
14321 },
14322 },
14323 {
14324 name: "LZCNTQ",
14325 argLen: 1,
14326 clobberFlags: true,
14327 asm: x86.ALZCNTQ,
14328 reg: regInfo{
14329 inputs: []inputInfo{
14330 {0, 49135},
14331 },
14332 outputs: []outputInfo{
14333 {0, 49135},
14334 },
14335 },
14336 },
14337 {
14338 name: "LZCNTL",
14339 argLen: 1,
14340 clobberFlags: true,
14341 asm: x86.ALZCNTL,
14342 reg: regInfo{
14343 inputs: []inputInfo{
14344 {0, 49135},
14345 },
14346 outputs: []outputInfo{
14347 {0, 49135},
14348 },
14349 },
14350 },
14351 {
14352 name: "MOVBEWstore",
14353 auxType: auxSymOff,
14354 argLen: 3,
14355 faultOnNilArg0: true,
14356 symEffect: SymWrite,
14357 asm: x86.AMOVBEW,
14358 reg: regInfo{
14359 inputs: []inputInfo{
14360 {1, 49151},
14361 {0, 4295032831},
14362 },
14363 },
14364 },
14365 {
14366 name: "MOVBELload",
14367 auxType: auxSymOff,
14368 argLen: 2,
14369 faultOnNilArg0: true,
14370 symEffect: SymRead,
14371 asm: x86.AMOVBEL,
14372 reg: regInfo{
14373 inputs: []inputInfo{
14374 {0, 4295032831},
14375 },
14376 outputs: []outputInfo{
14377 {0, 49135},
14378 },
14379 },
14380 },
14381 {
14382 name: "MOVBELstore",
14383 auxType: auxSymOff,
14384 argLen: 3,
14385 faultOnNilArg0: true,
14386 symEffect: SymWrite,
14387 asm: x86.AMOVBEL,
14388 reg: regInfo{
14389 inputs: []inputInfo{
14390 {1, 49151},
14391 {0, 4295032831},
14392 },
14393 },
14394 },
14395 {
14396 name: "MOVBEQload",
14397 auxType: auxSymOff,
14398 argLen: 2,
14399 faultOnNilArg0: true,
14400 symEffect: SymRead,
14401 asm: x86.AMOVBEQ,
14402 reg: regInfo{
14403 inputs: []inputInfo{
14404 {0, 4295032831},
14405 },
14406 outputs: []outputInfo{
14407 {0, 49135},
14408 },
14409 },
14410 },
14411 {
14412 name: "MOVBEQstore",
14413 auxType: auxSymOff,
14414 argLen: 3,
14415 faultOnNilArg0: true,
14416 symEffect: SymWrite,
14417 asm: x86.AMOVBEQ,
14418 reg: regInfo{
14419 inputs: []inputInfo{
14420 {1, 49151},
14421 {0, 4295032831},
14422 },
14423 },
14424 },
14425 {
14426 name: "MOVBELloadidx1",
14427 auxType: auxSymOff,
14428 argLen: 3,
14429 commutative: true,
14430 symEffect: SymRead,
14431 asm: x86.AMOVBEL,
14432 scale: 1,
14433 reg: regInfo{
14434 inputs: []inputInfo{
14435 {1, 49151},
14436 {0, 4295032831},
14437 },
14438 outputs: []outputInfo{
14439 {0, 49135},
14440 },
14441 },
14442 },
14443 {
14444 name: "MOVBELloadidx4",
14445 auxType: auxSymOff,
14446 argLen: 3,
14447 symEffect: SymRead,
14448 asm: x86.AMOVBEL,
14449 scale: 4,
14450 reg: regInfo{
14451 inputs: []inputInfo{
14452 {1, 49151},
14453 {0, 4295032831},
14454 },
14455 outputs: []outputInfo{
14456 {0, 49135},
14457 },
14458 },
14459 },
14460 {
14461 name: "MOVBELloadidx8",
14462 auxType: auxSymOff,
14463 argLen: 3,
14464 symEffect: SymRead,
14465 asm: x86.AMOVBEL,
14466 scale: 8,
14467 reg: regInfo{
14468 inputs: []inputInfo{
14469 {1, 49151},
14470 {0, 4295032831},
14471 },
14472 outputs: []outputInfo{
14473 {0, 49135},
14474 },
14475 },
14476 },
14477 {
14478 name: "MOVBEQloadidx1",
14479 auxType: auxSymOff,
14480 argLen: 3,
14481 commutative: true,
14482 symEffect: SymRead,
14483 asm: x86.AMOVBEQ,
14484 scale: 1,
14485 reg: regInfo{
14486 inputs: []inputInfo{
14487 {1, 49151},
14488 {0, 4295032831},
14489 },
14490 outputs: []outputInfo{
14491 {0, 49135},
14492 },
14493 },
14494 },
14495 {
14496 name: "MOVBEQloadidx8",
14497 auxType: auxSymOff,
14498 argLen: 3,
14499 symEffect: SymRead,
14500 asm: x86.AMOVBEQ,
14501 scale: 8,
14502 reg: regInfo{
14503 inputs: []inputInfo{
14504 {1, 49151},
14505 {0, 4295032831},
14506 },
14507 outputs: []outputInfo{
14508 {0, 49135},
14509 },
14510 },
14511 },
14512 {
14513 name: "MOVBEWstoreidx1",
14514 auxType: auxSymOff,
14515 argLen: 4,
14516 commutative: true,
14517 symEffect: SymWrite,
14518 asm: x86.AMOVBEW,
14519 scale: 1,
14520 reg: regInfo{
14521 inputs: []inputInfo{
14522 {1, 49151},
14523 {2, 49151},
14524 {0, 4295032831},
14525 },
14526 },
14527 },
14528 {
14529 name: "MOVBEWstoreidx2",
14530 auxType: auxSymOff,
14531 argLen: 4,
14532 symEffect: SymWrite,
14533 asm: x86.AMOVBEW,
14534 scale: 2,
14535 reg: regInfo{
14536 inputs: []inputInfo{
14537 {1, 49151},
14538 {2, 49151},
14539 {0, 4295032831},
14540 },
14541 },
14542 },
14543 {
14544 name: "MOVBELstoreidx1",
14545 auxType: auxSymOff,
14546 argLen: 4,
14547 commutative: true,
14548 symEffect: SymWrite,
14549 asm: x86.AMOVBEL,
14550 scale: 1,
14551 reg: regInfo{
14552 inputs: []inputInfo{
14553 {1, 49151},
14554 {2, 49151},
14555 {0, 4295032831},
14556 },
14557 },
14558 },
14559 {
14560 name: "MOVBELstoreidx4",
14561 auxType: auxSymOff,
14562 argLen: 4,
14563 symEffect: SymWrite,
14564 asm: x86.AMOVBEL,
14565 scale: 4,
14566 reg: regInfo{
14567 inputs: []inputInfo{
14568 {1, 49151},
14569 {2, 49151},
14570 {0, 4295032831},
14571 },
14572 },
14573 },
14574 {
14575 name: "MOVBELstoreidx8",
14576 auxType: auxSymOff,
14577 argLen: 4,
14578 symEffect: SymWrite,
14579 asm: x86.AMOVBEL,
14580 scale: 8,
14581 reg: regInfo{
14582 inputs: []inputInfo{
14583 {1, 49151},
14584 {2, 49151},
14585 {0, 4295032831},
14586 },
14587 },
14588 },
14589 {
14590 name: "MOVBEQstoreidx1",
14591 auxType: auxSymOff,
14592 argLen: 4,
14593 commutative: true,
14594 symEffect: SymWrite,
14595 asm: x86.AMOVBEQ,
14596 scale: 1,
14597 reg: regInfo{
14598 inputs: []inputInfo{
14599 {1, 49151},
14600 {2, 49151},
14601 {0, 4295032831},
14602 },
14603 },
14604 },
14605 {
14606 name: "MOVBEQstoreidx8",
14607 auxType: auxSymOff,
14608 argLen: 4,
14609 symEffect: SymWrite,
14610 asm: x86.AMOVBEQ,
14611 scale: 8,
14612 reg: regInfo{
14613 inputs: []inputInfo{
14614 {1, 49151},
14615 {2, 49151},
14616 {0, 4295032831},
14617 },
14618 },
14619 },
14620 {
14621 name: "SARXQ",
14622 argLen: 2,
14623 asm: x86.ASARXQ,
14624 reg: regInfo{
14625 inputs: []inputInfo{
14626 {0, 49135},
14627 {1, 49135},
14628 },
14629 outputs: []outputInfo{
14630 {0, 49135},
14631 },
14632 },
14633 },
14634 {
14635 name: "SARXL",
14636 argLen: 2,
14637 asm: x86.ASARXL,
14638 reg: regInfo{
14639 inputs: []inputInfo{
14640 {0, 49135},
14641 {1, 49135},
14642 },
14643 outputs: []outputInfo{
14644 {0, 49135},
14645 },
14646 },
14647 },
14648 {
14649 name: "SHLXQ",
14650 argLen: 2,
14651 asm: x86.ASHLXQ,
14652 reg: regInfo{
14653 inputs: []inputInfo{
14654 {0, 49135},
14655 {1, 49135},
14656 },
14657 outputs: []outputInfo{
14658 {0, 49135},
14659 },
14660 },
14661 },
14662 {
14663 name: "SHLXL",
14664 argLen: 2,
14665 asm: x86.ASHLXL,
14666 reg: regInfo{
14667 inputs: []inputInfo{
14668 {0, 49135},
14669 {1, 49135},
14670 },
14671 outputs: []outputInfo{
14672 {0, 49135},
14673 },
14674 },
14675 },
14676 {
14677 name: "SHRXQ",
14678 argLen: 2,
14679 asm: x86.ASHRXQ,
14680 reg: regInfo{
14681 inputs: []inputInfo{
14682 {0, 49135},
14683 {1, 49135},
14684 },
14685 outputs: []outputInfo{
14686 {0, 49135},
14687 },
14688 },
14689 },
14690 {
14691 name: "SHRXL",
14692 argLen: 2,
14693 asm: x86.ASHRXL,
14694 reg: regInfo{
14695 inputs: []inputInfo{
14696 {0, 49135},
14697 {1, 49135},
14698 },
14699 outputs: []outputInfo{
14700 {0, 49135},
14701 },
14702 },
14703 },
14704 {
14705 name: "SARXLload",
14706 auxType: auxSymOff,
14707 argLen: 3,
14708 faultOnNilArg0: true,
14709 symEffect: SymRead,
14710 asm: x86.ASARXL,
14711 reg: regInfo{
14712 inputs: []inputInfo{
14713 {1, 49135},
14714 {0, 4295032831},
14715 },
14716 outputs: []outputInfo{
14717 {0, 49135},
14718 },
14719 },
14720 },
14721 {
14722 name: "SARXQload",
14723 auxType: auxSymOff,
14724 argLen: 3,
14725 faultOnNilArg0: true,
14726 symEffect: SymRead,
14727 asm: x86.ASARXQ,
14728 reg: regInfo{
14729 inputs: []inputInfo{
14730 {1, 49135},
14731 {0, 4295032831},
14732 },
14733 outputs: []outputInfo{
14734 {0, 49135},
14735 },
14736 },
14737 },
14738 {
14739 name: "SHLXLload",
14740 auxType: auxSymOff,
14741 argLen: 3,
14742 faultOnNilArg0: true,
14743 symEffect: SymRead,
14744 asm: x86.ASHLXL,
14745 reg: regInfo{
14746 inputs: []inputInfo{
14747 {1, 49135},
14748 {0, 4295032831},
14749 },
14750 outputs: []outputInfo{
14751 {0, 49135},
14752 },
14753 },
14754 },
14755 {
14756 name: "SHLXQload",
14757 auxType: auxSymOff,
14758 argLen: 3,
14759 faultOnNilArg0: true,
14760 symEffect: SymRead,
14761 asm: x86.ASHLXQ,
14762 reg: regInfo{
14763 inputs: []inputInfo{
14764 {1, 49135},
14765 {0, 4295032831},
14766 },
14767 outputs: []outputInfo{
14768 {0, 49135},
14769 },
14770 },
14771 },
14772 {
14773 name: "SHRXLload",
14774 auxType: auxSymOff,
14775 argLen: 3,
14776 faultOnNilArg0: true,
14777 symEffect: SymRead,
14778 asm: x86.ASHRXL,
14779 reg: regInfo{
14780 inputs: []inputInfo{
14781 {1, 49135},
14782 {0, 4295032831},
14783 },
14784 outputs: []outputInfo{
14785 {0, 49135},
14786 },
14787 },
14788 },
14789 {
14790 name: "SHRXQload",
14791 auxType: auxSymOff,
14792 argLen: 3,
14793 faultOnNilArg0: true,
14794 symEffect: SymRead,
14795 asm: x86.ASHRXQ,
14796 reg: regInfo{
14797 inputs: []inputInfo{
14798 {1, 49135},
14799 {0, 4295032831},
14800 },
14801 outputs: []outputInfo{
14802 {0, 49135},
14803 },
14804 },
14805 },
14806 {
14807 name: "SARXLloadidx1",
14808 auxType: auxSymOff,
14809 argLen: 4,
14810 faultOnNilArg0: true,
14811 symEffect: SymRead,
14812 asm: x86.ASARXL,
14813 scale: 1,
14814 reg: regInfo{
14815 inputs: []inputInfo{
14816 {2, 49135},
14817 {1, 49151},
14818 {0, 4295032831},
14819 },
14820 outputs: []outputInfo{
14821 {0, 49135},
14822 },
14823 },
14824 },
14825 {
14826 name: "SARXLloadidx4",
14827 auxType: auxSymOff,
14828 argLen: 4,
14829 faultOnNilArg0: true,
14830 symEffect: SymRead,
14831 asm: x86.ASARXL,
14832 scale: 4,
14833 reg: regInfo{
14834 inputs: []inputInfo{
14835 {2, 49135},
14836 {1, 49151},
14837 {0, 4295032831},
14838 },
14839 outputs: []outputInfo{
14840 {0, 49135},
14841 },
14842 },
14843 },
14844 {
14845 name: "SARXLloadidx8",
14846 auxType: auxSymOff,
14847 argLen: 4,
14848 faultOnNilArg0: true,
14849 symEffect: SymRead,
14850 asm: x86.ASARXL,
14851 scale: 8,
14852 reg: regInfo{
14853 inputs: []inputInfo{
14854 {2, 49135},
14855 {1, 49151},
14856 {0, 4295032831},
14857 },
14858 outputs: []outputInfo{
14859 {0, 49135},
14860 },
14861 },
14862 },
14863 {
14864 name: "SARXQloadidx1",
14865 auxType: auxSymOff,
14866 argLen: 4,
14867 faultOnNilArg0: true,
14868 symEffect: SymRead,
14869 asm: x86.ASARXQ,
14870 scale: 1,
14871 reg: regInfo{
14872 inputs: []inputInfo{
14873 {2, 49135},
14874 {1, 49151},
14875 {0, 4295032831},
14876 },
14877 outputs: []outputInfo{
14878 {0, 49135},
14879 },
14880 },
14881 },
14882 {
14883 name: "SARXQloadidx8",
14884 auxType: auxSymOff,
14885 argLen: 4,
14886 faultOnNilArg0: true,
14887 symEffect: SymRead,
14888 asm: x86.ASARXQ,
14889 scale: 8,
14890 reg: regInfo{
14891 inputs: []inputInfo{
14892 {2, 49135},
14893 {1, 49151},
14894 {0, 4295032831},
14895 },
14896 outputs: []outputInfo{
14897 {0, 49135},
14898 },
14899 },
14900 },
14901 {
14902 name: "SHLXLloadidx1",
14903 auxType: auxSymOff,
14904 argLen: 4,
14905 faultOnNilArg0: true,
14906 symEffect: SymRead,
14907 asm: x86.ASHLXL,
14908 scale: 1,
14909 reg: regInfo{
14910 inputs: []inputInfo{
14911 {2, 49135},
14912 {1, 49151},
14913 {0, 4295032831},
14914 },
14915 outputs: []outputInfo{
14916 {0, 49135},
14917 },
14918 },
14919 },
14920 {
14921 name: "SHLXLloadidx4",
14922 auxType: auxSymOff,
14923 argLen: 4,
14924 faultOnNilArg0: true,
14925 symEffect: SymRead,
14926 asm: x86.ASHLXL,
14927 scale: 4,
14928 reg: regInfo{
14929 inputs: []inputInfo{
14930 {2, 49135},
14931 {1, 49151},
14932 {0, 4295032831},
14933 },
14934 outputs: []outputInfo{
14935 {0, 49135},
14936 },
14937 },
14938 },
14939 {
14940 name: "SHLXLloadidx8",
14941 auxType: auxSymOff,
14942 argLen: 4,
14943 faultOnNilArg0: true,
14944 symEffect: SymRead,
14945 asm: x86.ASHLXL,
14946 scale: 8,
14947 reg: regInfo{
14948 inputs: []inputInfo{
14949 {2, 49135},
14950 {1, 49151},
14951 {0, 4295032831},
14952 },
14953 outputs: []outputInfo{
14954 {0, 49135},
14955 },
14956 },
14957 },
14958 {
14959 name: "SHLXQloadidx1",
14960 auxType: auxSymOff,
14961 argLen: 4,
14962 faultOnNilArg0: true,
14963 symEffect: SymRead,
14964 asm: x86.ASHLXQ,
14965 scale: 1,
14966 reg: regInfo{
14967 inputs: []inputInfo{
14968 {2, 49135},
14969 {1, 49151},
14970 {0, 4295032831},
14971 },
14972 outputs: []outputInfo{
14973 {0, 49135},
14974 },
14975 },
14976 },
14977 {
14978 name: "SHLXQloadidx8",
14979 auxType: auxSymOff,
14980 argLen: 4,
14981 faultOnNilArg0: true,
14982 symEffect: SymRead,
14983 asm: x86.ASHLXQ,
14984 scale: 8,
14985 reg: regInfo{
14986 inputs: []inputInfo{
14987 {2, 49135},
14988 {1, 49151},
14989 {0, 4295032831},
14990 },
14991 outputs: []outputInfo{
14992 {0, 49135},
14993 },
14994 },
14995 },
14996 {
14997 name: "SHRXLloadidx1",
14998 auxType: auxSymOff,
14999 argLen: 4,
15000 faultOnNilArg0: true,
15001 symEffect: SymRead,
15002 asm: x86.ASHRXL,
15003 scale: 1,
15004 reg: regInfo{
15005 inputs: []inputInfo{
15006 {2, 49135},
15007 {1, 49151},
15008 {0, 4295032831},
15009 },
15010 outputs: []outputInfo{
15011 {0, 49135},
15012 },
15013 },
15014 },
15015 {
15016 name: "SHRXLloadidx4",
15017 auxType: auxSymOff,
15018 argLen: 4,
15019 faultOnNilArg0: true,
15020 symEffect: SymRead,
15021 asm: x86.ASHRXL,
15022 scale: 4,
15023 reg: regInfo{
15024 inputs: []inputInfo{
15025 {2, 49135},
15026 {1, 49151},
15027 {0, 4295032831},
15028 },
15029 outputs: []outputInfo{
15030 {0, 49135},
15031 },
15032 },
15033 },
15034 {
15035 name: "SHRXLloadidx8",
15036 auxType: auxSymOff,
15037 argLen: 4,
15038 faultOnNilArg0: true,
15039 symEffect: SymRead,
15040 asm: x86.ASHRXL,
15041 scale: 8,
15042 reg: regInfo{
15043 inputs: []inputInfo{
15044 {2, 49135},
15045 {1, 49151},
15046 {0, 4295032831},
15047 },
15048 outputs: []outputInfo{
15049 {0, 49135},
15050 },
15051 },
15052 },
15053 {
15054 name: "SHRXQloadidx1",
15055 auxType: auxSymOff,
15056 argLen: 4,
15057 faultOnNilArg0: true,
15058 symEffect: SymRead,
15059 asm: x86.ASHRXQ,
15060 scale: 1,
15061 reg: regInfo{
15062 inputs: []inputInfo{
15063 {2, 49135},
15064 {1, 49151},
15065 {0, 4295032831},
15066 },
15067 outputs: []outputInfo{
15068 {0, 49135},
15069 },
15070 },
15071 },
15072 {
15073 name: "SHRXQloadidx8",
15074 auxType: auxSymOff,
15075 argLen: 4,
15076 faultOnNilArg0: true,
15077 symEffect: SymRead,
15078 asm: x86.ASHRXQ,
15079 scale: 8,
15080 reg: regInfo{
15081 inputs: []inputInfo{
15082 {2, 49135},
15083 {1, 49151},
15084 {0, 4295032831},
15085 },
15086 outputs: []outputInfo{
15087 {0, 49135},
15088 },
15089 },
15090 },
15091
15092 {
15093 name: "ADD",
15094 argLen: 2,
15095 commutative: true,
15096 asm: arm.AADD,
15097 reg: regInfo{
15098 inputs: []inputInfo{
15099 {0, 22527},
15100 {1, 22527},
15101 },
15102 outputs: []outputInfo{
15103 {0, 21503},
15104 },
15105 },
15106 },
15107 {
15108 name: "ADDconst",
15109 auxType: auxInt32,
15110 argLen: 1,
15111 asm: arm.AADD,
15112 reg: regInfo{
15113 inputs: []inputInfo{
15114 {0, 30719},
15115 },
15116 outputs: []outputInfo{
15117 {0, 21503},
15118 },
15119 },
15120 },
15121 {
15122 name: "SUB",
15123 argLen: 2,
15124 asm: arm.ASUB,
15125 reg: regInfo{
15126 inputs: []inputInfo{
15127 {0, 22527},
15128 {1, 22527},
15129 },
15130 outputs: []outputInfo{
15131 {0, 21503},
15132 },
15133 },
15134 },
15135 {
15136 name: "SUBconst",
15137 auxType: auxInt32,
15138 argLen: 1,
15139 asm: arm.ASUB,
15140 reg: regInfo{
15141 inputs: []inputInfo{
15142 {0, 22527},
15143 },
15144 outputs: []outputInfo{
15145 {0, 21503},
15146 },
15147 },
15148 },
15149 {
15150 name: "RSB",
15151 argLen: 2,
15152 asm: arm.ARSB,
15153 reg: regInfo{
15154 inputs: []inputInfo{
15155 {0, 22527},
15156 {1, 22527},
15157 },
15158 outputs: []outputInfo{
15159 {0, 21503},
15160 },
15161 },
15162 },
15163 {
15164 name: "RSBconst",
15165 auxType: auxInt32,
15166 argLen: 1,
15167 asm: arm.ARSB,
15168 reg: regInfo{
15169 inputs: []inputInfo{
15170 {0, 22527},
15171 },
15172 outputs: []outputInfo{
15173 {0, 21503},
15174 },
15175 },
15176 },
15177 {
15178 name: "MUL",
15179 argLen: 2,
15180 commutative: true,
15181 asm: arm.AMUL,
15182 reg: regInfo{
15183 inputs: []inputInfo{
15184 {0, 22527},
15185 {1, 22527},
15186 },
15187 outputs: []outputInfo{
15188 {0, 21503},
15189 },
15190 },
15191 },
15192 {
15193 name: "HMUL",
15194 argLen: 2,
15195 commutative: true,
15196 asm: arm.AMULL,
15197 reg: regInfo{
15198 inputs: []inputInfo{
15199 {0, 22527},
15200 {1, 22527},
15201 },
15202 outputs: []outputInfo{
15203 {0, 21503},
15204 },
15205 },
15206 },
15207 {
15208 name: "HMULU",
15209 argLen: 2,
15210 commutative: true,
15211 asm: arm.AMULLU,
15212 reg: regInfo{
15213 inputs: []inputInfo{
15214 {0, 22527},
15215 {1, 22527},
15216 },
15217 outputs: []outputInfo{
15218 {0, 21503},
15219 },
15220 },
15221 },
15222 {
15223 name: "CALLudiv",
15224 argLen: 2,
15225 clobberFlags: true,
15226 reg: regInfo{
15227 inputs: []inputInfo{
15228 {0, 2},
15229 {1, 1},
15230 },
15231 clobbers: 20492,
15232 outputs: []outputInfo{
15233 {0, 1},
15234 {1, 2},
15235 },
15236 },
15237 },
15238 {
15239 name: "ADDS",
15240 argLen: 2,
15241 commutative: true,
15242 asm: arm.AADD,
15243 reg: regInfo{
15244 inputs: []inputInfo{
15245 {0, 22527},
15246 {1, 22527},
15247 },
15248 outputs: []outputInfo{
15249 {1, 0},
15250 {0, 21503},
15251 },
15252 },
15253 },
15254 {
15255 name: "ADDSconst",
15256 auxType: auxInt32,
15257 argLen: 1,
15258 asm: arm.AADD,
15259 reg: regInfo{
15260 inputs: []inputInfo{
15261 {0, 22527},
15262 },
15263 outputs: []outputInfo{
15264 {1, 0},
15265 {0, 21503},
15266 },
15267 },
15268 },
15269 {
15270 name: "ADC",
15271 argLen: 3,
15272 commutative: true,
15273 asm: arm.AADC,
15274 reg: regInfo{
15275 inputs: []inputInfo{
15276 {0, 21503},
15277 {1, 21503},
15278 },
15279 outputs: []outputInfo{
15280 {0, 21503},
15281 },
15282 },
15283 },
15284 {
15285 name: "ADCconst",
15286 auxType: auxInt32,
15287 argLen: 2,
15288 asm: arm.AADC,
15289 reg: regInfo{
15290 inputs: []inputInfo{
15291 {0, 21503},
15292 },
15293 outputs: []outputInfo{
15294 {0, 21503},
15295 },
15296 },
15297 },
15298 {
15299 name: "SUBS",
15300 argLen: 2,
15301 asm: arm.ASUB,
15302 reg: regInfo{
15303 inputs: []inputInfo{
15304 {0, 22527},
15305 {1, 22527},
15306 },
15307 outputs: []outputInfo{
15308 {1, 0},
15309 {0, 21503},
15310 },
15311 },
15312 },
15313 {
15314 name: "SUBSconst",
15315 auxType: auxInt32,
15316 argLen: 1,
15317 asm: arm.ASUB,
15318 reg: regInfo{
15319 inputs: []inputInfo{
15320 {0, 22527},
15321 },
15322 outputs: []outputInfo{
15323 {1, 0},
15324 {0, 21503},
15325 },
15326 },
15327 },
15328 {
15329 name: "RSBSconst",
15330 auxType: auxInt32,
15331 argLen: 1,
15332 asm: arm.ARSB,
15333 reg: regInfo{
15334 inputs: []inputInfo{
15335 {0, 22527},
15336 },
15337 outputs: []outputInfo{
15338 {1, 0},
15339 {0, 21503},
15340 },
15341 },
15342 },
15343 {
15344 name: "SBC",
15345 argLen: 3,
15346 asm: arm.ASBC,
15347 reg: regInfo{
15348 inputs: []inputInfo{
15349 {0, 21503},
15350 {1, 21503},
15351 },
15352 outputs: []outputInfo{
15353 {0, 21503},
15354 },
15355 },
15356 },
15357 {
15358 name: "SBCconst",
15359 auxType: auxInt32,
15360 argLen: 2,
15361 asm: arm.ASBC,
15362 reg: regInfo{
15363 inputs: []inputInfo{
15364 {0, 21503},
15365 },
15366 outputs: []outputInfo{
15367 {0, 21503},
15368 },
15369 },
15370 },
15371 {
15372 name: "RSCconst",
15373 auxType: auxInt32,
15374 argLen: 2,
15375 asm: arm.ARSC,
15376 reg: regInfo{
15377 inputs: []inputInfo{
15378 {0, 21503},
15379 },
15380 outputs: []outputInfo{
15381 {0, 21503},
15382 },
15383 },
15384 },
15385 {
15386 name: "MULLU",
15387 argLen: 2,
15388 commutative: true,
15389 asm: arm.AMULLU,
15390 reg: regInfo{
15391 inputs: []inputInfo{
15392 {0, 22527},
15393 {1, 22527},
15394 },
15395 outputs: []outputInfo{
15396 {0, 21503},
15397 {1, 21503},
15398 },
15399 },
15400 },
15401 {
15402 name: "MULA",
15403 argLen: 3,
15404 asm: arm.AMULA,
15405 reg: regInfo{
15406 inputs: []inputInfo{
15407 {0, 21503},
15408 {1, 21503},
15409 {2, 21503},
15410 },
15411 outputs: []outputInfo{
15412 {0, 21503},
15413 },
15414 },
15415 },
15416 {
15417 name: "MULS",
15418 argLen: 3,
15419 asm: arm.AMULS,
15420 reg: regInfo{
15421 inputs: []inputInfo{
15422 {0, 21503},
15423 {1, 21503},
15424 {2, 21503},
15425 },
15426 outputs: []outputInfo{
15427 {0, 21503},
15428 },
15429 },
15430 },
15431 {
15432 name: "ADDF",
15433 argLen: 2,
15434 commutative: true,
15435 asm: arm.AADDF,
15436 reg: regInfo{
15437 inputs: []inputInfo{
15438 {0, 4294901760},
15439 {1, 4294901760},
15440 },
15441 outputs: []outputInfo{
15442 {0, 4294901760},
15443 },
15444 },
15445 },
15446 {
15447 name: "ADDD",
15448 argLen: 2,
15449 commutative: true,
15450 asm: arm.AADDD,
15451 reg: regInfo{
15452 inputs: []inputInfo{
15453 {0, 4294901760},
15454 {1, 4294901760},
15455 },
15456 outputs: []outputInfo{
15457 {0, 4294901760},
15458 },
15459 },
15460 },
15461 {
15462 name: "SUBF",
15463 argLen: 2,
15464 asm: arm.ASUBF,
15465 reg: regInfo{
15466 inputs: []inputInfo{
15467 {0, 4294901760},
15468 {1, 4294901760},
15469 },
15470 outputs: []outputInfo{
15471 {0, 4294901760},
15472 },
15473 },
15474 },
15475 {
15476 name: "SUBD",
15477 argLen: 2,
15478 asm: arm.ASUBD,
15479 reg: regInfo{
15480 inputs: []inputInfo{
15481 {0, 4294901760},
15482 {1, 4294901760},
15483 },
15484 outputs: []outputInfo{
15485 {0, 4294901760},
15486 },
15487 },
15488 },
15489 {
15490 name: "MULF",
15491 argLen: 2,
15492 commutative: true,
15493 asm: arm.AMULF,
15494 reg: regInfo{
15495 inputs: []inputInfo{
15496 {0, 4294901760},
15497 {1, 4294901760},
15498 },
15499 outputs: []outputInfo{
15500 {0, 4294901760},
15501 },
15502 },
15503 },
15504 {
15505 name: "MULD",
15506 argLen: 2,
15507 commutative: true,
15508 asm: arm.AMULD,
15509 reg: regInfo{
15510 inputs: []inputInfo{
15511 {0, 4294901760},
15512 {1, 4294901760},
15513 },
15514 outputs: []outputInfo{
15515 {0, 4294901760},
15516 },
15517 },
15518 },
15519 {
15520 name: "NMULF",
15521 argLen: 2,
15522 commutative: true,
15523 asm: arm.ANMULF,
15524 reg: regInfo{
15525 inputs: []inputInfo{
15526 {0, 4294901760},
15527 {1, 4294901760},
15528 },
15529 outputs: []outputInfo{
15530 {0, 4294901760},
15531 },
15532 },
15533 },
15534 {
15535 name: "NMULD",
15536 argLen: 2,
15537 commutative: true,
15538 asm: arm.ANMULD,
15539 reg: regInfo{
15540 inputs: []inputInfo{
15541 {0, 4294901760},
15542 {1, 4294901760},
15543 },
15544 outputs: []outputInfo{
15545 {0, 4294901760},
15546 },
15547 },
15548 },
15549 {
15550 name: "DIVF",
15551 argLen: 2,
15552 asm: arm.ADIVF,
15553 reg: regInfo{
15554 inputs: []inputInfo{
15555 {0, 4294901760},
15556 {1, 4294901760},
15557 },
15558 outputs: []outputInfo{
15559 {0, 4294901760},
15560 },
15561 },
15562 },
15563 {
15564 name: "DIVD",
15565 argLen: 2,
15566 asm: arm.ADIVD,
15567 reg: regInfo{
15568 inputs: []inputInfo{
15569 {0, 4294901760},
15570 {1, 4294901760},
15571 },
15572 outputs: []outputInfo{
15573 {0, 4294901760},
15574 },
15575 },
15576 },
15577 {
15578 name: "MULAF",
15579 argLen: 3,
15580 resultInArg0: true,
15581 asm: arm.AMULAF,
15582 reg: regInfo{
15583 inputs: []inputInfo{
15584 {0, 4294901760},
15585 {1, 4294901760},
15586 {2, 4294901760},
15587 },
15588 outputs: []outputInfo{
15589 {0, 4294901760},
15590 },
15591 },
15592 },
15593 {
15594 name: "MULAD",
15595 argLen: 3,
15596 resultInArg0: true,
15597 asm: arm.AMULAD,
15598 reg: regInfo{
15599 inputs: []inputInfo{
15600 {0, 4294901760},
15601 {1, 4294901760},
15602 {2, 4294901760},
15603 },
15604 outputs: []outputInfo{
15605 {0, 4294901760},
15606 },
15607 },
15608 },
15609 {
15610 name: "MULSF",
15611 argLen: 3,
15612 resultInArg0: true,
15613 asm: arm.AMULSF,
15614 reg: regInfo{
15615 inputs: []inputInfo{
15616 {0, 4294901760},
15617 {1, 4294901760},
15618 {2, 4294901760},
15619 },
15620 outputs: []outputInfo{
15621 {0, 4294901760},
15622 },
15623 },
15624 },
15625 {
15626 name: "MULSD",
15627 argLen: 3,
15628 resultInArg0: true,
15629 asm: arm.AMULSD,
15630 reg: regInfo{
15631 inputs: []inputInfo{
15632 {0, 4294901760},
15633 {1, 4294901760},
15634 {2, 4294901760},
15635 },
15636 outputs: []outputInfo{
15637 {0, 4294901760},
15638 },
15639 },
15640 },
15641 {
15642 name: "FMULAD",
15643 argLen: 3,
15644 resultInArg0: true,
15645 asm: arm.AFMULAD,
15646 reg: regInfo{
15647 inputs: []inputInfo{
15648 {0, 4294901760},
15649 {1, 4294901760},
15650 {2, 4294901760},
15651 },
15652 outputs: []outputInfo{
15653 {0, 4294901760},
15654 },
15655 },
15656 },
15657 {
15658 name: "AND",
15659 argLen: 2,
15660 commutative: true,
15661 asm: arm.AAND,
15662 reg: regInfo{
15663 inputs: []inputInfo{
15664 {0, 22527},
15665 {1, 22527},
15666 },
15667 outputs: []outputInfo{
15668 {0, 21503},
15669 },
15670 },
15671 },
15672 {
15673 name: "ANDconst",
15674 auxType: auxInt32,
15675 argLen: 1,
15676 asm: arm.AAND,
15677 reg: regInfo{
15678 inputs: []inputInfo{
15679 {0, 22527},
15680 },
15681 outputs: []outputInfo{
15682 {0, 21503},
15683 },
15684 },
15685 },
15686 {
15687 name: "OR",
15688 argLen: 2,
15689 commutative: true,
15690 asm: arm.AORR,
15691 reg: regInfo{
15692 inputs: []inputInfo{
15693 {0, 22527},
15694 {1, 22527},
15695 },
15696 outputs: []outputInfo{
15697 {0, 21503},
15698 },
15699 },
15700 },
15701 {
15702 name: "ORconst",
15703 auxType: auxInt32,
15704 argLen: 1,
15705 asm: arm.AORR,
15706 reg: regInfo{
15707 inputs: []inputInfo{
15708 {0, 22527},
15709 },
15710 outputs: []outputInfo{
15711 {0, 21503},
15712 },
15713 },
15714 },
15715 {
15716 name: "XOR",
15717 argLen: 2,
15718 commutative: true,
15719 asm: arm.AEOR,
15720 reg: regInfo{
15721 inputs: []inputInfo{
15722 {0, 22527},
15723 {1, 22527},
15724 },
15725 outputs: []outputInfo{
15726 {0, 21503},
15727 },
15728 },
15729 },
15730 {
15731 name: "XORconst",
15732 auxType: auxInt32,
15733 argLen: 1,
15734 asm: arm.AEOR,
15735 reg: regInfo{
15736 inputs: []inputInfo{
15737 {0, 22527},
15738 },
15739 outputs: []outputInfo{
15740 {0, 21503},
15741 },
15742 },
15743 },
15744 {
15745 name: "BIC",
15746 argLen: 2,
15747 asm: arm.ABIC,
15748 reg: regInfo{
15749 inputs: []inputInfo{
15750 {0, 22527},
15751 {1, 22527},
15752 },
15753 outputs: []outputInfo{
15754 {0, 21503},
15755 },
15756 },
15757 },
15758 {
15759 name: "BICconst",
15760 auxType: auxInt32,
15761 argLen: 1,
15762 asm: arm.ABIC,
15763 reg: regInfo{
15764 inputs: []inputInfo{
15765 {0, 22527},
15766 },
15767 outputs: []outputInfo{
15768 {0, 21503},
15769 },
15770 },
15771 },
15772 {
15773 name: "BFX",
15774 auxType: auxInt32,
15775 argLen: 1,
15776 asm: arm.ABFX,
15777 reg: regInfo{
15778 inputs: []inputInfo{
15779 {0, 22527},
15780 },
15781 outputs: []outputInfo{
15782 {0, 21503},
15783 },
15784 },
15785 },
15786 {
15787 name: "BFXU",
15788 auxType: auxInt32,
15789 argLen: 1,
15790 asm: arm.ABFXU,
15791 reg: regInfo{
15792 inputs: []inputInfo{
15793 {0, 22527},
15794 },
15795 outputs: []outputInfo{
15796 {0, 21503},
15797 },
15798 },
15799 },
15800 {
15801 name: "MVN",
15802 argLen: 1,
15803 asm: arm.AMVN,
15804 reg: regInfo{
15805 inputs: []inputInfo{
15806 {0, 22527},
15807 },
15808 outputs: []outputInfo{
15809 {0, 21503},
15810 },
15811 },
15812 },
15813 {
15814 name: "NEGF",
15815 argLen: 1,
15816 asm: arm.ANEGF,
15817 reg: regInfo{
15818 inputs: []inputInfo{
15819 {0, 4294901760},
15820 },
15821 outputs: []outputInfo{
15822 {0, 4294901760},
15823 },
15824 },
15825 },
15826 {
15827 name: "NEGD",
15828 argLen: 1,
15829 asm: arm.ANEGD,
15830 reg: regInfo{
15831 inputs: []inputInfo{
15832 {0, 4294901760},
15833 },
15834 outputs: []outputInfo{
15835 {0, 4294901760},
15836 },
15837 },
15838 },
15839 {
15840 name: "SQRTD",
15841 argLen: 1,
15842 asm: arm.ASQRTD,
15843 reg: regInfo{
15844 inputs: []inputInfo{
15845 {0, 4294901760},
15846 },
15847 outputs: []outputInfo{
15848 {0, 4294901760},
15849 },
15850 },
15851 },
15852 {
15853 name: "SQRTF",
15854 argLen: 1,
15855 asm: arm.ASQRTF,
15856 reg: regInfo{
15857 inputs: []inputInfo{
15858 {0, 4294901760},
15859 },
15860 outputs: []outputInfo{
15861 {0, 4294901760},
15862 },
15863 },
15864 },
15865 {
15866 name: "ABSD",
15867 argLen: 1,
15868 asm: arm.AABSD,
15869 reg: regInfo{
15870 inputs: []inputInfo{
15871 {0, 4294901760},
15872 },
15873 outputs: []outputInfo{
15874 {0, 4294901760},
15875 },
15876 },
15877 },
15878 {
15879 name: "CLZ",
15880 argLen: 1,
15881 asm: arm.ACLZ,
15882 reg: regInfo{
15883 inputs: []inputInfo{
15884 {0, 22527},
15885 },
15886 outputs: []outputInfo{
15887 {0, 21503},
15888 },
15889 },
15890 },
15891 {
15892 name: "REV",
15893 argLen: 1,
15894 asm: arm.AREV,
15895 reg: regInfo{
15896 inputs: []inputInfo{
15897 {0, 22527},
15898 },
15899 outputs: []outputInfo{
15900 {0, 21503},
15901 },
15902 },
15903 },
15904 {
15905 name: "REV16",
15906 argLen: 1,
15907 asm: arm.AREV16,
15908 reg: regInfo{
15909 inputs: []inputInfo{
15910 {0, 22527},
15911 },
15912 outputs: []outputInfo{
15913 {0, 21503},
15914 },
15915 },
15916 },
15917 {
15918 name: "RBIT",
15919 argLen: 1,
15920 asm: arm.ARBIT,
15921 reg: regInfo{
15922 inputs: []inputInfo{
15923 {0, 22527},
15924 },
15925 outputs: []outputInfo{
15926 {0, 21503},
15927 },
15928 },
15929 },
15930 {
15931 name: "SLL",
15932 argLen: 2,
15933 asm: arm.ASLL,
15934 reg: regInfo{
15935 inputs: []inputInfo{
15936 {0, 22527},
15937 {1, 22527},
15938 },
15939 outputs: []outputInfo{
15940 {0, 21503},
15941 },
15942 },
15943 },
15944 {
15945 name: "SLLconst",
15946 auxType: auxInt32,
15947 argLen: 1,
15948 asm: arm.ASLL,
15949 reg: regInfo{
15950 inputs: []inputInfo{
15951 {0, 22527},
15952 },
15953 outputs: []outputInfo{
15954 {0, 21503},
15955 },
15956 },
15957 },
15958 {
15959 name: "SRL",
15960 argLen: 2,
15961 asm: arm.ASRL,
15962 reg: regInfo{
15963 inputs: []inputInfo{
15964 {0, 22527},
15965 {1, 22527},
15966 },
15967 outputs: []outputInfo{
15968 {0, 21503},
15969 },
15970 },
15971 },
15972 {
15973 name: "SRLconst",
15974 auxType: auxInt32,
15975 argLen: 1,
15976 asm: arm.ASRL,
15977 reg: regInfo{
15978 inputs: []inputInfo{
15979 {0, 22527},
15980 },
15981 outputs: []outputInfo{
15982 {0, 21503},
15983 },
15984 },
15985 },
15986 {
15987 name: "SRA",
15988 argLen: 2,
15989 asm: arm.ASRA,
15990 reg: regInfo{
15991 inputs: []inputInfo{
15992 {0, 22527},
15993 {1, 22527},
15994 },
15995 outputs: []outputInfo{
15996 {0, 21503},
15997 },
15998 },
15999 },
16000 {
16001 name: "SRAconst",
16002 auxType: auxInt32,
16003 argLen: 1,
16004 asm: arm.ASRA,
16005 reg: regInfo{
16006 inputs: []inputInfo{
16007 {0, 22527},
16008 },
16009 outputs: []outputInfo{
16010 {0, 21503},
16011 },
16012 },
16013 },
16014 {
16015 name: "SRR",
16016 argLen: 2,
16017 reg: regInfo{
16018 inputs: []inputInfo{
16019 {0, 22527},
16020 {1, 22527},
16021 },
16022 outputs: []outputInfo{
16023 {0, 21503},
16024 },
16025 },
16026 },
16027 {
16028 name: "SRRconst",
16029 auxType: auxInt32,
16030 argLen: 1,
16031 reg: regInfo{
16032 inputs: []inputInfo{
16033 {0, 22527},
16034 },
16035 outputs: []outputInfo{
16036 {0, 21503},
16037 },
16038 },
16039 },
16040 {
16041 name: "ADDshiftLL",
16042 auxType: auxInt32,
16043 argLen: 2,
16044 asm: arm.AADD,
16045 reg: regInfo{
16046 inputs: []inputInfo{
16047 {0, 22527},
16048 {1, 22527},
16049 },
16050 outputs: []outputInfo{
16051 {0, 21503},
16052 },
16053 },
16054 },
16055 {
16056 name: "ADDshiftRL",
16057 auxType: auxInt32,
16058 argLen: 2,
16059 asm: arm.AADD,
16060 reg: regInfo{
16061 inputs: []inputInfo{
16062 {0, 22527},
16063 {1, 22527},
16064 },
16065 outputs: []outputInfo{
16066 {0, 21503},
16067 },
16068 },
16069 },
16070 {
16071 name: "ADDshiftRA",
16072 auxType: auxInt32,
16073 argLen: 2,
16074 asm: arm.AADD,
16075 reg: regInfo{
16076 inputs: []inputInfo{
16077 {0, 22527},
16078 {1, 22527},
16079 },
16080 outputs: []outputInfo{
16081 {0, 21503},
16082 },
16083 },
16084 },
16085 {
16086 name: "SUBshiftLL",
16087 auxType: auxInt32,
16088 argLen: 2,
16089 asm: arm.ASUB,
16090 reg: regInfo{
16091 inputs: []inputInfo{
16092 {0, 22527},
16093 {1, 22527},
16094 },
16095 outputs: []outputInfo{
16096 {0, 21503},
16097 },
16098 },
16099 },
16100 {
16101 name: "SUBshiftRL",
16102 auxType: auxInt32,
16103 argLen: 2,
16104 asm: arm.ASUB,
16105 reg: regInfo{
16106 inputs: []inputInfo{
16107 {0, 22527},
16108 {1, 22527},
16109 },
16110 outputs: []outputInfo{
16111 {0, 21503},
16112 },
16113 },
16114 },
16115 {
16116 name: "SUBshiftRA",
16117 auxType: auxInt32,
16118 argLen: 2,
16119 asm: arm.ASUB,
16120 reg: regInfo{
16121 inputs: []inputInfo{
16122 {0, 22527},
16123 {1, 22527},
16124 },
16125 outputs: []outputInfo{
16126 {0, 21503},
16127 },
16128 },
16129 },
16130 {
16131 name: "RSBshiftLL",
16132 auxType: auxInt32,
16133 argLen: 2,
16134 asm: arm.ARSB,
16135 reg: regInfo{
16136 inputs: []inputInfo{
16137 {0, 22527},
16138 {1, 22527},
16139 },
16140 outputs: []outputInfo{
16141 {0, 21503},
16142 },
16143 },
16144 },
16145 {
16146 name: "RSBshiftRL",
16147 auxType: auxInt32,
16148 argLen: 2,
16149 asm: arm.ARSB,
16150 reg: regInfo{
16151 inputs: []inputInfo{
16152 {0, 22527},
16153 {1, 22527},
16154 },
16155 outputs: []outputInfo{
16156 {0, 21503},
16157 },
16158 },
16159 },
16160 {
16161 name: "RSBshiftRA",
16162 auxType: auxInt32,
16163 argLen: 2,
16164 asm: arm.ARSB,
16165 reg: regInfo{
16166 inputs: []inputInfo{
16167 {0, 22527},
16168 {1, 22527},
16169 },
16170 outputs: []outputInfo{
16171 {0, 21503},
16172 },
16173 },
16174 },
16175 {
16176 name: "ANDshiftLL",
16177 auxType: auxInt32,
16178 argLen: 2,
16179 asm: arm.AAND,
16180 reg: regInfo{
16181 inputs: []inputInfo{
16182 {0, 22527},
16183 {1, 22527},
16184 },
16185 outputs: []outputInfo{
16186 {0, 21503},
16187 },
16188 },
16189 },
16190 {
16191 name: "ANDshiftRL",
16192 auxType: auxInt32,
16193 argLen: 2,
16194 asm: arm.AAND,
16195 reg: regInfo{
16196 inputs: []inputInfo{
16197 {0, 22527},
16198 {1, 22527},
16199 },
16200 outputs: []outputInfo{
16201 {0, 21503},
16202 },
16203 },
16204 },
16205 {
16206 name: "ANDshiftRA",
16207 auxType: auxInt32,
16208 argLen: 2,
16209 asm: arm.AAND,
16210 reg: regInfo{
16211 inputs: []inputInfo{
16212 {0, 22527},
16213 {1, 22527},
16214 },
16215 outputs: []outputInfo{
16216 {0, 21503},
16217 },
16218 },
16219 },
16220 {
16221 name: "ORshiftLL",
16222 auxType: auxInt32,
16223 argLen: 2,
16224 asm: arm.AORR,
16225 reg: regInfo{
16226 inputs: []inputInfo{
16227 {0, 22527},
16228 {1, 22527},
16229 },
16230 outputs: []outputInfo{
16231 {0, 21503},
16232 },
16233 },
16234 },
16235 {
16236 name: "ORshiftRL",
16237 auxType: auxInt32,
16238 argLen: 2,
16239 asm: arm.AORR,
16240 reg: regInfo{
16241 inputs: []inputInfo{
16242 {0, 22527},
16243 {1, 22527},
16244 },
16245 outputs: []outputInfo{
16246 {0, 21503},
16247 },
16248 },
16249 },
16250 {
16251 name: "ORshiftRA",
16252 auxType: auxInt32,
16253 argLen: 2,
16254 asm: arm.AORR,
16255 reg: regInfo{
16256 inputs: []inputInfo{
16257 {0, 22527},
16258 {1, 22527},
16259 },
16260 outputs: []outputInfo{
16261 {0, 21503},
16262 },
16263 },
16264 },
16265 {
16266 name: "XORshiftLL",
16267 auxType: auxInt32,
16268 argLen: 2,
16269 asm: arm.AEOR,
16270 reg: regInfo{
16271 inputs: []inputInfo{
16272 {0, 22527},
16273 {1, 22527},
16274 },
16275 outputs: []outputInfo{
16276 {0, 21503},
16277 },
16278 },
16279 },
16280 {
16281 name: "XORshiftRL",
16282 auxType: auxInt32,
16283 argLen: 2,
16284 asm: arm.AEOR,
16285 reg: regInfo{
16286 inputs: []inputInfo{
16287 {0, 22527},
16288 {1, 22527},
16289 },
16290 outputs: []outputInfo{
16291 {0, 21503},
16292 },
16293 },
16294 },
16295 {
16296 name: "XORshiftRA",
16297 auxType: auxInt32,
16298 argLen: 2,
16299 asm: arm.AEOR,
16300 reg: regInfo{
16301 inputs: []inputInfo{
16302 {0, 22527},
16303 {1, 22527},
16304 },
16305 outputs: []outputInfo{
16306 {0, 21503},
16307 },
16308 },
16309 },
16310 {
16311 name: "XORshiftRR",
16312 auxType: auxInt32,
16313 argLen: 2,
16314 asm: arm.AEOR,
16315 reg: regInfo{
16316 inputs: []inputInfo{
16317 {0, 22527},
16318 {1, 22527},
16319 },
16320 outputs: []outputInfo{
16321 {0, 21503},
16322 },
16323 },
16324 },
16325 {
16326 name: "BICshiftLL",
16327 auxType: auxInt32,
16328 argLen: 2,
16329 asm: arm.ABIC,
16330 reg: regInfo{
16331 inputs: []inputInfo{
16332 {0, 22527},
16333 {1, 22527},
16334 },
16335 outputs: []outputInfo{
16336 {0, 21503},
16337 },
16338 },
16339 },
16340 {
16341 name: "BICshiftRL",
16342 auxType: auxInt32,
16343 argLen: 2,
16344 asm: arm.ABIC,
16345 reg: regInfo{
16346 inputs: []inputInfo{
16347 {0, 22527},
16348 {1, 22527},
16349 },
16350 outputs: []outputInfo{
16351 {0, 21503},
16352 },
16353 },
16354 },
16355 {
16356 name: "BICshiftRA",
16357 auxType: auxInt32,
16358 argLen: 2,
16359 asm: arm.ABIC,
16360 reg: regInfo{
16361 inputs: []inputInfo{
16362 {0, 22527},
16363 {1, 22527},
16364 },
16365 outputs: []outputInfo{
16366 {0, 21503},
16367 },
16368 },
16369 },
16370 {
16371 name: "MVNshiftLL",
16372 auxType: auxInt32,
16373 argLen: 1,
16374 asm: arm.AMVN,
16375 reg: regInfo{
16376 inputs: []inputInfo{
16377 {0, 22527},
16378 },
16379 outputs: []outputInfo{
16380 {0, 21503},
16381 },
16382 },
16383 },
16384 {
16385 name: "MVNshiftRL",
16386 auxType: auxInt32,
16387 argLen: 1,
16388 asm: arm.AMVN,
16389 reg: regInfo{
16390 inputs: []inputInfo{
16391 {0, 22527},
16392 },
16393 outputs: []outputInfo{
16394 {0, 21503},
16395 },
16396 },
16397 },
16398 {
16399 name: "MVNshiftRA",
16400 auxType: auxInt32,
16401 argLen: 1,
16402 asm: arm.AMVN,
16403 reg: regInfo{
16404 inputs: []inputInfo{
16405 {0, 22527},
16406 },
16407 outputs: []outputInfo{
16408 {0, 21503},
16409 },
16410 },
16411 },
16412 {
16413 name: "ADCshiftLL",
16414 auxType: auxInt32,
16415 argLen: 3,
16416 asm: arm.AADC,
16417 reg: regInfo{
16418 inputs: []inputInfo{
16419 {0, 21503},
16420 {1, 21503},
16421 },
16422 outputs: []outputInfo{
16423 {0, 21503},
16424 },
16425 },
16426 },
16427 {
16428 name: "ADCshiftRL",
16429 auxType: auxInt32,
16430 argLen: 3,
16431 asm: arm.AADC,
16432 reg: regInfo{
16433 inputs: []inputInfo{
16434 {0, 21503},
16435 {1, 21503},
16436 },
16437 outputs: []outputInfo{
16438 {0, 21503},
16439 },
16440 },
16441 },
16442 {
16443 name: "ADCshiftRA",
16444 auxType: auxInt32,
16445 argLen: 3,
16446 asm: arm.AADC,
16447 reg: regInfo{
16448 inputs: []inputInfo{
16449 {0, 21503},
16450 {1, 21503},
16451 },
16452 outputs: []outputInfo{
16453 {0, 21503},
16454 },
16455 },
16456 },
16457 {
16458 name: "SBCshiftLL",
16459 auxType: auxInt32,
16460 argLen: 3,
16461 asm: arm.ASBC,
16462 reg: regInfo{
16463 inputs: []inputInfo{
16464 {0, 21503},
16465 {1, 21503},
16466 },
16467 outputs: []outputInfo{
16468 {0, 21503},
16469 },
16470 },
16471 },
16472 {
16473 name: "SBCshiftRL",
16474 auxType: auxInt32,
16475 argLen: 3,
16476 asm: arm.ASBC,
16477 reg: regInfo{
16478 inputs: []inputInfo{
16479 {0, 21503},
16480 {1, 21503},
16481 },
16482 outputs: []outputInfo{
16483 {0, 21503},
16484 },
16485 },
16486 },
16487 {
16488 name: "SBCshiftRA",
16489 auxType: auxInt32,
16490 argLen: 3,
16491 asm: arm.ASBC,
16492 reg: regInfo{
16493 inputs: []inputInfo{
16494 {0, 21503},
16495 {1, 21503},
16496 },
16497 outputs: []outputInfo{
16498 {0, 21503},
16499 },
16500 },
16501 },
16502 {
16503 name: "RSCshiftLL",
16504 auxType: auxInt32,
16505 argLen: 3,
16506 asm: arm.ARSC,
16507 reg: regInfo{
16508 inputs: []inputInfo{
16509 {0, 21503},
16510 {1, 21503},
16511 },
16512 outputs: []outputInfo{
16513 {0, 21503},
16514 },
16515 },
16516 },
16517 {
16518 name: "RSCshiftRL",
16519 auxType: auxInt32,
16520 argLen: 3,
16521 asm: arm.ARSC,
16522 reg: regInfo{
16523 inputs: []inputInfo{
16524 {0, 21503},
16525 {1, 21503},
16526 },
16527 outputs: []outputInfo{
16528 {0, 21503},
16529 },
16530 },
16531 },
16532 {
16533 name: "RSCshiftRA",
16534 auxType: auxInt32,
16535 argLen: 3,
16536 asm: arm.ARSC,
16537 reg: regInfo{
16538 inputs: []inputInfo{
16539 {0, 21503},
16540 {1, 21503},
16541 },
16542 outputs: []outputInfo{
16543 {0, 21503},
16544 },
16545 },
16546 },
16547 {
16548 name: "ADDSshiftLL",
16549 auxType: auxInt32,
16550 argLen: 2,
16551 asm: arm.AADD,
16552 reg: regInfo{
16553 inputs: []inputInfo{
16554 {0, 22527},
16555 {1, 22527},
16556 },
16557 outputs: []outputInfo{
16558 {1, 0},
16559 {0, 21503},
16560 },
16561 },
16562 },
16563 {
16564 name: "ADDSshiftRL",
16565 auxType: auxInt32,
16566 argLen: 2,
16567 asm: arm.AADD,
16568 reg: regInfo{
16569 inputs: []inputInfo{
16570 {0, 22527},
16571 {1, 22527},
16572 },
16573 outputs: []outputInfo{
16574 {1, 0},
16575 {0, 21503},
16576 },
16577 },
16578 },
16579 {
16580 name: "ADDSshiftRA",
16581 auxType: auxInt32,
16582 argLen: 2,
16583 asm: arm.AADD,
16584 reg: regInfo{
16585 inputs: []inputInfo{
16586 {0, 22527},
16587 {1, 22527},
16588 },
16589 outputs: []outputInfo{
16590 {1, 0},
16591 {0, 21503},
16592 },
16593 },
16594 },
16595 {
16596 name: "SUBSshiftLL",
16597 auxType: auxInt32,
16598 argLen: 2,
16599 asm: arm.ASUB,
16600 reg: regInfo{
16601 inputs: []inputInfo{
16602 {0, 22527},
16603 {1, 22527},
16604 },
16605 outputs: []outputInfo{
16606 {1, 0},
16607 {0, 21503},
16608 },
16609 },
16610 },
16611 {
16612 name: "SUBSshiftRL",
16613 auxType: auxInt32,
16614 argLen: 2,
16615 asm: arm.ASUB,
16616 reg: regInfo{
16617 inputs: []inputInfo{
16618 {0, 22527},
16619 {1, 22527},
16620 },
16621 outputs: []outputInfo{
16622 {1, 0},
16623 {0, 21503},
16624 },
16625 },
16626 },
16627 {
16628 name: "SUBSshiftRA",
16629 auxType: auxInt32,
16630 argLen: 2,
16631 asm: arm.ASUB,
16632 reg: regInfo{
16633 inputs: []inputInfo{
16634 {0, 22527},
16635 {1, 22527},
16636 },
16637 outputs: []outputInfo{
16638 {1, 0},
16639 {0, 21503},
16640 },
16641 },
16642 },
16643 {
16644 name: "RSBSshiftLL",
16645 auxType: auxInt32,
16646 argLen: 2,
16647 asm: arm.ARSB,
16648 reg: regInfo{
16649 inputs: []inputInfo{
16650 {0, 22527},
16651 {1, 22527},
16652 },
16653 outputs: []outputInfo{
16654 {1, 0},
16655 {0, 21503},
16656 },
16657 },
16658 },
16659 {
16660 name: "RSBSshiftRL",
16661 auxType: auxInt32,
16662 argLen: 2,
16663 asm: arm.ARSB,
16664 reg: regInfo{
16665 inputs: []inputInfo{
16666 {0, 22527},
16667 {1, 22527},
16668 },
16669 outputs: []outputInfo{
16670 {1, 0},
16671 {0, 21503},
16672 },
16673 },
16674 },
16675 {
16676 name: "RSBSshiftRA",
16677 auxType: auxInt32,
16678 argLen: 2,
16679 asm: arm.ARSB,
16680 reg: regInfo{
16681 inputs: []inputInfo{
16682 {0, 22527},
16683 {1, 22527},
16684 },
16685 outputs: []outputInfo{
16686 {1, 0},
16687 {0, 21503},
16688 },
16689 },
16690 },
16691 {
16692 name: "ADDshiftLLreg",
16693 argLen: 3,
16694 asm: arm.AADD,
16695 reg: regInfo{
16696 inputs: []inputInfo{
16697 {0, 21503},
16698 {1, 21503},
16699 {2, 21503},
16700 },
16701 outputs: []outputInfo{
16702 {0, 21503},
16703 },
16704 },
16705 },
16706 {
16707 name: "ADDshiftRLreg",
16708 argLen: 3,
16709 asm: arm.AADD,
16710 reg: regInfo{
16711 inputs: []inputInfo{
16712 {0, 21503},
16713 {1, 21503},
16714 {2, 21503},
16715 },
16716 outputs: []outputInfo{
16717 {0, 21503},
16718 },
16719 },
16720 },
16721 {
16722 name: "ADDshiftRAreg",
16723 argLen: 3,
16724 asm: arm.AADD,
16725 reg: regInfo{
16726 inputs: []inputInfo{
16727 {0, 21503},
16728 {1, 21503},
16729 {2, 21503},
16730 },
16731 outputs: []outputInfo{
16732 {0, 21503},
16733 },
16734 },
16735 },
16736 {
16737 name: "SUBshiftLLreg",
16738 argLen: 3,
16739 asm: arm.ASUB,
16740 reg: regInfo{
16741 inputs: []inputInfo{
16742 {0, 21503},
16743 {1, 21503},
16744 {2, 21503},
16745 },
16746 outputs: []outputInfo{
16747 {0, 21503},
16748 },
16749 },
16750 },
16751 {
16752 name: "SUBshiftRLreg",
16753 argLen: 3,
16754 asm: arm.ASUB,
16755 reg: regInfo{
16756 inputs: []inputInfo{
16757 {0, 21503},
16758 {1, 21503},
16759 {2, 21503},
16760 },
16761 outputs: []outputInfo{
16762 {0, 21503},
16763 },
16764 },
16765 },
16766 {
16767 name: "SUBshiftRAreg",
16768 argLen: 3,
16769 asm: arm.ASUB,
16770 reg: regInfo{
16771 inputs: []inputInfo{
16772 {0, 21503},
16773 {1, 21503},
16774 {2, 21503},
16775 },
16776 outputs: []outputInfo{
16777 {0, 21503},
16778 },
16779 },
16780 },
16781 {
16782 name: "RSBshiftLLreg",
16783 argLen: 3,
16784 asm: arm.ARSB,
16785 reg: regInfo{
16786 inputs: []inputInfo{
16787 {0, 21503},
16788 {1, 21503},
16789 {2, 21503},
16790 },
16791 outputs: []outputInfo{
16792 {0, 21503},
16793 },
16794 },
16795 },
16796 {
16797 name: "RSBshiftRLreg",
16798 argLen: 3,
16799 asm: arm.ARSB,
16800 reg: regInfo{
16801 inputs: []inputInfo{
16802 {0, 21503},
16803 {1, 21503},
16804 {2, 21503},
16805 },
16806 outputs: []outputInfo{
16807 {0, 21503},
16808 },
16809 },
16810 },
16811 {
16812 name: "RSBshiftRAreg",
16813 argLen: 3,
16814 asm: arm.ARSB,
16815 reg: regInfo{
16816 inputs: []inputInfo{
16817 {0, 21503},
16818 {1, 21503},
16819 {2, 21503},
16820 },
16821 outputs: []outputInfo{
16822 {0, 21503},
16823 },
16824 },
16825 },
16826 {
16827 name: "ANDshiftLLreg",
16828 argLen: 3,
16829 asm: arm.AAND,
16830 reg: regInfo{
16831 inputs: []inputInfo{
16832 {0, 21503},
16833 {1, 21503},
16834 {2, 21503},
16835 },
16836 outputs: []outputInfo{
16837 {0, 21503},
16838 },
16839 },
16840 },
16841 {
16842 name: "ANDshiftRLreg",
16843 argLen: 3,
16844 asm: arm.AAND,
16845 reg: regInfo{
16846 inputs: []inputInfo{
16847 {0, 21503},
16848 {1, 21503},
16849 {2, 21503},
16850 },
16851 outputs: []outputInfo{
16852 {0, 21503},
16853 },
16854 },
16855 },
16856 {
16857 name: "ANDshiftRAreg",
16858 argLen: 3,
16859 asm: arm.AAND,
16860 reg: regInfo{
16861 inputs: []inputInfo{
16862 {0, 21503},
16863 {1, 21503},
16864 {2, 21503},
16865 },
16866 outputs: []outputInfo{
16867 {0, 21503},
16868 },
16869 },
16870 },
16871 {
16872 name: "ORshiftLLreg",
16873 argLen: 3,
16874 asm: arm.AORR,
16875 reg: regInfo{
16876 inputs: []inputInfo{
16877 {0, 21503},
16878 {1, 21503},
16879 {2, 21503},
16880 },
16881 outputs: []outputInfo{
16882 {0, 21503},
16883 },
16884 },
16885 },
16886 {
16887 name: "ORshiftRLreg",
16888 argLen: 3,
16889 asm: arm.AORR,
16890 reg: regInfo{
16891 inputs: []inputInfo{
16892 {0, 21503},
16893 {1, 21503},
16894 {2, 21503},
16895 },
16896 outputs: []outputInfo{
16897 {0, 21503},
16898 },
16899 },
16900 },
16901 {
16902 name: "ORshiftRAreg",
16903 argLen: 3,
16904 asm: arm.AORR,
16905 reg: regInfo{
16906 inputs: []inputInfo{
16907 {0, 21503},
16908 {1, 21503},
16909 {2, 21503},
16910 },
16911 outputs: []outputInfo{
16912 {0, 21503},
16913 },
16914 },
16915 },
16916 {
16917 name: "XORshiftLLreg",
16918 argLen: 3,
16919 asm: arm.AEOR,
16920 reg: regInfo{
16921 inputs: []inputInfo{
16922 {0, 21503},
16923 {1, 21503},
16924 {2, 21503},
16925 },
16926 outputs: []outputInfo{
16927 {0, 21503},
16928 },
16929 },
16930 },
16931 {
16932 name: "XORshiftRLreg",
16933 argLen: 3,
16934 asm: arm.AEOR,
16935 reg: regInfo{
16936 inputs: []inputInfo{
16937 {0, 21503},
16938 {1, 21503},
16939 {2, 21503},
16940 },
16941 outputs: []outputInfo{
16942 {0, 21503},
16943 },
16944 },
16945 },
16946 {
16947 name: "XORshiftRAreg",
16948 argLen: 3,
16949 asm: arm.AEOR,
16950 reg: regInfo{
16951 inputs: []inputInfo{
16952 {0, 21503},
16953 {1, 21503},
16954 {2, 21503},
16955 },
16956 outputs: []outputInfo{
16957 {0, 21503},
16958 },
16959 },
16960 },
16961 {
16962 name: "BICshiftLLreg",
16963 argLen: 3,
16964 asm: arm.ABIC,
16965 reg: regInfo{
16966 inputs: []inputInfo{
16967 {0, 21503},
16968 {1, 21503},
16969 {2, 21503},
16970 },
16971 outputs: []outputInfo{
16972 {0, 21503},
16973 },
16974 },
16975 },
16976 {
16977 name: "BICshiftRLreg",
16978 argLen: 3,
16979 asm: arm.ABIC,
16980 reg: regInfo{
16981 inputs: []inputInfo{
16982 {0, 21503},
16983 {1, 21503},
16984 {2, 21503},
16985 },
16986 outputs: []outputInfo{
16987 {0, 21503},
16988 },
16989 },
16990 },
16991 {
16992 name: "BICshiftRAreg",
16993 argLen: 3,
16994 asm: arm.ABIC,
16995 reg: regInfo{
16996 inputs: []inputInfo{
16997 {0, 21503},
16998 {1, 21503},
16999 {2, 21503},
17000 },
17001 outputs: []outputInfo{
17002 {0, 21503},
17003 },
17004 },
17005 },
17006 {
17007 name: "MVNshiftLLreg",
17008 argLen: 2,
17009 asm: arm.AMVN,
17010 reg: regInfo{
17011 inputs: []inputInfo{
17012 {0, 22527},
17013 {1, 22527},
17014 },
17015 outputs: []outputInfo{
17016 {0, 21503},
17017 },
17018 },
17019 },
17020 {
17021 name: "MVNshiftRLreg",
17022 argLen: 2,
17023 asm: arm.AMVN,
17024 reg: regInfo{
17025 inputs: []inputInfo{
17026 {0, 22527},
17027 {1, 22527},
17028 },
17029 outputs: []outputInfo{
17030 {0, 21503},
17031 },
17032 },
17033 },
17034 {
17035 name: "MVNshiftRAreg",
17036 argLen: 2,
17037 asm: arm.AMVN,
17038 reg: regInfo{
17039 inputs: []inputInfo{
17040 {0, 22527},
17041 {1, 22527},
17042 },
17043 outputs: []outputInfo{
17044 {0, 21503},
17045 },
17046 },
17047 },
17048 {
17049 name: "ADCshiftLLreg",
17050 argLen: 4,
17051 asm: arm.AADC,
17052 reg: regInfo{
17053 inputs: []inputInfo{
17054 {0, 21503},
17055 {1, 21503},
17056 {2, 21503},
17057 },
17058 outputs: []outputInfo{
17059 {0, 21503},
17060 },
17061 },
17062 },
17063 {
17064 name: "ADCshiftRLreg",
17065 argLen: 4,
17066 asm: arm.AADC,
17067 reg: regInfo{
17068 inputs: []inputInfo{
17069 {0, 21503},
17070 {1, 21503},
17071 {2, 21503},
17072 },
17073 outputs: []outputInfo{
17074 {0, 21503},
17075 },
17076 },
17077 },
17078 {
17079 name: "ADCshiftRAreg",
17080 argLen: 4,
17081 asm: arm.AADC,
17082 reg: regInfo{
17083 inputs: []inputInfo{
17084 {0, 21503},
17085 {1, 21503},
17086 {2, 21503},
17087 },
17088 outputs: []outputInfo{
17089 {0, 21503},
17090 },
17091 },
17092 },
17093 {
17094 name: "SBCshiftLLreg",
17095 argLen: 4,
17096 asm: arm.ASBC,
17097 reg: regInfo{
17098 inputs: []inputInfo{
17099 {0, 21503},
17100 {1, 21503},
17101 {2, 21503},
17102 },
17103 outputs: []outputInfo{
17104 {0, 21503},
17105 },
17106 },
17107 },
17108 {
17109 name: "SBCshiftRLreg",
17110 argLen: 4,
17111 asm: arm.ASBC,
17112 reg: regInfo{
17113 inputs: []inputInfo{
17114 {0, 21503},
17115 {1, 21503},
17116 {2, 21503},
17117 },
17118 outputs: []outputInfo{
17119 {0, 21503},
17120 },
17121 },
17122 },
17123 {
17124 name: "SBCshiftRAreg",
17125 argLen: 4,
17126 asm: arm.ASBC,
17127 reg: regInfo{
17128 inputs: []inputInfo{
17129 {0, 21503},
17130 {1, 21503},
17131 {2, 21503},
17132 },
17133 outputs: []outputInfo{
17134 {0, 21503},
17135 },
17136 },
17137 },
17138 {
17139 name: "RSCshiftLLreg",
17140 argLen: 4,
17141 asm: arm.ARSC,
17142 reg: regInfo{
17143 inputs: []inputInfo{
17144 {0, 21503},
17145 {1, 21503},
17146 {2, 21503},
17147 },
17148 outputs: []outputInfo{
17149 {0, 21503},
17150 },
17151 },
17152 },
17153 {
17154 name: "RSCshiftRLreg",
17155 argLen: 4,
17156 asm: arm.ARSC,
17157 reg: regInfo{
17158 inputs: []inputInfo{
17159 {0, 21503},
17160 {1, 21503},
17161 {2, 21503},
17162 },
17163 outputs: []outputInfo{
17164 {0, 21503},
17165 },
17166 },
17167 },
17168 {
17169 name: "RSCshiftRAreg",
17170 argLen: 4,
17171 asm: arm.ARSC,
17172 reg: regInfo{
17173 inputs: []inputInfo{
17174 {0, 21503},
17175 {1, 21503},
17176 {2, 21503},
17177 },
17178 outputs: []outputInfo{
17179 {0, 21503},
17180 },
17181 },
17182 },
17183 {
17184 name: "ADDSshiftLLreg",
17185 argLen: 3,
17186 asm: arm.AADD,
17187 reg: regInfo{
17188 inputs: []inputInfo{
17189 {0, 21503},
17190 {1, 21503},
17191 {2, 21503},
17192 },
17193 outputs: []outputInfo{
17194 {1, 0},
17195 {0, 21503},
17196 },
17197 },
17198 },
17199 {
17200 name: "ADDSshiftRLreg",
17201 argLen: 3,
17202 asm: arm.AADD,
17203 reg: regInfo{
17204 inputs: []inputInfo{
17205 {0, 21503},
17206 {1, 21503},
17207 {2, 21503},
17208 },
17209 outputs: []outputInfo{
17210 {1, 0},
17211 {0, 21503},
17212 },
17213 },
17214 },
17215 {
17216 name: "ADDSshiftRAreg",
17217 argLen: 3,
17218 asm: arm.AADD,
17219 reg: regInfo{
17220 inputs: []inputInfo{
17221 {0, 21503},
17222 {1, 21503},
17223 {2, 21503},
17224 },
17225 outputs: []outputInfo{
17226 {1, 0},
17227 {0, 21503},
17228 },
17229 },
17230 },
17231 {
17232 name: "SUBSshiftLLreg",
17233 argLen: 3,
17234 asm: arm.ASUB,
17235 reg: regInfo{
17236 inputs: []inputInfo{
17237 {0, 21503},
17238 {1, 21503},
17239 {2, 21503},
17240 },
17241 outputs: []outputInfo{
17242 {1, 0},
17243 {0, 21503},
17244 },
17245 },
17246 },
17247 {
17248 name: "SUBSshiftRLreg",
17249 argLen: 3,
17250 asm: arm.ASUB,
17251 reg: regInfo{
17252 inputs: []inputInfo{
17253 {0, 21503},
17254 {1, 21503},
17255 {2, 21503},
17256 },
17257 outputs: []outputInfo{
17258 {1, 0},
17259 {0, 21503},
17260 },
17261 },
17262 },
17263 {
17264 name: "SUBSshiftRAreg",
17265 argLen: 3,
17266 asm: arm.ASUB,
17267 reg: regInfo{
17268 inputs: []inputInfo{
17269 {0, 21503},
17270 {1, 21503},
17271 {2, 21503},
17272 },
17273 outputs: []outputInfo{
17274 {1, 0},
17275 {0, 21503},
17276 },
17277 },
17278 },
17279 {
17280 name: "RSBSshiftLLreg",
17281 argLen: 3,
17282 asm: arm.ARSB,
17283 reg: regInfo{
17284 inputs: []inputInfo{
17285 {0, 21503},
17286 {1, 21503},
17287 {2, 21503},
17288 },
17289 outputs: []outputInfo{
17290 {1, 0},
17291 {0, 21503},
17292 },
17293 },
17294 },
17295 {
17296 name: "RSBSshiftRLreg",
17297 argLen: 3,
17298 asm: arm.ARSB,
17299 reg: regInfo{
17300 inputs: []inputInfo{
17301 {0, 21503},
17302 {1, 21503},
17303 {2, 21503},
17304 },
17305 outputs: []outputInfo{
17306 {1, 0},
17307 {0, 21503},
17308 },
17309 },
17310 },
17311 {
17312 name: "RSBSshiftRAreg",
17313 argLen: 3,
17314 asm: arm.ARSB,
17315 reg: regInfo{
17316 inputs: []inputInfo{
17317 {0, 21503},
17318 {1, 21503},
17319 {2, 21503},
17320 },
17321 outputs: []outputInfo{
17322 {1, 0},
17323 {0, 21503},
17324 },
17325 },
17326 },
17327 {
17328 name: "CMP",
17329 argLen: 2,
17330 asm: arm.ACMP,
17331 reg: regInfo{
17332 inputs: []inputInfo{
17333 {0, 22527},
17334 {1, 22527},
17335 },
17336 },
17337 },
17338 {
17339 name: "CMPconst",
17340 auxType: auxInt32,
17341 argLen: 1,
17342 asm: arm.ACMP,
17343 reg: regInfo{
17344 inputs: []inputInfo{
17345 {0, 22527},
17346 },
17347 },
17348 },
17349 {
17350 name: "CMN",
17351 argLen: 2,
17352 commutative: true,
17353 asm: arm.ACMN,
17354 reg: regInfo{
17355 inputs: []inputInfo{
17356 {0, 22527},
17357 {1, 22527},
17358 },
17359 },
17360 },
17361 {
17362 name: "CMNconst",
17363 auxType: auxInt32,
17364 argLen: 1,
17365 asm: arm.ACMN,
17366 reg: regInfo{
17367 inputs: []inputInfo{
17368 {0, 22527},
17369 },
17370 },
17371 },
17372 {
17373 name: "TST",
17374 argLen: 2,
17375 commutative: true,
17376 asm: arm.ATST,
17377 reg: regInfo{
17378 inputs: []inputInfo{
17379 {0, 22527},
17380 {1, 22527},
17381 },
17382 },
17383 },
17384 {
17385 name: "TSTconst",
17386 auxType: auxInt32,
17387 argLen: 1,
17388 asm: arm.ATST,
17389 reg: regInfo{
17390 inputs: []inputInfo{
17391 {0, 22527},
17392 },
17393 },
17394 },
17395 {
17396 name: "TEQ",
17397 argLen: 2,
17398 commutative: true,
17399 asm: arm.ATEQ,
17400 reg: regInfo{
17401 inputs: []inputInfo{
17402 {0, 22527},
17403 {1, 22527},
17404 },
17405 },
17406 },
17407 {
17408 name: "TEQconst",
17409 auxType: auxInt32,
17410 argLen: 1,
17411 asm: arm.ATEQ,
17412 reg: regInfo{
17413 inputs: []inputInfo{
17414 {0, 22527},
17415 },
17416 },
17417 },
17418 {
17419 name: "CMPF",
17420 argLen: 2,
17421 asm: arm.ACMPF,
17422 reg: regInfo{
17423 inputs: []inputInfo{
17424 {0, 4294901760},
17425 {1, 4294901760},
17426 },
17427 },
17428 },
17429 {
17430 name: "CMPD",
17431 argLen: 2,
17432 asm: arm.ACMPD,
17433 reg: regInfo{
17434 inputs: []inputInfo{
17435 {0, 4294901760},
17436 {1, 4294901760},
17437 },
17438 },
17439 },
17440 {
17441 name: "CMPshiftLL",
17442 auxType: auxInt32,
17443 argLen: 2,
17444 asm: arm.ACMP,
17445 reg: regInfo{
17446 inputs: []inputInfo{
17447 {0, 22527},
17448 {1, 22527},
17449 },
17450 },
17451 },
17452 {
17453 name: "CMPshiftRL",
17454 auxType: auxInt32,
17455 argLen: 2,
17456 asm: arm.ACMP,
17457 reg: regInfo{
17458 inputs: []inputInfo{
17459 {0, 22527},
17460 {1, 22527},
17461 },
17462 },
17463 },
17464 {
17465 name: "CMPshiftRA",
17466 auxType: auxInt32,
17467 argLen: 2,
17468 asm: arm.ACMP,
17469 reg: regInfo{
17470 inputs: []inputInfo{
17471 {0, 22527},
17472 {1, 22527},
17473 },
17474 },
17475 },
17476 {
17477 name: "CMNshiftLL",
17478 auxType: auxInt32,
17479 argLen: 2,
17480 asm: arm.ACMN,
17481 reg: regInfo{
17482 inputs: []inputInfo{
17483 {0, 22527},
17484 {1, 22527},
17485 },
17486 },
17487 },
17488 {
17489 name: "CMNshiftRL",
17490 auxType: auxInt32,
17491 argLen: 2,
17492 asm: arm.ACMN,
17493 reg: regInfo{
17494 inputs: []inputInfo{
17495 {0, 22527},
17496 {1, 22527},
17497 },
17498 },
17499 },
17500 {
17501 name: "CMNshiftRA",
17502 auxType: auxInt32,
17503 argLen: 2,
17504 asm: arm.ACMN,
17505 reg: regInfo{
17506 inputs: []inputInfo{
17507 {0, 22527},
17508 {1, 22527},
17509 },
17510 },
17511 },
17512 {
17513 name: "TSTshiftLL",
17514 auxType: auxInt32,
17515 argLen: 2,
17516 asm: arm.ATST,
17517 reg: regInfo{
17518 inputs: []inputInfo{
17519 {0, 22527},
17520 {1, 22527},
17521 },
17522 },
17523 },
17524 {
17525 name: "TSTshiftRL",
17526 auxType: auxInt32,
17527 argLen: 2,
17528 asm: arm.ATST,
17529 reg: regInfo{
17530 inputs: []inputInfo{
17531 {0, 22527},
17532 {1, 22527},
17533 },
17534 },
17535 },
17536 {
17537 name: "TSTshiftRA",
17538 auxType: auxInt32,
17539 argLen: 2,
17540 asm: arm.ATST,
17541 reg: regInfo{
17542 inputs: []inputInfo{
17543 {0, 22527},
17544 {1, 22527},
17545 },
17546 },
17547 },
17548 {
17549 name: "TEQshiftLL",
17550 auxType: auxInt32,
17551 argLen: 2,
17552 asm: arm.ATEQ,
17553 reg: regInfo{
17554 inputs: []inputInfo{
17555 {0, 22527},
17556 {1, 22527},
17557 },
17558 },
17559 },
17560 {
17561 name: "TEQshiftRL",
17562 auxType: auxInt32,
17563 argLen: 2,
17564 asm: arm.ATEQ,
17565 reg: regInfo{
17566 inputs: []inputInfo{
17567 {0, 22527},
17568 {1, 22527},
17569 },
17570 },
17571 },
17572 {
17573 name: "TEQshiftRA",
17574 auxType: auxInt32,
17575 argLen: 2,
17576 asm: arm.ATEQ,
17577 reg: regInfo{
17578 inputs: []inputInfo{
17579 {0, 22527},
17580 {1, 22527},
17581 },
17582 },
17583 },
17584 {
17585 name: "CMPshiftLLreg",
17586 argLen: 3,
17587 asm: arm.ACMP,
17588 reg: regInfo{
17589 inputs: []inputInfo{
17590 {0, 21503},
17591 {1, 21503},
17592 {2, 21503},
17593 },
17594 },
17595 },
17596 {
17597 name: "CMPshiftRLreg",
17598 argLen: 3,
17599 asm: arm.ACMP,
17600 reg: regInfo{
17601 inputs: []inputInfo{
17602 {0, 21503},
17603 {1, 21503},
17604 {2, 21503},
17605 },
17606 },
17607 },
17608 {
17609 name: "CMPshiftRAreg",
17610 argLen: 3,
17611 asm: arm.ACMP,
17612 reg: regInfo{
17613 inputs: []inputInfo{
17614 {0, 21503},
17615 {1, 21503},
17616 {2, 21503},
17617 },
17618 },
17619 },
17620 {
17621 name: "CMNshiftLLreg",
17622 argLen: 3,
17623 asm: arm.ACMN,
17624 reg: regInfo{
17625 inputs: []inputInfo{
17626 {0, 21503},
17627 {1, 21503},
17628 {2, 21503},
17629 },
17630 },
17631 },
17632 {
17633 name: "CMNshiftRLreg",
17634 argLen: 3,
17635 asm: arm.ACMN,
17636 reg: regInfo{
17637 inputs: []inputInfo{
17638 {0, 21503},
17639 {1, 21503},
17640 {2, 21503},
17641 },
17642 },
17643 },
17644 {
17645 name: "CMNshiftRAreg",
17646 argLen: 3,
17647 asm: arm.ACMN,
17648 reg: regInfo{
17649 inputs: []inputInfo{
17650 {0, 21503},
17651 {1, 21503},
17652 {2, 21503},
17653 },
17654 },
17655 },
17656 {
17657 name: "TSTshiftLLreg",
17658 argLen: 3,
17659 asm: arm.ATST,
17660 reg: regInfo{
17661 inputs: []inputInfo{
17662 {0, 21503},
17663 {1, 21503},
17664 {2, 21503},
17665 },
17666 },
17667 },
17668 {
17669 name: "TSTshiftRLreg",
17670 argLen: 3,
17671 asm: arm.ATST,
17672 reg: regInfo{
17673 inputs: []inputInfo{
17674 {0, 21503},
17675 {1, 21503},
17676 {2, 21503},
17677 },
17678 },
17679 },
17680 {
17681 name: "TSTshiftRAreg",
17682 argLen: 3,
17683 asm: arm.ATST,
17684 reg: regInfo{
17685 inputs: []inputInfo{
17686 {0, 21503},
17687 {1, 21503},
17688 {2, 21503},
17689 },
17690 },
17691 },
17692 {
17693 name: "TEQshiftLLreg",
17694 argLen: 3,
17695 asm: arm.ATEQ,
17696 reg: regInfo{
17697 inputs: []inputInfo{
17698 {0, 21503},
17699 {1, 21503},
17700 {2, 21503},
17701 },
17702 },
17703 },
17704 {
17705 name: "TEQshiftRLreg",
17706 argLen: 3,
17707 asm: arm.ATEQ,
17708 reg: regInfo{
17709 inputs: []inputInfo{
17710 {0, 21503},
17711 {1, 21503},
17712 {2, 21503},
17713 },
17714 },
17715 },
17716 {
17717 name: "TEQshiftRAreg",
17718 argLen: 3,
17719 asm: arm.ATEQ,
17720 reg: regInfo{
17721 inputs: []inputInfo{
17722 {0, 21503},
17723 {1, 21503},
17724 {2, 21503},
17725 },
17726 },
17727 },
17728 {
17729 name: "CMPF0",
17730 argLen: 1,
17731 asm: arm.ACMPF,
17732 reg: regInfo{
17733 inputs: []inputInfo{
17734 {0, 4294901760},
17735 },
17736 },
17737 },
17738 {
17739 name: "CMPD0",
17740 argLen: 1,
17741 asm: arm.ACMPD,
17742 reg: regInfo{
17743 inputs: []inputInfo{
17744 {0, 4294901760},
17745 },
17746 },
17747 },
17748 {
17749 name: "MOVWconst",
17750 auxType: auxInt32,
17751 argLen: 0,
17752 rematerializeable: true,
17753 asm: arm.AMOVW,
17754 reg: regInfo{
17755 outputs: []outputInfo{
17756 {0, 21503},
17757 },
17758 },
17759 },
17760 {
17761 name: "MOVFconst",
17762 auxType: auxFloat64,
17763 argLen: 0,
17764 rematerializeable: true,
17765 asm: arm.AMOVF,
17766 reg: regInfo{
17767 outputs: []outputInfo{
17768 {0, 4294901760},
17769 },
17770 },
17771 },
17772 {
17773 name: "MOVDconst",
17774 auxType: auxFloat64,
17775 argLen: 0,
17776 rematerializeable: true,
17777 asm: arm.AMOVD,
17778 reg: regInfo{
17779 outputs: []outputInfo{
17780 {0, 4294901760},
17781 },
17782 },
17783 },
17784 {
17785 name: "MOVWaddr",
17786 auxType: auxSymOff,
17787 argLen: 1,
17788 rematerializeable: true,
17789 symEffect: SymAddr,
17790 asm: arm.AMOVW,
17791 reg: regInfo{
17792 inputs: []inputInfo{
17793 {0, 4294975488},
17794 },
17795 outputs: []outputInfo{
17796 {0, 21503},
17797 },
17798 },
17799 },
17800 {
17801 name: "MOVBload",
17802 auxType: auxSymOff,
17803 argLen: 2,
17804 faultOnNilArg0: true,
17805 symEffect: SymRead,
17806 asm: arm.AMOVB,
17807 reg: regInfo{
17808 inputs: []inputInfo{
17809 {0, 4294998015},
17810 },
17811 outputs: []outputInfo{
17812 {0, 21503},
17813 },
17814 },
17815 },
17816 {
17817 name: "MOVBUload",
17818 auxType: auxSymOff,
17819 argLen: 2,
17820 faultOnNilArg0: true,
17821 symEffect: SymRead,
17822 asm: arm.AMOVBU,
17823 reg: regInfo{
17824 inputs: []inputInfo{
17825 {0, 4294998015},
17826 },
17827 outputs: []outputInfo{
17828 {0, 21503},
17829 },
17830 },
17831 },
17832 {
17833 name: "MOVHload",
17834 auxType: auxSymOff,
17835 argLen: 2,
17836 faultOnNilArg0: true,
17837 symEffect: SymRead,
17838 asm: arm.AMOVH,
17839 reg: regInfo{
17840 inputs: []inputInfo{
17841 {0, 4294998015},
17842 },
17843 outputs: []outputInfo{
17844 {0, 21503},
17845 },
17846 },
17847 },
17848 {
17849 name: "MOVHUload",
17850 auxType: auxSymOff,
17851 argLen: 2,
17852 faultOnNilArg0: true,
17853 symEffect: SymRead,
17854 asm: arm.AMOVHU,
17855 reg: regInfo{
17856 inputs: []inputInfo{
17857 {0, 4294998015},
17858 },
17859 outputs: []outputInfo{
17860 {0, 21503},
17861 },
17862 },
17863 },
17864 {
17865 name: "MOVWload",
17866 auxType: auxSymOff,
17867 argLen: 2,
17868 faultOnNilArg0: true,
17869 symEffect: SymRead,
17870 asm: arm.AMOVW,
17871 reg: regInfo{
17872 inputs: []inputInfo{
17873 {0, 4294998015},
17874 },
17875 outputs: []outputInfo{
17876 {0, 21503},
17877 },
17878 },
17879 },
17880 {
17881 name: "MOVFload",
17882 auxType: auxSymOff,
17883 argLen: 2,
17884 faultOnNilArg0: true,
17885 symEffect: SymRead,
17886 asm: arm.AMOVF,
17887 reg: regInfo{
17888 inputs: []inputInfo{
17889 {0, 4294998015},
17890 },
17891 outputs: []outputInfo{
17892 {0, 4294901760},
17893 },
17894 },
17895 },
17896 {
17897 name: "MOVDload",
17898 auxType: auxSymOff,
17899 argLen: 2,
17900 faultOnNilArg0: true,
17901 symEffect: SymRead,
17902 asm: arm.AMOVD,
17903 reg: regInfo{
17904 inputs: []inputInfo{
17905 {0, 4294998015},
17906 },
17907 outputs: []outputInfo{
17908 {0, 4294901760},
17909 },
17910 },
17911 },
17912 {
17913 name: "MOVBstore",
17914 auxType: auxSymOff,
17915 argLen: 3,
17916 faultOnNilArg0: true,
17917 symEffect: SymWrite,
17918 asm: arm.AMOVB,
17919 reg: regInfo{
17920 inputs: []inputInfo{
17921 {1, 22527},
17922 {0, 4294998015},
17923 },
17924 },
17925 },
17926 {
17927 name: "MOVHstore",
17928 auxType: auxSymOff,
17929 argLen: 3,
17930 faultOnNilArg0: true,
17931 symEffect: SymWrite,
17932 asm: arm.AMOVH,
17933 reg: regInfo{
17934 inputs: []inputInfo{
17935 {1, 22527},
17936 {0, 4294998015},
17937 },
17938 },
17939 },
17940 {
17941 name: "MOVWstore",
17942 auxType: auxSymOff,
17943 argLen: 3,
17944 faultOnNilArg0: true,
17945 symEffect: SymWrite,
17946 asm: arm.AMOVW,
17947 reg: regInfo{
17948 inputs: []inputInfo{
17949 {1, 22527},
17950 {0, 4294998015},
17951 },
17952 },
17953 },
17954 {
17955 name: "MOVFstore",
17956 auxType: auxSymOff,
17957 argLen: 3,
17958 faultOnNilArg0: true,
17959 symEffect: SymWrite,
17960 asm: arm.AMOVF,
17961 reg: regInfo{
17962 inputs: []inputInfo{
17963 {0, 4294998015},
17964 {1, 4294901760},
17965 },
17966 },
17967 },
17968 {
17969 name: "MOVDstore",
17970 auxType: auxSymOff,
17971 argLen: 3,
17972 faultOnNilArg0: true,
17973 symEffect: SymWrite,
17974 asm: arm.AMOVD,
17975 reg: regInfo{
17976 inputs: []inputInfo{
17977 {0, 4294998015},
17978 {1, 4294901760},
17979 },
17980 },
17981 },
17982 {
17983 name: "MOVWloadidx",
17984 argLen: 3,
17985 asm: arm.AMOVW,
17986 reg: regInfo{
17987 inputs: []inputInfo{
17988 {1, 22527},
17989 {0, 4294998015},
17990 },
17991 outputs: []outputInfo{
17992 {0, 21503},
17993 },
17994 },
17995 },
17996 {
17997 name: "MOVWloadshiftLL",
17998 auxType: auxInt32,
17999 argLen: 3,
18000 asm: arm.AMOVW,
18001 reg: regInfo{
18002 inputs: []inputInfo{
18003 {1, 22527},
18004 {0, 4294998015},
18005 },
18006 outputs: []outputInfo{
18007 {0, 21503},
18008 },
18009 },
18010 },
18011 {
18012 name: "MOVWloadshiftRL",
18013 auxType: auxInt32,
18014 argLen: 3,
18015 asm: arm.AMOVW,
18016 reg: regInfo{
18017 inputs: []inputInfo{
18018 {1, 22527},
18019 {0, 4294998015},
18020 },
18021 outputs: []outputInfo{
18022 {0, 21503},
18023 },
18024 },
18025 },
18026 {
18027 name: "MOVWloadshiftRA",
18028 auxType: auxInt32,
18029 argLen: 3,
18030 asm: arm.AMOVW,
18031 reg: regInfo{
18032 inputs: []inputInfo{
18033 {1, 22527},
18034 {0, 4294998015},
18035 },
18036 outputs: []outputInfo{
18037 {0, 21503},
18038 },
18039 },
18040 },
18041 {
18042 name: "MOVBUloadidx",
18043 argLen: 3,
18044 asm: arm.AMOVBU,
18045 reg: regInfo{
18046 inputs: []inputInfo{
18047 {1, 22527},
18048 {0, 4294998015},
18049 },
18050 outputs: []outputInfo{
18051 {0, 21503},
18052 },
18053 },
18054 },
18055 {
18056 name: "MOVBloadidx",
18057 argLen: 3,
18058 asm: arm.AMOVB,
18059 reg: regInfo{
18060 inputs: []inputInfo{
18061 {1, 22527},
18062 {0, 4294998015},
18063 },
18064 outputs: []outputInfo{
18065 {0, 21503},
18066 },
18067 },
18068 },
18069 {
18070 name: "MOVHUloadidx",
18071 argLen: 3,
18072 asm: arm.AMOVHU,
18073 reg: regInfo{
18074 inputs: []inputInfo{
18075 {1, 22527},
18076 {0, 4294998015},
18077 },
18078 outputs: []outputInfo{
18079 {0, 21503},
18080 },
18081 },
18082 },
18083 {
18084 name: "MOVHloadidx",
18085 argLen: 3,
18086 asm: arm.AMOVH,
18087 reg: regInfo{
18088 inputs: []inputInfo{
18089 {1, 22527},
18090 {0, 4294998015},
18091 },
18092 outputs: []outputInfo{
18093 {0, 21503},
18094 },
18095 },
18096 },
18097 {
18098 name: "MOVWstoreidx",
18099 argLen: 4,
18100 asm: arm.AMOVW,
18101 reg: regInfo{
18102 inputs: []inputInfo{
18103 {1, 22527},
18104 {2, 22527},
18105 {0, 4294998015},
18106 },
18107 },
18108 },
18109 {
18110 name: "MOVWstoreshiftLL",
18111 auxType: auxInt32,
18112 argLen: 4,
18113 asm: arm.AMOVW,
18114 reg: regInfo{
18115 inputs: []inputInfo{
18116 {1, 22527},
18117 {2, 22527},
18118 {0, 4294998015},
18119 },
18120 },
18121 },
18122 {
18123 name: "MOVWstoreshiftRL",
18124 auxType: auxInt32,
18125 argLen: 4,
18126 asm: arm.AMOVW,
18127 reg: regInfo{
18128 inputs: []inputInfo{
18129 {1, 22527},
18130 {2, 22527},
18131 {0, 4294998015},
18132 },
18133 },
18134 },
18135 {
18136 name: "MOVWstoreshiftRA",
18137 auxType: auxInt32,
18138 argLen: 4,
18139 asm: arm.AMOVW,
18140 reg: regInfo{
18141 inputs: []inputInfo{
18142 {1, 22527},
18143 {2, 22527},
18144 {0, 4294998015},
18145 },
18146 },
18147 },
18148 {
18149 name: "MOVBstoreidx",
18150 argLen: 4,
18151 asm: arm.AMOVB,
18152 reg: regInfo{
18153 inputs: []inputInfo{
18154 {1, 22527},
18155 {2, 22527},
18156 {0, 4294998015},
18157 },
18158 },
18159 },
18160 {
18161 name: "MOVHstoreidx",
18162 argLen: 4,
18163 asm: arm.AMOVH,
18164 reg: regInfo{
18165 inputs: []inputInfo{
18166 {1, 22527},
18167 {2, 22527},
18168 {0, 4294998015},
18169 },
18170 },
18171 },
18172 {
18173 name: "MOVBreg",
18174 argLen: 1,
18175 asm: arm.AMOVBS,
18176 reg: regInfo{
18177 inputs: []inputInfo{
18178 {0, 22527},
18179 },
18180 outputs: []outputInfo{
18181 {0, 21503},
18182 },
18183 },
18184 },
18185 {
18186 name: "MOVBUreg",
18187 argLen: 1,
18188 asm: arm.AMOVBU,
18189 reg: regInfo{
18190 inputs: []inputInfo{
18191 {0, 22527},
18192 },
18193 outputs: []outputInfo{
18194 {0, 21503},
18195 },
18196 },
18197 },
18198 {
18199 name: "MOVHreg",
18200 argLen: 1,
18201 asm: arm.AMOVHS,
18202 reg: regInfo{
18203 inputs: []inputInfo{
18204 {0, 22527},
18205 },
18206 outputs: []outputInfo{
18207 {0, 21503},
18208 },
18209 },
18210 },
18211 {
18212 name: "MOVHUreg",
18213 argLen: 1,
18214 asm: arm.AMOVHU,
18215 reg: regInfo{
18216 inputs: []inputInfo{
18217 {0, 22527},
18218 },
18219 outputs: []outputInfo{
18220 {0, 21503},
18221 },
18222 },
18223 },
18224 {
18225 name: "MOVWreg",
18226 argLen: 1,
18227 asm: arm.AMOVW,
18228 reg: regInfo{
18229 inputs: []inputInfo{
18230 {0, 22527},
18231 },
18232 outputs: []outputInfo{
18233 {0, 21503},
18234 },
18235 },
18236 },
18237 {
18238 name: "MOVWnop",
18239 argLen: 1,
18240 resultInArg0: true,
18241 reg: regInfo{
18242 inputs: []inputInfo{
18243 {0, 21503},
18244 },
18245 outputs: []outputInfo{
18246 {0, 21503},
18247 },
18248 },
18249 },
18250 {
18251 name: "MOVWF",
18252 argLen: 1,
18253 asm: arm.AMOVWF,
18254 reg: regInfo{
18255 inputs: []inputInfo{
18256 {0, 21503},
18257 },
18258 clobbers: 2147483648,
18259 outputs: []outputInfo{
18260 {0, 4294901760},
18261 },
18262 },
18263 },
18264 {
18265 name: "MOVWD",
18266 argLen: 1,
18267 asm: arm.AMOVWD,
18268 reg: regInfo{
18269 inputs: []inputInfo{
18270 {0, 21503},
18271 },
18272 clobbers: 2147483648,
18273 outputs: []outputInfo{
18274 {0, 4294901760},
18275 },
18276 },
18277 },
18278 {
18279 name: "MOVWUF",
18280 argLen: 1,
18281 asm: arm.AMOVWF,
18282 reg: regInfo{
18283 inputs: []inputInfo{
18284 {0, 21503},
18285 },
18286 clobbers: 2147483648,
18287 outputs: []outputInfo{
18288 {0, 4294901760},
18289 },
18290 },
18291 },
18292 {
18293 name: "MOVWUD",
18294 argLen: 1,
18295 asm: arm.AMOVWD,
18296 reg: regInfo{
18297 inputs: []inputInfo{
18298 {0, 21503},
18299 },
18300 clobbers: 2147483648,
18301 outputs: []outputInfo{
18302 {0, 4294901760},
18303 },
18304 },
18305 },
18306 {
18307 name: "MOVFW",
18308 argLen: 1,
18309 asm: arm.AMOVFW,
18310 reg: regInfo{
18311 inputs: []inputInfo{
18312 {0, 4294901760},
18313 },
18314 clobbers: 2147483648,
18315 outputs: []outputInfo{
18316 {0, 21503},
18317 },
18318 },
18319 },
18320 {
18321 name: "MOVDW",
18322 argLen: 1,
18323 asm: arm.AMOVDW,
18324 reg: regInfo{
18325 inputs: []inputInfo{
18326 {0, 4294901760},
18327 },
18328 clobbers: 2147483648,
18329 outputs: []outputInfo{
18330 {0, 21503},
18331 },
18332 },
18333 },
18334 {
18335 name: "MOVFWU",
18336 argLen: 1,
18337 asm: arm.AMOVFW,
18338 reg: regInfo{
18339 inputs: []inputInfo{
18340 {0, 4294901760},
18341 },
18342 clobbers: 2147483648,
18343 outputs: []outputInfo{
18344 {0, 21503},
18345 },
18346 },
18347 },
18348 {
18349 name: "MOVDWU",
18350 argLen: 1,
18351 asm: arm.AMOVDW,
18352 reg: regInfo{
18353 inputs: []inputInfo{
18354 {0, 4294901760},
18355 },
18356 clobbers: 2147483648,
18357 outputs: []outputInfo{
18358 {0, 21503},
18359 },
18360 },
18361 },
18362 {
18363 name: "MOVFD",
18364 argLen: 1,
18365 asm: arm.AMOVFD,
18366 reg: regInfo{
18367 inputs: []inputInfo{
18368 {0, 4294901760},
18369 },
18370 outputs: []outputInfo{
18371 {0, 4294901760},
18372 },
18373 },
18374 },
18375 {
18376 name: "MOVDF",
18377 argLen: 1,
18378 asm: arm.AMOVDF,
18379 reg: regInfo{
18380 inputs: []inputInfo{
18381 {0, 4294901760},
18382 },
18383 outputs: []outputInfo{
18384 {0, 4294901760},
18385 },
18386 },
18387 },
18388 {
18389 name: "CMOVWHSconst",
18390 auxType: auxInt32,
18391 argLen: 2,
18392 resultInArg0: true,
18393 asm: arm.AMOVW,
18394 reg: regInfo{
18395 inputs: []inputInfo{
18396 {0, 21503},
18397 },
18398 outputs: []outputInfo{
18399 {0, 21503},
18400 },
18401 },
18402 },
18403 {
18404 name: "CMOVWLSconst",
18405 auxType: auxInt32,
18406 argLen: 2,
18407 resultInArg0: true,
18408 asm: arm.AMOVW,
18409 reg: regInfo{
18410 inputs: []inputInfo{
18411 {0, 21503},
18412 },
18413 outputs: []outputInfo{
18414 {0, 21503},
18415 },
18416 },
18417 },
18418 {
18419 name: "SRAcond",
18420 argLen: 3,
18421 asm: arm.ASRA,
18422 reg: regInfo{
18423 inputs: []inputInfo{
18424 {0, 21503},
18425 {1, 21503},
18426 },
18427 outputs: []outputInfo{
18428 {0, 21503},
18429 },
18430 },
18431 },
18432 {
18433 name: "CALLstatic",
18434 auxType: auxCallOff,
18435 argLen: 1,
18436 clobberFlags: true,
18437 call: true,
18438 reg: regInfo{
18439 clobbers: 4294924287,
18440 },
18441 },
18442 {
18443 name: "CALLtail",
18444 auxType: auxCallOff,
18445 argLen: 1,
18446 clobberFlags: true,
18447 call: true,
18448 tailCall: true,
18449 reg: regInfo{
18450 clobbers: 4294924287,
18451 },
18452 },
18453 {
18454 name: "CALLclosure",
18455 auxType: auxCallOff,
18456 argLen: 3,
18457 clobberFlags: true,
18458 call: true,
18459 reg: regInfo{
18460 inputs: []inputInfo{
18461 {1, 128},
18462 {0, 29695},
18463 },
18464 clobbers: 4294924287,
18465 },
18466 },
18467 {
18468 name: "CALLinter",
18469 auxType: auxCallOff,
18470 argLen: 2,
18471 clobberFlags: true,
18472 call: true,
18473 reg: regInfo{
18474 inputs: []inputInfo{
18475 {0, 21503},
18476 },
18477 clobbers: 4294924287,
18478 },
18479 },
18480 {
18481 name: "LoweredNilCheck",
18482 argLen: 2,
18483 nilCheck: true,
18484 faultOnNilArg0: true,
18485 reg: regInfo{
18486 inputs: []inputInfo{
18487 {0, 22527},
18488 },
18489 },
18490 },
18491 {
18492 name: "Equal",
18493 argLen: 1,
18494 reg: regInfo{
18495 outputs: []outputInfo{
18496 {0, 21503},
18497 },
18498 },
18499 },
18500 {
18501 name: "NotEqual",
18502 argLen: 1,
18503 reg: regInfo{
18504 outputs: []outputInfo{
18505 {0, 21503},
18506 },
18507 },
18508 },
18509 {
18510 name: "LessThan",
18511 argLen: 1,
18512 reg: regInfo{
18513 outputs: []outputInfo{
18514 {0, 21503},
18515 },
18516 },
18517 },
18518 {
18519 name: "LessEqual",
18520 argLen: 1,
18521 reg: regInfo{
18522 outputs: []outputInfo{
18523 {0, 21503},
18524 },
18525 },
18526 },
18527 {
18528 name: "GreaterThan",
18529 argLen: 1,
18530 reg: regInfo{
18531 outputs: []outputInfo{
18532 {0, 21503},
18533 },
18534 },
18535 },
18536 {
18537 name: "GreaterEqual",
18538 argLen: 1,
18539 reg: regInfo{
18540 outputs: []outputInfo{
18541 {0, 21503},
18542 },
18543 },
18544 },
18545 {
18546 name: "LessThanU",
18547 argLen: 1,
18548 reg: regInfo{
18549 outputs: []outputInfo{
18550 {0, 21503},
18551 },
18552 },
18553 },
18554 {
18555 name: "LessEqualU",
18556 argLen: 1,
18557 reg: regInfo{
18558 outputs: []outputInfo{
18559 {0, 21503},
18560 },
18561 },
18562 },
18563 {
18564 name: "GreaterThanU",
18565 argLen: 1,
18566 reg: regInfo{
18567 outputs: []outputInfo{
18568 {0, 21503},
18569 },
18570 },
18571 },
18572 {
18573 name: "GreaterEqualU",
18574 argLen: 1,
18575 reg: regInfo{
18576 outputs: []outputInfo{
18577 {0, 21503},
18578 },
18579 },
18580 },
18581 {
18582 name: "DUFFZERO",
18583 auxType: auxInt64,
18584 argLen: 3,
18585 faultOnNilArg0: true,
18586 reg: regInfo{
18587 inputs: []inputInfo{
18588 {0, 2},
18589 {1, 1},
18590 },
18591 clobbers: 20482,
18592 },
18593 },
18594 {
18595 name: "DUFFCOPY",
18596 auxType: auxInt64,
18597 argLen: 3,
18598 faultOnNilArg0: true,
18599 faultOnNilArg1: true,
18600 reg: regInfo{
18601 inputs: []inputInfo{
18602 {0, 4},
18603 {1, 2},
18604 },
18605 clobbers: 20487,
18606 },
18607 },
18608 {
18609 name: "LoweredZero",
18610 auxType: auxInt64,
18611 argLen: 4,
18612 clobberFlags: true,
18613 faultOnNilArg0: true,
18614 reg: regInfo{
18615 inputs: []inputInfo{
18616 {0, 2},
18617 {1, 21503},
18618 {2, 21503},
18619 },
18620 clobbers: 2,
18621 },
18622 },
18623 {
18624 name: "LoweredMove",
18625 auxType: auxInt64,
18626 argLen: 4,
18627 clobberFlags: true,
18628 faultOnNilArg0: true,
18629 faultOnNilArg1: true,
18630 reg: regInfo{
18631 inputs: []inputInfo{
18632 {0, 4},
18633 {1, 2},
18634 {2, 21503},
18635 },
18636 clobbers: 6,
18637 },
18638 },
18639 {
18640 name: "LoweredGetClosurePtr",
18641 argLen: 0,
18642 zeroWidth: true,
18643 reg: regInfo{
18644 outputs: []outputInfo{
18645 {0, 128},
18646 },
18647 },
18648 },
18649 {
18650 name: "LoweredGetCallerSP",
18651 argLen: 1,
18652 rematerializeable: true,
18653 reg: regInfo{
18654 outputs: []outputInfo{
18655 {0, 21503},
18656 },
18657 },
18658 },
18659 {
18660 name: "LoweredGetCallerPC",
18661 argLen: 0,
18662 rematerializeable: true,
18663 reg: regInfo{
18664 outputs: []outputInfo{
18665 {0, 21503},
18666 },
18667 },
18668 },
18669 {
18670 name: "LoweredPanicBoundsA",
18671 auxType: auxInt64,
18672 argLen: 3,
18673 call: true,
18674 reg: regInfo{
18675 inputs: []inputInfo{
18676 {0, 4},
18677 {1, 8},
18678 },
18679 },
18680 },
18681 {
18682 name: "LoweredPanicBoundsB",
18683 auxType: auxInt64,
18684 argLen: 3,
18685 call: true,
18686 reg: regInfo{
18687 inputs: []inputInfo{
18688 {0, 2},
18689 {1, 4},
18690 },
18691 },
18692 },
18693 {
18694 name: "LoweredPanicBoundsC",
18695 auxType: auxInt64,
18696 argLen: 3,
18697 call: true,
18698 reg: regInfo{
18699 inputs: []inputInfo{
18700 {0, 1},
18701 {1, 2},
18702 },
18703 },
18704 },
18705 {
18706 name: "LoweredPanicExtendA",
18707 auxType: auxInt64,
18708 argLen: 4,
18709 call: true,
18710 reg: regInfo{
18711 inputs: []inputInfo{
18712 {0, 16},
18713 {1, 4},
18714 {2, 8},
18715 },
18716 },
18717 },
18718 {
18719 name: "LoweredPanicExtendB",
18720 auxType: auxInt64,
18721 argLen: 4,
18722 call: true,
18723 reg: regInfo{
18724 inputs: []inputInfo{
18725 {0, 16},
18726 {1, 2},
18727 {2, 4},
18728 },
18729 },
18730 },
18731 {
18732 name: "LoweredPanicExtendC",
18733 auxType: auxInt64,
18734 argLen: 4,
18735 call: true,
18736 reg: regInfo{
18737 inputs: []inputInfo{
18738 {0, 16},
18739 {1, 1},
18740 {2, 2},
18741 },
18742 },
18743 },
18744 {
18745 name: "FlagConstant",
18746 auxType: auxFlagConstant,
18747 argLen: 0,
18748 reg: regInfo{},
18749 },
18750 {
18751 name: "InvertFlags",
18752 argLen: 1,
18753 reg: regInfo{},
18754 },
18755 {
18756 name: "LoweredWB",
18757 auxType: auxInt64,
18758 argLen: 1,
18759 clobberFlags: true,
18760 reg: regInfo{
18761 clobbers: 4294922240,
18762 outputs: []outputInfo{
18763 {0, 256},
18764 },
18765 },
18766 },
18767
18768 {
18769 name: "ADCSflags",
18770 argLen: 3,
18771 commutative: true,
18772 asm: arm64.AADCS,
18773 reg: regInfo{
18774 inputs: []inputInfo{
18775 {0, 670826495},
18776 {1, 670826495},
18777 },
18778 outputs: []outputInfo{
18779 {1, 0},
18780 {0, 670826495},
18781 },
18782 },
18783 },
18784 {
18785 name: "ADCzerocarry",
18786 argLen: 1,
18787 asm: arm64.AADC,
18788 reg: regInfo{
18789 outputs: []outputInfo{
18790 {0, 670826495},
18791 },
18792 },
18793 },
18794 {
18795 name: "ADD",
18796 argLen: 2,
18797 commutative: true,
18798 asm: arm64.AADD,
18799 reg: regInfo{
18800 inputs: []inputInfo{
18801 {0, 805044223},
18802 {1, 805044223},
18803 },
18804 outputs: []outputInfo{
18805 {0, 670826495},
18806 },
18807 },
18808 },
18809 {
18810 name: "ADDconst",
18811 auxType: auxInt64,
18812 argLen: 1,
18813 asm: arm64.AADD,
18814 reg: regInfo{
18815 inputs: []inputInfo{
18816 {0, 1878786047},
18817 },
18818 outputs: []outputInfo{
18819 {0, 670826495},
18820 },
18821 },
18822 },
18823 {
18824 name: "ADDSconstflags",
18825 auxType: auxInt64,
18826 argLen: 1,
18827 asm: arm64.AADDS,
18828 reg: regInfo{
18829 inputs: []inputInfo{
18830 {0, 805044223},
18831 },
18832 outputs: []outputInfo{
18833 {1, 0},
18834 {0, 670826495},
18835 },
18836 },
18837 },
18838 {
18839 name: "ADDSflags",
18840 argLen: 2,
18841 commutative: true,
18842 asm: arm64.AADDS,
18843 reg: regInfo{
18844 inputs: []inputInfo{
18845 {0, 670826495},
18846 {1, 670826495},
18847 },
18848 outputs: []outputInfo{
18849 {1, 0},
18850 {0, 670826495},
18851 },
18852 },
18853 },
18854 {
18855 name: "SUB",
18856 argLen: 2,
18857 asm: arm64.ASUB,
18858 reg: regInfo{
18859 inputs: []inputInfo{
18860 {0, 805044223},
18861 {1, 805044223},
18862 },
18863 outputs: []outputInfo{
18864 {0, 670826495},
18865 },
18866 },
18867 },
18868 {
18869 name: "SUBconst",
18870 auxType: auxInt64,
18871 argLen: 1,
18872 asm: arm64.ASUB,
18873 reg: regInfo{
18874 inputs: []inputInfo{
18875 {0, 805044223},
18876 },
18877 outputs: []outputInfo{
18878 {0, 670826495},
18879 },
18880 },
18881 },
18882 {
18883 name: "SBCSflags",
18884 argLen: 3,
18885 asm: arm64.ASBCS,
18886 reg: regInfo{
18887 inputs: []inputInfo{
18888 {0, 670826495},
18889 {1, 670826495},
18890 },
18891 outputs: []outputInfo{
18892 {1, 0},
18893 {0, 670826495},
18894 },
18895 },
18896 },
18897 {
18898 name: "SUBSflags",
18899 argLen: 2,
18900 asm: arm64.ASUBS,
18901 reg: regInfo{
18902 inputs: []inputInfo{
18903 {0, 670826495},
18904 {1, 670826495},
18905 },
18906 outputs: []outputInfo{
18907 {1, 0},
18908 {0, 670826495},
18909 },
18910 },
18911 },
18912 {
18913 name: "MUL",
18914 argLen: 2,
18915 commutative: true,
18916 asm: arm64.AMUL,
18917 reg: regInfo{
18918 inputs: []inputInfo{
18919 {0, 805044223},
18920 {1, 805044223},
18921 },
18922 outputs: []outputInfo{
18923 {0, 670826495},
18924 },
18925 },
18926 },
18927 {
18928 name: "MULW",
18929 argLen: 2,
18930 commutative: true,
18931 asm: arm64.AMULW,
18932 reg: regInfo{
18933 inputs: []inputInfo{
18934 {0, 805044223},
18935 {1, 805044223},
18936 },
18937 outputs: []outputInfo{
18938 {0, 670826495},
18939 },
18940 },
18941 },
18942 {
18943 name: "MNEG",
18944 argLen: 2,
18945 commutative: true,
18946 asm: arm64.AMNEG,
18947 reg: regInfo{
18948 inputs: []inputInfo{
18949 {0, 805044223},
18950 {1, 805044223},
18951 },
18952 outputs: []outputInfo{
18953 {0, 670826495},
18954 },
18955 },
18956 },
18957 {
18958 name: "MNEGW",
18959 argLen: 2,
18960 commutative: true,
18961 asm: arm64.AMNEGW,
18962 reg: regInfo{
18963 inputs: []inputInfo{
18964 {0, 805044223},
18965 {1, 805044223},
18966 },
18967 outputs: []outputInfo{
18968 {0, 670826495},
18969 },
18970 },
18971 },
18972 {
18973 name: "MULH",
18974 argLen: 2,
18975 commutative: true,
18976 asm: arm64.ASMULH,
18977 reg: regInfo{
18978 inputs: []inputInfo{
18979 {0, 805044223},
18980 {1, 805044223},
18981 },
18982 outputs: []outputInfo{
18983 {0, 670826495},
18984 },
18985 },
18986 },
18987 {
18988 name: "UMULH",
18989 argLen: 2,
18990 commutative: true,
18991 asm: arm64.AUMULH,
18992 reg: regInfo{
18993 inputs: []inputInfo{
18994 {0, 805044223},
18995 {1, 805044223},
18996 },
18997 outputs: []outputInfo{
18998 {0, 670826495},
18999 },
19000 },
19001 },
19002 {
19003 name: "MULL",
19004 argLen: 2,
19005 commutative: true,
19006 asm: arm64.ASMULL,
19007 reg: regInfo{
19008 inputs: []inputInfo{
19009 {0, 805044223},
19010 {1, 805044223},
19011 },
19012 outputs: []outputInfo{
19013 {0, 670826495},
19014 },
19015 },
19016 },
19017 {
19018 name: "UMULL",
19019 argLen: 2,
19020 commutative: true,
19021 asm: arm64.AUMULL,
19022 reg: regInfo{
19023 inputs: []inputInfo{
19024 {0, 805044223},
19025 {1, 805044223},
19026 },
19027 outputs: []outputInfo{
19028 {0, 670826495},
19029 },
19030 },
19031 },
19032 {
19033 name: "DIV",
19034 argLen: 2,
19035 asm: arm64.ASDIV,
19036 reg: regInfo{
19037 inputs: []inputInfo{
19038 {0, 805044223},
19039 {1, 805044223},
19040 },
19041 outputs: []outputInfo{
19042 {0, 670826495},
19043 },
19044 },
19045 },
19046 {
19047 name: "UDIV",
19048 argLen: 2,
19049 asm: arm64.AUDIV,
19050 reg: regInfo{
19051 inputs: []inputInfo{
19052 {0, 805044223},
19053 {1, 805044223},
19054 },
19055 outputs: []outputInfo{
19056 {0, 670826495},
19057 },
19058 },
19059 },
19060 {
19061 name: "DIVW",
19062 argLen: 2,
19063 asm: arm64.ASDIVW,
19064 reg: regInfo{
19065 inputs: []inputInfo{
19066 {0, 805044223},
19067 {1, 805044223},
19068 },
19069 outputs: []outputInfo{
19070 {0, 670826495},
19071 },
19072 },
19073 },
19074 {
19075 name: "UDIVW",
19076 argLen: 2,
19077 asm: arm64.AUDIVW,
19078 reg: regInfo{
19079 inputs: []inputInfo{
19080 {0, 805044223},
19081 {1, 805044223},
19082 },
19083 outputs: []outputInfo{
19084 {0, 670826495},
19085 },
19086 },
19087 },
19088 {
19089 name: "MOD",
19090 argLen: 2,
19091 asm: arm64.AREM,
19092 reg: regInfo{
19093 inputs: []inputInfo{
19094 {0, 805044223},
19095 {1, 805044223},
19096 },
19097 outputs: []outputInfo{
19098 {0, 670826495},
19099 },
19100 },
19101 },
19102 {
19103 name: "UMOD",
19104 argLen: 2,
19105 asm: arm64.AUREM,
19106 reg: regInfo{
19107 inputs: []inputInfo{
19108 {0, 805044223},
19109 {1, 805044223},
19110 },
19111 outputs: []outputInfo{
19112 {0, 670826495},
19113 },
19114 },
19115 },
19116 {
19117 name: "MODW",
19118 argLen: 2,
19119 asm: arm64.AREMW,
19120 reg: regInfo{
19121 inputs: []inputInfo{
19122 {0, 805044223},
19123 {1, 805044223},
19124 },
19125 outputs: []outputInfo{
19126 {0, 670826495},
19127 },
19128 },
19129 },
19130 {
19131 name: "UMODW",
19132 argLen: 2,
19133 asm: arm64.AUREMW,
19134 reg: regInfo{
19135 inputs: []inputInfo{
19136 {0, 805044223},
19137 {1, 805044223},
19138 },
19139 outputs: []outputInfo{
19140 {0, 670826495},
19141 },
19142 },
19143 },
19144 {
19145 name: "FADDS",
19146 argLen: 2,
19147 commutative: true,
19148 asm: arm64.AFADDS,
19149 reg: regInfo{
19150 inputs: []inputInfo{
19151 {0, 9223372034707292160},
19152 {1, 9223372034707292160},
19153 },
19154 outputs: []outputInfo{
19155 {0, 9223372034707292160},
19156 },
19157 },
19158 },
19159 {
19160 name: "FADDD",
19161 argLen: 2,
19162 commutative: true,
19163 asm: arm64.AFADDD,
19164 reg: regInfo{
19165 inputs: []inputInfo{
19166 {0, 9223372034707292160},
19167 {1, 9223372034707292160},
19168 },
19169 outputs: []outputInfo{
19170 {0, 9223372034707292160},
19171 },
19172 },
19173 },
19174 {
19175 name: "FSUBS",
19176 argLen: 2,
19177 asm: arm64.AFSUBS,
19178 reg: regInfo{
19179 inputs: []inputInfo{
19180 {0, 9223372034707292160},
19181 {1, 9223372034707292160},
19182 },
19183 outputs: []outputInfo{
19184 {0, 9223372034707292160},
19185 },
19186 },
19187 },
19188 {
19189 name: "FSUBD",
19190 argLen: 2,
19191 asm: arm64.AFSUBD,
19192 reg: regInfo{
19193 inputs: []inputInfo{
19194 {0, 9223372034707292160},
19195 {1, 9223372034707292160},
19196 },
19197 outputs: []outputInfo{
19198 {0, 9223372034707292160},
19199 },
19200 },
19201 },
19202 {
19203 name: "FMULS",
19204 argLen: 2,
19205 commutative: true,
19206 asm: arm64.AFMULS,
19207 reg: regInfo{
19208 inputs: []inputInfo{
19209 {0, 9223372034707292160},
19210 {1, 9223372034707292160},
19211 },
19212 outputs: []outputInfo{
19213 {0, 9223372034707292160},
19214 },
19215 },
19216 },
19217 {
19218 name: "FMULD",
19219 argLen: 2,
19220 commutative: true,
19221 asm: arm64.AFMULD,
19222 reg: regInfo{
19223 inputs: []inputInfo{
19224 {0, 9223372034707292160},
19225 {1, 9223372034707292160},
19226 },
19227 outputs: []outputInfo{
19228 {0, 9223372034707292160},
19229 },
19230 },
19231 },
19232 {
19233 name: "FNMULS",
19234 argLen: 2,
19235 commutative: true,
19236 asm: arm64.AFNMULS,
19237 reg: regInfo{
19238 inputs: []inputInfo{
19239 {0, 9223372034707292160},
19240 {1, 9223372034707292160},
19241 },
19242 outputs: []outputInfo{
19243 {0, 9223372034707292160},
19244 },
19245 },
19246 },
19247 {
19248 name: "FNMULD",
19249 argLen: 2,
19250 commutative: true,
19251 asm: arm64.AFNMULD,
19252 reg: regInfo{
19253 inputs: []inputInfo{
19254 {0, 9223372034707292160},
19255 {1, 9223372034707292160},
19256 },
19257 outputs: []outputInfo{
19258 {0, 9223372034707292160},
19259 },
19260 },
19261 },
19262 {
19263 name: "FDIVS",
19264 argLen: 2,
19265 asm: arm64.AFDIVS,
19266 reg: regInfo{
19267 inputs: []inputInfo{
19268 {0, 9223372034707292160},
19269 {1, 9223372034707292160},
19270 },
19271 outputs: []outputInfo{
19272 {0, 9223372034707292160},
19273 },
19274 },
19275 },
19276 {
19277 name: "FDIVD",
19278 argLen: 2,
19279 asm: arm64.AFDIVD,
19280 reg: regInfo{
19281 inputs: []inputInfo{
19282 {0, 9223372034707292160},
19283 {1, 9223372034707292160},
19284 },
19285 outputs: []outputInfo{
19286 {0, 9223372034707292160},
19287 },
19288 },
19289 },
19290 {
19291 name: "AND",
19292 argLen: 2,
19293 commutative: true,
19294 asm: arm64.AAND,
19295 reg: regInfo{
19296 inputs: []inputInfo{
19297 {0, 805044223},
19298 {1, 805044223},
19299 },
19300 outputs: []outputInfo{
19301 {0, 670826495},
19302 },
19303 },
19304 },
19305 {
19306 name: "ANDconst",
19307 auxType: auxInt64,
19308 argLen: 1,
19309 asm: arm64.AAND,
19310 reg: regInfo{
19311 inputs: []inputInfo{
19312 {0, 805044223},
19313 },
19314 outputs: []outputInfo{
19315 {0, 670826495},
19316 },
19317 },
19318 },
19319 {
19320 name: "OR",
19321 argLen: 2,
19322 commutative: true,
19323 asm: arm64.AORR,
19324 reg: regInfo{
19325 inputs: []inputInfo{
19326 {0, 805044223},
19327 {1, 805044223},
19328 },
19329 outputs: []outputInfo{
19330 {0, 670826495},
19331 },
19332 },
19333 },
19334 {
19335 name: "ORconst",
19336 auxType: auxInt64,
19337 argLen: 1,
19338 asm: arm64.AORR,
19339 reg: regInfo{
19340 inputs: []inputInfo{
19341 {0, 805044223},
19342 },
19343 outputs: []outputInfo{
19344 {0, 670826495},
19345 },
19346 },
19347 },
19348 {
19349 name: "XOR",
19350 argLen: 2,
19351 commutative: true,
19352 asm: arm64.AEOR,
19353 reg: regInfo{
19354 inputs: []inputInfo{
19355 {0, 805044223},
19356 {1, 805044223},
19357 },
19358 outputs: []outputInfo{
19359 {0, 670826495},
19360 },
19361 },
19362 },
19363 {
19364 name: "XORconst",
19365 auxType: auxInt64,
19366 argLen: 1,
19367 asm: arm64.AEOR,
19368 reg: regInfo{
19369 inputs: []inputInfo{
19370 {0, 805044223},
19371 },
19372 outputs: []outputInfo{
19373 {0, 670826495},
19374 },
19375 },
19376 },
19377 {
19378 name: "BIC",
19379 argLen: 2,
19380 asm: arm64.ABIC,
19381 reg: regInfo{
19382 inputs: []inputInfo{
19383 {0, 805044223},
19384 {1, 805044223},
19385 },
19386 outputs: []outputInfo{
19387 {0, 670826495},
19388 },
19389 },
19390 },
19391 {
19392 name: "EON",
19393 argLen: 2,
19394 asm: arm64.AEON,
19395 reg: regInfo{
19396 inputs: []inputInfo{
19397 {0, 805044223},
19398 {1, 805044223},
19399 },
19400 outputs: []outputInfo{
19401 {0, 670826495},
19402 },
19403 },
19404 },
19405 {
19406 name: "ORN",
19407 argLen: 2,
19408 asm: arm64.AORN,
19409 reg: regInfo{
19410 inputs: []inputInfo{
19411 {0, 805044223},
19412 {1, 805044223},
19413 },
19414 outputs: []outputInfo{
19415 {0, 670826495},
19416 },
19417 },
19418 },
19419 {
19420 name: "MVN",
19421 argLen: 1,
19422 asm: arm64.AMVN,
19423 reg: regInfo{
19424 inputs: []inputInfo{
19425 {0, 805044223},
19426 },
19427 outputs: []outputInfo{
19428 {0, 670826495},
19429 },
19430 },
19431 },
19432 {
19433 name: "NEG",
19434 argLen: 1,
19435 asm: arm64.ANEG,
19436 reg: regInfo{
19437 inputs: []inputInfo{
19438 {0, 805044223},
19439 },
19440 outputs: []outputInfo{
19441 {0, 670826495},
19442 },
19443 },
19444 },
19445 {
19446 name: "NEGSflags",
19447 argLen: 1,
19448 asm: arm64.ANEGS,
19449 reg: regInfo{
19450 inputs: []inputInfo{
19451 {0, 805044223},
19452 },
19453 outputs: []outputInfo{
19454 {1, 0},
19455 {0, 670826495},
19456 },
19457 },
19458 },
19459 {
19460 name: "NGCzerocarry",
19461 argLen: 1,
19462 asm: arm64.ANGC,
19463 reg: regInfo{
19464 outputs: []outputInfo{
19465 {0, 670826495},
19466 },
19467 },
19468 },
19469 {
19470 name: "FABSD",
19471 argLen: 1,
19472 asm: arm64.AFABSD,
19473 reg: regInfo{
19474 inputs: []inputInfo{
19475 {0, 9223372034707292160},
19476 },
19477 outputs: []outputInfo{
19478 {0, 9223372034707292160},
19479 },
19480 },
19481 },
19482 {
19483 name: "FNEGS",
19484 argLen: 1,
19485 asm: arm64.AFNEGS,
19486 reg: regInfo{
19487 inputs: []inputInfo{
19488 {0, 9223372034707292160},
19489 },
19490 outputs: []outputInfo{
19491 {0, 9223372034707292160},
19492 },
19493 },
19494 },
19495 {
19496 name: "FNEGD",
19497 argLen: 1,
19498 asm: arm64.AFNEGD,
19499 reg: regInfo{
19500 inputs: []inputInfo{
19501 {0, 9223372034707292160},
19502 },
19503 outputs: []outputInfo{
19504 {0, 9223372034707292160},
19505 },
19506 },
19507 },
19508 {
19509 name: "FSQRTD",
19510 argLen: 1,
19511 asm: arm64.AFSQRTD,
19512 reg: regInfo{
19513 inputs: []inputInfo{
19514 {0, 9223372034707292160},
19515 },
19516 outputs: []outputInfo{
19517 {0, 9223372034707292160},
19518 },
19519 },
19520 },
19521 {
19522 name: "FSQRTS",
19523 argLen: 1,
19524 asm: arm64.AFSQRTS,
19525 reg: regInfo{
19526 inputs: []inputInfo{
19527 {0, 9223372034707292160},
19528 },
19529 outputs: []outputInfo{
19530 {0, 9223372034707292160},
19531 },
19532 },
19533 },
19534 {
19535 name: "FMIND",
19536 argLen: 2,
19537 asm: arm64.AFMIND,
19538 reg: regInfo{
19539 inputs: []inputInfo{
19540 {0, 9223372034707292160},
19541 {1, 9223372034707292160},
19542 },
19543 outputs: []outputInfo{
19544 {0, 9223372034707292160},
19545 },
19546 },
19547 },
19548 {
19549 name: "FMINS",
19550 argLen: 2,
19551 asm: arm64.AFMINS,
19552 reg: regInfo{
19553 inputs: []inputInfo{
19554 {0, 9223372034707292160},
19555 {1, 9223372034707292160},
19556 },
19557 outputs: []outputInfo{
19558 {0, 9223372034707292160},
19559 },
19560 },
19561 },
19562 {
19563 name: "FMAXD",
19564 argLen: 2,
19565 asm: arm64.AFMAXD,
19566 reg: regInfo{
19567 inputs: []inputInfo{
19568 {0, 9223372034707292160},
19569 {1, 9223372034707292160},
19570 },
19571 outputs: []outputInfo{
19572 {0, 9223372034707292160},
19573 },
19574 },
19575 },
19576 {
19577 name: "FMAXS",
19578 argLen: 2,
19579 asm: arm64.AFMAXS,
19580 reg: regInfo{
19581 inputs: []inputInfo{
19582 {0, 9223372034707292160},
19583 {1, 9223372034707292160},
19584 },
19585 outputs: []outputInfo{
19586 {0, 9223372034707292160},
19587 },
19588 },
19589 },
19590 {
19591 name: "REV",
19592 argLen: 1,
19593 asm: arm64.AREV,
19594 reg: regInfo{
19595 inputs: []inputInfo{
19596 {0, 805044223},
19597 },
19598 outputs: []outputInfo{
19599 {0, 670826495},
19600 },
19601 },
19602 },
19603 {
19604 name: "REVW",
19605 argLen: 1,
19606 asm: arm64.AREVW,
19607 reg: regInfo{
19608 inputs: []inputInfo{
19609 {0, 805044223},
19610 },
19611 outputs: []outputInfo{
19612 {0, 670826495},
19613 },
19614 },
19615 },
19616 {
19617 name: "REV16",
19618 argLen: 1,
19619 asm: arm64.AREV16,
19620 reg: regInfo{
19621 inputs: []inputInfo{
19622 {0, 805044223},
19623 },
19624 outputs: []outputInfo{
19625 {0, 670826495},
19626 },
19627 },
19628 },
19629 {
19630 name: "REV16W",
19631 argLen: 1,
19632 asm: arm64.AREV16W,
19633 reg: regInfo{
19634 inputs: []inputInfo{
19635 {0, 805044223},
19636 },
19637 outputs: []outputInfo{
19638 {0, 670826495},
19639 },
19640 },
19641 },
19642 {
19643 name: "RBIT",
19644 argLen: 1,
19645 asm: arm64.ARBIT,
19646 reg: regInfo{
19647 inputs: []inputInfo{
19648 {0, 805044223},
19649 },
19650 outputs: []outputInfo{
19651 {0, 670826495},
19652 },
19653 },
19654 },
19655 {
19656 name: "RBITW",
19657 argLen: 1,
19658 asm: arm64.ARBITW,
19659 reg: regInfo{
19660 inputs: []inputInfo{
19661 {0, 805044223},
19662 },
19663 outputs: []outputInfo{
19664 {0, 670826495},
19665 },
19666 },
19667 },
19668 {
19669 name: "CLZ",
19670 argLen: 1,
19671 asm: arm64.ACLZ,
19672 reg: regInfo{
19673 inputs: []inputInfo{
19674 {0, 805044223},
19675 },
19676 outputs: []outputInfo{
19677 {0, 670826495},
19678 },
19679 },
19680 },
19681 {
19682 name: "CLZW",
19683 argLen: 1,
19684 asm: arm64.ACLZW,
19685 reg: regInfo{
19686 inputs: []inputInfo{
19687 {0, 805044223},
19688 },
19689 outputs: []outputInfo{
19690 {0, 670826495},
19691 },
19692 },
19693 },
19694 {
19695 name: "VCNT",
19696 argLen: 1,
19697 asm: arm64.AVCNT,
19698 reg: regInfo{
19699 inputs: []inputInfo{
19700 {0, 9223372034707292160},
19701 },
19702 outputs: []outputInfo{
19703 {0, 9223372034707292160},
19704 },
19705 },
19706 },
19707 {
19708 name: "VUADDLV",
19709 argLen: 1,
19710 asm: arm64.AVUADDLV,
19711 reg: regInfo{
19712 inputs: []inputInfo{
19713 {0, 9223372034707292160},
19714 },
19715 outputs: []outputInfo{
19716 {0, 9223372034707292160},
19717 },
19718 },
19719 },
19720 {
19721 name: "LoweredRound32F",
19722 argLen: 1,
19723 resultInArg0: true,
19724 zeroWidth: true,
19725 reg: regInfo{
19726 inputs: []inputInfo{
19727 {0, 9223372034707292160},
19728 },
19729 outputs: []outputInfo{
19730 {0, 9223372034707292160},
19731 },
19732 },
19733 },
19734 {
19735 name: "LoweredRound64F",
19736 argLen: 1,
19737 resultInArg0: true,
19738 zeroWidth: true,
19739 reg: regInfo{
19740 inputs: []inputInfo{
19741 {0, 9223372034707292160},
19742 },
19743 outputs: []outputInfo{
19744 {0, 9223372034707292160},
19745 },
19746 },
19747 },
19748 {
19749 name: "FMADDS",
19750 argLen: 3,
19751 asm: arm64.AFMADDS,
19752 reg: regInfo{
19753 inputs: []inputInfo{
19754 {0, 9223372034707292160},
19755 {1, 9223372034707292160},
19756 {2, 9223372034707292160},
19757 },
19758 outputs: []outputInfo{
19759 {0, 9223372034707292160},
19760 },
19761 },
19762 },
19763 {
19764 name: "FMADDD",
19765 argLen: 3,
19766 asm: arm64.AFMADDD,
19767 reg: regInfo{
19768 inputs: []inputInfo{
19769 {0, 9223372034707292160},
19770 {1, 9223372034707292160},
19771 {2, 9223372034707292160},
19772 },
19773 outputs: []outputInfo{
19774 {0, 9223372034707292160},
19775 },
19776 },
19777 },
19778 {
19779 name: "FNMADDS",
19780 argLen: 3,
19781 asm: arm64.AFNMADDS,
19782 reg: regInfo{
19783 inputs: []inputInfo{
19784 {0, 9223372034707292160},
19785 {1, 9223372034707292160},
19786 {2, 9223372034707292160},
19787 },
19788 outputs: []outputInfo{
19789 {0, 9223372034707292160},
19790 },
19791 },
19792 },
19793 {
19794 name: "FNMADDD",
19795 argLen: 3,
19796 asm: arm64.AFNMADDD,
19797 reg: regInfo{
19798 inputs: []inputInfo{
19799 {0, 9223372034707292160},
19800 {1, 9223372034707292160},
19801 {2, 9223372034707292160},
19802 },
19803 outputs: []outputInfo{
19804 {0, 9223372034707292160},
19805 },
19806 },
19807 },
19808 {
19809 name: "FMSUBS",
19810 argLen: 3,
19811 asm: arm64.AFMSUBS,
19812 reg: regInfo{
19813 inputs: []inputInfo{
19814 {0, 9223372034707292160},
19815 {1, 9223372034707292160},
19816 {2, 9223372034707292160},
19817 },
19818 outputs: []outputInfo{
19819 {0, 9223372034707292160},
19820 },
19821 },
19822 },
19823 {
19824 name: "FMSUBD",
19825 argLen: 3,
19826 asm: arm64.AFMSUBD,
19827 reg: regInfo{
19828 inputs: []inputInfo{
19829 {0, 9223372034707292160},
19830 {1, 9223372034707292160},
19831 {2, 9223372034707292160},
19832 },
19833 outputs: []outputInfo{
19834 {0, 9223372034707292160},
19835 },
19836 },
19837 },
19838 {
19839 name: "FNMSUBS",
19840 argLen: 3,
19841 asm: arm64.AFNMSUBS,
19842 reg: regInfo{
19843 inputs: []inputInfo{
19844 {0, 9223372034707292160},
19845 {1, 9223372034707292160},
19846 {2, 9223372034707292160},
19847 },
19848 outputs: []outputInfo{
19849 {0, 9223372034707292160},
19850 },
19851 },
19852 },
19853 {
19854 name: "FNMSUBD",
19855 argLen: 3,
19856 asm: arm64.AFNMSUBD,
19857 reg: regInfo{
19858 inputs: []inputInfo{
19859 {0, 9223372034707292160},
19860 {1, 9223372034707292160},
19861 {2, 9223372034707292160},
19862 },
19863 outputs: []outputInfo{
19864 {0, 9223372034707292160},
19865 },
19866 },
19867 },
19868 {
19869 name: "MADD",
19870 argLen: 3,
19871 asm: arm64.AMADD,
19872 reg: regInfo{
19873 inputs: []inputInfo{
19874 {0, 805044223},
19875 {1, 805044223},
19876 {2, 805044223},
19877 },
19878 outputs: []outputInfo{
19879 {0, 670826495},
19880 },
19881 },
19882 },
19883 {
19884 name: "MADDW",
19885 argLen: 3,
19886 asm: arm64.AMADDW,
19887 reg: regInfo{
19888 inputs: []inputInfo{
19889 {0, 805044223},
19890 {1, 805044223},
19891 {2, 805044223},
19892 },
19893 outputs: []outputInfo{
19894 {0, 670826495},
19895 },
19896 },
19897 },
19898 {
19899 name: "MSUB",
19900 argLen: 3,
19901 asm: arm64.AMSUB,
19902 reg: regInfo{
19903 inputs: []inputInfo{
19904 {0, 805044223},
19905 {1, 805044223},
19906 {2, 805044223},
19907 },
19908 outputs: []outputInfo{
19909 {0, 670826495},
19910 },
19911 },
19912 },
19913 {
19914 name: "MSUBW",
19915 argLen: 3,
19916 asm: arm64.AMSUBW,
19917 reg: regInfo{
19918 inputs: []inputInfo{
19919 {0, 805044223},
19920 {1, 805044223},
19921 {2, 805044223},
19922 },
19923 outputs: []outputInfo{
19924 {0, 670826495},
19925 },
19926 },
19927 },
19928 {
19929 name: "SLL",
19930 argLen: 2,
19931 asm: arm64.ALSL,
19932 reg: regInfo{
19933 inputs: []inputInfo{
19934 {0, 805044223},
19935 {1, 805044223},
19936 },
19937 outputs: []outputInfo{
19938 {0, 670826495},
19939 },
19940 },
19941 },
19942 {
19943 name: "SLLconst",
19944 auxType: auxInt64,
19945 argLen: 1,
19946 asm: arm64.ALSL,
19947 reg: regInfo{
19948 inputs: []inputInfo{
19949 {0, 805044223},
19950 },
19951 outputs: []outputInfo{
19952 {0, 670826495},
19953 },
19954 },
19955 },
19956 {
19957 name: "SRL",
19958 argLen: 2,
19959 asm: arm64.ALSR,
19960 reg: regInfo{
19961 inputs: []inputInfo{
19962 {0, 805044223},
19963 {1, 805044223},
19964 },
19965 outputs: []outputInfo{
19966 {0, 670826495},
19967 },
19968 },
19969 },
19970 {
19971 name: "SRLconst",
19972 auxType: auxInt64,
19973 argLen: 1,
19974 asm: arm64.ALSR,
19975 reg: regInfo{
19976 inputs: []inputInfo{
19977 {0, 805044223},
19978 },
19979 outputs: []outputInfo{
19980 {0, 670826495},
19981 },
19982 },
19983 },
19984 {
19985 name: "SRA",
19986 argLen: 2,
19987 asm: arm64.AASR,
19988 reg: regInfo{
19989 inputs: []inputInfo{
19990 {0, 805044223},
19991 {1, 805044223},
19992 },
19993 outputs: []outputInfo{
19994 {0, 670826495},
19995 },
19996 },
19997 },
19998 {
19999 name: "SRAconst",
20000 auxType: auxInt64,
20001 argLen: 1,
20002 asm: arm64.AASR,
20003 reg: regInfo{
20004 inputs: []inputInfo{
20005 {0, 805044223},
20006 },
20007 outputs: []outputInfo{
20008 {0, 670826495},
20009 },
20010 },
20011 },
20012 {
20013 name: "ROR",
20014 argLen: 2,
20015 asm: arm64.AROR,
20016 reg: regInfo{
20017 inputs: []inputInfo{
20018 {0, 805044223},
20019 {1, 805044223},
20020 },
20021 outputs: []outputInfo{
20022 {0, 670826495},
20023 },
20024 },
20025 },
20026 {
20027 name: "RORW",
20028 argLen: 2,
20029 asm: arm64.ARORW,
20030 reg: regInfo{
20031 inputs: []inputInfo{
20032 {0, 805044223},
20033 {1, 805044223},
20034 },
20035 outputs: []outputInfo{
20036 {0, 670826495},
20037 },
20038 },
20039 },
20040 {
20041 name: "RORconst",
20042 auxType: auxInt64,
20043 argLen: 1,
20044 asm: arm64.AROR,
20045 reg: regInfo{
20046 inputs: []inputInfo{
20047 {0, 805044223},
20048 },
20049 outputs: []outputInfo{
20050 {0, 670826495},
20051 },
20052 },
20053 },
20054 {
20055 name: "RORWconst",
20056 auxType: auxInt64,
20057 argLen: 1,
20058 asm: arm64.ARORW,
20059 reg: regInfo{
20060 inputs: []inputInfo{
20061 {0, 805044223},
20062 },
20063 outputs: []outputInfo{
20064 {0, 670826495},
20065 },
20066 },
20067 },
20068 {
20069 name: "EXTRconst",
20070 auxType: auxInt64,
20071 argLen: 2,
20072 asm: arm64.AEXTR,
20073 reg: regInfo{
20074 inputs: []inputInfo{
20075 {0, 805044223},
20076 {1, 805044223},
20077 },
20078 outputs: []outputInfo{
20079 {0, 670826495},
20080 },
20081 },
20082 },
20083 {
20084 name: "EXTRWconst",
20085 auxType: auxInt64,
20086 argLen: 2,
20087 asm: arm64.AEXTRW,
20088 reg: regInfo{
20089 inputs: []inputInfo{
20090 {0, 805044223},
20091 {1, 805044223},
20092 },
20093 outputs: []outputInfo{
20094 {0, 670826495},
20095 },
20096 },
20097 },
20098 {
20099 name: "CMP",
20100 argLen: 2,
20101 asm: arm64.ACMP,
20102 reg: regInfo{
20103 inputs: []inputInfo{
20104 {0, 805044223},
20105 {1, 805044223},
20106 },
20107 },
20108 },
20109 {
20110 name: "CMPconst",
20111 auxType: auxInt64,
20112 argLen: 1,
20113 asm: arm64.ACMP,
20114 reg: regInfo{
20115 inputs: []inputInfo{
20116 {0, 805044223},
20117 },
20118 },
20119 },
20120 {
20121 name: "CMPW",
20122 argLen: 2,
20123 asm: arm64.ACMPW,
20124 reg: regInfo{
20125 inputs: []inputInfo{
20126 {0, 805044223},
20127 {1, 805044223},
20128 },
20129 },
20130 },
20131 {
20132 name: "CMPWconst",
20133 auxType: auxInt32,
20134 argLen: 1,
20135 asm: arm64.ACMPW,
20136 reg: regInfo{
20137 inputs: []inputInfo{
20138 {0, 805044223},
20139 },
20140 },
20141 },
20142 {
20143 name: "CMN",
20144 argLen: 2,
20145 commutative: true,
20146 asm: arm64.ACMN,
20147 reg: regInfo{
20148 inputs: []inputInfo{
20149 {0, 805044223},
20150 {1, 805044223},
20151 },
20152 },
20153 },
20154 {
20155 name: "CMNconst",
20156 auxType: auxInt64,
20157 argLen: 1,
20158 asm: arm64.ACMN,
20159 reg: regInfo{
20160 inputs: []inputInfo{
20161 {0, 805044223},
20162 },
20163 },
20164 },
20165 {
20166 name: "CMNW",
20167 argLen: 2,
20168 commutative: true,
20169 asm: arm64.ACMNW,
20170 reg: regInfo{
20171 inputs: []inputInfo{
20172 {0, 805044223},
20173 {1, 805044223},
20174 },
20175 },
20176 },
20177 {
20178 name: "CMNWconst",
20179 auxType: auxInt32,
20180 argLen: 1,
20181 asm: arm64.ACMNW,
20182 reg: regInfo{
20183 inputs: []inputInfo{
20184 {0, 805044223},
20185 },
20186 },
20187 },
20188 {
20189 name: "TST",
20190 argLen: 2,
20191 commutative: true,
20192 asm: arm64.ATST,
20193 reg: regInfo{
20194 inputs: []inputInfo{
20195 {0, 805044223},
20196 {1, 805044223},
20197 },
20198 },
20199 },
20200 {
20201 name: "TSTconst",
20202 auxType: auxInt64,
20203 argLen: 1,
20204 asm: arm64.ATST,
20205 reg: regInfo{
20206 inputs: []inputInfo{
20207 {0, 805044223},
20208 },
20209 },
20210 },
20211 {
20212 name: "TSTW",
20213 argLen: 2,
20214 commutative: true,
20215 asm: arm64.ATSTW,
20216 reg: regInfo{
20217 inputs: []inputInfo{
20218 {0, 805044223},
20219 {1, 805044223},
20220 },
20221 },
20222 },
20223 {
20224 name: "TSTWconst",
20225 auxType: auxInt32,
20226 argLen: 1,
20227 asm: arm64.ATSTW,
20228 reg: regInfo{
20229 inputs: []inputInfo{
20230 {0, 805044223},
20231 },
20232 },
20233 },
20234 {
20235 name: "FCMPS",
20236 argLen: 2,
20237 asm: arm64.AFCMPS,
20238 reg: regInfo{
20239 inputs: []inputInfo{
20240 {0, 9223372034707292160},
20241 {1, 9223372034707292160},
20242 },
20243 },
20244 },
20245 {
20246 name: "FCMPD",
20247 argLen: 2,
20248 asm: arm64.AFCMPD,
20249 reg: regInfo{
20250 inputs: []inputInfo{
20251 {0, 9223372034707292160},
20252 {1, 9223372034707292160},
20253 },
20254 },
20255 },
20256 {
20257 name: "FCMPS0",
20258 argLen: 1,
20259 asm: arm64.AFCMPS,
20260 reg: regInfo{
20261 inputs: []inputInfo{
20262 {0, 9223372034707292160},
20263 },
20264 },
20265 },
20266 {
20267 name: "FCMPD0",
20268 argLen: 1,
20269 asm: arm64.AFCMPD,
20270 reg: regInfo{
20271 inputs: []inputInfo{
20272 {0, 9223372034707292160},
20273 },
20274 },
20275 },
20276 {
20277 name: "MVNshiftLL",
20278 auxType: auxInt64,
20279 argLen: 1,
20280 asm: arm64.AMVN,
20281 reg: regInfo{
20282 inputs: []inputInfo{
20283 {0, 805044223},
20284 },
20285 outputs: []outputInfo{
20286 {0, 670826495},
20287 },
20288 },
20289 },
20290 {
20291 name: "MVNshiftRL",
20292 auxType: auxInt64,
20293 argLen: 1,
20294 asm: arm64.AMVN,
20295 reg: regInfo{
20296 inputs: []inputInfo{
20297 {0, 805044223},
20298 },
20299 outputs: []outputInfo{
20300 {0, 670826495},
20301 },
20302 },
20303 },
20304 {
20305 name: "MVNshiftRA",
20306 auxType: auxInt64,
20307 argLen: 1,
20308 asm: arm64.AMVN,
20309 reg: regInfo{
20310 inputs: []inputInfo{
20311 {0, 805044223},
20312 },
20313 outputs: []outputInfo{
20314 {0, 670826495},
20315 },
20316 },
20317 },
20318 {
20319 name: "MVNshiftRO",
20320 auxType: auxInt64,
20321 argLen: 1,
20322 asm: arm64.AMVN,
20323 reg: regInfo{
20324 inputs: []inputInfo{
20325 {0, 805044223},
20326 },
20327 outputs: []outputInfo{
20328 {0, 670826495},
20329 },
20330 },
20331 },
20332 {
20333 name: "NEGshiftLL",
20334 auxType: auxInt64,
20335 argLen: 1,
20336 asm: arm64.ANEG,
20337 reg: regInfo{
20338 inputs: []inputInfo{
20339 {0, 805044223},
20340 },
20341 outputs: []outputInfo{
20342 {0, 670826495},
20343 },
20344 },
20345 },
20346 {
20347 name: "NEGshiftRL",
20348 auxType: auxInt64,
20349 argLen: 1,
20350 asm: arm64.ANEG,
20351 reg: regInfo{
20352 inputs: []inputInfo{
20353 {0, 805044223},
20354 },
20355 outputs: []outputInfo{
20356 {0, 670826495},
20357 },
20358 },
20359 },
20360 {
20361 name: "NEGshiftRA",
20362 auxType: auxInt64,
20363 argLen: 1,
20364 asm: arm64.ANEG,
20365 reg: regInfo{
20366 inputs: []inputInfo{
20367 {0, 805044223},
20368 },
20369 outputs: []outputInfo{
20370 {0, 670826495},
20371 },
20372 },
20373 },
20374 {
20375 name: "ADDshiftLL",
20376 auxType: auxInt64,
20377 argLen: 2,
20378 asm: arm64.AADD,
20379 reg: regInfo{
20380 inputs: []inputInfo{
20381 {0, 805044223},
20382 {1, 805044223},
20383 },
20384 outputs: []outputInfo{
20385 {0, 670826495},
20386 },
20387 },
20388 },
20389 {
20390 name: "ADDshiftRL",
20391 auxType: auxInt64,
20392 argLen: 2,
20393 asm: arm64.AADD,
20394 reg: regInfo{
20395 inputs: []inputInfo{
20396 {0, 805044223},
20397 {1, 805044223},
20398 },
20399 outputs: []outputInfo{
20400 {0, 670826495},
20401 },
20402 },
20403 },
20404 {
20405 name: "ADDshiftRA",
20406 auxType: auxInt64,
20407 argLen: 2,
20408 asm: arm64.AADD,
20409 reg: regInfo{
20410 inputs: []inputInfo{
20411 {0, 805044223},
20412 {1, 805044223},
20413 },
20414 outputs: []outputInfo{
20415 {0, 670826495},
20416 },
20417 },
20418 },
20419 {
20420 name: "SUBshiftLL",
20421 auxType: auxInt64,
20422 argLen: 2,
20423 asm: arm64.ASUB,
20424 reg: regInfo{
20425 inputs: []inputInfo{
20426 {0, 805044223},
20427 {1, 805044223},
20428 },
20429 outputs: []outputInfo{
20430 {0, 670826495},
20431 },
20432 },
20433 },
20434 {
20435 name: "SUBshiftRL",
20436 auxType: auxInt64,
20437 argLen: 2,
20438 asm: arm64.ASUB,
20439 reg: regInfo{
20440 inputs: []inputInfo{
20441 {0, 805044223},
20442 {1, 805044223},
20443 },
20444 outputs: []outputInfo{
20445 {0, 670826495},
20446 },
20447 },
20448 },
20449 {
20450 name: "SUBshiftRA",
20451 auxType: auxInt64,
20452 argLen: 2,
20453 asm: arm64.ASUB,
20454 reg: regInfo{
20455 inputs: []inputInfo{
20456 {0, 805044223},
20457 {1, 805044223},
20458 },
20459 outputs: []outputInfo{
20460 {0, 670826495},
20461 },
20462 },
20463 },
20464 {
20465 name: "ANDshiftLL",
20466 auxType: auxInt64,
20467 argLen: 2,
20468 asm: arm64.AAND,
20469 reg: regInfo{
20470 inputs: []inputInfo{
20471 {0, 805044223},
20472 {1, 805044223},
20473 },
20474 outputs: []outputInfo{
20475 {0, 670826495},
20476 },
20477 },
20478 },
20479 {
20480 name: "ANDshiftRL",
20481 auxType: auxInt64,
20482 argLen: 2,
20483 asm: arm64.AAND,
20484 reg: regInfo{
20485 inputs: []inputInfo{
20486 {0, 805044223},
20487 {1, 805044223},
20488 },
20489 outputs: []outputInfo{
20490 {0, 670826495},
20491 },
20492 },
20493 },
20494 {
20495 name: "ANDshiftRA",
20496 auxType: auxInt64,
20497 argLen: 2,
20498 asm: arm64.AAND,
20499 reg: regInfo{
20500 inputs: []inputInfo{
20501 {0, 805044223},
20502 {1, 805044223},
20503 },
20504 outputs: []outputInfo{
20505 {0, 670826495},
20506 },
20507 },
20508 },
20509 {
20510 name: "ANDshiftRO",
20511 auxType: auxInt64,
20512 argLen: 2,
20513 asm: arm64.AAND,
20514 reg: regInfo{
20515 inputs: []inputInfo{
20516 {0, 805044223},
20517 {1, 805044223},
20518 },
20519 outputs: []outputInfo{
20520 {0, 670826495},
20521 },
20522 },
20523 },
20524 {
20525 name: "ORshiftLL",
20526 auxType: auxInt64,
20527 argLen: 2,
20528 asm: arm64.AORR,
20529 reg: regInfo{
20530 inputs: []inputInfo{
20531 {0, 805044223},
20532 {1, 805044223},
20533 },
20534 outputs: []outputInfo{
20535 {0, 670826495},
20536 },
20537 },
20538 },
20539 {
20540 name: "ORshiftRL",
20541 auxType: auxInt64,
20542 argLen: 2,
20543 asm: arm64.AORR,
20544 reg: regInfo{
20545 inputs: []inputInfo{
20546 {0, 805044223},
20547 {1, 805044223},
20548 },
20549 outputs: []outputInfo{
20550 {0, 670826495},
20551 },
20552 },
20553 },
20554 {
20555 name: "ORshiftRA",
20556 auxType: auxInt64,
20557 argLen: 2,
20558 asm: arm64.AORR,
20559 reg: regInfo{
20560 inputs: []inputInfo{
20561 {0, 805044223},
20562 {1, 805044223},
20563 },
20564 outputs: []outputInfo{
20565 {0, 670826495},
20566 },
20567 },
20568 },
20569 {
20570 name: "ORshiftRO",
20571 auxType: auxInt64,
20572 argLen: 2,
20573 asm: arm64.AORR,
20574 reg: regInfo{
20575 inputs: []inputInfo{
20576 {0, 805044223},
20577 {1, 805044223},
20578 },
20579 outputs: []outputInfo{
20580 {0, 670826495},
20581 },
20582 },
20583 },
20584 {
20585 name: "XORshiftLL",
20586 auxType: auxInt64,
20587 argLen: 2,
20588 asm: arm64.AEOR,
20589 reg: regInfo{
20590 inputs: []inputInfo{
20591 {0, 805044223},
20592 {1, 805044223},
20593 },
20594 outputs: []outputInfo{
20595 {0, 670826495},
20596 },
20597 },
20598 },
20599 {
20600 name: "XORshiftRL",
20601 auxType: auxInt64,
20602 argLen: 2,
20603 asm: arm64.AEOR,
20604 reg: regInfo{
20605 inputs: []inputInfo{
20606 {0, 805044223},
20607 {1, 805044223},
20608 },
20609 outputs: []outputInfo{
20610 {0, 670826495},
20611 },
20612 },
20613 },
20614 {
20615 name: "XORshiftRA",
20616 auxType: auxInt64,
20617 argLen: 2,
20618 asm: arm64.AEOR,
20619 reg: regInfo{
20620 inputs: []inputInfo{
20621 {0, 805044223},
20622 {1, 805044223},
20623 },
20624 outputs: []outputInfo{
20625 {0, 670826495},
20626 },
20627 },
20628 },
20629 {
20630 name: "XORshiftRO",
20631 auxType: auxInt64,
20632 argLen: 2,
20633 asm: arm64.AEOR,
20634 reg: regInfo{
20635 inputs: []inputInfo{
20636 {0, 805044223},
20637 {1, 805044223},
20638 },
20639 outputs: []outputInfo{
20640 {0, 670826495},
20641 },
20642 },
20643 },
20644 {
20645 name: "BICshiftLL",
20646 auxType: auxInt64,
20647 argLen: 2,
20648 asm: arm64.ABIC,
20649 reg: regInfo{
20650 inputs: []inputInfo{
20651 {0, 805044223},
20652 {1, 805044223},
20653 },
20654 outputs: []outputInfo{
20655 {0, 670826495},
20656 },
20657 },
20658 },
20659 {
20660 name: "BICshiftRL",
20661 auxType: auxInt64,
20662 argLen: 2,
20663 asm: arm64.ABIC,
20664 reg: regInfo{
20665 inputs: []inputInfo{
20666 {0, 805044223},
20667 {1, 805044223},
20668 },
20669 outputs: []outputInfo{
20670 {0, 670826495},
20671 },
20672 },
20673 },
20674 {
20675 name: "BICshiftRA",
20676 auxType: auxInt64,
20677 argLen: 2,
20678 asm: arm64.ABIC,
20679 reg: regInfo{
20680 inputs: []inputInfo{
20681 {0, 805044223},
20682 {1, 805044223},
20683 },
20684 outputs: []outputInfo{
20685 {0, 670826495},
20686 },
20687 },
20688 },
20689 {
20690 name: "BICshiftRO",
20691 auxType: auxInt64,
20692 argLen: 2,
20693 asm: arm64.ABIC,
20694 reg: regInfo{
20695 inputs: []inputInfo{
20696 {0, 805044223},
20697 {1, 805044223},
20698 },
20699 outputs: []outputInfo{
20700 {0, 670826495},
20701 },
20702 },
20703 },
20704 {
20705 name: "EONshiftLL",
20706 auxType: auxInt64,
20707 argLen: 2,
20708 asm: arm64.AEON,
20709 reg: regInfo{
20710 inputs: []inputInfo{
20711 {0, 805044223},
20712 {1, 805044223},
20713 },
20714 outputs: []outputInfo{
20715 {0, 670826495},
20716 },
20717 },
20718 },
20719 {
20720 name: "EONshiftRL",
20721 auxType: auxInt64,
20722 argLen: 2,
20723 asm: arm64.AEON,
20724 reg: regInfo{
20725 inputs: []inputInfo{
20726 {0, 805044223},
20727 {1, 805044223},
20728 },
20729 outputs: []outputInfo{
20730 {0, 670826495},
20731 },
20732 },
20733 },
20734 {
20735 name: "EONshiftRA",
20736 auxType: auxInt64,
20737 argLen: 2,
20738 asm: arm64.AEON,
20739 reg: regInfo{
20740 inputs: []inputInfo{
20741 {0, 805044223},
20742 {1, 805044223},
20743 },
20744 outputs: []outputInfo{
20745 {0, 670826495},
20746 },
20747 },
20748 },
20749 {
20750 name: "EONshiftRO",
20751 auxType: auxInt64,
20752 argLen: 2,
20753 asm: arm64.AEON,
20754 reg: regInfo{
20755 inputs: []inputInfo{
20756 {0, 805044223},
20757 {1, 805044223},
20758 },
20759 outputs: []outputInfo{
20760 {0, 670826495},
20761 },
20762 },
20763 },
20764 {
20765 name: "ORNshiftLL",
20766 auxType: auxInt64,
20767 argLen: 2,
20768 asm: arm64.AORN,
20769 reg: regInfo{
20770 inputs: []inputInfo{
20771 {0, 805044223},
20772 {1, 805044223},
20773 },
20774 outputs: []outputInfo{
20775 {0, 670826495},
20776 },
20777 },
20778 },
20779 {
20780 name: "ORNshiftRL",
20781 auxType: auxInt64,
20782 argLen: 2,
20783 asm: arm64.AORN,
20784 reg: regInfo{
20785 inputs: []inputInfo{
20786 {0, 805044223},
20787 {1, 805044223},
20788 },
20789 outputs: []outputInfo{
20790 {0, 670826495},
20791 },
20792 },
20793 },
20794 {
20795 name: "ORNshiftRA",
20796 auxType: auxInt64,
20797 argLen: 2,
20798 asm: arm64.AORN,
20799 reg: regInfo{
20800 inputs: []inputInfo{
20801 {0, 805044223},
20802 {1, 805044223},
20803 },
20804 outputs: []outputInfo{
20805 {0, 670826495},
20806 },
20807 },
20808 },
20809 {
20810 name: "ORNshiftRO",
20811 auxType: auxInt64,
20812 argLen: 2,
20813 asm: arm64.AORN,
20814 reg: regInfo{
20815 inputs: []inputInfo{
20816 {0, 805044223},
20817 {1, 805044223},
20818 },
20819 outputs: []outputInfo{
20820 {0, 670826495},
20821 },
20822 },
20823 },
20824 {
20825 name: "CMPshiftLL",
20826 auxType: auxInt64,
20827 argLen: 2,
20828 asm: arm64.ACMP,
20829 reg: regInfo{
20830 inputs: []inputInfo{
20831 {0, 805044223},
20832 {1, 805044223},
20833 },
20834 },
20835 },
20836 {
20837 name: "CMPshiftRL",
20838 auxType: auxInt64,
20839 argLen: 2,
20840 asm: arm64.ACMP,
20841 reg: regInfo{
20842 inputs: []inputInfo{
20843 {0, 805044223},
20844 {1, 805044223},
20845 },
20846 },
20847 },
20848 {
20849 name: "CMPshiftRA",
20850 auxType: auxInt64,
20851 argLen: 2,
20852 asm: arm64.ACMP,
20853 reg: regInfo{
20854 inputs: []inputInfo{
20855 {0, 805044223},
20856 {1, 805044223},
20857 },
20858 },
20859 },
20860 {
20861 name: "CMNshiftLL",
20862 auxType: auxInt64,
20863 argLen: 2,
20864 asm: arm64.ACMN,
20865 reg: regInfo{
20866 inputs: []inputInfo{
20867 {0, 805044223},
20868 {1, 805044223},
20869 },
20870 },
20871 },
20872 {
20873 name: "CMNshiftRL",
20874 auxType: auxInt64,
20875 argLen: 2,
20876 asm: arm64.ACMN,
20877 reg: regInfo{
20878 inputs: []inputInfo{
20879 {0, 805044223},
20880 {1, 805044223},
20881 },
20882 },
20883 },
20884 {
20885 name: "CMNshiftRA",
20886 auxType: auxInt64,
20887 argLen: 2,
20888 asm: arm64.ACMN,
20889 reg: regInfo{
20890 inputs: []inputInfo{
20891 {0, 805044223},
20892 {1, 805044223},
20893 },
20894 },
20895 },
20896 {
20897 name: "TSTshiftLL",
20898 auxType: auxInt64,
20899 argLen: 2,
20900 asm: arm64.ATST,
20901 reg: regInfo{
20902 inputs: []inputInfo{
20903 {0, 805044223},
20904 {1, 805044223},
20905 },
20906 },
20907 },
20908 {
20909 name: "TSTshiftRL",
20910 auxType: auxInt64,
20911 argLen: 2,
20912 asm: arm64.ATST,
20913 reg: regInfo{
20914 inputs: []inputInfo{
20915 {0, 805044223},
20916 {1, 805044223},
20917 },
20918 },
20919 },
20920 {
20921 name: "TSTshiftRA",
20922 auxType: auxInt64,
20923 argLen: 2,
20924 asm: arm64.ATST,
20925 reg: regInfo{
20926 inputs: []inputInfo{
20927 {0, 805044223},
20928 {1, 805044223},
20929 },
20930 },
20931 },
20932 {
20933 name: "TSTshiftRO",
20934 auxType: auxInt64,
20935 argLen: 2,
20936 asm: arm64.ATST,
20937 reg: regInfo{
20938 inputs: []inputInfo{
20939 {0, 805044223},
20940 {1, 805044223},
20941 },
20942 },
20943 },
20944 {
20945 name: "BFI",
20946 auxType: auxARM64BitField,
20947 argLen: 2,
20948 resultInArg0: true,
20949 asm: arm64.ABFI,
20950 reg: regInfo{
20951 inputs: []inputInfo{
20952 {0, 670826495},
20953 {1, 670826495},
20954 },
20955 outputs: []outputInfo{
20956 {0, 670826495},
20957 },
20958 },
20959 },
20960 {
20961 name: "BFXIL",
20962 auxType: auxARM64BitField,
20963 argLen: 2,
20964 resultInArg0: true,
20965 asm: arm64.ABFXIL,
20966 reg: regInfo{
20967 inputs: []inputInfo{
20968 {0, 670826495},
20969 {1, 670826495},
20970 },
20971 outputs: []outputInfo{
20972 {0, 670826495},
20973 },
20974 },
20975 },
20976 {
20977 name: "SBFIZ",
20978 auxType: auxARM64BitField,
20979 argLen: 1,
20980 asm: arm64.ASBFIZ,
20981 reg: regInfo{
20982 inputs: []inputInfo{
20983 {0, 805044223},
20984 },
20985 outputs: []outputInfo{
20986 {0, 670826495},
20987 },
20988 },
20989 },
20990 {
20991 name: "SBFX",
20992 auxType: auxARM64BitField,
20993 argLen: 1,
20994 asm: arm64.ASBFX,
20995 reg: regInfo{
20996 inputs: []inputInfo{
20997 {0, 805044223},
20998 },
20999 outputs: []outputInfo{
21000 {0, 670826495},
21001 },
21002 },
21003 },
21004 {
21005 name: "UBFIZ",
21006 auxType: auxARM64BitField,
21007 argLen: 1,
21008 asm: arm64.AUBFIZ,
21009 reg: regInfo{
21010 inputs: []inputInfo{
21011 {0, 805044223},
21012 },
21013 outputs: []outputInfo{
21014 {0, 670826495},
21015 },
21016 },
21017 },
21018 {
21019 name: "UBFX",
21020 auxType: auxARM64BitField,
21021 argLen: 1,
21022 asm: arm64.AUBFX,
21023 reg: regInfo{
21024 inputs: []inputInfo{
21025 {0, 805044223},
21026 },
21027 outputs: []outputInfo{
21028 {0, 670826495},
21029 },
21030 },
21031 },
21032 {
21033 name: "MOVDconst",
21034 auxType: auxInt64,
21035 argLen: 0,
21036 rematerializeable: true,
21037 asm: arm64.AMOVD,
21038 reg: regInfo{
21039 outputs: []outputInfo{
21040 {0, 670826495},
21041 },
21042 },
21043 },
21044 {
21045 name: "FMOVSconst",
21046 auxType: auxFloat64,
21047 argLen: 0,
21048 rematerializeable: true,
21049 asm: arm64.AFMOVS,
21050 reg: regInfo{
21051 outputs: []outputInfo{
21052 {0, 9223372034707292160},
21053 },
21054 },
21055 },
21056 {
21057 name: "FMOVDconst",
21058 auxType: auxFloat64,
21059 argLen: 0,
21060 rematerializeable: true,
21061 asm: arm64.AFMOVD,
21062 reg: regInfo{
21063 outputs: []outputInfo{
21064 {0, 9223372034707292160},
21065 },
21066 },
21067 },
21068 {
21069 name: "MOVDaddr",
21070 auxType: auxSymOff,
21071 argLen: 1,
21072 rematerializeable: true,
21073 symEffect: SymAddr,
21074 asm: arm64.AMOVD,
21075 reg: regInfo{
21076 inputs: []inputInfo{
21077 {0, 9223372037928517632},
21078 },
21079 outputs: []outputInfo{
21080 {0, 670826495},
21081 },
21082 },
21083 },
21084 {
21085 name: "MOVBload",
21086 auxType: auxSymOff,
21087 argLen: 2,
21088 faultOnNilArg0: true,
21089 symEffect: SymRead,
21090 asm: arm64.AMOVB,
21091 reg: regInfo{
21092 inputs: []inputInfo{
21093 {0, 9223372038733561855},
21094 },
21095 outputs: []outputInfo{
21096 {0, 670826495},
21097 },
21098 },
21099 },
21100 {
21101 name: "MOVBUload",
21102 auxType: auxSymOff,
21103 argLen: 2,
21104 faultOnNilArg0: true,
21105 symEffect: SymRead,
21106 asm: arm64.AMOVBU,
21107 reg: regInfo{
21108 inputs: []inputInfo{
21109 {0, 9223372038733561855},
21110 },
21111 outputs: []outputInfo{
21112 {0, 670826495},
21113 },
21114 },
21115 },
21116 {
21117 name: "MOVHload",
21118 auxType: auxSymOff,
21119 argLen: 2,
21120 faultOnNilArg0: true,
21121 symEffect: SymRead,
21122 asm: arm64.AMOVH,
21123 reg: regInfo{
21124 inputs: []inputInfo{
21125 {0, 9223372038733561855},
21126 },
21127 outputs: []outputInfo{
21128 {0, 670826495},
21129 },
21130 },
21131 },
21132 {
21133 name: "MOVHUload",
21134 auxType: auxSymOff,
21135 argLen: 2,
21136 faultOnNilArg0: true,
21137 symEffect: SymRead,
21138 asm: arm64.AMOVHU,
21139 reg: regInfo{
21140 inputs: []inputInfo{
21141 {0, 9223372038733561855},
21142 },
21143 outputs: []outputInfo{
21144 {0, 670826495},
21145 },
21146 },
21147 },
21148 {
21149 name: "MOVWload",
21150 auxType: auxSymOff,
21151 argLen: 2,
21152 faultOnNilArg0: true,
21153 symEffect: SymRead,
21154 asm: arm64.AMOVW,
21155 reg: regInfo{
21156 inputs: []inputInfo{
21157 {0, 9223372038733561855},
21158 },
21159 outputs: []outputInfo{
21160 {0, 670826495},
21161 },
21162 },
21163 },
21164 {
21165 name: "MOVWUload",
21166 auxType: auxSymOff,
21167 argLen: 2,
21168 faultOnNilArg0: true,
21169 symEffect: SymRead,
21170 asm: arm64.AMOVWU,
21171 reg: regInfo{
21172 inputs: []inputInfo{
21173 {0, 9223372038733561855},
21174 },
21175 outputs: []outputInfo{
21176 {0, 670826495},
21177 },
21178 },
21179 },
21180 {
21181 name: "MOVDload",
21182 auxType: auxSymOff,
21183 argLen: 2,
21184 faultOnNilArg0: true,
21185 symEffect: SymRead,
21186 asm: arm64.AMOVD,
21187 reg: regInfo{
21188 inputs: []inputInfo{
21189 {0, 9223372038733561855},
21190 },
21191 outputs: []outputInfo{
21192 {0, 670826495},
21193 },
21194 },
21195 },
21196 {
21197 name: "LDP",
21198 auxType: auxSymOff,
21199 argLen: 2,
21200 faultOnNilArg0: true,
21201 symEffect: SymRead,
21202 asm: arm64.ALDP,
21203 reg: regInfo{
21204 inputs: []inputInfo{
21205 {0, 9223372038733561855},
21206 },
21207 outputs: []outputInfo{
21208 {0, 805044223},
21209 {1, 805044223},
21210 },
21211 },
21212 },
21213 {
21214 name: "FMOVSload",
21215 auxType: auxSymOff,
21216 argLen: 2,
21217 faultOnNilArg0: true,
21218 symEffect: SymRead,
21219 asm: arm64.AFMOVS,
21220 reg: regInfo{
21221 inputs: []inputInfo{
21222 {0, 9223372038733561855},
21223 },
21224 outputs: []outputInfo{
21225 {0, 9223372034707292160},
21226 },
21227 },
21228 },
21229 {
21230 name: "FMOVDload",
21231 auxType: auxSymOff,
21232 argLen: 2,
21233 faultOnNilArg0: true,
21234 symEffect: SymRead,
21235 asm: arm64.AFMOVD,
21236 reg: regInfo{
21237 inputs: []inputInfo{
21238 {0, 9223372038733561855},
21239 },
21240 outputs: []outputInfo{
21241 {0, 9223372034707292160},
21242 },
21243 },
21244 },
21245 {
21246 name: "MOVDloadidx",
21247 argLen: 3,
21248 asm: arm64.AMOVD,
21249 reg: regInfo{
21250 inputs: []inputInfo{
21251 {1, 805044223},
21252 {0, 9223372038733561855},
21253 },
21254 outputs: []outputInfo{
21255 {0, 670826495},
21256 },
21257 },
21258 },
21259 {
21260 name: "MOVWloadidx",
21261 argLen: 3,
21262 asm: arm64.AMOVW,
21263 reg: regInfo{
21264 inputs: []inputInfo{
21265 {1, 805044223},
21266 {0, 9223372038733561855},
21267 },
21268 outputs: []outputInfo{
21269 {0, 670826495},
21270 },
21271 },
21272 },
21273 {
21274 name: "MOVWUloadidx",
21275 argLen: 3,
21276 asm: arm64.AMOVWU,
21277 reg: regInfo{
21278 inputs: []inputInfo{
21279 {1, 805044223},
21280 {0, 9223372038733561855},
21281 },
21282 outputs: []outputInfo{
21283 {0, 670826495},
21284 },
21285 },
21286 },
21287 {
21288 name: "MOVHloadidx",
21289 argLen: 3,
21290 asm: arm64.AMOVH,
21291 reg: regInfo{
21292 inputs: []inputInfo{
21293 {1, 805044223},
21294 {0, 9223372038733561855},
21295 },
21296 outputs: []outputInfo{
21297 {0, 670826495},
21298 },
21299 },
21300 },
21301 {
21302 name: "MOVHUloadidx",
21303 argLen: 3,
21304 asm: arm64.AMOVHU,
21305 reg: regInfo{
21306 inputs: []inputInfo{
21307 {1, 805044223},
21308 {0, 9223372038733561855},
21309 },
21310 outputs: []outputInfo{
21311 {0, 670826495},
21312 },
21313 },
21314 },
21315 {
21316 name: "MOVBloadidx",
21317 argLen: 3,
21318 asm: arm64.AMOVB,
21319 reg: regInfo{
21320 inputs: []inputInfo{
21321 {1, 805044223},
21322 {0, 9223372038733561855},
21323 },
21324 outputs: []outputInfo{
21325 {0, 670826495},
21326 },
21327 },
21328 },
21329 {
21330 name: "MOVBUloadidx",
21331 argLen: 3,
21332 asm: arm64.AMOVBU,
21333 reg: regInfo{
21334 inputs: []inputInfo{
21335 {1, 805044223},
21336 {0, 9223372038733561855},
21337 },
21338 outputs: []outputInfo{
21339 {0, 670826495},
21340 },
21341 },
21342 },
21343 {
21344 name: "FMOVSloadidx",
21345 argLen: 3,
21346 asm: arm64.AFMOVS,
21347 reg: regInfo{
21348 inputs: []inputInfo{
21349 {1, 805044223},
21350 {0, 9223372038733561855},
21351 },
21352 outputs: []outputInfo{
21353 {0, 9223372034707292160},
21354 },
21355 },
21356 },
21357 {
21358 name: "FMOVDloadidx",
21359 argLen: 3,
21360 asm: arm64.AFMOVD,
21361 reg: regInfo{
21362 inputs: []inputInfo{
21363 {1, 805044223},
21364 {0, 9223372038733561855},
21365 },
21366 outputs: []outputInfo{
21367 {0, 9223372034707292160},
21368 },
21369 },
21370 },
21371 {
21372 name: "MOVHloadidx2",
21373 argLen: 3,
21374 asm: arm64.AMOVH,
21375 reg: regInfo{
21376 inputs: []inputInfo{
21377 {1, 805044223},
21378 {0, 9223372038733561855},
21379 },
21380 outputs: []outputInfo{
21381 {0, 670826495},
21382 },
21383 },
21384 },
21385 {
21386 name: "MOVHUloadidx2",
21387 argLen: 3,
21388 asm: arm64.AMOVHU,
21389 reg: regInfo{
21390 inputs: []inputInfo{
21391 {1, 805044223},
21392 {0, 9223372038733561855},
21393 },
21394 outputs: []outputInfo{
21395 {0, 670826495},
21396 },
21397 },
21398 },
21399 {
21400 name: "MOVWloadidx4",
21401 argLen: 3,
21402 asm: arm64.AMOVW,
21403 reg: regInfo{
21404 inputs: []inputInfo{
21405 {1, 805044223},
21406 {0, 9223372038733561855},
21407 },
21408 outputs: []outputInfo{
21409 {0, 670826495},
21410 },
21411 },
21412 },
21413 {
21414 name: "MOVWUloadidx4",
21415 argLen: 3,
21416 asm: arm64.AMOVWU,
21417 reg: regInfo{
21418 inputs: []inputInfo{
21419 {1, 805044223},
21420 {0, 9223372038733561855},
21421 },
21422 outputs: []outputInfo{
21423 {0, 670826495},
21424 },
21425 },
21426 },
21427 {
21428 name: "MOVDloadidx8",
21429 argLen: 3,
21430 asm: arm64.AMOVD,
21431 reg: regInfo{
21432 inputs: []inputInfo{
21433 {1, 805044223},
21434 {0, 9223372038733561855},
21435 },
21436 outputs: []outputInfo{
21437 {0, 670826495},
21438 },
21439 },
21440 },
21441 {
21442 name: "FMOVSloadidx4",
21443 argLen: 3,
21444 asm: arm64.AFMOVS,
21445 reg: regInfo{
21446 inputs: []inputInfo{
21447 {1, 805044223},
21448 {0, 9223372038733561855},
21449 },
21450 outputs: []outputInfo{
21451 {0, 9223372034707292160},
21452 },
21453 },
21454 },
21455 {
21456 name: "FMOVDloadidx8",
21457 argLen: 3,
21458 asm: arm64.AFMOVD,
21459 reg: regInfo{
21460 inputs: []inputInfo{
21461 {1, 805044223},
21462 {0, 9223372038733561855},
21463 },
21464 outputs: []outputInfo{
21465 {0, 9223372034707292160},
21466 },
21467 },
21468 },
21469 {
21470 name: "MOVBstore",
21471 auxType: auxSymOff,
21472 argLen: 3,
21473 faultOnNilArg0: true,
21474 symEffect: SymWrite,
21475 asm: arm64.AMOVB,
21476 reg: regInfo{
21477 inputs: []inputInfo{
21478 {1, 805044223},
21479 {0, 9223372038733561855},
21480 },
21481 },
21482 },
21483 {
21484 name: "MOVHstore",
21485 auxType: auxSymOff,
21486 argLen: 3,
21487 faultOnNilArg0: true,
21488 symEffect: SymWrite,
21489 asm: arm64.AMOVH,
21490 reg: regInfo{
21491 inputs: []inputInfo{
21492 {1, 805044223},
21493 {0, 9223372038733561855},
21494 },
21495 },
21496 },
21497 {
21498 name: "MOVWstore",
21499 auxType: auxSymOff,
21500 argLen: 3,
21501 faultOnNilArg0: true,
21502 symEffect: SymWrite,
21503 asm: arm64.AMOVW,
21504 reg: regInfo{
21505 inputs: []inputInfo{
21506 {1, 805044223},
21507 {0, 9223372038733561855},
21508 },
21509 },
21510 },
21511 {
21512 name: "MOVDstore",
21513 auxType: auxSymOff,
21514 argLen: 3,
21515 faultOnNilArg0: true,
21516 symEffect: SymWrite,
21517 asm: arm64.AMOVD,
21518 reg: regInfo{
21519 inputs: []inputInfo{
21520 {1, 805044223},
21521 {0, 9223372038733561855},
21522 },
21523 },
21524 },
21525 {
21526 name: "STP",
21527 auxType: auxSymOff,
21528 argLen: 4,
21529 faultOnNilArg0: true,
21530 symEffect: SymWrite,
21531 asm: arm64.ASTP,
21532 reg: regInfo{
21533 inputs: []inputInfo{
21534 {1, 805044223},
21535 {2, 805044223},
21536 {0, 9223372038733561855},
21537 },
21538 },
21539 },
21540 {
21541 name: "FMOVSstore",
21542 auxType: auxSymOff,
21543 argLen: 3,
21544 faultOnNilArg0: true,
21545 symEffect: SymWrite,
21546 asm: arm64.AFMOVS,
21547 reg: regInfo{
21548 inputs: []inputInfo{
21549 {0, 9223372038733561855},
21550 {1, 9223372034707292160},
21551 },
21552 },
21553 },
21554 {
21555 name: "FMOVDstore",
21556 auxType: auxSymOff,
21557 argLen: 3,
21558 faultOnNilArg0: true,
21559 symEffect: SymWrite,
21560 asm: arm64.AFMOVD,
21561 reg: regInfo{
21562 inputs: []inputInfo{
21563 {0, 9223372038733561855},
21564 {1, 9223372034707292160},
21565 },
21566 },
21567 },
21568 {
21569 name: "MOVBstoreidx",
21570 argLen: 4,
21571 asm: arm64.AMOVB,
21572 reg: regInfo{
21573 inputs: []inputInfo{
21574 {1, 805044223},
21575 {2, 805044223},
21576 {0, 9223372038733561855},
21577 },
21578 },
21579 },
21580 {
21581 name: "MOVHstoreidx",
21582 argLen: 4,
21583 asm: arm64.AMOVH,
21584 reg: regInfo{
21585 inputs: []inputInfo{
21586 {1, 805044223},
21587 {2, 805044223},
21588 {0, 9223372038733561855},
21589 },
21590 },
21591 },
21592 {
21593 name: "MOVWstoreidx",
21594 argLen: 4,
21595 asm: arm64.AMOVW,
21596 reg: regInfo{
21597 inputs: []inputInfo{
21598 {1, 805044223},
21599 {2, 805044223},
21600 {0, 9223372038733561855},
21601 },
21602 },
21603 },
21604 {
21605 name: "MOVDstoreidx",
21606 argLen: 4,
21607 asm: arm64.AMOVD,
21608 reg: regInfo{
21609 inputs: []inputInfo{
21610 {1, 805044223},
21611 {2, 805044223},
21612 {0, 9223372038733561855},
21613 },
21614 },
21615 },
21616 {
21617 name: "FMOVSstoreidx",
21618 argLen: 4,
21619 asm: arm64.AFMOVS,
21620 reg: regInfo{
21621 inputs: []inputInfo{
21622 {1, 805044223},
21623 {0, 9223372038733561855},
21624 {2, 9223372034707292160},
21625 },
21626 },
21627 },
21628 {
21629 name: "FMOVDstoreidx",
21630 argLen: 4,
21631 asm: arm64.AFMOVD,
21632 reg: regInfo{
21633 inputs: []inputInfo{
21634 {1, 805044223},
21635 {0, 9223372038733561855},
21636 {2, 9223372034707292160},
21637 },
21638 },
21639 },
21640 {
21641 name: "MOVHstoreidx2",
21642 argLen: 4,
21643 asm: arm64.AMOVH,
21644 reg: regInfo{
21645 inputs: []inputInfo{
21646 {1, 805044223},
21647 {2, 805044223},
21648 {0, 9223372038733561855},
21649 },
21650 },
21651 },
21652 {
21653 name: "MOVWstoreidx4",
21654 argLen: 4,
21655 asm: arm64.AMOVW,
21656 reg: regInfo{
21657 inputs: []inputInfo{
21658 {1, 805044223},
21659 {2, 805044223},
21660 {0, 9223372038733561855},
21661 },
21662 },
21663 },
21664 {
21665 name: "MOVDstoreidx8",
21666 argLen: 4,
21667 asm: arm64.AMOVD,
21668 reg: regInfo{
21669 inputs: []inputInfo{
21670 {1, 805044223},
21671 {2, 805044223},
21672 {0, 9223372038733561855},
21673 },
21674 },
21675 },
21676 {
21677 name: "FMOVSstoreidx4",
21678 argLen: 4,
21679 asm: arm64.AFMOVS,
21680 reg: regInfo{
21681 inputs: []inputInfo{
21682 {1, 805044223},
21683 {0, 9223372038733561855},
21684 {2, 9223372034707292160},
21685 },
21686 },
21687 },
21688 {
21689 name: "FMOVDstoreidx8",
21690 argLen: 4,
21691 asm: arm64.AFMOVD,
21692 reg: regInfo{
21693 inputs: []inputInfo{
21694 {1, 805044223},
21695 {0, 9223372038733561855},
21696 {2, 9223372034707292160},
21697 },
21698 },
21699 },
21700 {
21701 name: "MOVBstorezero",
21702 auxType: auxSymOff,
21703 argLen: 2,
21704 faultOnNilArg0: true,
21705 symEffect: SymWrite,
21706 asm: arm64.AMOVB,
21707 reg: regInfo{
21708 inputs: []inputInfo{
21709 {0, 9223372038733561855},
21710 },
21711 },
21712 },
21713 {
21714 name: "MOVHstorezero",
21715 auxType: auxSymOff,
21716 argLen: 2,
21717 faultOnNilArg0: true,
21718 symEffect: SymWrite,
21719 asm: arm64.AMOVH,
21720 reg: regInfo{
21721 inputs: []inputInfo{
21722 {0, 9223372038733561855},
21723 },
21724 },
21725 },
21726 {
21727 name: "MOVWstorezero",
21728 auxType: auxSymOff,
21729 argLen: 2,
21730 faultOnNilArg0: true,
21731 symEffect: SymWrite,
21732 asm: arm64.AMOVW,
21733 reg: regInfo{
21734 inputs: []inputInfo{
21735 {0, 9223372038733561855},
21736 },
21737 },
21738 },
21739 {
21740 name: "MOVDstorezero",
21741 auxType: auxSymOff,
21742 argLen: 2,
21743 faultOnNilArg0: true,
21744 symEffect: SymWrite,
21745 asm: arm64.AMOVD,
21746 reg: regInfo{
21747 inputs: []inputInfo{
21748 {0, 9223372038733561855},
21749 },
21750 },
21751 },
21752 {
21753 name: "MOVQstorezero",
21754 auxType: auxSymOff,
21755 argLen: 2,
21756 faultOnNilArg0: true,
21757 symEffect: SymWrite,
21758 asm: arm64.ASTP,
21759 reg: regInfo{
21760 inputs: []inputInfo{
21761 {0, 9223372038733561855},
21762 },
21763 },
21764 },
21765 {
21766 name: "MOVBstorezeroidx",
21767 argLen: 3,
21768 asm: arm64.AMOVB,
21769 reg: regInfo{
21770 inputs: []inputInfo{
21771 {1, 805044223},
21772 {0, 9223372038733561855},
21773 },
21774 },
21775 },
21776 {
21777 name: "MOVHstorezeroidx",
21778 argLen: 3,
21779 asm: arm64.AMOVH,
21780 reg: regInfo{
21781 inputs: []inputInfo{
21782 {1, 805044223},
21783 {0, 9223372038733561855},
21784 },
21785 },
21786 },
21787 {
21788 name: "MOVWstorezeroidx",
21789 argLen: 3,
21790 asm: arm64.AMOVW,
21791 reg: regInfo{
21792 inputs: []inputInfo{
21793 {1, 805044223},
21794 {0, 9223372038733561855},
21795 },
21796 },
21797 },
21798 {
21799 name: "MOVDstorezeroidx",
21800 argLen: 3,
21801 asm: arm64.AMOVD,
21802 reg: regInfo{
21803 inputs: []inputInfo{
21804 {1, 805044223},
21805 {0, 9223372038733561855},
21806 },
21807 },
21808 },
21809 {
21810 name: "MOVHstorezeroidx2",
21811 argLen: 3,
21812 asm: arm64.AMOVH,
21813 reg: regInfo{
21814 inputs: []inputInfo{
21815 {1, 805044223},
21816 {0, 9223372038733561855},
21817 },
21818 },
21819 },
21820 {
21821 name: "MOVWstorezeroidx4",
21822 argLen: 3,
21823 asm: arm64.AMOVW,
21824 reg: regInfo{
21825 inputs: []inputInfo{
21826 {1, 805044223},
21827 {0, 9223372038733561855},
21828 },
21829 },
21830 },
21831 {
21832 name: "MOVDstorezeroidx8",
21833 argLen: 3,
21834 asm: arm64.AMOVD,
21835 reg: regInfo{
21836 inputs: []inputInfo{
21837 {1, 805044223},
21838 {0, 9223372038733561855},
21839 },
21840 },
21841 },
21842 {
21843 name: "FMOVDgpfp",
21844 argLen: 1,
21845 asm: arm64.AFMOVD,
21846 reg: regInfo{
21847 inputs: []inputInfo{
21848 {0, 670826495},
21849 },
21850 outputs: []outputInfo{
21851 {0, 9223372034707292160},
21852 },
21853 },
21854 },
21855 {
21856 name: "FMOVDfpgp",
21857 argLen: 1,
21858 asm: arm64.AFMOVD,
21859 reg: regInfo{
21860 inputs: []inputInfo{
21861 {0, 9223372034707292160},
21862 },
21863 outputs: []outputInfo{
21864 {0, 670826495},
21865 },
21866 },
21867 },
21868 {
21869 name: "FMOVSgpfp",
21870 argLen: 1,
21871 asm: arm64.AFMOVS,
21872 reg: regInfo{
21873 inputs: []inputInfo{
21874 {0, 670826495},
21875 },
21876 outputs: []outputInfo{
21877 {0, 9223372034707292160},
21878 },
21879 },
21880 },
21881 {
21882 name: "FMOVSfpgp",
21883 argLen: 1,
21884 asm: arm64.AFMOVS,
21885 reg: regInfo{
21886 inputs: []inputInfo{
21887 {0, 9223372034707292160},
21888 },
21889 outputs: []outputInfo{
21890 {0, 670826495},
21891 },
21892 },
21893 },
21894 {
21895 name: "MOVBreg",
21896 argLen: 1,
21897 asm: arm64.AMOVB,
21898 reg: regInfo{
21899 inputs: []inputInfo{
21900 {0, 805044223},
21901 },
21902 outputs: []outputInfo{
21903 {0, 670826495},
21904 },
21905 },
21906 },
21907 {
21908 name: "MOVBUreg",
21909 argLen: 1,
21910 asm: arm64.AMOVBU,
21911 reg: regInfo{
21912 inputs: []inputInfo{
21913 {0, 805044223},
21914 },
21915 outputs: []outputInfo{
21916 {0, 670826495},
21917 },
21918 },
21919 },
21920 {
21921 name: "MOVHreg",
21922 argLen: 1,
21923 asm: arm64.AMOVH,
21924 reg: regInfo{
21925 inputs: []inputInfo{
21926 {0, 805044223},
21927 },
21928 outputs: []outputInfo{
21929 {0, 670826495},
21930 },
21931 },
21932 },
21933 {
21934 name: "MOVHUreg",
21935 argLen: 1,
21936 asm: arm64.AMOVHU,
21937 reg: regInfo{
21938 inputs: []inputInfo{
21939 {0, 805044223},
21940 },
21941 outputs: []outputInfo{
21942 {0, 670826495},
21943 },
21944 },
21945 },
21946 {
21947 name: "MOVWreg",
21948 argLen: 1,
21949 asm: arm64.AMOVW,
21950 reg: regInfo{
21951 inputs: []inputInfo{
21952 {0, 805044223},
21953 },
21954 outputs: []outputInfo{
21955 {0, 670826495},
21956 },
21957 },
21958 },
21959 {
21960 name: "MOVWUreg",
21961 argLen: 1,
21962 asm: arm64.AMOVWU,
21963 reg: regInfo{
21964 inputs: []inputInfo{
21965 {0, 805044223},
21966 },
21967 outputs: []outputInfo{
21968 {0, 670826495},
21969 },
21970 },
21971 },
21972 {
21973 name: "MOVDreg",
21974 argLen: 1,
21975 asm: arm64.AMOVD,
21976 reg: regInfo{
21977 inputs: []inputInfo{
21978 {0, 805044223},
21979 },
21980 outputs: []outputInfo{
21981 {0, 670826495},
21982 },
21983 },
21984 },
21985 {
21986 name: "MOVDnop",
21987 argLen: 1,
21988 resultInArg0: true,
21989 reg: regInfo{
21990 inputs: []inputInfo{
21991 {0, 670826495},
21992 },
21993 outputs: []outputInfo{
21994 {0, 670826495},
21995 },
21996 },
21997 },
21998 {
21999 name: "SCVTFWS",
22000 argLen: 1,
22001 asm: arm64.ASCVTFWS,
22002 reg: regInfo{
22003 inputs: []inputInfo{
22004 {0, 670826495},
22005 },
22006 outputs: []outputInfo{
22007 {0, 9223372034707292160},
22008 },
22009 },
22010 },
22011 {
22012 name: "SCVTFWD",
22013 argLen: 1,
22014 asm: arm64.ASCVTFWD,
22015 reg: regInfo{
22016 inputs: []inputInfo{
22017 {0, 670826495},
22018 },
22019 outputs: []outputInfo{
22020 {0, 9223372034707292160},
22021 },
22022 },
22023 },
22024 {
22025 name: "UCVTFWS",
22026 argLen: 1,
22027 asm: arm64.AUCVTFWS,
22028 reg: regInfo{
22029 inputs: []inputInfo{
22030 {0, 670826495},
22031 },
22032 outputs: []outputInfo{
22033 {0, 9223372034707292160},
22034 },
22035 },
22036 },
22037 {
22038 name: "UCVTFWD",
22039 argLen: 1,
22040 asm: arm64.AUCVTFWD,
22041 reg: regInfo{
22042 inputs: []inputInfo{
22043 {0, 670826495},
22044 },
22045 outputs: []outputInfo{
22046 {0, 9223372034707292160},
22047 },
22048 },
22049 },
22050 {
22051 name: "SCVTFS",
22052 argLen: 1,
22053 asm: arm64.ASCVTFS,
22054 reg: regInfo{
22055 inputs: []inputInfo{
22056 {0, 670826495},
22057 },
22058 outputs: []outputInfo{
22059 {0, 9223372034707292160},
22060 },
22061 },
22062 },
22063 {
22064 name: "SCVTFD",
22065 argLen: 1,
22066 asm: arm64.ASCVTFD,
22067 reg: regInfo{
22068 inputs: []inputInfo{
22069 {0, 670826495},
22070 },
22071 outputs: []outputInfo{
22072 {0, 9223372034707292160},
22073 },
22074 },
22075 },
22076 {
22077 name: "UCVTFS",
22078 argLen: 1,
22079 asm: arm64.AUCVTFS,
22080 reg: regInfo{
22081 inputs: []inputInfo{
22082 {0, 670826495},
22083 },
22084 outputs: []outputInfo{
22085 {0, 9223372034707292160},
22086 },
22087 },
22088 },
22089 {
22090 name: "UCVTFD",
22091 argLen: 1,
22092 asm: arm64.AUCVTFD,
22093 reg: regInfo{
22094 inputs: []inputInfo{
22095 {0, 670826495},
22096 },
22097 outputs: []outputInfo{
22098 {0, 9223372034707292160},
22099 },
22100 },
22101 },
22102 {
22103 name: "FCVTZSSW",
22104 argLen: 1,
22105 asm: arm64.AFCVTZSSW,
22106 reg: regInfo{
22107 inputs: []inputInfo{
22108 {0, 9223372034707292160},
22109 },
22110 outputs: []outputInfo{
22111 {0, 670826495},
22112 },
22113 },
22114 },
22115 {
22116 name: "FCVTZSDW",
22117 argLen: 1,
22118 asm: arm64.AFCVTZSDW,
22119 reg: regInfo{
22120 inputs: []inputInfo{
22121 {0, 9223372034707292160},
22122 },
22123 outputs: []outputInfo{
22124 {0, 670826495},
22125 },
22126 },
22127 },
22128 {
22129 name: "FCVTZUSW",
22130 argLen: 1,
22131 asm: arm64.AFCVTZUSW,
22132 reg: regInfo{
22133 inputs: []inputInfo{
22134 {0, 9223372034707292160},
22135 },
22136 outputs: []outputInfo{
22137 {0, 670826495},
22138 },
22139 },
22140 },
22141 {
22142 name: "FCVTZUDW",
22143 argLen: 1,
22144 asm: arm64.AFCVTZUDW,
22145 reg: regInfo{
22146 inputs: []inputInfo{
22147 {0, 9223372034707292160},
22148 },
22149 outputs: []outputInfo{
22150 {0, 670826495},
22151 },
22152 },
22153 },
22154 {
22155 name: "FCVTZSS",
22156 argLen: 1,
22157 asm: arm64.AFCVTZSS,
22158 reg: regInfo{
22159 inputs: []inputInfo{
22160 {0, 9223372034707292160},
22161 },
22162 outputs: []outputInfo{
22163 {0, 670826495},
22164 },
22165 },
22166 },
22167 {
22168 name: "FCVTZSD",
22169 argLen: 1,
22170 asm: arm64.AFCVTZSD,
22171 reg: regInfo{
22172 inputs: []inputInfo{
22173 {0, 9223372034707292160},
22174 },
22175 outputs: []outputInfo{
22176 {0, 670826495},
22177 },
22178 },
22179 },
22180 {
22181 name: "FCVTZUS",
22182 argLen: 1,
22183 asm: arm64.AFCVTZUS,
22184 reg: regInfo{
22185 inputs: []inputInfo{
22186 {0, 9223372034707292160},
22187 },
22188 outputs: []outputInfo{
22189 {0, 670826495},
22190 },
22191 },
22192 },
22193 {
22194 name: "FCVTZUD",
22195 argLen: 1,
22196 asm: arm64.AFCVTZUD,
22197 reg: regInfo{
22198 inputs: []inputInfo{
22199 {0, 9223372034707292160},
22200 },
22201 outputs: []outputInfo{
22202 {0, 670826495},
22203 },
22204 },
22205 },
22206 {
22207 name: "FCVTSD",
22208 argLen: 1,
22209 asm: arm64.AFCVTSD,
22210 reg: regInfo{
22211 inputs: []inputInfo{
22212 {0, 9223372034707292160},
22213 },
22214 outputs: []outputInfo{
22215 {0, 9223372034707292160},
22216 },
22217 },
22218 },
22219 {
22220 name: "FCVTDS",
22221 argLen: 1,
22222 asm: arm64.AFCVTDS,
22223 reg: regInfo{
22224 inputs: []inputInfo{
22225 {0, 9223372034707292160},
22226 },
22227 outputs: []outputInfo{
22228 {0, 9223372034707292160},
22229 },
22230 },
22231 },
22232 {
22233 name: "FRINTAD",
22234 argLen: 1,
22235 asm: arm64.AFRINTAD,
22236 reg: regInfo{
22237 inputs: []inputInfo{
22238 {0, 9223372034707292160},
22239 },
22240 outputs: []outputInfo{
22241 {0, 9223372034707292160},
22242 },
22243 },
22244 },
22245 {
22246 name: "FRINTMD",
22247 argLen: 1,
22248 asm: arm64.AFRINTMD,
22249 reg: regInfo{
22250 inputs: []inputInfo{
22251 {0, 9223372034707292160},
22252 },
22253 outputs: []outputInfo{
22254 {0, 9223372034707292160},
22255 },
22256 },
22257 },
22258 {
22259 name: "FRINTND",
22260 argLen: 1,
22261 asm: arm64.AFRINTND,
22262 reg: regInfo{
22263 inputs: []inputInfo{
22264 {0, 9223372034707292160},
22265 },
22266 outputs: []outputInfo{
22267 {0, 9223372034707292160},
22268 },
22269 },
22270 },
22271 {
22272 name: "FRINTPD",
22273 argLen: 1,
22274 asm: arm64.AFRINTPD,
22275 reg: regInfo{
22276 inputs: []inputInfo{
22277 {0, 9223372034707292160},
22278 },
22279 outputs: []outputInfo{
22280 {0, 9223372034707292160},
22281 },
22282 },
22283 },
22284 {
22285 name: "FRINTZD",
22286 argLen: 1,
22287 asm: arm64.AFRINTZD,
22288 reg: regInfo{
22289 inputs: []inputInfo{
22290 {0, 9223372034707292160},
22291 },
22292 outputs: []outputInfo{
22293 {0, 9223372034707292160},
22294 },
22295 },
22296 },
22297 {
22298 name: "CSEL",
22299 auxType: auxCCop,
22300 argLen: 3,
22301 asm: arm64.ACSEL,
22302 reg: regInfo{
22303 inputs: []inputInfo{
22304 {0, 670826495},
22305 {1, 670826495},
22306 },
22307 outputs: []outputInfo{
22308 {0, 670826495},
22309 },
22310 },
22311 },
22312 {
22313 name: "CSEL0",
22314 auxType: auxCCop,
22315 argLen: 2,
22316 asm: arm64.ACSEL,
22317 reg: regInfo{
22318 inputs: []inputInfo{
22319 {0, 805044223},
22320 },
22321 outputs: []outputInfo{
22322 {0, 670826495},
22323 },
22324 },
22325 },
22326 {
22327 name: "CSINC",
22328 auxType: auxCCop,
22329 argLen: 3,
22330 asm: arm64.ACSINC,
22331 reg: regInfo{
22332 inputs: []inputInfo{
22333 {0, 670826495},
22334 {1, 670826495},
22335 },
22336 outputs: []outputInfo{
22337 {0, 670826495},
22338 },
22339 },
22340 },
22341 {
22342 name: "CSINV",
22343 auxType: auxCCop,
22344 argLen: 3,
22345 asm: arm64.ACSINV,
22346 reg: regInfo{
22347 inputs: []inputInfo{
22348 {0, 670826495},
22349 {1, 670826495},
22350 },
22351 outputs: []outputInfo{
22352 {0, 670826495},
22353 },
22354 },
22355 },
22356 {
22357 name: "CSNEG",
22358 auxType: auxCCop,
22359 argLen: 3,
22360 asm: arm64.ACSNEG,
22361 reg: regInfo{
22362 inputs: []inputInfo{
22363 {0, 670826495},
22364 {1, 670826495},
22365 },
22366 outputs: []outputInfo{
22367 {0, 670826495},
22368 },
22369 },
22370 },
22371 {
22372 name: "CSETM",
22373 auxType: auxCCop,
22374 argLen: 1,
22375 asm: arm64.ACSETM,
22376 reg: regInfo{
22377 outputs: []outputInfo{
22378 {0, 670826495},
22379 },
22380 },
22381 },
22382 {
22383 name: "CALLstatic",
22384 auxType: auxCallOff,
22385 argLen: -1,
22386 clobberFlags: true,
22387 call: true,
22388 reg: regInfo{
22389 clobbers: 9223372035512336383,
22390 },
22391 },
22392 {
22393 name: "CALLtail",
22394 auxType: auxCallOff,
22395 argLen: -1,
22396 clobberFlags: true,
22397 call: true,
22398 tailCall: true,
22399 reg: regInfo{
22400 clobbers: 9223372035512336383,
22401 },
22402 },
22403 {
22404 name: "CALLclosure",
22405 auxType: auxCallOff,
22406 argLen: -1,
22407 clobberFlags: true,
22408 call: true,
22409 reg: regInfo{
22410 inputs: []inputInfo{
22411 {1, 67108864},
22412 {0, 1744568319},
22413 },
22414 clobbers: 9223372035512336383,
22415 },
22416 },
22417 {
22418 name: "CALLinter",
22419 auxType: auxCallOff,
22420 argLen: -1,
22421 clobberFlags: true,
22422 call: true,
22423 reg: regInfo{
22424 inputs: []inputInfo{
22425 {0, 670826495},
22426 },
22427 clobbers: 9223372035512336383,
22428 },
22429 },
22430 {
22431 name: "LoweredNilCheck",
22432 argLen: 2,
22433 nilCheck: true,
22434 faultOnNilArg0: true,
22435 reg: regInfo{
22436 inputs: []inputInfo{
22437 {0, 805044223},
22438 },
22439 },
22440 },
22441 {
22442 name: "Equal",
22443 argLen: 1,
22444 reg: regInfo{
22445 outputs: []outputInfo{
22446 {0, 670826495},
22447 },
22448 },
22449 },
22450 {
22451 name: "NotEqual",
22452 argLen: 1,
22453 reg: regInfo{
22454 outputs: []outputInfo{
22455 {0, 670826495},
22456 },
22457 },
22458 },
22459 {
22460 name: "LessThan",
22461 argLen: 1,
22462 reg: regInfo{
22463 outputs: []outputInfo{
22464 {0, 670826495},
22465 },
22466 },
22467 },
22468 {
22469 name: "LessEqual",
22470 argLen: 1,
22471 reg: regInfo{
22472 outputs: []outputInfo{
22473 {0, 670826495},
22474 },
22475 },
22476 },
22477 {
22478 name: "GreaterThan",
22479 argLen: 1,
22480 reg: regInfo{
22481 outputs: []outputInfo{
22482 {0, 670826495},
22483 },
22484 },
22485 },
22486 {
22487 name: "GreaterEqual",
22488 argLen: 1,
22489 reg: regInfo{
22490 outputs: []outputInfo{
22491 {0, 670826495},
22492 },
22493 },
22494 },
22495 {
22496 name: "LessThanU",
22497 argLen: 1,
22498 reg: regInfo{
22499 outputs: []outputInfo{
22500 {0, 670826495},
22501 },
22502 },
22503 },
22504 {
22505 name: "LessEqualU",
22506 argLen: 1,
22507 reg: regInfo{
22508 outputs: []outputInfo{
22509 {0, 670826495},
22510 },
22511 },
22512 },
22513 {
22514 name: "GreaterThanU",
22515 argLen: 1,
22516 reg: regInfo{
22517 outputs: []outputInfo{
22518 {0, 670826495},
22519 },
22520 },
22521 },
22522 {
22523 name: "GreaterEqualU",
22524 argLen: 1,
22525 reg: regInfo{
22526 outputs: []outputInfo{
22527 {0, 670826495},
22528 },
22529 },
22530 },
22531 {
22532 name: "LessThanF",
22533 argLen: 1,
22534 reg: regInfo{
22535 outputs: []outputInfo{
22536 {0, 670826495},
22537 },
22538 },
22539 },
22540 {
22541 name: "LessEqualF",
22542 argLen: 1,
22543 reg: regInfo{
22544 outputs: []outputInfo{
22545 {0, 670826495},
22546 },
22547 },
22548 },
22549 {
22550 name: "GreaterThanF",
22551 argLen: 1,
22552 reg: regInfo{
22553 outputs: []outputInfo{
22554 {0, 670826495},
22555 },
22556 },
22557 },
22558 {
22559 name: "GreaterEqualF",
22560 argLen: 1,
22561 reg: regInfo{
22562 outputs: []outputInfo{
22563 {0, 670826495},
22564 },
22565 },
22566 },
22567 {
22568 name: "NotLessThanF",
22569 argLen: 1,
22570 reg: regInfo{
22571 outputs: []outputInfo{
22572 {0, 670826495},
22573 },
22574 },
22575 },
22576 {
22577 name: "NotLessEqualF",
22578 argLen: 1,
22579 reg: regInfo{
22580 outputs: []outputInfo{
22581 {0, 670826495},
22582 },
22583 },
22584 },
22585 {
22586 name: "NotGreaterThanF",
22587 argLen: 1,
22588 reg: regInfo{
22589 outputs: []outputInfo{
22590 {0, 670826495},
22591 },
22592 },
22593 },
22594 {
22595 name: "NotGreaterEqualF",
22596 argLen: 1,
22597 reg: regInfo{
22598 outputs: []outputInfo{
22599 {0, 670826495},
22600 },
22601 },
22602 },
22603 {
22604 name: "LessThanNoov",
22605 argLen: 1,
22606 reg: regInfo{
22607 outputs: []outputInfo{
22608 {0, 670826495},
22609 },
22610 },
22611 },
22612 {
22613 name: "GreaterEqualNoov",
22614 argLen: 1,
22615 reg: regInfo{
22616 outputs: []outputInfo{
22617 {0, 670826495},
22618 },
22619 },
22620 },
22621 {
22622 name: "DUFFZERO",
22623 auxType: auxInt64,
22624 argLen: 2,
22625 faultOnNilArg0: true,
22626 unsafePoint: true,
22627 reg: regInfo{
22628 inputs: []inputInfo{
22629 {0, 1048576},
22630 },
22631 clobbers: 538116096,
22632 },
22633 },
22634 {
22635 name: "LoweredZero",
22636 argLen: 3,
22637 clobberFlags: true,
22638 faultOnNilArg0: true,
22639 reg: regInfo{
22640 inputs: []inputInfo{
22641 {0, 65536},
22642 {1, 670826495},
22643 },
22644 clobbers: 65536,
22645 },
22646 },
22647 {
22648 name: "DUFFCOPY",
22649 auxType: auxInt64,
22650 argLen: 3,
22651 faultOnNilArg0: true,
22652 faultOnNilArg1: true,
22653 unsafePoint: true,
22654 reg: regInfo{
22655 inputs: []inputInfo{
22656 {0, 2097152},
22657 {1, 1048576},
22658 },
22659 clobbers: 607322112,
22660 },
22661 },
22662 {
22663 name: "LoweredMove",
22664 argLen: 4,
22665 clobberFlags: true,
22666 faultOnNilArg0: true,
22667 faultOnNilArg1: true,
22668 reg: regInfo{
22669 inputs: []inputInfo{
22670 {0, 131072},
22671 {1, 65536},
22672 {2, 637272063},
22673 },
22674 clobbers: 33751040,
22675 },
22676 },
22677 {
22678 name: "LoweredGetClosurePtr",
22679 argLen: 0,
22680 zeroWidth: true,
22681 reg: regInfo{
22682 outputs: []outputInfo{
22683 {0, 67108864},
22684 },
22685 },
22686 },
22687 {
22688 name: "LoweredGetCallerSP",
22689 argLen: 1,
22690 rematerializeable: true,
22691 reg: regInfo{
22692 outputs: []outputInfo{
22693 {0, 670826495},
22694 },
22695 },
22696 },
22697 {
22698 name: "LoweredGetCallerPC",
22699 argLen: 0,
22700 rematerializeable: true,
22701 reg: regInfo{
22702 outputs: []outputInfo{
22703 {0, 670826495},
22704 },
22705 },
22706 },
22707 {
22708 name: "FlagConstant",
22709 auxType: auxFlagConstant,
22710 argLen: 0,
22711 reg: regInfo{},
22712 },
22713 {
22714 name: "InvertFlags",
22715 argLen: 1,
22716 reg: regInfo{},
22717 },
22718 {
22719 name: "LDAR",
22720 argLen: 2,
22721 faultOnNilArg0: true,
22722 asm: arm64.ALDAR,
22723 reg: regInfo{
22724 inputs: []inputInfo{
22725 {0, 9223372038733561855},
22726 },
22727 outputs: []outputInfo{
22728 {0, 670826495},
22729 },
22730 },
22731 },
22732 {
22733 name: "LDARB",
22734 argLen: 2,
22735 faultOnNilArg0: true,
22736 asm: arm64.ALDARB,
22737 reg: regInfo{
22738 inputs: []inputInfo{
22739 {0, 9223372038733561855},
22740 },
22741 outputs: []outputInfo{
22742 {0, 670826495},
22743 },
22744 },
22745 },
22746 {
22747 name: "LDARW",
22748 argLen: 2,
22749 faultOnNilArg0: true,
22750 asm: arm64.ALDARW,
22751 reg: regInfo{
22752 inputs: []inputInfo{
22753 {0, 9223372038733561855},
22754 },
22755 outputs: []outputInfo{
22756 {0, 670826495},
22757 },
22758 },
22759 },
22760 {
22761 name: "STLRB",
22762 argLen: 3,
22763 faultOnNilArg0: true,
22764 hasSideEffects: true,
22765 asm: arm64.ASTLRB,
22766 reg: regInfo{
22767 inputs: []inputInfo{
22768 {1, 805044223},
22769 {0, 9223372038733561855},
22770 },
22771 },
22772 },
22773 {
22774 name: "STLR",
22775 argLen: 3,
22776 faultOnNilArg0: true,
22777 hasSideEffects: true,
22778 asm: arm64.ASTLR,
22779 reg: regInfo{
22780 inputs: []inputInfo{
22781 {1, 805044223},
22782 {0, 9223372038733561855},
22783 },
22784 },
22785 },
22786 {
22787 name: "STLRW",
22788 argLen: 3,
22789 faultOnNilArg0: true,
22790 hasSideEffects: true,
22791 asm: arm64.ASTLRW,
22792 reg: regInfo{
22793 inputs: []inputInfo{
22794 {1, 805044223},
22795 {0, 9223372038733561855},
22796 },
22797 },
22798 },
22799 {
22800 name: "LoweredAtomicExchange64",
22801 argLen: 3,
22802 resultNotInArgs: true,
22803 faultOnNilArg0: true,
22804 hasSideEffects: true,
22805 unsafePoint: true,
22806 reg: regInfo{
22807 inputs: []inputInfo{
22808 {1, 805044223},
22809 {0, 9223372038733561855},
22810 },
22811 outputs: []outputInfo{
22812 {0, 670826495},
22813 },
22814 },
22815 },
22816 {
22817 name: "LoweredAtomicExchange32",
22818 argLen: 3,
22819 resultNotInArgs: true,
22820 faultOnNilArg0: true,
22821 hasSideEffects: true,
22822 unsafePoint: true,
22823 reg: regInfo{
22824 inputs: []inputInfo{
22825 {1, 805044223},
22826 {0, 9223372038733561855},
22827 },
22828 outputs: []outputInfo{
22829 {0, 670826495},
22830 },
22831 },
22832 },
22833 {
22834 name: "LoweredAtomicExchange64Variant",
22835 argLen: 3,
22836 resultNotInArgs: true,
22837 faultOnNilArg0: true,
22838 hasSideEffects: true,
22839 reg: regInfo{
22840 inputs: []inputInfo{
22841 {1, 805044223},
22842 {0, 9223372038733561855},
22843 },
22844 outputs: []outputInfo{
22845 {0, 670826495},
22846 },
22847 },
22848 },
22849 {
22850 name: "LoweredAtomicExchange32Variant",
22851 argLen: 3,
22852 resultNotInArgs: true,
22853 faultOnNilArg0: true,
22854 hasSideEffects: true,
22855 reg: regInfo{
22856 inputs: []inputInfo{
22857 {1, 805044223},
22858 {0, 9223372038733561855},
22859 },
22860 outputs: []outputInfo{
22861 {0, 670826495},
22862 },
22863 },
22864 },
22865 {
22866 name: "LoweredAtomicAdd64",
22867 argLen: 3,
22868 resultNotInArgs: true,
22869 faultOnNilArg0: true,
22870 hasSideEffects: true,
22871 unsafePoint: true,
22872 reg: regInfo{
22873 inputs: []inputInfo{
22874 {1, 805044223},
22875 {0, 9223372038733561855},
22876 },
22877 outputs: []outputInfo{
22878 {0, 670826495},
22879 },
22880 },
22881 },
22882 {
22883 name: "LoweredAtomicAdd32",
22884 argLen: 3,
22885 resultNotInArgs: true,
22886 faultOnNilArg0: true,
22887 hasSideEffects: true,
22888 unsafePoint: true,
22889 reg: regInfo{
22890 inputs: []inputInfo{
22891 {1, 805044223},
22892 {0, 9223372038733561855},
22893 },
22894 outputs: []outputInfo{
22895 {0, 670826495},
22896 },
22897 },
22898 },
22899 {
22900 name: "LoweredAtomicAdd64Variant",
22901 argLen: 3,
22902 resultNotInArgs: true,
22903 faultOnNilArg0: true,
22904 hasSideEffects: true,
22905 reg: regInfo{
22906 inputs: []inputInfo{
22907 {1, 805044223},
22908 {0, 9223372038733561855},
22909 },
22910 outputs: []outputInfo{
22911 {0, 670826495},
22912 },
22913 },
22914 },
22915 {
22916 name: "LoweredAtomicAdd32Variant",
22917 argLen: 3,
22918 resultNotInArgs: true,
22919 faultOnNilArg0: true,
22920 hasSideEffects: true,
22921 reg: regInfo{
22922 inputs: []inputInfo{
22923 {1, 805044223},
22924 {0, 9223372038733561855},
22925 },
22926 outputs: []outputInfo{
22927 {0, 670826495},
22928 },
22929 },
22930 },
22931 {
22932 name: "LoweredAtomicCas64",
22933 argLen: 4,
22934 resultNotInArgs: true,
22935 clobberFlags: true,
22936 faultOnNilArg0: true,
22937 hasSideEffects: true,
22938 unsafePoint: true,
22939 reg: regInfo{
22940 inputs: []inputInfo{
22941 {1, 805044223},
22942 {2, 805044223},
22943 {0, 9223372038733561855},
22944 },
22945 outputs: []outputInfo{
22946 {0, 670826495},
22947 },
22948 },
22949 },
22950 {
22951 name: "LoweredAtomicCas32",
22952 argLen: 4,
22953 resultNotInArgs: true,
22954 clobberFlags: true,
22955 faultOnNilArg0: true,
22956 hasSideEffects: true,
22957 unsafePoint: true,
22958 reg: regInfo{
22959 inputs: []inputInfo{
22960 {1, 805044223},
22961 {2, 805044223},
22962 {0, 9223372038733561855},
22963 },
22964 outputs: []outputInfo{
22965 {0, 670826495},
22966 },
22967 },
22968 },
22969 {
22970 name: "LoweredAtomicCas64Variant",
22971 argLen: 4,
22972 resultNotInArgs: true,
22973 clobberFlags: true,
22974 faultOnNilArg0: true,
22975 hasSideEffects: true,
22976 unsafePoint: true,
22977 reg: regInfo{
22978 inputs: []inputInfo{
22979 {1, 805044223},
22980 {2, 805044223},
22981 {0, 9223372038733561855},
22982 },
22983 outputs: []outputInfo{
22984 {0, 670826495},
22985 },
22986 },
22987 },
22988 {
22989 name: "LoweredAtomicCas32Variant",
22990 argLen: 4,
22991 resultNotInArgs: true,
22992 clobberFlags: true,
22993 faultOnNilArg0: true,
22994 hasSideEffects: true,
22995 unsafePoint: true,
22996 reg: regInfo{
22997 inputs: []inputInfo{
22998 {1, 805044223},
22999 {2, 805044223},
23000 {0, 9223372038733561855},
23001 },
23002 outputs: []outputInfo{
23003 {0, 670826495},
23004 },
23005 },
23006 },
23007 {
23008 name: "LoweredAtomicAnd8",
23009 argLen: 3,
23010 resultNotInArgs: true,
23011 needIntTemp: true,
23012 faultOnNilArg0: true,
23013 hasSideEffects: true,
23014 unsafePoint: true,
23015 asm: arm64.AAND,
23016 reg: regInfo{
23017 inputs: []inputInfo{
23018 {1, 805044223},
23019 {0, 9223372038733561855},
23020 },
23021 outputs: []outputInfo{
23022 {0, 670826495},
23023 },
23024 },
23025 },
23026 {
23027 name: "LoweredAtomicOr8",
23028 argLen: 3,
23029 resultNotInArgs: true,
23030 needIntTemp: true,
23031 faultOnNilArg0: true,
23032 hasSideEffects: true,
23033 unsafePoint: true,
23034 asm: arm64.AORR,
23035 reg: regInfo{
23036 inputs: []inputInfo{
23037 {1, 805044223},
23038 {0, 9223372038733561855},
23039 },
23040 outputs: []outputInfo{
23041 {0, 670826495},
23042 },
23043 },
23044 },
23045 {
23046 name: "LoweredAtomicAnd64",
23047 argLen: 3,
23048 resultNotInArgs: true,
23049 needIntTemp: true,
23050 faultOnNilArg0: true,
23051 hasSideEffects: true,
23052 unsafePoint: true,
23053 asm: arm64.AAND,
23054 reg: regInfo{
23055 inputs: []inputInfo{
23056 {1, 805044223},
23057 {0, 9223372038733561855},
23058 },
23059 outputs: []outputInfo{
23060 {0, 670826495},
23061 },
23062 },
23063 },
23064 {
23065 name: "LoweredAtomicOr64",
23066 argLen: 3,
23067 resultNotInArgs: true,
23068 needIntTemp: true,
23069 faultOnNilArg0: true,
23070 hasSideEffects: true,
23071 unsafePoint: true,
23072 asm: arm64.AORR,
23073 reg: regInfo{
23074 inputs: []inputInfo{
23075 {1, 805044223},
23076 {0, 9223372038733561855},
23077 },
23078 outputs: []outputInfo{
23079 {0, 670826495},
23080 },
23081 },
23082 },
23083 {
23084 name: "LoweredAtomicAnd32",
23085 argLen: 3,
23086 resultNotInArgs: true,
23087 needIntTemp: true,
23088 faultOnNilArg0: true,
23089 hasSideEffects: true,
23090 unsafePoint: true,
23091 asm: arm64.AAND,
23092 reg: regInfo{
23093 inputs: []inputInfo{
23094 {1, 805044223},
23095 {0, 9223372038733561855},
23096 },
23097 outputs: []outputInfo{
23098 {0, 670826495},
23099 },
23100 },
23101 },
23102 {
23103 name: "LoweredAtomicOr32",
23104 argLen: 3,
23105 resultNotInArgs: true,
23106 needIntTemp: true,
23107 faultOnNilArg0: true,
23108 hasSideEffects: true,
23109 unsafePoint: true,
23110 asm: arm64.AORR,
23111 reg: regInfo{
23112 inputs: []inputInfo{
23113 {1, 805044223},
23114 {0, 9223372038733561855},
23115 },
23116 outputs: []outputInfo{
23117 {0, 670826495},
23118 },
23119 },
23120 },
23121 {
23122 name: "LoweredAtomicAnd8Variant",
23123 argLen: 3,
23124 resultNotInArgs: true,
23125 faultOnNilArg0: true,
23126 hasSideEffects: true,
23127 unsafePoint: true,
23128 reg: regInfo{
23129 inputs: []inputInfo{
23130 {1, 805044223},
23131 {0, 9223372038733561855},
23132 },
23133 outputs: []outputInfo{
23134 {0, 670826495},
23135 },
23136 },
23137 },
23138 {
23139 name: "LoweredAtomicOr8Variant",
23140 argLen: 3,
23141 resultNotInArgs: true,
23142 faultOnNilArg0: true,
23143 hasSideEffects: true,
23144 reg: regInfo{
23145 inputs: []inputInfo{
23146 {1, 805044223},
23147 {0, 9223372038733561855},
23148 },
23149 outputs: []outputInfo{
23150 {0, 670826495},
23151 },
23152 },
23153 },
23154 {
23155 name: "LoweredAtomicAnd64Variant",
23156 argLen: 3,
23157 resultNotInArgs: true,
23158 faultOnNilArg0: true,
23159 hasSideEffects: true,
23160 unsafePoint: true,
23161 reg: regInfo{
23162 inputs: []inputInfo{
23163 {1, 805044223},
23164 {0, 9223372038733561855},
23165 },
23166 outputs: []outputInfo{
23167 {0, 670826495},
23168 },
23169 },
23170 },
23171 {
23172 name: "LoweredAtomicOr64Variant",
23173 argLen: 3,
23174 resultNotInArgs: true,
23175 faultOnNilArg0: true,
23176 hasSideEffects: true,
23177 reg: regInfo{
23178 inputs: []inputInfo{
23179 {1, 805044223},
23180 {0, 9223372038733561855},
23181 },
23182 outputs: []outputInfo{
23183 {0, 670826495},
23184 },
23185 },
23186 },
23187 {
23188 name: "LoweredAtomicAnd32Variant",
23189 argLen: 3,
23190 resultNotInArgs: true,
23191 faultOnNilArg0: true,
23192 hasSideEffects: true,
23193 unsafePoint: true,
23194 reg: regInfo{
23195 inputs: []inputInfo{
23196 {1, 805044223},
23197 {0, 9223372038733561855},
23198 },
23199 outputs: []outputInfo{
23200 {0, 670826495},
23201 },
23202 },
23203 },
23204 {
23205 name: "LoweredAtomicOr32Variant",
23206 argLen: 3,
23207 resultNotInArgs: true,
23208 faultOnNilArg0: true,
23209 hasSideEffects: true,
23210 reg: regInfo{
23211 inputs: []inputInfo{
23212 {1, 805044223},
23213 {0, 9223372038733561855},
23214 },
23215 outputs: []outputInfo{
23216 {0, 670826495},
23217 },
23218 },
23219 },
23220 {
23221 name: "LoweredWB",
23222 auxType: auxInt64,
23223 argLen: 1,
23224 clobberFlags: true,
23225 reg: regInfo{
23226 clobbers: 9223372035244359680,
23227 outputs: []outputInfo{
23228 {0, 33554432},
23229 },
23230 },
23231 },
23232 {
23233 name: "LoweredPanicBoundsA",
23234 auxType: auxInt64,
23235 argLen: 3,
23236 call: true,
23237 reg: regInfo{
23238 inputs: []inputInfo{
23239 {0, 4},
23240 {1, 8},
23241 },
23242 },
23243 },
23244 {
23245 name: "LoweredPanicBoundsB",
23246 auxType: auxInt64,
23247 argLen: 3,
23248 call: true,
23249 reg: regInfo{
23250 inputs: []inputInfo{
23251 {0, 2},
23252 {1, 4},
23253 },
23254 },
23255 },
23256 {
23257 name: "LoweredPanicBoundsC",
23258 auxType: auxInt64,
23259 argLen: 3,
23260 call: true,
23261 reg: regInfo{
23262 inputs: []inputInfo{
23263 {0, 1},
23264 {1, 2},
23265 },
23266 },
23267 },
23268 {
23269 name: "PRFM",
23270 auxType: auxInt64,
23271 argLen: 2,
23272 hasSideEffects: true,
23273 asm: arm64.APRFM,
23274 reg: regInfo{
23275 inputs: []inputInfo{
23276 {0, 9223372038733561855},
23277 },
23278 },
23279 },
23280 {
23281 name: "DMB",
23282 auxType: auxInt64,
23283 argLen: 1,
23284 hasSideEffects: true,
23285 asm: arm64.ADMB,
23286 reg: regInfo{},
23287 },
23288
23289 {
23290 name: "ADDV",
23291 argLen: 2,
23292 commutative: true,
23293 asm: loong64.AADDVU,
23294 reg: regInfo{
23295 inputs: []inputInfo{
23296 {0, 1073741816},
23297 {1, 1073741816},
23298 },
23299 outputs: []outputInfo{
23300 {0, 1071644664},
23301 },
23302 },
23303 },
23304 {
23305 name: "ADDVconst",
23306 auxType: auxInt64,
23307 argLen: 1,
23308 asm: loong64.AADDVU,
23309 reg: regInfo{
23310 inputs: []inputInfo{
23311 {0, 1073741820},
23312 },
23313 outputs: []outputInfo{
23314 {0, 1071644664},
23315 },
23316 },
23317 },
23318 {
23319 name: "SUBV",
23320 argLen: 2,
23321 asm: loong64.ASUBVU,
23322 reg: regInfo{
23323 inputs: []inputInfo{
23324 {0, 1073741816},
23325 {1, 1073741816},
23326 },
23327 outputs: []outputInfo{
23328 {0, 1071644664},
23329 },
23330 },
23331 },
23332 {
23333 name: "SUBVconst",
23334 auxType: auxInt64,
23335 argLen: 1,
23336 asm: loong64.ASUBVU,
23337 reg: regInfo{
23338 inputs: []inputInfo{
23339 {0, 1073741816},
23340 },
23341 outputs: []outputInfo{
23342 {0, 1071644664},
23343 },
23344 },
23345 },
23346 {
23347 name: "MULV",
23348 argLen: 2,
23349 commutative: true,
23350 asm: loong64.AMULV,
23351 reg: regInfo{
23352 inputs: []inputInfo{
23353 {0, 1073741816},
23354 {1, 1073741816},
23355 },
23356 outputs: []outputInfo{
23357 {0, 1071644664},
23358 },
23359 },
23360 },
23361 {
23362 name: "MULHV",
23363 argLen: 2,
23364 commutative: true,
23365 asm: loong64.AMULHV,
23366 reg: regInfo{
23367 inputs: []inputInfo{
23368 {0, 1073741816},
23369 {1, 1073741816},
23370 },
23371 outputs: []outputInfo{
23372 {0, 1071644664},
23373 },
23374 },
23375 },
23376 {
23377 name: "MULHVU",
23378 argLen: 2,
23379 commutative: true,
23380 asm: loong64.AMULHVU,
23381 reg: regInfo{
23382 inputs: []inputInfo{
23383 {0, 1073741816},
23384 {1, 1073741816},
23385 },
23386 outputs: []outputInfo{
23387 {0, 1071644664},
23388 },
23389 },
23390 },
23391 {
23392 name: "DIVV",
23393 argLen: 2,
23394 asm: loong64.ADIVV,
23395 reg: regInfo{
23396 inputs: []inputInfo{
23397 {0, 1073741816},
23398 {1, 1073741816},
23399 },
23400 outputs: []outputInfo{
23401 {0, 1071644664},
23402 },
23403 },
23404 },
23405 {
23406 name: "DIVVU",
23407 argLen: 2,
23408 asm: loong64.ADIVVU,
23409 reg: regInfo{
23410 inputs: []inputInfo{
23411 {0, 1073741816},
23412 {1, 1073741816},
23413 },
23414 outputs: []outputInfo{
23415 {0, 1071644664},
23416 },
23417 },
23418 },
23419 {
23420 name: "REMV",
23421 argLen: 2,
23422 asm: loong64.AREMV,
23423 reg: regInfo{
23424 inputs: []inputInfo{
23425 {0, 1073741816},
23426 {1, 1073741816},
23427 },
23428 outputs: []outputInfo{
23429 {0, 1071644664},
23430 },
23431 },
23432 },
23433 {
23434 name: "REMVU",
23435 argLen: 2,
23436 asm: loong64.AREMVU,
23437 reg: regInfo{
23438 inputs: []inputInfo{
23439 {0, 1073741816},
23440 {1, 1073741816},
23441 },
23442 outputs: []outputInfo{
23443 {0, 1071644664},
23444 },
23445 },
23446 },
23447 {
23448 name: "ADDF",
23449 argLen: 2,
23450 commutative: true,
23451 asm: loong64.AADDF,
23452 reg: regInfo{
23453 inputs: []inputInfo{
23454 {0, 4611686017353646080},
23455 {1, 4611686017353646080},
23456 },
23457 outputs: []outputInfo{
23458 {0, 4611686017353646080},
23459 },
23460 },
23461 },
23462 {
23463 name: "ADDD",
23464 argLen: 2,
23465 commutative: true,
23466 asm: loong64.AADDD,
23467 reg: regInfo{
23468 inputs: []inputInfo{
23469 {0, 4611686017353646080},
23470 {1, 4611686017353646080},
23471 },
23472 outputs: []outputInfo{
23473 {0, 4611686017353646080},
23474 },
23475 },
23476 },
23477 {
23478 name: "SUBF",
23479 argLen: 2,
23480 asm: loong64.ASUBF,
23481 reg: regInfo{
23482 inputs: []inputInfo{
23483 {0, 4611686017353646080},
23484 {1, 4611686017353646080},
23485 },
23486 outputs: []outputInfo{
23487 {0, 4611686017353646080},
23488 },
23489 },
23490 },
23491 {
23492 name: "SUBD",
23493 argLen: 2,
23494 asm: loong64.ASUBD,
23495 reg: regInfo{
23496 inputs: []inputInfo{
23497 {0, 4611686017353646080},
23498 {1, 4611686017353646080},
23499 },
23500 outputs: []outputInfo{
23501 {0, 4611686017353646080},
23502 },
23503 },
23504 },
23505 {
23506 name: "MULF",
23507 argLen: 2,
23508 commutative: true,
23509 asm: loong64.AMULF,
23510 reg: regInfo{
23511 inputs: []inputInfo{
23512 {0, 4611686017353646080},
23513 {1, 4611686017353646080},
23514 },
23515 outputs: []outputInfo{
23516 {0, 4611686017353646080},
23517 },
23518 },
23519 },
23520 {
23521 name: "MULD",
23522 argLen: 2,
23523 commutative: true,
23524 asm: loong64.AMULD,
23525 reg: regInfo{
23526 inputs: []inputInfo{
23527 {0, 4611686017353646080},
23528 {1, 4611686017353646080},
23529 },
23530 outputs: []outputInfo{
23531 {0, 4611686017353646080},
23532 },
23533 },
23534 },
23535 {
23536 name: "DIVF",
23537 argLen: 2,
23538 asm: loong64.ADIVF,
23539 reg: regInfo{
23540 inputs: []inputInfo{
23541 {0, 4611686017353646080},
23542 {1, 4611686017353646080},
23543 },
23544 outputs: []outputInfo{
23545 {0, 4611686017353646080},
23546 },
23547 },
23548 },
23549 {
23550 name: "DIVD",
23551 argLen: 2,
23552 asm: loong64.ADIVD,
23553 reg: regInfo{
23554 inputs: []inputInfo{
23555 {0, 4611686017353646080},
23556 {1, 4611686017353646080},
23557 },
23558 outputs: []outputInfo{
23559 {0, 4611686017353646080},
23560 },
23561 },
23562 },
23563 {
23564 name: "AND",
23565 argLen: 2,
23566 commutative: true,
23567 asm: loong64.AAND,
23568 reg: regInfo{
23569 inputs: []inputInfo{
23570 {0, 1073741816},
23571 {1, 1073741816},
23572 },
23573 outputs: []outputInfo{
23574 {0, 1071644664},
23575 },
23576 },
23577 },
23578 {
23579 name: "ANDconst",
23580 auxType: auxInt64,
23581 argLen: 1,
23582 asm: loong64.AAND,
23583 reg: regInfo{
23584 inputs: []inputInfo{
23585 {0, 1073741816},
23586 },
23587 outputs: []outputInfo{
23588 {0, 1071644664},
23589 },
23590 },
23591 },
23592 {
23593 name: "OR",
23594 argLen: 2,
23595 commutative: true,
23596 asm: loong64.AOR,
23597 reg: regInfo{
23598 inputs: []inputInfo{
23599 {0, 1073741816},
23600 {1, 1073741816},
23601 },
23602 outputs: []outputInfo{
23603 {0, 1071644664},
23604 },
23605 },
23606 },
23607 {
23608 name: "ORconst",
23609 auxType: auxInt64,
23610 argLen: 1,
23611 asm: loong64.AOR,
23612 reg: regInfo{
23613 inputs: []inputInfo{
23614 {0, 1073741816},
23615 },
23616 outputs: []outputInfo{
23617 {0, 1071644664},
23618 },
23619 },
23620 },
23621 {
23622 name: "XOR",
23623 argLen: 2,
23624 commutative: true,
23625 asm: loong64.AXOR,
23626 reg: regInfo{
23627 inputs: []inputInfo{
23628 {0, 1073741816},
23629 {1, 1073741816},
23630 },
23631 outputs: []outputInfo{
23632 {0, 1071644664},
23633 },
23634 },
23635 },
23636 {
23637 name: "XORconst",
23638 auxType: auxInt64,
23639 argLen: 1,
23640 asm: loong64.AXOR,
23641 reg: regInfo{
23642 inputs: []inputInfo{
23643 {0, 1073741816},
23644 },
23645 outputs: []outputInfo{
23646 {0, 1071644664},
23647 },
23648 },
23649 },
23650 {
23651 name: "NOR",
23652 argLen: 2,
23653 commutative: true,
23654 asm: loong64.ANOR,
23655 reg: regInfo{
23656 inputs: []inputInfo{
23657 {0, 1073741816},
23658 {1, 1073741816},
23659 },
23660 outputs: []outputInfo{
23661 {0, 1071644664},
23662 },
23663 },
23664 },
23665 {
23666 name: "NORconst",
23667 auxType: auxInt64,
23668 argLen: 1,
23669 asm: loong64.ANOR,
23670 reg: regInfo{
23671 inputs: []inputInfo{
23672 {0, 1073741816},
23673 },
23674 outputs: []outputInfo{
23675 {0, 1071644664},
23676 },
23677 },
23678 },
23679 {
23680 name: "NEGV",
23681 argLen: 1,
23682 reg: regInfo{
23683 inputs: []inputInfo{
23684 {0, 1073741816},
23685 },
23686 outputs: []outputInfo{
23687 {0, 1071644664},
23688 },
23689 },
23690 },
23691 {
23692 name: "NEGF",
23693 argLen: 1,
23694 asm: loong64.ANEGF,
23695 reg: regInfo{
23696 inputs: []inputInfo{
23697 {0, 4611686017353646080},
23698 },
23699 outputs: []outputInfo{
23700 {0, 4611686017353646080},
23701 },
23702 },
23703 },
23704 {
23705 name: "NEGD",
23706 argLen: 1,
23707 asm: loong64.ANEGD,
23708 reg: regInfo{
23709 inputs: []inputInfo{
23710 {0, 4611686017353646080},
23711 },
23712 outputs: []outputInfo{
23713 {0, 4611686017353646080},
23714 },
23715 },
23716 },
23717 {
23718 name: "SQRTD",
23719 argLen: 1,
23720 asm: loong64.ASQRTD,
23721 reg: regInfo{
23722 inputs: []inputInfo{
23723 {0, 4611686017353646080},
23724 },
23725 outputs: []outputInfo{
23726 {0, 4611686017353646080},
23727 },
23728 },
23729 },
23730 {
23731 name: "SQRTF",
23732 argLen: 1,
23733 asm: loong64.ASQRTF,
23734 reg: regInfo{
23735 inputs: []inputInfo{
23736 {0, 4611686017353646080},
23737 },
23738 outputs: []outputInfo{
23739 {0, 4611686017353646080},
23740 },
23741 },
23742 },
23743 {
23744 name: "MASKEQZ",
23745 argLen: 2,
23746 asm: loong64.AMASKEQZ,
23747 reg: regInfo{
23748 inputs: []inputInfo{
23749 {0, 1073741816},
23750 {1, 1073741816},
23751 },
23752 outputs: []outputInfo{
23753 {0, 1071644664},
23754 },
23755 },
23756 },
23757 {
23758 name: "MASKNEZ",
23759 argLen: 2,
23760 asm: loong64.AMASKNEZ,
23761 reg: regInfo{
23762 inputs: []inputInfo{
23763 {0, 1073741816},
23764 {1, 1073741816},
23765 },
23766 outputs: []outputInfo{
23767 {0, 1071644664},
23768 },
23769 },
23770 },
23771 {
23772 name: "SLLV",
23773 argLen: 2,
23774 asm: loong64.ASLLV,
23775 reg: regInfo{
23776 inputs: []inputInfo{
23777 {0, 1073741816},
23778 {1, 1073741816},
23779 },
23780 outputs: []outputInfo{
23781 {0, 1071644664},
23782 },
23783 },
23784 },
23785 {
23786 name: "SLLVconst",
23787 auxType: auxInt64,
23788 argLen: 1,
23789 asm: loong64.ASLLV,
23790 reg: regInfo{
23791 inputs: []inputInfo{
23792 {0, 1073741816},
23793 },
23794 outputs: []outputInfo{
23795 {0, 1071644664},
23796 },
23797 },
23798 },
23799 {
23800 name: "SRLV",
23801 argLen: 2,
23802 asm: loong64.ASRLV,
23803 reg: regInfo{
23804 inputs: []inputInfo{
23805 {0, 1073741816},
23806 {1, 1073741816},
23807 },
23808 outputs: []outputInfo{
23809 {0, 1071644664},
23810 },
23811 },
23812 },
23813 {
23814 name: "SRLVconst",
23815 auxType: auxInt64,
23816 argLen: 1,
23817 asm: loong64.ASRLV,
23818 reg: regInfo{
23819 inputs: []inputInfo{
23820 {0, 1073741816},
23821 },
23822 outputs: []outputInfo{
23823 {0, 1071644664},
23824 },
23825 },
23826 },
23827 {
23828 name: "SRAV",
23829 argLen: 2,
23830 asm: loong64.ASRAV,
23831 reg: regInfo{
23832 inputs: []inputInfo{
23833 {0, 1073741816},
23834 {1, 1073741816},
23835 },
23836 outputs: []outputInfo{
23837 {0, 1071644664},
23838 },
23839 },
23840 },
23841 {
23842 name: "SRAVconst",
23843 auxType: auxInt64,
23844 argLen: 1,
23845 asm: loong64.ASRAV,
23846 reg: regInfo{
23847 inputs: []inputInfo{
23848 {0, 1073741816},
23849 },
23850 outputs: []outputInfo{
23851 {0, 1071644664},
23852 },
23853 },
23854 },
23855 {
23856 name: "ROTR",
23857 argLen: 2,
23858 asm: loong64.AROTR,
23859 reg: regInfo{
23860 inputs: []inputInfo{
23861 {0, 1073741816},
23862 {1, 1073741816},
23863 },
23864 outputs: []outputInfo{
23865 {0, 1071644664},
23866 },
23867 },
23868 },
23869 {
23870 name: "ROTRV",
23871 argLen: 2,
23872 asm: loong64.AROTRV,
23873 reg: regInfo{
23874 inputs: []inputInfo{
23875 {0, 1073741816},
23876 {1, 1073741816},
23877 },
23878 outputs: []outputInfo{
23879 {0, 1071644664},
23880 },
23881 },
23882 },
23883 {
23884 name: "ROTRconst",
23885 auxType: auxInt64,
23886 argLen: 1,
23887 asm: loong64.AROTR,
23888 reg: regInfo{
23889 inputs: []inputInfo{
23890 {0, 1073741816},
23891 },
23892 outputs: []outputInfo{
23893 {0, 1071644664},
23894 },
23895 },
23896 },
23897 {
23898 name: "ROTRVconst",
23899 auxType: auxInt64,
23900 argLen: 1,
23901 asm: loong64.AROTRV,
23902 reg: regInfo{
23903 inputs: []inputInfo{
23904 {0, 1073741816},
23905 },
23906 outputs: []outputInfo{
23907 {0, 1071644664},
23908 },
23909 },
23910 },
23911 {
23912 name: "SGT",
23913 argLen: 2,
23914 asm: loong64.ASGT,
23915 reg: regInfo{
23916 inputs: []inputInfo{
23917 {0, 1073741816},
23918 {1, 1073741816},
23919 },
23920 outputs: []outputInfo{
23921 {0, 1071644664},
23922 },
23923 },
23924 },
23925 {
23926 name: "SGTconst",
23927 auxType: auxInt64,
23928 argLen: 1,
23929 asm: loong64.ASGT,
23930 reg: regInfo{
23931 inputs: []inputInfo{
23932 {0, 1073741816},
23933 },
23934 outputs: []outputInfo{
23935 {0, 1071644664},
23936 },
23937 },
23938 },
23939 {
23940 name: "SGTU",
23941 argLen: 2,
23942 asm: loong64.ASGTU,
23943 reg: regInfo{
23944 inputs: []inputInfo{
23945 {0, 1073741816},
23946 {1, 1073741816},
23947 },
23948 outputs: []outputInfo{
23949 {0, 1071644664},
23950 },
23951 },
23952 },
23953 {
23954 name: "SGTUconst",
23955 auxType: auxInt64,
23956 argLen: 1,
23957 asm: loong64.ASGTU,
23958 reg: regInfo{
23959 inputs: []inputInfo{
23960 {0, 1073741816},
23961 },
23962 outputs: []outputInfo{
23963 {0, 1071644664},
23964 },
23965 },
23966 },
23967 {
23968 name: "CMPEQF",
23969 argLen: 2,
23970 asm: loong64.ACMPEQF,
23971 reg: regInfo{
23972 inputs: []inputInfo{
23973 {0, 4611686017353646080},
23974 {1, 4611686017353646080},
23975 },
23976 },
23977 },
23978 {
23979 name: "CMPEQD",
23980 argLen: 2,
23981 asm: loong64.ACMPEQD,
23982 reg: regInfo{
23983 inputs: []inputInfo{
23984 {0, 4611686017353646080},
23985 {1, 4611686017353646080},
23986 },
23987 },
23988 },
23989 {
23990 name: "CMPGEF",
23991 argLen: 2,
23992 asm: loong64.ACMPGEF,
23993 reg: regInfo{
23994 inputs: []inputInfo{
23995 {0, 4611686017353646080},
23996 {1, 4611686017353646080},
23997 },
23998 },
23999 },
24000 {
24001 name: "CMPGED",
24002 argLen: 2,
24003 asm: loong64.ACMPGED,
24004 reg: regInfo{
24005 inputs: []inputInfo{
24006 {0, 4611686017353646080},
24007 {1, 4611686017353646080},
24008 },
24009 },
24010 },
24011 {
24012 name: "CMPGTF",
24013 argLen: 2,
24014 asm: loong64.ACMPGTF,
24015 reg: regInfo{
24016 inputs: []inputInfo{
24017 {0, 4611686017353646080},
24018 {1, 4611686017353646080},
24019 },
24020 },
24021 },
24022 {
24023 name: "CMPGTD",
24024 argLen: 2,
24025 asm: loong64.ACMPGTD,
24026 reg: regInfo{
24027 inputs: []inputInfo{
24028 {0, 4611686017353646080},
24029 {1, 4611686017353646080},
24030 },
24031 },
24032 },
24033 {
24034 name: "MOVVconst",
24035 auxType: auxInt64,
24036 argLen: 0,
24037 rematerializeable: true,
24038 asm: loong64.AMOVV,
24039 reg: regInfo{
24040 outputs: []outputInfo{
24041 {0, 1071644664},
24042 },
24043 },
24044 },
24045 {
24046 name: "MOVFconst",
24047 auxType: auxFloat64,
24048 argLen: 0,
24049 rematerializeable: true,
24050 asm: loong64.AMOVF,
24051 reg: regInfo{
24052 outputs: []outputInfo{
24053 {0, 4611686017353646080},
24054 },
24055 },
24056 },
24057 {
24058 name: "MOVDconst",
24059 auxType: auxFloat64,
24060 argLen: 0,
24061 rematerializeable: true,
24062 asm: loong64.AMOVD,
24063 reg: regInfo{
24064 outputs: []outputInfo{
24065 {0, 4611686017353646080},
24066 },
24067 },
24068 },
24069 {
24070 name: "MOVVaddr",
24071 auxType: auxSymOff,
24072 argLen: 1,
24073 rematerializeable: true,
24074 symEffect: SymAddr,
24075 asm: loong64.AMOVV,
24076 reg: regInfo{
24077 inputs: []inputInfo{
24078 {0, 4611686018427387908},
24079 },
24080 outputs: []outputInfo{
24081 {0, 1071644664},
24082 },
24083 },
24084 },
24085 {
24086 name: "MOVBload",
24087 auxType: auxSymOff,
24088 argLen: 2,
24089 faultOnNilArg0: true,
24090 symEffect: SymRead,
24091 asm: loong64.AMOVB,
24092 reg: regInfo{
24093 inputs: []inputInfo{
24094 {0, 4611686019501129724},
24095 },
24096 outputs: []outputInfo{
24097 {0, 1071644664},
24098 },
24099 },
24100 },
24101 {
24102 name: "MOVBUload",
24103 auxType: auxSymOff,
24104 argLen: 2,
24105 faultOnNilArg0: true,
24106 symEffect: SymRead,
24107 asm: loong64.AMOVBU,
24108 reg: regInfo{
24109 inputs: []inputInfo{
24110 {0, 4611686019501129724},
24111 },
24112 outputs: []outputInfo{
24113 {0, 1071644664},
24114 },
24115 },
24116 },
24117 {
24118 name: "MOVHload",
24119 auxType: auxSymOff,
24120 argLen: 2,
24121 faultOnNilArg0: true,
24122 symEffect: SymRead,
24123 asm: loong64.AMOVH,
24124 reg: regInfo{
24125 inputs: []inputInfo{
24126 {0, 4611686019501129724},
24127 },
24128 outputs: []outputInfo{
24129 {0, 1071644664},
24130 },
24131 },
24132 },
24133 {
24134 name: "MOVHUload",
24135 auxType: auxSymOff,
24136 argLen: 2,
24137 faultOnNilArg0: true,
24138 symEffect: SymRead,
24139 asm: loong64.AMOVHU,
24140 reg: regInfo{
24141 inputs: []inputInfo{
24142 {0, 4611686019501129724},
24143 },
24144 outputs: []outputInfo{
24145 {0, 1071644664},
24146 },
24147 },
24148 },
24149 {
24150 name: "MOVWload",
24151 auxType: auxSymOff,
24152 argLen: 2,
24153 faultOnNilArg0: true,
24154 symEffect: SymRead,
24155 asm: loong64.AMOVW,
24156 reg: regInfo{
24157 inputs: []inputInfo{
24158 {0, 4611686019501129724},
24159 },
24160 outputs: []outputInfo{
24161 {0, 1071644664},
24162 },
24163 },
24164 },
24165 {
24166 name: "MOVWUload",
24167 auxType: auxSymOff,
24168 argLen: 2,
24169 faultOnNilArg0: true,
24170 symEffect: SymRead,
24171 asm: loong64.AMOVWU,
24172 reg: regInfo{
24173 inputs: []inputInfo{
24174 {0, 4611686019501129724},
24175 },
24176 outputs: []outputInfo{
24177 {0, 1071644664},
24178 },
24179 },
24180 },
24181 {
24182 name: "MOVVload",
24183 auxType: auxSymOff,
24184 argLen: 2,
24185 faultOnNilArg0: true,
24186 symEffect: SymRead,
24187 asm: loong64.AMOVV,
24188 reg: regInfo{
24189 inputs: []inputInfo{
24190 {0, 4611686019501129724},
24191 },
24192 outputs: []outputInfo{
24193 {0, 1071644664},
24194 },
24195 },
24196 },
24197 {
24198 name: "MOVFload",
24199 auxType: auxSymOff,
24200 argLen: 2,
24201 faultOnNilArg0: true,
24202 symEffect: SymRead,
24203 asm: loong64.AMOVF,
24204 reg: regInfo{
24205 inputs: []inputInfo{
24206 {0, 4611686019501129724},
24207 },
24208 outputs: []outputInfo{
24209 {0, 4611686017353646080},
24210 },
24211 },
24212 },
24213 {
24214 name: "MOVDload",
24215 auxType: auxSymOff,
24216 argLen: 2,
24217 faultOnNilArg0: true,
24218 symEffect: SymRead,
24219 asm: loong64.AMOVD,
24220 reg: regInfo{
24221 inputs: []inputInfo{
24222 {0, 4611686019501129724},
24223 },
24224 outputs: []outputInfo{
24225 {0, 4611686017353646080},
24226 },
24227 },
24228 },
24229 {
24230 name: "MOVBstore",
24231 auxType: auxSymOff,
24232 argLen: 3,
24233 faultOnNilArg0: true,
24234 symEffect: SymWrite,
24235 asm: loong64.AMOVB,
24236 reg: regInfo{
24237 inputs: []inputInfo{
24238 {1, 1073741816},
24239 {0, 4611686019501129724},
24240 },
24241 },
24242 },
24243 {
24244 name: "MOVHstore",
24245 auxType: auxSymOff,
24246 argLen: 3,
24247 faultOnNilArg0: true,
24248 symEffect: SymWrite,
24249 asm: loong64.AMOVH,
24250 reg: regInfo{
24251 inputs: []inputInfo{
24252 {1, 1073741816},
24253 {0, 4611686019501129724},
24254 },
24255 },
24256 },
24257 {
24258 name: "MOVWstore",
24259 auxType: auxSymOff,
24260 argLen: 3,
24261 faultOnNilArg0: true,
24262 symEffect: SymWrite,
24263 asm: loong64.AMOVW,
24264 reg: regInfo{
24265 inputs: []inputInfo{
24266 {1, 1073741816},
24267 {0, 4611686019501129724},
24268 },
24269 },
24270 },
24271 {
24272 name: "MOVVstore",
24273 auxType: auxSymOff,
24274 argLen: 3,
24275 faultOnNilArg0: true,
24276 symEffect: SymWrite,
24277 asm: loong64.AMOVV,
24278 reg: regInfo{
24279 inputs: []inputInfo{
24280 {1, 1073741816},
24281 {0, 4611686019501129724},
24282 },
24283 },
24284 },
24285 {
24286 name: "MOVFstore",
24287 auxType: auxSymOff,
24288 argLen: 3,
24289 faultOnNilArg0: true,
24290 symEffect: SymWrite,
24291 asm: loong64.AMOVF,
24292 reg: regInfo{
24293 inputs: []inputInfo{
24294 {0, 4611686019501129724},
24295 {1, 4611686017353646080},
24296 },
24297 },
24298 },
24299 {
24300 name: "MOVDstore",
24301 auxType: auxSymOff,
24302 argLen: 3,
24303 faultOnNilArg0: true,
24304 symEffect: SymWrite,
24305 asm: loong64.AMOVD,
24306 reg: regInfo{
24307 inputs: []inputInfo{
24308 {0, 4611686019501129724},
24309 {1, 4611686017353646080},
24310 },
24311 },
24312 },
24313 {
24314 name: "MOVBstorezero",
24315 auxType: auxSymOff,
24316 argLen: 2,
24317 faultOnNilArg0: true,
24318 symEffect: SymWrite,
24319 asm: loong64.AMOVB,
24320 reg: regInfo{
24321 inputs: []inputInfo{
24322 {0, 4611686019501129724},
24323 },
24324 },
24325 },
24326 {
24327 name: "MOVHstorezero",
24328 auxType: auxSymOff,
24329 argLen: 2,
24330 faultOnNilArg0: true,
24331 symEffect: SymWrite,
24332 asm: loong64.AMOVH,
24333 reg: regInfo{
24334 inputs: []inputInfo{
24335 {0, 4611686019501129724},
24336 },
24337 },
24338 },
24339 {
24340 name: "MOVWstorezero",
24341 auxType: auxSymOff,
24342 argLen: 2,
24343 faultOnNilArg0: true,
24344 symEffect: SymWrite,
24345 asm: loong64.AMOVW,
24346 reg: regInfo{
24347 inputs: []inputInfo{
24348 {0, 4611686019501129724},
24349 },
24350 },
24351 },
24352 {
24353 name: "MOVVstorezero",
24354 auxType: auxSymOff,
24355 argLen: 2,
24356 faultOnNilArg0: true,
24357 symEffect: SymWrite,
24358 asm: loong64.AMOVV,
24359 reg: regInfo{
24360 inputs: []inputInfo{
24361 {0, 4611686019501129724},
24362 },
24363 },
24364 },
24365 {
24366 name: "MOVBreg",
24367 argLen: 1,
24368 asm: loong64.AMOVB,
24369 reg: regInfo{
24370 inputs: []inputInfo{
24371 {0, 1073741816},
24372 },
24373 outputs: []outputInfo{
24374 {0, 1071644664},
24375 },
24376 },
24377 },
24378 {
24379 name: "MOVBUreg",
24380 argLen: 1,
24381 asm: loong64.AMOVBU,
24382 reg: regInfo{
24383 inputs: []inputInfo{
24384 {0, 1073741816},
24385 },
24386 outputs: []outputInfo{
24387 {0, 1071644664},
24388 },
24389 },
24390 },
24391 {
24392 name: "MOVHreg",
24393 argLen: 1,
24394 asm: loong64.AMOVH,
24395 reg: regInfo{
24396 inputs: []inputInfo{
24397 {0, 1073741816},
24398 },
24399 outputs: []outputInfo{
24400 {0, 1071644664},
24401 },
24402 },
24403 },
24404 {
24405 name: "MOVHUreg",
24406 argLen: 1,
24407 asm: loong64.AMOVHU,
24408 reg: regInfo{
24409 inputs: []inputInfo{
24410 {0, 1073741816},
24411 },
24412 outputs: []outputInfo{
24413 {0, 1071644664},
24414 },
24415 },
24416 },
24417 {
24418 name: "MOVWreg",
24419 argLen: 1,
24420 asm: loong64.AMOVW,
24421 reg: regInfo{
24422 inputs: []inputInfo{
24423 {0, 1073741816},
24424 },
24425 outputs: []outputInfo{
24426 {0, 1071644664},
24427 },
24428 },
24429 },
24430 {
24431 name: "MOVWUreg",
24432 argLen: 1,
24433 asm: loong64.AMOVWU,
24434 reg: regInfo{
24435 inputs: []inputInfo{
24436 {0, 1073741816},
24437 },
24438 outputs: []outputInfo{
24439 {0, 1071644664},
24440 },
24441 },
24442 },
24443 {
24444 name: "MOVVreg",
24445 argLen: 1,
24446 asm: loong64.AMOVV,
24447 reg: regInfo{
24448 inputs: []inputInfo{
24449 {0, 1073741816},
24450 },
24451 outputs: []outputInfo{
24452 {0, 1071644664},
24453 },
24454 },
24455 },
24456 {
24457 name: "MOVVnop",
24458 argLen: 1,
24459 resultInArg0: true,
24460 reg: regInfo{
24461 inputs: []inputInfo{
24462 {0, 1071644664},
24463 },
24464 outputs: []outputInfo{
24465 {0, 1071644664},
24466 },
24467 },
24468 },
24469 {
24470 name: "MOVWF",
24471 argLen: 1,
24472 asm: loong64.AMOVWF,
24473 reg: regInfo{
24474 inputs: []inputInfo{
24475 {0, 4611686017353646080},
24476 },
24477 outputs: []outputInfo{
24478 {0, 4611686017353646080},
24479 },
24480 },
24481 },
24482 {
24483 name: "MOVWD",
24484 argLen: 1,
24485 asm: loong64.AMOVWD,
24486 reg: regInfo{
24487 inputs: []inputInfo{
24488 {0, 4611686017353646080},
24489 },
24490 outputs: []outputInfo{
24491 {0, 4611686017353646080},
24492 },
24493 },
24494 },
24495 {
24496 name: "MOVVF",
24497 argLen: 1,
24498 asm: loong64.AMOVVF,
24499 reg: regInfo{
24500 inputs: []inputInfo{
24501 {0, 4611686017353646080},
24502 },
24503 outputs: []outputInfo{
24504 {0, 4611686017353646080},
24505 },
24506 },
24507 },
24508 {
24509 name: "MOVVD",
24510 argLen: 1,
24511 asm: loong64.AMOVVD,
24512 reg: regInfo{
24513 inputs: []inputInfo{
24514 {0, 4611686017353646080},
24515 },
24516 outputs: []outputInfo{
24517 {0, 4611686017353646080},
24518 },
24519 },
24520 },
24521 {
24522 name: "TRUNCFW",
24523 argLen: 1,
24524 asm: loong64.ATRUNCFW,
24525 reg: regInfo{
24526 inputs: []inputInfo{
24527 {0, 4611686017353646080},
24528 },
24529 outputs: []outputInfo{
24530 {0, 4611686017353646080},
24531 },
24532 },
24533 },
24534 {
24535 name: "TRUNCDW",
24536 argLen: 1,
24537 asm: loong64.ATRUNCDW,
24538 reg: regInfo{
24539 inputs: []inputInfo{
24540 {0, 4611686017353646080},
24541 },
24542 outputs: []outputInfo{
24543 {0, 4611686017353646080},
24544 },
24545 },
24546 },
24547 {
24548 name: "TRUNCFV",
24549 argLen: 1,
24550 asm: loong64.ATRUNCFV,
24551 reg: regInfo{
24552 inputs: []inputInfo{
24553 {0, 4611686017353646080},
24554 },
24555 outputs: []outputInfo{
24556 {0, 4611686017353646080},
24557 },
24558 },
24559 },
24560 {
24561 name: "TRUNCDV",
24562 argLen: 1,
24563 asm: loong64.ATRUNCDV,
24564 reg: regInfo{
24565 inputs: []inputInfo{
24566 {0, 4611686017353646080},
24567 },
24568 outputs: []outputInfo{
24569 {0, 4611686017353646080},
24570 },
24571 },
24572 },
24573 {
24574 name: "MOVFD",
24575 argLen: 1,
24576 asm: loong64.AMOVFD,
24577 reg: regInfo{
24578 inputs: []inputInfo{
24579 {0, 4611686017353646080},
24580 },
24581 outputs: []outputInfo{
24582 {0, 4611686017353646080},
24583 },
24584 },
24585 },
24586 {
24587 name: "MOVDF",
24588 argLen: 1,
24589 asm: loong64.AMOVDF,
24590 reg: regInfo{
24591 inputs: []inputInfo{
24592 {0, 4611686017353646080},
24593 },
24594 outputs: []outputInfo{
24595 {0, 4611686017353646080},
24596 },
24597 },
24598 },
24599 {
24600 name: "CALLstatic",
24601 auxType: auxCallOff,
24602 argLen: -1,
24603 clobberFlags: true,
24604 call: true,
24605 reg: regInfo{
24606 clobbers: 4611686018427387896,
24607 },
24608 },
24609 {
24610 name: "CALLtail",
24611 auxType: auxCallOff,
24612 argLen: -1,
24613 clobberFlags: true,
24614 call: true,
24615 tailCall: true,
24616 reg: regInfo{
24617 clobbers: 4611686018427387896,
24618 },
24619 },
24620 {
24621 name: "CALLclosure",
24622 auxType: auxCallOff,
24623 argLen: -1,
24624 clobberFlags: true,
24625 call: true,
24626 reg: regInfo{
24627 inputs: []inputInfo{
24628 {1, 268435456},
24629 {0, 1071644668},
24630 },
24631 clobbers: 4611686018427387896,
24632 },
24633 },
24634 {
24635 name: "CALLinter",
24636 auxType: auxCallOff,
24637 argLen: -1,
24638 clobberFlags: true,
24639 call: true,
24640 reg: regInfo{
24641 inputs: []inputInfo{
24642 {0, 1071644664},
24643 },
24644 clobbers: 4611686018427387896,
24645 },
24646 },
24647 {
24648 name: "DUFFZERO",
24649 auxType: auxInt64,
24650 argLen: 2,
24651 faultOnNilArg0: true,
24652 reg: regInfo{
24653 inputs: []inputInfo{
24654 {0, 524288},
24655 },
24656 clobbers: 524290,
24657 },
24658 },
24659 {
24660 name: "DUFFCOPY",
24661 auxType: auxInt64,
24662 argLen: 3,
24663 faultOnNilArg0: true,
24664 faultOnNilArg1: true,
24665 reg: regInfo{
24666 inputs: []inputInfo{
24667 {0, 1048576},
24668 {1, 524288},
24669 },
24670 clobbers: 1572866,
24671 },
24672 },
24673 {
24674 name: "LoweredZero",
24675 auxType: auxInt64,
24676 argLen: 3,
24677 faultOnNilArg0: true,
24678 reg: regInfo{
24679 inputs: []inputInfo{
24680 {0, 524288},
24681 {1, 1071644664},
24682 },
24683 clobbers: 524288,
24684 },
24685 },
24686 {
24687 name: "LoweredMove",
24688 auxType: auxInt64,
24689 argLen: 4,
24690 faultOnNilArg0: true,
24691 faultOnNilArg1: true,
24692 reg: regInfo{
24693 inputs: []inputInfo{
24694 {0, 1048576},
24695 {1, 524288},
24696 {2, 1071644664},
24697 },
24698 clobbers: 1572864,
24699 },
24700 },
24701 {
24702 name: "LoweredAtomicLoad8",
24703 argLen: 2,
24704 faultOnNilArg0: true,
24705 reg: regInfo{
24706 inputs: []inputInfo{
24707 {0, 4611686019501129724},
24708 },
24709 outputs: []outputInfo{
24710 {0, 1071644664},
24711 },
24712 },
24713 },
24714 {
24715 name: "LoweredAtomicLoad32",
24716 argLen: 2,
24717 faultOnNilArg0: true,
24718 reg: regInfo{
24719 inputs: []inputInfo{
24720 {0, 4611686019501129724},
24721 },
24722 outputs: []outputInfo{
24723 {0, 1071644664},
24724 },
24725 },
24726 },
24727 {
24728 name: "LoweredAtomicLoad64",
24729 argLen: 2,
24730 faultOnNilArg0: true,
24731 reg: regInfo{
24732 inputs: []inputInfo{
24733 {0, 4611686019501129724},
24734 },
24735 outputs: []outputInfo{
24736 {0, 1071644664},
24737 },
24738 },
24739 },
24740 {
24741 name: "LoweredAtomicStore8",
24742 argLen: 3,
24743 faultOnNilArg0: true,
24744 hasSideEffects: true,
24745 reg: regInfo{
24746 inputs: []inputInfo{
24747 {1, 1073741816},
24748 {0, 4611686019501129724},
24749 },
24750 },
24751 },
24752 {
24753 name: "LoweredAtomicStore32",
24754 argLen: 3,
24755 faultOnNilArg0: true,
24756 hasSideEffects: true,
24757 reg: regInfo{
24758 inputs: []inputInfo{
24759 {1, 1073741816},
24760 {0, 4611686019501129724},
24761 },
24762 },
24763 },
24764 {
24765 name: "LoweredAtomicStore64",
24766 argLen: 3,
24767 faultOnNilArg0: true,
24768 hasSideEffects: true,
24769 reg: regInfo{
24770 inputs: []inputInfo{
24771 {1, 1073741816},
24772 {0, 4611686019501129724},
24773 },
24774 },
24775 },
24776 {
24777 name: "LoweredAtomicStorezero32",
24778 argLen: 2,
24779 faultOnNilArg0: true,
24780 hasSideEffects: true,
24781 reg: regInfo{
24782 inputs: []inputInfo{
24783 {0, 4611686019501129724},
24784 },
24785 },
24786 },
24787 {
24788 name: "LoweredAtomicStorezero64",
24789 argLen: 2,
24790 faultOnNilArg0: true,
24791 hasSideEffects: true,
24792 reg: regInfo{
24793 inputs: []inputInfo{
24794 {0, 4611686019501129724},
24795 },
24796 },
24797 },
24798 {
24799 name: "LoweredAtomicExchange32",
24800 argLen: 3,
24801 resultNotInArgs: true,
24802 faultOnNilArg0: true,
24803 hasSideEffects: true,
24804 unsafePoint: true,
24805 reg: regInfo{
24806 inputs: []inputInfo{
24807 {1, 1073741816},
24808 {0, 4611686019501129724},
24809 },
24810 outputs: []outputInfo{
24811 {0, 1071644664},
24812 },
24813 },
24814 },
24815 {
24816 name: "LoweredAtomicExchange64",
24817 argLen: 3,
24818 resultNotInArgs: true,
24819 faultOnNilArg0: true,
24820 hasSideEffects: true,
24821 unsafePoint: true,
24822 reg: regInfo{
24823 inputs: []inputInfo{
24824 {1, 1073741816},
24825 {0, 4611686019501129724},
24826 },
24827 outputs: []outputInfo{
24828 {0, 1071644664},
24829 },
24830 },
24831 },
24832 {
24833 name: "LoweredAtomicAdd32",
24834 argLen: 3,
24835 resultNotInArgs: true,
24836 faultOnNilArg0: true,
24837 hasSideEffects: true,
24838 unsafePoint: true,
24839 reg: regInfo{
24840 inputs: []inputInfo{
24841 {1, 1073741816},
24842 {0, 4611686019501129724},
24843 },
24844 outputs: []outputInfo{
24845 {0, 1071644664},
24846 },
24847 },
24848 },
24849 {
24850 name: "LoweredAtomicAdd64",
24851 argLen: 3,
24852 resultNotInArgs: true,
24853 faultOnNilArg0: true,
24854 hasSideEffects: true,
24855 unsafePoint: true,
24856 reg: regInfo{
24857 inputs: []inputInfo{
24858 {1, 1073741816},
24859 {0, 4611686019501129724},
24860 },
24861 outputs: []outputInfo{
24862 {0, 1071644664},
24863 },
24864 },
24865 },
24866 {
24867 name: "LoweredAtomicAddconst32",
24868 auxType: auxInt32,
24869 argLen: 2,
24870 resultNotInArgs: true,
24871 faultOnNilArg0: true,
24872 hasSideEffects: true,
24873 unsafePoint: true,
24874 reg: regInfo{
24875 inputs: []inputInfo{
24876 {0, 4611686019501129724},
24877 },
24878 outputs: []outputInfo{
24879 {0, 1071644664},
24880 },
24881 },
24882 },
24883 {
24884 name: "LoweredAtomicAddconst64",
24885 auxType: auxInt64,
24886 argLen: 2,
24887 resultNotInArgs: true,
24888 faultOnNilArg0: true,
24889 hasSideEffects: true,
24890 unsafePoint: true,
24891 reg: regInfo{
24892 inputs: []inputInfo{
24893 {0, 4611686019501129724},
24894 },
24895 outputs: []outputInfo{
24896 {0, 1071644664},
24897 },
24898 },
24899 },
24900 {
24901 name: "LoweredAtomicCas32",
24902 argLen: 4,
24903 resultNotInArgs: true,
24904 faultOnNilArg0: true,
24905 hasSideEffects: true,
24906 unsafePoint: true,
24907 reg: regInfo{
24908 inputs: []inputInfo{
24909 {1, 1073741816},
24910 {2, 1073741816},
24911 {0, 4611686019501129724},
24912 },
24913 outputs: []outputInfo{
24914 {0, 1071644664},
24915 },
24916 },
24917 },
24918 {
24919 name: "LoweredAtomicCas64",
24920 argLen: 4,
24921 resultNotInArgs: true,
24922 faultOnNilArg0: true,
24923 hasSideEffects: true,
24924 unsafePoint: true,
24925 reg: regInfo{
24926 inputs: []inputInfo{
24927 {1, 1073741816},
24928 {2, 1073741816},
24929 {0, 4611686019501129724},
24930 },
24931 outputs: []outputInfo{
24932 {0, 1071644664},
24933 },
24934 },
24935 },
24936 {
24937 name: "LoweredNilCheck",
24938 argLen: 2,
24939 nilCheck: true,
24940 faultOnNilArg0: true,
24941 reg: regInfo{
24942 inputs: []inputInfo{
24943 {0, 1073741816},
24944 },
24945 },
24946 },
24947 {
24948 name: "FPFlagTrue",
24949 argLen: 1,
24950 reg: regInfo{
24951 outputs: []outputInfo{
24952 {0, 1071644664},
24953 },
24954 },
24955 },
24956 {
24957 name: "FPFlagFalse",
24958 argLen: 1,
24959 reg: regInfo{
24960 outputs: []outputInfo{
24961 {0, 1071644664},
24962 },
24963 },
24964 },
24965 {
24966 name: "LoweredGetClosurePtr",
24967 argLen: 0,
24968 zeroWidth: true,
24969 reg: regInfo{
24970 outputs: []outputInfo{
24971 {0, 268435456},
24972 },
24973 },
24974 },
24975 {
24976 name: "LoweredGetCallerSP",
24977 argLen: 1,
24978 rematerializeable: true,
24979 reg: regInfo{
24980 outputs: []outputInfo{
24981 {0, 1071644664},
24982 },
24983 },
24984 },
24985 {
24986 name: "LoweredGetCallerPC",
24987 argLen: 0,
24988 rematerializeable: true,
24989 reg: regInfo{
24990 outputs: []outputInfo{
24991 {0, 1071644664},
24992 },
24993 },
24994 },
24995 {
24996 name: "LoweredWB",
24997 auxType: auxInt64,
24998 argLen: 1,
24999 clobberFlags: true,
25000 reg: regInfo{
25001 clobbers: 4611686017353646082,
25002 outputs: []outputInfo{
25003 {0, 268435456},
25004 },
25005 },
25006 },
25007 {
25008 name: "LoweredPanicBoundsA",
25009 auxType: auxInt64,
25010 argLen: 3,
25011 call: true,
25012 reg: regInfo{
25013 inputs: []inputInfo{
25014 {0, 4194304},
25015 {1, 8388608},
25016 },
25017 },
25018 },
25019 {
25020 name: "LoweredPanicBoundsB",
25021 auxType: auxInt64,
25022 argLen: 3,
25023 call: true,
25024 reg: regInfo{
25025 inputs: []inputInfo{
25026 {0, 1048576},
25027 {1, 4194304},
25028 },
25029 },
25030 },
25031 {
25032 name: "LoweredPanicBoundsC",
25033 auxType: auxInt64,
25034 argLen: 3,
25035 call: true,
25036 reg: regInfo{
25037 inputs: []inputInfo{
25038 {0, 524288},
25039 {1, 1048576},
25040 },
25041 },
25042 },
25043
25044 {
25045 name: "ADD",
25046 argLen: 2,
25047 commutative: true,
25048 asm: mips.AADDU,
25049 reg: regInfo{
25050 inputs: []inputInfo{
25051 {0, 469762046},
25052 {1, 469762046},
25053 },
25054 outputs: []outputInfo{
25055 {0, 335544318},
25056 },
25057 },
25058 },
25059 {
25060 name: "ADDconst",
25061 auxType: auxInt32,
25062 argLen: 1,
25063 asm: mips.AADDU,
25064 reg: regInfo{
25065 inputs: []inputInfo{
25066 {0, 536870910},
25067 },
25068 outputs: []outputInfo{
25069 {0, 335544318},
25070 },
25071 },
25072 },
25073 {
25074 name: "SUB",
25075 argLen: 2,
25076 asm: mips.ASUBU,
25077 reg: regInfo{
25078 inputs: []inputInfo{
25079 {0, 469762046},
25080 {1, 469762046},
25081 },
25082 outputs: []outputInfo{
25083 {0, 335544318},
25084 },
25085 },
25086 },
25087 {
25088 name: "SUBconst",
25089 auxType: auxInt32,
25090 argLen: 1,
25091 asm: mips.ASUBU,
25092 reg: regInfo{
25093 inputs: []inputInfo{
25094 {0, 469762046},
25095 },
25096 outputs: []outputInfo{
25097 {0, 335544318},
25098 },
25099 },
25100 },
25101 {
25102 name: "MUL",
25103 argLen: 2,
25104 commutative: true,
25105 asm: mips.AMUL,
25106 reg: regInfo{
25107 inputs: []inputInfo{
25108 {0, 469762046},
25109 {1, 469762046},
25110 },
25111 clobbers: 105553116266496,
25112 outputs: []outputInfo{
25113 {0, 335544318},
25114 },
25115 },
25116 },
25117 {
25118 name: "MULT",
25119 argLen: 2,
25120 commutative: true,
25121 asm: mips.AMUL,
25122 reg: regInfo{
25123 inputs: []inputInfo{
25124 {0, 469762046},
25125 {1, 469762046},
25126 },
25127 outputs: []outputInfo{
25128 {0, 35184372088832},
25129 {1, 70368744177664},
25130 },
25131 },
25132 },
25133 {
25134 name: "MULTU",
25135 argLen: 2,
25136 commutative: true,
25137 asm: mips.AMULU,
25138 reg: regInfo{
25139 inputs: []inputInfo{
25140 {0, 469762046},
25141 {1, 469762046},
25142 },
25143 outputs: []outputInfo{
25144 {0, 35184372088832},
25145 {1, 70368744177664},
25146 },
25147 },
25148 },
25149 {
25150 name: "DIV",
25151 argLen: 2,
25152 asm: mips.ADIV,
25153 reg: regInfo{
25154 inputs: []inputInfo{
25155 {0, 469762046},
25156 {1, 469762046},
25157 },
25158 outputs: []outputInfo{
25159 {0, 35184372088832},
25160 {1, 70368744177664},
25161 },
25162 },
25163 },
25164 {
25165 name: "DIVU",
25166 argLen: 2,
25167 asm: mips.ADIVU,
25168 reg: regInfo{
25169 inputs: []inputInfo{
25170 {0, 469762046},
25171 {1, 469762046},
25172 },
25173 outputs: []outputInfo{
25174 {0, 35184372088832},
25175 {1, 70368744177664},
25176 },
25177 },
25178 },
25179 {
25180 name: "ADDF",
25181 argLen: 2,
25182 commutative: true,
25183 asm: mips.AADDF,
25184 reg: regInfo{
25185 inputs: []inputInfo{
25186 {0, 35183835217920},
25187 {1, 35183835217920},
25188 },
25189 outputs: []outputInfo{
25190 {0, 35183835217920},
25191 },
25192 },
25193 },
25194 {
25195 name: "ADDD",
25196 argLen: 2,
25197 commutative: true,
25198 asm: mips.AADDD,
25199 reg: regInfo{
25200 inputs: []inputInfo{
25201 {0, 35183835217920},
25202 {1, 35183835217920},
25203 },
25204 outputs: []outputInfo{
25205 {0, 35183835217920},
25206 },
25207 },
25208 },
25209 {
25210 name: "SUBF",
25211 argLen: 2,
25212 asm: mips.ASUBF,
25213 reg: regInfo{
25214 inputs: []inputInfo{
25215 {0, 35183835217920},
25216 {1, 35183835217920},
25217 },
25218 outputs: []outputInfo{
25219 {0, 35183835217920},
25220 },
25221 },
25222 },
25223 {
25224 name: "SUBD",
25225 argLen: 2,
25226 asm: mips.ASUBD,
25227 reg: regInfo{
25228 inputs: []inputInfo{
25229 {0, 35183835217920},
25230 {1, 35183835217920},
25231 },
25232 outputs: []outputInfo{
25233 {0, 35183835217920},
25234 },
25235 },
25236 },
25237 {
25238 name: "MULF",
25239 argLen: 2,
25240 commutative: true,
25241 asm: mips.AMULF,
25242 reg: regInfo{
25243 inputs: []inputInfo{
25244 {0, 35183835217920},
25245 {1, 35183835217920},
25246 },
25247 outputs: []outputInfo{
25248 {0, 35183835217920},
25249 },
25250 },
25251 },
25252 {
25253 name: "MULD",
25254 argLen: 2,
25255 commutative: true,
25256 asm: mips.AMULD,
25257 reg: regInfo{
25258 inputs: []inputInfo{
25259 {0, 35183835217920},
25260 {1, 35183835217920},
25261 },
25262 outputs: []outputInfo{
25263 {0, 35183835217920},
25264 },
25265 },
25266 },
25267 {
25268 name: "DIVF",
25269 argLen: 2,
25270 asm: mips.ADIVF,
25271 reg: regInfo{
25272 inputs: []inputInfo{
25273 {0, 35183835217920},
25274 {1, 35183835217920},
25275 },
25276 outputs: []outputInfo{
25277 {0, 35183835217920},
25278 },
25279 },
25280 },
25281 {
25282 name: "DIVD",
25283 argLen: 2,
25284 asm: mips.ADIVD,
25285 reg: regInfo{
25286 inputs: []inputInfo{
25287 {0, 35183835217920},
25288 {1, 35183835217920},
25289 },
25290 outputs: []outputInfo{
25291 {0, 35183835217920},
25292 },
25293 },
25294 },
25295 {
25296 name: "AND",
25297 argLen: 2,
25298 commutative: true,
25299 asm: mips.AAND,
25300 reg: regInfo{
25301 inputs: []inputInfo{
25302 {0, 469762046},
25303 {1, 469762046},
25304 },
25305 outputs: []outputInfo{
25306 {0, 335544318},
25307 },
25308 },
25309 },
25310 {
25311 name: "ANDconst",
25312 auxType: auxInt32,
25313 argLen: 1,
25314 asm: mips.AAND,
25315 reg: regInfo{
25316 inputs: []inputInfo{
25317 {0, 469762046},
25318 },
25319 outputs: []outputInfo{
25320 {0, 335544318},
25321 },
25322 },
25323 },
25324 {
25325 name: "OR",
25326 argLen: 2,
25327 commutative: true,
25328 asm: mips.AOR,
25329 reg: regInfo{
25330 inputs: []inputInfo{
25331 {0, 469762046},
25332 {1, 469762046},
25333 },
25334 outputs: []outputInfo{
25335 {0, 335544318},
25336 },
25337 },
25338 },
25339 {
25340 name: "ORconst",
25341 auxType: auxInt32,
25342 argLen: 1,
25343 asm: mips.AOR,
25344 reg: regInfo{
25345 inputs: []inputInfo{
25346 {0, 469762046},
25347 },
25348 outputs: []outputInfo{
25349 {0, 335544318},
25350 },
25351 },
25352 },
25353 {
25354 name: "XOR",
25355 argLen: 2,
25356 commutative: true,
25357 asm: mips.AXOR,
25358 reg: regInfo{
25359 inputs: []inputInfo{
25360 {0, 469762046},
25361 {1, 469762046},
25362 },
25363 outputs: []outputInfo{
25364 {0, 335544318},
25365 },
25366 },
25367 },
25368 {
25369 name: "XORconst",
25370 auxType: auxInt32,
25371 argLen: 1,
25372 asm: mips.AXOR,
25373 reg: regInfo{
25374 inputs: []inputInfo{
25375 {0, 469762046},
25376 },
25377 outputs: []outputInfo{
25378 {0, 335544318},
25379 },
25380 },
25381 },
25382 {
25383 name: "NOR",
25384 argLen: 2,
25385 commutative: true,
25386 asm: mips.ANOR,
25387 reg: regInfo{
25388 inputs: []inputInfo{
25389 {0, 469762046},
25390 {1, 469762046},
25391 },
25392 outputs: []outputInfo{
25393 {0, 335544318},
25394 },
25395 },
25396 },
25397 {
25398 name: "NORconst",
25399 auxType: auxInt32,
25400 argLen: 1,
25401 asm: mips.ANOR,
25402 reg: regInfo{
25403 inputs: []inputInfo{
25404 {0, 469762046},
25405 },
25406 outputs: []outputInfo{
25407 {0, 335544318},
25408 },
25409 },
25410 },
25411 {
25412 name: "NEG",
25413 argLen: 1,
25414 reg: regInfo{
25415 inputs: []inputInfo{
25416 {0, 469762046},
25417 },
25418 outputs: []outputInfo{
25419 {0, 335544318},
25420 },
25421 },
25422 },
25423 {
25424 name: "NEGF",
25425 argLen: 1,
25426 asm: mips.ANEGF,
25427 reg: regInfo{
25428 inputs: []inputInfo{
25429 {0, 35183835217920},
25430 },
25431 outputs: []outputInfo{
25432 {0, 35183835217920},
25433 },
25434 },
25435 },
25436 {
25437 name: "NEGD",
25438 argLen: 1,
25439 asm: mips.ANEGD,
25440 reg: regInfo{
25441 inputs: []inputInfo{
25442 {0, 35183835217920},
25443 },
25444 outputs: []outputInfo{
25445 {0, 35183835217920},
25446 },
25447 },
25448 },
25449 {
25450 name: "ABSD",
25451 argLen: 1,
25452 asm: mips.AABSD,
25453 reg: regInfo{
25454 inputs: []inputInfo{
25455 {0, 35183835217920},
25456 },
25457 outputs: []outputInfo{
25458 {0, 35183835217920},
25459 },
25460 },
25461 },
25462 {
25463 name: "SQRTD",
25464 argLen: 1,
25465 asm: mips.ASQRTD,
25466 reg: regInfo{
25467 inputs: []inputInfo{
25468 {0, 35183835217920},
25469 },
25470 outputs: []outputInfo{
25471 {0, 35183835217920},
25472 },
25473 },
25474 },
25475 {
25476 name: "SQRTF",
25477 argLen: 1,
25478 asm: mips.ASQRTF,
25479 reg: regInfo{
25480 inputs: []inputInfo{
25481 {0, 35183835217920},
25482 },
25483 outputs: []outputInfo{
25484 {0, 35183835217920},
25485 },
25486 },
25487 },
25488 {
25489 name: "SLL",
25490 argLen: 2,
25491 asm: mips.ASLL,
25492 reg: regInfo{
25493 inputs: []inputInfo{
25494 {0, 469762046},
25495 {1, 469762046},
25496 },
25497 outputs: []outputInfo{
25498 {0, 335544318},
25499 },
25500 },
25501 },
25502 {
25503 name: "SLLconst",
25504 auxType: auxInt32,
25505 argLen: 1,
25506 asm: mips.ASLL,
25507 reg: regInfo{
25508 inputs: []inputInfo{
25509 {0, 469762046},
25510 },
25511 outputs: []outputInfo{
25512 {0, 335544318},
25513 },
25514 },
25515 },
25516 {
25517 name: "SRL",
25518 argLen: 2,
25519 asm: mips.ASRL,
25520 reg: regInfo{
25521 inputs: []inputInfo{
25522 {0, 469762046},
25523 {1, 469762046},
25524 },
25525 outputs: []outputInfo{
25526 {0, 335544318},
25527 },
25528 },
25529 },
25530 {
25531 name: "SRLconst",
25532 auxType: auxInt32,
25533 argLen: 1,
25534 asm: mips.ASRL,
25535 reg: regInfo{
25536 inputs: []inputInfo{
25537 {0, 469762046},
25538 },
25539 outputs: []outputInfo{
25540 {0, 335544318},
25541 },
25542 },
25543 },
25544 {
25545 name: "SRA",
25546 argLen: 2,
25547 asm: mips.ASRA,
25548 reg: regInfo{
25549 inputs: []inputInfo{
25550 {0, 469762046},
25551 {1, 469762046},
25552 },
25553 outputs: []outputInfo{
25554 {0, 335544318},
25555 },
25556 },
25557 },
25558 {
25559 name: "SRAconst",
25560 auxType: auxInt32,
25561 argLen: 1,
25562 asm: mips.ASRA,
25563 reg: regInfo{
25564 inputs: []inputInfo{
25565 {0, 469762046},
25566 },
25567 outputs: []outputInfo{
25568 {0, 335544318},
25569 },
25570 },
25571 },
25572 {
25573 name: "CLZ",
25574 argLen: 1,
25575 asm: mips.ACLZ,
25576 reg: regInfo{
25577 inputs: []inputInfo{
25578 {0, 469762046},
25579 },
25580 outputs: []outputInfo{
25581 {0, 335544318},
25582 },
25583 },
25584 },
25585 {
25586 name: "SGT",
25587 argLen: 2,
25588 asm: mips.ASGT,
25589 reg: regInfo{
25590 inputs: []inputInfo{
25591 {0, 469762046},
25592 {1, 469762046},
25593 },
25594 outputs: []outputInfo{
25595 {0, 335544318},
25596 },
25597 },
25598 },
25599 {
25600 name: "SGTconst",
25601 auxType: auxInt32,
25602 argLen: 1,
25603 asm: mips.ASGT,
25604 reg: regInfo{
25605 inputs: []inputInfo{
25606 {0, 469762046},
25607 },
25608 outputs: []outputInfo{
25609 {0, 335544318},
25610 },
25611 },
25612 },
25613 {
25614 name: "SGTzero",
25615 argLen: 1,
25616 asm: mips.ASGT,
25617 reg: regInfo{
25618 inputs: []inputInfo{
25619 {0, 469762046},
25620 },
25621 outputs: []outputInfo{
25622 {0, 335544318},
25623 },
25624 },
25625 },
25626 {
25627 name: "SGTU",
25628 argLen: 2,
25629 asm: mips.ASGTU,
25630 reg: regInfo{
25631 inputs: []inputInfo{
25632 {0, 469762046},
25633 {1, 469762046},
25634 },
25635 outputs: []outputInfo{
25636 {0, 335544318},
25637 },
25638 },
25639 },
25640 {
25641 name: "SGTUconst",
25642 auxType: auxInt32,
25643 argLen: 1,
25644 asm: mips.ASGTU,
25645 reg: regInfo{
25646 inputs: []inputInfo{
25647 {0, 469762046},
25648 },
25649 outputs: []outputInfo{
25650 {0, 335544318},
25651 },
25652 },
25653 },
25654 {
25655 name: "SGTUzero",
25656 argLen: 1,
25657 asm: mips.ASGTU,
25658 reg: regInfo{
25659 inputs: []inputInfo{
25660 {0, 469762046},
25661 },
25662 outputs: []outputInfo{
25663 {0, 335544318},
25664 },
25665 },
25666 },
25667 {
25668 name: "CMPEQF",
25669 argLen: 2,
25670 asm: mips.ACMPEQF,
25671 reg: regInfo{
25672 inputs: []inputInfo{
25673 {0, 35183835217920},
25674 {1, 35183835217920},
25675 },
25676 },
25677 },
25678 {
25679 name: "CMPEQD",
25680 argLen: 2,
25681 asm: mips.ACMPEQD,
25682 reg: regInfo{
25683 inputs: []inputInfo{
25684 {0, 35183835217920},
25685 {1, 35183835217920},
25686 },
25687 },
25688 },
25689 {
25690 name: "CMPGEF",
25691 argLen: 2,
25692 asm: mips.ACMPGEF,
25693 reg: regInfo{
25694 inputs: []inputInfo{
25695 {0, 35183835217920},
25696 {1, 35183835217920},
25697 },
25698 },
25699 },
25700 {
25701 name: "CMPGED",
25702 argLen: 2,
25703 asm: mips.ACMPGED,
25704 reg: regInfo{
25705 inputs: []inputInfo{
25706 {0, 35183835217920},
25707 {1, 35183835217920},
25708 },
25709 },
25710 },
25711 {
25712 name: "CMPGTF",
25713 argLen: 2,
25714 asm: mips.ACMPGTF,
25715 reg: regInfo{
25716 inputs: []inputInfo{
25717 {0, 35183835217920},
25718 {1, 35183835217920},
25719 },
25720 },
25721 },
25722 {
25723 name: "CMPGTD",
25724 argLen: 2,
25725 asm: mips.ACMPGTD,
25726 reg: regInfo{
25727 inputs: []inputInfo{
25728 {0, 35183835217920},
25729 {1, 35183835217920},
25730 },
25731 },
25732 },
25733 {
25734 name: "MOVWconst",
25735 auxType: auxInt32,
25736 argLen: 0,
25737 rematerializeable: true,
25738 asm: mips.AMOVW,
25739 reg: regInfo{
25740 outputs: []outputInfo{
25741 {0, 335544318},
25742 },
25743 },
25744 },
25745 {
25746 name: "MOVFconst",
25747 auxType: auxFloat32,
25748 argLen: 0,
25749 rematerializeable: true,
25750 asm: mips.AMOVF,
25751 reg: regInfo{
25752 outputs: []outputInfo{
25753 {0, 35183835217920},
25754 },
25755 },
25756 },
25757 {
25758 name: "MOVDconst",
25759 auxType: auxFloat64,
25760 argLen: 0,
25761 rematerializeable: true,
25762 asm: mips.AMOVD,
25763 reg: regInfo{
25764 outputs: []outputInfo{
25765 {0, 35183835217920},
25766 },
25767 },
25768 },
25769 {
25770 name: "MOVWaddr",
25771 auxType: auxSymOff,
25772 argLen: 1,
25773 rematerializeable: true,
25774 symEffect: SymAddr,
25775 asm: mips.AMOVW,
25776 reg: regInfo{
25777 inputs: []inputInfo{
25778 {0, 140737555464192},
25779 },
25780 outputs: []outputInfo{
25781 {0, 335544318},
25782 },
25783 },
25784 },
25785 {
25786 name: "MOVBload",
25787 auxType: auxSymOff,
25788 argLen: 2,
25789 faultOnNilArg0: true,
25790 symEffect: SymRead,
25791 asm: mips.AMOVB,
25792 reg: regInfo{
25793 inputs: []inputInfo{
25794 {0, 140738025226238},
25795 },
25796 outputs: []outputInfo{
25797 {0, 335544318},
25798 },
25799 },
25800 },
25801 {
25802 name: "MOVBUload",
25803 auxType: auxSymOff,
25804 argLen: 2,
25805 faultOnNilArg0: true,
25806 symEffect: SymRead,
25807 asm: mips.AMOVBU,
25808 reg: regInfo{
25809 inputs: []inputInfo{
25810 {0, 140738025226238},
25811 },
25812 outputs: []outputInfo{
25813 {0, 335544318},
25814 },
25815 },
25816 },
25817 {
25818 name: "MOVHload",
25819 auxType: auxSymOff,
25820 argLen: 2,
25821 faultOnNilArg0: true,
25822 symEffect: SymRead,
25823 asm: mips.AMOVH,
25824 reg: regInfo{
25825 inputs: []inputInfo{
25826 {0, 140738025226238},
25827 },
25828 outputs: []outputInfo{
25829 {0, 335544318},
25830 },
25831 },
25832 },
25833 {
25834 name: "MOVHUload",
25835 auxType: auxSymOff,
25836 argLen: 2,
25837 faultOnNilArg0: true,
25838 symEffect: SymRead,
25839 asm: mips.AMOVHU,
25840 reg: regInfo{
25841 inputs: []inputInfo{
25842 {0, 140738025226238},
25843 },
25844 outputs: []outputInfo{
25845 {0, 335544318},
25846 },
25847 },
25848 },
25849 {
25850 name: "MOVWload",
25851 auxType: auxSymOff,
25852 argLen: 2,
25853 faultOnNilArg0: true,
25854 symEffect: SymRead,
25855 asm: mips.AMOVW,
25856 reg: regInfo{
25857 inputs: []inputInfo{
25858 {0, 140738025226238},
25859 },
25860 outputs: []outputInfo{
25861 {0, 335544318},
25862 },
25863 },
25864 },
25865 {
25866 name: "MOVFload",
25867 auxType: auxSymOff,
25868 argLen: 2,
25869 faultOnNilArg0: true,
25870 symEffect: SymRead,
25871 asm: mips.AMOVF,
25872 reg: regInfo{
25873 inputs: []inputInfo{
25874 {0, 140738025226238},
25875 },
25876 outputs: []outputInfo{
25877 {0, 35183835217920},
25878 },
25879 },
25880 },
25881 {
25882 name: "MOVDload",
25883 auxType: auxSymOff,
25884 argLen: 2,
25885 faultOnNilArg0: true,
25886 symEffect: SymRead,
25887 asm: mips.AMOVD,
25888 reg: regInfo{
25889 inputs: []inputInfo{
25890 {0, 140738025226238},
25891 },
25892 outputs: []outputInfo{
25893 {0, 35183835217920},
25894 },
25895 },
25896 },
25897 {
25898 name: "MOVBstore",
25899 auxType: auxSymOff,
25900 argLen: 3,
25901 faultOnNilArg0: true,
25902 symEffect: SymWrite,
25903 asm: mips.AMOVB,
25904 reg: regInfo{
25905 inputs: []inputInfo{
25906 {1, 469762046},
25907 {0, 140738025226238},
25908 },
25909 },
25910 },
25911 {
25912 name: "MOVHstore",
25913 auxType: auxSymOff,
25914 argLen: 3,
25915 faultOnNilArg0: true,
25916 symEffect: SymWrite,
25917 asm: mips.AMOVH,
25918 reg: regInfo{
25919 inputs: []inputInfo{
25920 {1, 469762046},
25921 {0, 140738025226238},
25922 },
25923 },
25924 },
25925 {
25926 name: "MOVWstore",
25927 auxType: auxSymOff,
25928 argLen: 3,
25929 faultOnNilArg0: true,
25930 symEffect: SymWrite,
25931 asm: mips.AMOVW,
25932 reg: regInfo{
25933 inputs: []inputInfo{
25934 {1, 469762046},
25935 {0, 140738025226238},
25936 },
25937 },
25938 },
25939 {
25940 name: "MOVFstore",
25941 auxType: auxSymOff,
25942 argLen: 3,
25943 faultOnNilArg0: true,
25944 symEffect: SymWrite,
25945 asm: mips.AMOVF,
25946 reg: regInfo{
25947 inputs: []inputInfo{
25948 {1, 35183835217920},
25949 {0, 140738025226238},
25950 },
25951 },
25952 },
25953 {
25954 name: "MOVDstore",
25955 auxType: auxSymOff,
25956 argLen: 3,
25957 faultOnNilArg0: true,
25958 symEffect: SymWrite,
25959 asm: mips.AMOVD,
25960 reg: regInfo{
25961 inputs: []inputInfo{
25962 {1, 35183835217920},
25963 {0, 140738025226238},
25964 },
25965 },
25966 },
25967 {
25968 name: "MOVBstorezero",
25969 auxType: auxSymOff,
25970 argLen: 2,
25971 faultOnNilArg0: true,
25972 symEffect: SymWrite,
25973 asm: mips.AMOVB,
25974 reg: regInfo{
25975 inputs: []inputInfo{
25976 {0, 140738025226238},
25977 },
25978 },
25979 },
25980 {
25981 name: "MOVHstorezero",
25982 auxType: auxSymOff,
25983 argLen: 2,
25984 faultOnNilArg0: true,
25985 symEffect: SymWrite,
25986 asm: mips.AMOVH,
25987 reg: regInfo{
25988 inputs: []inputInfo{
25989 {0, 140738025226238},
25990 },
25991 },
25992 },
25993 {
25994 name: "MOVWstorezero",
25995 auxType: auxSymOff,
25996 argLen: 2,
25997 faultOnNilArg0: true,
25998 symEffect: SymWrite,
25999 asm: mips.AMOVW,
26000 reg: regInfo{
26001 inputs: []inputInfo{
26002 {0, 140738025226238},
26003 },
26004 },
26005 },
26006 {
26007 name: "MOVWfpgp",
26008 argLen: 1,
26009 asm: mips.AMOVW,
26010 reg: regInfo{
26011 inputs: []inputInfo{
26012 {0, 35183835217920},
26013 },
26014 outputs: []outputInfo{
26015 {0, 335544318},
26016 },
26017 },
26018 },
26019 {
26020 name: "MOVWgpfp",
26021 argLen: 1,
26022 asm: mips.AMOVW,
26023 reg: regInfo{
26024 inputs: []inputInfo{
26025 {0, 335544318},
26026 },
26027 outputs: []outputInfo{
26028 {0, 35183835217920},
26029 },
26030 },
26031 },
26032 {
26033 name: "MOVBreg",
26034 argLen: 1,
26035 asm: mips.AMOVB,
26036 reg: regInfo{
26037 inputs: []inputInfo{
26038 {0, 469762046},
26039 },
26040 outputs: []outputInfo{
26041 {0, 335544318},
26042 },
26043 },
26044 },
26045 {
26046 name: "MOVBUreg",
26047 argLen: 1,
26048 asm: mips.AMOVBU,
26049 reg: regInfo{
26050 inputs: []inputInfo{
26051 {0, 469762046},
26052 },
26053 outputs: []outputInfo{
26054 {0, 335544318},
26055 },
26056 },
26057 },
26058 {
26059 name: "MOVHreg",
26060 argLen: 1,
26061 asm: mips.AMOVH,
26062 reg: regInfo{
26063 inputs: []inputInfo{
26064 {0, 469762046},
26065 },
26066 outputs: []outputInfo{
26067 {0, 335544318},
26068 },
26069 },
26070 },
26071 {
26072 name: "MOVHUreg",
26073 argLen: 1,
26074 asm: mips.AMOVHU,
26075 reg: regInfo{
26076 inputs: []inputInfo{
26077 {0, 469762046},
26078 },
26079 outputs: []outputInfo{
26080 {0, 335544318},
26081 },
26082 },
26083 },
26084 {
26085 name: "MOVWreg",
26086 argLen: 1,
26087 asm: mips.AMOVW,
26088 reg: regInfo{
26089 inputs: []inputInfo{
26090 {0, 469762046},
26091 },
26092 outputs: []outputInfo{
26093 {0, 335544318},
26094 },
26095 },
26096 },
26097 {
26098 name: "MOVWnop",
26099 argLen: 1,
26100 resultInArg0: true,
26101 reg: regInfo{
26102 inputs: []inputInfo{
26103 {0, 335544318},
26104 },
26105 outputs: []outputInfo{
26106 {0, 335544318},
26107 },
26108 },
26109 },
26110 {
26111 name: "CMOVZ",
26112 argLen: 3,
26113 resultInArg0: true,
26114 asm: mips.ACMOVZ,
26115 reg: regInfo{
26116 inputs: []inputInfo{
26117 {0, 335544318},
26118 {1, 335544318},
26119 {2, 335544318},
26120 },
26121 outputs: []outputInfo{
26122 {0, 335544318},
26123 },
26124 },
26125 },
26126 {
26127 name: "CMOVZzero",
26128 argLen: 2,
26129 resultInArg0: true,
26130 asm: mips.ACMOVZ,
26131 reg: regInfo{
26132 inputs: []inputInfo{
26133 {0, 335544318},
26134 {1, 469762046},
26135 },
26136 outputs: []outputInfo{
26137 {0, 335544318},
26138 },
26139 },
26140 },
26141 {
26142 name: "MOVWF",
26143 argLen: 1,
26144 asm: mips.AMOVWF,
26145 reg: regInfo{
26146 inputs: []inputInfo{
26147 {0, 35183835217920},
26148 },
26149 outputs: []outputInfo{
26150 {0, 35183835217920},
26151 },
26152 },
26153 },
26154 {
26155 name: "MOVWD",
26156 argLen: 1,
26157 asm: mips.AMOVWD,
26158 reg: regInfo{
26159 inputs: []inputInfo{
26160 {0, 35183835217920},
26161 },
26162 outputs: []outputInfo{
26163 {0, 35183835217920},
26164 },
26165 },
26166 },
26167 {
26168 name: "TRUNCFW",
26169 argLen: 1,
26170 asm: mips.ATRUNCFW,
26171 reg: regInfo{
26172 inputs: []inputInfo{
26173 {0, 35183835217920},
26174 },
26175 outputs: []outputInfo{
26176 {0, 35183835217920},
26177 },
26178 },
26179 },
26180 {
26181 name: "TRUNCDW",
26182 argLen: 1,
26183 asm: mips.ATRUNCDW,
26184 reg: regInfo{
26185 inputs: []inputInfo{
26186 {0, 35183835217920},
26187 },
26188 outputs: []outputInfo{
26189 {0, 35183835217920},
26190 },
26191 },
26192 },
26193 {
26194 name: "MOVFD",
26195 argLen: 1,
26196 asm: mips.AMOVFD,
26197 reg: regInfo{
26198 inputs: []inputInfo{
26199 {0, 35183835217920},
26200 },
26201 outputs: []outputInfo{
26202 {0, 35183835217920},
26203 },
26204 },
26205 },
26206 {
26207 name: "MOVDF",
26208 argLen: 1,
26209 asm: mips.AMOVDF,
26210 reg: regInfo{
26211 inputs: []inputInfo{
26212 {0, 35183835217920},
26213 },
26214 outputs: []outputInfo{
26215 {0, 35183835217920},
26216 },
26217 },
26218 },
26219 {
26220 name: "CALLstatic",
26221 auxType: auxCallOff,
26222 argLen: 1,
26223 clobberFlags: true,
26224 call: true,
26225 reg: regInfo{
26226 clobbers: 140737421246462,
26227 },
26228 },
26229 {
26230 name: "CALLtail",
26231 auxType: auxCallOff,
26232 argLen: 1,
26233 clobberFlags: true,
26234 call: true,
26235 tailCall: true,
26236 reg: regInfo{
26237 clobbers: 140737421246462,
26238 },
26239 },
26240 {
26241 name: "CALLclosure",
26242 auxType: auxCallOff,
26243 argLen: 3,
26244 clobberFlags: true,
26245 call: true,
26246 reg: regInfo{
26247 inputs: []inputInfo{
26248 {1, 4194304},
26249 {0, 402653182},
26250 },
26251 clobbers: 140737421246462,
26252 },
26253 },
26254 {
26255 name: "CALLinter",
26256 auxType: auxCallOff,
26257 argLen: 2,
26258 clobberFlags: true,
26259 call: true,
26260 reg: regInfo{
26261 inputs: []inputInfo{
26262 {0, 335544318},
26263 },
26264 clobbers: 140737421246462,
26265 },
26266 },
26267 {
26268 name: "LoweredAtomicLoad8",
26269 argLen: 2,
26270 faultOnNilArg0: true,
26271 reg: regInfo{
26272 inputs: []inputInfo{
26273 {0, 140738025226238},
26274 },
26275 outputs: []outputInfo{
26276 {0, 335544318},
26277 },
26278 },
26279 },
26280 {
26281 name: "LoweredAtomicLoad32",
26282 argLen: 2,
26283 faultOnNilArg0: true,
26284 reg: regInfo{
26285 inputs: []inputInfo{
26286 {0, 140738025226238},
26287 },
26288 outputs: []outputInfo{
26289 {0, 335544318},
26290 },
26291 },
26292 },
26293 {
26294 name: "LoweredAtomicStore8",
26295 argLen: 3,
26296 faultOnNilArg0: true,
26297 hasSideEffects: true,
26298 reg: regInfo{
26299 inputs: []inputInfo{
26300 {1, 469762046},
26301 {0, 140738025226238},
26302 },
26303 },
26304 },
26305 {
26306 name: "LoweredAtomicStore32",
26307 argLen: 3,
26308 faultOnNilArg0: true,
26309 hasSideEffects: true,
26310 reg: regInfo{
26311 inputs: []inputInfo{
26312 {1, 469762046},
26313 {0, 140738025226238},
26314 },
26315 },
26316 },
26317 {
26318 name: "LoweredAtomicStorezero",
26319 argLen: 2,
26320 faultOnNilArg0: true,
26321 hasSideEffects: true,
26322 reg: regInfo{
26323 inputs: []inputInfo{
26324 {0, 140738025226238},
26325 },
26326 },
26327 },
26328 {
26329 name: "LoweredAtomicExchange",
26330 argLen: 3,
26331 resultNotInArgs: true,
26332 faultOnNilArg0: true,
26333 hasSideEffects: true,
26334 unsafePoint: true,
26335 reg: regInfo{
26336 inputs: []inputInfo{
26337 {1, 469762046},
26338 {0, 140738025226238},
26339 },
26340 outputs: []outputInfo{
26341 {0, 335544318},
26342 },
26343 },
26344 },
26345 {
26346 name: "LoweredAtomicAdd",
26347 argLen: 3,
26348 resultNotInArgs: true,
26349 faultOnNilArg0: true,
26350 hasSideEffects: true,
26351 unsafePoint: true,
26352 reg: regInfo{
26353 inputs: []inputInfo{
26354 {1, 469762046},
26355 {0, 140738025226238},
26356 },
26357 outputs: []outputInfo{
26358 {0, 335544318},
26359 },
26360 },
26361 },
26362 {
26363 name: "LoweredAtomicAddconst",
26364 auxType: auxInt32,
26365 argLen: 2,
26366 resultNotInArgs: true,
26367 faultOnNilArg0: true,
26368 hasSideEffects: true,
26369 unsafePoint: true,
26370 reg: regInfo{
26371 inputs: []inputInfo{
26372 {0, 140738025226238},
26373 },
26374 outputs: []outputInfo{
26375 {0, 335544318},
26376 },
26377 },
26378 },
26379 {
26380 name: "LoweredAtomicCas",
26381 argLen: 4,
26382 resultNotInArgs: true,
26383 faultOnNilArg0: true,
26384 hasSideEffects: true,
26385 unsafePoint: true,
26386 reg: regInfo{
26387 inputs: []inputInfo{
26388 {1, 469762046},
26389 {2, 469762046},
26390 {0, 140738025226238},
26391 },
26392 outputs: []outputInfo{
26393 {0, 335544318},
26394 },
26395 },
26396 },
26397 {
26398 name: "LoweredAtomicAnd",
26399 argLen: 3,
26400 faultOnNilArg0: true,
26401 hasSideEffects: true,
26402 unsafePoint: true,
26403 asm: mips.AAND,
26404 reg: regInfo{
26405 inputs: []inputInfo{
26406 {1, 469762046},
26407 {0, 140738025226238},
26408 },
26409 },
26410 },
26411 {
26412 name: "LoweredAtomicOr",
26413 argLen: 3,
26414 faultOnNilArg0: true,
26415 hasSideEffects: true,
26416 unsafePoint: true,
26417 asm: mips.AOR,
26418 reg: regInfo{
26419 inputs: []inputInfo{
26420 {1, 469762046},
26421 {0, 140738025226238},
26422 },
26423 },
26424 },
26425 {
26426 name: "LoweredZero",
26427 auxType: auxInt32,
26428 argLen: 3,
26429 faultOnNilArg0: true,
26430 reg: regInfo{
26431 inputs: []inputInfo{
26432 {0, 2},
26433 {1, 335544318},
26434 },
26435 clobbers: 2,
26436 },
26437 },
26438 {
26439 name: "LoweredMove",
26440 auxType: auxInt32,
26441 argLen: 4,
26442 faultOnNilArg0: true,
26443 faultOnNilArg1: true,
26444 reg: regInfo{
26445 inputs: []inputInfo{
26446 {0, 4},
26447 {1, 2},
26448 {2, 335544318},
26449 },
26450 clobbers: 6,
26451 },
26452 },
26453 {
26454 name: "LoweredNilCheck",
26455 argLen: 2,
26456 nilCheck: true,
26457 faultOnNilArg0: true,
26458 reg: regInfo{
26459 inputs: []inputInfo{
26460 {0, 469762046},
26461 },
26462 },
26463 },
26464 {
26465 name: "FPFlagTrue",
26466 argLen: 1,
26467 reg: regInfo{
26468 outputs: []outputInfo{
26469 {0, 335544318},
26470 },
26471 },
26472 },
26473 {
26474 name: "FPFlagFalse",
26475 argLen: 1,
26476 reg: regInfo{
26477 outputs: []outputInfo{
26478 {0, 335544318},
26479 },
26480 },
26481 },
26482 {
26483 name: "LoweredGetClosurePtr",
26484 argLen: 0,
26485 zeroWidth: true,
26486 reg: regInfo{
26487 outputs: []outputInfo{
26488 {0, 4194304},
26489 },
26490 },
26491 },
26492 {
26493 name: "LoweredGetCallerSP",
26494 argLen: 1,
26495 rematerializeable: true,
26496 reg: regInfo{
26497 outputs: []outputInfo{
26498 {0, 335544318},
26499 },
26500 },
26501 },
26502 {
26503 name: "LoweredGetCallerPC",
26504 argLen: 0,
26505 rematerializeable: true,
26506 reg: regInfo{
26507 outputs: []outputInfo{
26508 {0, 335544318},
26509 },
26510 },
26511 },
26512 {
26513 name: "LoweredWB",
26514 auxType: auxInt64,
26515 argLen: 1,
26516 clobberFlags: true,
26517 reg: regInfo{
26518 clobbers: 140737219919872,
26519 outputs: []outputInfo{
26520 {0, 16777216},
26521 },
26522 },
26523 },
26524 {
26525 name: "LoweredPanicBoundsA",
26526 auxType: auxInt64,
26527 argLen: 3,
26528 call: true,
26529 reg: regInfo{
26530 inputs: []inputInfo{
26531 {0, 8},
26532 {1, 16},
26533 },
26534 },
26535 },
26536 {
26537 name: "LoweredPanicBoundsB",
26538 auxType: auxInt64,
26539 argLen: 3,
26540 call: true,
26541 reg: regInfo{
26542 inputs: []inputInfo{
26543 {0, 4},
26544 {1, 8},
26545 },
26546 },
26547 },
26548 {
26549 name: "LoweredPanicBoundsC",
26550 auxType: auxInt64,
26551 argLen: 3,
26552 call: true,
26553 reg: regInfo{
26554 inputs: []inputInfo{
26555 {0, 2},
26556 {1, 4},
26557 },
26558 },
26559 },
26560 {
26561 name: "LoweredPanicExtendA",
26562 auxType: auxInt64,
26563 argLen: 4,
26564 call: true,
26565 reg: regInfo{
26566 inputs: []inputInfo{
26567 {0, 32},
26568 {1, 8},
26569 {2, 16},
26570 },
26571 },
26572 },
26573 {
26574 name: "LoweredPanicExtendB",
26575 auxType: auxInt64,
26576 argLen: 4,
26577 call: true,
26578 reg: regInfo{
26579 inputs: []inputInfo{
26580 {0, 32},
26581 {1, 4},
26582 {2, 8},
26583 },
26584 },
26585 },
26586 {
26587 name: "LoweredPanicExtendC",
26588 auxType: auxInt64,
26589 argLen: 4,
26590 call: true,
26591 reg: regInfo{
26592 inputs: []inputInfo{
26593 {0, 32},
26594 {1, 2},
26595 {2, 4},
26596 },
26597 },
26598 },
26599
26600 {
26601 name: "ADDV",
26602 argLen: 2,
26603 commutative: true,
26604 asm: mips.AADDVU,
26605 reg: regInfo{
26606 inputs: []inputInfo{
26607 {0, 234881022},
26608 {1, 234881022},
26609 },
26610 outputs: []outputInfo{
26611 {0, 167772158},
26612 },
26613 },
26614 },
26615 {
26616 name: "ADDVconst",
26617 auxType: auxInt64,
26618 argLen: 1,
26619 asm: mips.AADDVU,
26620 reg: regInfo{
26621 inputs: []inputInfo{
26622 {0, 268435454},
26623 },
26624 outputs: []outputInfo{
26625 {0, 167772158},
26626 },
26627 },
26628 },
26629 {
26630 name: "SUBV",
26631 argLen: 2,
26632 asm: mips.ASUBVU,
26633 reg: regInfo{
26634 inputs: []inputInfo{
26635 {0, 234881022},
26636 {1, 234881022},
26637 },
26638 outputs: []outputInfo{
26639 {0, 167772158},
26640 },
26641 },
26642 },
26643 {
26644 name: "SUBVconst",
26645 auxType: auxInt64,
26646 argLen: 1,
26647 asm: mips.ASUBVU,
26648 reg: regInfo{
26649 inputs: []inputInfo{
26650 {0, 234881022},
26651 },
26652 outputs: []outputInfo{
26653 {0, 167772158},
26654 },
26655 },
26656 },
26657 {
26658 name: "MULV",
26659 argLen: 2,
26660 commutative: true,
26661 asm: mips.AMULV,
26662 reg: regInfo{
26663 inputs: []inputInfo{
26664 {0, 234881022},
26665 {1, 234881022},
26666 },
26667 outputs: []outputInfo{
26668 {0, 1152921504606846976},
26669 {1, 2305843009213693952},
26670 },
26671 },
26672 },
26673 {
26674 name: "MULVU",
26675 argLen: 2,
26676 commutative: true,
26677 asm: mips.AMULVU,
26678 reg: regInfo{
26679 inputs: []inputInfo{
26680 {0, 234881022},
26681 {1, 234881022},
26682 },
26683 outputs: []outputInfo{
26684 {0, 1152921504606846976},
26685 {1, 2305843009213693952},
26686 },
26687 },
26688 },
26689 {
26690 name: "DIVV",
26691 argLen: 2,
26692 asm: mips.ADIVV,
26693 reg: regInfo{
26694 inputs: []inputInfo{
26695 {0, 234881022},
26696 {1, 234881022},
26697 },
26698 outputs: []outputInfo{
26699 {0, 1152921504606846976},
26700 {1, 2305843009213693952},
26701 },
26702 },
26703 },
26704 {
26705 name: "DIVVU",
26706 argLen: 2,
26707 asm: mips.ADIVVU,
26708 reg: regInfo{
26709 inputs: []inputInfo{
26710 {0, 234881022},
26711 {1, 234881022},
26712 },
26713 outputs: []outputInfo{
26714 {0, 1152921504606846976},
26715 {1, 2305843009213693952},
26716 },
26717 },
26718 },
26719 {
26720 name: "ADDF",
26721 argLen: 2,
26722 commutative: true,
26723 asm: mips.AADDF,
26724 reg: regInfo{
26725 inputs: []inputInfo{
26726 {0, 1152921504338411520},
26727 {1, 1152921504338411520},
26728 },
26729 outputs: []outputInfo{
26730 {0, 1152921504338411520},
26731 },
26732 },
26733 },
26734 {
26735 name: "ADDD",
26736 argLen: 2,
26737 commutative: true,
26738 asm: mips.AADDD,
26739 reg: regInfo{
26740 inputs: []inputInfo{
26741 {0, 1152921504338411520},
26742 {1, 1152921504338411520},
26743 },
26744 outputs: []outputInfo{
26745 {0, 1152921504338411520},
26746 },
26747 },
26748 },
26749 {
26750 name: "SUBF",
26751 argLen: 2,
26752 asm: mips.ASUBF,
26753 reg: regInfo{
26754 inputs: []inputInfo{
26755 {0, 1152921504338411520},
26756 {1, 1152921504338411520},
26757 },
26758 outputs: []outputInfo{
26759 {0, 1152921504338411520},
26760 },
26761 },
26762 },
26763 {
26764 name: "SUBD",
26765 argLen: 2,
26766 asm: mips.ASUBD,
26767 reg: regInfo{
26768 inputs: []inputInfo{
26769 {0, 1152921504338411520},
26770 {1, 1152921504338411520},
26771 },
26772 outputs: []outputInfo{
26773 {0, 1152921504338411520},
26774 },
26775 },
26776 },
26777 {
26778 name: "MULF",
26779 argLen: 2,
26780 commutative: true,
26781 asm: mips.AMULF,
26782 reg: regInfo{
26783 inputs: []inputInfo{
26784 {0, 1152921504338411520},
26785 {1, 1152921504338411520},
26786 },
26787 outputs: []outputInfo{
26788 {0, 1152921504338411520},
26789 },
26790 },
26791 },
26792 {
26793 name: "MULD",
26794 argLen: 2,
26795 commutative: true,
26796 asm: mips.AMULD,
26797 reg: regInfo{
26798 inputs: []inputInfo{
26799 {0, 1152921504338411520},
26800 {1, 1152921504338411520},
26801 },
26802 outputs: []outputInfo{
26803 {0, 1152921504338411520},
26804 },
26805 },
26806 },
26807 {
26808 name: "DIVF",
26809 argLen: 2,
26810 asm: mips.ADIVF,
26811 reg: regInfo{
26812 inputs: []inputInfo{
26813 {0, 1152921504338411520},
26814 {1, 1152921504338411520},
26815 },
26816 outputs: []outputInfo{
26817 {0, 1152921504338411520},
26818 },
26819 },
26820 },
26821 {
26822 name: "DIVD",
26823 argLen: 2,
26824 asm: mips.ADIVD,
26825 reg: regInfo{
26826 inputs: []inputInfo{
26827 {0, 1152921504338411520},
26828 {1, 1152921504338411520},
26829 },
26830 outputs: []outputInfo{
26831 {0, 1152921504338411520},
26832 },
26833 },
26834 },
26835 {
26836 name: "AND",
26837 argLen: 2,
26838 commutative: true,
26839 asm: mips.AAND,
26840 reg: regInfo{
26841 inputs: []inputInfo{
26842 {0, 234881022},
26843 {1, 234881022},
26844 },
26845 outputs: []outputInfo{
26846 {0, 167772158},
26847 },
26848 },
26849 },
26850 {
26851 name: "ANDconst",
26852 auxType: auxInt64,
26853 argLen: 1,
26854 asm: mips.AAND,
26855 reg: regInfo{
26856 inputs: []inputInfo{
26857 {0, 234881022},
26858 },
26859 outputs: []outputInfo{
26860 {0, 167772158},
26861 },
26862 },
26863 },
26864 {
26865 name: "OR",
26866 argLen: 2,
26867 commutative: true,
26868 asm: mips.AOR,
26869 reg: regInfo{
26870 inputs: []inputInfo{
26871 {0, 234881022},
26872 {1, 234881022},
26873 },
26874 outputs: []outputInfo{
26875 {0, 167772158},
26876 },
26877 },
26878 },
26879 {
26880 name: "ORconst",
26881 auxType: auxInt64,
26882 argLen: 1,
26883 asm: mips.AOR,
26884 reg: regInfo{
26885 inputs: []inputInfo{
26886 {0, 234881022},
26887 },
26888 outputs: []outputInfo{
26889 {0, 167772158},
26890 },
26891 },
26892 },
26893 {
26894 name: "XOR",
26895 argLen: 2,
26896 commutative: true,
26897 asm: mips.AXOR,
26898 reg: regInfo{
26899 inputs: []inputInfo{
26900 {0, 234881022},
26901 {1, 234881022},
26902 },
26903 outputs: []outputInfo{
26904 {0, 167772158},
26905 },
26906 },
26907 },
26908 {
26909 name: "XORconst",
26910 auxType: auxInt64,
26911 argLen: 1,
26912 asm: mips.AXOR,
26913 reg: regInfo{
26914 inputs: []inputInfo{
26915 {0, 234881022},
26916 },
26917 outputs: []outputInfo{
26918 {0, 167772158},
26919 },
26920 },
26921 },
26922 {
26923 name: "NOR",
26924 argLen: 2,
26925 commutative: true,
26926 asm: mips.ANOR,
26927 reg: regInfo{
26928 inputs: []inputInfo{
26929 {0, 234881022},
26930 {1, 234881022},
26931 },
26932 outputs: []outputInfo{
26933 {0, 167772158},
26934 },
26935 },
26936 },
26937 {
26938 name: "NORconst",
26939 auxType: auxInt64,
26940 argLen: 1,
26941 asm: mips.ANOR,
26942 reg: regInfo{
26943 inputs: []inputInfo{
26944 {0, 234881022},
26945 },
26946 outputs: []outputInfo{
26947 {0, 167772158},
26948 },
26949 },
26950 },
26951 {
26952 name: "NEGV",
26953 argLen: 1,
26954 reg: regInfo{
26955 inputs: []inputInfo{
26956 {0, 234881022},
26957 },
26958 outputs: []outputInfo{
26959 {0, 167772158},
26960 },
26961 },
26962 },
26963 {
26964 name: "NEGF",
26965 argLen: 1,
26966 asm: mips.ANEGF,
26967 reg: regInfo{
26968 inputs: []inputInfo{
26969 {0, 1152921504338411520},
26970 },
26971 outputs: []outputInfo{
26972 {0, 1152921504338411520},
26973 },
26974 },
26975 },
26976 {
26977 name: "NEGD",
26978 argLen: 1,
26979 asm: mips.ANEGD,
26980 reg: regInfo{
26981 inputs: []inputInfo{
26982 {0, 1152921504338411520},
26983 },
26984 outputs: []outputInfo{
26985 {0, 1152921504338411520},
26986 },
26987 },
26988 },
26989 {
26990 name: "ABSD",
26991 argLen: 1,
26992 asm: mips.AABSD,
26993 reg: regInfo{
26994 inputs: []inputInfo{
26995 {0, 1152921504338411520},
26996 },
26997 outputs: []outputInfo{
26998 {0, 1152921504338411520},
26999 },
27000 },
27001 },
27002 {
27003 name: "SQRTD",
27004 argLen: 1,
27005 asm: mips.ASQRTD,
27006 reg: regInfo{
27007 inputs: []inputInfo{
27008 {0, 1152921504338411520},
27009 },
27010 outputs: []outputInfo{
27011 {0, 1152921504338411520},
27012 },
27013 },
27014 },
27015 {
27016 name: "SQRTF",
27017 argLen: 1,
27018 asm: mips.ASQRTF,
27019 reg: regInfo{
27020 inputs: []inputInfo{
27021 {0, 1152921504338411520},
27022 },
27023 outputs: []outputInfo{
27024 {0, 1152921504338411520},
27025 },
27026 },
27027 },
27028 {
27029 name: "SLLV",
27030 argLen: 2,
27031 asm: mips.ASLLV,
27032 reg: regInfo{
27033 inputs: []inputInfo{
27034 {0, 234881022},
27035 {1, 234881022},
27036 },
27037 outputs: []outputInfo{
27038 {0, 167772158},
27039 },
27040 },
27041 },
27042 {
27043 name: "SLLVconst",
27044 auxType: auxInt64,
27045 argLen: 1,
27046 asm: mips.ASLLV,
27047 reg: regInfo{
27048 inputs: []inputInfo{
27049 {0, 234881022},
27050 },
27051 outputs: []outputInfo{
27052 {0, 167772158},
27053 },
27054 },
27055 },
27056 {
27057 name: "SRLV",
27058 argLen: 2,
27059 asm: mips.ASRLV,
27060 reg: regInfo{
27061 inputs: []inputInfo{
27062 {0, 234881022},
27063 {1, 234881022},
27064 },
27065 outputs: []outputInfo{
27066 {0, 167772158},
27067 },
27068 },
27069 },
27070 {
27071 name: "SRLVconst",
27072 auxType: auxInt64,
27073 argLen: 1,
27074 asm: mips.ASRLV,
27075 reg: regInfo{
27076 inputs: []inputInfo{
27077 {0, 234881022},
27078 },
27079 outputs: []outputInfo{
27080 {0, 167772158},
27081 },
27082 },
27083 },
27084 {
27085 name: "SRAV",
27086 argLen: 2,
27087 asm: mips.ASRAV,
27088 reg: regInfo{
27089 inputs: []inputInfo{
27090 {0, 234881022},
27091 {1, 234881022},
27092 },
27093 outputs: []outputInfo{
27094 {0, 167772158},
27095 },
27096 },
27097 },
27098 {
27099 name: "SRAVconst",
27100 auxType: auxInt64,
27101 argLen: 1,
27102 asm: mips.ASRAV,
27103 reg: regInfo{
27104 inputs: []inputInfo{
27105 {0, 234881022},
27106 },
27107 outputs: []outputInfo{
27108 {0, 167772158},
27109 },
27110 },
27111 },
27112 {
27113 name: "SGT",
27114 argLen: 2,
27115 asm: mips.ASGT,
27116 reg: regInfo{
27117 inputs: []inputInfo{
27118 {0, 234881022},
27119 {1, 234881022},
27120 },
27121 outputs: []outputInfo{
27122 {0, 167772158},
27123 },
27124 },
27125 },
27126 {
27127 name: "SGTconst",
27128 auxType: auxInt64,
27129 argLen: 1,
27130 asm: mips.ASGT,
27131 reg: regInfo{
27132 inputs: []inputInfo{
27133 {0, 234881022},
27134 },
27135 outputs: []outputInfo{
27136 {0, 167772158},
27137 },
27138 },
27139 },
27140 {
27141 name: "SGTU",
27142 argLen: 2,
27143 asm: mips.ASGTU,
27144 reg: regInfo{
27145 inputs: []inputInfo{
27146 {0, 234881022},
27147 {1, 234881022},
27148 },
27149 outputs: []outputInfo{
27150 {0, 167772158},
27151 },
27152 },
27153 },
27154 {
27155 name: "SGTUconst",
27156 auxType: auxInt64,
27157 argLen: 1,
27158 asm: mips.ASGTU,
27159 reg: regInfo{
27160 inputs: []inputInfo{
27161 {0, 234881022},
27162 },
27163 outputs: []outputInfo{
27164 {0, 167772158},
27165 },
27166 },
27167 },
27168 {
27169 name: "CMPEQF",
27170 argLen: 2,
27171 asm: mips.ACMPEQF,
27172 reg: regInfo{
27173 inputs: []inputInfo{
27174 {0, 1152921504338411520},
27175 {1, 1152921504338411520},
27176 },
27177 },
27178 },
27179 {
27180 name: "CMPEQD",
27181 argLen: 2,
27182 asm: mips.ACMPEQD,
27183 reg: regInfo{
27184 inputs: []inputInfo{
27185 {0, 1152921504338411520},
27186 {1, 1152921504338411520},
27187 },
27188 },
27189 },
27190 {
27191 name: "CMPGEF",
27192 argLen: 2,
27193 asm: mips.ACMPGEF,
27194 reg: regInfo{
27195 inputs: []inputInfo{
27196 {0, 1152921504338411520},
27197 {1, 1152921504338411520},
27198 },
27199 },
27200 },
27201 {
27202 name: "CMPGED",
27203 argLen: 2,
27204 asm: mips.ACMPGED,
27205 reg: regInfo{
27206 inputs: []inputInfo{
27207 {0, 1152921504338411520},
27208 {1, 1152921504338411520},
27209 },
27210 },
27211 },
27212 {
27213 name: "CMPGTF",
27214 argLen: 2,
27215 asm: mips.ACMPGTF,
27216 reg: regInfo{
27217 inputs: []inputInfo{
27218 {0, 1152921504338411520},
27219 {1, 1152921504338411520},
27220 },
27221 },
27222 },
27223 {
27224 name: "CMPGTD",
27225 argLen: 2,
27226 asm: mips.ACMPGTD,
27227 reg: regInfo{
27228 inputs: []inputInfo{
27229 {0, 1152921504338411520},
27230 {1, 1152921504338411520},
27231 },
27232 },
27233 },
27234 {
27235 name: "MOVVconst",
27236 auxType: auxInt64,
27237 argLen: 0,
27238 rematerializeable: true,
27239 asm: mips.AMOVV,
27240 reg: regInfo{
27241 outputs: []outputInfo{
27242 {0, 167772158},
27243 },
27244 },
27245 },
27246 {
27247 name: "MOVFconst",
27248 auxType: auxFloat64,
27249 argLen: 0,
27250 rematerializeable: true,
27251 asm: mips.AMOVF,
27252 reg: regInfo{
27253 outputs: []outputInfo{
27254 {0, 1152921504338411520},
27255 },
27256 },
27257 },
27258 {
27259 name: "MOVDconst",
27260 auxType: auxFloat64,
27261 argLen: 0,
27262 rematerializeable: true,
27263 asm: mips.AMOVD,
27264 reg: regInfo{
27265 outputs: []outputInfo{
27266 {0, 1152921504338411520},
27267 },
27268 },
27269 },
27270 {
27271 name: "MOVVaddr",
27272 auxType: auxSymOff,
27273 argLen: 1,
27274 rematerializeable: true,
27275 symEffect: SymAddr,
27276 asm: mips.AMOVV,
27277 reg: regInfo{
27278 inputs: []inputInfo{
27279 {0, 4611686018460942336},
27280 },
27281 outputs: []outputInfo{
27282 {0, 167772158},
27283 },
27284 },
27285 },
27286 {
27287 name: "MOVBload",
27288 auxType: auxSymOff,
27289 argLen: 2,
27290 faultOnNilArg0: true,
27291 symEffect: SymRead,
27292 asm: mips.AMOVB,
27293 reg: regInfo{
27294 inputs: []inputInfo{
27295 {0, 4611686018695823358},
27296 },
27297 outputs: []outputInfo{
27298 {0, 167772158},
27299 },
27300 },
27301 },
27302 {
27303 name: "MOVBUload",
27304 auxType: auxSymOff,
27305 argLen: 2,
27306 faultOnNilArg0: true,
27307 symEffect: SymRead,
27308 asm: mips.AMOVBU,
27309 reg: regInfo{
27310 inputs: []inputInfo{
27311 {0, 4611686018695823358},
27312 },
27313 outputs: []outputInfo{
27314 {0, 167772158},
27315 },
27316 },
27317 },
27318 {
27319 name: "MOVHload",
27320 auxType: auxSymOff,
27321 argLen: 2,
27322 faultOnNilArg0: true,
27323 symEffect: SymRead,
27324 asm: mips.AMOVH,
27325 reg: regInfo{
27326 inputs: []inputInfo{
27327 {0, 4611686018695823358},
27328 },
27329 outputs: []outputInfo{
27330 {0, 167772158},
27331 },
27332 },
27333 },
27334 {
27335 name: "MOVHUload",
27336 auxType: auxSymOff,
27337 argLen: 2,
27338 faultOnNilArg0: true,
27339 symEffect: SymRead,
27340 asm: mips.AMOVHU,
27341 reg: regInfo{
27342 inputs: []inputInfo{
27343 {0, 4611686018695823358},
27344 },
27345 outputs: []outputInfo{
27346 {0, 167772158},
27347 },
27348 },
27349 },
27350 {
27351 name: "MOVWload",
27352 auxType: auxSymOff,
27353 argLen: 2,
27354 faultOnNilArg0: true,
27355 symEffect: SymRead,
27356 asm: mips.AMOVW,
27357 reg: regInfo{
27358 inputs: []inputInfo{
27359 {0, 4611686018695823358},
27360 },
27361 outputs: []outputInfo{
27362 {0, 167772158},
27363 },
27364 },
27365 },
27366 {
27367 name: "MOVWUload",
27368 auxType: auxSymOff,
27369 argLen: 2,
27370 faultOnNilArg0: true,
27371 symEffect: SymRead,
27372 asm: mips.AMOVWU,
27373 reg: regInfo{
27374 inputs: []inputInfo{
27375 {0, 4611686018695823358},
27376 },
27377 outputs: []outputInfo{
27378 {0, 167772158},
27379 },
27380 },
27381 },
27382 {
27383 name: "MOVVload",
27384 auxType: auxSymOff,
27385 argLen: 2,
27386 faultOnNilArg0: true,
27387 symEffect: SymRead,
27388 asm: mips.AMOVV,
27389 reg: regInfo{
27390 inputs: []inputInfo{
27391 {0, 4611686018695823358},
27392 },
27393 outputs: []outputInfo{
27394 {0, 167772158},
27395 },
27396 },
27397 },
27398 {
27399 name: "MOVFload",
27400 auxType: auxSymOff,
27401 argLen: 2,
27402 faultOnNilArg0: true,
27403 symEffect: SymRead,
27404 asm: mips.AMOVF,
27405 reg: regInfo{
27406 inputs: []inputInfo{
27407 {0, 4611686018695823358},
27408 },
27409 outputs: []outputInfo{
27410 {0, 1152921504338411520},
27411 },
27412 },
27413 },
27414 {
27415 name: "MOVDload",
27416 auxType: auxSymOff,
27417 argLen: 2,
27418 faultOnNilArg0: true,
27419 symEffect: SymRead,
27420 asm: mips.AMOVD,
27421 reg: regInfo{
27422 inputs: []inputInfo{
27423 {0, 4611686018695823358},
27424 },
27425 outputs: []outputInfo{
27426 {0, 1152921504338411520},
27427 },
27428 },
27429 },
27430 {
27431 name: "MOVBstore",
27432 auxType: auxSymOff,
27433 argLen: 3,
27434 faultOnNilArg0: true,
27435 symEffect: SymWrite,
27436 asm: mips.AMOVB,
27437 reg: regInfo{
27438 inputs: []inputInfo{
27439 {1, 234881022},
27440 {0, 4611686018695823358},
27441 },
27442 },
27443 },
27444 {
27445 name: "MOVHstore",
27446 auxType: auxSymOff,
27447 argLen: 3,
27448 faultOnNilArg0: true,
27449 symEffect: SymWrite,
27450 asm: mips.AMOVH,
27451 reg: regInfo{
27452 inputs: []inputInfo{
27453 {1, 234881022},
27454 {0, 4611686018695823358},
27455 },
27456 },
27457 },
27458 {
27459 name: "MOVWstore",
27460 auxType: auxSymOff,
27461 argLen: 3,
27462 faultOnNilArg0: true,
27463 symEffect: SymWrite,
27464 asm: mips.AMOVW,
27465 reg: regInfo{
27466 inputs: []inputInfo{
27467 {1, 234881022},
27468 {0, 4611686018695823358},
27469 },
27470 },
27471 },
27472 {
27473 name: "MOVVstore",
27474 auxType: auxSymOff,
27475 argLen: 3,
27476 faultOnNilArg0: true,
27477 symEffect: SymWrite,
27478 asm: mips.AMOVV,
27479 reg: regInfo{
27480 inputs: []inputInfo{
27481 {1, 234881022},
27482 {0, 4611686018695823358},
27483 },
27484 },
27485 },
27486 {
27487 name: "MOVFstore",
27488 auxType: auxSymOff,
27489 argLen: 3,
27490 faultOnNilArg0: true,
27491 symEffect: SymWrite,
27492 asm: mips.AMOVF,
27493 reg: regInfo{
27494 inputs: []inputInfo{
27495 {0, 4611686018695823358},
27496 {1, 1152921504338411520},
27497 },
27498 },
27499 },
27500 {
27501 name: "MOVDstore",
27502 auxType: auxSymOff,
27503 argLen: 3,
27504 faultOnNilArg0: true,
27505 symEffect: SymWrite,
27506 asm: mips.AMOVD,
27507 reg: regInfo{
27508 inputs: []inputInfo{
27509 {0, 4611686018695823358},
27510 {1, 1152921504338411520},
27511 },
27512 },
27513 },
27514 {
27515 name: "MOVBstorezero",
27516 auxType: auxSymOff,
27517 argLen: 2,
27518 faultOnNilArg0: true,
27519 symEffect: SymWrite,
27520 asm: mips.AMOVB,
27521 reg: regInfo{
27522 inputs: []inputInfo{
27523 {0, 4611686018695823358},
27524 },
27525 },
27526 },
27527 {
27528 name: "MOVHstorezero",
27529 auxType: auxSymOff,
27530 argLen: 2,
27531 faultOnNilArg0: true,
27532 symEffect: SymWrite,
27533 asm: mips.AMOVH,
27534 reg: regInfo{
27535 inputs: []inputInfo{
27536 {0, 4611686018695823358},
27537 },
27538 },
27539 },
27540 {
27541 name: "MOVWstorezero",
27542 auxType: auxSymOff,
27543 argLen: 2,
27544 faultOnNilArg0: true,
27545 symEffect: SymWrite,
27546 asm: mips.AMOVW,
27547 reg: regInfo{
27548 inputs: []inputInfo{
27549 {0, 4611686018695823358},
27550 },
27551 },
27552 },
27553 {
27554 name: "MOVVstorezero",
27555 auxType: auxSymOff,
27556 argLen: 2,
27557 faultOnNilArg0: true,
27558 symEffect: SymWrite,
27559 asm: mips.AMOVV,
27560 reg: regInfo{
27561 inputs: []inputInfo{
27562 {0, 4611686018695823358},
27563 },
27564 },
27565 },
27566 {
27567 name: "MOVWfpgp",
27568 argLen: 1,
27569 asm: mips.AMOVW,
27570 reg: regInfo{
27571 inputs: []inputInfo{
27572 {0, 1152921504338411520},
27573 },
27574 outputs: []outputInfo{
27575 {0, 167772158},
27576 },
27577 },
27578 },
27579 {
27580 name: "MOVWgpfp",
27581 argLen: 1,
27582 asm: mips.AMOVW,
27583 reg: regInfo{
27584 inputs: []inputInfo{
27585 {0, 167772158},
27586 },
27587 outputs: []outputInfo{
27588 {0, 1152921504338411520},
27589 },
27590 },
27591 },
27592 {
27593 name: "MOVVfpgp",
27594 argLen: 1,
27595 asm: mips.AMOVV,
27596 reg: regInfo{
27597 inputs: []inputInfo{
27598 {0, 1152921504338411520},
27599 },
27600 outputs: []outputInfo{
27601 {0, 167772158},
27602 },
27603 },
27604 },
27605 {
27606 name: "MOVVgpfp",
27607 argLen: 1,
27608 asm: mips.AMOVV,
27609 reg: regInfo{
27610 inputs: []inputInfo{
27611 {0, 167772158},
27612 },
27613 outputs: []outputInfo{
27614 {0, 1152921504338411520},
27615 },
27616 },
27617 },
27618 {
27619 name: "MOVBreg",
27620 argLen: 1,
27621 asm: mips.AMOVB,
27622 reg: regInfo{
27623 inputs: []inputInfo{
27624 {0, 234881022},
27625 },
27626 outputs: []outputInfo{
27627 {0, 167772158},
27628 },
27629 },
27630 },
27631 {
27632 name: "MOVBUreg",
27633 argLen: 1,
27634 asm: mips.AMOVBU,
27635 reg: regInfo{
27636 inputs: []inputInfo{
27637 {0, 234881022},
27638 },
27639 outputs: []outputInfo{
27640 {0, 167772158},
27641 },
27642 },
27643 },
27644 {
27645 name: "MOVHreg",
27646 argLen: 1,
27647 asm: mips.AMOVH,
27648 reg: regInfo{
27649 inputs: []inputInfo{
27650 {0, 234881022},
27651 },
27652 outputs: []outputInfo{
27653 {0, 167772158},
27654 },
27655 },
27656 },
27657 {
27658 name: "MOVHUreg",
27659 argLen: 1,
27660 asm: mips.AMOVHU,
27661 reg: regInfo{
27662 inputs: []inputInfo{
27663 {0, 234881022},
27664 },
27665 outputs: []outputInfo{
27666 {0, 167772158},
27667 },
27668 },
27669 },
27670 {
27671 name: "MOVWreg",
27672 argLen: 1,
27673 asm: mips.AMOVW,
27674 reg: regInfo{
27675 inputs: []inputInfo{
27676 {0, 234881022},
27677 },
27678 outputs: []outputInfo{
27679 {0, 167772158},
27680 },
27681 },
27682 },
27683 {
27684 name: "MOVWUreg",
27685 argLen: 1,
27686 asm: mips.AMOVWU,
27687 reg: regInfo{
27688 inputs: []inputInfo{
27689 {0, 234881022},
27690 },
27691 outputs: []outputInfo{
27692 {0, 167772158},
27693 },
27694 },
27695 },
27696 {
27697 name: "MOVVreg",
27698 argLen: 1,
27699 asm: mips.AMOVV,
27700 reg: regInfo{
27701 inputs: []inputInfo{
27702 {0, 234881022},
27703 },
27704 outputs: []outputInfo{
27705 {0, 167772158},
27706 },
27707 },
27708 },
27709 {
27710 name: "MOVVnop",
27711 argLen: 1,
27712 resultInArg0: true,
27713 reg: regInfo{
27714 inputs: []inputInfo{
27715 {0, 167772158},
27716 },
27717 outputs: []outputInfo{
27718 {0, 167772158},
27719 },
27720 },
27721 },
27722 {
27723 name: "MOVWF",
27724 argLen: 1,
27725 asm: mips.AMOVWF,
27726 reg: regInfo{
27727 inputs: []inputInfo{
27728 {0, 1152921504338411520},
27729 },
27730 outputs: []outputInfo{
27731 {0, 1152921504338411520},
27732 },
27733 },
27734 },
27735 {
27736 name: "MOVWD",
27737 argLen: 1,
27738 asm: mips.AMOVWD,
27739 reg: regInfo{
27740 inputs: []inputInfo{
27741 {0, 1152921504338411520},
27742 },
27743 outputs: []outputInfo{
27744 {0, 1152921504338411520},
27745 },
27746 },
27747 },
27748 {
27749 name: "MOVVF",
27750 argLen: 1,
27751 asm: mips.AMOVVF,
27752 reg: regInfo{
27753 inputs: []inputInfo{
27754 {0, 1152921504338411520},
27755 },
27756 outputs: []outputInfo{
27757 {0, 1152921504338411520},
27758 },
27759 },
27760 },
27761 {
27762 name: "MOVVD",
27763 argLen: 1,
27764 asm: mips.AMOVVD,
27765 reg: regInfo{
27766 inputs: []inputInfo{
27767 {0, 1152921504338411520},
27768 },
27769 outputs: []outputInfo{
27770 {0, 1152921504338411520},
27771 },
27772 },
27773 },
27774 {
27775 name: "TRUNCFW",
27776 argLen: 1,
27777 asm: mips.ATRUNCFW,
27778 reg: regInfo{
27779 inputs: []inputInfo{
27780 {0, 1152921504338411520},
27781 },
27782 outputs: []outputInfo{
27783 {0, 1152921504338411520},
27784 },
27785 },
27786 },
27787 {
27788 name: "TRUNCDW",
27789 argLen: 1,
27790 asm: mips.ATRUNCDW,
27791 reg: regInfo{
27792 inputs: []inputInfo{
27793 {0, 1152921504338411520},
27794 },
27795 outputs: []outputInfo{
27796 {0, 1152921504338411520},
27797 },
27798 },
27799 },
27800 {
27801 name: "TRUNCFV",
27802 argLen: 1,
27803 asm: mips.ATRUNCFV,
27804 reg: regInfo{
27805 inputs: []inputInfo{
27806 {0, 1152921504338411520},
27807 },
27808 outputs: []outputInfo{
27809 {0, 1152921504338411520},
27810 },
27811 },
27812 },
27813 {
27814 name: "TRUNCDV",
27815 argLen: 1,
27816 asm: mips.ATRUNCDV,
27817 reg: regInfo{
27818 inputs: []inputInfo{
27819 {0, 1152921504338411520},
27820 },
27821 outputs: []outputInfo{
27822 {0, 1152921504338411520},
27823 },
27824 },
27825 },
27826 {
27827 name: "MOVFD",
27828 argLen: 1,
27829 asm: mips.AMOVFD,
27830 reg: regInfo{
27831 inputs: []inputInfo{
27832 {0, 1152921504338411520},
27833 },
27834 outputs: []outputInfo{
27835 {0, 1152921504338411520},
27836 },
27837 },
27838 },
27839 {
27840 name: "MOVDF",
27841 argLen: 1,
27842 asm: mips.AMOVDF,
27843 reg: regInfo{
27844 inputs: []inputInfo{
27845 {0, 1152921504338411520},
27846 },
27847 outputs: []outputInfo{
27848 {0, 1152921504338411520},
27849 },
27850 },
27851 },
27852 {
27853 name: "CALLstatic",
27854 auxType: auxCallOff,
27855 argLen: 1,
27856 clobberFlags: true,
27857 call: true,
27858 reg: regInfo{
27859 clobbers: 4611686018393833470,
27860 },
27861 },
27862 {
27863 name: "CALLtail",
27864 auxType: auxCallOff,
27865 argLen: 1,
27866 clobberFlags: true,
27867 call: true,
27868 tailCall: true,
27869 reg: regInfo{
27870 clobbers: 4611686018393833470,
27871 },
27872 },
27873 {
27874 name: "CALLclosure",
27875 auxType: auxCallOff,
27876 argLen: 3,
27877 clobberFlags: true,
27878 call: true,
27879 reg: regInfo{
27880 inputs: []inputInfo{
27881 {1, 4194304},
27882 {0, 201326590},
27883 },
27884 clobbers: 4611686018393833470,
27885 },
27886 },
27887 {
27888 name: "CALLinter",
27889 auxType: auxCallOff,
27890 argLen: 2,
27891 clobberFlags: true,
27892 call: true,
27893 reg: regInfo{
27894 inputs: []inputInfo{
27895 {0, 167772158},
27896 },
27897 clobbers: 4611686018393833470,
27898 },
27899 },
27900 {
27901 name: "DUFFZERO",
27902 auxType: auxInt64,
27903 argLen: 2,
27904 faultOnNilArg0: true,
27905 reg: regInfo{
27906 inputs: []inputInfo{
27907 {0, 167772158},
27908 },
27909 clobbers: 134217730,
27910 },
27911 },
27912 {
27913 name: "DUFFCOPY",
27914 auxType: auxInt64,
27915 argLen: 3,
27916 faultOnNilArg0: true,
27917 faultOnNilArg1: true,
27918 reg: regInfo{
27919 inputs: []inputInfo{
27920 {0, 4},
27921 {1, 2},
27922 },
27923 clobbers: 134217734,
27924 },
27925 },
27926 {
27927 name: "LoweredZero",
27928 auxType: auxInt64,
27929 argLen: 3,
27930 clobberFlags: true,
27931 faultOnNilArg0: true,
27932 reg: regInfo{
27933 inputs: []inputInfo{
27934 {0, 2},
27935 {1, 167772158},
27936 },
27937 clobbers: 2,
27938 },
27939 },
27940 {
27941 name: "LoweredMove",
27942 auxType: auxInt64,
27943 argLen: 4,
27944 clobberFlags: true,
27945 faultOnNilArg0: true,
27946 faultOnNilArg1: true,
27947 reg: regInfo{
27948 inputs: []inputInfo{
27949 {0, 4},
27950 {1, 2},
27951 {2, 167772158},
27952 },
27953 clobbers: 6,
27954 },
27955 },
27956 {
27957 name: "LoweredAtomicAnd32",
27958 argLen: 3,
27959 faultOnNilArg0: true,
27960 hasSideEffects: true,
27961 unsafePoint: true,
27962 asm: mips.AAND,
27963 reg: regInfo{
27964 inputs: []inputInfo{
27965 {1, 234881022},
27966 {0, 4611686018695823358},
27967 },
27968 },
27969 },
27970 {
27971 name: "LoweredAtomicOr32",
27972 argLen: 3,
27973 faultOnNilArg0: true,
27974 hasSideEffects: true,
27975 unsafePoint: true,
27976 asm: mips.AOR,
27977 reg: regInfo{
27978 inputs: []inputInfo{
27979 {1, 234881022},
27980 {0, 4611686018695823358},
27981 },
27982 },
27983 },
27984 {
27985 name: "LoweredAtomicLoad8",
27986 argLen: 2,
27987 faultOnNilArg0: true,
27988 reg: regInfo{
27989 inputs: []inputInfo{
27990 {0, 4611686018695823358},
27991 },
27992 outputs: []outputInfo{
27993 {0, 167772158},
27994 },
27995 },
27996 },
27997 {
27998 name: "LoweredAtomicLoad32",
27999 argLen: 2,
28000 faultOnNilArg0: true,
28001 reg: regInfo{
28002 inputs: []inputInfo{
28003 {0, 4611686018695823358},
28004 },
28005 outputs: []outputInfo{
28006 {0, 167772158},
28007 },
28008 },
28009 },
28010 {
28011 name: "LoweredAtomicLoad64",
28012 argLen: 2,
28013 faultOnNilArg0: true,
28014 reg: regInfo{
28015 inputs: []inputInfo{
28016 {0, 4611686018695823358},
28017 },
28018 outputs: []outputInfo{
28019 {0, 167772158},
28020 },
28021 },
28022 },
28023 {
28024 name: "LoweredAtomicStore8",
28025 argLen: 3,
28026 faultOnNilArg0: true,
28027 hasSideEffects: true,
28028 reg: regInfo{
28029 inputs: []inputInfo{
28030 {1, 234881022},
28031 {0, 4611686018695823358},
28032 },
28033 },
28034 },
28035 {
28036 name: "LoweredAtomicStore32",
28037 argLen: 3,
28038 faultOnNilArg0: true,
28039 hasSideEffects: true,
28040 reg: regInfo{
28041 inputs: []inputInfo{
28042 {1, 234881022},
28043 {0, 4611686018695823358},
28044 },
28045 },
28046 },
28047 {
28048 name: "LoweredAtomicStore64",
28049 argLen: 3,
28050 faultOnNilArg0: true,
28051 hasSideEffects: true,
28052 reg: regInfo{
28053 inputs: []inputInfo{
28054 {1, 234881022},
28055 {0, 4611686018695823358},
28056 },
28057 },
28058 },
28059 {
28060 name: "LoweredAtomicStorezero32",
28061 argLen: 2,
28062 faultOnNilArg0: true,
28063 hasSideEffects: true,
28064 reg: regInfo{
28065 inputs: []inputInfo{
28066 {0, 4611686018695823358},
28067 },
28068 },
28069 },
28070 {
28071 name: "LoweredAtomicStorezero64",
28072 argLen: 2,
28073 faultOnNilArg0: true,
28074 hasSideEffects: true,
28075 reg: regInfo{
28076 inputs: []inputInfo{
28077 {0, 4611686018695823358},
28078 },
28079 },
28080 },
28081 {
28082 name: "LoweredAtomicExchange32",
28083 argLen: 3,
28084 resultNotInArgs: true,
28085 faultOnNilArg0: true,
28086 hasSideEffects: true,
28087 unsafePoint: true,
28088 reg: regInfo{
28089 inputs: []inputInfo{
28090 {1, 234881022},
28091 {0, 4611686018695823358},
28092 },
28093 outputs: []outputInfo{
28094 {0, 167772158},
28095 },
28096 },
28097 },
28098 {
28099 name: "LoweredAtomicExchange64",
28100 argLen: 3,
28101 resultNotInArgs: true,
28102 faultOnNilArg0: true,
28103 hasSideEffects: true,
28104 unsafePoint: true,
28105 reg: regInfo{
28106 inputs: []inputInfo{
28107 {1, 234881022},
28108 {0, 4611686018695823358},
28109 },
28110 outputs: []outputInfo{
28111 {0, 167772158},
28112 },
28113 },
28114 },
28115 {
28116 name: "LoweredAtomicAdd32",
28117 argLen: 3,
28118 resultNotInArgs: true,
28119 faultOnNilArg0: true,
28120 hasSideEffects: true,
28121 unsafePoint: true,
28122 reg: regInfo{
28123 inputs: []inputInfo{
28124 {1, 234881022},
28125 {0, 4611686018695823358},
28126 },
28127 outputs: []outputInfo{
28128 {0, 167772158},
28129 },
28130 },
28131 },
28132 {
28133 name: "LoweredAtomicAdd64",
28134 argLen: 3,
28135 resultNotInArgs: true,
28136 faultOnNilArg0: true,
28137 hasSideEffects: true,
28138 unsafePoint: true,
28139 reg: regInfo{
28140 inputs: []inputInfo{
28141 {1, 234881022},
28142 {0, 4611686018695823358},
28143 },
28144 outputs: []outputInfo{
28145 {0, 167772158},
28146 },
28147 },
28148 },
28149 {
28150 name: "LoweredAtomicAddconst32",
28151 auxType: auxInt32,
28152 argLen: 2,
28153 resultNotInArgs: true,
28154 faultOnNilArg0: true,
28155 hasSideEffects: true,
28156 unsafePoint: true,
28157 reg: regInfo{
28158 inputs: []inputInfo{
28159 {0, 4611686018695823358},
28160 },
28161 outputs: []outputInfo{
28162 {0, 167772158},
28163 },
28164 },
28165 },
28166 {
28167 name: "LoweredAtomicAddconst64",
28168 auxType: auxInt64,
28169 argLen: 2,
28170 resultNotInArgs: true,
28171 faultOnNilArg0: true,
28172 hasSideEffects: true,
28173 unsafePoint: true,
28174 reg: regInfo{
28175 inputs: []inputInfo{
28176 {0, 4611686018695823358},
28177 },
28178 outputs: []outputInfo{
28179 {0, 167772158},
28180 },
28181 },
28182 },
28183 {
28184 name: "LoweredAtomicCas32",
28185 argLen: 4,
28186 resultNotInArgs: true,
28187 faultOnNilArg0: true,
28188 hasSideEffects: true,
28189 unsafePoint: true,
28190 reg: regInfo{
28191 inputs: []inputInfo{
28192 {1, 234881022},
28193 {2, 234881022},
28194 {0, 4611686018695823358},
28195 },
28196 outputs: []outputInfo{
28197 {0, 167772158},
28198 },
28199 },
28200 },
28201 {
28202 name: "LoweredAtomicCas64",
28203 argLen: 4,
28204 resultNotInArgs: true,
28205 faultOnNilArg0: true,
28206 hasSideEffects: true,
28207 unsafePoint: true,
28208 reg: regInfo{
28209 inputs: []inputInfo{
28210 {1, 234881022},
28211 {2, 234881022},
28212 {0, 4611686018695823358},
28213 },
28214 outputs: []outputInfo{
28215 {0, 167772158},
28216 },
28217 },
28218 },
28219 {
28220 name: "LoweredNilCheck",
28221 argLen: 2,
28222 nilCheck: true,
28223 faultOnNilArg0: true,
28224 reg: regInfo{
28225 inputs: []inputInfo{
28226 {0, 234881022},
28227 },
28228 },
28229 },
28230 {
28231 name: "FPFlagTrue",
28232 argLen: 1,
28233 reg: regInfo{
28234 outputs: []outputInfo{
28235 {0, 167772158},
28236 },
28237 },
28238 },
28239 {
28240 name: "FPFlagFalse",
28241 argLen: 1,
28242 reg: regInfo{
28243 outputs: []outputInfo{
28244 {0, 167772158},
28245 },
28246 },
28247 },
28248 {
28249 name: "LoweredGetClosurePtr",
28250 argLen: 0,
28251 zeroWidth: true,
28252 reg: regInfo{
28253 outputs: []outputInfo{
28254 {0, 4194304},
28255 },
28256 },
28257 },
28258 {
28259 name: "LoweredGetCallerSP",
28260 argLen: 1,
28261 rematerializeable: true,
28262 reg: regInfo{
28263 outputs: []outputInfo{
28264 {0, 167772158},
28265 },
28266 },
28267 },
28268 {
28269 name: "LoweredGetCallerPC",
28270 argLen: 0,
28271 rematerializeable: true,
28272 reg: regInfo{
28273 outputs: []outputInfo{
28274 {0, 167772158},
28275 },
28276 },
28277 },
28278 {
28279 name: "LoweredWB",
28280 auxType: auxInt64,
28281 argLen: 1,
28282 clobberFlags: true,
28283 reg: regInfo{
28284 clobbers: 4611686018293170176,
28285 outputs: []outputInfo{
28286 {0, 16777216},
28287 },
28288 },
28289 },
28290 {
28291 name: "LoweredPanicBoundsA",
28292 auxType: auxInt64,
28293 argLen: 3,
28294 call: true,
28295 reg: regInfo{
28296 inputs: []inputInfo{
28297 {0, 8},
28298 {1, 16},
28299 },
28300 },
28301 },
28302 {
28303 name: "LoweredPanicBoundsB",
28304 auxType: auxInt64,
28305 argLen: 3,
28306 call: true,
28307 reg: regInfo{
28308 inputs: []inputInfo{
28309 {0, 4},
28310 {1, 8},
28311 },
28312 },
28313 },
28314 {
28315 name: "LoweredPanicBoundsC",
28316 auxType: auxInt64,
28317 argLen: 3,
28318 call: true,
28319 reg: regInfo{
28320 inputs: []inputInfo{
28321 {0, 2},
28322 {1, 4},
28323 },
28324 },
28325 },
28326
28327 {
28328 name: "ADD",
28329 argLen: 2,
28330 commutative: true,
28331 asm: ppc64.AADD,
28332 reg: regInfo{
28333 inputs: []inputInfo{
28334 {0, 1073733630},
28335 {1, 1073733630},
28336 },
28337 outputs: []outputInfo{
28338 {0, 1073733624},
28339 },
28340 },
28341 },
28342 {
28343 name: "ADDCC",
28344 argLen: 2,
28345 commutative: true,
28346 asm: ppc64.AADDCC,
28347 reg: regInfo{
28348 inputs: []inputInfo{
28349 {0, 1073733630},
28350 {1, 1073733630},
28351 },
28352 outputs: []outputInfo{
28353 {0, 1073733624},
28354 },
28355 },
28356 },
28357 {
28358 name: "ADDconst",
28359 auxType: auxInt64,
28360 argLen: 1,
28361 asm: ppc64.AADD,
28362 reg: regInfo{
28363 inputs: []inputInfo{
28364 {0, 1073733630},
28365 },
28366 outputs: []outputInfo{
28367 {0, 1073733624},
28368 },
28369 },
28370 },
28371 {
28372 name: "ADDCCconst",
28373 auxType: auxInt64,
28374 argLen: 1,
28375 asm: ppc64.AADDCCC,
28376 reg: regInfo{
28377 inputs: []inputInfo{
28378 {0, 1073733630},
28379 },
28380 clobbers: 9223372036854775808,
28381 outputs: []outputInfo{
28382 {0, 1073733624},
28383 },
28384 },
28385 },
28386 {
28387 name: "FADD",
28388 argLen: 2,
28389 commutative: true,
28390 asm: ppc64.AFADD,
28391 reg: regInfo{
28392 inputs: []inputInfo{
28393 {0, 9223372032559808512},
28394 {1, 9223372032559808512},
28395 },
28396 outputs: []outputInfo{
28397 {0, 9223372032559808512},
28398 },
28399 },
28400 },
28401 {
28402 name: "FADDS",
28403 argLen: 2,
28404 commutative: true,
28405 asm: ppc64.AFADDS,
28406 reg: regInfo{
28407 inputs: []inputInfo{
28408 {0, 9223372032559808512},
28409 {1, 9223372032559808512},
28410 },
28411 outputs: []outputInfo{
28412 {0, 9223372032559808512},
28413 },
28414 },
28415 },
28416 {
28417 name: "SUB",
28418 argLen: 2,
28419 asm: ppc64.ASUB,
28420 reg: regInfo{
28421 inputs: []inputInfo{
28422 {0, 1073733630},
28423 {1, 1073733630},
28424 },
28425 outputs: []outputInfo{
28426 {0, 1073733624},
28427 },
28428 },
28429 },
28430 {
28431 name: "SUBCC",
28432 argLen: 2,
28433 asm: ppc64.ASUBCC,
28434 reg: regInfo{
28435 inputs: []inputInfo{
28436 {0, 1073733630},
28437 {1, 1073733630},
28438 },
28439 outputs: []outputInfo{
28440 {0, 1073733624},
28441 },
28442 },
28443 },
28444 {
28445 name: "SUBFCconst",
28446 auxType: auxInt64,
28447 argLen: 1,
28448 asm: ppc64.ASUBC,
28449 reg: regInfo{
28450 inputs: []inputInfo{
28451 {0, 1073733630},
28452 },
28453 clobbers: 9223372036854775808,
28454 outputs: []outputInfo{
28455 {0, 1073733624},
28456 },
28457 },
28458 },
28459 {
28460 name: "FSUB",
28461 argLen: 2,
28462 asm: ppc64.AFSUB,
28463 reg: regInfo{
28464 inputs: []inputInfo{
28465 {0, 9223372032559808512},
28466 {1, 9223372032559808512},
28467 },
28468 outputs: []outputInfo{
28469 {0, 9223372032559808512},
28470 },
28471 },
28472 },
28473 {
28474 name: "FSUBS",
28475 argLen: 2,
28476 asm: ppc64.AFSUBS,
28477 reg: regInfo{
28478 inputs: []inputInfo{
28479 {0, 9223372032559808512},
28480 {1, 9223372032559808512},
28481 },
28482 outputs: []outputInfo{
28483 {0, 9223372032559808512},
28484 },
28485 },
28486 },
28487 {
28488 name: "XSMINJDP",
28489 argLen: 2,
28490 asm: ppc64.AXSMINJDP,
28491 reg: regInfo{
28492 inputs: []inputInfo{
28493 {0, 9223372032559808512},
28494 {1, 9223372032559808512},
28495 },
28496 outputs: []outputInfo{
28497 {0, 9223372032559808512},
28498 },
28499 },
28500 },
28501 {
28502 name: "XSMAXJDP",
28503 argLen: 2,
28504 asm: ppc64.AXSMAXJDP,
28505 reg: regInfo{
28506 inputs: []inputInfo{
28507 {0, 9223372032559808512},
28508 {1, 9223372032559808512},
28509 },
28510 outputs: []outputInfo{
28511 {0, 9223372032559808512},
28512 },
28513 },
28514 },
28515 {
28516 name: "MULLD",
28517 argLen: 2,
28518 commutative: true,
28519 asm: ppc64.AMULLD,
28520 reg: regInfo{
28521 inputs: []inputInfo{
28522 {0, 1073733630},
28523 {1, 1073733630},
28524 },
28525 outputs: []outputInfo{
28526 {0, 1073733624},
28527 },
28528 },
28529 },
28530 {
28531 name: "MULLW",
28532 argLen: 2,
28533 commutative: true,
28534 asm: ppc64.AMULLW,
28535 reg: regInfo{
28536 inputs: []inputInfo{
28537 {0, 1073733630},
28538 {1, 1073733630},
28539 },
28540 outputs: []outputInfo{
28541 {0, 1073733624},
28542 },
28543 },
28544 },
28545 {
28546 name: "MULLDconst",
28547 auxType: auxInt32,
28548 argLen: 1,
28549 asm: ppc64.AMULLD,
28550 reg: regInfo{
28551 inputs: []inputInfo{
28552 {0, 1073733630},
28553 },
28554 outputs: []outputInfo{
28555 {0, 1073733624},
28556 },
28557 },
28558 },
28559 {
28560 name: "MULLWconst",
28561 auxType: auxInt32,
28562 argLen: 1,
28563 asm: ppc64.AMULLW,
28564 reg: regInfo{
28565 inputs: []inputInfo{
28566 {0, 1073733630},
28567 },
28568 outputs: []outputInfo{
28569 {0, 1073733624},
28570 },
28571 },
28572 },
28573 {
28574 name: "MADDLD",
28575 argLen: 3,
28576 asm: ppc64.AMADDLD,
28577 reg: regInfo{
28578 inputs: []inputInfo{
28579 {0, 1073733630},
28580 {1, 1073733630},
28581 {2, 1073733630},
28582 },
28583 outputs: []outputInfo{
28584 {0, 1073733624},
28585 },
28586 },
28587 },
28588 {
28589 name: "MULHD",
28590 argLen: 2,
28591 commutative: true,
28592 asm: ppc64.AMULHD,
28593 reg: regInfo{
28594 inputs: []inputInfo{
28595 {0, 1073733630},
28596 {1, 1073733630},
28597 },
28598 outputs: []outputInfo{
28599 {0, 1073733624},
28600 },
28601 },
28602 },
28603 {
28604 name: "MULHW",
28605 argLen: 2,
28606 commutative: true,
28607 asm: ppc64.AMULHW,
28608 reg: regInfo{
28609 inputs: []inputInfo{
28610 {0, 1073733630},
28611 {1, 1073733630},
28612 },
28613 outputs: []outputInfo{
28614 {0, 1073733624},
28615 },
28616 },
28617 },
28618 {
28619 name: "MULHDU",
28620 argLen: 2,
28621 commutative: true,
28622 asm: ppc64.AMULHDU,
28623 reg: regInfo{
28624 inputs: []inputInfo{
28625 {0, 1073733630},
28626 {1, 1073733630},
28627 },
28628 outputs: []outputInfo{
28629 {0, 1073733624},
28630 },
28631 },
28632 },
28633 {
28634 name: "MULHWU",
28635 argLen: 2,
28636 commutative: true,
28637 asm: ppc64.AMULHWU,
28638 reg: regInfo{
28639 inputs: []inputInfo{
28640 {0, 1073733630},
28641 {1, 1073733630},
28642 },
28643 outputs: []outputInfo{
28644 {0, 1073733624},
28645 },
28646 },
28647 },
28648 {
28649 name: "FMUL",
28650 argLen: 2,
28651 commutative: true,
28652 asm: ppc64.AFMUL,
28653 reg: regInfo{
28654 inputs: []inputInfo{
28655 {0, 9223372032559808512},
28656 {1, 9223372032559808512},
28657 },
28658 outputs: []outputInfo{
28659 {0, 9223372032559808512},
28660 },
28661 },
28662 },
28663 {
28664 name: "FMULS",
28665 argLen: 2,
28666 commutative: true,
28667 asm: ppc64.AFMULS,
28668 reg: regInfo{
28669 inputs: []inputInfo{
28670 {0, 9223372032559808512},
28671 {1, 9223372032559808512},
28672 },
28673 outputs: []outputInfo{
28674 {0, 9223372032559808512},
28675 },
28676 },
28677 },
28678 {
28679 name: "FMADD",
28680 argLen: 3,
28681 asm: ppc64.AFMADD,
28682 reg: regInfo{
28683 inputs: []inputInfo{
28684 {0, 9223372032559808512},
28685 {1, 9223372032559808512},
28686 {2, 9223372032559808512},
28687 },
28688 outputs: []outputInfo{
28689 {0, 9223372032559808512},
28690 },
28691 },
28692 },
28693 {
28694 name: "FMADDS",
28695 argLen: 3,
28696 asm: ppc64.AFMADDS,
28697 reg: regInfo{
28698 inputs: []inputInfo{
28699 {0, 9223372032559808512},
28700 {1, 9223372032559808512},
28701 {2, 9223372032559808512},
28702 },
28703 outputs: []outputInfo{
28704 {0, 9223372032559808512},
28705 },
28706 },
28707 },
28708 {
28709 name: "FMSUB",
28710 argLen: 3,
28711 asm: ppc64.AFMSUB,
28712 reg: regInfo{
28713 inputs: []inputInfo{
28714 {0, 9223372032559808512},
28715 {1, 9223372032559808512},
28716 {2, 9223372032559808512},
28717 },
28718 outputs: []outputInfo{
28719 {0, 9223372032559808512},
28720 },
28721 },
28722 },
28723 {
28724 name: "FMSUBS",
28725 argLen: 3,
28726 asm: ppc64.AFMSUBS,
28727 reg: regInfo{
28728 inputs: []inputInfo{
28729 {0, 9223372032559808512},
28730 {1, 9223372032559808512},
28731 {2, 9223372032559808512},
28732 },
28733 outputs: []outputInfo{
28734 {0, 9223372032559808512},
28735 },
28736 },
28737 },
28738 {
28739 name: "SRAD",
28740 argLen: 2,
28741 asm: ppc64.ASRAD,
28742 reg: regInfo{
28743 inputs: []inputInfo{
28744 {0, 1073733630},
28745 {1, 1073733630},
28746 },
28747 clobbers: 9223372036854775808,
28748 outputs: []outputInfo{
28749 {0, 1073733624},
28750 },
28751 },
28752 },
28753 {
28754 name: "SRAW",
28755 argLen: 2,
28756 asm: ppc64.ASRAW,
28757 reg: regInfo{
28758 inputs: []inputInfo{
28759 {0, 1073733630},
28760 {1, 1073733630},
28761 },
28762 clobbers: 9223372036854775808,
28763 outputs: []outputInfo{
28764 {0, 1073733624},
28765 },
28766 },
28767 },
28768 {
28769 name: "SRD",
28770 argLen: 2,
28771 asm: ppc64.ASRD,
28772 reg: regInfo{
28773 inputs: []inputInfo{
28774 {0, 1073733630},
28775 {1, 1073733630},
28776 },
28777 outputs: []outputInfo{
28778 {0, 1073733624},
28779 },
28780 },
28781 },
28782 {
28783 name: "SRW",
28784 argLen: 2,
28785 asm: ppc64.ASRW,
28786 reg: regInfo{
28787 inputs: []inputInfo{
28788 {0, 1073733630},
28789 {1, 1073733630},
28790 },
28791 outputs: []outputInfo{
28792 {0, 1073733624},
28793 },
28794 },
28795 },
28796 {
28797 name: "SLD",
28798 argLen: 2,
28799 asm: ppc64.ASLD,
28800 reg: regInfo{
28801 inputs: []inputInfo{
28802 {0, 1073733630},
28803 {1, 1073733630},
28804 },
28805 outputs: []outputInfo{
28806 {0, 1073733624},
28807 },
28808 },
28809 },
28810 {
28811 name: "SLW",
28812 argLen: 2,
28813 asm: ppc64.ASLW,
28814 reg: regInfo{
28815 inputs: []inputInfo{
28816 {0, 1073733630},
28817 {1, 1073733630},
28818 },
28819 outputs: []outputInfo{
28820 {0, 1073733624},
28821 },
28822 },
28823 },
28824 {
28825 name: "ROTL",
28826 argLen: 2,
28827 asm: ppc64.AROTL,
28828 reg: regInfo{
28829 inputs: []inputInfo{
28830 {0, 1073733630},
28831 {1, 1073733630},
28832 },
28833 outputs: []outputInfo{
28834 {0, 1073733624},
28835 },
28836 },
28837 },
28838 {
28839 name: "ROTLW",
28840 argLen: 2,
28841 asm: ppc64.AROTLW,
28842 reg: regInfo{
28843 inputs: []inputInfo{
28844 {0, 1073733630},
28845 {1, 1073733630},
28846 },
28847 outputs: []outputInfo{
28848 {0, 1073733624},
28849 },
28850 },
28851 },
28852 {
28853 name: "CLRLSLWI",
28854 auxType: auxInt32,
28855 argLen: 1,
28856 asm: ppc64.ACLRLSLWI,
28857 reg: regInfo{
28858 inputs: []inputInfo{
28859 {0, 1073733630},
28860 },
28861 outputs: []outputInfo{
28862 {0, 1073733624},
28863 },
28864 },
28865 },
28866 {
28867 name: "CLRLSLDI",
28868 auxType: auxInt32,
28869 argLen: 1,
28870 asm: ppc64.ACLRLSLDI,
28871 reg: regInfo{
28872 inputs: []inputInfo{
28873 {0, 1073733630},
28874 },
28875 outputs: []outputInfo{
28876 {0, 1073733624},
28877 },
28878 },
28879 },
28880 {
28881 name: "ADDC",
28882 argLen: 2,
28883 commutative: true,
28884 asm: ppc64.AADDC,
28885 reg: regInfo{
28886 inputs: []inputInfo{
28887 {0, 1073733630},
28888 {1, 1073733630},
28889 },
28890 clobbers: 9223372036854775808,
28891 outputs: []outputInfo{
28892 {1, 9223372036854775808},
28893 {0, 1073733624},
28894 },
28895 },
28896 },
28897 {
28898 name: "SUBC",
28899 argLen: 2,
28900 asm: ppc64.ASUBC,
28901 reg: regInfo{
28902 inputs: []inputInfo{
28903 {0, 1073733630},
28904 {1, 1073733630},
28905 },
28906 clobbers: 9223372036854775808,
28907 outputs: []outputInfo{
28908 {1, 9223372036854775808},
28909 {0, 1073733624},
28910 },
28911 },
28912 },
28913 {
28914 name: "ADDCconst",
28915 auxType: auxInt64,
28916 argLen: 1,
28917 asm: ppc64.AADDC,
28918 reg: regInfo{
28919 inputs: []inputInfo{
28920 {0, 1073733630},
28921 },
28922 outputs: []outputInfo{
28923 {1, 9223372036854775808},
28924 {0, 1073733624},
28925 },
28926 },
28927 },
28928 {
28929 name: "SUBCconst",
28930 auxType: auxInt64,
28931 argLen: 1,
28932 asm: ppc64.ASUBC,
28933 reg: regInfo{
28934 inputs: []inputInfo{
28935 {0, 1073733630},
28936 },
28937 outputs: []outputInfo{
28938 {1, 9223372036854775808},
28939 {0, 1073733624},
28940 },
28941 },
28942 },
28943 {
28944 name: "ADDE",
28945 argLen: 3,
28946 commutative: true,
28947 asm: ppc64.AADDE,
28948 reg: regInfo{
28949 inputs: []inputInfo{
28950 {2, 9223372036854775808},
28951 {0, 1073733630},
28952 {1, 1073733630},
28953 },
28954 clobbers: 9223372036854775808,
28955 outputs: []outputInfo{
28956 {1, 9223372036854775808},
28957 {0, 1073733624},
28958 },
28959 },
28960 },
28961 {
28962 name: "ADDZE",
28963 argLen: 2,
28964 asm: ppc64.AADDZE,
28965 reg: regInfo{
28966 inputs: []inputInfo{
28967 {1, 9223372036854775808},
28968 {0, 1073733630},
28969 },
28970 clobbers: 9223372036854775808,
28971 outputs: []outputInfo{
28972 {1, 9223372036854775808},
28973 {0, 1073733624},
28974 },
28975 },
28976 },
28977 {
28978 name: "SUBE",
28979 argLen: 3,
28980 asm: ppc64.ASUBE,
28981 reg: regInfo{
28982 inputs: []inputInfo{
28983 {2, 9223372036854775808},
28984 {0, 1073733630},
28985 {1, 1073733630},
28986 },
28987 clobbers: 9223372036854775808,
28988 outputs: []outputInfo{
28989 {1, 9223372036854775808},
28990 {0, 1073733624},
28991 },
28992 },
28993 },
28994 {
28995 name: "ADDZEzero",
28996 argLen: 1,
28997 asm: ppc64.AADDZE,
28998 reg: regInfo{
28999 inputs: []inputInfo{
29000 {0, 9223372036854775808},
29001 },
29002 clobbers: 9223372036854775808,
29003 outputs: []outputInfo{
29004 {0, 1073733624},
29005 },
29006 },
29007 },
29008 {
29009 name: "SUBZEzero",
29010 argLen: 1,
29011 asm: ppc64.ASUBZE,
29012 reg: regInfo{
29013 inputs: []inputInfo{
29014 {0, 9223372036854775808},
29015 },
29016 clobbers: 9223372036854775808,
29017 outputs: []outputInfo{
29018 {0, 1073733624},
29019 },
29020 },
29021 },
29022 {
29023 name: "SRADconst",
29024 auxType: auxInt64,
29025 argLen: 1,
29026 asm: ppc64.ASRAD,
29027 reg: regInfo{
29028 inputs: []inputInfo{
29029 {0, 1073733630},
29030 },
29031 clobbers: 9223372036854775808,
29032 outputs: []outputInfo{
29033 {0, 1073733624},
29034 },
29035 },
29036 },
29037 {
29038 name: "SRAWconst",
29039 auxType: auxInt64,
29040 argLen: 1,
29041 asm: ppc64.ASRAW,
29042 reg: regInfo{
29043 inputs: []inputInfo{
29044 {0, 1073733630},
29045 },
29046 clobbers: 9223372036854775808,
29047 outputs: []outputInfo{
29048 {0, 1073733624},
29049 },
29050 },
29051 },
29052 {
29053 name: "SRDconst",
29054 auxType: auxInt64,
29055 argLen: 1,
29056 asm: ppc64.ASRD,
29057 reg: regInfo{
29058 inputs: []inputInfo{
29059 {0, 1073733630},
29060 },
29061 outputs: []outputInfo{
29062 {0, 1073733624},
29063 },
29064 },
29065 },
29066 {
29067 name: "SRWconst",
29068 auxType: auxInt64,
29069 argLen: 1,
29070 asm: ppc64.ASRW,
29071 reg: regInfo{
29072 inputs: []inputInfo{
29073 {0, 1073733630},
29074 },
29075 outputs: []outputInfo{
29076 {0, 1073733624},
29077 },
29078 },
29079 },
29080 {
29081 name: "SLDconst",
29082 auxType: auxInt64,
29083 argLen: 1,
29084 asm: ppc64.ASLD,
29085 reg: regInfo{
29086 inputs: []inputInfo{
29087 {0, 1073733630},
29088 },
29089 outputs: []outputInfo{
29090 {0, 1073733624},
29091 },
29092 },
29093 },
29094 {
29095 name: "SLWconst",
29096 auxType: auxInt64,
29097 argLen: 1,
29098 asm: ppc64.ASLW,
29099 reg: regInfo{
29100 inputs: []inputInfo{
29101 {0, 1073733630},
29102 },
29103 outputs: []outputInfo{
29104 {0, 1073733624},
29105 },
29106 },
29107 },
29108 {
29109 name: "ROTLconst",
29110 auxType: auxInt64,
29111 argLen: 1,
29112 asm: ppc64.AROTL,
29113 reg: regInfo{
29114 inputs: []inputInfo{
29115 {0, 1073733630},
29116 },
29117 outputs: []outputInfo{
29118 {0, 1073733624},
29119 },
29120 },
29121 },
29122 {
29123 name: "ROTLWconst",
29124 auxType: auxInt64,
29125 argLen: 1,
29126 asm: ppc64.AROTLW,
29127 reg: regInfo{
29128 inputs: []inputInfo{
29129 {0, 1073733630},
29130 },
29131 outputs: []outputInfo{
29132 {0, 1073733624},
29133 },
29134 },
29135 },
29136 {
29137 name: "EXTSWSLconst",
29138 auxType: auxInt64,
29139 argLen: 1,
29140 asm: ppc64.AEXTSWSLI,
29141 reg: regInfo{
29142 inputs: []inputInfo{
29143 {0, 1073733630},
29144 },
29145 outputs: []outputInfo{
29146 {0, 1073733624},
29147 },
29148 },
29149 },
29150 {
29151 name: "RLWINM",
29152 auxType: auxInt64,
29153 argLen: 1,
29154 asm: ppc64.ARLWNM,
29155 reg: regInfo{
29156 inputs: []inputInfo{
29157 {0, 1073733630},
29158 },
29159 outputs: []outputInfo{
29160 {0, 1073733624},
29161 },
29162 },
29163 },
29164 {
29165 name: "RLWNM",
29166 auxType: auxInt64,
29167 argLen: 2,
29168 asm: ppc64.ARLWNM,
29169 reg: regInfo{
29170 inputs: []inputInfo{
29171 {0, 1073733630},
29172 {1, 1073733630},
29173 },
29174 outputs: []outputInfo{
29175 {0, 1073733624},
29176 },
29177 },
29178 },
29179 {
29180 name: "RLWMI",
29181 auxType: auxInt64,
29182 argLen: 2,
29183 resultInArg0: true,
29184 asm: ppc64.ARLWMI,
29185 reg: regInfo{
29186 inputs: []inputInfo{
29187 {0, 1073733624},
29188 {1, 1073733630},
29189 },
29190 outputs: []outputInfo{
29191 {0, 1073733624},
29192 },
29193 },
29194 },
29195 {
29196 name: "RLDICL",
29197 auxType: auxInt64,
29198 argLen: 1,
29199 asm: ppc64.ARLDICL,
29200 reg: regInfo{
29201 inputs: []inputInfo{
29202 {0, 1073733630},
29203 },
29204 outputs: []outputInfo{
29205 {0, 1073733624},
29206 },
29207 },
29208 },
29209 {
29210 name: "RLDICLCC",
29211 auxType: auxInt64,
29212 argLen: 1,
29213 asm: ppc64.ARLDICLCC,
29214 reg: regInfo{
29215 inputs: []inputInfo{
29216 {0, 1073733630},
29217 },
29218 outputs: []outputInfo{
29219 {0, 1073733624},
29220 },
29221 },
29222 },
29223 {
29224 name: "RLDICR",
29225 auxType: auxInt64,
29226 argLen: 1,
29227 asm: ppc64.ARLDICR,
29228 reg: regInfo{
29229 inputs: []inputInfo{
29230 {0, 1073733630},
29231 },
29232 outputs: []outputInfo{
29233 {0, 1073733624},
29234 },
29235 },
29236 },
29237 {
29238 name: "CNTLZD",
29239 argLen: 1,
29240 asm: ppc64.ACNTLZD,
29241 reg: regInfo{
29242 inputs: []inputInfo{
29243 {0, 1073733630},
29244 },
29245 outputs: []outputInfo{
29246 {0, 1073733624},
29247 },
29248 },
29249 },
29250 {
29251 name: "CNTLZDCC",
29252 argLen: 1,
29253 asm: ppc64.ACNTLZDCC,
29254 reg: regInfo{
29255 inputs: []inputInfo{
29256 {0, 1073733630},
29257 },
29258 outputs: []outputInfo{
29259 {0, 1073733624},
29260 },
29261 },
29262 },
29263 {
29264 name: "CNTLZW",
29265 argLen: 1,
29266 asm: ppc64.ACNTLZW,
29267 reg: regInfo{
29268 inputs: []inputInfo{
29269 {0, 1073733630},
29270 },
29271 outputs: []outputInfo{
29272 {0, 1073733624},
29273 },
29274 },
29275 },
29276 {
29277 name: "CNTTZD",
29278 argLen: 1,
29279 asm: ppc64.ACNTTZD,
29280 reg: regInfo{
29281 inputs: []inputInfo{
29282 {0, 1073733630},
29283 },
29284 outputs: []outputInfo{
29285 {0, 1073733624},
29286 },
29287 },
29288 },
29289 {
29290 name: "CNTTZW",
29291 argLen: 1,
29292 asm: ppc64.ACNTTZW,
29293 reg: regInfo{
29294 inputs: []inputInfo{
29295 {0, 1073733630},
29296 },
29297 outputs: []outputInfo{
29298 {0, 1073733624},
29299 },
29300 },
29301 },
29302 {
29303 name: "POPCNTD",
29304 argLen: 1,
29305 asm: ppc64.APOPCNTD,
29306 reg: regInfo{
29307 inputs: []inputInfo{
29308 {0, 1073733630},
29309 },
29310 outputs: []outputInfo{
29311 {0, 1073733624},
29312 },
29313 },
29314 },
29315 {
29316 name: "POPCNTW",
29317 argLen: 1,
29318 asm: ppc64.APOPCNTW,
29319 reg: regInfo{
29320 inputs: []inputInfo{
29321 {0, 1073733630},
29322 },
29323 outputs: []outputInfo{
29324 {0, 1073733624},
29325 },
29326 },
29327 },
29328 {
29329 name: "POPCNTB",
29330 argLen: 1,
29331 asm: ppc64.APOPCNTB,
29332 reg: regInfo{
29333 inputs: []inputInfo{
29334 {0, 1073733630},
29335 },
29336 outputs: []outputInfo{
29337 {0, 1073733624},
29338 },
29339 },
29340 },
29341 {
29342 name: "FDIV",
29343 argLen: 2,
29344 asm: ppc64.AFDIV,
29345 reg: regInfo{
29346 inputs: []inputInfo{
29347 {0, 9223372032559808512},
29348 {1, 9223372032559808512},
29349 },
29350 outputs: []outputInfo{
29351 {0, 9223372032559808512},
29352 },
29353 },
29354 },
29355 {
29356 name: "FDIVS",
29357 argLen: 2,
29358 asm: ppc64.AFDIVS,
29359 reg: regInfo{
29360 inputs: []inputInfo{
29361 {0, 9223372032559808512},
29362 {1, 9223372032559808512},
29363 },
29364 outputs: []outputInfo{
29365 {0, 9223372032559808512},
29366 },
29367 },
29368 },
29369 {
29370 name: "DIVD",
29371 argLen: 2,
29372 asm: ppc64.ADIVD,
29373 reg: regInfo{
29374 inputs: []inputInfo{
29375 {0, 1073733630},
29376 {1, 1073733630},
29377 },
29378 outputs: []outputInfo{
29379 {0, 1073733624},
29380 },
29381 },
29382 },
29383 {
29384 name: "DIVW",
29385 argLen: 2,
29386 asm: ppc64.ADIVW,
29387 reg: regInfo{
29388 inputs: []inputInfo{
29389 {0, 1073733630},
29390 {1, 1073733630},
29391 },
29392 outputs: []outputInfo{
29393 {0, 1073733624},
29394 },
29395 },
29396 },
29397 {
29398 name: "DIVDU",
29399 argLen: 2,
29400 asm: ppc64.ADIVDU,
29401 reg: regInfo{
29402 inputs: []inputInfo{
29403 {0, 1073733630},
29404 {1, 1073733630},
29405 },
29406 outputs: []outputInfo{
29407 {0, 1073733624},
29408 },
29409 },
29410 },
29411 {
29412 name: "DIVWU",
29413 argLen: 2,
29414 asm: ppc64.ADIVWU,
29415 reg: regInfo{
29416 inputs: []inputInfo{
29417 {0, 1073733630},
29418 {1, 1073733630},
29419 },
29420 outputs: []outputInfo{
29421 {0, 1073733624},
29422 },
29423 },
29424 },
29425 {
29426 name: "MODUD",
29427 argLen: 2,
29428 asm: ppc64.AMODUD,
29429 reg: regInfo{
29430 inputs: []inputInfo{
29431 {0, 1073733630},
29432 {1, 1073733630},
29433 },
29434 outputs: []outputInfo{
29435 {0, 1073733624},
29436 },
29437 },
29438 },
29439 {
29440 name: "MODSD",
29441 argLen: 2,
29442 asm: ppc64.AMODSD,
29443 reg: regInfo{
29444 inputs: []inputInfo{
29445 {0, 1073733630},
29446 {1, 1073733630},
29447 },
29448 outputs: []outputInfo{
29449 {0, 1073733624},
29450 },
29451 },
29452 },
29453 {
29454 name: "MODUW",
29455 argLen: 2,
29456 asm: ppc64.AMODUW,
29457 reg: regInfo{
29458 inputs: []inputInfo{
29459 {0, 1073733630},
29460 {1, 1073733630},
29461 },
29462 outputs: []outputInfo{
29463 {0, 1073733624},
29464 },
29465 },
29466 },
29467 {
29468 name: "MODSW",
29469 argLen: 2,
29470 asm: ppc64.AMODSW,
29471 reg: regInfo{
29472 inputs: []inputInfo{
29473 {0, 1073733630},
29474 {1, 1073733630},
29475 },
29476 outputs: []outputInfo{
29477 {0, 1073733624},
29478 },
29479 },
29480 },
29481 {
29482 name: "FCTIDZ",
29483 argLen: 1,
29484 asm: ppc64.AFCTIDZ,
29485 reg: regInfo{
29486 inputs: []inputInfo{
29487 {0, 9223372032559808512},
29488 },
29489 outputs: []outputInfo{
29490 {0, 9223372032559808512},
29491 },
29492 },
29493 },
29494 {
29495 name: "FCTIWZ",
29496 argLen: 1,
29497 asm: ppc64.AFCTIWZ,
29498 reg: regInfo{
29499 inputs: []inputInfo{
29500 {0, 9223372032559808512},
29501 },
29502 outputs: []outputInfo{
29503 {0, 9223372032559808512},
29504 },
29505 },
29506 },
29507 {
29508 name: "FCFID",
29509 argLen: 1,
29510 asm: ppc64.AFCFID,
29511 reg: regInfo{
29512 inputs: []inputInfo{
29513 {0, 9223372032559808512},
29514 },
29515 outputs: []outputInfo{
29516 {0, 9223372032559808512},
29517 },
29518 },
29519 },
29520 {
29521 name: "FCFIDS",
29522 argLen: 1,
29523 asm: ppc64.AFCFIDS,
29524 reg: regInfo{
29525 inputs: []inputInfo{
29526 {0, 9223372032559808512},
29527 },
29528 outputs: []outputInfo{
29529 {0, 9223372032559808512},
29530 },
29531 },
29532 },
29533 {
29534 name: "FRSP",
29535 argLen: 1,
29536 asm: ppc64.AFRSP,
29537 reg: regInfo{
29538 inputs: []inputInfo{
29539 {0, 9223372032559808512},
29540 },
29541 outputs: []outputInfo{
29542 {0, 9223372032559808512},
29543 },
29544 },
29545 },
29546 {
29547 name: "MFVSRD",
29548 argLen: 1,
29549 asm: ppc64.AMFVSRD,
29550 reg: regInfo{
29551 inputs: []inputInfo{
29552 {0, 9223372032559808512},
29553 },
29554 outputs: []outputInfo{
29555 {0, 1073733624},
29556 },
29557 },
29558 },
29559 {
29560 name: "MTVSRD",
29561 argLen: 1,
29562 asm: ppc64.AMTVSRD,
29563 reg: regInfo{
29564 inputs: []inputInfo{
29565 {0, 1073733624},
29566 },
29567 outputs: []outputInfo{
29568 {0, 9223372032559808512},
29569 },
29570 },
29571 },
29572 {
29573 name: "AND",
29574 argLen: 2,
29575 commutative: true,
29576 asm: ppc64.AAND,
29577 reg: regInfo{
29578 inputs: []inputInfo{
29579 {0, 1073733630},
29580 {1, 1073733630},
29581 },
29582 outputs: []outputInfo{
29583 {0, 1073733624},
29584 },
29585 },
29586 },
29587 {
29588 name: "ANDN",
29589 argLen: 2,
29590 asm: ppc64.AANDN,
29591 reg: regInfo{
29592 inputs: []inputInfo{
29593 {0, 1073733630},
29594 {1, 1073733630},
29595 },
29596 outputs: []outputInfo{
29597 {0, 1073733624},
29598 },
29599 },
29600 },
29601 {
29602 name: "ANDNCC",
29603 argLen: 2,
29604 asm: ppc64.AANDNCC,
29605 reg: regInfo{
29606 inputs: []inputInfo{
29607 {0, 1073733630},
29608 {1, 1073733630},
29609 },
29610 outputs: []outputInfo{
29611 {0, 1073733624},
29612 },
29613 },
29614 },
29615 {
29616 name: "ANDCC",
29617 argLen: 2,
29618 commutative: true,
29619 asm: ppc64.AANDCC,
29620 reg: regInfo{
29621 inputs: []inputInfo{
29622 {0, 1073733630},
29623 {1, 1073733630},
29624 },
29625 outputs: []outputInfo{
29626 {0, 1073733624},
29627 },
29628 },
29629 },
29630 {
29631 name: "OR",
29632 argLen: 2,
29633 commutative: true,
29634 asm: ppc64.AOR,
29635 reg: regInfo{
29636 inputs: []inputInfo{
29637 {0, 1073733630},
29638 {1, 1073733630},
29639 },
29640 outputs: []outputInfo{
29641 {0, 1073733624},
29642 },
29643 },
29644 },
29645 {
29646 name: "ORN",
29647 argLen: 2,
29648 asm: ppc64.AORN,
29649 reg: regInfo{
29650 inputs: []inputInfo{
29651 {0, 1073733630},
29652 {1, 1073733630},
29653 },
29654 outputs: []outputInfo{
29655 {0, 1073733624},
29656 },
29657 },
29658 },
29659 {
29660 name: "ORCC",
29661 argLen: 2,
29662 commutative: true,
29663 asm: ppc64.AORCC,
29664 reg: regInfo{
29665 inputs: []inputInfo{
29666 {0, 1073733630},
29667 {1, 1073733630},
29668 },
29669 outputs: []outputInfo{
29670 {0, 1073733624},
29671 },
29672 },
29673 },
29674 {
29675 name: "NOR",
29676 argLen: 2,
29677 commutative: true,
29678 asm: ppc64.ANOR,
29679 reg: regInfo{
29680 inputs: []inputInfo{
29681 {0, 1073733630},
29682 {1, 1073733630},
29683 },
29684 outputs: []outputInfo{
29685 {0, 1073733624},
29686 },
29687 },
29688 },
29689 {
29690 name: "NORCC",
29691 argLen: 2,
29692 commutative: true,
29693 asm: ppc64.ANORCC,
29694 reg: regInfo{
29695 inputs: []inputInfo{
29696 {0, 1073733630},
29697 {1, 1073733630},
29698 },
29699 outputs: []outputInfo{
29700 {0, 1073733624},
29701 },
29702 },
29703 },
29704 {
29705 name: "XOR",
29706 argLen: 2,
29707 commutative: true,
29708 asm: ppc64.AXOR,
29709 reg: regInfo{
29710 inputs: []inputInfo{
29711 {0, 1073733630},
29712 {1, 1073733630},
29713 },
29714 outputs: []outputInfo{
29715 {0, 1073733624},
29716 },
29717 },
29718 },
29719 {
29720 name: "XORCC",
29721 argLen: 2,
29722 commutative: true,
29723 asm: ppc64.AXORCC,
29724 reg: regInfo{
29725 inputs: []inputInfo{
29726 {0, 1073733630},
29727 {1, 1073733630},
29728 },
29729 outputs: []outputInfo{
29730 {0, 1073733624},
29731 },
29732 },
29733 },
29734 {
29735 name: "EQV",
29736 argLen: 2,
29737 commutative: true,
29738 asm: ppc64.AEQV,
29739 reg: regInfo{
29740 inputs: []inputInfo{
29741 {0, 1073733630},
29742 {1, 1073733630},
29743 },
29744 outputs: []outputInfo{
29745 {0, 1073733624},
29746 },
29747 },
29748 },
29749 {
29750 name: "NEG",
29751 argLen: 1,
29752 asm: ppc64.ANEG,
29753 reg: regInfo{
29754 inputs: []inputInfo{
29755 {0, 1073733630},
29756 },
29757 outputs: []outputInfo{
29758 {0, 1073733624},
29759 },
29760 },
29761 },
29762 {
29763 name: "NEGCC",
29764 argLen: 1,
29765 asm: ppc64.ANEGCC,
29766 reg: regInfo{
29767 inputs: []inputInfo{
29768 {0, 1073733630},
29769 },
29770 outputs: []outputInfo{
29771 {0, 1073733624},
29772 },
29773 },
29774 },
29775 {
29776 name: "BRD",
29777 argLen: 1,
29778 asm: ppc64.ABRD,
29779 reg: regInfo{
29780 inputs: []inputInfo{
29781 {0, 1073733630},
29782 },
29783 outputs: []outputInfo{
29784 {0, 1073733624},
29785 },
29786 },
29787 },
29788 {
29789 name: "BRW",
29790 argLen: 1,
29791 asm: ppc64.ABRW,
29792 reg: regInfo{
29793 inputs: []inputInfo{
29794 {0, 1073733630},
29795 },
29796 outputs: []outputInfo{
29797 {0, 1073733624},
29798 },
29799 },
29800 },
29801 {
29802 name: "BRH",
29803 argLen: 1,
29804 asm: ppc64.ABRH,
29805 reg: regInfo{
29806 inputs: []inputInfo{
29807 {0, 1073733630},
29808 },
29809 outputs: []outputInfo{
29810 {0, 1073733624},
29811 },
29812 },
29813 },
29814 {
29815 name: "FNEG",
29816 argLen: 1,
29817 asm: ppc64.AFNEG,
29818 reg: regInfo{
29819 inputs: []inputInfo{
29820 {0, 9223372032559808512},
29821 },
29822 outputs: []outputInfo{
29823 {0, 9223372032559808512},
29824 },
29825 },
29826 },
29827 {
29828 name: "FSQRT",
29829 argLen: 1,
29830 asm: ppc64.AFSQRT,
29831 reg: regInfo{
29832 inputs: []inputInfo{
29833 {0, 9223372032559808512},
29834 },
29835 outputs: []outputInfo{
29836 {0, 9223372032559808512},
29837 },
29838 },
29839 },
29840 {
29841 name: "FSQRTS",
29842 argLen: 1,
29843 asm: ppc64.AFSQRTS,
29844 reg: regInfo{
29845 inputs: []inputInfo{
29846 {0, 9223372032559808512},
29847 },
29848 outputs: []outputInfo{
29849 {0, 9223372032559808512},
29850 },
29851 },
29852 },
29853 {
29854 name: "FFLOOR",
29855 argLen: 1,
29856 asm: ppc64.AFRIM,
29857 reg: regInfo{
29858 inputs: []inputInfo{
29859 {0, 9223372032559808512},
29860 },
29861 outputs: []outputInfo{
29862 {0, 9223372032559808512},
29863 },
29864 },
29865 },
29866 {
29867 name: "FCEIL",
29868 argLen: 1,
29869 asm: ppc64.AFRIP,
29870 reg: regInfo{
29871 inputs: []inputInfo{
29872 {0, 9223372032559808512},
29873 },
29874 outputs: []outputInfo{
29875 {0, 9223372032559808512},
29876 },
29877 },
29878 },
29879 {
29880 name: "FTRUNC",
29881 argLen: 1,
29882 asm: ppc64.AFRIZ,
29883 reg: regInfo{
29884 inputs: []inputInfo{
29885 {0, 9223372032559808512},
29886 },
29887 outputs: []outputInfo{
29888 {0, 9223372032559808512},
29889 },
29890 },
29891 },
29892 {
29893 name: "FROUND",
29894 argLen: 1,
29895 asm: ppc64.AFRIN,
29896 reg: regInfo{
29897 inputs: []inputInfo{
29898 {0, 9223372032559808512},
29899 },
29900 outputs: []outputInfo{
29901 {0, 9223372032559808512},
29902 },
29903 },
29904 },
29905 {
29906 name: "FABS",
29907 argLen: 1,
29908 asm: ppc64.AFABS,
29909 reg: regInfo{
29910 inputs: []inputInfo{
29911 {0, 9223372032559808512},
29912 },
29913 outputs: []outputInfo{
29914 {0, 9223372032559808512},
29915 },
29916 },
29917 },
29918 {
29919 name: "FNABS",
29920 argLen: 1,
29921 asm: ppc64.AFNABS,
29922 reg: regInfo{
29923 inputs: []inputInfo{
29924 {0, 9223372032559808512},
29925 },
29926 outputs: []outputInfo{
29927 {0, 9223372032559808512},
29928 },
29929 },
29930 },
29931 {
29932 name: "FCPSGN",
29933 argLen: 2,
29934 asm: ppc64.AFCPSGN,
29935 reg: regInfo{
29936 inputs: []inputInfo{
29937 {0, 9223372032559808512},
29938 {1, 9223372032559808512},
29939 },
29940 outputs: []outputInfo{
29941 {0, 9223372032559808512},
29942 },
29943 },
29944 },
29945 {
29946 name: "ORconst",
29947 auxType: auxInt64,
29948 argLen: 1,
29949 asm: ppc64.AOR,
29950 reg: regInfo{
29951 inputs: []inputInfo{
29952 {0, 1073733630},
29953 },
29954 outputs: []outputInfo{
29955 {0, 1073733624},
29956 },
29957 },
29958 },
29959 {
29960 name: "XORconst",
29961 auxType: auxInt64,
29962 argLen: 1,
29963 asm: ppc64.AXOR,
29964 reg: regInfo{
29965 inputs: []inputInfo{
29966 {0, 1073733630},
29967 },
29968 outputs: []outputInfo{
29969 {0, 1073733624},
29970 },
29971 },
29972 },
29973 {
29974 name: "ANDCCconst",
29975 auxType: auxInt64,
29976 argLen: 1,
29977 asm: ppc64.AANDCC,
29978 reg: regInfo{
29979 inputs: []inputInfo{
29980 {0, 1073733630},
29981 },
29982 outputs: []outputInfo{
29983 {0, 1073733624},
29984 },
29985 },
29986 },
29987 {
29988 name: "ANDconst",
29989 auxType: auxInt64,
29990 argLen: 1,
29991 clobberFlags: true,
29992 asm: ppc64.AANDCC,
29993 reg: regInfo{
29994 inputs: []inputInfo{
29995 {0, 1073733630},
29996 },
29997 outputs: []outputInfo{
29998 {0, 1073733624},
29999 },
30000 },
30001 },
30002 {
30003 name: "MOVBreg",
30004 argLen: 1,
30005 asm: ppc64.AMOVB,
30006 reg: regInfo{
30007 inputs: []inputInfo{
30008 {0, 1073733630},
30009 },
30010 outputs: []outputInfo{
30011 {0, 1073733624},
30012 },
30013 },
30014 },
30015 {
30016 name: "MOVBZreg",
30017 argLen: 1,
30018 asm: ppc64.AMOVBZ,
30019 reg: regInfo{
30020 inputs: []inputInfo{
30021 {0, 1073733630},
30022 },
30023 outputs: []outputInfo{
30024 {0, 1073733624},
30025 },
30026 },
30027 },
30028 {
30029 name: "MOVHreg",
30030 argLen: 1,
30031 asm: ppc64.AMOVH,
30032 reg: regInfo{
30033 inputs: []inputInfo{
30034 {0, 1073733630},
30035 },
30036 outputs: []outputInfo{
30037 {0, 1073733624},
30038 },
30039 },
30040 },
30041 {
30042 name: "MOVHZreg",
30043 argLen: 1,
30044 asm: ppc64.AMOVHZ,
30045 reg: regInfo{
30046 inputs: []inputInfo{
30047 {0, 1073733630},
30048 },
30049 outputs: []outputInfo{
30050 {0, 1073733624},
30051 },
30052 },
30053 },
30054 {
30055 name: "MOVWreg",
30056 argLen: 1,
30057 asm: ppc64.AMOVW,
30058 reg: regInfo{
30059 inputs: []inputInfo{
30060 {0, 1073733630},
30061 },
30062 outputs: []outputInfo{
30063 {0, 1073733624},
30064 },
30065 },
30066 },
30067 {
30068 name: "MOVWZreg",
30069 argLen: 1,
30070 asm: ppc64.AMOVWZ,
30071 reg: regInfo{
30072 inputs: []inputInfo{
30073 {0, 1073733630},
30074 },
30075 outputs: []outputInfo{
30076 {0, 1073733624},
30077 },
30078 },
30079 },
30080 {
30081 name: "MOVBZload",
30082 auxType: auxSymOff,
30083 argLen: 2,
30084 faultOnNilArg0: true,
30085 symEffect: SymRead,
30086 asm: ppc64.AMOVBZ,
30087 reg: regInfo{
30088 inputs: []inputInfo{
30089 {0, 1073733630},
30090 },
30091 outputs: []outputInfo{
30092 {0, 1073733624},
30093 },
30094 },
30095 },
30096 {
30097 name: "MOVHload",
30098 auxType: auxSymOff,
30099 argLen: 2,
30100 faultOnNilArg0: true,
30101 symEffect: SymRead,
30102 asm: ppc64.AMOVH,
30103 reg: regInfo{
30104 inputs: []inputInfo{
30105 {0, 1073733630},
30106 },
30107 outputs: []outputInfo{
30108 {0, 1073733624},
30109 },
30110 },
30111 },
30112 {
30113 name: "MOVHZload",
30114 auxType: auxSymOff,
30115 argLen: 2,
30116 faultOnNilArg0: true,
30117 symEffect: SymRead,
30118 asm: ppc64.AMOVHZ,
30119 reg: regInfo{
30120 inputs: []inputInfo{
30121 {0, 1073733630},
30122 },
30123 outputs: []outputInfo{
30124 {0, 1073733624},
30125 },
30126 },
30127 },
30128 {
30129 name: "MOVWload",
30130 auxType: auxSymOff,
30131 argLen: 2,
30132 faultOnNilArg0: true,
30133 symEffect: SymRead,
30134 asm: ppc64.AMOVW,
30135 reg: regInfo{
30136 inputs: []inputInfo{
30137 {0, 1073733630},
30138 },
30139 outputs: []outputInfo{
30140 {0, 1073733624},
30141 },
30142 },
30143 },
30144 {
30145 name: "MOVWZload",
30146 auxType: auxSymOff,
30147 argLen: 2,
30148 faultOnNilArg0: true,
30149 symEffect: SymRead,
30150 asm: ppc64.AMOVWZ,
30151 reg: regInfo{
30152 inputs: []inputInfo{
30153 {0, 1073733630},
30154 },
30155 outputs: []outputInfo{
30156 {0, 1073733624},
30157 },
30158 },
30159 },
30160 {
30161 name: "MOVDload",
30162 auxType: auxSymOff,
30163 argLen: 2,
30164 faultOnNilArg0: true,
30165 symEffect: SymRead,
30166 asm: ppc64.AMOVD,
30167 reg: regInfo{
30168 inputs: []inputInfo{
30169 {0, 1073733630},
30170 },
30171 outputs: []outputInfo{
30172 {0, 1073733624},
30173 },
30174 },
30175 },
30176 {
30177 name: "MOVDBRload",
30178 argLen: 2,
30179 faultOnNilArg0: true,
30180 asm: ppc64.AMOVDBR,
30181 reg: regInfo{
30182 inputs: []inputInfo{
30183 {0, 1073733630},
30184 },
30185 outputs: []outputInfo{
30186 {0, 1073733624},
30187 },
30188 },
30189 },
30190 {
30191 name: "MOVWBRload",
30192 argLen: 2,
30193 faultOnNilArg0: true,
30194 asm: ppc64.AMOVWBR,
30195 reg: regInfo{
30196 inputs: []inputInfo{
30197 {0, 1073733630},
30198 },
30199 outputs: []outputInfo{
30200 {0, 1073733624},
30201 },
30202 },
30203 },
30204 {
30205 name: "MOVHBRload",
30206 argLen: 2,
30207 faultOnNilArg0: true,
30208 asm: ppc64.AMOVHBR,
30209 reg: regInfo{
30210 inputs: []inputInfo{
30211 {0, 1073733630},
30212 },
30213 outputs: []outputInfo{
30214 {0, 1073733624},
30215 },
30216 },
30217 },
30218 {
30219 name: "MOVBZloadidx",
30220 argLen: 3,
30221 asm: ppc64.AMOVBZ,
30222 reg: regInfo{
30223 inputs: []inputInfo{
30224 {1, 1073733624},
30225 {0, 1073733630},
30226 },
30227 outputs: []outputInfo{
30228 {0, 1073733624},
30229 },
30230 },
30231 },
30232 {
30233 name: "MOVHloadidx",
30234 argLen: 3,
30235 asm: ppc64.AMOVH,
30236 reg: regInfo{
30237 inputs: []inputInfo{
30238 {1, 1073733624},
30239 {0, 1073733630},
30240 },
30241 outputs: []outputInfo{
30242 {0, 1073733624},
30243 },
30244 },
30245 },
30246 {
30247 name: "MOVHZloadidx",
30248 argLen: 3,
30249 asm: ppc64.AMOVHZ,
30250 reg: regInfo{
30251 inputs: []inputInfo{
30252 {1, 1073733624},
30253 {0, 1073733630},
30254 },
30255 outputs: []outputInfo{
30256 {0, 1073733624},
30257 },
30258 },
30259 },
30260 {
30261 name: "MOVWloadidx",
30262 argLen: 3,
30263 asm: ppc64.AMOVW,
30264 reg: regInfo{
30265 inputs: []inputInfo{
30266 {1, 1073733624},
30267 {0, 1073733630},
30268 },
30269 outputs: []outputInfo{
30270 {0, 1073733624},
30271 },
30272 },
30273 },
30274 {
30275 name: "MOVWZloadidx",
30276 argLen: 3,
30277 asm: ppc64.AMOVWZ,
30278 reg: regInfo{
30279 inputs: []inputInfo{
30280 {1, 1073733624},
30281 {0, 1073733630},
30282 },
30283 outputs: []outputInfo{
30284 {0, 1073733624},
30285 },
30286 },
30287 },
30288 {
30289 name: "MOVDloadidx",
30290 argLen: 3,
30291 asm: ppc64.AMOVD,
30292 reg: regInfo{
30293 inputs: []inputInfo{
30294 {1, 1073733624},
30295 {0, 1073733630},
30296 },
30297 outputs: []outputInfo{
30298 {0, 1073733624},
30299 },
30300 },
30301 },
30302 {
30303 name: "MOVHBRloadidx",
30304 argLen: 3,
30305 asm: ppc64.AMOVHBR,
30306 reg: regInfo{
30307 inputs: []inputInfo{
30308 {1, 1073733624},
30309 {0, 1073733630},
30310 },
30311 outputs: []outputInfo{
30312 {0, 1073733624},
30313 },
30314 },
30315 },
30316 {
30317 name: "MOVWBRloadidx",
30318 argLen: 3,
30319 asm: ppc64.AMOVWBR,
30320 reg: regInfo{
30321 inputs: []inputInfo{
30322 {1, 1073733624},
30323 {0, 1073733630},
30324 },
30325 outputs: []outputInfo{
30326 {0, 1073733624},
30327 },
30328 },
30329 },
30330 {
30331 name: "MOVDBRloadidx",
30332 argLen: 3,
30333 asm: ppc64.AMOVDBR,
30334 reg: regInfo{
30335 inputs: []inputInfo{
30336 {1, 1073733624},
30337 {0, 1073733630},
30338 },
30339 outputs: []outputInfo{
30340 {0, 1073733624},
30341 },
30342 },
30343 },
30344 {
30345 name: "FMOVDloadidx",
30346 argLen: 3,
30347 asm: ppc64.AFMOVD,
30348 reg: regInfo{
30349 inputs: []inputInfo{
30350 {0, 1073733630},
30351 {1, 1073733630},
30352 },
30353 outputs: []outputInfo{
30354 {0, 9223372032559808512},
30355 },
30356 },
30357 },
30358 {
30359 name: "FMOVSloadidx",
30360 argLen: 3,
30361 asm: ppc64.AFMOVS,
30362 reg: regInfo{
30363 inputs: []inputInfo{
30364 {0, 1073733630},
30365 {1, 1073733630},
30366 },
30367 outputs: []outputInfo{
30368 {0, 9223372032559808512},
30369 },
30370 },
30371 },
30372 {
30373 name: "DCBT",
30374 auxType: auxInt64,
30375 argLen: 2,
30376 hasSideEffects: true,
30377 asm: ppc64.ADCBT,
30378 reg: regInfo{
30379 inputs: []inputInfo{
30380 {0, 1073733630},
30381 },
30382 },
30383 },
30384 {
30385 name: "MOVDBRstore",
30386 argLen: 3,
30387 faultOnNilArg0: true,
30388 asm: ppc64.AMOVDBR,
30389 reg: regInfo{
30390 inputs: []inputInfo{
30391 {0, 1073733630},
30392 {1, 1073733630},
30393 },
30394 },
30395 },
30396 {
30397 name: "MOVWBRstore",
30398 argLen: 3,
30399 faultOnNilArg0: true,
30400 asm: ppc64.AMOVWBR,
30401 reg: regInfo{
30402 inputs: []inputInfo{
30403 {0, 1073733630},
30404 {1, 1073733630},
30405 },
30406 },
30407 },
30408 {
30409 name: "MOVHBRstore",
30410 argLen: 3,
30411 faultOnNilArg0: true,
30412 asm: ppc64.AMOVHBR,
30413 reg: regInfo{
30414 inputs: []inputInfo{
30415 {0, 1073733630},
30416 {1, 1073733630},
30417 },
30418 },
30419 },
30420 {
30421 name: "FMOVDload",
30422 auxType: auxSymOff,
30423 argLen: 2,
30424 faultOnNilArg0: true,
30425 symEffect: SymRead,
30426 asm: ppc64.AFMOVD,
30427 reg: regInfo{
30428 inputs: []inputInfo{
30429 {0, 1073733630},
30430 },
30431 outputs: []outputInfo{
30432 {0, 9223372032559808512},
30433 },
30434 },
30435 },
30436 {
30437 name: "FMOVSload",
30438 auxType: auxSymOff,
30439 argLen: 2,
30440 faultOnNilArg0: true,
30441 symEffect: SymRead,
30442 asm: ppc64.AFMOVS,
30443 reg: regInfo{
30444 inputs: []inputInfo{
30445 {0, 1073733630},
30446 },
30447 outputs: []outputInfo{
30448 {0, 9223372032559808512},
30449 },
30450 },
30451 },
30452 {
30453 name: "MOVBstore",
30454 auxType: auxSymOff,
30455 argLen: 3,
30456 faultOnNilArg0: true,
30457 symEffect: SymWrite,
30458 asm: ppc64.AMOVB,
30459 reg: regInfo{
30460 inputs: []inputInfo{
30461 {0, 1073733630},
30462 {1, 1073733630},
30463 },
30464 },
30465 },
30466 {
30467 name: "MOVHstore",
30468 auxType: auxSymOff,
30469 argLen: 3,
30470 faultOnNilArg0: true,
30471 symEffect: SymWrite,
30472 asm: ppc64.AMOVH,
30473 reg: regInfo{
30474 inputs: []inputInfo{
30475 {0, 1073733630},
30476 {1, 1073733630},
30477 },
30478 },
30479 },
30480 {
30481 name: "MOVWstore",
30482 auxType: auxSymOff,
30483 argLen: 3,
30484 faultOnNilArg0: true,
30485 symEffect: SymWrite,
30486 asm: ppc64.AMOVW,
30487 reg: regInfo{
30488 inputs: []inputInfo{
30489 {0, 1073733630},
30490 {1, 1073733630},
30491 },
30492 },
30493 },
30494 {
30495 name: "MOVDstore",
30496 auxType: auxSymOff,
30497 argLen: 3,
30498 faultOnNilArg0: true,
30499 symEffect: SymWrite,
30500 asm: ppc64.AMOVD,
30501 reg: regInfo{
30502 inputs: []inputInfo{
30503 {0, 1073733630},
30504 {1, 1073733630},
30505 },
30506 },
30507 },
30508 {
30509 name: "FMOVDstore",
30510 auxType: auxSymOff,
30511 argLen: 3,
30512 faultOnNilArg0: true,
30513 symEffect: SymWrite,
30514 asm: ppc64.AFMOVD,
30515 reg: regInfo{
30516 inputs: []inputInfo{
30517 {0, 1073733630},
30518 {1, 9223372032559808512},
30519 },
30520 },
30521 },
30522 {
30523 name: "FMOVSstore",
30524 auxType: auxSymOff,
30525 argLen: 3,
30526 faultOnNilArg0: true,
30527 symEffect: SymWrite,
30528 asm: ppc64.AFMOVS,
30529 reg: regInfo{
30530 inputs: []inputInfo{
30531 {0, 1073733630},
30532 {1, 9223372032559808512},
30533 },
30534 },
30535 },
30536 {
30537 name: "MOVBstoreidx",
30538 argLen: 4,
30539 asm: ppc64.AMOVB,
30540 reg: regInfo{
30541 inputs: []inputInfo{
30542 {0, 1073733630},
30543 {1, 1073733630},
30544 {2, 1073733630},
30545 },
30546 },
30547 },
30548 {
30549 name: "MOVHstoreidx",
30550 argLen: 4,
30551 asm: ppc64.AMOVH,
30552 reg: regInfo{
30553 inputs: []inputInfo{
30554 {0, 1073733630},
30555 {1, 1073733630},
30556 {2, 1073733630},
30557 },
30558 },
30559 },
30560 {
30561 name: "MOVWstoreidx",
30562 argLen: 4,
30563 asm: ppc64.AMOVW,
30564 reg: regInfo{
30565 inputs: []inputInfo{
30566 {0, 1073733630},
30567 {1, 1073733630},
30568 {2, 1073733630},
30569 },
30570 },
30571 },
30572 {
30573 name: "MOVDstoreidx",
30574 argLen: 4,
30575 asm: ppc64.AMOVD,
30576 reg: regInfo{
30577 inputs: []inputInfo{
30578 {0, 1073733630},
30579 {1, 1073733630},
30580 {2, 1073733630},
30581 },
30582 },
30583 },
30584 {
30585 name: "FMOVDstoreidx",
30586 argLen: 4,
30587 asm: ppc64.AFMOVD,
30588 reg: regInfo{
30589 inputs: []inputInfo{
30590 {0, 1073733630},
30591 {1, 1073733630},
30592 {2, 9223372032559808512},
30593 },
30594 },
30595 },
30596 {
30597 name: "FMOVSstoreidx",
30598 argLen: 4,
30599 asm: ppc64.AFMOVS,
30600 reg: regInfo{
30601 inputs: []inputInfo{
30602 {0, 1073733630},
30603 {1, 1073733630},
30604 {2, 9223372032559808512},
30605 },
30606 },
30607 },
30608 {
30609 name: "MOVHBRstoreidx",
30610 argLen: 4,
30611 asm: ppc64.AMOVHBR,
30612 reg: regInfo{
30613 inputs: []inputInfo{
30614 {0, 1073733630},
30615 {1, 1073733630},
30616 {2, 1073733630},
30617 },
30618 },
30619 },
30620 {
30621 name: "MOVWBRstoreidx",
30622 argLen: 4,
30623 asm: ppc64.AMOVWBR,
30624 reg: regInfo{
30625 inputs: []inputInfo{
30626 {0, 1073733630},
30627 {1, 1073733630},
30628 {2, 1073733630},
30629 },
30630 },
30631 },
30632 {
30633 name: "MOVDBRstoreidx",
30634 argLen: 4,
30635 asm: ppc64.AMOVDBR,
30636 reg: regInfo{
30637 inputs: []inputInfo{
30638 {0, 1073733630},
30639 {1, 1073733630},
30640 {2, 1073733630},
30641 },
30642 },
30643 },
30644 {
30645 name: "MOVBstorezero",
30646 auxType: auxSymOff,
30647 argLen: 2,
30648 faultOnNilArg0: true,
30649 symEffect: SymWrite,
30650 asm: ppc64.AMOVB,
30651 reg: regInfo{
30652 inputs: []inputInfo{
30653 {0, 1073733630},
30654 },
30655 },
30656 },
30657 {
30658 name: "MOVHstorezero",
30659 auxType: auxSymOff,
30660 argLen: 2,
30661 faultOnNilArg0: true,
30662 symEffect: SymWrite,
30663 asm: ppc64.AMOVH,
30664 reg: regInfo{
30665 inputs: []inputInfo{
30666 {0, 1073733630},
30667 },
30668 },
30669 },
30670 {
30671 name: "MOVWstorezero",
30672 auxType: auxSymOff,
30673 argLen: 2,
30674 faultOnNilArg0: true,
30675 symEffect: SymWrite,
30676 asm: ppc64.AMOVW,
30677 reg: regInfo{
30678 inputs: []inputInfo{
30679 {0, 1073733630},
30680 },
30681 },
30682 },
30683 {
30684 name: "MOVDstorezero",
30685 auxType: auxSymOff,
30686 argLen: 2,
30687 faultOnNilArg0: true,
30688 symEffect: SymWrite,
30689 asm: ppc64.AMOVD,
30690 reg: regInfo{
30691 inputs: []inputInfo{
30692 {0, 1073733630},
30693 },
30694 },
30695 },
30696 {
30697 name: "MOVDaddr",
30698 auxType: auxSymOff,
30699 argLen: 1,
30700 rematerializeable: true,
30701 symEffect: SymAddr,
30702 asm: ppc64.AMOVD,
30703 reg: regInfo{
30704 inputs: []inputInfo{
30705 {0, 1073733630},
30706 },
30707 outputs: []outputInfo{
30708 {0, 1073733624},
30709 },
30710 },
30711 },
30712 {
30713 name: "MOVDconst",
30714 auxType: auxInt64,
30715 argLen: 0,
30716 rematerializeable: true,
30717 asm: ppc64.AMOVD,
30718 reg: regInfo{
30719 outputs: []outputInfo{
30720 {0, 1073733624},
30721 },
30722 },
30723 },
30724 {
30725 name: "FMOVDconst",
30726 auxType: auxFloat64,
30727 argLen: 0,
30728 rematerializeable: true,
30729 asm: ppc64.AFMOVD,
30730 reg: regInfo{
30731 outputs: []outputInfo{
30732 {0, 9223372032559808512},
30733 },
30734 },
30735 },
30736 {
30737 name: "FMOVSconst",
30738 auxType: auxFloat32,
30739 argLen: 0,
30740 rematerializeable: true,
30741 asm: ppc64.AFMOVS,
30742 reg: regInfo{
30743 outputs: []outputInfo{
30744 {0, 9223372032559808512},
30745 },
30746 },
30747 },
30748 {
30749 name: "FCMPU",
30750 argLen: 2,
30751 asm: ppc64.AFCMPU,
30752 reg: regInfo{
30753 inputs: []inputInfo{
30754 {0, 9223372032559808512},
30755 {1, 9223372032559808512},
30756 },
30757 },
30758 },
30759 {
30760 name: "CMP",
30761 argLen: 2,
30762 asm: ppc64.ACMP,
30763 reg: regInfo{
30764 inputs: []inputInfo{
30765 {0, 1073733630},
30766 {1, 1073733630},
30767 },
30768 },
30769 },
30770 {
30771 name: "CMPU",
30772 argLen: 2,
30773 asm: ppc64.ACMPU,
30774 reg: regInfo{
30775 inputs: []inputInfo{
30776 {0, 1073733630},
30777 {1, 1073733630},
30778 },
30779 },
30780 },
30781 {
30782 name: "CMPW",
30783 argLen: 2,
30784 asm: ppc64.ACMPW,
30785 reg: regInfo{
30786 inputs: []inputInfo{
30787 {0, 1073733630},
30788 {1, 1073733630},
30789 },
30790 },
30791 },
30792 {
30793 name: "CMPWU",
30794 argLen: 2,
30795 asm: ppc64.ACMPWU,
30796 reg: regInfo{
30797 inputs: []inputInfo{
30798 {0, 1073733630},
30799 {1, 1073733630},
30800 },
30801 },
30802 },
30803 {
30804 name: "CMPconst",
30805 auxType: auxInt64,
30806 argLen: 1,
30807 asm: ppc64.ACMP,
30808 reg: regInfo{
30809 inputs: []inputInfo{
30810 {0, 1073733630},
30811 },
30812 },
30813 },
30814 {
30815 name: "CMPUconst",
30816 auxType: auxInt64,
30817 argLen: 1,
30818 asm: ppc64.ACMPU,
30819 reg: regInfo{
30820 inputs: []inputInfo{
30821 {0, 1073733630},
30822 },
30823 },
30824 },
30825 {
30826 name: "CMPWconst",
30827 auxType: auxInt32,
30828 argLen: 1,
30829 asm: ppc64.ACMPW,
30830 reg: regInfo{
30831 inputs: []inputInfo{
30832 {0, 1073733630},
30833 },
30834 },
30835 },
30836 {
30837 name: "CMPWUconst",
30838 auxType: auxInt32,
30839 argLen: 1,
30840 asm: ppc64.ACMPWU,
30841 reg: regInfo{
30842 inputs: []inputInfo{
30843 {0, 1073733630},
30844 },
30845 },
30846 },
30847 {
30848 name: "ISEL",
30849 auxType: auxInt32,
30850 argLen: 3,
30851 asm: ppc64.AISEL,
30852 reg: regInfo{
30853 inputs: []inputInfo{
30854 {0, 1073733624},
30855 {1, 1073733624},
30856 },
30857 outputs: []outputInfo{
30858 {0, 1073733624},
30859 },
30860 },
30861 },
30862 {
30863 name: "ISELZ",
30864 auxType: auxInt32,
30865 argLen: 2,
30866 asm: ppc64.AISEL,
30867 reg: regInfo{
30868 inputs: []inputInfo{
30869 {0, 1073733624},
30870 },
30871 outputs: []outputInfo{
30872 {0, 1073733624},
30873 },
30874 },
30875 },
30876 {
30877 name: "SETBC",
30878 auxType: auxInt32,
30879 argLen: 1,
30880 asm: ppc64.ASETBC,
30881 reg: regInfo{
30882 outputs: []outputInfo{
30883 {0, 1073733624},
30884 },
30885 },
30886 },
30887 {
30888 name: "SETBCR",
30889 auxType: auxInt32,
30890 argLen: 1,
30891 asm: ppc64.ASETBCR,
30892 reg: regInfo{
30893 outputs: []outputInfo{
30894 {0, 1073733624},
30895 },
30896 },
30897 },
30898 {
30899 name: "Equal",
30900 argLen: 1,
30901 reg: regInfo{
30902 outputs: []outputInfo{
30903 {0, 1073733624},
30904 },
30905 },
30906 },
30907 {
30908 name: "NotEqual",
30909 argLen: 1,
30910 reg: regInfo{
30911 outputs: []outputInfo{
30912 {0, 1073733624},
30913 },
30914 },
30915 },
30916 {
30917 name: "LessThan",
30918 argLen: 1,
30919 reg: regInfo{
30920 outputs: []outputInfo{
30921 {0, 1073733624},
30922 },
30923 },
30924 },
30925 {
30926 name: "FLessThan",
30927 argLen: 1,
30928 reg: regInfo{
30929 outputs: []outputInfo{
30930 {0, 1073733624},
30931 },
30932 },
30933 },
30934 {
30935 name: "LessEqual",
30936 argLen: 1,
30937 reg: regInfo{
30938 outputs: []outputInfo{
30939 {0, 1073733624},
30940 },
30941 },
30942 },
30943 {
30944 name: "FLessEqual",
30945 argLen: 1,
30946 reg: regInfo{
30947 outputs: []outputInfo{
30948 {0, 1073733624},
30949 },
30950 },
30951 },
30952 {
30953 name: "GreaterThan",
30954 argLen: 1,
30955 reg: regInfo{
30956 outputs: []outputInfo{
30957 {0, 1073733624},
30958 },
30959 },
30960 },
30961 {
30962 name: "FGreaterThan",
30963 argLen: 1,
30964 reg: regInfo{
30965 outputs: []outputInfo{
30966 {0, 1073733624},
30967 },
30968 },
30969 },
30970 {
30971 name: "GreaterEqual",
30972 argLen: 1,
30973 reg: regInfo{
30974 outputs: []outputInfo{
30975 {0, 1073733624},
30976 },
30977 },
30978 },
30979 {
30980 name: "FGreaterEqual",
30981 argLen: 1,
30982 reg: regInfo{
30983 outputs: []outputInfo{
30984 {0, 1073733624},
30985 },
30986 },
30987 },
30988 {
30989 name: "LoweredGetClosurePtr",
30990 argLen: 0,
30991 zeroWidth: true,
30992 reg: regInfo{
30993 outputs: []outputInfo{
30994 {0, 2048},
30995 },
30996 },
30997 },
30998 {
30999 name: "LoweredGetCallerSP",
31000 argLen: 1,
31001 rematerializeable: true,
31002 reg: regInfo{
31003 outputs: []outputInfo{
31004 {0, 1073733624},
31005 },
31006 },
31007 },
31008 {
31009 name: "LoweredGetCallerPC",
31010 argLen: 0,
31011 rematerializeable: true,
31012 reg: regInfo{
31013 outputs: []outputInfo{
31014 {0, 1073733624},
31015 },
31016 },
31017 },
31018 {
31019 name: "LoweredNilCheck",
31020 argLen: 2,
31021 clobberFlags: true,
31022 nilCheck: true,
31023 faultOnNilArg0: true,
31024 reg: regInfo{
31025 inputs: []inputInfo{
31026 {0, 1073733630},
31027 },
31028 clobbers: 2147483648,
31029 },
31030 },
31031 {
31032 name: "LoweredRound32F",
31033 argLen: 1,
31034 resultInArg0: true,
31035 zeroWidth: true,
31036 reg: regInfo{
31037 inputs: []inputInfo{
31038 {0, 9223372032559808512},
31039 },
31040 outputs: []outputInfo{
31041 {0, 9223372032559808512},
31042 },
31043 },
31044 },
31045 {
31046 name: "LoweredRound64F",
31047 argLen: 1,
31048 resultInArg0: true,
31049 zeroWidth: true,
31050 reg: regInfo{
31051 inputs: []inputInfo{
31052 {0, 9223372032559808512},
31053 },
31054 outputs: []outputInfo{
31055 {0, 9223372032559808512},
31056 },
31057 },
31058 },
31059 {
31060 name: "CALLstatic",
31061 auxType: auxCallOff,
31062 argLen: -1,
31063 clobberFlags: true,
31064 call: true,
31065 reg: regInfo{
31066 clobbers: 18446744071562059768,
31067 },
31068 },
31069 {
31070 name: "CALLtail",
31071 auxType: auxCallOff,
31072 argLen: -1,
31073 clobberFlags: true,
31074 call: true,
31075 tailCall: true,
31076 reg: regInfo{
31077 clobbers: 18446744071562059768,
31078 },
31079 },
31080 {
31081 name: "CALLclosure",
31082 auxType: auxCallOff,
31083 argLen: -1,
31084 clobberFlags: true,
31085 call: true,
31086 reg: regInfo{
31087 inputs: []inputInfo{
31088 {0, 4096},
31089 {1, 2048},
31090 },
31091 clobbers: 18446744071562059768,
31092 },
31093 },
31094 {
31095 name: "CALLinter",
31096 auxType: auxCallOff,
31097 argLen: -1,
31098 clobberFlags: true,
31099 call: true,
31100 reg: regInfo{
31101 inputs: []inputInfo{
31102 {0, 4096},
31103 },
31104 clobbers: 18446744071562059768,
31105 },
31106 },
31107 {
31108 name: "LoweredZero",
31109 auxType: auxInt64,
31110 argLen: 2,
31111 clobberFlags: true,
31112 faultOnNilArg0: true,
31113 unsafePoint: true,
31114 reg: regInfo{
31115 inputs: []inputInfo{
31116 {0, 1048576},
31117 },
31118 clobbers: 1048576,
31119 },
31120 },
31121 {
31122 name: "LoweredZeroShort",
31123 auxType: auxInt64,
31124 argLen: 2,
31125 faultOnNilArg0: true,
31126 unsafePoint: true,
31127 reg: regInfo{
31128 inputs: []inputInfo{
31129 {0, 1073733624},
31130 },
31131 },
31132 },
31133 {
31134 name: "LoweredQuadZeroShort",
31135 auxType: auxInt64,
31136 argLen: 2,
31137 faultOnNilArg0: true,
31138 unsafePoint: true,
31139 reg: regInfo{
31140 inputs: []inputInfo{
31141 {0, 1073733624},
31142 },
31143 },
31144 },
31145 {
31146 name: "LoweredQuadZero",
31147 auxType: auxInt64,
31148 argLen: 2,
31149 clobberFlags: true,
31150 faultOnNilArg0: true,
31151 unsafePoint: true,
31152 reg: regInfo{
31153 inputs: []inputInfo{
31154 {0, 1048576},
31155 },
31156 clobbers: 1048576,
31157 },
31158 },
31159 {
31160 name: "LoweredMove",
31161 auxType: auxInt64,
31162 argLen: 3,
31163 clobberFlags: true,
31164 faultOnNilArg0: true,
31165 faultOnNilArg1: true,
31166 unsafePoint: true,
31167 reg: regInfo{
31168 inputs: []inputInfo{
31169 {0, 1048576},
31170 {1, 2097152},
31171 },
31172 clobbers: 3145728,
31173 },
31174 },
31175 {
31176 name: "LoweredMoveShort",
31177 auxType: auxInt64,
31178 argLen: 3,
31179 faultOnNilArg0: true,
31180 faultOnNilArg1: true,
31181 unsafePoint: true,
31182 reg: regInfo{
31183 inputs: []inputInfo{
31184 {0, 1073733624},
31185 {1, 1073733624},
31186 },
31187 },
31188 },
31189 {
31190 name: "LoweredQuadMove",
31191 auxType: auxInt64,
31192 argLen: 3,
31193 clobberFlags: true,
31194 faultOnNilArg0: true,
31195 faultOnNilArg1: true,
31196 unsafePoint: true,
31197 reg: regInfo{
31198 inputs: []inputInfo{
31199 {0, 1048576},
31200 {1, 2097152},
31201 },
31202 clobbers: 3145728,
31203 },
31204 },
31205 {
31206 name: "LoweredQuadMoveShort",
31207 auxType: auxInt64,
31208 argLen: 3,
31209 faultOnNilArg0: true,
31210 faultOnNilArg1: true,
31211 unsafePoint: true,
31212 reg: regInfo{
31213 inputs: []inputInfo{
31214 {0, 1073733624},
31215 {1, 1073733624},
31216 },
31217 },
31218 },
31219 {
31220 name: "LoweredAtomicStore8",
31221 auxType: auxInt64,
31222 argLen: 3,
31223 faultOnNilArg0: true,
31224 hasSideEffects: true,
31225 reg: regInfo{
31226 inputs: []inputInfo{
31227 {0, 1073733630},
31228 {1, 1073733630},
31229 },
31230 },
31231 },
31232 {
31233 name: "LoweredAtomicStore32",
31234 auxType: auxInt64,
31235 argLen: 3,
31236 faultOnNilArg0: true,
31237 hasSideEffects: true,
31238 reg: regInfo{
31239 inputs: []inputInfo{
31240 {0, 1073733630},
31241 {1, 1073733630},
31242 },
31243 },
31244 },
31245 {
31246 name: "LoweredAtomicStore64",
31247 auxType: auxInt64,
31248 argLen: 3,
31249 faultOnNilArg0: true,
31250 hasSideEffects: true,
31251 reg: regInfo{
31252 inputs: []inputInfo{
31253 {0, 1073733630},
31254 {1, 1073733630},
31255 },
31256 },
31257 },
31258 {
31259 name: "LoweredAtomicLoad8",
31260 auxType: auxInt64,
31261 argLen: 2,
31262 clobberFlags: true,
31263 faultOnNilArg0: true,
31264 reg: regInfo{
31265 inputs: []inputInfo{
31266 {0, 1073733630},
31267 },
31268 outputs: []outputInfo{
31269 {0, 1073733624},
31270 },
31271 },
31272 },
31273 {
31274 name: "LoweredAtomicLoad32",
31275 auxType: auxInt64,
31276 argLen: 2,
31277 clobberFlags: true,
31278 faultOnNilArg0: true,
31279 reg: regInfo{
31280 inputs: []inputInfo{
31281 {0, 1073733630},
31282 },
31283 outputs: []outputInfo{
31284 {0, 1073733624},
31285 },
31286 },
31287 },
31288 {
31289 name: "LoweredAtomicLoad64",
31290 auxType: auxInt64,
31291 argLen: 2,
31292 clobberFlags: true,
31293 faultOnNilArg0: true,
31294 reg: regInfo{
31295 inputs: []inputInfo{
31296 {0, 1073733630},
31297 },
31298 outputs: []outputInfo{
31299 {0, 1073733624},
31300 },
31301 },
31302 },
31303 {
31304 name: "LoweredAtomicLoadPtr",
31305 auxType: auxInt64,
31306 argLen: 2,
31307 clobberFlags: true,
31308 faultOnNilArg0: true,
31309 reg: regInfo{
31310 inputs: []inputInfo{
31311 {0, 1073733630},
31312 },
31313 outputs: []outputInfo{
31314 {0, 1073733624},
31315 },
31316 },
31317 },
31318 {
31319 name: "LoweredAtomicAdd32",
31320 argLen: 3,
31321 resultNotInArgs: true,
31322 clobberFlags: true,
31323 faultOnNilArg0: true,
31324 hasSideEffects: true,
31325 reg: regInfo{
31326 inputs: []inputInfo{
31327 {1, 1073733624},
31328 {0, 1073733630},
31329 },
31330 outputs: []outputInfo{
31331 {0, 1073733624},
31332 },
31333 },
31334 },
31335 {
31336 name: "LoweredAtomicAdd64",
31337 argLen: 3,
31338 resultNotInArgs: true,
31339 clobberFlags: true,
31340 faultOnNilArg0: true,
31341 hasSideEffects: true,
31342 reg: regInfo{
31343 inputs: []inputInfo{
31344 {1, 1073733624},
31345 {0, 1073733630},
31346 },
31347 outputs: []outputInfo{
31348 {0, 1073733624},
31349 },
31350 },
31351 },
31352 {
31353 name: "LoweredAtomicExchange32",
31354 argLen: 3,
31355 resultNotInArgs: true,
31356 clobberFlags: true,
31357 faultOnNilArg0: true,
31358 hasSideEffects: true,
31359 reg: regInfo{
31360 inputs: []inputInfo{
31361 {1, 1073733624},
31362 {0, 1073733630},
31363 },
31364 outputs: []outputInfo{
31365 {0, 1073733624},
31366 },
31367 },
31368 },
31369 {
31370 name: "LoweredAtomicExchange64",
31371 argLen: 3,
31372 resultNotInArgs: true,
31373 clobberFlags: true,
31374 faultOnNilArg0: true,
31375 hasSideEffects: true,
31376 reg: regInfo{
31377 inputs: []inputInfo{
31378 {1, 1073733624},
31379 {0, 1073733630},
31380 },
31381 outputs: []outputInfo{
31382 {0, 1073733624},
31383 },
31384 },
31385 },
31386 {
31387 name: "LoweredAtomicCas64",
31388 auxType: auxInt64,
31389 argLen: 4,
31390 resultNotInArgs: true,
31391 clobberFlags: true,
31392 faultOnNilArg0: true,
31393 hasSideEffects: true,
31394 reg: regInfo{
31395 inputs: []inputInfo{
31396 {1, 1073733624},
31397 {2, 1073733624},
31398 {0, 1073733630},
31399 },
31400 outputs: []outputInfo{
31401 {0, 1073733624},
31402 },
31403 },
31404 },
31405 {
31406 name: "LoweredAtomicCas32",
31407 auxType: auxInt64,
31408 argLen: 4,
31409 resultNotInArgs: true,
31410 clobberFlags: true,
31411 faultOnNilArg0: true,
31412 hasSideEffects: true,
31413 reg: regInfo{
31414 inputs: []inputInfo{
31415 {1, 1073733624},
31416 {2, 1073733624},
31417 {0, 1073733630},
31418 },
31419 outputs: []outputInfo{
31420 {0, 1073733624},
31421 },
31422 },
31423 },
31424 {
31425 name: "LoweredAtomicAnd8",
31426 argLen: 3,
31427 faultOnNilArg0: true,
31428 hasSideEffects: true,
31429 asm: ppc64.AAND,
31430 reg: regInfo{
31431 inputs: []inputInfo{
31432 {0, 1073733630},
31433 {1, 1073733630},
31434 },
31435 },
31436 },
31437 {
31438 name: "LoweredAtomicAnd32",
31439 argLen: 3,
31440 faultOnNilArg0: true,
31441 hasSideEffects: true,
31442 asm: ppc64.AAND,
31443 reg: regInfo{
31444 inputs: []inputInfo{
31445 {0, 1073733630},
31446 {1, 1073733630},
31447 },
31448 },
31449 },
31450 {
31451 name: "LoweredAtomicOr8",
31452 argLen: 3,
31453 faultOnNilArg0: true,
31454 hasSideEffects: true,
31455 asm: ppc64.AOR,
31456 reg: regInfo{
31457 inputs: []inputInfo{
31458 {0, 1073733630},
31459 {1, 1073733630},
31460 },
31461 },
31462 },
31463 {
31464 name: "LoweredAtomicOr32",
31465 argLen: 3,
31466 faultOnNilArg0: true,
31467 hasSideEffects: true,
31468 asm: ppc64.AOR,
31469 reg: regInfo{
31470 inputs: []inputInfo{
31471 {0, 1073733630},
31472 {1, 1073733630},
31473 },
31474 },
31475 },
31476 {
31477 name: "LoweredWB",
31478 auxType: auxInt64,
31479 argLen: 1,
31480 clobberFlags: true,
31481 reg: regInfo{
31482 clobbers: 18446744072632408064,
31483 outputs: []outputInfo{
31484 {0, 536870912},
31485 },
31486 },
31487 },
31488 {
31489 name: "LoweredPubBarrier",
31490 argLen: 1,
31491 hasSideEffects: true,
31492 asm: ppc64.ALWSYNC,
31493 reg: regInfo{},
31494 },
31495 {
31496 name: "LoweredPanicBoundsA",
31497 auxType: auxInt64,
31498 argLen: 3,
31499 call: true,
31500 reg: regInfo{
31501 inputs: []inputInfo{
31502 {0, 32},
31503 {1, 64},
31504 },
31505 },
31506 },
31507 {
31508 name: "LoweredPanicBoundsB",
31509 auxType: auxInt64,
31510 argLen: 3,
31511 call: true,
31512 reg: regInfo{
31513 inputs: []inputInfo{
31514 {0, 16},
31515 {1, 32},
31516 },
31517 },
31518 },
31519 {
31520 name: "LoweredPanicBoundsC",
31521 auxType: auxInt64,
31522 argLen: 3,
31523 call: true,
31524 reg: regInfo{
31525 inputs: []inputInfo{
31526 {0, 8},
31527 {1, 16},
31528 },
31529 },
31530 },
31531 {
31532 name: "InvertFlags",
31533 argLen: 1,
31534 reg: regInfo{},
31535 },
31536 {
31537 name: "FlagEQ",
31538 argLen: 0,
31539 reg: regInfo{},
31540 },
31541 {
31542 name: "FlagLT",
31543 argLen: 0,
31544 reg: regInfo{},
31545 },
31546 {
31547 name: "FlagGT",
31548 argLen: 0,
31549 reg: regInfo{},
31550 },
31551
31552 {
31553 name: "ADD",
31554 argLen: 2,
31555 commutative: true,
31556 asm: riscv.AADD,
31557 reg: regInfo{
31558 inputs: []inputInfo{
31559 {0, 1006632944},
31560 {1, 1006632944},
31561 },
31562 outputs: []outputInfo{
31563 {0, 1006632944},
31564 },
31565 },
31566 },
31567 {
31568 name: "ADDI",
31569 auxType: auxInt64,
31570 argLen: 1,
31571 asm: riscv.AADDI,
31572 reg: regInfo{
31573 inputs: []inputInfo{
31574 {0, 9223372037861408754},
31575 },
31576 outputs: []outputInfo{
31577 {0, 1006632944},
31578 },
31579 },
31580 },
31581 {
31582 name: "ADDIW",
31583 auxType: auxInt64,
31584 argLen: 1,
31585 asm: riscv.AADDIW,
31586 reg: regInfo{
31587 inputs: []inputInfo{
31588 {0, 1006632944},
31589 },
31590 outputs: []outputInfo{
31591 {0, 1006632944},
31592 },
31593 },
31594 },
31595 {
31596 name: "NEG",
31597 argLen: 1,
31598 asm: riscv.ANEG,
31599 reg: regInfo{
31600 inputs: []inputInfo{
31601 {0, 1006632944},
31602 },
31603 outputs: []outputInfo{
31604 {0, 1006632944},
31605 },
31606 },
31607 },
31608 {
31609 name: "NEGW",
31610 argLen: 1,
31611 asm: riscv.ANEGW,
31612 reg: regInfo{
31613 inputs: []inputInfo{
31614 {0, 1006632944},
31615 },
31616 outputs: []outputInfo{
31617 {0, 1006632944},
31618 },
31619 },
31620 },
31621 {
31622 name: "SUB",
31623 argLen: 2,
31624 asm: riscv.ASUB,
31625 reg: regInfo{
31626 inputs: []inputInfo{
31627 {0, 1006632944},
31628 {1, 1006632944},
31629 },
31630 outputs: []outputInfo{
31631 {0, 1006632944},
31632 },
31633 },
31634 },
31635 {
31636 name: "SUBW",
31637 argLen: 2,
31638 asm: riscv.ASUBW,
31639 reg: regInfo{
31640 inputs: []inputInfo{
31641 {0, 1006632944},
31642 {1, 1006632944},
31643 },
31644 outputs: []outputInfo{
31645 {0, 1006632944},
31646 },
31647 },
31648 },
31649 {
31650 name: "MUL",
31651 argLen: 2,
31652 commutative: true,
31653 asm: riscv.AMUL,
31654 reg: regInfo{
31655 inputs: []inputInfo{
31656 {0, 1006632944},
31657 {1, 1006632944},
31658 },
31659 outputs: []outputInfo{
31660 {0, 1006632944},
31661 },
31662 },
31663 },
31664 {
31665 name: "MULW",
31666 argLen: 2,
31667 commutative: true,
31668 asm: riscv.AMULW,
31669 reg: regInfo{
31670 inputs: []inputInfo{
31671 {0, 1006632944},
31672 {1, 1006632944},
31673 },
31674 outputs: []outputInfo{
31675 {0, 1006632944},
31676 },
31677 },
31678 },
31679 {
31680 name: "MULH",
31681 argLen: 2,
31682 commutative: true,
31683 asm: riscv.AMULH,
31684 reg: regInfo{
31685 inputs: []inputInfo{
31686 {0, 1006632944},
31687 {1, 1006632944},
31688 },
31689 outputs: []outputInfo{
31690 {0, 1006632944},
31691 },
31692 },
31693 },
31694 {
31695 name: "MULHU",
31696 argLen: 2,
31697 commutative: true,
31698 asm: riscv.AMULHU,
31699 reg: regInfo{
31700 inputs: []inputInfo{
31701 {0, 1006632944},
31702 {1, 1006632944},
31703 },
31704 outputs: []outputInfo{
31705 {0, 1006632944},
31706 },
31707 },
31708 },
31709 {
31710 name: "LoweredMuluhilo",
31711 argLen: 2,
31712 resultNotInArgs: true,
31713 reg: regInfo{
31714 inputs: []inputInfo{
31715 {0, 1006632944},
31716 {1, 1006632944},
31717 },
31718 outputs: []outputInfo{
31719 {0, 1006632944},
31720 {1, 1006632944},
31721 },
31722 },
31723 },
31724 {
31725 name: "LoweredMuluover",
31726 argLen: 2,
31727 resultNotInArgs: true,
31728 reg: regInfo{
31729 inputs: []inputInfo{
31730 {0, 1006632944},
31731 {1, 1006632944},
31732 },
31733 outputs: []outputInfo{
31734 {0, 1006632944},
31735 {1, 1006632944},
31736 },
31737 },
31738 },
31739 {
31740 name: "DIV",
31741 argLen: 2,
31742 asm: riscv.ADIV,
31743 reg: regInfo{
31744 inputs: []inputInfo{
31745 {0, 1006632944},
31746 {1, 1006632944},
31747 },
31748 outputs: []outputInfo{
31749 {0, 1006632944},
31750 },
31751 },
31752 },
31753 {
31754 name: "DIVU",
31755 argLen: 2,
31756 asm: riscv.ADIVU,
31757 reg: regInfo{
31758 inputs: []inputInfo{
31759 {0, 1006632944},
31760 {1, 1006632944},
31761 },
31762 outputs: []outputInfo{
31763 {0, 1006632944},
31764 },
31765 },
31766 },
31767 {
31768 name: "DIVW",
31769 argLen: 2,
31770 asm: riscv.ADIVW,
31771 reg: regInfo{
31772 inputs: []inputInfo{
31773 {0, 1006632944},
31774 {1, 1006632944},
31775 },
31776 outputs: []outputInfo{
31777 {0, 1006632944},
31778 },
31779 },
31780 },
31781 {
31782 name: "DIVUW",
31783 argLen: 2,
31784 asm: riscv.ADIVUW,
31785 reg: regInfo{
31786 inputs: []inputInfo{
31787 {0, 1006632944},
31788 {1, 1006632944},
31789 },
31790 outputs: []outputInfo{
31791 {0, 1006632944},
31792 },
31793 },
31794 },
31795 {
31796 name: "REM",
31797 argLen: 2,
31798 asm: riscv.AREM,
31799 reg: regInfo{
31800 inputs: []inputInfo{
31801 {0, 1006632944},
31802 {1, 1006632944},
31803 },
31804 outputs: []outputInfo{
31805 {0, 1006632944},
31806 },
31807 },
31808 },
31809 {
31810 name: "REMU",
31811 argLen: 2,
31812 asm: riscv.AREMU,
31813 reg: regInfo{
31814 inputs: []inputInfo{
31815 {0, 1006632944},
31816 {1, 1006632944},
31817 },
31818 outputs: []outputInfo{
31819 {0, 1006632944},
31820 },
31821 },
31822 },
31823 {
31824 name: "REMW",
31825 argLen: 2,
31826 asm: riscv.AREMW,
31827 reg: regInfo{
31828 inputs: []inputInfo{
31829 {0, 1006632944},
31830 {1, 1006632944},
31831 },
31832 outputs: []outputInfo{
31833 {0, 1006632944},
31834 },
31835 },
31836 },
31837 {
31838 name: "REMUW",
31839 argLen: 2,
31840 asm: riscv.AREMUW,
31841 reg: regInfo{
31842 inputs: []inputInfo{
31843 {0, 1006632944},
31844 {1, 1006632944},
31845 },
31846 outputs: []outputInfo{
31847 {0, 1006632944},
31848 },
31849 },
31850 },
31851 {
31852 name: "MOVaddr",
31853 auxType: auxSymOff,
31854 argLen: 1,
31855 rematerializeable: true,
31856 symEffect: SymAddr,
31857 asm: riscv.AMOV,
31858 reg: regInfo{
31859 inputs: []inputInfo{
31860 {0, 9223372037861408754},
31861 },
31862 outputs: []outputInfo{
31863 {0, 1006632944},
31864 },
31865 },
31866 },
31867 {
31868 name: "MOVDconst",
31869 auxType: auxInt64,
31870 argLen: 0,
31871 rematerializeable: true,
31872 asm: riscv.AMOV,
31873 reg: regInfo{
31874 outputs: []outputInfo{
31875 {0, 1006632944},
31876 },
31877 },
31878 },
31879 {
31880 name: "MOVBload",
31881 auxType: auxSymOff,
31882 argLen: 2,
31883 faultOnNilArg0: true,
31884 symEffect: SymRead,
31885 asm: riscv.AMOVB,
31886 reg: regInfo{
31887 inputs: []inputInfo{
31888 {0, 9223372037861408754},
31889 },
31890 outputs: []outputInfo{
31891 {0, 1006632944},
31892 },
31893 },
31894 },
31895 {
31896 name: "MOVHload",
31897 auxType: auxSymOff,
31898 argLen: 2,
31899 faultOnNilArg0: true,
31900 symEffect: SymRead,
31901 asm: riscv.AMOVH,
31902 reg: regInfo{
31903 inputs: []inputInfo{
31904 {0, 9223372037861408754},
31905 },
31906 outputs: []outputInfo{
31907 {0, 1006632944},
31908 },
31909 },
31910 },
31911 {
31912 name: "MOVWload",
31913 auxType: auxSymOff,
31914 argLen: 2,
31915 faultOnNilArg0: true,
31916 symEffect: SymRead,
31917 asm: riscv.AMOVW,
31918 reg: regInfo{
31919 inputs: []inputInfo{
31920 {0, 9223372037861408754},
31921 },
31922 outputs: []outputInfo{
31923 {0, 1006632944},
31924 },
31925 },
31926 },
31927 {
31928 name: "MOVDload",
31929 auxType: auxSymOff,
31930 argLen: 2,
31931 faultOnNilArg0: true,
31932 symEffect: SymRead,
31933 asm: riscv.AMOV,
31934 reg: regInfo{
31935 inputs: []inputInfo{
31936 {0, 9223372037861408754},
31937 },
31938 outputs: []outputInfo{
31939 {0, 1006632944},
31940 },
31941 },
31942 },
31943 {
31944 name: "MOVBUload",
31945 auxType: auxSymOff,
31946 argLen: 2,
31947 faultOnNilArg0: true,
31948 symEffect: SymRead,
31949 asm: riscv.AMOVBU,
31950 reg: regInfo{
31951 inputs: []inputInfo{
31952 {0, 9223372037861408754},
31953 },
31954 outputs: []outputInfo{
31955 {0, 1006632944},
31956 },
31957 },
31958 },
31959 {
31960 name: "MOVHUload",
31961 auxType: auxSymOff,
31962 argLen: 2,
31963 faultOnNilArg0: true,
31964 symEffect: SymRead,
31965 asm: riscv.AMOVHU,
31966 reg: regInfo{
31967 inputs: []inputInfo{
31968 {0, 9223372037861408754},
31969 },
31970 outputs: []outputInfo{
31971 {0, 1006632944},
31972 },
31973 },
31974 },
31975 {
31976 name: "MOVWUload",
31977 auxType: auxSymOff,
31978 argLen: 2,
31979 faultOnNilArg0: true,
31980 symEffect: SymRead,
31981 asm: riscv.AMOVWU,
31982 reg: regInfo{
31983 inputs: []inputInfo{
31984 {0, 9223372037861408754},
31985 },
31986 outputs: []outputInfo{
31987 {0, 1006632944},
31988 },
31989 },
31990 },
31991 {
31992 name: "MOVBstore",
31993 auxType: auxSymOff,
31994 argLen: 3,
31995 faultOnNilArg0: true,
31996 symEffect: SymWrite,
31997 asm: riscv.AMOVB,
31998 reg: regInfo{
31999 inputs: []inputInfo{
32000 {1, 1006632946},
32001 {0, 9223372037861408754},
32002 },
32003 },
32004 },
32005 {
32006 name: "MOVHstore",
32007 auxType: auxSymOff,
32008 argLen: 3,
32009 faultOnNilArg0: true,
32010 symEffect: SymWrite,
32011 asm: riscv.AMOVH,
32012 reg: regInfo{
32013 inputs: []inputInfo{
32014 {1, 1006632946},
32015 {0, 9223372037861408754},
32016 },
32017 },
32018 },
32019 {
32020 name: "MOVWstore",
32021 auxType: auxSymOff,
32022 argLen: 3,
32023 faultOnNilArg0: true,
32024 symEffect: SymWrite,
32025 asm: riscv.AMOVW,
32026 reg: regInfo{
32027 inputs: []inputInfo{
32028 {1, 1006632946},
32029 {0, 9223372037861408754},
32030 },
32031 },
32032 },
32033 {
32034 name: "MOVDstore",
32035 auxType: auxSymOff,
32036 argLen: 3,
32037 faultOnNilArg0: true,
32038 symEffect: SymWrite,
32039 asm: riscv.AMOV,
32040 reg: regInfo{
32041 inputs: []inputInfo{
32042 {1, 1006632946},
32043 {0, 9223372037861408754},
32044 },
32045 },
32046 },
32047 {
32048 name: "MOVBstorezero",
32049 auxType: auxSymOff,
32050 argLen: 2,
32051 faultOnNilArg0: true,
32052 symEffect: SymWrite,
32053 asm: riscv.AMOVB,
32054 reg: regInfo{
32055 inputs: []inputInfo{
32056 {0, 9223372037861408754},
32057 },
32058 },
32059 },
32060 {
32061 name: "MOVHstorezero",
32062 auxType: auxSymOff,
32063 argLen: 2,
32064 faultOnNilArg0: true,
32065 symEffect: SymWrite,
32066 asm: riscv.AMOVH,
32067 reg: regInfo{
32068 inputs: []inputInfo{
32069 {0, 9223372037861408754},
32070 },
32071 },
32072 },
32073 {
32074 name: "MOVWstorezero",
32075 auxType: auxSymOff,
32076 argLen: 2,
32077 faultOnNilArg0: true,
32078 symEffect: SymWrite,
32079 asm: riscv.AMOVW,
32080 reg: regInfo{
32081 inputs: []inputInfo{
32082 {0, 9223372037861408754},
32083 },
32084 },
32085 },
32086 {
32087 name: "MOVDstorezero",
32088 auxType: auxSymOff,
32089 argLen: 2,
32090 faultOnNilArg0: true,
32091 symEffect: SymWrite,
32092 asm: riscv.AMOV,
32093 reg: regInfo{
32094 inputs: []inputInfo{
32095 {0, 9223372037861408754},
32096 },
32097 },
32098 },
32099 {
32100 name: "MOVBreg",
32101 argLen: 1,
32102 asm: riscv.AMOVB,
32103 reg: regInfo{
32104 inputs: []inputInfo{
32105 {0, 1006632944},
32106 },
32107 outputs: []outputInfo{
32108 {0, 1006632944},
32109 },
32110 },
32111 },
32112 {
32113 name: "MOVHreg",
32114 argLen: 1,
32115 asm: riscv.AMOVH,
32116 reg: regInfo{
32117 inputs: []inputInfo{
32118 {0, 1006632944},
32119 },
32120 outputs: []outputInfo{
32121 {0, 1006632944},
32122 },
32123 },
32124 },
32125 {
32126 name: "MOVWreg",
32127 argLen: 1,
32128 asm: riscv.AMOVW,
32129 reg: regInfo{
32130 inputs: []inputInfo{
32131 {0, 1006632944},
32132 },
32133 outputs: []outputInfo{
32134 {0, 1006632944},
32135 },
32136 },
32137 },
32138 {
32139 name: "MOVDreg",
32140 argLen: 1,
32141 asm: riscv.AMOV,
32142 reg: regInfo{
32143 inputs: []inputInfo{
32144 {0, 1006632944},
32145 },
32146 outputs: []outputInfo{
32147 {0, 1006632944},
32148 },
32149 },
32150 },
32151 {
32152 name: "MOVBUreg",
32153 argLen: 1,
32154 asm: riscv.AMOVBU,
32155 reg: regInfo{
32156 inputs: []inputInfo{
32157 {0, 1006632944},
32158 },
32159 outputs: []outputInfo{
32160 {0, 1006632944},
32161 },
32162 },
32163 },
32164 {
32165 name: "MOVHUreg",
32166 argLen: 1,
32167 asm: riscv.AMOVHU,
32168 reg: regInfo{
32169 inputs: []inputInfo{
32170 {0, 1006632944},
32171 },
32172 outputs: []outputInfo{
32173 {0, 1006632944},
32174 },
32175 },
32176 },
32177 {
32178 name: "MOVWUreg",
32179 argLen: 1,
32180 asm: riscv.AMOVWU,
32181 reg: regInfo{
32182 inputs: []inputInfo{
32183 {0, 1006632944},
32184 },
32185 outputs: []outputInfo{
32186 {0, 1006632944},
32187 },
32188 },
32189 },
32190 {
32191 name: "MOVDnop",
32192 argLen: 1,
32193 resultInArg0: true,
32194 reg: regInfo{
32195 inputs: []inputInfo{
32196 {0, 1006632944},
32197 },
32198 outputs: []outputInfo{
32199 {0, 1006632944},
32200 },
32201 },
32202 },
32203 {
32204 name: "SLL",
32205 argLen: 2,
32206 asm: riscv.ASLL,
32207 reg: regInfo{
32208 inputs: []inputInfo{
32209 {0, 1006632944},
32210 {1, 1006632944},
32211 },
32212 outputs: []outputInfo{
32213 {0, 1006632944},
32214 },
32215 },
32216 },
32217 {
32218 name: "SLLW",
32219 argLen: 2,
32220 asm: riscv.ASLLW,
32221 reg: regInfo{
32222 inputs: []inputInfo{
32223 {0, 1006632944},
32224 {1, 1006632944},
32225 },
32226 outputs: []outputInfo{
32227 {0, 1006632944},
32228 },
32229 },
32230 },
32231 {
32232 name: "SRA",
32233 argLen: 2,
32234 asm: riscv.ASRA,
32235 reg: regInfo{
32236 inputs: []inputInfo{
32237 {0, 1006632944},
32238 {1, 1006632944},
32239 },
32240 outputs: []outputInfo{
32241 {0, 1006632944},
32242 },
32243 },
32244 },
32245 {
32246 name: "SRAW",
32247 argLen: 2,
32248 asm: riscv.ASRAW,
32249 reg: regInfo{
32250 inputs: []inputInfo{
32251 {0, 1006632944},
32252 {1, 1006632944},
32253 },
32254 outputs: []outputInfo{
32255 {0, 1006632944},
32256 },
32257 },
32258 },
32259 {
32260 name: "SRL",
32261 argLen: 2,
32262 asm: riscv.ASRL,
32263 reg: regInfo{
32264 inputs: []inputInfo{
32265 {0, 1006632944},
32266 {1, 1006632944},
32267 },
32268 outputs: []outputInfo{
32269 {0, 1006632944},
32270 },
32271 },
32272 },
32273 {
32274 name: "SRLW",
32275 argLen: 2,
32276 asm: riscv.ASRLW,
32277 reg: regInfo{
32278 inputs: []inputInfo{
32279 {0, 1006632944},
32280 {1, 1006632944},
32281 },
32282 outputs: []outputInfo{
32283 {0, 1006632944},
32284 },
32285 },
32286 },
32287 {
32288 name: "SLLI",
32289 auxType: auxInt64,
32290 argLen: 1,
32291 asm: riscv.ASLLI,
32292 reg: regInfo{
32293 inputs: []inputInfo{
32294 {0, 1006632944},
32295 },
32296 outputs: []outputInfo{
32297 {0, 1006632944},
32298 },
32299 },
32300 },
32301 {
32302 name: "SLLIW",
32303 auxType: auxInt64,
32304 argLen: 1,
32305 asm: riscv.ASLLIW,
32306 reg: regInfo{
32307 inputs: []inputInfo{
32308 {0, 1006632944},
32309 },
32310 outputs: []outputInfo{
32311 {0, 1006632944},
32312 },
32313 },
32314 },
32315 {
32316 name: "SRAI",
32317 auxType: auxInt64,
32318 argLen: 1,
32319 asm: riscv.ASRAI,
32320 reg: regInfo{
32321 inputs: []inputInfo{
32322 {0, 1006632944},
32323 },
32324 outputs: []outputInfo{
32325 {0, 1006632944},
32326 },
32327 },
32328 },
32329 {
32330 name: "SRAIW",
32331 auxType: auxInt64,
32332 argLen: 1,
32333 asm: riscv.ASRAIW,
32334 reg: regInfo{
32335 inputs: []inputInfo{
32336 {0, 1006632944},
32337 },
32338 outputs: []outputInfo{
32339 {0, 1006632944},
32340 },
32341 },
32342 },
32343 {
32344 name: "SRLI",
32345 auxType: auxInt64,
32346 argLen: 1,
32347 asm: riscv.ASRLI,
32348 reg: regInfo{
32349 inputs: []inputInfo{
32350 {0, 1006632944},
32351 },
32352 outputs: []outputInfo{
32353 {0, 1006632944},
32354 },
32355 },
32356 },
32357 {
32358 name: "SRLIW",
32359 auxType: auxInt64,
32360 argLen: 1,
32361 asm: riscv.ASRLIW,
32362 reg: regInfo{
32363 inputs: []inputInfo{
32364 {0, 1006632944},
32365 },
32366 outputs: []outputInfo{
32367 {0, 1006632944},
32368 },
32369 },
32370 },
32371 {
32372 name: "AND",
32373 argLen: 2,
32374 commutative: true,
32375 asm: riscv.AAND,
32376 reg: regInfo{
32377 inputs: []inputInfo{
32378 {0, 1006632944},
32379 {1, 1006632944},
32380 },
32381 outputs: []outputInfo{
32382 {0, 1006632944},
32383 },
32384 },
32385 },
32386 {
32387 name: "ANDI",
32388 auxType: auxInt64,
32389 argLen: 1,
32390 asm: riscv.AANDI,
32391 reg: regInfo{
32392 inputs: []inputInfo{
32393 {0, 1006632944},
32394 },
32395 outputs: []outputInfo{
32396 {0, 1006632944},
32397 },
32398 },
32399 },
32400 {
32401 name: "NOT",
32402 argLen: 1,
32403 asm: riscv.ANOT,
32404 reg: regInfo{
32405 inputs: []inputInfo{
32406 {0, 1006632944},
32407 },
32408 outputs: []outputInfo{
32409 {0, 1006632944},
32410 },
32411 },
32412 },
32413 {
32414 name: "OR",
32415 argLen: 2,
32416 commutative: true,
32417 asm: riscv.AOR,
32418 reg: regInfo{
32419 inputs: []inputInfo{
32420 {0, 1006632944},
32421 {1, 1006632944},
32422 },
32423 outputs: []outputInfo{
32424 {0, 1006632944},
32425 },
32426 },
32427 },
32428 {
32429 name: "ORI",
32430 auxType: auxInt64,
32431 argLen: 1,
32432 asm: riscv.AORI,
32433 reg: regInfo{
32434 inputs: []inputInfo{
32435 {0, 1006632944},
32436 },
32437 outputs: []outputInfo{
32438 {0, 1006632944},
32439 },
32440 },
32441 },
32442 {
32443 name: "ROL",
32444 argLen: 2,
32445 asm: riscv.AROL,
32446 reg: regInfo{
32447 inputs: []inputInfo{
32448 {0, 1006632944},
32449 {1, 1006632944},
32450 },
32451 outputs: []outputInfo{
32452 {0, 1006632944},
32453 },
32454 },
32455 },
32456 {
32457 name: "ROLW",
32458 argLen: 2,
32459 asm: riscv.AROLW,
32460 reg: regInfo{
32461 inputs: []inputInfo{
32462 {0, 1006632944},
32463 {1, 1006632944},
32464 },
32465 outputs: []outputInfo{
32466 {0, 1006632944},
32467 },
32468 },
32469 },
32470 {
32471 name: "ROR",
32472 argLen: 2,
32473 asm: riscv.AROR,
32474 reg: regInfo{
32475 inputs: []inputInfo{
32476 {0, 1006632944},
32477 {1, 1006632944},
32478 },
32479 outputs: []outputInfo{
32480 {0, 1006632944},
32481 },
32482 },
32483 },
32484 {
32485 name: "RORI",
32486 auxType: auxInt64,
32487 argLen: 1,
32488 asm: riscv.ARORI,
32489 reg: regInfo{
32490 inputs: []inputInfo{
32491 {0, 1006632944},
32492 },
32493 outputs: []outputInfo{
32494 {0, 1006632944},
32495 },
32496 },
32497 },
32498 {
32499 name: "RORIW",
32500 auxType: auxInt64,
32501 argLen: 1,
32502 asm: riscv.ARORIW,
32503 reg: regInfo{
32504 inputs: []inputInfo{
32505 {0, 1006632944},
32506 },
32507 outputs: []outputInfo{
32508 {0, 1006632944},
32509 },
32510 },
32511 },
32512 {
32513 name: "RORW",
32514 argLen: 2,
32515 asm: riscv.ARORW,
32516 reg: regInfo{
32517 inputs: []inputInfo{
32518 {0, 1006632944},
32519 {1, 1006632944},
32520 },
32521 outputs: []outputInfo{
32522 {0, 1006632944},
32523 },
32524 },
32525 },
32526 {
32527 name: "XOR",
32528 argLen: 2,
32529 commutative: true,
32530 asm: riscv.AXOR,
32531 reg: regInfo{
32532 inputs: []inputInfo{
32533 {0, 1006632944},
32534 {1, 1006632944},
32535 },
32536 outputs: []outputInfo{
32537 {0, 1006632944},
32538 },
32539 },
32540 },
32541 {
32542 name: "XORI",
32543 auxType: auxInt64,
32544 argLen: 1,
32545 asm: riscv.AXORI,
32546 reg: regInfo{
32547 inputs: []inputInfo{
32548 {0, 1006632944},
32549 },
32550 outputs: []outputInfo{
32551 {0, 1006632944},
32552 },
32553 },
32554 },
32555 {
32556 name: "SEQZ",
32557 argLen: 1,
32558 asm: riscv.ASEQZ,
32559 reg: regInfo{
32560 inputs: []inputInfo{
32561 {0, 1006632944},
32562 },
32563 outputs: []outputInfo{
32564 {0, 1006632944},
32565 },
32566 },
32567 },
32568 {
32569 name: "SNEZ",
32570 argLen: 1,
32571 asm: riscv.ASNEZ,
32572 reg: regInfo{
32573 inputs: []inputInfo{
32574 {0, 1006632944},
32575 },
32576 outputs: []outputInfo{
32577 {0, 1006632944},
32578 },
32579 },
32580 },
32581 {
32582 name: "SLT",
32583 argLen: 2,
32584 asm: riscv.ASLT,
32585 reg: regInfo{
32586 inputs: []inputInfo{
32587 {0, 1006632944},
32588 {1, 1006632944},
32589 },
32590 outputs: []outputInfo{
32591 {0, 1006632944},
32592 },
32593 },
32594 },
32595 {
32596 name: "SLTI",
32597 auxType: auxInt64,
32598 argLen: 1,
32599 asm: riscv.ASLTI,
32600 reg: regInfo{
32601 inputs: []inputInfo{
32602 {0, 1006632944},
32603 },
32604 outputs: []outputInfo{
32605 {0, 1006632944},
32606 },
32607 },
32608 },
32609 {
32610 name: "SLTU",
32611 argLen: 2,
32612 asm: riscv.ASLTU,
32613 reg: regInfo{
32614 inputs: []inputInfo{
32615 {0, 1006632944},
32616 {1, 1006632944},
32617 },
32618 outputs: []outputInfo{
32619 {0, 1006632944},
32620 },
32621 },
32622 },
32623 {
32624 name: "SLTIU",
32625 auxType: auxInt64,
32626 argLen: 1,
32627 asm: riscv.ASLTIU,
32628 reg: regInfo{
32629 inputs: []inputInfo{
32630 {0, 1006632944},
32631 },
32632 outputs: []outputInfo{
32633 {0, 1006632944},
32634 },
32635 },
32636 },
32637 {
32638 name: "LoweredRound32F",
32639 argLen: 1,
32640 resultInArg0: true,
32641 reg: regInfo{
32642 inputs: []inputInfo{
32643 {0, 9223372034707292160},
32644 },
32645 outputs: []outputInfo{
32646 {0, 9223372034707292160},
32647 },
32648 },
32649 },
32650 {
32651 name: "LoweredRound64F",
32652 argLen: 1,
32653 resultInArg0: true,
32654 reg: regInfo{
32655 inputs: []inputInfo{
32656 {0, 9223372034707292160},
32657 },
32658 outputs: []outputInfo{
32659 {0, 9223372034707292160},
32660 },
32661 },
32662 },
32663 {
32664 name: "CALLstatic",
32665 auxType: auxCallOff,
32666 argLen: -1,
32667 call: true,
32668 reg: regInfo{
32669 clobbers: 9223372035781033968,
32670 },
32671 },
32672 {
32673 name: "CALLtail",
32674 auxType: auxCallOff,
32675 argLen: -1,
32676 call: true,
32677 tailCall: true,
32678 reg: regInfo{
32679 clobbers: 9223372035781033968,
32680 },
32681 },
32682 {
32683 name: "CALLclosure",
32684 auxType: auxCallOff,
32685 argLen: -1,
32686 call: true,
32687 reg: regInfo{
32688 inputs: []inputInfo{
32689 {1, 33554432},
32690 {0, 1006632946},
32691 },
32692 clobbers: 9223372035781033968,
32693 },
32694 },
32695 {
32696 name: "CALLinter",
32697 auxType: auxCallOff,
32698 argLen: -1,
32699 call: true,
32700 reg: regInfo{
32701 inputs: []inputInfo{
32702 {0, 1006632944},
32703 },
32704 clobbers: 9223372035781033968,
32705 },
32706 },
32707 {
32708 name: "DUFFZERO",
32709 auxType: auxInt64,
32710 argLen: 2,
32711 faultOnNilArg0: true,
32712 reg: regInfo{
32713 inputs: []inputInfo{
32714 {0, 16777216},
32715 },
32716 clobbers: 16777216,
32717 },
32718 },
32719 {
32720 name: "DUFFCOPY",
32721 auxType: auxInt64,
32722 argLen: 3,
32723 faultOnNilArg0: true,
32724 faultOnNilArg1: true,
32725 reg: regInfo{
32726 inputs: []inputInfo{
32727 {0, 16777216},
32728 {1, 8388608},
32729 },
32730 clobbers: 25165824,
32731 },
32732 },
32733 {
32734 name: "LoweredZero",
32735 auxType: auxInt64,
32736 argLen: 3,
32737 faultOnNilArg0: true,
32738 reg: regInfo{
32739 inputs: []inputInfo{
32740 {0, 16},
32741 {1, 1006632944},
32742 },
32743 clobbers: 16,
32744 },
32745 },
32746 {
32747 name: "LoweredMove",
32748 auxType: auxInt64,
32749 argLen: 4,
32750 faultOnNilArg0: true,
32751 faultOnNilArg1: true,
32752 reg: regInfo{
32753 inputs: []inputInfo{
32754 {0, 16},
32755 {1, 32},
32756 {2, 1006632880},
32757 },
32758 clobbers: 112,
32759 },
32760 },
32761 {
32762 name: "LoweredAtomicLoad8",
32763 argLen: 2,
32764 faultOnNilArg0: true,
32765 reg: regInfo{
32766 inputs: []inputInfo{
32767 {0, 9223372037861408754},
32768 },
32769 outputs: []outputInfo{
32770 {0, 1006632944},
32771 },
32772 },
32773 },
32774 {
32775 name: "LoweredAtomicLoad32",
32776 argLen: 2,
32777 faultOnNilArg0: true,
32778 reg: regInfo{
32779 inputs: []inputInfo{
32780 {0, 9223372037861408754},
32781 },
32782 outputs: []outputInfo{
32783 {0, 1006632944},
32784 },
32785 },
32786 },
32787 {
32788 name: "LoweredAtomicLoad64",
32789 argLen: 2,
32790 faultOnNilArg0: true,
32791 reg: regInfo{
32792 inputs: []inputInfo{
32793 {0, 9223372037861408754},
32794 },
32795 outputs: []outputInfo{
32796 {0, 1006632944},
32797 },
32798 },
32799 },
32800 {
32801 name: "LoweredAtomicStore8",
32802 argLen: 3,
32803 faultOnNilArg0: true,
32804 hasSideEffects: true,
32805 reg: regInfo{
32806 inputs: []inputInfo{
32807 {1, 1006632946},
32808 {0, 9223372037861408754},
32809 },
32810 },
32811 },
32812 {
32813 name: "LoweredAtomicStore32",
32814 argLen: 3,
32815 faultOnNilArg0: true,
32816 hasSideEffects: true,
32817 reg: regInfo{
32818 inputs: []inputInfo{
32819 {1, 1006632946},
32820 {0, 9223372037861408754},
32821 },
32822 },
32823 },
32824 {
32825 name: "LoweredAtomicStore64",
32826 argLen: 3,
32827 faultOnNilArg0: true,
32828 hasSideEffects: true,
32829 reg: regInfo{
32830 inputs: []inputInfo{
32831 {1, 1006632946},
32832 {0, 9223372037861408754},
32833 },
32834 },
32835 },
32836 {
32837 name: "LoweredAtomicExchange32",
32838 argLen: 3,
32839 resultNotInArgs: true,
32840 faultOnNilArg0: true,
32841 hasSideEffects: true,
32842 reg: regInfo{
32843 inputs: []inputInfo{
32844 {1, 1073741808},
32845 {0, 9223372037928517618},
32846 },
32847 outputs: []outputInfo{
32848 {0, 1006632944},
32849 },
32850 },
32851 },
32852 {
32853 name: "LoweredAtomicExchange64",
32854 argLen: 3,
32855 resultNotInArgs: true,
32856 faultOnNilArg0: true,
32857 hasSideEffects: true,
32858 reg: regInfo{
32859 inputs: []inputInfo{
32860 {1, 1073741808},
32861 {0, 9223372037928517618},
32862 },
32863 outputs: []outputInfo{
32864 {0, 1006632944},
32865 },
32866 },
32867 },
32868 {
32869 name: "LoweredAtomicAdd32",
32870 argLen: 3,
32871 resultNotInArgs: true,
32872 faultOnNilArg0: true,
32873 hasSideEffects: true,
32874 unsafePoint: true,
32875 reg: regInfo{
32876 inputs: []inputInfo{
32877 {1, 1073741808},
32878 {0, 9223372037928517618},
32879 },
32880 outputs: []outputInfo{
32881 {0, 1006632944},
32882 },
32883 },
32884 },
32885 {
32886 name: "LoweredAtomicAdd64",
32887 argLen: 3,
32888 resultNotInArgs: true,
32889 faultOnNilArg0: true,
32890 hasSideEffects: true,
32891 unsafePoint: true,
32892 reg: regInfo{
32893 inputs: []inputInfo{
32894 {1, 1073741808},
32895 {0, 9223372037928517618},
32896 },
32897 outputs: []outputInfo{
32898 {0, 1006632944},
32899 },
32900 },
32901 },
32902 {
32903 name: "LoweredAtomicCas32",
32904 argLen: 4,
32905 resultNotInArgs: true,
32906 faultOnNilArg0: true,
32907 hasSideEffects: true,
32908 unsafePoint: true,
32909 reg: regInfo{
32910 inputs: []inputInfo{
32911 {1, 1073741808},
32912 {2, 1073741808},
32913 {0, 9223372037928517618},
32914 },
32915 outputs: []outputInfo{
32916 {0, 1006632944},
32917 },
32918 },
32919 },
32920 {
32921 name: "LoweredAtomicCas64",
32922 argLen: 4,
32923 resultNotInArgs: true,
32924 faultOnNilArg0: true,
32925 hasSideEffects: true,
32926 unsafePoint: true,
32927 reg: regInfo{
32928 inputs: []inputInfo{
32929 {1, 1073741808},
32930 {2, 1073741808},
32931 {0, 9223372037928517618},
32932 },
32933 outputs: []outputInfo{
32934 {0, 1006632944},
32935 },
32936 },
32937 },
32938 {
32939 name: "LoweredAtomicAnd32",
32940 argLen: 3,
32941 faultOnNilArg0: true,
32942 hasSideEffects: true,
32943 asm: riscv.AAMOANDW,
32944 reg: regInfo{
32945 inputs: []inputInfo{
32946 {1, 1073741808},
32947 {0, 9223372037928517618},
32948 },
32949 },
32950 },
32951 {
32952 name: "LoweredAtomicOr32",
32953 argLen: 3,
32954 faultOnNilArg0: true,
32955 hasSideEffects: true,
32956 asm: riscv.AAMOORW,
32957 reg: regInfo{
32958 inputs: []inputInfo{
32959 {1, 1073741808},
32960 {0, 9223372037928517618},
32961 },
32962 },
32963 },
32964 {
32965 name: "LoweredNilCheck",
32966 argLen: 2,
32967 nilCheck: true,
32968 faultOnNilArg0: true,
32969 reg: regInfo{
32970 inputs: []inputInfo{
32971 {0, 1006632946},
32972 },
32973 },
32974 },
32975 {
32976 name: "LoweredGetClosurePtr",
32977 argLen: 0,
32978 reg: regInfo{
32979 outputs: []outputInfo{
32980 {0, 33554432},
32981 },
32982 },
32983 },
32984 {
32985 name: "LoweredGetCallerSP",
32986 argLen: 1,
32987 rematerializeable: true,
32988 reg: regInfo{
32989 outputs: []outputInfo{
32990 {0, 1006632944},
32991 },
32992 },
32993 },
32994 {
32995 name: "LoweredGetCallerPC",
32996 argLen: 0,
32997 rematerializeable: true,
32998 reg: regInfo{
32999 outputs: []outputInfo{
33000 {0, 1006632944},
33001 },
33002 },
33003 },
33004 {
33005 name: "LoweredWB",
33006 auxType: auxInt64,
33007 argLen: 1,
33008 clobberFlags: true,
33009 reg: regInfo{
33010 clobbers: 9223372034707292160,
33011 outputs: []outputInfo{
33012 {0, 8388608},
33013 },
33014 },
33015 },
33016 {
33017 name: "LoweredPubBarrier",
33018 argLen: 1,
33019 hasSideEffects: true,
33020 asm: riscv.AFENCE,
33021 reg: regInfo{},
33022 },
33023 {
33024 name: "LoweredPanicBoundsA",
33025 auxType: auxInt64,
33026 argLen: 3,
33027 call: true,
33028 reg: regInfo{
33029 inputs: []inputInfo{
33030 {0, 64},
33031 {1, 134217728},
33032 },
33033 },
33034 },
33035 {
33036 name: "LoweredPanicBoundsB",
33037 auxType: auxInt64,
33038 argLen: 3,
33039 call: true,
33040 reg: regInfo{
33041 inputs: []inputInfo{
33042 {0, 32},
33043 {1, 64},
33044 },
33045 },
33046 },
33047 {
33048 name: "LoweredPanicBoundsC",
33049 auxType: auxInt64,
33050 argLen: 3,
33051 call: true,
33052 reg: regInfo{
33053 inputs: []inputInfo{
33054 {0, 16},
33055 {1, 32},
33056 },
33057 },
33058 },
33059 {
33060 name: "FADDS",
33061 argLen: 2,
33062 commutative: true,
33063 asm: riscv.AFADDS,
33064 reg: regInfo{
33065 inputs: []inputInfo{
33066 {0, 9223372034707292160},
33067 {1, 9223372034707292160},
33068 },
33069 outputs: []outputInfo{
33070 {0, 9223372034707292160},
33071 },
33072 },
33073 },
33074 {
33075 name: "FSUBS",
33076 argLen: 2,
33077 asm: riscv.AFSUBS,
33078 reg: regInfo{
33079 inputs: []inputInfo{
33080 {0, 9223372034707292160},
33081 {1, 9223372034707292160},
33082 },
33083 outputs: []outputInfo{
33084 {0, 9223372034707292160},
33085 },
33086 },
33087 },
33088 {
33089 name: "FMULS",
33090 argLen: 2,
33091 commutative: true,
33092 asm: riscv.AFMULS,
33093 reg: regInfo{
33094 inputs: []inputInfo{
33095 {0, 9223372034707292160},
33096 {1, 9223372034707292160},
33097 },
33098 outputs: []outputInfo{
33099 {0, 9223372034707292160},
33100 },
33101 },
33102 },
33103 {
33104 name: "FDIVS",
33105 argLen: 2,
33106 asm: riscv.AFDIVS,
33107 reg: regInfo{
33108 inputs: []inputInfo{
33109 {0, 9223372034707292160},
33110 {1, 9223372034707292160},
33111 },
33112 outputs: []outputInfo{
33113 {0, 9223372034707292160},
33114 },
33115 },
33116 },
33117 {
33118 name: "FMADDS",
33119 argLen: 3,
33120 commutative: true,
33121 asm: riscv.AFMADDS,
33122 reg: regInfo{
33123 inputs: []inputInfo{
33124 {0, 9223372034707292160},
33125 {1, 9223372034707292160},
33126 {2, 9223372034707292160},
33127 },
33128 outputs: []outputInfo{
33129 {0, 9223372034707292160},
33130 },
33131 },
33132 },
33133 {
33134 name: "FMSUBS",
33135 argLen: 3,
33136 commutative: true,
33137 asm: riscv.AFMSUBS,
33138 reg: regInfo{
33139 inputs: []inputInfo{
33140 {0, 9223372034707292160},
33141 {1, 9223372034707292160},
33142 {2, 9223372034707292160},
33143 },
33144 outputs: []outputInfo{
33145 {0, 9223372034707292160},
33146 },
33147 },
33148 },
33149 {
33150 name: "FNMADDS",
33151 argLen: 3,
33152 commutative: true,
33153 asm: riscv.AFNMADDS,
33154 reg: regInfo{
33155 inputs: []inputInfo{
33156 {0, 9223372034707292160},
33157 {1, 9223372034707292160},
33158 {2, 9223372034707292160},
33159 },
33160 outputs: []outputInfo{
33161 {0, 9223372034707292160},
33162 },
33163 },
33164 },
33165 {
33166 name: "FNMSUBS",
33167 argLen: 3,
33168 commutative: true,
33169 asm: riscv.AFNMSUBS,
33170 reg: regInfo{
33171 inputs: []inputInfo{
33172 {0, 9223372034707292160},
33173 {1, 9223372034707292160},
33174 {2, 9223372034707292160},
33175 },
33176 outputs: []outputInfo{
33177 {0, 9223372034707292160},
33178 },
33179 },
33180 },
33181 {
33182 name: "FSQRTS",
33183 argLen: 1,
33184 asm: riscv.AFSQRTS,
33185 reg: regInfo{
33186 inputs: []inputInfo{
33187 {0, 9223372034707292160},
33188 },
33189 outputs: []outputInfo{
33190 {0, 9223372034707292160},
33191 },
33192 },
33193 },
33194 {
33195 name: "FNEGS",
33196 argLen: 1,
33197 asm: riscv.AFNEGS,
33198 reg: regInfo{
33199 inputs: []inputInfo{
33200 {0, 9223372034707292160},
33201 },
33202 outputs: []outputInfo{
33203 {0, 9223372034707292160},
33204 },
33205 },
33206 },
33207 {
33208 name: "FMVSX",
33209 argLen: 1,
33210 asm: riscv.AFMVSX,
33211 reg: regInfo{
33212 inputs: []inputInfo{
33213 {0, 1006632944},
33214 },
33215 outputs: []outputInfo{
33216 {0, 9223372034707292160},
33217 },
33218 },
33219 },
33220 {
33221 name: "FCVTSW",
33222 argLen: 1,
33223 asm: riscv.AFCVTSW,
33224 reg: regInfo{
33225 inputs: []inputInfo{
33226 {0, 1006632944},
33227 },
33228 outputs: []outputInfo{
33229 {0, 9223372034707292160},
33230 },
33231 },
33232 },
33233 {
33234 name: "FCVTSL",
33235 argLen: 1,
33236 asm: riscv.AFCVTSL,
33237 reg: regInfo{
33238 inputs: []inputInfo{
33239 {0, 1006632944},
33240 },
33241 outputs: []outputInfo{
33242 {0, 9223372034707292160},
33243 },
33244 },
33245 },
33246 {
33247 name: "FCVTWS",
33248 argLen: 1,
33249 asm: riscv.AFCVTWS,
33250 reg: regInfo{
33251 inputs: []inputInfo{
33252 {0, 9223372034707292160},
33253 },
33254 outputs: []outputInfo{
33255 {0, 1006632944},
33256 },
33257 },
33258 },
33259 {
33260 name: "FCVTLS",
33261 argLen: 1,
33262 asm: riscv.AFCVTLS,
33263 reg: regInfo{
33264 inputs: []inputInfo{
33265 {0, 9223372034707292160},
33266 },
33267 outputs: []outputInfo{
33268 {0, 1006632944},
33269 },
33270 },
33271 },
33272 {
33273 name: "FMOVWload",
33274 auxType: auxSymOff,
33275 argLen: 2,
33276 faultOnNilArg0: true,
33277 symEffect: SymRead,
33278 asm: riscv.AMOVF,
33279 reg: regInfo{
33280 inputs: []inputInfo{
33281 {0, 9223372037861408754},
33282 },
33283 outputs: []outputInfo{
33284 {0, 9223372034707292160},
33285 },
33286 },
33287 },
33288 {
33289 name: "FMOVWstore",
33290 auxType: auxSymOff,
33291 argLen: 3,
33292 faultOnNilArg0: true,
33293 symEffect: SymWrite,
33294 asm: riscv.AMOVF,
33295 reg: regInfo{
33296 inputs: []inputInfo{
33297 {0, 9223372037861408754},
33298 {1, 9223372034707292160},
33299 },
33300 },
33301 },
33302 {
33303 name: "FEQS",
33304 argLen: 2,
33305 commutative: true,
33306 asm: riscv.AFEQS,
33307 reg: regInfo{
33308 inputs: []inputInfo{
33309 {0, 9223372034707292160},
33310 {1, 9223372034707292160},
33311 },
33312 outputs: []outputInfo{
33313 {0, 1006632944},
33314 },
33315 },
33316 },
33317 {
33318 name: "FNES",
33319 argLen: 2,
33320 commutative: true,
33321 asm: riscv.AFNES,
33322 reg: regInfo{
33323 inputs: []inputInfo{
33324 {0, 9223372034707292160},
33325 {1, 9223372034707292160},
33326 },
33327 outputs: []outputInfo{
33328 {0, 1006632944},
33329 },
33330 },
33331 },
33332 {
33333 name: "FLTS",
33334 argLen: 2,
33335 asm: riscv.AFLTS,
33336 reg: regInfo{
33337 inputs: []inputInfo{
33338 {0, 9223372034707292160},
33339 {1, 9223372034707292160},
33340 },
33341 outputs: []outputInfo{
33342 {0, 1006632944},
33343 },
33344 },
33345 },
33346 {
33347 name: "FLES",
33348 argLen: 2,
33349 asm: riscv.AFLES,
33350 reg: regInfo{
33351 inputs: []inputInfo{
33352 {0, 9223372034707292160},
33353 {1, 9223372034707292160},
33354 },
33355 outputs: []outputInfo{
33356 {0, 1006632944},
33357 },
33358 },
33359 },
33360 {
33361 name: "LoweredFMAXS",
33362 argLen: 2,
33363 commutative: true,
33364 resultNotInArgs: true,
33365 asm: riscv.AFMAXS,
33366 reg: regInfo{
33367 inputs: []inputInfo{
33368 {0, 9223372034707292160},
33369 {1, 9223372034707292160},
33370 },
33371 outputs: []outputInfo{
33372 {0, 9223372034707292160},
33373 },
33374 },
33375 },
33376 {
33377 name: "LoweredFMINS",
33378 argLen: 2,
33379 commutative: true,
33380 resultNotInArgs: true,
33381 asm: riscv.AFMINS,
33382 reg: regInfo{
33383 inputs: []inputInfo{
33384 {0, 9223372034707292160},
33385 {1, 9223372034707292160},
33386 },
33387 outputs: []outputInfo{
33388 {0, 9223372034707292160},
33389 },
33390 },
33391 },
33392 {
33393 name: "FADDD",
33394 argLen: 2,
33395 commutative: true,
33396 asm: riscv.AFADDD,
33397 reg: regInfo{
33398 inputs: []inputInfo{
33399 {0, 9223372034707292160},
33400 {1, 9223372034707292160},
33401 },
33402 outputs: []outputInfo{
33403 {0, 9223372034707292160},
33404 },
33405 },
33406 },
33407 {
33408 name: "FSUBD",
33409 argLen: 2,
33410 asm: riscv.AFSUBD,
33411 reg: regInfo{
33412 inputs: []inputInfo{
33413 {0, 9223372034707292160},
33414 {1, 9223372034707292160},
33415 },
33416 outputs: []outputInfo{
33417 {0, 9223372034707292160},
33418 },
33419 },
33420 },
33421 {
33422 name: "FMULD",
33423 argLen: 2,
33424 commutative: true,
33425 asm: riscv.AFMULD,
33426 reg: regInfo{
33427 inputs: []inputInfo{
33428 {0, 9223372034707292160},
33429 {1, 9223372034707292160},
33430 },
33431 outputs: []outputInfo{
33432 {0, 9223372034707292160},
33433 },
33434 },
33435 },
33436 {
33437 name: "FDIVD",
33438 argLen: 2,
33439 asm: riscv.AFDIVD,
33440 reg: regInfo{
33441 inputs: []inputInfo{
33442 {0, 9223372034707292160},
33443 {1, 9223372034707292160},
33444 },
33445 outputs: []outputInfo{
33446 {0, 9223372034707292160},
33447 },
33448 },
33449 },
33450 {
33451 name: "FMADDD",
33452 argLen: 3,
33453 commutative: true,
33454 asm: riscv.AFMADDD,
33455 reg: regInfo{
33456 inputs: []inputInfo{
33457 {0, 9223372034707292160},
33458 {1, 9223372034707292160},
33459 {2, 9223372034707292160},
33460 },
33461 outputs: []outputInfo{
33462 {0, 9223372034707292160},
33463 },
33464 },
33465 },
33466 {
33467 name: "FMSUBD",
33468 argLen: 3,
33469 commutative: true,
33470 asm: riscv.AFMSUBD,
33471 reg: regInfo{
33472 inputs: []inputInfo{
33473 {0, 9223372034707292160},
33474 {1, 9223372034707292160},
33475 {2, 9223372034707292160},
33476 },
33477 outputs: []outputInfo{
33478 {0, 9223372034707292160},
33479 },
33480 },
33481 },
33482 {
33483 name: "FNMADDD",
33484 argLen: 3,
33485 commutative: true,
33486 asm: riscv.AFNMADDD,
33487 reg: regInfo{
33488 inputs: []inputInfo{
33489 {0, 9223372034707292160},
33490 {1, 9223372034707292160},
33491 {2, 9223372034707292160},
33492 },
33493 outputs: []outputInfo{
33494 {0, 9223372034707292160},
33495 },
33496 },
33497 },
33498 {
33499 name: "FNMSUBD",
33500 argLen: 3,
33501 commutative: true,
33502 asm: riscv.AFNMSUBD,
33503 reg: regInfo{
33504 inputs: []inputInfo{
33505 {0, 9223372034707292160},
33506 {1, 9223372034707292160},
33507 {2, 9223372034707292160},
33508 },
33509 outputs: []outputInfo{
33510 {0, 9223372034707292160},
33511 },
33512 },
33513 },
33514 {
33515 name: "FSQRTD",
33516 argLen: 1,
33517 asm: riscv.AFSQRTD,
33518 reg: regInfo{
33519 inputs: []inputInfo{
33520 {0, 9223372034707292160},
33521 },
33522 outputs: []outputInfo{
33523 {0, 9223372034707292160},
33524 },
33525 },
33526 },
33527 {
33528 name: "FNEGD",
33529 argLen: 1,
33530 asm: riscv.AFNEGD,
33531 reg: regInfo{
33532 inputs: []inputInfo{
33533 {0, 9223372034707292160},
33534 },
33535 outputs: []outputInfo{
33536 {0, 9223372034707292160},
33537 },
33538 },
33539 },
33540 {
33541 name: "FABSD",
33542 argLen: 1,
33543 asm: riscv.AFABSD,
33544 reg: regInfo{
33545 inputs: []inputInfo{
33546 {0, 9223372034707292160},
33547 },
33548 outputs: []outputInfo{
33549 {0, 9223372034707292160},
33550 },
33551 },
33552 },
33553 {
33554 name: "FSGNJD",
33555 argLen: 2,
33556 asm: riscv.AFSGNJD,
33557 reg: regInfo{
33558 inputs: []inputInfo{
33559 {0, 9223372034707292160},
33560 {1, 9223372034707292160},
33561 },
33562 outputs: []outputInfo{
33563 {0, 9223372034707292160},
33564 },
33565 },
33566 },
33567 {
33568 name: "FMVDX",
33569 argLen: 1,
33570 asm: riscv.AFMVDX,
33571 reg: regInfo{
33572 inputs: []inputInfo{
33573 {0, 1006632944},
33574 },
33575 outputs: []outputInfo{
33576 {0, 9223372034707292160},
33577 },
33578 },
33579 },
33580 {
33581 name: "FCVTDW",
33582 argLen: 1,
33583 asm: riscv.AFCVTDW,
33584 reg: regInfo{
33585 inputs: []inputInfo{
33586 {0, 1006632944},
33587 },
33588 outputs: []outputInfo{
33589 {0, 9223372034707292160},
33590 },
33591 },
33592 },
33593 {
33594 name: "FCVTDL",
33595 argLen: 1,
33596 asm: riscv.AFCVTDL,
33597 reg: regInfo{
33598 inputs: []inputInfo{
33599 {0, 1006632944},
33600 },
33601 outputs: []outputInfo{
33602 {0, 9223372034707292160},
33603 },
33604 },
33605 },
33606 {
33607 name: "FCVTWD",
33608 argLen: 1,
33609 asm: riscv.AFCVTWD,
33610 reg: regInfo{
33611 inputs: []inputInfo{
33612 {0, 9223372034707292160},
33613 },
33614 outputs: []outputInfo{
33615 {0, 1006632944},
33616 },
33617 },
33618 },
33619 {
33620 name: "FCVTLD",
33621 argLen: 1,
33622 asm: riscv.AFCVTLD,
33623 reg: regInfo{
33624 inputs: []inputInfo{
33625 {0, 9223372034707292160},
33626 },
33627 outputs: []outputInfo{
33628 {0, 1006632944},
33629 },
33630 },
33631 },
33632 {
33633 name: "FCVTDS",
33634 argLen: 1,
33635 asm: riscv.AFCVTDS,
33636 reg: regInfo{
33637 inputs: []inputInfo{
33638 {0, 9223372034707292160},
33639 },
33640 outputs: []outputInfo{
33641 {0, 9223372034707292160},
33642 },
33643 },
33644 },
33645 {
33646 name: "FCVTSD",
33647 argLen: 1,
33648 asm: riscv.AFCVTSD,
33649 reg: regInfo{
33650 inputs: []inputInfo{
33651 {0, 9223372034707292160},
33652 },
33653 outputs: []outputInfo{
33654 {0, 9223372034707292160},
33655 },
33656 },
33657 },
33658 {
33659 name: "FMOVDload",
33660 auxType: auxSymOff,
33661 argLen: 2,
33662 faultOnNilArg0: true,
33663 symEffect: SymRead,
33664 asm: riscv.AMOVD,
33665 reg: regInfo{
33666 inputs: []inputInfo{
33667 {0, 9223372037861408754},
33668 },
33669 outputs: []outputInfo{
33670 {0, 9223372034707292160},
33671 },
33672 },
33673 },
33674 {
33675 name: "FMOVDstore",
33676 auxType: auxSymOff,
33677 argLen: 3,
33678 faultOnNilArg0: true,
33679 symEffect: SymWrite,
33680 asm: riscv.AMOVD,
33681 reg: regInfo{
33682 inputs: []inputInfo{
33683 {0, 9223372037861408754},
33684 {1, 9223372034707292160},
33685 },
33686 },
33687 },
33688 {
33689 name: "FEQD",
33690 argLen: 2,
33691 commutative: true,
33692 asm: riscv.AFEQD,
33693 reg: regInfo{
33694 inputs: []inputInfo{
33695 {0, 9223372034707292160},
33696 {1, 9223372034707292160},
33697 },
33698 outputs: []outputInfo{
33699 {0, 1006632944},
33700 },
33701 },
33702 },
33703 {
33704 name: "FNED",
33705 argLen: 2,
33706 commutative: true,
33707 asm: riscv.AFNED,
33708 reg: regInfo{
33709 inputs: []inputInfo{
33710 {0, 9223372034707292160},
33711 {1, 9223372034707292160},
33712 },
33713 outputs: []outputInfo{
33714 {0, 1006632944},
33715 },
33716 },
33717 },
33718 {
33719 name: "FLTD",
33720 argLen: 2,
33721 asm: riscv.AFLTD,
33722 reg: regInfo{
33723 inputs: []inputInfo{
33724 {0, 9223372034707292160},
33725 {1, 9223372034707292160},
33726 },
33727 outputs: []outputInfo{
33728 {0, 1006632944},
33729 },
33730 },
33731 },
33732 {
33733 name: "FLED",
33734 argLen: 2,
33735 asm: riscv.AFLED,
33736 reg: regInfo{
33737 inputs: []inputInfo{
33738 {0, 9223372034707292160},
33739 {1, 9223372034707292160},
33740 },
33741 outputs: []outputInfo{
33742 {0, 1006632944},
33743 },
33744 },
33745 },
33746 {
33747 name: "LoweredFMIND",
33748 argLen: 2,
33749 commutative: true,
33750 resultNotInArgs: true,
33751 asm: riscv.AFMIND,
33752 reg: regInfo{
33753 inputs: []inputInfo{
33754 {0, 9223372034707292160},
33755 {1, 9223372034707292160},
33756 },
33757 outputs: []outputInfo{
33758 {0, 9223372034707292160},
33759 },
33760 },
33761 },
33762 {
33763 name: "LoweredFMAXD",
33764 argLen: 2,
33765 commutative: true,
33766 resultNotInArgs: true,
33767 asm: riscv.AFMAXD,
33768 reg: regInfo{
33769 inputs: []inputInfo{
33770 {0, 9223372034707292160},
33771 {1, 9223372034707292160},
33772 },
33773 outputs: []outputInfo{
33774 {0, 9223372034707292160},
33775 },
33776 },
33777 },
33778
33779 {
33780 name: "FADDS",
33781 argLen: 2,
33782 commutative: true,
33783 resultInArg0: true,
33784 asm: s390x.AFADDS,
33785 reg: regInfo{
33786 inputs: []inputInfo{
33787 {0, 4294901760},
33788 {1, 4294901760},
33789 },
33790 outputs: []outputInfo{
33791 {0, 4294901760},
33792 },
33793 },
33794 },
33795 {
33796 name: "FADD",
33797 argLen: 2,
33798 commutative: true,
33799 resultInArg0: true,
33800 asm: s390x.AFADD,
33801 reg: regInfo{
33802 inputs: []inputInfo{
33803 {0, 4294901760},
33804 {1, 4294901760},
33805 },
33806 outputs: []outputInfo{
33807 {0, 4294901760},
33808 },
33809 },
33810 },
33811 {
33812 name: "FSUBS",
33813 argLen: 2,
33814 resultInArg0: true,
33815 asm: s390x.AFSUBS,
33816 reg: regInfo{
33817 inputs: []inputInfo{
33818 {0, 4294901760},
33819 {1, 4294901760},
33820 },
33821 outputs: []outputInfo{
33822 {0, 4294901760},
33823 },
33824 },
33825 },
33826 {
33827 name: "FSUB",
33828 argLen: 2,
33829 resultInArg0: true,
33830 asm: s390x.AFSUB,
33831 reg: regInfo{
33832 inputs: []inputInfo{
33833 {0, 4294901760},
33834 {1, 4294901760},
33835 },
33836 outputs: []outputInfo{
33837 {0, 4294901760},
33838 },
33839 },
33840 },
33841 {
33842 name: "FMULS",
33843 argLen: 2,
33844 commutative: true,
33845 resultInArg0: true,
33846 asm: s390x.AFMULS,
33847 reg: regInfo{
33848 inputs: []inputInfo{
33849 {0, 4294901760},
33850 {1, 4294901760},
33851 },
33852 outputs: []outputInfo{
33853 {0, 4294901760},
33854 },
33855 },
33856 },
33857 {
33858 name: "FMUL",
33859 argLen: 2,
33860 commutative: true,
33861 resultInArg0: true,
33862 asm: s390x.AFMUL,
33863 reg: regInfo{
33864 inputs: []inputInfo{
33865 {0, 4294901760},
33866 {1, 4294901760},
33867 },
33868 outputs: []outputInfo{
33869 {0, 4294901760},
33870 },
33871 },
33872 },
33873 {
33874 name: "FDIVS",
33875 argLen: 2,
33876 resultInArg0: true,
33877 asm: s390x.AFDIVS,
33878 reg: regInfo{
33879 inputs: []inputInfo{
33880 {0, 4294901760},
33881 {1, 4294901760},
33882 },
33883 outputs: []outputInfo{
33884 {0, 4294901760},
33885 },
33886 },
33887 },
33888 {
33889 name: "FDIV",
33890 argLen: 2,
33891 resultInArg0: true,
33892 asm: s390x.AFDIV,
33893 reg: regInfo{
33894 inputs: []inputInfo{
33895 {0, 4294901760},
33896 {1, 4294901760},
33897 },
33898 outputs: []outputInfo{
33899 {0, 4294901760},
33900 },
33901 },
33902 },
33903 {
33904 name: "FNEGS",
33905 argLen: 1,
33906 clobberFlags: true,
33907 asm: s390x.AFNEGS,
33908 reg: regInfo{
33909 inputs: []inputInfo{
33910 {0, 4294901760},
33911 },
33912 outputs: []outputInfo{
33913 {0, 4294901760},
33914 },
33915 },
33916 },
33917 {
33918 name: "FNEG",
33919 argLen: 1,
33920 clobberFlags: true,
33921 asm: s390x.AFNEG,
33922 reg: regInfo{
33923 inputs: []inputInfo{
33924 {0, 4294901760},
33925 },
33926 outputs: []outputInfo{
33927 {0, 4294901760},
33928 },
33929 },
33930 },
33931 {
33932 name: "FMADDS",
33933 argLen: 3,
33934 resultInArg0: true,
33935 asm: s390x.AFMADDS,
33936 reg: regInfo{
33937 inputs: []inputInfo{
33938 {0, 4294901760},
33939 {1, 4294901760},
33940 {2, 4294901760},
33941 },
33942 outputs: []outputInfo{
33943 {0, 4294901760},
33944 },
33945 },
33946 },
33947 {
33948 name: "FMADD",
33949 argLen: 3,
33950 resultInArg0: true,
33951 asm: s390x.AFMADD,
33952 reg: regInfo{
33953 inputs: []inputInfo{
33954 {0, 4294901760},
33955 {1, 4294901760},
33956 {2, 4294901760},
33957 },
33958 outputs: []outputInfo{
33959 {0, 4294901760},
33960 },
33961 },
33962 },
33963 {
33964 name: "FMSUBS",
33965 argLen: 3,
33966 resultInArg0: true,
33967 asm: s390x.AFMSUBS,
33968 reg: regInfo{
33969 inputs: []inputInfo{
33970 {0, 4294901760},
33971 {1, 4294901760},
33972 {2, 4294901760},
33973 },
33974 outputs: []outputInfo{
33975 {0, 4294901760},
33976 },
33977 },
33978 },
33979 {
33980 name: "FMSUB",
33981 argLen: 3,
33982 resultInArg0: true,
33983 asm: s390x.AFMSUB,
33984 reg: regInfo{
33985 inputs: []inputInfo{
33986 {0, 4294901760},
33987 {1, 4294901760},
33988 {2, 4294901760},
33989 },
33990 outputs: []outputInfo{
33991 {0, 4294901760},
33992 },
33993 },
33994 },
33995 {
33996 name: "LPDFR",
33997 argLen: 1,
33998 asm: s390x.ALPDFR,
33999 reg: regInfo{
34000 inputs: []inputInfo{
34001 {0, 4294901760},
34002 },
34003 outputs: []outputInfo{
34004 {0, 4294901760},
34005 },
34006 },
34007 },
34008 {
34009 name: "LNDFR",
34010 argLen: 1,
34011 asm: s390x.ALNDFR,
34012 reg: regInfo{
34013 inputs: []inputInfo{
34014 {0, 4294901760},
34015 },
34016 outputs: []outputInfo{
34017 {0, 4294901760},
34018 },
34019 },
34020 },
34021 {
34022 name: "CPSDR",
34023 argLen: 2,
34024 asm: s390x.ACPSDR,
34025 reg: regInfo{
34026 inputs: []inputInfo{
34027 {0, 4294901760},
34028 {1, 4294901760},
34029 },
34030 outputs: []outputInfo{
34031 {0, 4294901760},
34032 },
34033 },
34034 },
34035 {
34036 name: "FIDBR",
34037 auxType: auxInt8,
34038 argLen: 1,
34039 asm: s390x.AFIDBR,
34040 reg: regInfo{
34041 inputs: []inputInfo{
34042 {0, 4294901760},
34043 },
34044 outputs: []outputInfo{
34045 {0, 4294901760},
34046 },
34047 },
34048 },
34049 {
34050 name: "FMOVSload",
34051 auxType: auxSymOff,
34052 argLen: 2,
34053 faultOnNilArg0: true,
34054 symEffect: SymRead,
34055 asm: s390x.AFMOVS,
34056 reg: regInfo{
34057 inputs: []inputInfo{
34058 {0, 4295023614},
34059 },
34060 outputs: []outputInfo{
34061 {0, 4294901760},
34062 },
34063 },
34064 },
34065 {
34066 name: "FMOVDload",
34067 auxType: auxSymOff,
34068 argLen: 2,
34069 faultOnNilArg0: true,
34070 symEffect: SymRead,
34071 asm: s390x.AFMOVD,
34072 reg: regInfo{
34073 inputs: []inputInfo{
34074 {0, 4295023614},
34075 },
34076 outputs: []outputInfo{
34077 {0, 4294901760},
34078 },
34079 },
34080 },
34081 {
34082 name: "FMOVSconst",
34083 auxType: auxFloat32,
34084 argLen: 0,
34085 rematerializeable: true,
34086 asm: s390x.AFMOVS,
34087 reg: regInfo{
34088 outputs: []outputInfo{
34089 {0, 4294901760},
34090 },
34091 },
34092 },
34093 {
34094 name: "FMOVDconst",
34095 auxType: auxFloat64,
34096 argLen: 0,
34097 rematerializeable: true,
34098 asm: s390x.AFMOVD,
34099 reg: regInfo{
34100 outputs: []outputInfo{
34101 {0, 4294901760},
34102 },
34103 },
34104 },
34105 {
34106 name: "FMOVSloadidx",
34107 auxType: auxSymOff,
34108 argLen: 3,
34109 symEffect: SymRead,
34110 asm: s390x.AFMOVS,
34111 reg: regInfo{
34112 inputs: []inputInfo{
34113 {0, 56318},
34114 {1, 56318},
34115 },
34116 outputs: []outputInfo{
34117 {0, 4294901760},
34118 },
34119 },
34120 },
34121 {
34122 name: "FMOVDloadidx",
34123 auxType: auxSymOff,
34124 argLen: 3,
34125 symEffect: SymRead,
34126 asm: s390x.AFMOVD,
34127 reg: regInfo{
34128 inputs: []inputInfo{
34129 {0, 56318},
34130 {1, 56318},
34131 },
34132 outputs: []outputInfo{
34133 {0, 4294901760},
34134 },
34135 },
34136 },
34137 {
34138 name: "FMOVSstore",
34139 auxType: auxSymOff,
34140 argLen: 3,
34141 faultOnNilArg0: true,
34142 symEffect: SymWrite,
34143 asm: s390x.AFMOVS,
34144 reg: regInfo{
34145 inputs: []inputInfo{
34146 {0, 4295023614},
34147 {1, 4294901760},
34148 },
34149 },
34150 },
34151 {
34152 name: "FMOVDstore",
34153 auxType: auxSymOff,
34154 argLen: 3,
34155 faultOnNilArg0: true,
34156 symEffect: SymWrite,
34157 asm: s390x.AFMOVD,
34158 reg: regInfo{
34159 inputs: []inputInfo{
34160 {0, 4295023614},
34161 {1, 4294901760},
34162 },
34163 },
34164 },
34165 {
34166 name: "FMOVSstoreidx",
34167 auxType: auxSymOff,
34168 argLen: 4,
34169 symEffect: SymWrite,
34170 asm: s390x.AFMOVS,
34171 reg: regInfo{
34172 inputs: []inputInfo{
34173 {0, 56318},
34174 {1, 56318},
34175 {2, 4294901760},
34176 },
34177 },
34178 },
34179 {
34180 name: "FMOVDstoreidx",
34181 auxType: auxSymOff,
34182 argLen: 4,
34183 symEffect: SymWrite,
34184 asm: s390x.AFMOVD,
34185 reg: regInfo{
34186 inputs: []inputInfo{
34187 {0, 56318},
34188 {1, 56318},
34189 {2, 4294901760},
34190 },
34191 },
34192 },
34193 {
34194 name: "ADD",
34195 argLen: 2,
34196 commutative: true,
34197 clobberFlags: true,
34198 asm: s390x.AADD,
34199 reg: regInfo{
34200 inputs: []inputInfo{
34201 {1, 23551},
34202 {0, 56319},
34203 },
34204 outputs: []outputInfo{
34205 {0, 23551},
34206 },
34207 },
34208 },
34209 {
34210 name: "ADDW",
34211 argLen: 2,
34212 commutative: true,
34213 clobberFlags: true,
34214 asm: s390x.AADDW,
34215 reg: regInfo{
34216 inputs: []inputInfo{
34217 {1, 23551},
34218 {0, 56319},
34219 },
34220 outputs: []outputInfo{
34221 {0, 23551},
34222 },
34223 },
34224 },
34225 {
34226 name: "ADDconst",
34227 auxType: auxInt32,
34228 argLen: 1,
34229 clobberFlags: true,
34230 asm: s390x.AADD,
34231 reg: regInfo{
34232 inputs: []inputInfo{
34233 {0, 56319},
34234 },
34235 outputs: []outputInfo{
34236 {0, 23551},
34237 },
34238 },
34239 },
34240 {
34241 name: "ADDWconst",
34242 auxType: auxInt32,
34243 argLen: 1,
34244 clobberFlags: true,
34245 asm: s390x.AADDW,
34246 reg: regInfo{
34247 inputs: []inputInfo{
34248 {0, 56319},
34249 },
34250 outputs: []outputInfo{
34251 {0, 23551},
34252 },
34253 },
34254 },
34255 {
34256 name: "ADDload",
34257 auxType: auxSymOff,
34258 argLen: 3,
34259 resultInArg0: true,
34260 clobberFlags: true,
34261 faultOnNilArg1: true,
34262 symEffect: SymRead,
34263 asm: s390x.AADD,
34264 reg: regInfo{
34265 inputs: []inputInfo{
34266 {0, 23551},
34267 {1, 56318},
34268 },
34269 outputs: []outputInfo{
34270 {0, 23551},
34271 },
34272 },
34273 },
34274 {
34275 name: "ADDWload",
34276 auxType: auxSymOff,
34277 argLen: 3,
34278 resultInArg0: true,
34279 clobberFlags: true,
34280 faultOnNilArg1: true,
34281 symEffect: SymRead,
34282 asm: s390x.AADDW,
34283 reg: regInfo{
34284 inputs: []inputInfo{
34285 {0, 23551},
34286 {1, 56318},
34287 },
34288 outputs: []outputInfo{
34289 {0, 23551},
34290 },
34291 },
34292 },
34293 {
34294 name: "SUB",
34295 argLen: 2,
34296 clobberFlags: true,
34297 asm: s390x.ASUB,
34298 reg: regInfo{
34299 inputs: []inputInfo{
34300 {0, 23551},
34301 {1, 23551},
34302 },
34303 outputs: []outputInfo{
34304 {0, 23551},
34305 },
34306 },
34307 },
34308 {
34309 name: "SUBW",
34310 argLen: 2,
34311 clobberFlags: true,
34312 asm: s390x.ASUBW,
34313 reg: regInfo{
34314 inputs: []inputInfo{
34315 {0, 23551},
34316 {1, 23551},
34317 },
34318 outputs: []outputInfo{
34319 {0, 23551},
34320 },
34321 },
34322 },
34323 {
34324 name: "SUBconst",
34325 auxType: auxInt32,
34326 argLen: 1,
34327 resultInArg0: true,
34328 clobberFlags: true,
34329 asm: s390x.ASUB,
34330 reg: regInfo{
34331 inputs: []inputInfo{
34332 {0, 23551},
34333 },
34334 outputs: []outputInfo{
34335 {0, 23551},
34336 },
34337 },
34338 },
34339 {
34340 name: "SUBWconst",
34341 auxType: auxInt32,
34342 argLen: 1,
34343 resultInArg0: true,
34344 clobberFlags: true,
34345 asm: s390x.ASUBW,
34346 reg: regInfo{
34347 inputs: []inputInfo{
34348 {0, 23551},
34349 },
34350 outputs: []outputInfo{
34351 {0, 23551},
34352 },
34353 },
34354 },
34355 {
34356 name: "SUBload",
34357 auxType: auxSymOff,
34358 argLen: 3,
34359 resultInArg0: true,
34360 clobberFlags: true,
34361 faultOnNilArg1: true,
34362 symEffect: SymRead,
34363 asm: s390x.ASUB,
34364 reg: regInfo{
34365 inputs: []inputInfo{
34366 {0, 23551},
34367 {1, 56318},
34368 },
34369 outputs: []outputInfo{
34370 {0, 23551},
34371 },
34372 },
34373 },
34374 {
34375 name: "SUBWload",
34376 auxType: auxSymOff,
34377 argLen: 3,
34378 resultInArg0: true,
34379 clobberFlags: true,
34380 faultOnNilArg1: true,
34381 symEffect: SymRead,
34382 asm: s390x.ASUBW,
34383 reg: regInfo{
34384 inputs: []inputInfo{
34385 {0, 23551},
34386 {1, 56318},
34387 },
34388 outputs: []outputInfo{
34389 {0, 23551},
34390 },
34391 },
34392 },
34393 {
34394 name: "MULLD",
34395 argLen: 2,
34396 commutative: true,
34397 resultInArg0: true,
34398 clobberFlags: true,
34399 asm: s390x.AMULLD,
34400 reg: regInfo{
34401 inputs: []inputInfo{
34402 {0, 23551},
34403 {1, 23551},
34404 },
34405 outputs: []outputInfo{
34406 {0, 23551},
34407 },
34408 },
34409 },
34410 {
34411 name: "MULLW",
34412 argLen: 2,
34413 commutative: true,
34414 resultInArg0: true,
34415 clobberFlags: true,
34416 asm: s390x.AMULLW,
34417 reg: regInfo{
34418 inputs: []inputInfo{
34419 {0, 23551},
34420 {1, 23551},
34421 },
34422 outputs: []outputInfo{
34423 {0, 23551},
34424 },
34425 },
34426 },
34427 {
34428 name: "MULLDconst",
34429 auxType: auxInt32,
34430 argLen: 1,
34431 resultInArg0: true,
34432 clobberFlags: true,
34433 asm: s390x.AMULLD,
34434 reg: regInfo{
34435 inputs: []inputInfo{
34436 {0, 23551},
34437 },
34438 outputs: []outputInfo{
34439 {0, 23551},
34440 },
34441 },
34442 },
34443 {
34444 name: "MULLWconst",
34445 auxType: auxInt32,
34446 argLen: 1,
34447 resultInArg0: true,
34448 clobberFlags: true,
34449 asm: s390x.AMULLW,
34450 reg: regInfo{
34451 inputs: []inputInfo{
34452 {0, 23551},
34453 },
34454 outputs: []outputInfo{
34455 {0, 23551},
34456 },
34457 },
34458 },
34459 {
34460 name: "MULLDload",
34461 auxType: auxSymOff,
34462 argLen: 3,
34463 resultInArg0: true,
34464 clobberFlags: true,
34465 faultOnNilArg1: true,
34466 symEffect: SymRead,
34467 asm: s390x.AMULLD,
34468 reg: regInfo{
34469 inputs: []inputInfo{
34470 {0, 23551},
34471 {1, 56318},
34472 },
34473 outputs: []outputInfo{
34474 {0, 23551},
34475 },
34476 },
34477 },
34478 {
34479 name: "MULLWload",
34480 auxType: auxSymOff,
34481 argLen: 3,
34482 resultInArg0: true,
34483 clobberFlags: true,
34484 faultOnNilArg1: true,
34485 symEffect: SymRead,
34486 asm: s390x.AMULLW,
34487 reg: regInfo{
34488 inputs: []inputInfo{
34489 {0, 23551},
34490 {1, 56318},
34491 },
34492 outputs: []outputInfo{
34493 {0, 23551},
34494 },
34495 },
34496 },
34497 {
34498 name: "MULHD",
34499 argLen: 2,
34500 commutative: true,
34501 resultInArg0: true,
34502 clobberFlags: true,
34503 asm: s390x.AMULHD,
34504 reg: regInfo{
34505 inputs: []inputInfo{
34506 {0, 21503},
34507 {1, 21503},
34508 },
34509 clobbers: 2048,
34510 outputs: []outputInfo{
34511 {0, 21503},
34512 },
34513 },
34514 },
34515 {
34516 name: "MULHDU",
34517 argLen: 2,
34518 commutative: true,
34519 resultInArg0: true,
34520 clobberFlags: true,
34521 asm: s390x.AMULHDU,
34522 reg: regInfo{
34523 inputs: []inputInfo{
34524 {0, 21503},
34525 {1, 21503},
34526 },
34527 clobbers: 2048,
34528 outputs: []outputInfo{
34529 {0, 21503},
34530 },
34531 },
34532 },
34533 {
34534 name: "DIVD",
34535 argLen: 2,
34536 resultInArg0: true,
34537 clobberFlags: true,
34538 asm: s390x.ADIVD,
34539 reg: regInfo{
34540 inputs: []inputInfo{
34541 {0, 21503},
34542 {1, 21503},
34543 },
34544 clobbers: 2048,
34545 outputs: []outputInfo{
34546 {0, 21503},
34547 },
34548 },
34549 },
34550 {
34551 name: "DIVW",
34552 argLen: 2,
34553 resultInArg0: true,
34554 clobberFlags: true,
34555 asm: s390x.ADIVW,
34556 reg: regInfo{
34557 inputs: []inputInfo{
34558 {0, 21503},
34559 {1, 21503},
34560 },
34561 clobbers: 2048,
34562 outputs: []outputInfo{
34563 {0, 21503},
34564 },
34565 },
34566 },
34567 {
34568 name: "DIVDU",
34569 argLen: 2,
34570 resultInArg0: true,
34571 clobberFlags: true,
34572 asm: s390x.ADIVDU,
34573 reg: regInfo{
34574 inputs: []inputInfo{
34575 {0, 21503},
34576 {1, 21503},
34577 },
34578 clobbers: 2048,
34579 outputs: []outputInfo{
34580 {0, 21503},
34581 },
34582 },
34583 },
34584 {
34585 name: "DIVWU",
34586 argLen: 2,
34587 resultInArg0: true,
34588 clobberFlags: true,
34589 asm: s390x.ADIVWU,
34590 reg: regInfo{
34591 inputs: []inputInfo{
34592 {0, 21503},
34593 {1, 21503},
34594 },
34595 clobbers: 2048,
34596 outputs: []outputInfo{
34597 {0, 21503},
34598 },
34599 },
34600 },
34601 {
34602 name: "MODD",
34603 argLen: 2,
34604 resultInArg0: true,
34605 clobberFlags: true,
34606 asm: s390x.AMODD,
34607 reg: regInfo{
34608 inputs: []inputInfo{
34609 {0, 21503},
34610 {1, 21503},
34611 },
34612 clobbers: 2048,
34613 outputs: []outputInfo{
34614 {0, 21503},
34615 },
34616 },
34617 },
34618 {
34619 name: "MODW",
34620 argLen: 2,
34621 resultInArg0: true,
34622 clobberFlags: true,
34623 asm: s390x.AMODW,
34624 reg: regInfo{
34625 inputs: []inputInfo{
34626 {0, 21503},
34627 {1, 21503},
34628 },
34629 clobbers: 2048,
34630 outputs: []outputInfo{
34631 {0, 21503},
34632 },
34633 },
34634 },
34635 {
34636 name: "MODDU",
34637 argLen: 2,
34638 resultInArg0: true,
34639 clobberFlags: true,
34640 asm: s390x.AMODDU,
34641 reg: regInfo{
34642 inputs: []inputInfo{
34643 {0, 21503},
34644 {1, 21503},
34645 },
34646 clobbers: 2048,
34647 outputs: []outputInfo{
34648 {0, 21503},
34649 },
34650 },
34651 },
34652 {
34653 name: "MODWU",
34654 argLen: 2,
34655 resultInArg0: true,
34656 clobberFlags: true,
34657 asm: s390x.AMODWU,
34658 reg: regInfo{
34659 inputs: []inputInfo{
34660 {0, 21503},
34661 {1, 21503},
34662 },
34663 clobbers: 2048,
34664 outputs: []outputInfo{
34665 {0, 21503},
34666 },
34667 },
34668 },
34669 {
34670 name: "AND",
34671 argLen: 2,
34672 commutative: true,
34673 clobberFlags: true,
34674 asm: s390x.AAND,
34675 reg: regInfo{
34676 inputs: []inputInfo{
34677 {0, 23551},
34678 {1, 23551},
34679 },
34680 outputs: []outputInfo{
34681 {0, 23551},
34682 },
34683 },
34684 },
34685 {
34686 name: "ANDW",
34687 argLen: 2,
34688 commutative: true,
34689 clobberFlags: true,
34690 asm: s390x.AANDW,
34691 reg: regInfo{
34692 inputs: []inputInfo{
34693 {0, 23551},
34694 {1, 23551},
34695 },
34696 outputs: []outputInfo{
34697 {0, 23551},
34698 },
34699 },
34700 },
34701 {
34702 name: "ANDconst",
34703 auxType: auxInt64,
34704 argLen: 1,
34705 resultInArg0: true,
34706 clobberFlags: true,
34707 asm: s390x.AAND,
34708 reg: regInfo{
34709 inputs: []inputInfo{
34710 {0, 23551},
34711 },
34712 outputs: []outputInfo{
34713 {0, 23551},
34714 },
34715 },
34716 },
34717 {
34718 name: "ANDWconst",
34719 auxType: auxInt32,
34720 argLen: 1,
34721 resultInArg0: true,
34722 clobberFlags: true,
34723 asm: s390x.AANDW,
34724 reg: regInfo{
34725 inputs: []inputInfo{
34726 {0, 23551},
34727 },
34728 outputs: []outputInfo{
34729 {0, 23551},
34730 },
34731 },
34732 },
34733 {
34734 name: "ANDload",
34735 auxType: auxSymOff,
34736 argLen: 3,
34737 resultInArg0: true,
34738 clobberFlags: true,
34739 faultOnNilArg1: true,
34740 symEffect: SymRead,
34741 asm: s390x.AAND,
34742 reg: regInfo{
34743 inputs: []inputInfo{
34744 {0, 23551},
34745 {1, 56318},
34746 },
34747 outputs: []outputInfo{
34748 {0, 23551},
34749 },
34750 },
34751 },
34752 {
34753 name: "ANDWload",
34754 auxType: auxSymOff,
34755 argLen: 3,
34756 resultInArg0: true,
34757 clobberFlags: true,
34758 faultOnNilArg1: true,
34759 symEffect: SymRead,
34760 asm: s390x.AANDW,
34761 reg: regInfo{
34762 inputs: []inputInfo{
34763 {0, 23551},
34764 {1, 56318},
34765 },
34766 outputs: []outputInfo{
34767 {0, 23551},
34768 },
34769 },
34770 },
34771 {
34772 name: "OR",
34773 argLen: 2,
34774 commutative: true,
34775 clobberFlags: true,
34776 asm: s390x.AOR,
34777 reg: regInfo{
34778 inputs: []inputInfo{
34779 {0, 23551},
34780 {1, 23551},
34781 },
34782 outputs: []outputInfo{
34783 {0, 23551},
34784 },
34785 },
34786 },
34787 {
34788 name: "ORW",
34789 argLen: 2,
34790 commutative: true,
34791 clobberFlags: true,
34792 asm: s390x.AORW,
34793 reg: regInfo{
34794 inputs: []inputInfo{
34795 {0, 23551},
34796 {1, 23551},
34797 },
34798 outputs: []outputInfo{
34799 {0, 23551},
34800 },
34801 },
34802 },
34803 {
34804 name: "ORconst",
34805 auxType: auxInt64,
34806 argLen: 1,
34807 resultInArg0: true,
34808 clobberFlags: true,
34809 asm: s390x.AOR,
34810 reg: regInfo{
34811 inputs: []inputInfo{
34812 {0, 23551},
34813 },
34814 outputs: []outputInfo{
34815 {0, 23551},
34816 },
34817 },
34818 },
34819 {
34820 name: "ORWconst",
34821 auxType: auxInt32,
34822 argLen: 1,
34823 resultInArg0: true,
34824 clobberFlags: true,
34825 asm: s390x.AORW,
34826 reg: regInfo{
34827 inputs: []inputInfo{
34828 {0, 23551},
34829 },
34830 outputs: []outputInfo{
34831 {0, 23551},
34832 },
34833 },
34834 },
34835 {
34836 name: "ORload",
34837 auxType: auxSymOff,
34838 argLen: 3,
34839 resultInArg0: true,
34840 clobberFlags: true,
34841 faultOnNilArg1: true,
34842 symEffect: SymRead,
34843 asm: s390x.AOR,
34844 reg: regInfo{
34845 inputs: []inputInfo{
34846 {0, 23551},
34847 {1, 56318},
34848 },
34849 outputs: []outputInfo{
34850 {0, 23551},
34851 },
34852 },
34853 },
34854 {
34855 name: "ORWload",
34856 auxType: auxSymOff,
34857 argLen: 3,
34858 resultInArg0: true,
34859 clobberFlags: true,
34860 faultOnNilArg1: true,
34861 symEffect: SymRead,
34862 asm: s390x.AORW,
34863 reg: regInfo{
34864 inputs: []inputInfo{
34865 {0, 23551},
34866 {1, 56318},
34867 },
34868 outputs: []outputInfo{
34869 {0, 23551},
34870 },
34871 },
34872 },
34873 {
34874 name: "XOR",
34875 argLen: 2,
34876 commutative: true,
34877 clobberFlags: true,
34878 asm: s390x.AXOR,
34879 reg: regInfo{
34880 inputs: []inputInfo{
34881 {0, 23551},
34882 {1, 23551},
34883 },
34884 outputs: []outputInfo{
34885 {0, 23551},
34886 },
34887 },
34888 },
34889 {
34890 name: "XORW",
34891 argLen: 2,
34892 commutative: true,
34893 clobberFlags: true,
34894 asm: s390x.AXORW,
34895 reg: regInfo{
34896 inputs: []inputInfo{
34897 {0, 23551},
34898 {1, 23551},
34899 },
34900 outputs: []outputInfo{
34901 {0, 23551},
34902 },
34903 },
34904 },
34905 {
34906 name: "XORconst",
34907 auxType: auxInt64,
34908 argLen: 1,
34909 resultInArg0: true,
34910 clobberFlags: true,
34911 asm: s390x.AXOR,
34912 reg: regInfo{
34913 inputs: []inputInfo{
34914 {0, 23551},
34915 },
34916 outputs: []outputInfo{
34917 {0, 23551},
34918 },
34919 },
34920 },
34921 {
34922 name: "XORWconst",
34923 auxType: auxInt32,
34924 argLen: 1,
34925 resultInArg0: true,
34926 clobberFlags: true,
34927 asm: s390x.AXORW,
34928 reg: regInfo{
34929 inputs: []inputInfo{
34930 {0, 23551},
34931 },
34932 outputs: []outputInfo{
34933 {0, 23551},
34934 },
34935 },
34936 },
34937 {
34938 name: "XORload",
34939 auxType: auxSymOff,
34940 argLen: 3,
34941 resultInArg0: true,
34942 clobberFlags: true,
34943 faultOnNilArg1: true,
34944 symEffect: SymRead,
34945 asm: s390x.AXOR,
34946 reg: regInfo{
34947 inputs: []inputInfo{
34948 {0, 23551},
34949 {1, 56318},
34950 },
34951 outputs: []outputInfo{
34952 {0, 23551},
34953 },
34954 },
34955 },
34956 {
34957 name: "XORWload",
34958 auxType: auxSymOff,
34959 argLen: 3,
34960 resultInArg0: true,
34961 clobberFlags: true,
34962 faultOnNilArg1: true,
34963 symEffect: SymRead,
34964 asm: s390x.AXORW,
34965 reg: regInfo{
34966 inputs: []inputInfo{
34967 {0, 23551},
34968 {1, 56318},
34969 },
34970 outputs: []outputInfo{
34971 {0, 23551},
34972 },
34973 },
34974 },
34975 {
34976 name: "ADDC",
34977 argLen: 2,
34978 commutative: true,
34979 asm: s390x.AADDC,
34980 reg: regInfo{
34981 inputs: []inputInfo{
34982 {0, 23551},
34983 {1, 23551},
34984 },
34985 outputs: []outputInfo{
34986 {0, 23551},
34987 },
34988 },
34989 },
34990 {
34991 name: "ADDCconst",
34992 auxType: auxInt16,
34993 argLen: 1,
34994 asm: s390x.AADDC,
34995 reg: regInfo{
34996 inputs: []inputInfo{
34997 {0, 23551},
34998 },
34999 outputs: []outputInfo{
35000 {0, 23551},
35001 },
35002 },
35003 },
35004 {
35005 name: "ADDE",
35006 argLen: 3,
35007 commutative: true,
35008 resultInArg0: true,
35009 asm: s390x.AADDE,
35010 reg: regInfo{
35011 inputs: []inputInfo{
35012 {0, 23551},
35013 {1, 23551},
35014 },
35015 outputs: []outputInfo{
35016 {0, 23551},
35017 },
35018 },
35019 },
35020 {
35021 name: "SUBC",
35022 argLen: 2,
35023 asm: s390x.ASUBC,
35024 reg: regInfo{
35025 inputs: []inputInfo{
35026 {0, 23551},
35027 {1, 23551},
35028 },
35029 outputs: []outputInfo{
35030 {0, 23551},
35031 },
35032 },
35033 },
35034 {
35035 name: "SUBE",
35036 argLen: 3,
35037 resultInArg0: true,
35038 asm: s390x.ASUBE,
35039 reg: regInfo{
35040 inputs: []inputInfo{
35041 {0, 23551},
35042 {1, 23551},
35043 },
35044 outputs: []outputInfo{
35045 {0, 23551},
35046 },
35047 },
35048 },
35049 {
35050 name: "CMP",
35051 argLen: 2,
35052 asm: s390x.ACMP,
35053 reg: regInfo{
35054 inputs: []inputInfo{
35055 {0, 56319},
35056 {1, 56319},
35057 },
35058 },
35059 },
35060 {
35061 name: "CMPW",
35062 argLen: 2,
35063 asm: s390x.ACMPW,
35064 reg: regInfo{
35065 inputs: []inputInfo{
35066 {0, 56319},
35067 {1, 56319},
35068 },
35069 },
35070 },
35071 {
35072 name: "CMPU",
35073 argLen: 2,
35074 asm: s390x.ACMPU,
35075 reg: regInfo{
35076 inputs: []inputInfo{
35077 {0, 56319},
35078 {1, 56319},
35079 },
35080 },
35081 },
35082 {
35083 name: "CMPWU",
35084 argLen: 2,
35085 asm: s390x.ACMPWU,
35086 reg: regInfo{
35087 inputs: []inputInfo{
35088 {0, 56319},
35089 {1, 56319},
35090 },
35091 },
35092 },
35093 {
35094 name: "CMPconst",
35095 auxType: auxInt32,
35096 argLen: 1,
35097 asm: s390x.ACMP,
35098 reg: regInfo{
35099 inputs: []inputInfo{
35100 {0, 56319},
35101 },
35102 },
35103 },
35104 {
35105 name: "CMPWconst",
35106 auxType: auxInt32,
35107 argLen: 1,
35108 asm: s390x.ACMPW,
35109 reg: regInfo{
35110 inputs: []inputInfo{
35111 {0, 56319},
35112 },
35113 },
35114 },
35115 {
35116 name: "CMPUconst",
35117 auxType: auxInt32,
35118 argLen: 1,
35119 asm: s390x.ACMPU,
35120 reg: regInfo{
35121 inputs: []inputInfo{
35122 {0, 56319},
35123 },
35124 },
35125 },
35126 {
35127 name: "CMPWUconst",
35128 auxType: auxInt32,
35129 argLen: 1,
35130 asm: s390x.ACMPWU,
35131 reg: regInfo{
35132 inputs: []inputInfo{
35133 {0, 56319},
35134 },
35135 },
35136 },
35137 {
35138 name: "FCMPS",
35139 argLen: 2,
35140 asm: s390x.ACEBR,
35141 reg: regInfo{
35142 inputs: []inputInfo{
35143 {0, 4294901760},
35144 {1, 4294901760},
35145 },
35146 },
35147 },
35148 {
35149 name: "FCMP",
35150 argLen: 2,
35151 asm: s390x.AFCMPU,
35152 reg: regInfo{
35153 inputs: []inputInfo{
35154 {0, 4294901760},
35155 {1, 4294901760},
35156 },
35157 },
35158 },
35159 {
35160 name: "LTDBR",
35161 argLen: 1,
35162 asm: s390x.ALTDBR,
35163 reg: regInfo{
35164 inputs: []inputInfo{
35165 {0, 4294901760},
35166 },
35167 },
35168 },
35169 {
35170 name: "LTEBR",
35171 argLen: 1,
35172 asm: s390x.ALTEBR,
35173 reg: regInfo{
35174 inputs: []inputInfo{
35175 {0, 4294901760},
35176 },
35177 },
35178 },
35179 {
35180 name: "SLD",
35181 argLen: 2,
35182 asm: s390x.ASLD,
35183 reg: regInfo{
35184 inputs: []inputInfo{
35185 {1, 23550},
35186 {0, 23551},
35187 },
35188 outputs: []outputInfo{
35189 {0, 23551},
35190 },
35191 },
35192 },
35193 {
35194 name: "SLW",
35195 argLen: 2,
35196 asm: s390x.ASLW,
35197 reg: regInfo{
35198 inputs: []inputInfo{
35199 {1, 23550},
35200 {0, 23551},
35201 },
35202 outputs: []outputInfo{
35203 {0, 23551},
35204 },
35205 },
35206 },
35207 {
35208 name: "SLDconst",
35209 auxType: auxUInt8,
35210 argLen: 1,
35211 asm: s390x.ASLD,
35212 reg: regInfo{
35213 inputs: []inputInfo{
35214 {0, 23551},
35215 },
35216 outputs: []outputInfo{
35217 {0, 23551},
35218 },
35219 },
35220 },
35221 {
35222 name: "SLWconst",
35223 auxType: auxUInt8,
35224 argLen: 1,
35225 asm: s390x.ASLW,
35226 reg: regInfo{
35227 inputs: []inputInfo{
35228 {0, 23551},
35229 },
35230 outputs: []outputInfo{
35231 {0, 23551},
35232 },
35233 },
35234 },
35235 {
35236 name: "SRD",
35237 argLen: 2,
35238 asm: s390x.ASRD,
35239 reg: regInfo{
35240 inputs: []inputInfo{
35241 {1, 23550},
35242 {0, 23551},
35243 },
35244 outputs: []outputInfo{
35245 {0, 23551},
35246 },
35247 },
35248 },
35249 {
35250 name: "SRW",
35251 argLen: 2,
35252 asm: s390x.ASRW,
35253 reg: regInfo{
35254 inputs: []inputInfo{
35255 {1, 23550},
35256 {0, 23551},
35257 },
35258 outputs: []outputInfo{
35259 {0, 23551},
35260 },
35261 },
35262 },
35263 {
35264 name: "SRDconst",
35265 auxType: auxUInt8,
35266 argLen: 1,
35267 asm: s390x.ASRD,
35268 reg: regInfo{
35269 inputs: []inputInfo{
35270 {0, 23551},
35271 },
35272 outputs: []outputInfo{
35273 {0, 23551},
35274 },
35275 },
35276 },
35277 {
35278 name: "SRWconst",
35279 auxType: auxUInt8,
35280 argLen: 1,
35281 asm: s390x.ASRW,
35282 reg: regInfo{
35283 inputs: []inputInfo{
35284 {0, 23551},
35285 },
35286 outputs: []outputInfo{
35287 {0, 23551},
35288 },
35289 },
35290 },
35291 {
35292 name: "SRAD",
35293 argLen: 2,
35294 clobberFlags: true,
35295 asm: s390x.ASRAD,
35296 reg: regInfo{
35297 inputs: []inputInfo{
35298 {1, 23550},
35299 {0, 23551},
35300 },
35301 outputs: []outputInfo{
35302 {0, 23551},
35303 },
35304 },
35305 },
35306 {
35307 name: "SRAW",
35308 argLen: 2,
35309 clobberFlags: true,
35310 asm: s390x.ASRAW,
35311 reg: regInfo{
35312 inputs: []inputInfo{
35313 {1, 23550},
35314 {0, 23551},
35315 },
35316 outputs: []outputInfo{
35317 {0, 23551},
35318 },
35319 },
35320 },
35321 {
35322 name: "SRADconst",
35323 auxType: auxUInt8,
35324 argLen: 1,
35325 clobberFlags: true,
35326 asm: s390x.ASRAD,
35327 reg: regInfo{
35328 inputs: []inputInfo{
35329 {0, 23551},
35330 },
35331 outputs: []outputInfo{
35332 {0, 23551},
35333 },
35334 },
35335 },
35336 {
35337 name: "SRAWconst",
35338 auxType: auxUInt8,
35339 argLen: 1,
35340 clobberFlags: true,
35341 asm: s390x.ASRAW,
35342 reg: regInfo{
35343 inputs: []inputInfo{
35344 {0, 23551},
35345 },
35346 outputs: []outputInfo{
35347 {0, 23551},
35348 },
35349 },
35350 },
35351 {
35352 name: "RLLG",
35353 argLen: 2,
35354 asm: s390x.ARLLG,
35355 reg: regInfo{
35356 inputs: []inputInfo{
35357 {1, 23550},
35358 {0, 23551},
35359 },
35360 outputs: []outputInfo{
35361 {0, 23551},
35362 },
35363 },
35364 },
35365 {
35366 name: "RLL",
35367 argLen: 2,
35368 asm: s390x.ARLL,
35369 reg: regInfo{
35370 inputs: []inputInfo{
35371 {1, 23550},
35372 {0, 23551},
35373 },
35374 outputs: []outputInfo{
35375 {0, 23551},
35376 },
35377 },
35378 },
35379 {
35380 name: "RLLconst",
35381 auxType: auxUInt8,
35382 argLen: 1,
35383 asm: s390x.ARLL,
35384 reg: regInfo{
35385 inputs: []inputInfo{
35386 {0, 23551},
35387 },
35388 outputs: []outputInfo{
35389 {0, 23551},
35390 },
35391 },
35392 },
35393 {
35394 name: "RXSBG",
35395 auxType: auxS390XRotateParams,
35396 argLen: 2,
35397 resultInArg0: true,
35398 clobberFlags: true,
35399 asm: s390x.ARXSBG,
35400 reg: regInfo{
35401 inputs: []inputInfo{
35402 {0, 23551},
35403 {1, 23551},
35404 },
35405 outputs: []outputInfo{
35406 {0, 23551},
35407 },
35408 },
35409 },
35410 {
35411 name: "RISBGZ",
35412 auxType: auxS390XRotateParams,
35413 argLen: 1,
35414 clobberFlags: true,
35415 asm: s390x.ARISBGZ,
35416 reg: regInfo{
35417 inputs: []inputInfo{
35418 {0, 23551},
35419 },
35420 outputs: []outputInfo{
35421 {0, 23551},
35422 },
35423 },
35424 },
35425 {
35426 name: "NEG",
35427 argLen: 1,
35428 clobberFlags: true,
35429 asm: s390x.ANEG,
35430 reg: regInfo{
35431 inputs: []inputInfo{
35432 {0, 23551},
35433 },
35434 outputs: []outputInfo{
35435 {0, 23551},
35436 },
35437 },
35438 },
35439 {
35440 name: "NEGW",
35441 argLen: 1,
35442 clobberFlags: true,
35443 asm: s390x.ANEGW,
35444 reg: regInfo{
35445 inputs: []inputInfo{
35446 {0, 23551},
35447 },
35448 outputs: []outputInfo{
35449 {0, 23551},
35450 },
35451 },
35452 },
35453 {
35454 name: "NOT",
35455 argLen: 1,
35456 resultInArg0: true,
35457 clobberFlags: true,
35458 reg: regInfo{
35459 inputs: []inputInfo{
35460 {0, 23551},
35461 },
35462 outputs: []outputInfo{
35463 {0, 23551},
35464 },
35465 },
35466 },
35467 {
35468 name: "NOTW",
35469 argLen: 1,
35470 resultInArg0: true,
35471 clobberFlags: true,
35472 reg: regInfo{
35473 inputs: []inputInfo{
35474 {0, 23551},
35475 },
35476 outputs: []outputInfo{
35477 {0, 23551},
35478 },
35479 },
35480 },
35481 {
35482 name: "FSQRT",
35483 argLen: 1,
35484 asm: s390x.AFSQRT,
35485 reg: regInfo{
35486 inputs: []inputInfo{
35487 {0, 4294901760},
35488 },
35489 outputs: []outputInfo{
35490 {0, 4294901760},
35491 },
35492 },
35493 },
35494 {
35495 name: "FSQRTS",
35496 argLen: 1,
35497 asm: s390x.AFSQRTS,
35498 reg: regInfo{
35499 inputs: []inputInfo{
35500 {0, 4294901760},
35501 },
35502 outputs: []outputInfo{
35503 {0, 4294901760},
35504 },
35505 },
35506 },
35507 {
35508 name: "LOCGR",
35509 auxType: auxS390XCCMask,
35510 argLen: 3,
35511 resultInArg0: true,
35512 asm: s390x.ALOCGR,
35513 reg: regInfo{
35514 inputs: []inputInfo{
35515 {0, 23551},
35516 {1, 23551},
35517 },
35518 outputs: []outputInfo{
35519 {0, 23551},
35520 },
35521 },
35522 },
35523 {
35524 name: "MOVBreg",
35525 argLen: 1,
35526 asm: s390x.AMOVB,
35527 reg: regInfo{
35528 inputs: []inputInfo{
35529 {0, 56319},
35530 },
35531 outputs: []outputInfo{
35532 {0, 23551},
35533 },
35534 },
35535 },
35536 {
35537 name: "MOVBZreg",
35538 argLen: 1,
35539 asm: s390x.AMOVBZ,
35540 reg: regInfo{
35541 inputs: []inputInfo{
35542 {0, 56319},
35543 },
35544 outputs: []outputInfo{
35545 {0, 23551},
35546 },
35547 },
35548 },
35549 {
35550 name: "MOVHreg",
35551 argLen: 1,
35552 asm: s390x.AMOVH,
35553 reg: regInfo{
35554 inputs: []inputInfo{
35555 {0, 56319},
35556 },
35557 outputs: []outputInfo{
35558 {0, 23551},
35559 },
35560 },
35561 },
35562 {
35563 name: "MOVHZreg",
35564 argLen: 1,
35565 asm: s390x.AMOVHZ,
35566 reg: regInfo{
35567 inputs: []inputInfo{
35568 {0, 56319},
35569 },
35570 outputs: []outputInfo{
35571 {0, 23551},
35572 },
35573 },
35574 },
35575 {
35576 name: "MOVWreg",
35577 argLen: 1,
35578 asm: s390x.AMOVW,
35579 reg: regInfo{
35580 inputs: []inputInfo{
35581 {0, 56319},
35582 },
35583 outputs: []outputInfo{
35584 {0, 23551},
35585 },
35586 },
35587 },
35588 {
35589 name: "MOVWZreg",
35590 argLen: 1,
35591 asm: s390x.AMOVWZ,
35592 reg: regInfo{
35593 inputs: []inputInfo{
35594 {0, 56319},
35595 },
35596 outputs: []outputInfo{
35597 {0, 23551},
35598 },
35599 },
35600 },
35601 {
35602 name: "MOVDconst",
35603 auxType: auxInt64,
35604 argLen: 0,
35605 rematerializeable: true,
35606 asm: s390x.AMOVD,
35607 reg: regInfo{
35608 outputs: []outputInfo{
35609 {0, 23551},
35610 },
35611 },
35612 },
35613 {
35614 name: "LDGR",
35615 argLen: 1,
35616 asm: s390x.ALDGR,
35617 reg: regInfo{
35618 inputs: []inputInfo{
35619 {0, 23551},
35620 },
35621 outputs: []outputInfo{
35622 {0, 4294901760},
35623 },
35624 },
35625 },
35626 {
35627 name: "LGDR",
35628 argLen: 1,
35629 asm: s390x.ALGDR,
35630 reg: regInfo{
35631 inputs: []inputInfo{
35632 {0, 4294901760},
35633 },
35634 outputs: []outputInfo{
35635 {0, 23551},
35636 },
35637 },
35638 },
35639 {
35640 name: "CFDBRA",
35641 argLen: 1,
35642 clobberFlags: true,
35643 asm: s390x.ACFDBRA,
35644 reg: regInfo{
35645 inputs: []inputInfo{
35646 {0, 4294901760},
35647 },
35648 outputs: []outputInfo{
35649 {0, 23551},
35650 },
35651 },
35652 },
35653 {
35654 name: "CGDBRA",
35655 argLen: 1,
35656 clobberFlags: true,
35657 asm: s390x.ACGDBRA,
35658 reg: regInfo{
35659 inputs: []inputInfo{
35660 {0, 4294901760},
35661 },
35662 outputs: []outputInfo{
35663 {0, 23551},
35664 },
35665 },
35666 },
35667 {
35668 name: "CFEBRA",
35669 argLen: 1,
35670 clobberFlags: true,
35671 asm: s390x.ACFEBRA,
35672 reg: regInfo{
35673 inputs: []inputInfo{
35674 {0, 4294901760},
35675 },
35676 outputs: []outputInfo{
35677 {0, 23551},
35678 },
35679 },
35680 },
35681 {
35682 name: "CGEBRA",
35683 argLen: 1,
35684 clobberFlags: true,
35685 asm: s390x.ACGEBRA,
35686 reg: regInfo{
35687 inputs: []inputInfo{
35688 {0, 4294901760},
35689 },
35690 outputs: []outputInfo{
35691 {0, 23551},
35692 },
35693 },
35694 },
35695 {
35696 name: "CEFBRA",
35697 argLen: 1,
35698 clobberFlags: true,
35699 asm: s390x.ACEFBRA,
35700 reg: regInfo{
35701 inputs: []inputInfo{
35702 {0, 23551},
35703 },
35704 outputs: []outputInfo{
35705 {0, 4294901760},
35706 },
35707 },
35708 },
35709 {
35710 name: "CDFBRA",
35711 argLen: 1,
35712 clobberFlags: true,
35713 asm: s390x.ACDFBRA,
35714 reg: regInfo{
35715 inputs: []inputInfo{
35716 {0, 23551},
35717 },
35718 outputs: []outputInfo{
35719 {0, 4294901760},
35720 },
35721 },
35722 },
35723 {
35724 name: "CEGBRA",
35725 argLen: 1,
35726 clobberFlags: true,
35727 asm: s390x.ACEGBRA,
35728 reg: regInfo{
35729 inputs: []inputInfo{
35730 {0, 23551},
35731 },
35732 outputs: []outputInfo{
35733 {0, 4294901760},
35734 },
35735 },
35736 },
35737 {
35738 name: "CDGBRA",
35739 argLen: 1,
35740 clobberFlags: true,
35741 asm: s390x.ACDGBRA,
35742 reg: regInfo{
35743 inputs: []inputInfo{
35744 {0, 23551},
35745 },
35746 outputs: []outputInfo{
35747 {0, 4294901760},
35748 },
35749 },
35750 },
35751 {
35752 name: "CLFEBR",
35753 argLen: 1,
35754 clobberFlags: true,
35755 asm: s390x.ACLFEBR,
35756 reg: regInfo{
35757 inputs: []inputInfo{
35758 {0, 4294901760},
35759 },
35760 outputs: []outputInfo{
35761 {0, 23551},
35762 },
35763 },
35764 },
35765 {
35766 name: "CLFDBR",
35767 argLen: 1,
35768 clobberFlags: true,
35769 asm: s390x.ACLFDBR,
35770 reg: regInfo{
35771 inputs: []inputInfo{
35772 {0, 4294901760},
35773 },
35774 outputs: []outputInfo{
35775 {0, 23551},
35776 },
35777 },
35778 },
35779 {
35780 name: "CLGEBR",
35781 argLen: 1,
35782 clobberFlags: true,
35783 asm: s390x.ACLGEBR,
35784 reg: regInfo{
35785 inputs: []inputInfo{
35786 {0, 4294901760},
35787 },
35788 outputs: []outputInfo{
35789 {0, 23551},
35790 },
35791 },
35792 },
35793 {
35794 name: "CLGDBR",
35795 argLen: 1,
35796 clobberFlags: true,
35797 asm: s390x.ACLGDBR,
35798 reg: regInfo{
35799 inputs: []inputInfo{
35800 {0, 4294901760},
35801 },
35802 outputs: []outputInfo{
35803 {0, 23551},
35804 },
35805 },
35806 },
35807 {
35808 name: "CELFBR",
35809 argLen: 1,
35810 clobberFlags: true,
35811 asm: s390x.ACELFBR,
35812 reg: regInfo{
35813 inputs: []inputInfo{
35814 {0, 23551},
35815 },
35816 outputs: []outputInfo{
35817 {0, 4294901760},
35818 },
35819 },
35820 },
35821 {
35822 name: "CDLFBR",
35823 argLen: 1,
35824 clobberFlags: true,
35825 asm: s390x.ACDLFBR,
35826 reg: regInfo{
35827 inputs: []inputInfo{
35828 {0, 23551},
35829 },
35830 outputs: []outputInfo{
35831 {0, 4294901760},
35832 },
35833 },
35834 },
35835 {
35836 name: "CELGBR",
35837 argLen: 1,
35838 clobberFlags: true,
35839 asm: s390x.ACELGBR,
35840 reg: regInfo{
35841 inputs: []inputInfo{
35842 {0, 23551},
35843 },
35844 outputs: []outputInfo{
35845 {0, 4294901760},
35846 },
35847 },
35848 },
35849 {
35850 name: "CDLGBR",
35851 argLen: 1,
35852 clobberFlags: true,
35853 asm: s390x.ACDLGBR,
35854 reg: regInfo{
35855 inputs: []inputInfo{
35856 {0, 23551},
35857 },
35858 outputs: []outputInfo{
35859 {0, 4294901760},
35860 },
35861 },
35862 },
35863 {
35864 name: "LEDBR",
35865 argLen: 1,
35866 asm: s390x.ALEDBR,
35867 reg: regInfo{
35868 inputs: []inputInfo{
35869 {0, 4294901760},
35870 },
35871 outputs: []outputInfo{
35872 {0, 4294901760},
35873 },
35874 },
35875 },
35876 {
35877 name: "LDEBR",
35878 argLen: 1,
35879 asm: s390x.ALDEBR,
35880 reg: regInfo{
35881 inputs: []inputInfo{
35882 {0, 4294901760},
35883 },
35884 outputs: []outputInfo{
35885 {0, 4294901760},
35886 },
35887 },
35888 },
35889 {
35890 name: "MOVDaddr",
35891 auxType: auxSymOff,
35892 argLen: 1,
35893 rematerializeable: true,
35894 symEffect: SymAddr,
35895 reg: regInfo{
35896 inputs: []inputInfo{
35897 {0, 4295000064},
35898 },
35899 outputs: []outputInfo{
35900 {0, 23551},
35901 },
35902 },
35903 },
35904 {
35905 name: "MOVDaddridx",
35906 auxType: auxSymOff,
35907 argLen: 2,
35908 symEffect: SymAddr,
35909 reg: regInfo{
35910 inputs: []inputInfo{
35911 {0, 4295000064},
35912 {1, 56318},
35913 },
35914 outputs: []outputInfo{
35915 {0, 23551},
35916 },
35917 },
35918 },
35919 {
35920 name: "MOVBZload",
35921 auxType: auxSymOff,
35922 argLen: 2,
35923 faultOnNilArg0: true,
35924 symEffect: SymRead,
35925 asm: s390x.AMOVBZ,
35926 reg: regInfo{
35927 inputs: []inputInfo{
35928 {0, 4295023614},
35929 },
35930 outputs: []outputInfo{
35931 {0, 23551},
35932 },
35933 },
35934 },
35935 {
35936 name: "MOVBload",
35937 auxType: auxSymOff,
35938 argLen: 2,
35939 faultOnNilArg0: true,
35940 symEffect: SymRead,
35941 asm: s390x.AMOVB,
35942 reg: regInfo{
35943 inputs: []inputInfo{
35944 {0, 4295023614},
35945 },
35946 outputs: []outputInfo{
35947 {0, 23551},
35948 },
35949 },
35950 },
35951 {
35952 name: "MOVHZload",
35953 auxType: auxSymOff,
35954 argLen: 2,
35955 faultOnNilArg0: true,
35956 symEffect: SymRead,
35957 asm: s390x.AMOVHZ,
35958 reg: regInfo{
35959 inputs: []inputInfo{
35960 {0, 4295023614},
35961 },
35962 outputs: []outputInfo{
35963 {0, 23551},
35964 },
35965 },
35966 },
35967 {
35968 name: "MOVHload",
35969 auxType: auxSymOff,
35970 argLen: 2,
35971 faultOnNilArg0: true,
35972 symEffect: SymRead,
35973 asm: s390x.AMOVH,
35974 reg: regInfo{
35975 inputs: []inputInfo{
35976 {0, 4295023614},
35977 },
35978 outputs: []outputInfo{
35979 {0, 23551},
35980 },
35981 },
35982 },
35983 {
35984 name: "MOVWZload",
35985 auxType: auxSymOff,
35986 argLen: 2,
35987 faultOnNilArg0: true,
35988 symEffect: SymRead,
35989 asm: s390x.AMOVWZ,
35990 reg: regInfo{
35991 inputs: []inputInfo{
35992 {0, 4295023614},
35993 },
35994 outputs: []outputInfo{
35995 {0, 23551},
35996 },
35997 },
35998 },
35999 {
36000 name: "MOVWload",
36001 auxType: auxSymOff,
36002 argLen: 2,
36003 faultOnNilArg0: true,
36004 symEffect: SymRead,
36005 asm: s390x.AMOVW,
36006 reg: regInfo{
36007 inputs: []inputInfo{
36008 {0, 4295023614},
36009 },
36010 outputs: []outputInfo{
36011 {0, 23551},
36012 },
36013 },
36014 },
36015 {
36016 name: "MOVDload",
36017 auxType: auxSymOff,
36018 argLen: 2,
36019 faultOnNilArg0: true,
36020 symEffect: SymRead,
36021 asm: s390x.AMOVD,
36022 reg: regInfo{
36023 inputs: []inputInfo{
36024 {0, 4295023614},
36025 },
36026 outputs: []outputInfo{
36027 {0, 23551},
36028 },
36029 },
36030 },
36031 {
36032 name: "MOVWBR",
36033 argLen: 1,
36034 asm: s390x.AMOVWBR,
36035 reg: regInfo{
36036 inputs: []inputInfo{
36037 {0, 23551},
36038 },
36039 outputs: []outputInfo{
36040 {0, 23551},
36041 },
36042 },
36043 },
36044 {
36045 name: "MOVDBR",
36046 argLen: 1,
36047 asm: s390x.AMOVDBR,
36048 reg: regInfo{
36049 inputs: []inputInfo{
36050 {0, 23551},
36051 },
36052 outputs: []outputInfo{
36053 {0, 23551},
36054 },
36055 },
36056 },
36057 {
36058 name: "MOVHBRload",
36059 auxType: auxSymOff,
36060 argLen: 2,
36061 faultOnNilArg0: true,
36062 symEffect: SymRead,
36063 asm: s390x.AMOVHBR,
36064 reg: regInfo{
36065 inputs: []inputInfo{
36066 {0, 4295023614},
36067 },
36068 outputs: []outputInfo{
36069 {0, 23551},
36070 },
36071 },
36072 },
36073 {
36074 name: "MOVWBRload",
36075 auxType: auxSymOff,
36076 argLen: 2,
36077 faultOnNilArg0: true,
36078 symEffect: SymRead,
36079 asm: s390x.AMOVWBR,
36080 reg: regInfo{
36081 inputs: []inputInfo{
36082 {0, 4295023614},
36083 },
36084 outputs: []outputInfo{
36085 {0, 23551},
36086 },
36087 },
36088 },
36089 {
36090 name: "MOVDBRload",
36091 auxType: auxSymOff,
36092 argLen: 2,
36093 faultOnNilArg0: true,
36094 symEffect: SymRead,
36095 asm: s390x.AMOVDBR,
36096 reg: regInfo{
36097 inputs: []inputInfo{
36098 {0, 4295023614},
36099 },
36100 outputs: []outputInfo{
36101 {0, 23551},
36102 },
36103 },
36104 },
36105 {
36106 name: "MOVBstore",
36107 auxType: auxSymOff,
36108 argLen: 3,
36109 faultOnNilArg0: true,
36110 symEffect: SymWrite,
36111 asm: s390x.AMOVB,
36112 reg: regInfo{
36113 inputs: []inputInfo{
36114 {0, 4295023614},
36115 {1, 56319},
36116 },
36117 },
36118 },
36119 {
36120 name: "MOVHstore",
36121 auxType: auxSymOff,
36122 argLen: 3,
36123 faultOnNilArg0: true,
36124 symEffect: SymWrite,
36125 asm: s390x.AMOVH,
36126 reg: regInfo{
36127 inputs: []inputInfo{
36128 {0, 4295023614},
36129 {1, 56319},
36130 },
36131 },
36132 },
36133 {
36134 name: "MOVWstore",
36135 auxType: auxSymOff,
36136 argLen: 3,
36137 faultOnNilArg0: true,
36138 symEffect: SymWrite,
36139 asm: s390x.AMOVW,
36140 reg: regInfo{
36141 inputs: []inputInfo{
36142 {0, 4295023614},
36143 {1, 56319},
36144 },
36145 },
36146 },
36147 {
36148 name: "MOVDstore",
36149 auxType: auxSymOff,
36150 argLen: 3,
36151 faultOnNilArg0: true,
36152 symEffect: SymWrite,
36153 asm: s390x.AMOVD,
36154 reg: regInfo{
36155 inputs: []inputInfo{
36156 {0, 4295023614},
36157 {1, 56319},
36158 },
36159 },
36160 },
36161 {
36162 name: "MOVHBRstore",
36163 auxType: auxSymOff,
36164 argLen: 3,
36165 faultOnNilArg0: true,
36166 symEffect: SymWrite,
36167 asm: s390x.AMOVHBR,
36168 reg: regInfo{
36169 inputs: []inputInfo{
36170 {0, 56318},
36171 {1, 56319},
36172 },
36173 },
36174 },
36175 {
36176 name: "MOVWBRstore",
36177 auxType: auxSymOff,
36178 argLen: 3,
36179 faultOnNilArg0: true,
36180 symEffect: SymWrite,
36181 asm: s390x.AMOVWBR,
36182 reg: regInfo{
36183 inputs: []inputInfo{
36184 {0, 56318},
36185 {1, 56319},
36186 },
36187 },
36188 },
36189 {
36190 name: "MOVDBRstore",
36191 auxType: auxSymOff,
36192 argLen: 3,
36193 faultOnNilArg0: true,
36194 symEffect: SymWrite,
36195 asm: s390x.AMOVDBR,
36196 reg: regInfo{
36197 inputs: []inputInfo{
36198 {0, 56318},
36199 {1, 56319},
36200 },
36201 },
36202 },
36203 {
36204 name: "MVC",
36205 auxType: auxSymValAndOff,
36206 argLen: 3,
36207 clobberFlags: true,
36208 faultOnNilArg0: true,
36209 faultOnNilArg1: true,
36210 symEffect: SymNone,
36211 asm: s390x.AMVC,
36212 reg: regInfo{
36213 inputs: []inputInfo{
36214 {0, 56318},
36215 {1, 56318},
36216 },
36217 },
36218 },
36219 {
36220 name: "MOVBZloadidx",
36221 auxType: auxSymOff,
36222 argLen: 3,
36223 commutative: true,
36224 symEffect: SymRead,
36225 asm: s390x.AMOVBZ,
36226 reg: regInfo{
36227 inputs: []inputInfo{
36228 {1, 56318},
36229 {0, 4295023614},
36230 },
36231 outputs: []outputInfo{
36232 {0, 23551},
36233 },
36234 },
36235 },
36236 {
36237 name: "MOVBloadidx",
36238 auxType: auxSymOff,
36239 argLen: 3,
36240 commutative: true,
36241 symEffect: SymRead,
36242 asm: s390x.AMOVB,
36243 reg: regInfo{
36244 inputs: []inputInfo{
36245 {1, 56318},
36246 {0, 4295023614},
36247 },
36248 outputs: []outputInfo{
36249 {0, 23551},
36250 },
36251 },
36252 },
36253 {
36254 name: "MOVHZloadidx",
36255 auxType: auxSymOff,
36256 argLen: 3,
36257 commutative: true,
36258 symEffect: SymRead,
36259 asm: s390x.AMOVHZ,
36260 reg: regInfo{
36261 inputs: []inputInfo{
36262 {1, 56318},
36263 {0, 4295023614},
36264 },
36265 outputs: []outputInfo{
36266 {0, 23551},
36267 },
36268 },
36269 },
36270 {
36271 name: "MOVHloadidx",
36272 auxType: auxSymOff,
36273 argLen: 3,
36274 commutative: true,
36275 symEffect: SymRead,
36276 asm: s390x.AMOVH,
36277 reg: regInfo{
36278 inputs: []inputInfo{
36279 {1, 56318},
36280 {0, 4295023614},
36281 },
36282 outputs: []outputInfo{
36283 {0, 23551},
36284 },
36285 },
36286 },
36287 {
36288 name: "MOVWZloadidx",
36289 auxType: auxSymOff,
36290 argLen: 3,
36291 commutative: true,
36292 symEffect: SymRead,
36293 asm: s390x.AMOVWZ,
36294 reg: regInfo{
36295 inputs: []inputInfo{
36296 {1, 56318},
36297 {0, 4295023614},
36298 },
36299 outputs: []outputInfo{
36300 {0, 23551},
36301 },
36302 },
36303 },
36304 {
36305 name: "MOVWloadidx",
36306 auxType: auxSymOff,
36307 argLen: 3,
36308 commutative: true,
36309 symEffect: SymRead,
36310 asm: s390x.AMOVW,
36311 reg: regInfo{
36312 inputs: []inputInfo{
36313 {1, 56318},
36314 {0, 4295023614},
36315 },
36316 outputs: []outputInfo{
36317 {0, 23551},
36318 },
36319 },
36320 },
36321 {
36322 name: "MOVDloadidx",
36323 auxType: auxSymOff,
36324 argLen: 3,
36325 commutative: true,
36326 symEffect: SymRead,
36327 asm: s390x.AMOVD,
36328 reg: regInfo{
36329 inputs: []inputInfo{
36330 {1, 56318},
36331 {0, 4295023614},
36332 },
36333 outputs: []outputInfo{
36334 {0, 23551},
36335 },
36336 },
36337 },
36338 {
36339 name: "MOVHBRloadidx",
36340 auxType: auxSymOff,
36341 argLen: 3,
36342 commutative: true,
36343 symEffect: SymRead,
36344 asm: s390x.AMOVHBR,
36345 reg: regInfo{
36346 inputs: []inputInfo{
36347 {1, 56318},
36348 {0, 4295023614},
36349 },
36350 outputs: []outputInfo{
36351 {0, 23551},
36352 },
36353 },
36354 },
36355 {
36356 name: "MOVWBRloadidx",
36357 auxType: auxSymOff,
36358 argLen: 3,
36359 commutative: true,
36360 symEffect: SymRead,
36361 asm: s390x.AMOVWBR,
36362 reg: regInfo{
36363 inputs: []inputInfo{
36364 {1, 56318},
36365 {0, 4295023614},
36366 },
36367 outputs: []outputInfo{
36368 {0, 23551},
36369 },
36370 },
36371 },
36372 {
36373 name: "MOVDBRloadidx",
36374 auxType: auxSymOff,
36375 argLen: 3,
36376 commutative: true,
36377 symEffect: SymRead,
36378 asm: s390x.AMOVDBR,
36379 reg: regInfo{
36380 inputs: []inputInfo{
36381 {1, 56318},
36382 {0, 4295023614},
36383 },
36384 outputs: []outputInfo{
36385 {0, 23551},
36386 },
36387 },
36388 },
36389 {
36390 name: "MOVBstoreidx",
36391 auxType: auxSymOff,
36392 argLen: 4,
36393 commutative: true,
36394 symEffect: SymWrite,
36395 asm: s390x.AMOVB,
36396 reg: regInfo{
36397 inputs: []inputInfo{
36398 {0, 56318},
36399 {1, 56318},
36400 {2, 56319},
36401 },
36402 },
36403 },
36404 {
36405 name: "MOVHstoreidx",
36406 auxType: auxSymOff,
36407 argLen: 4,
36408 commutative: true,
36409 symEffect: SymWrite,
36410 asm: s390x.AMOVH,
36411 reg: regInfo{
36412 inputs: []inputInfo{
36413 {0, 56318},
36414 {1, 56318},
36415 {2, 56319},
36416 },
36417 },
36418 },
36419 {
36420 name: "MOVWstoreidx",
36421 auxType: auxSymOff,
36422 argLen: 4,
36423 commutative: true,
36424 symEffect: SymWrite,
36425 asm: s390x.AMOVW,
36426 reg: regInfo{
36427 inputs: []inputInfo{
36428 {0, 56318},
36429 {1, 56318},
36430 {2, 56319},
36431 },
36432 },
36433 },
36434 {
36435 name: "MOVDstoreidx",
36436 auxType: auxSymOff,
36437 argLen: 4,
36438 commutative: true,
36439 symEffect: SymWrite,
36440 asm: s390x.AMOVD,
36441 reg: regInfo{
36442 inputs: []inputInfo{
36443 {0, 56318},
36444 {1, 56318},
36445 {2, 56319},
36446 },
36447 },
36448 },
36449 {
36450 name: "MOVHBRstoreidx",
36451 auxType: auxSymOff,
36452 argLen: 4,
36453 commutative: true,
36454 symEffect: SymWrite,
36455 asm: s390x.AMOVHBR,
36456 reg: regInfo{
36457 inputs: []inputInfo{
36458 {0, 56318},
36459 {1, 56318},
36460 {2, 56319},
36461 },
36462 },
36463 },
36464 {
36465 name: "MOVWBRstoreidx",
36466 auxType: auxSymOff,
36467 argLen: 4,
36468 commutative: true,
36469 symEffect: SymWrite,
36470 asm: s390x.AMOVWBR,
36471 reg: regInfo{
36472 inputs: []inputInfo{
36473 {0, 56318},
36474 {1, 56318},
36475 {2, 56319},
36476 },
36477 },
36478 },
36479 {
36480 name: "MOVDBRstoreidx",
36481 auxType: auxSymOff,
36482 argLen: 4,
36483 commutative: true,
36484 symEffect: SymWrite,
36485 asm: s390x.AMOVDBR,
36486 reg: regInfo{
36487 inputs: []inputInfo{
36488 {0, 56318},
36489 {1, 56318},
36490 {2, 56319},
36491 },
36492 },
36493 },
36494 {
36495 name: "MOVBstoreconst",
36496 auxType: auxSymValAndOff,
36497 argLen: 2,
36498 faultOnNilArg0: true,
36499 symEffect: SymWrite,
36500 asm: s390x.AMOVB,
36501 reg: regInfo{
36502 inputs: []inputInfo{
36503 {0, 4295023614},
36504 },
36505 },
36506 },
36507 {
36508 name: "MOVHstoreconst",
36509 auxType: auxSymValAndOff,
36510 argLen: 2,
36511 faultOnNilArg0: true,
36512 symEffect: SymWrite,
36513 asm: s390x.AMOVH,
36514 reg: regInfo{
36515 inputs: []inputInfo{
36516 {0, 4295023614},
36517 },
36518 },
36519 },
36520 {
36521 name: "MOVWstoreconst",
36522 auxType: auxSymValAndOff,
36523 argLen: 2,
36524 faultOnNilArg0: true,
36525 symEffect: SymWrite,
36526 asm: s390x.AMOVW,
36527 reg: regInfo{
36528 inputs: []inputInfo{
36529 {0, 4295023614},
36530 },
36531 },
36532 },
36533 {
36534 name: "MOVDstoreconst",
36535 auxType: auxSymValAndOff,
36536 argLen: 2,
36537 faultOnNilArg0: true,
36538 symEffect: SymWrite,
36539 asm: s390x.AMOVD,
36540 reg: regInfo{
36541 inputs: []inputInfo{
36542 {0, 4295023614},
36543 },
36544 },
36545 },
36546 {
36547 name: "CLEAR",
36548 auxType: auxSymValAndOff,
36549 argLen: 2,
36550 clobberFlags: true,
36551 faultOnNilArg0: true,
36552 symEffect: SymWrite,
36553 asm: s390x.ACLEAR,
36554 reg: regInfo{
36555 inputs: []inputInfo{
36556 {0, 23550},
36557 },
36558 },
36559 },
36560 {
36561 name: "CALLstatic",
36562 auxType: auxCallOff,
36563 argLen: 1,
36564 clobberFlags: true,
36565 call: true,
36566 reg: regInfo{
36567 clobbers: 4294933503,
36568 },
36569 },
36570 {
36571 name: "CALLtail",
36572 auxType: auxCallOff,
36573 argLen: 1,
36574 clobberFlags: true,
36575 call: true,
36576 tailCall: true,
36577 reg: regInfo{
36578 clobbers: 4294933503,
36579 },
36580 },
36581 {
36582 name: "CALLclosure",
36583 auxType: auxCallOff,
36584 argLen: 3,
36585 clobberFlags: true,
36586 call: true,
36587 reg: regInfo{
36588 inputs: []inputInfo{
36589 {1, 4096},
36590 {0, 56318},
36591 },
36592 clobbers: 4294933503,
36593 },
36594 },
36595 {
36596 name: "CALLinter",
36597 auxType: auxCallOff,
36598 argLen: 2,
36599 clobberFlags: true,
36600 call: true,
36601 reg: regInfo{
36602 inputs: []inputInfo{
36603 {0, 23550},
36604 },
36605 clobbers: 4294933503,
36606 },
36607 },
36608 {
36609 name: "InvertFlags",
36610 argLen: 1,
36611 reg: regInfo{},
36612 },
36613 {
36614 name: "LoweredGetG",
36615 argLen: 1,
36616 reg: regInfo{
36617 outputs: []outputInfo{
36618 {0, 23551},
36619 },
36620 },
36621 },
36622 {
36623 name: "LoweredGetClosurePtr",
36624 argLen: 0,
36625 zeroWidth: true,
36626 reg: regInfo{
36627 outputs: []outputInfo{
36628 {0, 4096},
36629 },
36630 },
36631 },
36632 {
36633 name: "LoweredGetCallerSP",
36634 argLen: 1,
36635 rematerializeable: true,
36636 reg: regInfo{
36637 outputs: []outputInfo{
36638 {0, 23551},
36639 },
36640 },
36641 },
36642 {
36643 name: "LoweredGetCallerPC",
36644 argLen: 0,
36645 rematerializeable: true,
36646 reg: regInfo{
36647 outputs: []outputInfo{
36648 {0, 23551},
36649 },
36650 },
36651 },
36652 {
36653 name: "LoweredNilCheck",
36654 argLen: 2,
36655 clobberFlags: true,
36656 nilCheck: true,
36657 faultOnNilArg0: true,
36658 reg: regInfo{
36659 inputs: []inputInfo{
36660 {0, 56318},
36661 },
36662 },
36663 },
36664 {
36665 name: "LoweredRound32F",
36666 argLen: 1,
36667 resultInArg0: true,
36668 zeroWidth: true,
36669 reg: regInfo{
36670 inputs: []inputInfo{
36671 {0, 4294901760},
36672 },
36673 outputs: []outputInfo{
36674 {0, 4294901760},
36675 },
36676 },
36677 },
36678 {
36679 name: "LoweredRound64F",
36680 argLen: 1,
36681 resultInArg0: true,
36682 zeroWidth: true,
36683 reg: regInfo{
36684 inputs: []inputInfo{
36685 {0, 4294901760},
36686 },
36687 outputs: []outputInfo{
36688 {0, 4294901760},
36689 },
36690 },
36691 },
36692 {
36693 name: "LoweredWB",
36694 auxType: auxInt64,
36695 argLen: 1,
36696 clobberFlags: true,
36697 reg: regInfo{
36698 clobbers: 4294918146,
36699 outputs: []outputInfo{
36700 {0, 512},
36701 },
36702 },
36703 },
36704 {
36705 name: "LoweredPanicBoundsA",
36706 auxType: auxInt64,
36707 argLen: 3,
36708 call: true,
36709 reg: regInfo{
36710 inputs: []inputInfo{
36711 {0, 4},
36712 {1, 8},
36713 },
36714 },
36715 },
36716 {
36717 name: "LoweredPanicBoundsB",
36718 auxType: auxInt64,
36719 argLen: 3,
36720 call: true,
36721 reg: regInfo{
36722 inputs: []inputInfo{
36723 {0, 2},
36724 {1, 4},
36725 },
36726 },
36727 },
36728 {
36729 name: "LoweredPanicBoundsC",
36730 auxType: auxInt64,
36731 argLen: 3,
36732 call: true,
36733 reg: regInfo{
36734 inputs: []inputInfo{
36735 {0, 1},
36736 {1, 2},
36737 },
36738 },
36739 },
36740 {
36741 name: "FlagEQ",
36742 argLen: 0,
36743 reg: regInfo{},
36744 },
36745 {
36746 name: "FlagLT",
36747 argLen: 0,
36748 reg: regInfo{},
36749 },
36750 {
36751 name: "FlagGT",
36752 argLen: 0,
36753 reg: regInfo{},
36754 },
36755 {
36756 name: "FlagOV",
36757 argLen: 0,
36758 reg: regInfo{},
36759 },
36760 {
36761 name: "SYNC",
36762 argLen: 1,
36763 asm: s390x.ASYNC,
36764 reg: regInfo{},
36765 },
36766 {
36767 name: "MOVBZatomicload",
36768 auxType: auxSymOff,
36769 argLen: 2,
36770 faultOnNilArg0: true,
36771 symEffect: SymRead,
36772 asm: s390x.AMOVBZ,
36773 reg: regInfo{
36774 inputs: []inputInfo{
36775 {0, 4295023614},
36776 },
36777 outputs: []outputInfo{
36778 {0, 23551},
36779 },
36780 },
36781 },
36782 {
36783 name: "MOVWZatomicload",
36784 auxType: auxSymOff,
36785 argLen: 2,
36786 faultOnNilArg0: true,
36787 symEffect: SymRead,
36788 asm: s390x.AMOVWZ,
36789 reg: regInfo{
36790 inputs: []inputInfo{
36791 {0, 4295023614},
36792 },
36793 outputs: []outputInfo{
36794 {0, 23551},
36795 },
36796 },
36797 },
36798 {
36799 name: "MOVDatomicload",
36800 auxType: auxSymOff,
36801 argLen: 2,
36802 faultOnNilArg0: true,
36803 symEffect: SymRead,
36804 asm: s390x.AMOVD,
36805 reg: regInfo{
36806 inputs: []inputInfo{
36807 {0, 4295023614},
36808 },
36809 outputs: []outputInfo{
36810 {0, 23551},
36811 },
36812 },
36813 },
36814 {
36815 name: "MOVBatomicstore",
36816 auxType: auxSymOff,
36817 argLen: 3,
36818 clobberFlags: true,
36819 faultOnNilArg0: true,
36820 hasSideEffects: true,
36821 symEffect: SymWrite,
36822 asm: s390x.AMOVB,
36823 reg: regInfo{
36824 inputs: []inputInfo{
36825 {0, 4295023614},
36826 {1, 56319},
36827 },
36828 },
36829 },
36830 {
36831 name: "MOVWatomicstore",
36832 auxType: auxSymOff,
36833 argLen: 3,
36834 clobberFlags: true,
36835 faultOnNilArg0: true,
36836 hasSideEffects: true,
36837 symEffect: SymWrite,
36838 asm: s390x.AMOVW,
36839 reg: regInfo{
36840 inputs: []inputInfo{
36841 {0, 4295023614},
36842 {1, 56319},
36843 },
36844 },
36845 },
36846 {
36847 name: "MOVDatomicstore",
36848 auxType: auxSymOff,
36849 argLen: 3,
36850 clobberFlags: true,
36851 faultOnNilArg0: true,
36852 hasSideEffects: true,
36853 symEffect: SymWrite,
36854 asm: s390x.AMOVD,
36855 reg: regInfo{
36856 inputs: []inputInfo{
36857 {0, 4295023614},
36858 {1, 56319},
36859 },
36860 },
36861 },
36862 {
36863 name: "LAA",
36864 auxType: auxSymOff,
36865 argLen: 3,
36866 clobberFlags: true,
36867 faultOnNilArg0: true,
36868 hasSideEffects: true,
36869 symEffect: SymRdWr,
36870 asm: s390x.ALAA,
36871 reg: regInfo{
36872 inputs: []inputInfo{
36873 {0, 4295023614},
36874 {1, 56319},
36875 },
36876 outputs: []outputInfo{
36877 {0, 23551},
36878 },
36879 },
36880 },
36881 {
36882 name: "LAAG",
36883 auxType: auxSymOff,
36884 argLen: 3,
36885 clobberFlags: true,
36886 faultOnNilArg0: true,
36887 hasSideEffects: true,
36888 symEffect: SymRdWr,
36889 asm: s390x.ALAAG,
36890 reg: regInfo{
36891 inputs: []inputInfo{
36892 {0, 4295023614},
36893 {1, 56319},
36894 },
36895 outputs: []outputInfo{
36896 {0, 23551},
36897 },
36898 },
36899 },
36900 {
36901 name: "AddTupleFirst32",
36902 argLen: 2,
36903 reg: regInfo{},
36904 },
36905 {
36906 name: "AddTupleFirst64",
36907 argLen: 2,
36908 reg: regInfo{},
36909 },
36910 {
36911 name: "LAN",
36912 argLen: 3,
36913 clobberFlags: true,
36914 hasSideEffects: true,
36915 asm: s390x.ALAN,
36916 reg: regInfo{
36917 inputs: []inputInfo{
36918 {0, 4295023614},
36919 {1, 56319},
36920 },
36921 },
36922 },
36923 {
36924 name: "LANfloor",
36925 argLen: 3,
36926 clobberFlags: true,
36927 hasSideEffects: true,
36928 asm: s390x.ALAN,
36929 reg: regInfo{
36930 inputs: []inputInfo{
36931 {0, 2},
36932 {1, 56319},
36933 },
36934 clobbers: 2,
36935 },
36936 },
36937 {
36938 name: "LAO",
36939 argLen: 3,
36940 clobberFlags: true,
36941 hasSideEffects: true,
36942 asm: s390x.ALAO,
36943 reg: regInfo{
36944 inputs: []inputInfo{
36945 {0, 4295023614},
36946 {1, 56319},
36947 },
36948 },
36949 },
36950 {
36951 name: "LAOfloor",
36952 argLen: 3,
36953 clobberFlags: true,
36954 hasSideEffects: true,
36955 asm: s390x.ALAO,
36956 reg: regInfo{
36957 inputs: []inputInfo{
36958 {0, 2},
36959 {1, 56319},
36960 },
36961 clobbers: 2,
36962 },
36963 },
36964 {
36965 name: "LoweredAtomicCas32",
36966 auxType: auxSymOff,
36967 argLen: 4,
36968 clobberFlags: true,
36969 faultOnNilArg0: true,
36970 hasSideEffects: true,
36971 symEffect: SymRdWr,
36972 asm: s390x.ACS,
36973 reg: regInfo{
36974 inputs: []inputInfo{
36975 {1, 1},
36976 {0, 56318},
36977 {2, 56319},
36978 },
36979 clobbers: 1,
36980 outputs: []outputInfo{
36981 {1, 0},
36982 {0, 23551},
36983 },
36984 },
36985 },
36986 {
36987 name: "LoweredAtomicCas64",
36988 auxType: auxSymOff,
36989 argLen: 4,
36990 clobberFlags: true,
36991 faultOnNilArg0: true,
36992 hasSideEffects: true,
36993 symEffect: SymRdWr,
36994 asm: s390x.ACSG,
36995 reg: regInfo{
36996 inputs: []inputInfo{
36997 {1, 1},
36998 {0, 56318},
36999 {2, 56319},
37000 },
37001 clobbers: 1,
37002 outputs: []outputInfo{
37003 {1, 0},
37004 {0, 23551},
37005 },
37006 },
37007 },
37008 {
37009 name: "LoweredAtomicExchange32",
37010 auxType: auxSymOff,
37011 argLen: 3,
37012 clobberFlags: true,
37013 faultOnNilArg0: true,
37014 hasSideEffects: true,
37015 symEffect: SymRdWr,
37016 asm: s390x.ACS,
37017 reg: regInfo{
37018 inputs: []inputInfo{
37019 {0, 56318},
37020 {1, 56318},
37021 },
37022 outputs: []outputInfo{
37023 {1, 0},
37024 {0, 1},
37025 },
37026 },
37027 },
37028 {
37029 name: "LoweredAtomicExchange64",
37030 auxType: auxSymOff,
37031 argLen: 3,
37032 clobberFlags: true,
37033 faultOnNilArg0: true,
37034 hasSideEffects: true,
37035 symEffect: SymRdWr,
37036 asm: s390x.ACSG,
37037 reg: regInfo{
37038 inputs: []inputInfo{
37039 {0, 56318},
37040 {1, 56318},
37041 },
37042 outputs: []outputInfo{
37043 {1, 0},
37044 {0, 1},
37045 },
37046 },
37047 },
37048 {
37049 name: "FLOGR",
37050 argLen: 1,
37051 clobberFlags: true,
37052 asm: s390x.AFLOGR,
37053 reg: regInfo{
37054 inputs: []inputInfo{
37055 {0, 23551},
37056 },
37057 clobbers: 2,
37058 outputs: []outputInfo{
37059 {0, 1},
37060 },
37061 },
37062 },
37063 {
37064 name: "POPCNT",
37065 argLen: 1,
37066 clobberFlags: true,
37067 asm: s390x.APOPCNT,
37068 reg: regInfo{
37069 inputs: []inputInfo{
37070 {0, 23551},
37071 },
37072 outputs: []outputInfo{
37073 {0, 23551},
37074 },
37075 },
37076 },
37077 {
37078 name: "MLGR",
37079 argLen: 2,
37080 asm: s390x.AMLGR,
37081 reg: regInfo{
37082 inputs: []inputInfo{
37083 {1, 8},
37084 {0, 23551},
37085 },
37086 outputs: []outputInfo{
37087 {0, 4},
37088 {1, 8},
37089 },
37090 },
37091 },
37092 {
37093 name: "SumBytes2",
37094 argLen: 1,
37095 reg: regInfo{},
37096 },
37097 {
37098 name: "SumBytes4",
37099 argLen: 1,
37100 reg: regInfo{},
37101 },
37102 {
37103 name: "SumBytes8",
37104 argLen: 1,
37105 reg: regInfo{},
37106 },
37107 {
37108 name: "STMG2",
37109 auxType: auxSymOff,
37110 argLen: 4,
37111 clobberFlags: true,
37112 faultOnNilArg0: true,
37113 symEffect: SymWrite,
37114 asm: s390x.ASTMG,
37115 reg: regInfo{
37116 inputs: []inputInfo{
37117 {1, 2},
37118 {2, 4},
37119 {0, 56318},
37120 },
37121 },
37122 },
37123 {
37124 name: "STMG3",
37125 auxType: auxSymOff,
37126 argLen: 5,
37127 clobberFlags: true,
37128 faultOnNilArg0: true,
37129 symEffect: SymWrite,
37130 asm: s390x.ASTMG,
37131 reg: regInfo{
37132 inputs: []inputInfo{
37133 {1, 2},
37134 {2, 4},
37135 {3, 8},
37136 {0, 56318},
37137 },
37138 },
37139 },
37140 {
37141 name: "STMG4",
37142 auxType: auxSymOff,
37143 argLen: 6,
37144 clobberFlags: true,
37145 faultOnNilArg0: true,
37146 symEffect: SymWrite,
37147 asm: s390x.ASTMG,
37148 reg: regInfo{
37149 inputs: []inputInfo{
37150 {1, 2},
37151 {2, 4},
37152 {3, 8},
37153 {4, 16},
37154 {0, 56318},
37155 },
37156 },
37157 },
37158 {
37159 name: "STM2",
37160 auxType: auxSymOff,
37161 argLen: 4,
37162 clobberFlags: true,
37163 faultOnNilArg0: true,
37164 symEffect: SymWrite,
37165 asm: s390x.ASTMY,
37166 reg: regInfo{
37167 inputs: []inputInfo{
37168 {1, 2},
37169 {2, 4},
37170 {0, 56318},
37171 },
37172 },
37173 },
37174 {
37175 name: "STM3",
37176 auxType: auxSymOff,
37177 argLen: 5,
37178 clobberFlags: true,
37179 faultOnNilArg0: true,
37180 symEffect: SymWrite,
37181 asm: s390x.ASTMY,
37182 reg: regInfo{
37183 inputs: []inputInfo{
37184 {1, 2},
37185 {2, 4},
37186 {3, 8},
37187 {0, 56318},
37188 },
37189 },
37190 },
37191 {
37192 name: "STM4",
37193 auxType: auxSymOff,
37194 argLen: 6,
37195 clobberFlags: true,
37196 faultOnNilArg0: true,
37197 symEffect: SymWrite,
37198 asm: s390x.ASTMY,
37199 reg: regInfo{
37200 inputs: []inputInfo{
37201 {1, 2},
37202 {2, 4},
37203 {3, 8},
37204 {4, 16},
37205 {0, 56318},
37206 },
37207 },
37208 },
37209 {
37210 name: "LoweredMove",
37211 auxType: auxInt64,
37212 argLen: 4,
37213 clobberFlags: true,
37214 faultOnNilArg0: true,
37215 faultOnNilArg1: true,
37216 reg: regInfo{
37217 inputs: []inputInfo{
37218 {0, 2},
37219 {1, 4},
37220 {2, 56319},
37221 },
37222 clobbers: 6,
37223 },
37224 },
37225 {
37226 name: "LoweredZero",
37227 auxType: auxInt64,
37228 argLen: 3,
37229 clobberFlags: true,
37230 faultOnNilArg0: true,
37231 reg: regInfo{
37232 inputs: []inputInfo{
37233 {0, 2},
37234 {1, 56319},
37235 },
37236 clobbers: 2,
37237 },
37238 },
37239
37240 {
37241 name: "LoweredStaticCall",
37242 auxType: auxCallOff,
37243 argLen: 1,
37244 call: true,
37245 reg: regInfo{
37246 clobbers: 844424930131967,
37247 },
37248 },
37249 {
37250 name: "LoweredTailCall",
37251 auxType: auxCallOff,
37252 argLen: 1,
37253 call: true,
37254 tailCall: true,
37255 reg: regInfo{
37256 clobbers: 844424930131967,
37257 },
37258 },
37259 {
37260 name: "LoweredClosureCall",
37261 auxType: auxCallOff,
37262 argLen: 3,
37263 call: true,
37264 reg: regInfo{
37265 inputs: []inputInfo{
37266 {0, 65535},
37267 {1, 65535},
37268 },
37269 clobbers: 844424930131967,
37270 },
37271 },
37272 {
37273 name: "LoweredInterCall",
37274 auxType: auxCallOff,
37275 argLen: 2,
37276 call: true,
37277 reg: regInfo{
37278 inputs: []inputInfo{
37279 {0, 65535},
37280 },
37281 clobbers: 844424930131967,
37282 },
37283 },
37284 {
37285 name: "LoweredAddr",
37286 auxType: auxSymOff,
37287 argLen: 1,
37288 rematerializeable: true,
37289 symEffect: SymAddr,
37290 reg: regInfo{
37291 inputs: []inputInfo{
37292 {0, 281474976776191},
37293 },
37294 outputs: []outputInfo{
37295 {0, 65535},
37296 },
37297 },
37298 },
37299 {
37300 name: "LoweredMove",
37301 auxType: auxInt64,
37302 argLen: 3,
37303 reg: regInfo{
37304 inputs: []inputInfo{
37305 {0, 65535},
37306 {1, 65535},
37307 },
37308 },
37309 },
37310 {
37311 name: "LoweredZero",
37312 auxType: auxInt64,
37313 argLen: 2,
37314 reg: regInfo{
37315 inputs: []inputInfo{
37316 {0, 65535},
37317 },
37318 },
37319 },
37320 {
37321 name: "LoweredGetClosurePtr",
37322 argLen: 0,
37323 reg: regInfo{
37324 outputs: []outputInfo{
37325 {0, 65535},
37326 },
37327 },
37328 },
37329 {
37330 name: "LoweredGetCallerPC",
37331 argLen: 0,
37332 rematerializeable: true,
37333 reg: regInfo{
37334 outputs: []outputInfo{
37335 {0, 65535},
37336 },
37337 },
37338 },
37339 {
37340 name: "LoweredGetCallerSP",
37341 argLen: 1,
37342 rematerializeable: true,
37343 reg: regInfo{
37344 outputs: []outputInfo{
37345 {0, 65535},
37346 },
37347 },
37348 },
37349 {
37350 name: "LoweredNilCheck",
37351 argLen: 2,
37352 nilCheck: true,
37353 faultOnNilArg0: true,
37354 reg: regInfo{
37355 inputs: []inputInfo{
37356 {0, 65535},
37357 },
37358 },
37359 },
37360 {
37361 name: "LoweredWB",
37362 auxType: auxInt64,
37363 argLen: 1,
37364 reg: regInfo{
37365 clobbers: 844424930131967,
37366 outputs: []outputInfo{
37367 {0, 65535},
37368 },
37369 },
37370 },
37371 {
37372 name: "LoweredConvert",
37373 argLen: 2,
37374 reg: regInfo{
37375 inputs: []inputInfo{
37376 {0, 65535},
37377 },
37378 outputs: []outputInfo{
37379 {0, 65535},
37380 },
37381 },
37382 },
37383 {
37384 name: "Select",
37385 argLen: 3,
37386 asm: wasm.ASelect,
37387 reg: regInfo{
37388 inputs: []inputInfo{
37389 {0, 281474976776191},
37390 {1, 281474976776191},
37391 {2, 281474976776191},
37392 },
37393 outputs: []outputInfo{
37394 {0, 65535},
37395 },
37396 },
37397 },
37398 {
37399 name: "I64Load8U",
37400 auxType: auxInt64,
37401 argLen: 2,
37402 asm: wasm.AI64Load8U,
37403 reg: regInfo{
37404 inputs: []inputInfo{
37405 {0, 1407374883618815},
37406 },
37407 outputs: []outputInfo{
37408 {0, 65535},
37409 },
37410 },
37411 },
37412 {
37413 name: "I64Load8S",
37414 auxType: auxInt64,
37415 argLen: 2,
37416 asm: wasm.AI64Load8S,
37417 reg: regInfo{
37418 inputs: []inputInfo{
37419 {0, 1407374883618815},
37420 },
37421 outputs: []outputInfo{
37422 {0, 65535},
37423 },
37424 },
37425 },
37426 {
37427 name: "I64Load16U",
37428 auxType: auxInt64,
37429 argLen: 2,
37430 asm: wasm.AI64Load16U,
37431 reg: regInfo{
37432 inputs: []inputInfo{
37433 {0, 1407374883618815},
37434 },
37435 outputs: []outputInfo{
37436 {0, 65535},
37437 },
37438 },
37439 },
37440 {
37441 name: "I64Load16S",
37442 auxType: auxInt64,
37443 argLen: 2,
37444 asm: wasm.AI64Load16S,
37445 reg: regInfo{
37446 inputs: []inputInfo{
37447 {0, 1407374883618815},
37448 },
37449 outputs: []outputInfo{
37450 {0, 65535},
37451 },
37452 },
37453 },
37454 {
37455 name: "I64Load32U",
37456 auxType: auxInt64,
37457 argLen: 2,
37458 asm: wasm.AI64Load32U,
37459 reg: regInfo{
37460 inputs: []inputInfo{
37461 {0, 1407374883618815},
37462 },
37463 outputs: []outputInfo{
37464 {0, 65535},
37465 },
37466 },
37467 },
37468 {
37469 name: "I64Load32S",
37470 auxType: auxInt64,
37471 argLen: 2,
37472 asm: wasm.AI64Load32S,
37473 reg: regInfo{
37474 inputs: []inputInfo{
37475 {0, 1407374883618815},
37476 },
37477 outputs: []outputInfo{
37478 {0, 65535},
37479 },
37480 },
37481 },
37482 {
37483 name: "I64Load",
37484 auxType: auxInt64,
37485 argLen: 2,
37486 asm: wasm.AI64Load,
37487 reg: regInfo{
37488 inputs: []inputInfo{
37489 {0, 1407374883618815},
37490 },
37491 outputs: []outputInfo{
37492 {0, 65535},
37493 },
37494 },
37495 },
37496 {
37497 name: "I64Store8",
37498 auxType: auxInt64,
37499 argLen: 3,
37500 asm: wasm.AI64Store8,
37501 reg: regInfo{
37502 inputs: []inputInfo{
37503 {1, 281474976776191},
37504 {0, 1407374883618815},
37505 },
37506 },
37507 },
37508 {
37509 name: "I64Store16",
37510 auxType: auxInt64,
37511 argLen: 3,
37512 asm: wasm.AI64Store16,
37513 reg: regInfo{
37514 inputs: []inputInfo{
37515 {1, 281474976776191},
37516 {0, 1407374883618815},
37517 },
37518 },
37519 },
37520 {
37521 name: "I64Store32",
37522 auxType: auxInt64,
37523 argLen: 3,
37524 asm: wasm.AI64Store32,
37525 reg: regInfo{
37526 inputs: []inputInfo{
37527 {1, 281474976776191},
37528 {0, 1407374883618815},
37529 },
37530 },
37531 },
37532 {
37533 name: "I64Store",
37534 auxType: auxInt64,
37535 argLen: 3,
37536 asm: wasm.AI64Store,
37537 reg: regInfo{
37538 inputs: []inputInfo{
37539 {1, 281474976776191},
37540 {0, 1407374883618815},
37541 },
37542 },
37543 },
37544 {
37545 name: "F32Load",
37546 auxType: auxInt64,
37547 argLen: 2,
37548 asm: wasm.AF32Load,
37549 reg: regInfo{
37550 inputs: []inputInfo{
37551 {0, 1407374883618815},
37552 },
37553 outputs: []outputInfo{
37554 {0, 4294901760},
37555 },
37556 },
37557 },
37558 {
37559 name: "F64Load",
37560 auxType: auxInt64,
37561 argLen: 2,
37562 asm: wasm.AF64Load,
37563 reg: regInfo{
37564 inputs: []inputInfo{
37565 {0, 1407374883618815},
37566 },
37567 outputs: []outputInfo{
37568 {0, 281470681743360},
37569 },
37570 },
37571 },
37572 {
37573 name: "F32Store",
37574 auxType: auxInt64,
37575 argLen: 3,
37576 asm: wasm.AF32Store,
37577 reg: regInfo{
37578 inputs: []inputInfo{
37579 {1, 4294901760},
37580 {0, 1407374883618815},
37581 },
37582 },
37583 },
37584 {
37585 name: "F64Store",
37586 auxType: auxInt64,
37587 argLen: 3,
37588 asm: wasm.AF64Store,
37589 reg: regInfo{
37590 inputs: []inputInfo{
37591 {1, 281470681743360},
37592 {0, 1407374883618815},
37593 },
37594 },
37595 },
37596 {
37597 name: "I64Const",
37598 auxType: auxInt64,
37599 argLen: 0,
37600 rematerializeable: true,
37601 reg: regInfo{
37602 outputs: []outputInfo{
37603 {0, 65535},
37604 },
37605 },
37606 },
37607 {
37608 name: "F32Const",
37609 auxType: auxFloat32,
37610 argLen: 0,
37611 rematerializeable: true,
37612 reg: regInfo{
37613 outputs: []outputInfo{
37614 {0, 4294901760},
37615 },
37616 },
37617 },
37618 {
37619 name: "F64Const",
37620 auxType: auxFloat64,
37621 argLen: 0,
37622 rematerializeable: true,
37623 reg: regInfo{
37624 outputs: []outputInfo{
37625 {0, 281470681743360},
37626 },
37627 },
37628 },
37629 {
37630 name: "I64Eqz",
37631 argLen: 1,
37632 asm: wasm.AI64Eqz,
37633 reg: regInfo{
37634 inputs: []inputInfo{
37635 {0, 281474976776191},
37636 },
37637 outputs: []outputInfo{
37638 {0, 65535},
37639 },
37640 },
37641 },
37642 {
37643 name: "I64Eq",
37644 argLen: 2,
37645 asm: wasm.AI64Eq,
37646 reg: regInfo{
37647 inputs: []inputInfo{
37648 {0, 281474976776191},
37649 {1, 281474976776191},
37650 },
37651 outputs: []outputInfo{
37652 {0, 65535},
37653 },
37654 },
37655 },
37656 {
37657 name: "I64Ne",
37658 argLen: 2,
37659 asm: wasm.AI64Ne,
37660 reg: regInfo{
37661 inputs: []inputInfo{
37662 {0, 281474976776191},
37663 {1, 281474976776191},
37664 },
37665 outputs: []outputInfo{
37666 {0, 65535},
37667 },
37668 },
37669 },
37670 {
37671 name: "I64LtS",
37672 argLen: 2,
37673 asm: wasm.AI64LtS,
37674 reg: regInfo{
37675 inputs: []inputInfo{
37676 {0, 281474976776191},
37677 {1, 281474976776191},
37678 },
37679 outputs: []outputInfo{
37680 {0, 65535},
37681 },
37682 },
37683 },
37684 {
37685 name: "I64LtU",
37686 argLen: 2,
37687 asm: wasm.AI64LtU,
37688 reg: regInfo{
37689 inputs: []inputInfo{
37690 {0, 281474976776191},
37691 {1, 281474976776191},
37692 },
37693 outputs: []outputInfo{
37694 {0, 65535},
37695 },
37696 },
37697 },
37698 {
37699 name: "I64GtS",
37700 argLen: 2,
37701 asm: wasm.AI64GtS,
37702 reg: regInfo{
37703 inputs: []inputInfo{
37704 {0, 281474976776191},
37705 {1, 281474976776191},
37706 },
37707 outputs: []outputInfo{
37708 {0, 65535},
37709 },
37710 },
37711 },
37712 {
37713 name: "I64GtU",
37714 argLen: 2,
37715 asm: wasm.AI64GtU,
37716 reg: regInfo{
37717 inputs: []inputInfo{
37718 {0, 281474976776191},
37719 {1, 281474976776191},
37720 },
37721 outputs: []outputInfo{
37722 {0, 65535},
37723 },
37724 },
37725 },
37726 {
37727 name: "I64LeS",
37728 argLen: 2,
37729 asm: wasm.AI64LeS,
37730 reg: regInfo{
37731 inputs: []inputInfo{
37732 {0, 281474976776191},
37733 {1, 281474976776191},
37734 },
37735 outputs: []outputInfo{
37736 {0, 65535},
37737 },
37738 },
37739 },
37740 {
37741 name: "I64LeU",
37742 argLen: 2,
37743 asm: wasm.AI64LeU,
37744 reg: regInfo{
37745 inputs: []inputInfo{
37746 {0, 281474976776191},
37747 {1, 281474976776191},
37748 },
37749 outputs: []outputInfo{
37750 {0, 65535},
37751 },
37752 },
37753 },
37754 {
37755 name: "I64GeS",
37756 argLen: 2,
37757 asm: wasm.AI64GeS,
37758 reg: regInfo{
37759 inputs: []inputInfo{
37760 {0, 281474976776191},
37761 {1, 281474976776191},
37762 },
37763 outputs: []outputInfo{
37764 {0, 65535},
37765 },
37766 },
37767 },
37768 {
37769 name: "I64GeU",
37770 argLen: 2,
37771 asm: wasm.AI64GeU,
37772 reg: regInfo{
37773 inputs: []inputInfo{
37774 {0, 281474976776191},
37775 {1, 281474976776191},
37776 },
37777 outputs: []outputInfo{
37778 {0, 65535},
37779 },
37780 },
37781 },
37782 {
37783 name: "F32Eq",
37784 argLen: 2,
37785 asm: wasm.AF32Eq,
37786 reg: regInfo{
37787 inputs: []inputInfo{
37788 {0, 4294901760},
37789 {1, 4294901760},
37790 },
37791 outputs: []outputInfo{
37792 {0, 65535},
37793 },
37794 },
37795 },
37796 {
37797 name: "F32Ne",
37798 argLen: 2,
37799 asm: wasm.AF32Ne,
37800 reg: regInfo{
37801 inputs: []inputInfo{
37802 {0, 4294901760},
37803 {1, 4294901760},
37804 },
37805 outputs: []outputInfo{
37806 {0, 65535},
37807 },
37808 },
37809 },
37810 {
37811 name: "F32Lt",
37812 argLen: 2,
37813 asm: wasm.AF32Lt,
37814 reg: regInfo{
37815 inputs: []inputInfo{
37816 {0, 4294901760},
37817 {1, 4294901760},
37818 },
37819 outputs: []outputInfo{
37820 {0, 65535},
37821 },
37822 },
37823 },
37824 {
37825 name: "F32Gt",
37826 argLen: 2,
37827 asm: wasm.AF32Gt,
37828 reg: regInfo{
37829 inputs: []inputInfo{
37830 {0, 4294901760},
37831 {1, 4294901760},
37832 },
37833 outputs: []outputInfo{
37834 {0, 65535},
37835 },
37836 },
37837 },
37838 {
37839 name: "F32Le",
37840 argLen: 2,
37841 asm: wasm.AF32Le,
37842 reg: regInfo{
37843 inputs: []inputInfo{
37844 {0, 4294901760},
37845 {1, 4294901760},
37846 },
37847 outputs: []outputInfo{
37848 {0, 65535},
37849 },
37850 },
37851 },
37852 {
37853 name: "F32Ge",
37854 argLen: 2,
37855 asm: wasm.AF32Ge,
37856 reg: regInfo{
37857 inputs: []inputInfo{
37858 {0, 4294901760},
37859 {1, 4294901760},
37860 },
37861 outputs: []outputInfo{
37862 {0, 65535},
37863 },
37864 },
37865 },
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38775 },
38776 {
38777 name: "Sub64F",
38778 argLen: 2,
38779 generic: true,
38780 },
38781 {
38782 name: "Mul8",
38783 argLen: 2,
38784 commutative: true,
38785 generic: true,
38786 },
38787 {
38788 name: "Mul16",
38789 argLen: 2,
38790 commutative: true,
38791 generic: true,
38792 },
38793 {
38794 name: "Mul32",
38795 argLen: 2,
38796 commutative: true,
38797 generic: true,
38798 },
38799 {
38800 name: "Mul64",
38801 argLen: 2,
38802 commutative: true,
38803 generic: true,
38804 },
38805 {
38806 name: "Mul32F",
38807 argLen: 2,
38808 commutative: true,
38809 generic: true,
38810 },
38811 {
38812 name: "Mul64F",
38813 argLen: 2,
38814 commutative: true,
38815 generic: true,
38816 },
38817 {
38818 name: "Div32F",
38819 argLen: 2,
38820 generic: true,
38821 },
38822 {
38823 name: "Div64F",
38824 argLen: 2,
38825 generic: true,
38826 },
38827 {
38828 name: "Hmul32",
38829 argLen: 2,
38830 commutative: true,
38831 generic: true,
38832 },
38833 {
38834 name: "Hmul32u",
38835 argLen: 2,
38836 commutative: true,
38837 generic: true,
38838 },
38839 {
38840 name: "Hmul64",
38841 argLen: 2,
38842 commutative: true,
38843 generic: true,
38844 },
38845 {
38846 name: "Hmul64u",
38847 argLen: 2,
38848 commutative: true,
38849 generic: true,
38850 },
38851 {
38852 name: "Mul32uhilo",
38853 argLen: 2,
38854 commutative: true,
38855 generic: true,
38856 },
38857 {
38858 name: "Mul64uhilo",
38859 argLen: 2,
38860 commutative: true,
38861 generic: true,
38862 },
38863 {
38864 name: "Mul32uover",
38865 argLen: 2,
38866 commutative: true,
38867 generic: true,
38868 },
38869 {
38870 name: "Mul64uover",
38871 argLen: 2,
38872 commutative: true,
38873 generic: true,
38874 },
38875 {
38876 name: "Avg32u",
38877 argLen: 2,
38878 generic: true,
38879 },
38880 {
38881 name: "Avg64u",
38882 argLen: 2,
38883 generic: true,
38884 },
38885 {
38886 name: "Div8",
38887 argLen: 2,
38888 generic: true,
38889 },
38890 {
38891 name: "Div8u",
38892 argLen: 2,
38893 generic: true,
38894 },
38895 {
38896 name: "Div16",
38897 auxType: auxBool,
38898 argLen: 2,
38899 generic: true,
38900 },
38901 {
38902 name: "Div16u",
38903 argLen: 2,
38904 generic: true,
38905 },
38906 {
38907 name: "Div32",
38908 auxType: auxBool,
38909 argLen: 2,
38910 generic: true,
38911 },
38912 {
38913 name: "Div32u",
38914 argLen: 2,
38915 generic: true,
38916 },
38917 {
38918 name: "Div64",
38919 auxType: auxBool,
38920 argLen: 2,
38921 generic: true,
38922 },
38923 {
38924 name: "Div64u",
38925 argLen: 2,
38926 generic: true,
38927 },
38928 {
38929 name: "Div128u",
38930 argLen: 3,
38931 generic: true,
38932 },
38933 {
38934 name: "Mod8",
38935 argLen: 2,
38936 generic: true,
38937 },
38938 {
38939 name: "Mod8u",
38940 argLen: 2,
38941 generic: true,
38942 },
38943 {
38944 name: "Mod16",
38945 auxType: auxBool,
38946 argLen: 2,
38947 generic: true,
38948 },
38949 {
38950 name: "Mod16u",
38951 argLen: 2,
38952 generic: true,
38953 },
38954 {
38955 name: "Mod32",
38956 auxType: auxBool,
38957 argLen: 2,
38958 generic: true,
38959 },
38960 {
38961 name: "Mod32u",
38962 argLen: 2,
38963 generic: true,
38964 },
38965 {
38966 name: "Mod64",
38967 auxType: auxBool,
38968 argLen: 2,
38969 generic: true,
38970 },
38971 {
38972 name: "Mod64u",
38973 argLen: 2,
38974 generic: true,
38975 },
38976 {
38977 name: "And8",
38978 argLen: 2,
38979 commutative: true,
38980 generic: true,
38981 },
38982 {
38983 name: "And16",
38984 argLen: 2,
38985 commutative: true,
38986 generic: true,
38987 },
38988 {
38989 name: "And32",
38990 argLen: 2,
38991 commutative: true,
38992 generic: true,
38993 },
38994 {
38995 name: "And64",
38996 argLen: 2,
38997 commutative: true,
38998 generic: true,
38999 },
39000 {
39001 name: "Or8",
39002 argLen: 2,
39003 commutative: true,
39004 generic: true,
39005 },
39006 {
39007 name: "Or16",
39008 argLen: 2,
39009 commutative: true,
39010 generic: true,
39011 },
39012 {
39013 name: "Or32",
39014 argLen: 2,
39015 commutative: true,
39016 generic: true,
39017 },
39018 {
39019 name: "Or64",
39020 argLen: 2,
39021 commutative: true,
39022 generic: true,
39023 },
39024 {
39025 name: "Xor8",
39026 argLen: 2,
39027 commutative: true,
39028 generic: true,
39029 },
39030 {
39031 name: "Xor16",
39032 argLen: 2,
39033 commutative: true,
39034 generic: true,
39035 },
39036 {
39037 name: "Xor32",
39038 argLen: 2,
39039 commutative: true,
39040 generic: true,
39041 },
39042 {
39043 name: "Xor64",
39044 argLen: 2,
39045 commutative: true,
39046 generic: true,
39047 },
39048 {
39049 name: "Lsh8x8",
39050 auxType: auxBool,
39051 argLen: 2,
39052 generic: true,
39053 },
39054 {
39055 name: "Lsh8x16",
39056 auxType: auxBool,
39057 argLen: 2,
39058 generic: true,
39059 },
39060 {
39061 name: "Lsh8x32",
39062 auxType: auxBool,
39063 argLen: 2,
39064 generic: true,
39065 },
39066 {
39067 name: "Lsh8x64",
39068 auxType: auxBool,
39069 argLen: 2,
39070 generic: true,
39071 },
39072 {
39073 name: "Lsh16x8",
39074 auxType: auxBool,
39075 argLen: 2,
39076 generic: true,
39077 },
39078 {
39079 name: "Lsh16x16",
39080 auxType: auxBool,
39081 argLen: 2,
39082 generic: true,
39083 },
39084 {
39085 name: "Lsh16x32",
39086 auxType: auxBool,
39087 argLen: 2,
39088 generic: true,
39089 },
39090 {
39091 name: "Lsh16x64",
39092 auxType: auxBool,
39093 argLen: 2,
39094 generic: true,
39095 },
39096 {
39097 name: "Lsh32x8",
39098 auxType: auxBool,
39099 argLen: 2,
39100 generic: true,
39101 },
39102 {
39103 name: "Lsh32x16",
39104 auxType: auxBool,
39105 argLen: 2,
39106 generic: true,
39107 },
39108 {
39109 name: "Lsh32x32",
39110 auxType: auxBool,
39111 argLen: 2,
39112 generic: true,
39113 },
39114 {
39115 name: "Lsh32x64",
39116 auxType: auxBool,
39117 argLen: 2,
39118 generic: true,
39119 },
39120 {
39121 name: "Lsh64x8",
39122 auxType: auxBool,
39123 argLen: 2,
39124 generic: true,
39125 },
39126 {
39127 name: "Lsh64x16",
39128 auxType: auxBool,
39129 argLen: 2,
39130 generic: true,
39131 },
39132 {
39133 name: "Lsh64x32",
39134 auxType: auxBool,
39135 argLen: 2,
39136 generic: true,
39137 },
39138 {
39139 name: "Lsh64x64",
39140 auxType: auxBool,
39141 argLen: 2,
39142 generic: true,
39143 },
39144 {
39145 name: "Rsh8x8",
39146 auxType: auxBool,
39147 argLen: 2,
39148 generic: true,
39149 },
39150 {
39151 name: "Rsh8x16",
39152 auxType: auxBool,
39153 argLen: 2,
39154 generic: true,
39155 },
39156 {
39157 name: "Rsh8x32",
39158 auxType: auxBool,
39159 argLen: 2,
39160 generic: true,
39161 },
39162 {
39163 name: "Rsh8x64",
39164 auxType: auxBool,
39165 argLen: 2,
39166 generic: true,
39167 },
39168 {
39169 name: "Rsh16x8",
39170 auxType: auxBool,
39171 argLen: 2,
39172 generic: true,
39173 },
39174 {
39175 name: "Rsh16x16",
39176 auxType: auxBool,
39177 argLen: 2,
39178 generic: true,
39179 },
39180 {
39181 name: "Rsh16x32",
39182 auxType: auxBool,
39183 argLen: 2,
39184 generic: true,
39185 },
39186 {
39187 name: "Rsh16x64",
39188 auxType: auxBool,
39189 argLen: 2,
39190 generic: true,
39191 },
39192 {
39193 name: "Rsh32x8",
39194 auxType: auxBool,
39195 argLen: 2,
39196 generic: true,
39197 },
39198 {
39199 name: "Rsh32x16",
39200 auxType: auxBool,
39201 argLen: 2,
39202 generic: true,
39203 },
39204 {
39205 name: "Rsh32x32",
39206 auxType: auxBool,
39207 argLen: 2,
39208 generic: true,
39209 },
39210 {
39211 name: "Rsh32x64",
39212 auxType: auxBool,
39213 argLen: 2,
39214 generic: true,
39215 },
39216 {
39217 name: "Rsh64x8",
39218 auxType: auxBool,
39219 argLen: 2,
39220 generic: true,
39221 },
39222 {
39223 name: "Rsh64x16",
39224 auxType: auxBool,
39225 argLen: 2,
39226 generic: true,
39227 },
39228 {
39229 name: "Rsh64x32",
39230 auxType: auxBool,
39231 argLen: 2,
39232 generic: true,
39233 },
39234 {
39235 name: "Rsh64x64",
39236 auxType: auxBool,
39237 argLen: 2,
39238 generic: true,
39239 },
39240 {
39241 name: "Rsh8Ux8",
39242 auxType: auxBool,
39243 argLen: 2,
39244 generic: true,
39245 },
39246 {
39247 name: "Rsh8Ux16",
39248 auxType: auxBool,
39249 argLen: 2,
39250 generic: true,
39251 },
39252 {
39253 name: "Rsh8Ux32",
39254 auxType: auxBool,
39255 argLen: 2,
39256 generic: true,
39257 },
39258 {
39259 name: "Rsh8Ux64",
39260 auxType: auxBool,
39261 argLen: 2,
39262 generic: true,
39263 },
39264 {
39265 name: "Rsh16Ux8",
39266 auxType: auxBool,
39267 argLen: 2,
39268 generic: true,
39269 },
39270 {
39271 name: "Rsh16Ux16",
39272 auxType: auxBool,
39273 argLen: 2,
39274 generic: true,
39275 },
39276 {
39277 name: "Rsh16Ux32",
39278 auxType: auxBool,
39279 argLen: 2,
39280 generic: true,
39281 },
39282 {
39283 name: "Rsh16Ux64",
39284 auxType: auxBool,
39285 argLen: 2,
39286 generic: true,
39287 },
39288 {
39289 name: "Rsh32Ux8",
39290 auxType: auxBool,
39291 argLen: 2,
39292 generic: true,
39293 },
39294 {
39295 name: "Rsh32Ux16",
39296 auxType: auxBool,
39297 argLen: 2,
39298 generic: true,
39299 },
39300 {
39301 name: "Rsh32Ux32",
39302 auxType: auxBool,
39303 argLen: 2,
39304 generic: true,
39305 },
39306 {
39307 name: "Rsh32Ux64",
39308 auxType: auxBool,
39309 argLen: 2,
39310 generic: true,
39311 },
39312 {
39313 name: "Rsh64Ux8",
39314 auxType: auxBool,
39315 argLen: 2,
39316 generic: true,
39317 },
39318 {
39319 name: "Rsh64Ux16",
39320 auxType: auxBool,
39321 argLen: 2,
39322 generic: true,
39323 },
39324 {
39325 name: "Rsh64Ux32",
39326 auxType: auxBool,
39327 argLen: 2,
39328 generic: true,
39329 },
39330 {
39331 name: "Rsh64Ux64",
39332 auxType: auxBool,
39333 argLen: 2,
39334 generic: true,
39335 },
39336 {
39337 name: "Eq8",
39338 argLen: 2,
39339 commutative: true,
39340 generic: true,
39341 },
39342 {
39343 name: "Eq16",
39344 argLen: 2,
39345 commutative: true,
39346 generic: true,
39347 },
39348 {
39349 name: "Eq32",
39350 argLen: 2,
39351 commutative: true,
39352 generic: true,
39353 },
39354 {
39355 name: "Eq64",
39356 argLen: 2,
39357 commutative: true,
39358 generic: true,
39359 },
39360 {
39361 name: "EqPtr",
39362 argLen: 2,
39363 commutative: true,
39364 generic: true,
39365 },
39366 {
39367 name: "EqInter",
39368 argLen: 2,
39369 generic: true,
39370 },
39371 {
39372 name: "EqSlice",
39373 argLen: 2,
39374 generic: true,
39375 },
39376 {
39377 name: "Eq32F",
39378 argLen: 2,
39379 commutative: true,
39380 generic: true,
39381 },
39382 {
39383 name: "Eq64F",
39384 argLen: 2,
39385 commutative: true,
39386 generic: true,
39387 },
39388 {
39389 name: "Neq8",
39390 argLen: 2,
39391 commutative: true,
39392 generic: true,
39393 },
39394 {
39395 name: "Neq16",
39396 argLen: 2,
39397 commutative: true,
39398 generic: true,
39399 },
39400 {
39401 name: "Neq32",
39402 argLen: 2,
39403 commutative: true,
39404 generic: true,
39405 },
39406 {
39407 name: "Neq64",
39408 argLen: 2,
39409 commutative: true,
39410 generic: true,
39411 },
39412 {
39413 name: "NeqPtr",
39414 argLen: 2,
39415 commutative: true,
39416 generic: true,
39417 },
39418 {
39419 name: "NeqInter",
39420 argLen: 2,
39421 generic: true,
39422 },
39423 {
39424 name: "NeqSlice",
39425 argLen: 2,
39426 generic: true,
39427 },
39428 {
39429 name: "Neq32F",
39430 argLen: 2,
39431 commutative: true,
39432 generic: true,
39433 },
39434 {
39435 name: "Neq64F",
39436 argLen: 2,
39437 commutative: true,
39438 generic: true,
39439 },
39440 {
39441 name: "Less8",
39442 argLen: 2,
39443 generic: true,
39444 },
39445 {
39446 name: "Less8U",
39447 argLen: 2,
39448 generic: true,
39449 },
39450 {
39451 name: "Less16",
39452 argLen: 2,
39453 generic: true,
39454 },
39455 {
39456 name: "Less16U",
39457 argLen: 2,
39458 generic: true,
39459 },
39460 {
39461 name: "Less32",
39462 argLen: 2,
39463 generic: true,
39464 },
39465 {
39466 name: "Less32U",
39467 argLen: 2,
39468 generic: true,
39469 },
39470 {
39471 name: "Less64",
39472 argLen: 2,
39473 generic: true,
39474 },
39475 {
39476 name: "Less64U",
39477 argLen: 2,
39478 generic: true,
39479 },
39480 {
39481 name: "Less32F",
39482 argLen: 2,
39483 generic: true,
39484 },
39485 {
39486 name: "Less64F",
39487 argLen: 2,
39488 generic: true,
39489 },
39490 {
39491 name: "Leq8",
39492 argLen: 2,
39493 generic: true,
39494 },
39495 {
39496 name: "Leq8U",
39497 argLen: 2,
39498 generic: true,
39499 },
39500 {
39501 name: "Leq16",
39502 argLen: 2,
39503 generic: true,
39504 },
39505 {
39506 name: "Leq16U",
39507 argLen: 2,
39508 generic: true,
39509 },
39510 {
39511 name: "Leq32",
39512 argLen: 2,
39513 generic: true,
39514 },
39515 {
39516 name: "Leq32U",
39517 argLen: 2,
39518 generic: true,
39519 },
39520 {
39521 name: "Leq64",
39522 argLen: 2,
39523 generic: true,
39524 },
39525 {
39526 name: "Leq64U",
39527 argLen: 2,
39528 generic: true,
39529 },
39530 {
39531 name: "Leq32F",
39532 argLen: 2,
39533 generic: true,
39534 },
39535 {
39536 name: "Leq64F",
39537 argLen: 2,
39538 generic: true,
39539 },
39540 {
39541 name: "CondSelect",
39542 argLen: 3,
39543 generic: true,
39544 },
39545 {
39546 name: "AndB",
39547 argLen: 2,
39548 commutative: true,
39549 generic: true,
39550 },
39551 {
39552 name: "OrB",
39553 argLen: 2,
39554 commutative: true,
39555 generic: true,
39556 },
39557 {
39558 name: "EqB",
39559 argLen: 2,
39560 commutative: true,
39561 generic: true,
39562 },
39563 {
39564 name: "NeqB",
39565 argLen: 2,
39566 commutative: true,
39567 generic: true,
39568 },
39569 {
39570 name: "Not",
39571 argLen: 1,
39572 generic: true,
39573 },
39574 {
39575 name: "Neg8",
39576 argLen: 1,
39577 generic: true,
39578 },
39579 {
39580 name: "Neg16",
39581 argLen: 1,
39582 generic: true,
39583 },
39584 {
39585 name: "Neg32",
39586 argLen: 1,
39587 generic: true,
39588 },
39589 {
39590 name: "Neg64",
39591 argLen: 1,
39592 generic: true,
39593 },
39594 {
39595 name: "Neg32F",
39596 argLen: 1,
39597 generic: true,
39598 },
39599 {
39600 name: "Neg64F",
39601 argLen: 1,
39602 generic: true,
39603 },
39604 {
39605 name: "Com8",
39606 argLen: 1,
39607 generic: true,
39608 },
39609 {
39610 name: "Com16",
39611 argLen: 1,
39612 generic: true,
39613 },
39614 {
39615 name: "Com32",
39616 argLen: 1,
39617 generic: true,
39618 },
39619 {
39620 name: "Com64",
39621 argLen: 1,
39622 generic: true,
39623 },
39624 {
39625 name: "Ctz8",
39626 argLen: 1,
39627 generic: true,
39628 },
39629 {
39630 name: "Ctz16",
39631 argLen: 1,
39632 generic: true,
39633 },
39634 {
39635 name: "Ctz32",
39636 argLen: 1,
39637 generic: true,
39638 },
39639 {
39640 name: "Ctz64",
39641 argLen: 1,
39642 generic: true,
39643 },
39644 {
39645 name: "Ctz8NonZero",
39646 argLen: 1,
39647 generic: true,
39648 },
39649 {
39650 name: "Ctz16NonZero",
39651 argLen: 1,
39652 generic: true,
39653 },
39654 {
39655 name: "Ctz32NonZero",
39656 argLen: 1,
39657 generic: true,
39658 },
39659 {
39660 name: "Ctz64NonZero",
39661 argLen: 1,
39662 generic: true,
39663 },
39664 {
39665 name: "BitLen8",
39666 argLen: 1,
39667 generic: true,
39668 },
39669 {
39670 name: "BitLen16",
39671 argLen: 1,
39672 generic: true,
39673 },
39674 {
39675 name: "BitLen32",
39676 argLen: 1,
39677 generic: true,
39678 },
39679 {
39680 name: "BitLen64",
39681 argLen: 1,
39682 generic: true,
39683 },
39684 {
39685 name: "Bswap16",
39686 argLen: 1,
39687 generic: true,
39688 },
39689 {
39690 name: "Bswap32",
39691 argLen: 1,
39692 generic: true,
39693 },
39694 {
39695 name: "Bswap64",
39696 argLen: 1,
39697 generic: true,
39698 },
39699 {
39700 name: "BitRev8",
39701 argLen: 1,
39702 generic: true,
39703 },
39704 {
39705 name: "BitRev16",
39706 argLen: 1,
39707 generic: true,
39708 },
39709 {
39710 name: "BitRev32",
39711 argLen: 1,
39712 generic: true,
39713 },
39714 {
39715 name: "BitRev64",
39716 argLen: 1,
39717 generic: true,
39718 },
39719 {
39720 name: "PopCount8",
39721 argLen: 1,
39722 generic: true,
39723 },
39724 {
39725 name: "PopCount16",
39726 argLen: 1,
39727 generic: true,
39728 },
39729 {
39730 name: "PopCount32",
39731 argLen: 1,
39732 generic: true,
39733 },
39734 {
39735 name: "PopCount64",
39736 argLen: 1,
39737 generic: true,
39738 },
39739 {
39740 name: "RotateLeft64",
39741 argLen: 2,
39742 generic: true,
39743 },
39744 {
39745 name: "RotateLeft32",
39746 argLen: 2,
39747 generic: true,
39748 },
39749 {
39750 name: "RotateLeft16",
39751 argLen: 2,
39752 generic: true,
39753 },
39754 {
39755 name: "RotateLeft8",
39756 argLen: 2,
39757 generic: true,
39758 },
39759 {
39760 name: "Sqrt",
39761 argLen: 1,
39762 generic: true,
39763 },
39764 {
39765 name: "Sqrt32",
39766 argLen: 1,
39767 generic: true,
39768 },
39769 {
39770 name: "Floor",
39771 argLen: 1,
39772 generic: true,
39773 },
39774 {
39775 name: "Ceil",
39776 argLen: 1,
39777 generic: true,
39778 },
39779 {
39780 name: "Trunc",
39781 argLen: 1,
39782 generic: true,
39783 },
39784 {
39785 name: "Round",
39786 argLen: 1,
39787 generic: true,
39788 },
39789 {
39790 name: "RoundToEven",
39791 argLen: 1,
39792 generic: true,
39793 },
39794 {
39795 name: "Abs",
39796 argLen: 1,
39797 generic: true,
39798 },
39799 {
39800 name: "Copysign",
39801 argLen: 2,
39802 generic: true,
39803 },
39804 {
39805 name: "Min64F",
39806 argLen: 2,
39807 generic: true,
39808 },
39809 {
39810 name: "Min32F",
39811 argLen: 2,
39812 generic: true,
39813 },
39814 {
39815 name: "Max64F",
39816 argLen: 2,
39817 generic: true,
39818 },
39819 {
39820 name: "Max32F",
39821 argLen: 2,
39822 generic: true,
39823 },
39824 {
39825 name: "FMA",
39826 argLen: 3,
39827 generic: true,
39828 },
39829 {
39830 name: "Phi",
39831 argLen: -1,
39832 zeroWidth: true,
39833 generic: true,
39834 },
39835 {
39836 name: "Copy",
39837 argLen: 1,
39838 generic: true,
39839 },
39840 {
39841 name: "Convert",
39842 argLen: 2,
39843 resultInArg0: true,
39844 zeroWidth: true,
39845 generic: true,
39846 },
39847 {
39848 name: "ConstBool",
39849 auxType: auxBool,
39850 argLen: 0,
39851 generic: true,
39852 },
39853 {
39854 name: "ConstString",
39855 auxType: auxString,
39856 argLen: 0,
39857 generic: true,
39858 },
39859 {
39860 name: "ConstNil",
39861 argLen: 0,
39862 generic: true,
39863 },
39864 {
39865 name: "Const8",
39866 auxType: auxInt8,
39867 argLen: 0,
39868 generic: true,
39869 },
39870 {
39871 name: "Const16",
39872 auxType: auxInt16,
39873 argLen: 0,
39874 generic: true,
39875 },
39876 {
39877 name: "Const32",
39878 auxType: auxInt32,
39879 argLen: 0,
39880 generic: true,
39881 },
39882 {
39883 name: "Const64",
39884 auxType: auxInt64,
39885 argLen: 0,
39886 generic: true,
39887 },
39888 {
39889 name: "Const32F",
39890 auxType: auxFloat32,
39891 argLen: 0,
39892 generic: true,
39893 },
39894 {
39895 name: "Const64F",
39896 auxType: auxFloat64,
39897 argLen: 0,
39898 generic: true,
39899 },
39900 {
39901 name: "ConstInterface",
39902 argLen: 0,
39903 generic: true,
39904 },
39905 {
39906 name: "ConstSlice",
39907 argLen: 0,
39908 generic: true,
39909 },
39910 {
39911 name: "InitMem",
39912 argLen: 0,
39913 zeroWidth: true,
39914 generic: true,
39915 },
39916 {
39917 name: "Arg",
39918 auxType: auxSymOff,
39919 argLen: 0,
39920 zeroWidth: true,
39921 symEffect: SymRead,
39922 generic: true,
39923 },
39924 {
39925 name: "ArgIntReg",
39926 auxType: auxNameOffsetInt8,
39927 argLen: 0,
39928 zeroWidth: true,
39929 generic: true,
39930 },
39931 {
39932 name: "ArgFloatReg",
39933 auxType: auxNameOffsetInt8,
39934 argLen: 0,
39935 zeroWidth: true,
39936 generic: true,
39937 },
39938 {
39939 name: "Addr",
39940 auxType: auxSym,
39941 argLen: 1,
39942 symEffect: SymAddr,
39943 generic: true,
39944 },
39945 {
39946 name: "LocalAddr",
39947 auxType: auxSym,
39948 argLen: 2,
39949 symEffect: SymAddr,
39950 generic: true,
39951 },
39952 {
39953 name: "SP",
39954 argLen: 0,
39955 zeroWidth: true,
39956 generic: true,
39957 },
39958 {
39959 name: "SB",
39960 argLen: 0,
39961 zeroWidth: true,
39962 generic: true,
39963 },
39964 {
39965 name: "SPanchored",
39966 argLen: 2,
39967 zeroWidth: true,
39968 generic: true,
39969 },
39970 {
39971 name: "Load",
39972 argLen: 2,
39973 generic: true,
39974 },
39975 {
39976 name: "Dereference",
39977 argLen: 2,
39978 generic: true,
39979 },
39980 {
39981 name: "Store",
39982 auxType: auxTyp,
39983 argLen: 3,
39984 generic: true,
39985 },
39986 {
39987 name: "Move",
39988 auxType: auxTypSize,
39989 argLen: 3,
39990 generic: true,
39991 },
39992 {
39993 name: "Zero",
39994 auxType: auxTypSize,
39995 argLen: 2,
39996 generic: true,
39997 },
39998 {
39999 name: "StoreWB",
40000 auxType: auxTyp,
40001 argLen: 3,
40002 generic: true,
40003 },
40004 {
40005 name: "MoveWB",
40006 auxType: auxTypSize,
40007 argLen: 3,
40008 generic: true,
40009 },
40010 {
40011 name: "ZeroWB",
40012 auxType: auxTypSize,
40013 argLen: 2,
40014 generic: true,
40015 },
40016 {
40017 name: "WBend",
40018 argLen: 1,
40019 generic: true,
40020 },
40021 {
40022 name: "WB",
40023 auxType: auxInt64,
40024 argLen: 1,
40025 generic: true,
40026 },
40027 {
40028 name: "HasCPUFeature",
40029 auxType: auxSym,
40030 argLen: 0,
40031 symEffect: SymNone,
40032 generic: true,
40033 },
40034 {
40035 name: "PanicBounds",
40036 auxType: auxInt64,
40037 argLen: 3,
40038 call: true,
40039 generic: true,
40040 },
40041 {
40042 name: "PanicExtend",
40043 auxType: auxInt64,
40044 argLen: 4,
40045 call: true,
40046 generic: true,
40047 },
40048 {
40049 name: "ClosureCall",
40050 auxType: auxCallOff,
40051 argLen: -1,
40052 call: true,
40053 generic: true,
40054 },
40055 {
40056 name: "StaticCall",
40057 auxType: auxCallOff,
40058 argLen: -1,
40059 call: true,
40060 generic: true,
40061 },
40062 {
40063 name: "InterCall",
40064 auxType: auxCallOff,
40065 argLen: -1,
40066 call: true,
40067 generic: true,
40068 },
40069 {
40070 name: "TailCall",
40071 auxType: auxCallOff,
40072 argLen: -1,
40073 call: true,
40074 generic: true,
40075 },
40076 {
40077 name: "ClosureLECall",
40078 auxType: auxCallOff,
40079 argLen: -1,
40080 call: true,
40081 generic: true,
40082 },
40083 {
40084 name: "StaticLECall",
40085 auxType: auxCallOff,
40086 argLen: -1,
40087 call: true,
40088 generic: true,
40089 },
40090 {
40091 name: "InterLECall",
40092 auxType: auxCallOff,
40093 argLen: -1,
40094 call: true,
40095 generic: true,
40096 },
40097 {
40098 name: "TailLECall",
40099 auxType: auxCallOff,
40100 argLen: -1,
40101 call: true,
40102 generic: true,
40103 },
40104 {
40105 name: "SignExt8to16",
40106 argLen: 1,
40107 generic: true,
40108 },
40109 {
40110 name: "SignExt8to32",
40111 argLen: 1,
40112 generic: true,
40113 },
40114 {
40115 name: "SignExt8to64",
40116 argLen: 1,
40117 generic: true,
40118 },
40119 {
40120 name: "SignExt16to32",
40121 argLen: 1,
40122 generic: true,
40123 },
40124 {
40125 name: "SignExt16to64",
40126 argLen: 1,
40127 generic: true,
40128 },
40129 {
40130 name: "SignExt32to64",
40131 argLen: 1,
40132 generic: true,
40133 },
40134 {
40135 name: "ZeroExt8to16",
40136 argLen: 1,
40137 generic: true,
40138 },
40139 {
40140 name: "ZeroExt8to32",
40141 argLen: 1,
40142 generic: true,
40143 },
40144 {
40145 name: "ZeroExt8to64",
40146 argLen: 1,
40147 generic: true,
40148 },
40149 {
40150 name: "ZeroExt16to32",
40151 argLen: 1,
40152 generic: true,
40153 },
40154 {
40155 name: "ZeroExt16to64",
40156 argLen: 1,
40157 generic: true,
40158 },
40159 {
40160 name: "ZeroExt32to64",
40161 argLen: 1,
40162 generic: true,
40163 },
40164 {
40165 name: "Trunc16to8",
40166 argLen: 1,
40167 generic: true,
40168 },
40169 {
40170 name: "Trunc32to8",
40171 argLen: 1,
40172 generic: true,
40173 },
40174 {
40175 name: "Trunc32to16",
40176 argLen: 1,
40177 generic: true,
40178 },
40179 {
40180 name: "Trunc64to8",
40181 argLen: 1,
40182 generic: true,
40183 },
40184 {
40185 name: "Trunc64to16",
40186 argLen: 1,
40187 generic: true,
40188 },
40189 {
40190 name: "Trunc64to32",
40191 argLen: 1,
40192 generic: true,
40193 },
40194 {
40195 name: "Cvt32to32F",
40196 argLen: 1,
40197 generic: true,
40198 },
40199 {
40200 name: "Cvt32to64F",
40201 argLen: 1,
40202 generic: true,
40203 },
40204 {
40205 name: "Cvt64to32F",
40206 argLen: 1,
40207 generic: true,
40208 },
40209 {
40210 name: "Cvt64to64F",
40211 argLen: 1,
40212 generic: true,
40213 },
40214 {
40215 name: "Cvt32Fto32",
40216 argLen: 1,
40217 generic: true,
40218 },
40219 {
40220 name: "Cvt32Fto64",
40221 argLen: 1,
40222 generic: true,
40223 },
40224 {
40225 name: "Cvt64Fto32",
40226 argLen: 1,
40227 generic: true,
40228 },
40229 {
40230 name: "Cvt64Fto64",
40231 argLen: 1,
40232 generic: true,
40233 },
40234 {
40235 name: "Cvt32Fto64F",
40236 argLen: 1,
40237 generic: true,
40238 },
40239 {
40240 name: "Cvt64Fto32F",
40241 argLen: 1,
40242 generic: true,
40243 },
40244 {
40245 name: "CvtBoolToUint8",
40246 argLen: 1,
40247 generic: true,
40248 },
40249 {
40250 name: "Round32F",
40251 argLen: 1,
40252 generic: true,
40253 },
40254 {
40255 name: "Round64F",
40256 argLen: 1,
40257 generic: true,
40258 },
40259 {
40260 name: "IsNonNil",
40261 argLen: 1,
40262 generic: true,
40263 },
40264 {
40265 name: "IsInBounds",
40266 argLen: 2,
40267 generic: true,
40268 },
40269 {
40270 name: "IsSliceInBounds",
40271 argLen: 2,
40272 generic: true,
40273 },
40274 {
40275 name: "NilCheck",
40276 argLen: 2,
40277 nilCheck: true,
40278 generic: true,
40279 },
40280 {
40281 name: "GetG",
40282 argLen: 1,
40283 zeroWidth: true,
40284 generic: true,
40285 },
40286 {
40287 name: "GetClosurePtr",
40288 argLen: 0,
40289 generic: true,
40290 },
40291 {
40292 name: "GetCallerPC",
40293 argLen: 0,
40294 generic: true,
40295 },
40296 {
40297 name: "GetCallerSP",
40298 argLen: 1,
40299 generic: true,
40300 },
40301 {
40302 name: "PtrIndex",
40303 argLen: 2,
40304 generic: true,
40305 },
40306 {
40307 name: "OffPtr",
40308 auxType: auxInt64,
40309 argLen: 1,
40310 generic: true,
40311 },
40312 {
40313 name: "SliceMake",
40314 argLen: 3,
40315 generic: true,
40316 },
40317 {
40318 name: "SlicePtr",
40319 argLen: 1,
40320 generic: true,
40321 },
40322 {
40323 name: "SliceLen",
40324 argLen: 1,
40325 generic: true,
40326 },
40327 {
40328 name: "SliceCap",
40329 argLen: 1,
40330 generic: true,
40331 },
40332 {
40333 name: "SlicePtrUnchecked",
40334 argLen: 1,
40335 generic: true,
40336 },
40337 {
40338 name: "ComplexMake",
40339 argLen: 2,
40340 generic: true,
40341 },
40342 {
40343 name: "ComplexReal",
40344 argLen: 1,
40345 generic: true,
40346 },
40347 {
40348 name: "ComplexImag",
40349 argLen: 1,
40350 generic: true,
40351 },
40352 {
40353 name: "StringMake",
40354 argLen: 2,
40355 generic: true,
40356 },
40357 {
40358 name: "StringPtr",
40359 argLen: 1,
40360 generic: true,
40361 },
40362 {
40363 name: "StringLen",
40364 argLen: 1,
40365 generic: true,
40366 },
40367 {
40368 name: "IMake",
40369 argLen: 2,
40370 generic: true,
40371 },
40372 {
40373 name: "ITab",
40374 argLen: 1,
40375 generic: true,
40376 },
40377 {
40378 name: "IData",
40379 argLen: 1,
40380 generic: true,
40381 },
40382 {
40383 name: "StructMake0",
40384 argLen: 0,
40385 generic: true,
40386 },
40387 {
40388 name: "StructMake1",
40389 argLen: 1,
40390 generic: true,
40391 },
40392 {
40393 name: "StructMake2",
40394 argLen: 2,
40395 generic: true,
40396 },
40397 {
40398 name: "StructMake3",
40399 argLen: 3,
40400 generic: true,
40401 },
40402 {
40403 name: "StructMake4",
40404 argLen: 4,
40405 generic: true,
40406 },
40407 {
40408 name: "StructSelect",
40409 auxType: auxInt64,
40410 argLen: 1,
40411 generic: true,
40412 },
40413 {
40414 name: "ArrayMake0",
40415 argLen: 0,
40416 generic: true,
40417 },
40418 {
40419 name: "ArrayMake1",
40420 argLen: 1,
40421 generic: true,
40422 },
40423 {
40424 name: "ArraySelect",
40425 auxType: auxInt64,
40426 argLen: 1,
40427 generic: true,
40428 },
40429 {
40430 name: "StoreReg",
40431 argLen: 1,
40432 generic: true,
40433 },
40434 {
40435 name: "LoadReg",
40436 argLen: 1,
40437 generic: true,
40438 },
40439 {
40440 name: "FwdRef",
40441 auxType: auxSym,
40442 argLen: 0,
40443 symEffect: SymNone,
40444 generic: true,
40445 },
40446 {
40447 name: "Unknown",
40448 argLen: 0,
40449 generic: true,
40450 },
40451 {
40452 name: "VarDef",
40453 auxType: auxSym,
40454 argLen: 1,
40455 zeroWidth: true,
40456 symEffect: SymNone,
40457 generic: true,
40458 },
40459 {
40460 name: "VarLive",
40461 auxType: auxSym,
40462 argLen: 1,
40463 zeroWidth: true,
40464 symEffect: SymRead,
40465 generic: true,
40466 },
40467 {
40468 name: "KeepAlive",
40469 argLen: 2,
40470 zeroWidth: true,
40471 generic: true,
40472 },
40473 {
40474 name: "InlMark",
40475 auxType: auxInt32,
40476 argLen: 1,
40477 generic: true,
40478 },
40479 {
40480 name: "Int64Make",
40481 argLen: 2,
40482 generic: true,
40483 },
40484 {
40485 name: "Int64Hi",
40486 argLen: 1,
40487 generic: true,
40488 },
40489 {
40490 name: "Int64Lo",
40491 argLen: 1,
40492 generic: true,
40493 },
40494 {
40495 name: "Add32carry",
40496 argLen: 2,
40497 commutative: true,
40498 generic: true,
40499 },
40500 {
40501 name: "Add32withcarry",
40502 argLen: 3,
40503 commutative: true,
40504 generic: true,
40505 },
40506 {
40507 name: "Sub32carry",
40508 argLen: 2,
40509 generic: true,
40510 },
40511 {
40512 name: "Sub32withcarry",
40513 argLen: 3,
40514 generic: true,
40515 },
40516 {
40517 name: "Add64carry",
40518 argLen: 3,
40519 commutative: true,
40520 generic: true,
40521 },
40522 {
40523 name: "Sub64borrow",
40524 argLen: 3,
40525 generic: true,
40526 },
40527 {
40528 name: "Signmask",
40529 argLen: 1,
40530 generic: true,
40531 },
40532 {
40533 name: "Zeromask",
40534 argLen: 1,
40535 generic: true,
40536 },
40537 {
40538 name: "Slicemask",
40539 argLen: 1,
40540 generic: true,
40541 },
40542 {
40543 name: "SpectreIndex",
40544 argLen: 2,
40545 generic: true,
40546 },
40547 {
40548 name: "SpectreSliceIndex",
40549 argLen: 2,
40550 generic: true,
40551 },
40552 {
40553 name: "Cvt32Uto32F",
40554 argLen: 1,
40555 generic: true,
40556 },
40557 {
40558 name: "Cvt32Uto64F",
40559 argLen: 1,
40560 generic: true,
40561 },
40562 {
40563 name: "Cvt32Fto32U",
40564 argLen: 1,
40565 generic: true,
40566 },
40567 {
40568 name: "Cvt64Fto32U",
40569 argLen: 1,
40570 generic: true,
40571 },
40572 {
40573 name: "Cvt64Uto32F",
40574 argLen: 1,
40575 generic: true,
40576 },
40577 {
40578 name: "Cvt64Uto64F",
40579 argLen: 1,
40580 generic: true,
40581 },
40582 {
40583 name: "Cvt32Fto64U",
40584 argLen: 1,
40585 generic: true,
40586 },
40587 {
40588 name: "Cvt64Fto64U",
40589 argLen: 1,
40590 generic: true,
40591 },
40592 {
40593 name: "Select0",
40594 argLen: 1,
40595 zeroWidth: true,
40596 generic: true,
40597 },
40598 {
40599 name: "Select1",
40600 argLen: 1,
40601 zeroWidth: true,
40602 generic: true,
40603 },
40604 {
40605 name: "SelectN",
40606 auxType: auxInt64,
40607 argLen: 1,
40608 generic: true,
40609 },
40610 {
40611 name: "SelectNAddr",
40612 auxType: auxInt64,
40613 argLen: 1,
40614 generic: true,
40615 },
40616 {
40617 name: "MakeResult",
40618 argLen: -1,
40619 generic: true,
40620 },
40621 {
40622 name: "AtomicLoad8",
40623 argLen: 2,
40624 generic: true,
40625 },
40626 {
40627 name: "AtomicLoad32",
40628 argLen: 2,
40629 generic: true,
40630 },
40631 {
40632 name: "AtomicLoad64",
40633 argLen: 2,
40634 generic: true,
40635 },
40636 {
40637 name: "AtomicLoadPtr",
40638 argLen: 2,
40639 generic: true,
40640 },
40641 {
40642 name: "AtomicLoadAcq32",
40643 argLen: 2,
40644 generic: true,
40645 },
40646 {
40647 name: "AtomicLoadAcq64",
40648 argLen: 2,
40649 generic: true,
40650 },
40651 {
40652 name: "AtomicStore8",
40653 argLen: 3,
40654 hasSideEffects: true,
40655 generic: true,
40656 },
40657 {
40658 name: "AtomicStore32",
40659 argLen: 3,
40660 hasSideEffects: true,
40661 generic: true,
40662 },
40663 {
40664 name: "AtomicStore64",
40665 argLen: 3,
40666 hasSideEffects: true,
40667 generic: true,
40668 },
40669 {
40670 name: "AtomicStorePtrNoWB",
40671 argLen: 3,
40672 hasSideEffects: true,
40673 generic: true,
40674 },
40675 {
40676 name: "AtomicStoreRel32",
40677 argLen: 3,
40678 hasSideEffects: true,
40679 generic: true,
40680 },
40681 {
40682 name: "AtomicStoreRel64",
40683 argLen: 3,
40684 hasSideEffects: true,
40685 generic: true,
40686 },
40687 {
40688 name: "AtomicExchange32",
40689 argLen: 3,
40690 hasSideEffects: true,
40691 generic: true,
40692 },
40693 {
40694 name: "AtomicExchange64",
40695 argLen: 3,
40696 hasSideEffects: true,
40697 generic: true,
40698 },
40699 {
40700 name: "AtomicAdd32",
40701 argLen: 3,
40702 hasSideEffects: true,
40703 generic: true,
40704 },
40705 {
40706 name: "AtomicAdd64",
40707 argLen: 3,
40708 hasSideEffects: true,
40709 generic: true,
40710 },
40711 {
40712 name: "AtomicCompareAndSwap32",
40713 argLen: 4,
40714 hasSideEffects: true,
40715 generic: true,
40716 },
40717 {
40718 name: "AtomicCompareAndSwap64",
40719 argLen: 4,
40720 hasSideEffects: true,
40721 generic: true,
40722 },
40723 {
40724 name: "AtomicCompareAndSwapRel32",
40725 argLen: 4,
40726 hasSideEffects: true,
40727 generic: true,
40728 },
40729 {
40730 name: "AtomicAnd8",
40731 argLen: 3,
40732 hasSideEffects: true,
40733 generic: true,
40734 },
40735 {
40736 name: "AtomicOr8",
40737 argLen: 3,
40738 hasSideEffects: true,
40739 generic: true,
40740 },
40741 {
40742 name: "AtomicAnd64",
40743 argLen: 3,
40744 hasSideEffects: true,
40745 generic: true,
40746 },
40747 {
40748 name: "AtomicAnd32",
40749 argLen: 3,
40750 hasSideEffects: true,
40751 generic: true,
40752 },
40753 {
40754 name: "AtomicOr64",
40755 argLen: 3,
40756 hasSideEffects: true,
40757 generic: true,
40758 },
40759 {
40760 name: "AtomicOr32",
40761 argLen: 3,
40762 hasSideEffects: true,
40763 generic: true,
40764 },
40765 {
40766 name: "AtomicAdd32Variant",
40767 argLen: 3,
40768 hasSideEffects: true,
40769 generic: true,
40770 },
40771 {
40772 name: "AtomicAdd64Variant",
40773 argLen: 3,
40774 hasSideEffects: true,
40775 generic: true,
40776 },
40777 {
40778 name: "AtomicExchange32Variant",
40779 argLen: 3,
40780 hasSideEffects: true,
40781 generic: true,
40782 },
40783 {
40784 name: "AtomicExchange64Variant",
40785 argLen: 3,
40786 hasSideEffects: true,
40787 generic: true,
40788 },
40789 {
40790 name: "AtomicCompareAndSwap32Variant",
40791 argLen: 4,
40792 hasSideEffects: true,
40793 generic: true,
40794 },
40795 {
40796 name: "AtomicCompareAndSwap64Variant",
40797 argLen: 4,
40798 hasSideEffects: true,
40799 generic: true,
40800 },
40801 {
40802 name: "AtomicAnd8Variant",
40803 argLen: 3,
40804 hasSideEffects: true,
40805 generic: true,
40806 },
40807 {
40808 name: "AtomicOr8Variant",
40809 argLen: 3,
40810 hasSideEffects: true,
40811 generic: true,
40812 },
40813 {
40814 name: "AtomicAnd64Variant",
40815 argLen: 3,
40816 hasSideEffects: true,
40817 generic: true,
40818 },
40819 {
40820 name: "AtomicOr64Variant",
40821 argLen: 3,
40822 hasSideEffects: true,
40823 generic: true,
40824 },
40825 {
40826 name: "AtomicAnd32Variant",
40827 argLen: 3,
40828 hasSideEffects: true,
40829 generic: true,
40830 },
40831 {
40832 name: "AtomicOr32Variant",
40833 argLen: 3,
40834 hasSideEffects: true,
40835 generic: true,
40836 },
40837 {
40838 name: "PubBarrier",
40839 argLen: 1,
40840 hasSideEffects: true,
40841 generic: true,
40842 },
40843 {
40844 name: "Clobber",
40845 auxType: auxSymOff,
40846 argLen: 0,
40847 symEffect: SymNone,
40848 generic: true,
40849 },
40850 {
40851 name: "ClobberReg",
40852 argLen: 0,
40853 generic: true,
40854 },
40855 {
40856 name: "PrefetchCache",
40857 argLen: 2,
40858 hasSideEffects: true,
40859 generic: true,
40860 },
40861 {
40862 name: "PrefetchCacheStreamed",
40863 argLen: 2,
40864 hasSideEffects: true,
40865 generic: true,
40866 },
40867 }
40868
40869 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
40870 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
40871 func (o Op) String() string { return opcodeTable[o].name }
40872 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
40873 func (o Op) IsCall() bool { return opcodeTable[o].call }
40874 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
40875 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
40876 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
40877 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
40878
40879 var registers386 = [...]Register{
40880 {0, x86.REG_AX, 0, "AX"},
40881 {1, x86.REG_CX, 1, "CX"},
40882 {2, x86.REG_DX, 2, "DX"},
40883 {3, x86.REG_BX, 3, "BX"},
40884 {4, x86.REGSP, -1, "SP"},
40885 {5, x86.REG_BP, 4, "BP"},
40886 {6, x86.REG_SI, 5, "SI"},
40887 {7, x86.REG_DI, 6, "DI"},
40888 {8, x86.REG_X0, -1, "X0"},
40889 {9, x86.REG_X1, -1, "X1"},
40890 {10, x86.REG_X2, -1, "X2"},
40891 {11, x86.REG_X3, -1, "X3"},
40892 {12, x86.REG_X4, -1, "X4"},
40893 {13, x86.REG_X5, -1, "X5"},
40894 {14, x86.REG_X6, -1, "X6"},
40895 {15, x86.REG_X7, -1, "X7"},
40896 {16, 0, -1, "SB"},
40897 }
40898 var paramIntReg386 = []int8(nil)
40899 var paramFloatReg386 = []int8(nil)
40900 var gpRegMask386 = regMask(239)
40901 var fpRegMask386 = regMask(65280)
40902 var specialRegMask386 = regMask(0)
40903 var framepointerReg386 = int8(5)
40904 var linkReg386 = int8(-1)
40905 var registersAMD64 = [...]Register{
40906 {0, x86.REG_AX, 0, "AX"},
40907 {1, x86.REG_CX, 1, "CX"},
40908 {2, x86.REG_DX, 2, "DX"},
40909 {3, x86.REG_BX, 3, "BX"},
40910 {4, x86.REGSP, -1, "SP"},
40911 {5, x86.REG_BP, 4, "BP"},
40912 {6, x86.REG_SI, 5, "SI"},
40913 {7, x86.REG_DI, 6, "DI"},
40914 {8, x86.REG_R8, 7, "R8"},
40915 {9, x86.REG_R9, 8, "R9"},
40916 {10, x86.REG_R10, 9, "R10"},
40917 {11, x86.REG_R11, 10, "R11"},
40918 {12, x86.REG_R12, 11, "R12"},
40919 {13, x86.REG_R13, 12, "R13"},
40920 {14, x86.REGG, -1, "g"},
40921 {15, x86.REG_R15, 13, "R15"},
40922 {16, x86.REG_X0, -1, "X0"},
40923 {17, x86.REG_X1, -1, "X1"},
40924 {18, x86.REG_X2, -1, "X2"},
40925 {19, x86.REG_X3, -1, "X3"},
40926 {20, x86.REG_X4, -1, "X4"},
40927 {21, x86.REG_X5, -1, "X5"},
40928 {22, x86.REG_X6, -1, "X6"},
40929 {23, x86.REG_X7, -1, "X7"},
40930 {24, x86.REG_X8, -1, "X8"},
40931 {25, x86.REG_X9, -1, "X9"},
40932 {26, x86.REG_X10, -1, "X10"},
40933 {27, x86.REG_X11, -1, "X11"},
40934 {28, x86.REG_X12, -1, "X12"},
40935 {29, x86.REG_X13, -1, "X13"},
40936 {30, x86.REG_X14, -1, "X14"},
40937 {31, x86.REG_X15, -1, "X15"},
40938 {32, 0, -1, "SB"},
40939 }
40940 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
40941 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
40942 var gpRegMaskAMD64 = regMask(49135)
40943 var fpRegMaskAMD64 = regMask(2147418112)
40944 var specialRegMaskAMD64 = regMask(2147483648)
40945 var framepointerRegAMD64 = int8(5)
40946 var linkRegAMD64 = int8(-1)
40947 var registersARM = [...]Register{
40948 {0, arm.REG_R0, 0, "R0"},
40949 {1, arm.REG_R1, 1, "R1"},
40950 {2, arm.REG_R2, 2, "R2"},
40951 {3, arm.REG_R3, 3, "R3"},
40952 {4, arm.REG_R4, 4, "R4"},
40953 {5, arm.REG_R5, 5, "R5"},
40954 {6, arm.REG_R6, 6, "R6"},
40955 {7, arm.REG_R7, 7, "R7"},
40956 {8, arm.REG_R8, 8, "R8"},
40957 {9, arm.REG_R9, 9, "R9"},
40958 {10, arm.REGG, -1, "g"},
40959 {11, arm.REG_R11, -1, "R11"},
40960 {12, arm.REG_R12, 10, "R12"},
40961 {13, arm.REGSP, -1, "SP"},
40962 {14, arm.REG_R14, 11, "R14"},
40963 {15, arm.REG_R15, -1, "R15"},
40964 {16, arm.REG_F0, -1, "F0"},
40965 {17, arm.REG_F1, -1, "F1"},
40966 {18, arm.REG_F2, -1, "F2"},
40967 {19, arm.REG_F3, -1, "F3"},
40968 {20, arm.REG_F4, -1, "F4"},
40969 {21, arm.REG_F5, -1, "F5"},
40970 {22, arm.REG_F6, -1, "F6"},
40971 {23, arm.REG_F7, -1, "F7"},
40972 {24, arm.REG_F8, -1, "F8"},
40973 {25, arm.REG_F9, -1, "F9"},
40974 {26, arm.REG_F10, -1, "F10"},
40975 {27, arm.REG_F11, -1, "F11"},
40976 {28, arm.REG_F12, -1, "F12"},
40977 {29, arm.REG_F13, -1, "F13"},
40978 {30, arm.REG_F14, -1, "F14"},
40979 {31, arm.REG_F15, -1, "F15"},
40980 {32, 0, -1, "SB"},
40981 }
40982 var paramIntRegARM = []int8(nil)
40983 var paramFloatRegARM = []int8(nil)
40984 var gpRegMaskARM = regMask(21503)
40985 var fpRegMaskARM = regMask(4294901760)
40986 var specialRegMaskARM = regMask(0)
40987 var framepointerRegARM = int8(-1)
40988 var linkRegARM = int8(14)
40989 var registersARM64 = [...]Register{
40990 {0, arm64.REG_R0, 0, "R0"},
40991 {1, arm64.REG_R1, 1, "R1"},
40992 {2, arm64.REG_R2, 2, "R2"},
40993 {3, arm64.REG_R3, 3, "R3"},
40994 {4, arm64.REG_R4, 4, "R4"},
40995 {5, arm64.REG_R5, 5, "R5"},
40996 {6, arm64.REG_R6, 6, "R6"},
40997 {7, arm64.REG_R7, 7, "R7"},
40998 {8, arm64.REG_R8, 8, "R8"},
40999 {9, arm64.REG_R9, 9, "R9"},
41000 {10, arm64.REG_R10, 10, "R10"},
41001 {11, arm64.REG_R11, 11, "R11"},
41002 {12, arm64.REG_R12, 12, "R12"},
41003 {13, arm64.REG_R13, 13, "R13"},
41004 {14, arm64.REG_R14, 14, "R14"},
41005 {15, arm64.REG_R15, 15, "R15"},
41006 {16, arm64.REG_R16, 16, "R16"},
41007 {17, arm64.REG_R17, 17, "R17"},
41008 {18, arm64.REG_R18, -1, "R18"},
41009 {19, arm64.REG_R19, 18, "R19"},
41010 {20, arm64.REG_R20, 19, "R20"},
41011 {21, arm64.REG_R21, 20, "R21"},
41012 {22, arm64.REG_R22, 21, "R22"},
41013 {23, arm64.REG_R23, 22, "R23"},
41014 {24, arm64.REG_R24, 23, "R24"},
41015 {25, arm64.REG_R25, 24, "R25"},
41016 {26, arm64.REG_R26, 25, "R26"},
41017 {27, arm64.REGG, -1, "g"},
41018 {28, arm64.REG_R29, -1, "R29"},
41019 {29, arm64.REG_R30, 26, "R30"},
41020 {30, arm64.REGSP, -1, "SP"},
41021 {31, arm64.REG_F0, -1, "F0"},
41022 {32, arm64.REG_F1, -1, "F1"},
41023 {33, arm64.REG_F2, -1, "F2"},
41024 {34, arm64.REG_F3, -1, "F3"},
41025 {35, arm64.REG_F4, -1, "F4"},
41026 {36, arm64.REG_F5, -1, "F5"},
41027 {37, arm64.REG_F6, -1, "F6"},
41028 {38, arm64.REG_F7, -1, "F7"},
41029 {39, arm64.REG_F8, -1, "F8"},
41030 {40, arm64.REG_F9, -1, "F9"},
41031 {41, arm64.REG_F10, -1, "F10"},
41032 {42, arm64.REG_F11, -1, "F11"},
41033 {43, arm64.REG_F12, -1, "F12"},
41034 {44, arm64.REG_F13, -1, "F13"},
41035 {45, arm64.REG_F14, -1, "F14"},
41036 {46, arm64.REG_F15, -1, "F15"},
41037 {47, arm64.REG_F16, -1, "F16"},
41038 {48, arm64.REG_F17, -1, "F17"},
41039 {49, arm64.REG_F18, -1, "F18"},
41040 {50, arm64.REG_F19, -1, "F19"},
41041 {51, arm64.REG_F20, -1, "F20"},
41042 {52, arm64.REG_F21, -1, "F21"},
41043 {53, arm64.REG_F22, -1, "F22"},
41044 {54, arm64.REG_F23, -1, "F23"},
41045 {55, arm64.REG_F24, -1, "F24"},
41046 {56, arm64.REG_F25, -1, "F25"},
41047 {57, arm64.REG_F26, -1, "F26"},
41048 {58, arm64.REG_F27, -1, "F27"},
41049 {59, arm64.REG_F28, -1, "F28"},
41050 {60, arm64.REG_F29, -1, "F29"},
41051 {61, arm64.REG_F30, -1, "F30"},
41052 {62, arm64.REG_F31, -1, "F31"},
41053 {63, 0, -1, "SB"},
41054 }
41055 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
41056 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
41057 var gpRegMaskARM64 = regMask(670826495)
41058 var fpRegMaskARM64 = regMask(9223372034707292160)
41059 var specialRegMaskARM64 = regMask(0)
41060 var framepointerRegARM64 = int8(-1)
41061 var linkRegARM64 = int8(29)
41062 var registersLOONG64 = [...]Register{
41063 {0, loong64.REG_R0, -1, "R0"},
41064 {1, loong64.REG_R1, -1, "R1"},
41065 {2, loong64.REGSP, -1, "SP"},
41066 {3, loong64.REG_R4, 0, "R4"},
41067 {4, loong64.REG_R5, 1, "R5"},
41068 {5, loong64.REG_R6, 2, "R6"},
41069 {6, loong64.REG_R7, 3, "R7"},
41070 {7, loong64.REG_R8, 4, "R8"},
41071 {8, loong64.REG_R9, 5, "R9"},
41072 {9, loong64.REG_R10, 6, "R10"},
41073 {10, loong64.REG_R11, 7, "R11"},
41074 {11, loong64.REG_R12, 8, "R12"},
41075 {12, loong64.REG_R13, 9, "R13"},
41076 {13, loong64.REG_R14, 10, "R14"},
41077 {14, loong64.REG_R15, 11, "R15"},
41078 {15, loong64.REG_R16, 12, "R16"},
41079 {16, loong64.REG_R17, 13, "R17"},
41080 {17, loong64.REG_R18, 14, "R18"},
41081 {18, loong64.REG_R19, 15, "R19"},
41082 {19, loong64.REG_R20, 16, "R20"},
41083 {20, loong64.REG_R21, 17, "R21"},
41084 {21, loong64.REGG, -1, "g"},
41085 {22, loong64.REG_R23, 18, "R23"},
41086 {23, loong64.REG_R24, 19, "R24"},
41087 {24, loong64.REG_R25, 20, "R25"},
41088 {25, loong64.REG_R26, 21, "R26"},
41089 {26, loong64.REG_R27, 22, "R27"},
41090 {27, loong64.REG_R28, 23, "R28"},
41091 {28, loong64.REG_R29, 24, "R29"},
41092 {29, loong64.REG_R31, 25, "R31"},
41093 {30, loong64.REG_F0, -1, "F0"},
41094 {31, loong64.REG_F1, -1, "F1"},
41095 {32, loong64.REG_F2, -1, "F2"},
41096 {33, loong64.REG_F3, -1, "F3"},
41097 {34, loong64.REG_F4, -1, "F4"},
41098 {35, loong64.REG_F5, -1, "F5"},
41099 {36, loong64.REG_F6, -1, "F6"},
41100 {37, loong64.REG_F7, -1, "F7"},
41101 {38, loong64.REG_F8, -1, "F8"},
41102 {39, loong64.REG_F9, -1, "F9"},
41103 {40, loong64.REG_F10, -1, "F10"},
41104 {41, loong64.REG_F11, -1, "F11"},
41105 {42, loong64.REG_F12, -1, "F12"},
41106 {43, loong64.REG_F13, -1, "F13"},
41107 {44, loong64.REG_F14, -1, "F14"},
41108 {45, loong64.REG_F15, -1, "F15"},
41109 {46, loong64.REG_F16, -1, "F16"},
41110 {47, loong64.REG_F17, -1, "F17"},
41111 {48, loong64.REG_F18, -1, "F18"},
41112 {49, loong64.REG_F19, -1, "F19"},
41113 {50, loong64.REG_F20, -1, "F20"},
41114 {51, loong64.REG_F21, -1, "F21"},
41115 {52, loong64.REG_F22, -1, "F22"},
41116 {53, loong64.REG_F23, -1, "F23"},
41117 {54, loong64.REG_F24, -1, "F24"},
41118 {55, loong64.REG_F25, -1, "F25"},
41119 {56, loong64.REG_F26, -1, "F26"},
41120 {57, loong64.REG_F27, -1, "F27"},
41121 {58, loong64.REG_F28, -1, "F28"},
41122 {59, loong64.REG_F29, -1, "F29"},
41123 {60, loong64.REG_F30, -1, "F30"},
41124 {61, loong64.REG_F31, -1, "F31"},
41125 {62, 0, -1, "SB"},
41126 }
41127 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
41128 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
41129 var gpRegMaskLOONG64 = regMask(1071644664)
41130 var fpRegMaskLOONG64 = regMask(4611686017353646080)
41131 var specialRegMaskLOONG64 = regMask(0)
41132 var framepointerRegLOONG64 = int8(-1)
41133 var linkRegLOONG64 = int8(1)
41134 var registersMIPS = [...]Register{
41135 {0, mips.REG_R0, -1, "R0"},
41136 {1, mips.REG_R1, 0, "R1"},
41137 {2, mips.REG_R2, 1, "R2"},
41138 {3, mips.REG_R3, 2, "R3"},
41139 {4, mips.REG_R4, 3, "R4"},
41140 {5, mips.REG_R5, 4, "R5"},
41141 {6, mips.REG_R6, 5, "R6"},
41142 {7, mips.REG_R7, 6, "R7"},
41143 {8, mips.REG_R8, 7, "R8"},
41144 {9, mips.REG_R9, 8, "R9"},
41145 {10, mips.REG_R10, 9, "R10"},
41146 {11, mips.REG_R11, 10, "R11"},
41147 {12, mips.REG_R12, 11, "R12"},
41148 {13, mips.REG_R13, 12, "R13"},
41149 {14, mips.REG_R14, 13, "R14"},
41150 {15, mips.REG_R15, 14, "R15"},
41151 {16, mips.REG_R16, 15, "R16"},
41152 {17, mips.REG_R17, 16, "R17"},
41153 {18, mips.REG_R18, 17, "R18"},
41154 {19, mips.REG_R19, 18, "R19"},
41155 {20, mips.REG_R20, 19, "R20"},
41156 {21, mips.REG_R21, 20, "R21"},
41157 {22, mips.REG_R22, 21, "R22"},
41158 {23, mips.REG_R24, 22, "R24"},
41159 {24, mips.REG_R25, 23, "R25"},
41160 {25, mips.REG_R28, 24, "R28"},
41161 {26, mips.REGSP, -1, "SP"},
41162 {27, mips.REGG, -1, "g"},
41163 {28, mips.REG_R31, 25, "R31"},
41164 {29, mips.REG_F0, -1, "F0"},
41165 {30, mips.REG_F2, -1, "F2"},
41166 {31, mips.REG_F4, -1, "F4"},
41167 {32, mips.REG_F6, -1, "F6"},
41168 {33, mips.REG_F8, -1, "F8"},
41169 {34, mips.REG_F10, -1, "F10"},
41170 {35, mips.REG_F12, -1, "F12"},
41171 {36, mips.REG_F14, -1, "F14"},
41172 {37, mips.REG_F16, -1, "F16"},
41173 {38, mips.REG_F18, -1, "F18"},
41174 {39, mips.REG_F20, -1, "F20"},
41175 {40, mips.REG_F22, -1, "F22"},
41176 {41, mips.REG_F24, -1, "F24"},
41177 {42, mips.REG_F26, -1, "F26"},
41178 {43, mips.REG_F28, -1, "F28"},
41179 {44, mips.REG_F30, -1, "F30"},
41180 {45, mips.REG_HI, -1, "HI"},
41181 {46, mips.REG_LO, -1, "LO"},
41182 {47, 0, -1, "SB"},
41183 }
41184 var paramIntRegMIPS = []int8(nil)
41185 var paramFloatRegMIPS = []int8(nil)
41186 var gpRegMaskMIPS = regMask(335544318)
41187 var fpRegMaskMIPS = regMask(35183835217920)
41188 var specialRegMaskMIPS = regMask(105553116266496)
41189 var framepointerRegMIPS = int8(-1)
41190 var linkRegMIPS = int8(28)
41191 var registersMIPS64 = [...]Register{
41192 {0, mips.REG_R0, -1, "R0"},
41193 {1, mips.REG_R1, 0, "R1"},
41194 {2, mips.REG_R2, 1, "R2"},
41195 {3, mips.REG_R3, 2, "R3"},
41196 {4, mips.REG_R4, 3, "R4"},
41197 {5, mips.REG_R5, 4, "R5"},
41198 {6, mips.REG_R6, 5, "R6"},
41199 {7, mips.REG_R7, 6, "R7"},
41200 {8, mips.REG_R8, 7, "R8"},
41201 {9, mips.REG_R9, 8, "R9"},
41202 {10, mips.REG_R10, 9, "R10"},
41203 {11, mips.REG_R11, 10, "R11"},
41204 {12, mips.REG_R12, 11, "R12"},
41205 {13, mips.REG_R13, 12, "R13"},
41206 {14, mips.REG_R14, 13, "R14"},
41207 {15, mips.REG_R15, 14, "R15"},
41208 {16, mips.REG_R16, 15, "R16"},
41209 {17, mips.REG_R17, 16, "R17"},
41210 {18, mips.REG_R18, 17, "R18"},
41211 {19, mips.REG_R19, 18, "R19"},
41212 {20, mips.REG_R20, 19, "R20"},
41213 {21, mips.REG_R21, 20, "R21"},
41214 {22, mips.REG_R22, 21, "R22"},
41215 {23, mips.REG_R24, 22, "R24"},
41216 {24, mips.REG_R25, 23, "R25"},
41217 {25, mips.REGSP, -1, "SP"},
41218 {26, mips.REGG, -1, "g"},
41219 {27, mips.REG_R31, 24, "R31"},
41220 {28, mips.REG_F0, -1, "F0"},
41221 {29, mips.REG_F1, -1, "F1"},
41222 {30, mips.REG_F2, -1, "F2"},
41223 {31, mips.REG_F3, -1, "F3"},
41224 {32, mips.REG_F4, -1, "F4"},
41225 {33, mips.REG_F5, -1, "F5"},
41226 {34, mips.REG_F6, -1, "F6"},
41227 {35, mips.REG_F7, -1, "F7"},
41228 {36, mips.REG_F8, -1, "F8"},
41229 {37, mips.REG_F9, -1, "F9"},
41230 {38, mips.REG_F10, -1, "F10"},
41231 {39, mips.REG_F11, -1, "F11"},
41232 {40, mips.REG_F12, -1, "F12"},
41233 {41, mips.REG_F13, -1, "F13"},
41234 {42, mips.REG_F14, -1, "F14"},
41235 {43, mips.REG_F15, -1, "F15"},
41236 {44, mips.REG_F16, -1, "F16"},
41237 {45, mips.REG_F17, -1, "F17"},
41238 {46, mips.REG_F18, -1, "F18"},
41239 {47, mips.REG_F19, -1, "F19"},
41240 {48, mips.REG_F20, -1, "F20"},
41241 {49, mips.REG_F21, -1, "F21"},
41242 {50, mips.REG_F22, -1, "F22"},
41243 {51, mips.REG_F23, -1, "F23"},
41244 {52, mips.REG_F24, -1, "F24"},
41245 {53, mips.REG_F25, -1, "F25"},
41246 {54, mips.REG_F26, -1, "F26"},
41247 {55, mips.REG_F27, -1, "F27"},
41248 {56, mips.REG_F28, -1, "F28"},
41249 {57, mips.REG_F29, -1, "F29"},
41250 {58, mips.REG_F30, -1, "F30"},
41251 {59, mips.REG_F31, -1, "F31"},
41252 {60, mips.REG_HI, -1, "HI"},
41253 {61, mips.REG_LO, -1, "LO"},
41254 {62, 0, -1, "SB"},
41255 }
41256 var paramIntRegMIPS64 = []int8(nil)
41257 var paramFloatRegMIPS64 = []int8(nil)
41258 var gpRegMaskMIPS64 = regMask(167772158)
41259 var fpRegMaskMIPS64 = regMask(1152921504338411520)
41260 var specialRegMaskMIPS64 = regMask(3458764513820540928)
41261 var framepointerRegMIPS64 = int8(-1)
41262 var linkRegMIPS64 = int8(27)
41263 var registersPPC64 = [...]Register{
41264 {0, ppc64.REG_R0, -1, "R0"},
41265 {1, ppc64.REGSP, -1, "SP"},
41266 {2, 0, -1, "SB"},
41267 {3, ppc64.REG_R3, 0, "R3"},
41268 {4, ppc64.REG_R4, 1, "R4"},
41269 {5, ppc64.REG_R5, 2, "R5"},
41270 {6, ppc64.REG_R6, 3, "R6"},
41271 {7, ppc64.REG_R7, 4, "R7"},
41272 {8, ppc64.REG_R8, 5, "R8"},
41273 {9, ppc64.REG_R9, 6, "R9"},
41274 {10, ppc64.REG_R10, 7, "R10"},
41275 {11, ppc64.REG_R11, 8, "R11"},
41276 {12, ppc64.REG_R12, 9, "R12"},
41277 {13, ppc64.REG_R13, -1, "R13"},
41278 {14, ppc64.REG_R14, 10, "R14"},
41279 {15, ppc64.REG_R15, 11, "R15"},
41280 {16, ppc64.REG_R16, 12, "R16"},
41281 {17, ppc64.REG_R17, 13, "R17"},
41282 {18, ppc64.REG_R18, 14, "R18"},
41283 {19, ppc64.REG_R19, 15, "R19"},
41284 {20, ppc64.REG_R20, 16, "R20"},
41285 {21, ppc64.REG_R21, 17, "R21"},
41286 {22, ppc64.REG_R22, 18, "R22"},
41287 {23, ppc64.REG_R23, 19, "R23"},
41288 {24, ppc64.REG_R24, 20, "R24"},
41289 {25, ppc64.REG_R25, 21, "R25"},
41290 {26, ppc64.REG_R26, 22, "R26"},
41291 {27, ppc64.REG_R27, 23, "R27"},
41292 {28, ppc64.REG_R28, 24, "R28"},
41293 {29, ppc64.REG_R29, 25, "R29"},
41294 {30, ppc64.REGG, -1, "g"},
41295 {31, ppc64.REG_R31, -1, "R31"},
41296 {32, ppc64.REG_F0, -1, "F0"},
41297 {33, ppc64.REG_F1, -1, "F1"},
41298 {34, ppc64.REG_F2, -1, "F2"},
41299 {35, ppc64.REG_F3, -1, "F3"},
41300 {36, ppc64.REG_F4, -1, "F4"},
41301 {37, ppc64.REG_F5, -1, "F5"},
41302 {38, ppc64.REG_F6, -1, "F6"},
41303 {39, ppc64.REG_F7, -1, "F7"},
41304 {40, ppc64.REG_F8, -1, "F8"},
41305 {41, ppc64.REG_F9, -1, "F9"},
41306 {42, ppc64.REG_F10, -1, "F10"},
41307 {43, ppc64.REG_F11, -1, "F11"},
41308 {44, ppc64.REG_F12, -1, "F12"},
41309 {45, ppc64.REG_F13, -1, "F13"},
41310 {46, ppc64.REG_F14, -1, "F14"},
41311 {47, ppc64.REG_F15, -1, "F15"},
41312 {48, ppc64.REG_F16, -1, "F16"},
41313 {49, ppc64.REG_F17, -1, "F17"},
41314 {50, ppc64.REG_F18, -1, "F18"},
41315 {51, ppc64.REG_F19, -1, "F19"},
41316 {52, ppc64.REG_F20, -1, "F20"},
41317 {53, ppc64.REG_F21, -1, "F21"},
41318 {54, ppc64.REG_F22, -1, "F22"},
41319 {55, ppc64.REG_F23, -1, "F23"},
41320 {56, ppc64.REG_F24, -1, "F24"},
41321 {57, ppc64.REG_F25, -1, "F25"},
41322 {58, ppc64.REG_F26, -1, "F26"},
41323 {59, ppc64.REG_F27, -1, "F27"},
41324 {60, ppc64.REG_F28, -1, "F28"},
41325 {61, ppc64.REG_F29, -1, "F29"},
41326 {62, ppc64.REG_F30, -1, "F30"},
41327 {63, ppc64.REG_XER, -1, "XER"},
41328 }
41329 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
41330 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
41331 var gpRegMaskPPC64 = regMask(1073733624)
41332 var fpRegMaskPPC64 = regMask(9223372032559808512)
41333 var specialRegMaskPPC64 = regMask(9223372036854775808)
41334 var framepointerRegPPC64 = int8(-1)
41335 var linkRegPPC64 = int8(-1)
41336 var registersRISCV64 = [...]Register{
41337 {0, riscv.REG_X0, -1, "X0"},
41338 {1, riscv.REGSP, -1, "SP"},
41339 {2, riscv.REG_X3, -1, "X3"},
41340 {3, riscv.REG_X4, -1, "X4"},
41341 {4, riscv.REG_X5, 0, "X5"},
41342 {5, riscv.REG_X6, 1, "X6"},
41343 {6, riscv.REG_X7, 2, "X7"},
41344 {7, riscv.REG_X8, 3, "X8"},
41345 {8, riscv.REG_X9, 4, "X9"},
41346 {9, riscv.REG_X10, 5, "X10"},
41347 {10, riscv.REG_X11, 6, "X11"},
41348 {11, riscv.REG_X12, 7, "X12"},
41349 {12, riscv.REG_X13, 8, "X13"},
41350 {13, riscv.REG_X14, 9, "X14"},
41351 {14, riscv.REG_X15, 10, "X15"},
41352 {15, riscv.REG_X16, 11, "X16"},
41353 {16, riscv.REG_X17, 12, "X17"},
41354 {17, riscv.REG_X18, 13, "X18"},
41355 {18, riscv.REG_X19, 14, "X19"},
41356 {19, riscv.REG_X20, 15, "X20"},
41357 {20, riscv.REG_X21, 16, "X21"},
41358 {21, riscv.REG_X22, 17, "X22"},
41359 {22, riscv.REG_X23, 18, "X23"},
41360 {23, riscv.REG_X24, 19, "X24"},
41361 {24, riscv.REG_X25, 20, "X25"},
41362 {25, riscv.REG_X26, 21, "X26"},
41363 {26, riscv.REGG, -1, "g"},
41364 {27, riscv.REG_X28, 22, "X28"},
41365 {28, riscv.REG_X29, 23, "X29"},
41366 {29, riscv.REG_X30, 24, "X30"},
41367 {30, riscv.REG_X31, -1, "X31"},
41368 {31, riscv.REG_F0, -1, "F0"},
41369 {32, riscv.REG_F1, -1, "F1"},
41370 {33, riscv.REG_F2, -1, "F2"},
41371 {34, riscv.REG_F3, -1, "F3"},
41372 {35, riscv.REG_F4, -1, "F4"},
41373 {36, riscv.REG_F5, -1, "F5"},
41374 {37, riscv.REG_F6, -1, "F6"},
41375 {38, riscv.REG_F7, -1, "F7"},
41376 {39, riscv.REG_F8, -1, "F8"},
41377 {40, riscv.REG_F9, -1, "F9"},
41378 {41, riscv.REG_F10, -1, "F10"},
41379 {42, riscv.REG_F11, -1, "F11"},
41380 {43, riscv.REG_F12, -1, "F12"},
41381 {44, riscv.REG_F13, -1, "F13"},
41382 {45, riscv.REG_F14, -1, "F14"},
41383 {46, riscv.REG_F15, -1, "F15"},
41384 {47, riscv.REG_F16, -1, "F16"},
41385 {48, riscv.REG_F17, -1, "F17"},
41386 {49, riscv.REG_F18, -1, "F18"},
41387 {50, riscv.REG_F19, -1, "F19"},
41388 {51, riscv.REG_F20, -1, "F20"},
41389 {52, riscv.REG_F21, -1, "F21"},
41390 {53, riscv.REG_F22, -1, "F22"},
41391 {54, riscv.REG_F23, -1, "F23"},
41392 {55, riscv.REG_F24, -1, "F24"},
41393 {56, riscv.REG_F25, -1, "F25"},
41394 {57, riscv.REG_F26, -1, "F26"},
41395 {58, riscv.REG_F27, -1, "F27"},
41396 {59, riscv.REG_F28, -1, "F28"},
41397 {60, riscv.REG_F29, -1, "F29"},
41398 {61, riscv.REG_F30, -1, "F30"},
41399 {62, riscv.REG_F31, -1, "F31"},
41400 {63, 0, -1, "SB"},
41401 }
41402 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
41403 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
41404 var gpRegMaskRISCV64 = regMask(1006632944)
41405 var fpRegMaskRISCV64 = regMask(9223372034707292160)
41406 var specialRegMaskRISCV64 = regMask(0)
41407 var framepointerRegRISCV64 = int8(-1)
41408 var linkRegRISCV64 = int8(0)
41409 var registersS390X = [...]Register{
41410 {0, s390x.REG_R0, 0, "R0"},
41411 {1, s390x.REG_R1, 1, "R1"},
41412 {2, s390x.REG_R2, 2, "R2"},
41413 {3, s390x.REG_R3, 3, "R3"},
41414 {4, s390x.REG_R4, 4, "R4"},
41415 {5, s390x.REG_R5, 5, "R5"},
41416 {6, s390x.REG_R6, 6, "R6"},
41417 {7, s390x.REG_R7, 7, "R7"},
41418 {8, s390x.REG_R8, 8, "R8"},
41419 {9, s390x.REG_R9, 9, "R9"},
41420 {10, s390x.REG_R10, -1, "R10"},
41421 {11, s390x.REG_R11, 10, "R11"},
41422 {12, s390x.REG_R12, 11, "R12"},
41423 {13, s390x.REGG, -1, "g"},
41424 {14, s390x.REG_R14, 12, "R14"},
41425 {15, s390x.REGSP, -1, "SP"},
41426 {16, s390x.REG_F0, -1, "F0"},
41427 {17, s390x.REG_F1, -1, "F1"},
41428 {18, s390x.REG_F2, -1, "F2"},
41429 {19, s390x.REG_F3, -1, "F3"},
41430 {20, s390x.REG_F4, -1, "F4"},
41431 {21, s390x.REG_F5, -1, "F5"},
41432 {22, s390x.REG_F6, -1, "F6"},
41433 {23, s390x.REG_F7, -1, "F7"},
41434 {24, s390x.REG_F8, -1, "F8"},
41435 {25, s390x.REG_F9, -1, "F9"},
41436 {26, s390x.REG_F10, -1, "F10"},
41437 {27, s390x.REG_F11, -1, "F11"},
41438 {28, s390x.REG_F12, -1, "F12"},
41439 {29, s390x.REG_F13, -1, "F13"},
41440 {30, s390x.REG_F14, -1, "F14"},
41441 {31, s390x.REG_F15, -1, "F15"},
41442 {32, 0, -1, "SB"},
41443 }
41444 var paramIntRegS390X = []int8(nil)
41445 var paramFloatRegS390X = []int8(nil)
41446 var gpRegMaskS390X = regMask(23551)
41447 var fpRegMaskS390X = regMask(4294901760)
41448 var specialRegMaskS390X = regMask(0)
41449 var framepointerRegS390X = int8(-1)
41450 var linkRegS390X = int8(14)
41451 var registersWasm = [...]Register{
41452 {0, wasm.REG_R0, 0, "R0"},
41453 {1, wasm.REG_R1, 1, "R1"},
41454 {2, wasm.REG_R2, 2, "R2"},
41455 {3, wasm.REG_R3, 3, "R3"},
41456 {4, wasm.REG_R4, 4, "R4"},
41457 {5, wasm.REG_R5, 5, "R5"},
41458 {6, wasm.REG_R6, 6, "R6"},
41459 {7, wasm.REG_R7, 7, "R7"},
41460 {8, wasm.REG_R8, 8, "R8"},
41461 {9, wasm.REG_R9, 9, "R9"},
41462 {10, wasm.REG_R10, 10, "R10"},
41463 {11, wasm.REG_R11, 11, "R11"},
41464 {12, wasm.REG_R12, 12, "R12"},
41465 {13, wasm.REG_R13, 13, "R13"},
41466 {14, wasm.REG_R14, 14, "R14"},
41467 {15, wasm.REG_R15, 15, "R15"},
41468 {16, wasm.REG_F0, -1, "F0"},
41469 {17, wasm.REG_F1, -1, "F1"},
41470 {18, wasm.REG_F2, -1, "F2"},
41471 {19, wasm.REG_F3, -1, "F3"},
41472 {20, wasm.REG_F4, -1, "F4"},
41473 {21, wasm.REG_F5, -1, "F5"},
41474 {22, wasm.REG_F6, -1, "F6"},
41475 {23, wasm.REG_F7, -1, "F7"},
41476 {24, wasm.REG_F8, -1, "F8"},
41477 {25, wasm.REG_F9, -1, "F9"},
41478 {26, wasm.REG_F10, -1, "F10"},
41479 {27, wasm.REG_F11, -1, "F11"},
41480 {28, wasm.REG_F12, -1, "F12"},
41481 {29, wasm.REG_F13, -1, "F13"},
41482 {30, wasm.REG_F14, -1, "F14"},
41483 {31, wasm.REG_F15, -1, "F15"},
41484 {32, wasm.REG_F16, -1, "F16"},
41485 {33, wasm.REG_F17, -1, "F17"},
41486 {34, wasm.REG_F18, -1, "F18"},
41487 {35, wasm.REG_F19, -1, "F19"},
41488 {36, wasm.REG_F20, -1, "F20"},
41489 {37, wasm.REG_F21, -1, "F21"},
41490 {38, wasm.REG_F22, -1, "F22"},
41491 {39, wasm.REG_F23, -1, "F23"},
41492 {40, wasm.REG_F24, -1, "F24"},
41493 {41, wasm.REG_F25, -1, "F25"},
41494 {42, wasm.REG_F26, -1, "F26"},
41495 {43, wasm.REG_F27, -1, "F27"},
41496 {44, wasm.REG_F28, -1, "F28"},
41497 {45, wasm.REG_F29, -1, "F29"},
41498 {46, wasm.REG_F30, -1, "F30"},
41499 {47, wasm.REG_F31, -1, "F31"},
41500 {48, wasm.REGSP, -1, "SP"},
41501 {49, wasm.REGG, -1, "g"},
41502 {50, 0, -1, "SB"},
41503 }
41504 var paramIntRegWasm = []int8(nil)
41505 var paramFloatRegWasm = []int8(nil)
41506 var gpRegMaskWasm = regMask(65535)
41507 var fpRegMaskWasm = regMask(281474976645120)
41508 var fp32RegMaskWasm = regMask(4294901760)
41509 var fp64RegMaskWasm = regMask(281470681743360)
41510 var specialRegMaskWasm = regMask(0)
41511 var framepointerRegWasm = int8(-1)
41512 var linkRegWasm = int8(-1)
41513
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