1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105 BlockLOONG64BEQ
106 BlockLOONG64BNE
107 BlockLOONG64BGE
108 BlockLOONG64BLT
109 BlockLOONG64BGEU
110 BlockLOONG64BLTU
111
112 BlockMIPSEQ
113 BlockMIPSNE
114 BlockMIPSLTZ
115 BlockMIPSLEZ
116 BlockMIPSGTZ
117 BlockMIPSGEZ
118 BlockMIPSFPT
119 BlockMIPSFPF
120
121 BlockMIPS64EQ
122 BlockMIPS64NE
123 BlockMIPS64LTZ
124 BlockMIPS64LEZ
125 BlockMIPS64GTZ
126 BlockMIPS64GEZ
127 BlockMIPS64FPT
128 BlockMIPS64FPF
129
130 BlockPPC64EQ
131 BlockPPC64NE
132 BlockPPC64LT
133 BlockPPC64LE
134 BlockPPC64GT
135 BlockPPC64GE
136 BlockPPC64FLT
137 BlockPPC64FLE
138 BlockPPC64FGT
139 BlockPPC64FGE
140
141 BlockRISCV64BEQ
142 BlockRISCV64BNE
143 BlockRISCV64BLT
144 BlockRISCV64BGE
145 BlockRISCV64BLTU
146 BlockRISCV64BGEU
147 BlockRISCV64BEQZ
148 BlockRISCV64BNEZ
149 BlockRISCV64BLEZ
150 BlockRISCV64BGEZ
151 BlockRISCV64BLTZ
152 BlockRISCV64BGTZ
153
154 BlockS390XBRC
155 BlockS390XCRJ
156 BlockS390XCGRJ
157 BlockS390XCLRJ
158 BlockS390XCLGRJ
159 BlockS390XCIJ
160 BlockS390XCGIJ
161 BlockS390XCLIJ
162 BlockS390XCLGIJ
163
164 BlockPlain
165 BlockIf
166 BlockDefer
167 BlockRet
168 BlockRetJmp
169 BlockExit
170 BlockJumpTable
171 BlockFirst
172 )
173
174 var blockString = [...]string{
175 BlockInvalid: "BlockInvalid",
176
177 Block386EQ: "EQ",
178 Block386NE: "NE",
179 Block386LT: "LT",
180 Block386LE: "LE",
181 Block386GT: "GT",
182 Block386GE: "GE",
183 Block386OS: "OS",
184 Block386OC: "OC",
185 Block386ULT: "ULT",
186 Block386ULE: "ULE",
187 Block386UGT: "UGT",
188 Block386UGE: "UGE",
189 Block386EQF: "EQF",
190 Block386NEF: "NEF",
191 Block386ORD: "ORD",
192 Block386NAN: "NAN",
193
194 BlockAMD64EQ: "EQ",
195 BlockAMD64NE: "NE",
196 BlockAMD64LT: "LT",
197 BlockAMD64LE: "LE",
198 BlockAMD64GT: "GT",
199 BlockAMD64GE: "GE",
200 BlockAMD64OS: "OS",
201 BlockAMD64OC: "OC",
202 BlockAMD64ULT: "ULT",
203 BlockAMD64ULE: "ULE",
204 BlockAMD64UGT: "UGT",
205 BlockAMD64UGE: "UGE",
206 BlockAMD64EQF: "EQF",
207 BlockAMD64NEF: "NEF",
208 BlockAMD64ORD: "ORD",
209 BlockAMD64NAN: "NAN",
210 BlockAMD64JUMPTABLE: "JUMPTABLE",
211
212 BlockARMEQ: "EQ",
213 BlockARMNE: "NE",
214 BlockARMLT: "LT",
215 BlockARMLE: "LE",
216 BlockARMGT: "GT",
217 BlockARMGE: "GE",
218 BlockARMULT: "ULT",
219 BlockARMULE: "ULE",
220 BlockARMUGT: "UGT",
221 BlockARMUGE: "UGE",
222 BlockARMLTnoov: "LTnoov",
223 BlockARMLEnoov: "LEnoov",
224 BlockARMGTnoov: "GTnoov",
225 BlockARMGEnoov: "GEnoov",
226
227 BlockARM64EQ: "EQ",
228 BlockARM64NE: "NE",
229 BlockARM64LT: "LT",
230 BlockARM64LE: "LE",
231 BlockARM64GT: "GT",
232 BlockARM64GE: "GE",
233 BlockARM64ULT: "ULT",
234 BlockARM64ULE: "ULE",
235 BlockARM64UGT: "UGT",
236 BlockARM64UGE: "UGE",
237 BlockARM64Z: "Z",
238 BlockARM64NZ: "NZ",
239 BlockARM64ZW: "ZW",
240 BlockARM64NZW: "NZW",
241 BlockARM64TBZ: "TBZ",
242 BlockARM64TBNZ: "TBNZ",
243 BlockARM64FLT: "FLT",
244 BlockARM64FLE: "FLE",
245 BlockARM64FGT: "FGT",
246 BlockARM64FGE: "FGE",
247 BlockARM64LTnoov: "LTnoov",
248 BlockARM64LEnoov: "LEnoov",
249 BlockARM64GTnoov: "GTnoov",
250 BlockARM64GEnoov: "GEnoov",
251 BlockARM64JUMPTABLE: "JUMPTABLE",
252
253 BlockLOONG64EQ: "EQ",
254 BlockLOONG64NE: "NE",
255 BlockLOONG64LTZ: "LTZ",
256 BlockLOONG64LEZ: "LEZ",
257 BlockLOONG64GTZ: "GTZ",
258 BlockLOONG64GEZ: "GEZ",
259 BlockLOONG64FPT: "FPT",
260 BlockLOONG64FPF: "FPF",
261 BlockLOONG64BEQ: "BEQ",
262 BlockLOONG64BNE: "BNE",
263 BlockLOONG64BGE: "BGE",
264 BlockLOONG64BLT: "BLT",
265 BlockLOONG64BGEU: "BGEU",
266 BlockLOONG64BLTU: "BLTU",
267
268 BlockMIPSEQ: "EQ",
269 BlockMIPSNE: "NE",
270 BlockMIPSLTZ: "LTZ",
271 BlockMIPSLEZ: "LEZ",
272 BlockMIPSGTZ: "GTZ",
273 BlockMIPSGEZ: "GEZ",
274 BlockMIPSFPT: "FPT",
275 BlockMIPSFPF: "FPF",
276
277 BlockMIPS64EQ: "EQ",
278 BlockMIPS64NE: "NE",
279 BlockMIPS64LTZ: "LTZ",
280 BlockMIPS64LEZ: "LEZ",
281 BlockMIPS64GTZ: "GTZ",
282 BlockMIPS64GEZ: "GEZ",
283 BlockMIPS64FPT: "FPT",
284 BlockMIPS64FPF: "FPF",
285
286 BlockPPC64EQ: "EQ",
287 BlockPPC64NE: "NE",
288 BlockPPC64LT: "LT",
289 BlockPPC64LE: "LE",
290 BlockPPC64GT: "GT",
291 BlockPPC64GE: "GE",
292 BlockPPC64FLT: "FLT",
293 BlockPPC64FLE: "FLE",
294 BlockPPC64FGT: "FGT",
295 BlockPPC64FGE: "FGE",
296
297 BlockRISCV64BEQ: "BEQ",
298 BlockRISCV64BNE: "BNE",
299 BlockRISCV64BLT: "BLT",
300 BlockRISCV64BGE: "BGE",
301 BlockRISCV64BLTU: "BLTU",
302 BlockRISCV64BGEU: "BGEU",
303 BlockRISCV64BEQZ: "BEQZ",
304 BlockRISCV64BNEZ: "BNEZ",
305 BlockRISCV64BLEZ: "BLEZ",
306 BlockRISCV64BGEZ: "BGEZ",
307 BlockRISCV64BLTZ: "BLTZ",
308 BlockRISCV64BGTZ: "BGTZ",
309
310 BlockS390XBRC: "BRC",
311 BlockS390XCRJ: "CRJ",
312 BlockS390XCGRJ: "CGRJ",
313 BlockS390XCLRJ: "CLRJ",
314 BlockS390XCLGRJ: "CLGRJ",
315 BlockS390XCIJ: "CIJ",
316 BlockS390XCGIJ: "CGIJ",
317 BlockS390XCLIJ: "CLIJ",
318 BlockS390XCLGIJ: "CLGIJ",
319
320 BlockPlain: "Plain",
321 BlockIf: "If",
322 BlockDefer: "Defer",
323 BlockRet: "Ret",
324 BlockRetJmp: "RetJmp",
325 BlockExit: "Exit",
326 BlockJumpTable: "JumpTable",
327 BlockFirst: "First",
328 }
329
330 func (k BlockKind) String() string { return blockString[k] }
331 func (k BlockKind) AuxIntType() string {
332 switch k {
333 case BlockARM64TBZ:
334 return "int64"
335 case BlockARM64TBNZ:
336 return "int64"
337 case BlockS390XCIJ:
338 return "int8"
339 case BlockS390XCGIJ:
340 return "int8"
341 case BlockS390XCLIJ:
342 return "uint8"
343 case BlockS390XCLGIJ:
344 return "uint8"
345 }
346 return ""
347 }
348
349 const (
350 OpInvalid Op = iota
351
352 Op386ADDSS
353 Op386ADDSD
354 Op386SUBSS
355 Op386SUBSD
356 Op386MULSS
357 Op386MULSD
358 Op386DIVSS
359 Op386DIVSD
360 Op386MOVSSload
361 Op386MOVSDload
362 Op386MOVSSconst
363 Op386MOVSDconst
364 Op386MOVSSloadidx1
365 Op386MOVSSloadidx4
366 Op386MOVSDloadidx1
367 Op386MOVSDloadidx8
368 Op386MOVSSstore
369 Op386MOVSDstore
370 Op386MOVSSstoreidx1
371 Op386MOVSSstoreidx4
372 Op386MOVSDstoreidx1
373 Op386MOVSDstoreidx8
374 Op386ADDSSload
375 Op386ADDSDload
376 Op386SUBSSload
377 Op386SUBSDload
378 Op386MULSSload
379 Op386MULSDload
380 Op386DIVSSload
381 Op386DIVSDload
382 Op386ADDL
383 Op386ADDLconst
384 Op386ADDLcarry
385 Op386ADDLconstcarry
386 Op386ADCL
387 Op386ADCLconst
388 Op386SUBL
389 Op386SUBLconst
390 Op386SUBLcarry
391 Op386SUBLconstcarry
392 Op386SBBL
393 Op386SBBLconst
394 Op386MULL
395 Op386MULLconst
396 Op386MULLU
397 Op386HMULL
398 Op386HMULLU
399 Op386MULLQU
400 Op386AVGLU
401 Op386DIVL
402 Op386DIVW
403 Op386DIVLU
404 Op386DIVWU
405 Op386MODL
406 Op386MODW
407 Op386MODLU
408 Op386MODWU
409 Op386ANDL
410 Op386ANDLconst
411 Op386ORL
412 Op386ORLconst
413 Op386XORL
414 Op386XORLconst
415 Op386CMPL
416 Op386CMPW
417 Op386CMPB
418 Op386CMPLconst
419 Op386CMPWconst
420 Op386CMPBconst
421 Op386CMPLload
422 Op386CMPWload
423 Op386CMPBload
424 Op386CMPLconstload
425 Op386CMPWconstload
426 Op386CMPBconstload
427 Op386UCOMISS
428 Op386UCOMISD
429 Op386TESTL
430 Op386TESTW
431 Op386TESTB
432 Op386TESTLconst
433 Op386TESTWconst
434 Op386TESTBconst
435 Op386SHLL
436 Op386SHLLconst
437 Op386SHRL
438 Op386SHRW
439 Op386SHRB
440 Op386SHRLconst
441 Op386SHRWconst
442 Op386SHRBconst
443 Op386SARL
444 Op386SARW
445 Op386SARB
446 Op386SARLconst
447 Op386SARWconst
448 Op386SARBconst
449 Op386ROLL
450 Op386ROLW
451 Op386ROLB
452 Op386ROLLconst
453 Op386ROLWconst
454 Op386ROLBconst
455 Op386ADDLload
456 Op386SUBLload
457 Op386MULLload
458 Op386ANDLload
459 Op386ORLload
460 Op386XORLload
461 Op386ADDLloadidx4
462 Op386SUBLloadidx4
463 Op386MULLloadidx4
464 Op386ANDLloadidx4
465 Op386ORLloadidx4
466 Op386XORLloadidx4
467 Op386NEGL
468 Op386NOTL
469 Op386BSFL
470 Op386BSFW
471 Op386LoweredCtz32
472 Op386LoweredCtz64
473 Op386BSRL
474 Op386BSRW
475 Op386BSWAPL
476 Op386SQRTSD
477 Op386SQRTSS
478 Op386SBBLcarrymask
479 Op386SETEQ
480 Op386SETNE
481 Op386SETL
482 Op386SETLE
483 Op386SETG
484 Op386SETGE
485 Op386SETB
486 Op386SETBE
487 Op386SETA
488 Op386SETAE
489 Op386SETO
490 Op386SETEQF
491 Op386SETNEF
492 Op386SETORD
493 Op386SETNAN
494 Op386SETGF
495 Op386SETGEF
496 Op386MOVBLSX
497 Op386MOVBLZX
498 Op386MOVWLSX
499 Op386MOVWLZX
500 Op386MOVLconst
501 Op386CVTTSD2SL
502 Op386CVTTSS2SL
503 Op386CVTSL2SS
504 Op386CVTSL2SD
505 Op386CVTSD2SS
506 Op386CVTSS2SD
507 Op386PXOR
508 Op386LEAL
509 Op386LEAL1
510 Op386LEAL2
511 Op386LEAL4
512 Op386LEAL8
513 Op386MOVBload
514 Op386MOVBLSXload
515 Op386MOVWload
516 Op386MOVWLSXload
517 Op386MOVLload
518 Op386MOVBstore
519 Op386MOVWstore
520 Op386MOVLstore
521 Op386ADDLmodify
522 Op386SUBLmodify
523 Op386ANDLmodify
524 Op386ORLmodify
525 Op386XORLmodify
526 Op386ADDLmodifyidx4
527 Op386SUBLmodifyidx4
528 Op386ANDLmodifyidx4
529 Op386ORLmodifyidx4
530 Op386XORLmodifyidx4
531 Op386ADDLconstmodify
532 Op386ANDLconstmodify
533 Op386ORLconstmodify
534 Op386XORLconstmodify
535 Op386ADDLconstmodifyidx4
536 Op386ANDLconstmodifyidx4
537 Op386ORLconstmodifyidx4
538 Op386XORLconstmodifyidx4
539 Op386MOVBloadidx1
540 Op386MOVWloadidx1
541 Op386MOVWloadidx2
542 Op386MOVLloadidx1
543 Op386MOVLloadidx4
544 Op386MOVBstoreidx1
545 Op386MOVWstoreidx1
546 Op386MOVWstoreidx2
547 Op386MOVLstoreidx1
548 Op386MOVLstoreidx4
549 Op386MOVBstoreconst
550 Op386MOVWstoreconst
551 Op386MOVLstoreconst
552 Op386MOVBstoreconstidx1
553 Op386MOVWstoreconstidx1
554 Op386MOVWstoreconstidx2
555 Op386MOVLstoreconstidx1
556 Op386MOVLstoreconstidx4
557 Op386DUFFZERO
558 Op386REPSTOSL
559 Op386CALLstatic
560 Op386CALLtail
561 Op386CALLclosure
562 Op386CALLinter
563 Op386DUFFCOPY
564 Op386REPMOVSL
565 Op386InvertFlags
566 Op386LoweredGetG
567 Op386LoweredGetClosurePtr
568 Op386LoweredGetCallerPC
569 Op386LoweredGetCallerSP
570 Op386LoweredNilCheck
571 Op386LoweredWB
572 Op386LoweredPanicBoundsA
573 Op386LoweredPanicBoundsB
574 Op386LoweredPanicBoundsC
575 Op386LoweredPanicExtendA
576 Op386LoweredPanicExtendB
577 Op386LoweredPanicExtendC
578 Op386FlagEQ
579 Op386FlagLT_ULT
580 Op386FlagLT_UGT
581 Op386FlagGT_UGT
582 Op386FlagGT_ULT
583 Op386MOVSSconst1
584 Op386MOVSDconst1
585 Op386MOVSSconst2
586 Op386MOVSDconst2
587
588 OpAMD64ADDSS
589 OpAMD64ADDSD
590 OpAMD64SUBSS
591 OpAMD64SUBSD
592 OpAMD64MULSS
593 OpAMD64MULSD
594 OpAMD64DIVSS
595 OpAMD64DIVSD
596 OpAMD64MOVSSload
597 OpAMD64MOVSDload
598 OpAMD64MOVSSconst
599 OpAMD64MOVSDconst
600 OpAMD64MOVSSloadidx1
601 OpAMD64MOVSSloadidx4
602 OpAMD64MOVSDloadidx1
603 OpAMD64MOVSDloadidx8
604 OpAMD64MOVSSstore
605 OpAMD64MOVSDstore
606 OpAMD64MOVSSstoreidx1
607 OpAMD64MOVSSstoreidx4
608 OpAMD64MOVSDstoreidx1
609 OpAMD64MOVSDstoreidx8
610 OpAMD64ADDSSload
611 OpAMD64ADDSDload
612 OpAMD64SUBSSload
613 OpAMD64SUBSDload
614 OpAMD64MULSSload
615 OpAMD64MULSDload
616 OpAMD64DIVSSload
617 OpAMD64DIVSDload
618 OpAMD64ADDSSloadidx1
619 OpAMD64ADDSSloadidx4
620 OpAMD64ADDSDloadidx1
621 OpAMD64ADDSDloadidx8
622 OpAMD64SUBSSloadidx1
623 OpAMD64SUBSSloadidx4
624 OpAMD64SUBSDloadidx1
625 OpAMD64SUBSDloadidx8
626 OpAMD64MULSSloadidx1
627 OpAMD64MULSSloadidx4
628 OpAMD64MULSDloadidx1
629 OpAMD64MULSDloadidx8
630 OpAMD64DIVSSloadidx1
631 OpAMD64DIVSSloadidx4
632 OpAMD64DIVSDloadidx1
633 OpAMD64DIVSDloadidx8
634 OpAMD64ADDQ
635 OpAMD64ADDL
636 OpAMD64ADDQconst
637 OpAMD64ADDLconst
638 OpAMD64ADDQconstmodify
639 OpAMD64ADDLconstmodify
640 OpAMD64SUBQ
641 OpAMD64SUBL
642 OpAMD64SUBQconst
643 OpAMD64SUBLconst
644 OpAMD64MULQ
645 OpAMD64MULL
646 OpAMD64MULQconst
647 OpAMD64MULLconst
648 OpAMD64MULLU
649 OpAMD64MULQU
650 OpAMD64HMULQ
651 OpAMD64HMULL
652 OpAMD64HMULQU
653 OpAMD64HMULLU
654 OpAMD64AVGQU
655 OpAMD64DIVQ
656 OpAMD64DIVL
657 OpAMD64DIVW
658 OpAMD64DIVQU
659 OpAMD64DIVLU
660 OpAMD64DIVWU
661 OpAMD64NEGLflags
662 OpAMD64ADDQconstflags
663 OpAMD64ADDLconstflags
664 OpAMD64ADDQcarry
665 OpAMD64ADCQ
666 OpAMD64ADDQconstcarry
667 OpAMD64ADCQconst
668 OpAMD64SUBQborrow
669 OpAMD64SBBQ
670 OpAMD64SUBQconstborrow
671 OpAMD64SBBQconst
672 OpAMD64MULQU2
673 OpAMD64DIVQU2
674 OpAMD64ANDQ
675 OpAMD64ANDL
676 OpAMD64ANDQconst
677 OpAMD64ANDLconst
678 OpAMD64ANDQconstmodify
679 OpAMD64ANDLconstmodify
680 OpAMD64ORQ
681 OpAMD64ORL
682 OpAMD64ORQconst
683 OpAMD64ORLconst
684 OpAMD64ORQconstmodify
685 OpAMD64ORLconstmodify
686 OpAMD64XORQ
687 OpAMD64XORL
688 OpAMD64XORQconst
689 OpAMD64XORLconst
690 OpAMD64XORQconstmodify
691 OpAMD64XORLconstmodify
692 OpAMD64CMPQ
693 OpAMD64CMPL
694 OpAMD64CMPW
695 OpAMD64CMPB
696 OpAMD64CMPQconst
697 OpAMD64CMPLconst
698 OpAMD64CMPWconst
699 OpAMD64CMPBconst
700 OpAMD64CMPQload
701 OpAMD64CMPLload
702 OpAMD64CMPWload
703 OpAMD64CMPBload
704 OpAMD64CMPQconstload
705 OpAMD64CMPLconstload
706 OpAMD64CMPWconstload
707 OpAMD64CMPBconstload
708 OpAMD64CMPQloadidx8
709 OpAMD64CMPQloadidx1
710 OpAMD64CMPLloadidx4
711 OpAMD64CMPLloadidx1
712 OpAMD64CMPWloadidx2
713 OpAMD64CMPWloadidx1
714 OpAMD64CMPBloadidx1
715 OpAMD64CMPQconstloadidx8
716 OpAMD64CMPQconstloadidx1
717 OpAMD64CMPLconstloadidx4
718 OpAMD64CMPLconstloadidx1
719 OpAMD64CMPWconstloadidx2
720 OpAMD64CMPWconstloadidx1
721 OpAMD64CMPBconstloadidx1
722 OpAMD64UCOMISS
723 OpAMD64UCOMISD
724 OpAMD64BTL
725 OpAMD64BTQ
726 OpAMD64BTCL
727 OpAMD64BTCQ
728 OpAMD64BTRL
729 OpAMD64BTRQ
730 OpAMD64BTSL
731 OpAMD64BTSQ
732 OpAMD64BTLconst
733 OpAMD64BTQconst
734 OpAMD64BTCQconst
735 OpAMD64BTRQconst
736 OpAMD64BTSQconst
737 OpAMD64BTSQconstmodify
738 OpAMD64BTRQconstmodify
739 OpAMD64BTCQconstmodify
740 OpAMD64TESTQ
741 OpAMD64TESTL
742 OpAMD64TESTW
743 OpAMD64TESTB
744 OpAMD64TESTQconst
745 OpAMD64TESTLconst
746 OpAMD64TESTWconst
747 OpAMD64TESTBconst
748 OpAMD64SHLQ
749 OpAMD64SHLL
750 OpAMD64SHLQconst
751 OpAMD64SHLLconst
752 OpAMD64SHRQ
753 OpAMD64SHRL
754 OpAMD64SHRW
755 OpAMD64SHRB
756 OpAMD64SHRQconst
757 OpAMD64SHRLconst
758 OpAMD64SHRWconst
759 OpAMD64SHRBconst
760 OpAMD64SARQ
761 OpAMD64SARL
762 OpAMD64SARW
763 OpAMD64SARB
764 OpAMD64SARQconst
765 OpAMD64SARLconst
766 OpAMD64SARWconst
767 OpAMD64SARBconst
768 OpAMD64SHRDQ
769 OpAMD64SHLDQ
770 OpAMD64ROLQ
771 OpAMD64ROLL
772 OpAMD64ROLW
773 OpAMD64ROLB
774 OpAMD64RORQ
775 OpAMD64RORL
776 OpAMD64RORW
777 OpAMD64RORB
778 OpAMD64ROLQconst
779 OpAMD64ROLLconst
780 OpAMD64ROLWconst
781 OpAMD64ROLBconst
782 OpAMD64ADDLload
783 OpAMD64ADDQload
784 OpAMD64SUBQload
785 OpAMD64SUBLload
786 OpAMD64ANDLload
787 OpAMD64ANDQload
788 OpAMD64ORQload
789 OpAMD64ORLload
790 OpAMD64XORQload
791 OpAMD64XORLload
792 OpAMD64ADDLloadidx1
793 OpAMD64ADDLloadidx4
794 OpAMD64ADDLloadidx8
795 OpAMD64ADDQloadidx1
796 OpAMD64ADDQloadidx8
797 OpAMD64SUBLloadidx1
798 OpAMD64SUBLloadidx4
799 OpAMD64SUBLloadidx8
800 OpAMD64SUBQloadidx1
801 OpAMD64SUBQloadidx8
802 OpAMD64ANDLloadidx1
803 OpAMD64ANDLloadidx4
804 OpAMD64ANDLloadidx8
805 OpAMD64ANDQloadidx1
806 OpAMD64ANDQloadidx8
807 OpAMD64ORLloadidx1
808 OpAMD64ORLloadidx4
809 OpAMD64ORLloadidx8
810 OpAMD64ORQloadidx1
811 OpAMD64ORQloadidx8
812 OpAMD64XORLloadidx1
813 OpAMD64XORLloadidx4
814 OpAMD64XORLloadidx8
815 OpAMD64XORQloadidx1
816 OpAMD64XORQloadidx8
817 OpAMD64ADDQmodify
818 OpAMD64SUBQmodify
819 OpAMD64ANDQmodify
820 OpAMD64ORQmodify
821 OpAMD64XORQmodify
822 OpAMD64ADDLmodify
823 OpAMD64SUBLmodify
824 OpAMD64ANDLmodify
825 OpAMD64ORLmodify
826 OpAMD64XORLmodify
827 OpAMD64ADDQmodifyidx1
828 OpAMD64ADDQmodifyidx8
829 OpAMD64SUBQmodifyidx1
830 OpAMD64SUBQmodifyidx8
831 OpAMD64ANDQmodifyidx1
832 OpAMD64ANDQmodifyidx8
833 OpAMD64ORQmodifyidx1
834 OpAMD64ORQmodifyidx8
835 OpAMD64XORQmodifyidx1
836 OpAMD64XORQmodifyidx8
837 OpAMD64ADDLmodifyidx1
838 OpAMD64ADDLmodifyidx4
839 OpAMD64ADDLmodifyidx8
840 OpAMD64SUBLmodifyidx1
841 OpAMD64SUBLmodifyidx4
842 OpAMD64SUBLmodifyidx8
843 OpAMD64ANDLmodifyidx1
844 OpAMD64ANDLmodifyidx4
845 OpAMD64ANDLmodifyidx8
846 OpAMD64ORLmodifyidx1
847 OpAMD64ORLmodifyidx4
848 OpAMD64ORLmodifyidx8
849 OpAMD64XORLmodifyidx1
850 OpAMD64XORLmodifyidx4
851 OpAMD64XORLmodifyidx8
852 OpAMD64ADDQconstmodifyidx1
853 OpAMD64ADDQconstmodifyidx8
854 OpAMD64ANDQconstmodifyidx1
855 OpAMD64ANDQconstmodifyidx8
856 OpAMD64ORQconstmodifyidx1
857 OpAMD64ORQconstmodifyidx8
858 OpAMD64XORQconstmodifyidx1
859 OpAMD64XORQconstmodifyidx8
860 OpAMD64ADDLconstmodifyidx1
861 OpAMD64ADDLconstmodifyidx4
862 OpAMD64ADDLconstmodifyidx8
863 OpAMD64ANDLconstmodifyidx1
864 OpAMD64ANDLconstmodifyidx4
865 OpAMD64ANDLconstmodifyidx8
866 OpAMD64ORLconstmodifyidx1
867 OpAMD64ORLconstmodifyidx4
868 OpAMD64ORLconstmodifyidx8
869 OpAMD64XORLconstmodifyidx1
870 OpAMD64XORLconstmodifyidx4
871 OpAMD64XORLconstmodifyidx8
872 OpAMD64NEGQ
873 OpAMD64NEGL
874 OpAMD64NOTQ
875 OpAMD64NOTL
876 OpAMD64BSFQ
877 OpAMD64BSFL
878 OpAMD64BSRQ
879 OpAMD64BSRL
880 OpAMD64CMOVQEQ
881 OpAMD64CMOVQNE
882 OpAMD64CMOVQLT
883 OpAMD64CMOVQGT
884 OpAMD64CMOVQLE
885 OpAMD64CMOVQGE
886 OpAMD64CMOVQLS
887 OpAMD64CMOVQHI
888 OpAMD64CMOVQCC
889 OpAMD64CMOVQCS
890 OpAMD64CMOVLEQ
891 OpAMD64CMOVLNE
892 OpAMD64CMOVLLT
893 OpAMD64CMOVLGT
894 OpAMD64CMOVLLE
895 OpAMD64CMOVLGE
896 OpAMD64CMOVLLS
897 OpAMD64CMOVLHI
898 OpAMD64CMOVLCC
899 OpAMD64CMOVLCS
900 OpAMD64CMOVWEQ
901 OpAMD64CMOVWNE
902 OpAMD64CMOVWLT
903 OpAMD64CMOVWGT
904 OpAMD64CMOVWLE
905 OpAMD64CMOVWGE
906 OpAMD64CMOVWLS
907 OpAMD64CMOVWHI
908 OpAMD64CMOVWCC
909 OpAMD64CMOVWCS
910 OpAMD64CMOVQEQF
911 OpAMD64CMOVQNEF
912 OpAMD64CMOVQGTF
913 OpAMD64CMOVQGEF
914 OpAMD64CMOVLEQF
915 OpAMD64CMOVLNEF
916 OpAMD64CMOVLGTF
917 OpAMD64CMOVLGEF
918 OpAMD64CMOVWEQF
919 OpAMD64CMOVWNEF
920 OpAMD64CMOVWGTF
921 OpAMD64CMOVWGEF
922 OpAMD64BSWAPQ
923 OpAMD64BSWAPL
924 OpAMD64POPCNTQ
925 OpAMD64POPCNTL
926 OpAMD64SQRTSD
927 OpAMD64SQRTSS
928 OpAMD64ROUNDSD
929 OpAMD64LoweredRound32F
930 OpAMD64LoweredRound64F
931 OpAMD64VFMADD231SS
932 OpAMD64VFMADD231SD
933 OpAMD64MINSD
934 OpAMD64MINSS
935 OpAMD64SBBQcarrymask
936 OpAMD64SBBLcarrymask
937 OpAMD64SETEQ
938 OpAMD64SETNE
939 OpAMD64SETL
940 OpAMD64SETLE
941 OpAMD64SETG
942 OpAMD64SETGE
943 OpAMD64SETB
944 OpAMD64SETBE
945 OpAMD64SETA
946 OpAMD64SETAE
947 OpAMD64SETO
948 OpAMD64SETEQstore
949 OpAMD64SETNEstore
950 OpAMD64SETLstore
951 OpAMD64SETLEstore
952 OpAMD64SETGstore
953 OpAMD64SETGEstore
954 OpAMD64SETBstore
955 OpAMD64SETBEstore
956 OpAMD64SETAstore
957 OpAMD64SETAEstore
958 OpAMD64SETEQstoreidx1
959 OpAMD64SETNEstoreidx1
960 OpAMD64SETLstoreidx1
961 OpAMD64SETLEstoreidx1
962 OpAMD64SETGstoreidx1
963 OpAMD64SETGEstoreidx1
964 OpAMD64SETBstoreidx1
965 OpAMD64SETBEstoreidx1
966 OpAMD64SETAstoreidx1
967 OpAMD64SETAEstoreidx1
968 OpAMD64SETEQF
969 OpAMD64SETNEF
970 OpAMD64SETORD
971 OpAMD64SETNAN
972 OpAMD64SETGF
973 OpAMD64SETGEF
974 OpAMD64MOVBQSX
975 OpAMD64MOVBQZX
976 OpAMD64MOVWQSX
977 OpAMD64MOVWQZX
978 OpAMD64MOVLQSX
979 OpAMD64MOVLQZX
980 OpAMD64MOVLconst
981 OpAMD64MOVQconst
982 OpAMD64CVTTSD2SL
983 OpAMD64CVTTSD2SQ
984 OpAMD64CVTTSS2SL
985 OpAMD64CVTTSS2SQ
986 OpAMD64CVTSL2SS
987 OpAMD64CVTSL2SD
988 OpAMD64CVTSQ2SS
989 OpAMD64CVTSQ2SD
990 OpAMD64CVTSD2SS
991 OpAMD64CVTSS2SD
992 OpAMD64MOVQi2f
993 OpAMD64MOVQf2i
994 OpAMD64MOVLi2f
995 OpAMD64MOVLf2i
996 OpAMD64PXOR
997 OpAMD64POR
998 OpAMD64LEAQ
999 OpAMD64LEAL
1000 OpAMD64LEAW
1001 OpAMD64LEAQ1
1002 OpAMD64LEAL1
1003 OpAMD64LEAW1
1004 OpAMD64LEAQ2
1005 OpAMD64LEAL2
1006 OpAMD64LEAW2
1007 OpAMD64LEAQ4
1008 OpAMD64LEAL4
1009 OpAMD64LEAW4
1010 OpAMD64LEAQ8
1011 OpAMD64LEAL8
1012 OpAMD64LEAW8
1013 OpAMD64MOVBload
1014 OpAMD64MOVBQSXload
1015 OpAMD64MOVWload
1016 OpAMD64MOVWQSXload
1017 OpAMD64MOVLload
1018 OpAMD64MOVLQSXload
1019 OpAMD64MOVQload
1020 OpAMD64MOVBstore
1021 OpAMD64MOVWstore
1022 OpAMD64MOVLstore
1023 OpAMD64MOVQstore
1024 OpAMD64MOVOload
1025 OpAMD64MOVOstore
1026 OpAMD64MOVBloadidx1
1027 OpAMD64MOVWloadidx1
1028 OpAMD64MOVWloadidx2
1029 OpAMD64MOVLloadidx1
1030 OpAMD64MOVLloadidx4
1031 OpAMD64MOVLloadidx8
1032 OpAMD64MOVQloadidx1
1033 OpAMD64MOVQloadidx8
1034 OpAMD64MOVBstoreidx1
1035 OpAMD64MOVWstoreidx1
1036 OpAMD64MOVWstoreidx2
1037 OpAMD64MOVLstoreidx1
1038 OpAMD64MOVLstoreidx4
1039 OpAMD64MOVLstoreidx8
1040 OpAMD64MOVQstoreidx1
1041 OpAMD64MOVQstoreidx8
1042 OpAMD64MOVBstoreconst
1043 OpAMD64MOVWstoreconst
1044 OpAMD64MOVLstoreconst
1045 OpAMD64MOVQstoreconst
1046 OpAMD64MOVOstoreconst
1047 OpAMD64MOVBstoreconstidx1
1048 OpAMD64MOVWstoreconstidx1
1049 OpAMD64MOVWstoreconstidx2
1050 OpAMD64MOVLstoreconstidx1
1051 OpAMD64MOVLstoreconstidx4
1052 OpAMD64MOVQstoreconstidx1
1053 OpAMD64MOVQstoreconstidx8
1054 OpAMD64DUFFZERO
1055 OpAMD64REPSTOSQ
1056 OpAMD64CALLstatic
1057 OpAMD64CALLtail
1058 OpAMD64CALLclosure
1059 OpAMD64CALLinter
1060 OpAMD64DUFFCOPY
1061 OpAMD64REPMOVSQ
1062 OpAMD64InvertFlags
1063 OpAMD64LoweredGetG
1064 OpAMD64LoweredGetClosurePtr
1065 OpAMD64LoweredGetCallerPC
1066 OpAMD64LoweredGetCallerSP
1067 OpAMD64LoweredNilCheck
1068 OpAMD64LoweredWB
1069 OpAMD64LoweredHasCPUFeature
1070 OpAMD64LoweredPanicBoundsA
1071 OpAMD64LoweredPanicBoundsB
1072 OpAMD64LoweredPanicBoundsC
1073 OpAMD64FlagEQ
1074 OpAMD64FlagLT_ULT
1075 OpAMD64FlagLT_UGT
1076 OpAMD64FlagGT_UGT
1077 OpAMD64FlagGT_ULT
1078 OpAMD64MOVBatomicload
1079 OpAMD64MOVLatomicload
1080 OpAMD64MOVQatomicload
1081 OpAMD64XCHGB
1082 OpAMD64XCHGL
1083 OpAMD64XCHGQ
1084 OpAMD64XADDLlock
1085 OpAMD64XADDQlock
1086 OpAMD64AddTupleFirst32
1087 OpAMD64AddTupleFirst64
1088 OpAMD64CMPXCHGLlock
1089 OpAMD64CMPXCHGQlock
1090 OpAMD64ANDBlock
1091 OpAMD64ANDLlock
1092 OpAMD64ANDQlock
1093 OpAMD64ORBlock
1094 OpAMD64ORLlock
1095 OpAMD64ORQlock
1096 OpAMD64LoweredAtomicAnd64
1097 OpAMD64LoweredAtomicAnd32
1098 OpAMD64LoweredAtomicOr64
1099 OpAMD64LoweredAtomicOr32
1100 OpAMD64PrefetchT0
1101 OpAMD64PrefetchNTA
1102 OpAMD64ANDNQ
1103 OpAMD64ANDNL
1104 OpAMD64BLSIQ
1105 OpAMD64BLSIL
1106 OpAMD64BLSMSKQ
1107 OpAMD64BLSMSKL
1108 OpAMD64BLSRQ
1109 OpAMD64BLSRL
1110 OpAMD64TZCNTQ
1111 OpAMD64TZCNTL
1112 OpAMD64LZCNTQ
1113 OpAMD64LZCNTL
1114 OpAMD64MOVBEWstore
1115 OpAMD64MOVBELload
1116 OpAMD64MOVBELstore
1117 OpAMD64MOVBEQload
1118 OpAMD64MOVBEQstore
1119 OpAMD64MOVBELloadidx1
1120 OpAMD64MOVBELloadidx4
1121 OpAMD64MOVBELloadidx8
1122 OpAMD64MOVBEQloadidx1
1123 OpAMD64MOVBEQloadidx8
1124 OpAMD64MOVBEWstoreidx1
1125 OpAMD64MOVBEWstoreidx2
1126 OpAMD64MOVBELstoreidx1
1127 OpAMD64MOVBELstoreidx4
1128 OpAMD64MOVBELstoreidx8
1129 OpAMD64MOVBEQstoreidx1
1130 OpAMD64MOVBEQstoreidx8
1131 OpAMD64SARXQ
1132 OpAMD64SARXL
1133 OpAMD64SHLXQ
1134 OpAMD64SHLXL
1135 OpAMD64SHRXQ
1136 OpAMD64SHRXL
1137 OpAMD64SARXLload
1138 OpAMD64SARXQload
1139 OpAMD64SHLXLload
1140 OpAMD64SHLXQload
1141 OpAMD64SHRXLload
1142 OpAMD64SHRXQload
1143 OpAMD64SARXLloadidx1
1144 OpAMD64SARXLloadidx4
1145 OpAMD64SARXLloadidx8
1146 OpAMD64SARXQloadidx1
1147 OpAMD64SARXQloadidx8
1148 OpAMD64SHLXLloadidx1
1149 OpAMD64SHLXLloadidx4
1150 OpAMD64SHLXLloadidx8
1151 OpAMD64SHLXQloadidx1
1152 OpAMD64SHLXQloadidx8
1153 OpAMD64SHRXLloadidx1
1154 OpAMD64SHRXLloadidx4
1155 OpAMD64SHRXLloadidx8
1156 OpAMD64SHRXQloadidx1
1157 OpAMD64SHRXQloadidx8
1158 OpAMD64PUNPCKLBW
1159 OpAMD64PSHUFLW
1160 OpAMD64PSHUFBbroadcast
1161 OpAMD64VPBROADCASTB
1162 OpAMD64PSIGNB
1163 OpAMD64PCMPEQB
1164 OpAMD64PMOVMSKB
1165
1166 OpARMADD
1167 OpARMADDconst
1168 OpARMSUB
1169 OpARMSUBconst
1170 OpARMRSB
1171 OpARMRSBconst
1172 OpARMMUL
1173 OpARMHMUL
1174 OpARMHMULU
1175 OpARMCALLudiv
1176 OpARMADDS
1177 OpARMADDSconst
1178 OpARMADC
1179 OpARMADCconst
1180 OpARMSUBS
1181 OpARMSUBSconst
1182 OpARMRSBSconst
1183 OpARMSBC
1184 OpARMSBCconst
1185 OpARMRSCconst
1186 OpARMMULLU
1187 OpARMMULA
1188 OpARMMULS
1189 OpARMADDF
1190 OpARMADDD
1191 OpARMSUBF
1192 OpARMSUBD
1193 OpARMMULF
1194 OpARMMULD
1195 OpARMNMULF
1196 OpARMNMULD
1197 OpARMDIVF
1198 OpARMDIVD
1199 OpARMMULAF
1200 OpARMMULAD
1201 OpARMMULSF
1202 OpARMMULSD
1203 OpARMFMULAD
1204 OpARMAND
1205 OpARMANDconst
1206 OpARMOR
1207 OpARMORconst
1208 OpARMXOR
1209 OpARMXORconst
1210 OpARMBIC
1211 OpARMBICconst
1212 OpARMBFX
1213 OpARMBFXU
1214 OpARMMVN
1215 OpARMNEGF
1216 OpARMNEGD
1217 OpARMSQRTD
1218 OpARMSQRTF
1219 OpARMABSD
1220 OpARMCLZ
1221 OpARMREV
1222 OpARMREV16
1223 OpARMRBIT
1224 OpARMSLL
1225 OpARMSLLconst
1226 OpARMSRL
1227 OpARMSRLconst
1228 OpARMSRA
1229 OpARMSRAconst
1230 OpARMSRR
1231 OpARMSRRconst
1232 OpARMADDshiftLL
1233 OpARMADDshiftRL
1234 OpARMADDshiftRA
1235 OpARMSUBshiftLL
1236 OpARMSUBshiftRL
1237 OpARMSUBshiftRA
1238 OpARMRSBshiftLL
1239 OpARMRSBshiftRL
1240 OpARMRSBshiftRA
1241 OpARMANDshiftLL
1242 OpARMANDshiftRL
1243 OpARMANDshiftRA
1244 OpARMORshiftLL
1245 OpARMORshiftRL
1246 OpARMORshiftRA
1247 OpARMXORshiftLL
1248 OpARMXORshiftRL
1249 OpARMXORshiftRA
1250 OpARMXORshiftRR
1251 OpARMBICshiftLL
1252 OpARMBICshiftRL
1253 OpARMBICshiftRA
1254 OpARMMVNshiftLL
1255 OpARMMVNshiftRL
1256 OpARMMVNshiftRA
1257 OpARMADCshiftLL
1258 OpARMADCshiftRL
1259 OpARMADCshiftRA
1260 OpARMSBCshiftLL
1261 OpARMSBCshiftRL
1262 OpARMSBCshiftRA
1263 OpARMRSCshiftLL
1264 OpARMRSCshiftRL
1265 OpARMRSCshiftRA
1266 OpARMADDSshiftLL
1267 OpARMADDSshiftRL
1268 OpARMADDSshiftRA
1269 OpARMSUBSshiftLL
1270 OpARMSUBSshiftRL
1271 OpARMSUBSshiftRA
1272 OpARMRSBSshiftLL
1273 OpARMRSBSshiftRL
1274 OpARMRSBSshiftRA
1275 OpARMADDshiftLLreg
1276 OpARMADDshiftRLreg
1277 OpARMADDshiftRAreg
1278 OpARMSUBshiftLLreg
1279 OpARMSUBshiftRLreg
1280 OpARMSUBshiftRAreg
1281 OpARMRSBshiftLLreg
1282 OpARMRSBshiftRLreg
1283 OpARMRSBshiftRAreg
1284 OpARMANDshiftLLreg
1285 OpARMANDshiftRLreg
1286 OpARMANDshiftRAreg
1287 OpARMORshiftLLreg
1288 OpARMORshiftRLreg
1289 OpARMORshiftRAreg
1290 OpARMXORshiftLLreg
1291 OpARMXORshiftRLreg
1292 OpARMXORshiftRAreg
1293 OpARMBICshiftLLreg
1294 OpARMBICshiftRLreg
1295 OpARMBICshiftRAreg
1296 OpARMMVNshiftLLreg
1297 OpARMMVNshiftRLreg
1298 OpARMMVNshiftRAreg
1299 OpARMADCshiftLLreg
1300 OpARMADCshiftRLreg
1301 OpARMADCshiftRAreg
1302 OpARMSBCshiftLLreg
1303 OpARMSBCshiftRLreg
1304 OpARMSBCshiftRAreg
1305 OpARMRSCshiftLLreg
1306 OpARMRSCshiftRLreg
1307 OpARMRSCshiftRAreg
1308 OpARMADDSshiftLLreg
1309 OpARMADDSshiftRLreg
1310 OpARMADDSshiftRAreg
1311 OpARMSUBSshiftLLreg
1312 OpARMSUBSshiftRLreg
1313 OpARMSUBSshiftRAreg
1314 OpARMRSBSshiftLLreg
1315 OpARMRSBSshiftRLreg
1316 OpARMRSBSshiftRAreg
1317 OpARMCMP
1318 OpARMCMPconst
1319 OpARMCMN
1320 OpARMCMNconst
1321 OpARMTST
1322 OpARMTSTconst
1323 OpARMTEQ
1324 OpARMTEQconst
1325 OpARMCMPF
1326 OpARMCMPD
1327 OpARMCMPshiftLL
1328 OpARMCMPshiftRL
1329 OpARMCMPshiftRA
1330 OpARMCMNshiftLL
1331 OpARMCMNshiftRL
1332 OpARMCMNshiftRA
1333 OpARMTSTshiftLL
1334 OpARMTSTshiftRL
1335 OpARMTSTshiftRA
1336 OpARMTEQshiftLL
1337 OpARMTEQshiftRL
1338 OpARMTEQshiftRA
1339 OpARMCMPshiftLLreg
1340 OpARMCMPshiftRLreg
1341 OpARMCMPshiftRAreg
1342 OpARMCMNshiftLLreg
1343 OpARMCMNshiftRLreg
1344 OpARMCMNshiftRAreg
1345 OpARMTSTshiftLLreg
1346 OpARMTSTshiftRLreg
1347 OpARMTSTshiftRAreg
1348 OpARMTEQshiftLLreg
1349 OpARMTEQshiftRLreg
1350 OpARMTEQshiftRAreg
1351 OpARMCMPF0
1352 OpARMCMPD0
1353 OpARMMOVWconst
1354 OpARMMOVFconst
1355 OpARMMOVDconst
1356 OpARMMOVWaddr
1357 OpARMMOVBload
1358 OpARMMOVBUload
1359 OpARMMOVHload
1360 OpARMMOVHUload
1361 OpARMMOVWload
1362 OpARMMOVFload
1363 OpARMMOVDload
1364 OpARMMOVBstore
1365 OpARMMOVHstore
1366 OpARMMOVWstore
1367 OpARMMOVFstore
1368 OpARMMOVDstore
1369 OpARMMOVWloadidx
1370 OpARMMOVWloadshiftLL
1371 OpARMMOVWloadshiftRL
1372 OpARMMOVWloadshiftRA
1373 OpARMMOVBUloadidx
1374 OpARMMOVBloadidx
1375 OpARMMOVHUloadidx
1376 OpARMMOVHloadidx
1377 OpARMMOVWstoreidx
1378 OpARMMOVWstoreshiftLL
1379 OpARMMOVWstoreshiftRL
1380 OpARMMOVWstoreshiftRA
1381 OpARMMOVBstoreidx
1382 OpARMMOVHstoreidx
1383 OpARMMOVBreg
1384 OpARMMOVBUreg
1385 OpARMMOVHreg
1386 OpARMMOVHUreg
1387 OpARMMOVWreg
1388 OpARMMOVWnop
1389 OpARMMOVWF
1390 OpARMMOVWD
1391 OpARMMOVWUF
1392 OpARMMOVWUD
1393 OpARMMOVFW
1394 OpARMMOVDW
1395 OpARMMOVFWU
1396 OpARMMOVDWU
1397 OpARMMOVFD
1398 OpARMMOVDF
1399 OpARMCMOVWHSconst
1400 OpARMCMOVWLSconst
1401 OpARMSRAcond
1402 OpARMCALLstatic
1403 OpARMCALLtail
1404 OpARMCALLclosure
1405 OpARMCALLinter
1406 OpARMLoweredNilCheck
1407 OpARMEqual
1408 OpARMNotEqual
1409 OpARMLessThan
1410 OpARMLessEqual
1411 OpARMGreaterThan
1412 OpARMGreaterEqual
1413 OpARMLessThanU
1414 OpARMLessEqualU
1415 OpARMGreaterThanU
1416 OpARMGreaterEqualU
1417 OpARMDUFFZERO
1418 OpARMDUFFCOPY
1419 OpARMLoweredZero
1420 OpARMLoweredMove
1421 OpARMLoweredGetClosurePtr
1422 OpARMLoweredGetCallerSP
1423 OpARMLoweredGetCallerPC
1424 OpARMLoweredPanicBoundsA
1425 OpARMLoweredPanicBoundsB
1426 OpARMLoweredPanicBoundsC
1427 OpARMLoweredPanicExtendA
1428 OpARMLoweredPanicExtendB
1429 OpARMLoweredPanicExtendC
1430 OpARMFlagConstant
1431 OpARMInvertFlags
1432 OpARMLoweredWB
1433
1434 OpARM64ADCSflags
1435 OpARM64ADCzerocarry
1436 OpARM64ADD
1437 OpARM64ADDconst
1438 OpARM64ADDSconstflags
1439 OpARM64ADDSflags
1440 OpARM64SUB
1441 OpARM64SUBconst
1442 OpARM64SBCSflags
1443 OpARM64SUBSflags
1444 OpARM64MUL
1445 OpARM64MULW
1446 OpARM64MNEG
1447 OpARM64MNEGW
1448 OpARM64MULH
1449 OpARM64UMULH
1450 OpARM64MULL
1451 OpARM64UMULL
1452 OpARM64DIV
1453 OpARM64UDIV
1454 OpARM64DIVW
1455 OpARM64UDIVW
1456 OpARM64MOD
1457 OpARM64UMOD
1458 OpARM64MODW
1459 OpARM64UMODW
1460 OpARM64FADDS
1461 OpARM64FADDD
1462 OpARM64FSUBS
1463 OpARM64FSUBD
1464 OpARM64FMULS
1465 OpARM64FMULD
1466 OpARM64FNMULS
1467 OpARM64FNMULD
1468 OpARM64FDIVS
1469 OpARM64FDIVD
1470 OpARM64AND
1471 OpARM64ANDconst
1472 OpARM64OR
1473 OpARM64ORconst
1474 OpARM64XOR
1475 OpARM64XORconst
1476 OpARM64BIC
1477 OpARM64EON
1478 OpARM64ORN
1479 OpARM64MVN
1480 OpARM64NEG
1481 OpARM64NEGSflags
1482 OpARM64NGCzerocarry
1483 OpARM64FABSD
1484 OpARM64FNEGS
1485 OpARM64FNEGD
1486 OpARM64FSQRTD
1487 OpARM64FSQRTS
1488 OpARM64FMIND
1489 OpARM64FMINS
1490 OpARM64FMAXD
1491 OpARM64FMAXS
1492 OpARM64REV
1493 OpARM64REVW
1494 OpARM64REV16
1495 OpARM64REV16W
1496 OpARM64RBIT
1497 OpARM64RBITW
1498 OpARM64CLZ
1499 OpARM64CLZW
1500 OpARM64VCNT
1501 OpARM64VUADDLV
1502 OpARM64LoweredRound32F
1503 OpARM64LoweredRound64F
1504 OpARM64FMADDS
1505 OpARM64FMADDD
1506 OpARM64FNMADDS
1507 OpARM64FNMADDD
1508 OpARM64FMSUBS
1509 OpARM64FMSUBD
1510 OpARM64FNMSUBS
1511 OpARM64FNMSUBD
1512 OpARM64MADD
1513 OpARM64MADDW
1514 OpARM64MSUB
1515 OpARM64MSUBW
1516 OpARM64SLL
1517 OpARM64SLLconst
1518 OpARM64SRL
1519 OpARM64SRLconst
1520 OpARM64SRA
1521 OpARM64SRAconst
1522 OpARM64ROR
1523 OpARM64RORW
1524 OpARM64RORconst
1525 OpARM64RORWconst
1526 OpARM64EXTRconst
1527 OpARM64EXTRWconst
1528 OpARM64CMP
1529 OpARM64CMPconst
1530 OpARM64CMPW
1531 OpARM64CMPWconst
1532 OpARM64CMN
1533 OpARM64CMNconst
1534 OpARM64CMNW
1535 OpARM64CMNWconst
1536 OpARM64TST
1537 OpARM64TSTconst
1538 OpARM64TSTW
1539 OpARM64TSTWconst
1540 OpARM64FCMPS
1541 OpARM64FCMPD
1542 OpARM64FCMPS0
1543 OpARM64FCMPD0
1544 OpARM64MVNshiftLL
1545 OpARM64MVNshiftRL
1546 OpARM64MVNshiftRA
1547 OpARM64MVNshiftRO
1548 OpARM64NEGshiftLL
1549 OpARM64NEGshiftRL
1550 OpARM64NEGshiftRA
1551 OpARM64ADDshiftLL
1552 OpARM64ADDshiftRL
1553 OpARM64ADDshiftRA
1554 OpARM64SUBshiftLL
1555 OpARM64SUBshiftRL
1556 OpARM64SUBshiftRA
1557 OpARM64ANDshiftLL
1558 OpARM64ANDshiftRL
1559 OpARM64ANDshiftRA
1560 OpARM64ANDshiftRO
1561 OpARM64ORshiftLL
1562 OpARM64ORshiftRL
1563 OpARM64ORshiftRA
1564 OpARM64ORshiftRO
1565 OpARM64XORshiftLL
1566 OpARM64XORshiftRL
1567 OpARM64XORshiftRA
1568 OpARM64XORshiftRO
1569 OpARM64BICshiftLL
1570 OpARM64BICshiftRL
1571 OpARM64BICshiftRA
1572 OpARM64BICshiftRO
1573 OpARM64EONshiftLL
1574 OpARM64EONshiftRL
1575 OpARM64EONshiftRA
1576 OpARM64EONshiftRO
1577 OpARM64ORNshiftLL
1578 OpARM64ORNshiftRL
1579 OpARM64ORNshiftRA
1580 OpARM64ORNshiftRO
1581 OpARM64CMPshiftLL
1582 OpARM64CMPshiftRL
1583 OpARM64CMPshiftRA
1584 OpARM64CMNshiftLL
1585 OpARM64CMNshiftRL
1586 OpARM64CMNshiftRA
1587 OpARM64TSTshiftLL
1588 OpARM64TSTshiftRL
1589 OpARM64TSTshiftRA
1590 OpARM64TSTshiftRO
1591 OpARM64BFI
1592 OpARM64BFXIL
1593 OpARM64SBFIZ
1594 OpARM64SBFX
1595 OpARM64UBFIZ
1596 OpARM64UBFX
1597 OpARM64MOVDconst
1598 OpARM64FMOVSconst
1599 OpARM64FMOVDconst
1600 OpARM64MOVDaddr
1601 OpARM64MOVBload
1602 OpARM64MOVBUload
1603 OpARM64MOVHload
1604 OpARM64MOVHUload
1605 OpARM64MOVWload
1606 OpARM64MOVWUload
1607 OpARM64MOVDload
1608 OpARM64FMOVSload
1609 OpARM64FMOVDload
1610 OpARM64LDP
1611 OpARM64LDPW
1612 OpARM64LDPSW
1613 OpARM64FLDPD
1614 OpARM64FLDPS
1615 OpARM64MOVDloadidx
1616 OpARM64MOVWloadidx
1617 OpARM64MOVWUloadidx
1618 OpARM64MOVHloadidx
1619 OpARM64MOVHUloadidx
1620 OpARM64MOVBloadidx
1621 OpARM64MOVBUloadidx
1622 OpARM64FMOVSloadidx
1623 OpARM64FMOVDloadidx
1624 OpARM64MOVHloadidx2
1625 OpARM64MOVHUloadidx2
1626 OpARM64MOVWloadidx4
1627 OpARM64MOVWUloadidx4
1628 OpARM64MOVDloadidx8
1629 OpARM64FMOVSloadidx4
1630 OpARM64FMOVDloadidx8
1631 OpARM64MOVBstore
1632 OpARM64MOVHstore
1633 OpARM64MOVWstore
1634 OpARM64MOVDstore
1635 OpARM64FMOVSstore
1636 OpARM64FMOVDstore
1637 OpARM64STP
1638 OpARM64STPW
1639 OpARM64FSTPD
1640 OpARM64FSTPS
1641 OpARM64MOVBstoreidx
1642 OpARM64MOVHstoreidx
1643 OpARM64MOVWstoreidx
1644 OpARM64MOVDstoreidx
1645 OpARM64FMOVSstoreidx
1646 OpARM64FMOVDstoreidx
1647 OpARM64MOVHstoreidx2
1648 OpARM64MOVWstoreidx4
1649 OpARM64MOVDstoreidx8
1650 OpARM64FMOVSstoreidx4
1651 OpARM64FMOVDstoreidx8
1652 OpARM64FMOVDgpfp
1653 OpARM64FMOVDfpgp
1654 OpARM64FMOVSgpfp
1655 OpARM64FMOVSfpgp
1656 OpARM64MOVBreg
1657 OpARM64MOVBUreg
1658 OpARM64MOVHreg
1659 OpARM64MOVHUreg
1660 OpARM64MOVWreg
1661 OpARM64MOVWUreg
1662 OpARM64MOVDreg
1663 OpARM64MOVDnop
1664 OpARM64SCVTFWS
1665 OpARM64SCVTFWD
1666 OpARM64UCVTFWS
1667 OpARM64UCVTFWD
1668 OpARM64SCVTFS
1669 OpARM64SCVTFD
1670 OpARM64UCVTFS
1671 OpARM64UCVTFD
1672 OpARM64FCVTZSSW
1673 OpARM64FCVTZSDW
1674 OpARM64FCVTZUSW
1675 OpARM64FCVTZUDW
1676 OpARM64FCVTZSS
1677 OpARM64FCVTZSD
1678 OpARM64FCVTZUS
1679 OpARM64FCVTZUD
1680 OpARM64FCVTSD
1681 OpARM64FCVTDS
1682 OpARM64FRINTAD
1683 OpARM64FRINTMD
1684 OpARM64FRINTND
1685 OpARM64FRINTPD
1686 OpARM64FRINTZD
1687 OpARM64CSEL
1688 OpARM64CSEL0
1689 OpARM64CSINC
1690 OpARM64CSINV
1691 OpARM64CSNEG
1692 OpARM64CSETM
1693 OpARM64CALLstatic
1694 OpARM64CALLtail
1695 OpARM64CALLclosure
1696 OpARM64CALLinter
1697 OpARM64LoweredNilCheck
1698 OpARM64Equal
1699 OpARM64NotEqual
1700 OpARM64LessThan
1701 OpARM64LessEqual
1702 OpARM64GreaterThan
1703 OpARM64GreaterEqual
1704 OpARM64LessThanU
1705 OpARM64LessEqualU
1706 OpARM64GreaterThanU
1707 OpARM64GreaterEqualU
1708 OpARM64LessThanF
1709 OpARM64LessEqualF
1710 OpARM64GreaterThanF
1711 OpARM64GreaterEqualF
1712 OpARM64NotLessThanF
1713 OpARM64NotLessEqualF
1714 OpARM64NotGreaterThanF
1715 OpARM64NotGreaterEqualF
1716 OpARM64LessThanNoov
1717 OpARM64GreaterEqualNoov
1718 OpARM64DUFFZERO
1719 OpARM64LoweredZero
1720 OpARM64DUFFCOPY
1721 OpARM64LoweredMove
1722 OpARM64LoweredGetClosurePtr
1723 OpARM64LoweredGetCallerSP
1724 OpARM64LoweredGetCallerPC
1725 OpARM64FlagConstant
1726 OpARM64InvertFlags
1727 OpARM64LDAR
1728 OpARM64LDARB
1729 OpARM64LDARW
1730 OpARM64STLRB
1731 OpARM64STLR
1732 OpARM64STLRW
1733 OpARM64LoweredAtomicExchange64
1734 OpARM64LoweredAtomicExchange32
1735 OpARM64LoweredAtomicExchange8
1736 OpARM64LoweredAtomicExchange64Variant
1737 OpARM64LoweredAtomicExchange32Variant
1738 OpARM64LoweredAtomicExchange8Variant
1739 OpARM64LoweredAtomicAdd64
1740 OpARM64LoweredAtomicAdd32
1741 OpARM64LoweredAtomicAdd64Variant
1742 OpARM64LoweredAtomicAdd32Variant
1743 OpARM64LoweredAtomicCas64
1744 OpARM64LoweredAtomicCas32
1745 OpARM64LoweredAtomicCas64Variant
1746 OpARM64LoweredAtomicCas32Variant
1747 OpARM64LoweredAtomicAnd8
1748 OpARM64LoweredAtomicOr8
1749 OpARM64LoweredAtomicAnd64
1750 OpARM64LoweredAtomicOr64
1751 OpARM64LoweredAtomicAnd32
1752 OpARM64LoweredAtomicOr32
1753 OpARM64LoweredAtomicAnd8Variant
1754 OpARM64LoweredAtomicOr8Variant
1755 OpARM64LoweredAtomicAnd64Variant
1756 OpARM64LoweredAtomicOr64Variant
1757 OpARM64LoweredAtomicAnd32Variant
1758 OpARM64LoweredAtomicOr32Variant
1759 OpARM64LoweredWB
1760 OpARM64LoweredPanicBoundsA
1761 OpARM64LoweredPanicBoundsB
1762 OpARM64LoweredPanicBoundsC
1763 OpARM64PRFM
1764 OpARM64DMB
1765 OpARM64ZERO
1766
1767 OpLOONG64NEGV
1768 OpLOONG64NEGF
1769 OpLOONG64NEGD
1770 OpLOONG64SQRTD
1771 OpLOONG64SQRTF
1772 OpLOONG64ABSD
1773 OpLOONG64CLZW
1774 OpLOONG64CLZV
1775 OpLOONG64CTZW
1776 OpLOONG64CTZV
1777 OpLOONG64REVB2H
1778 OpLOONG64REVB2W
1779 OpLOONG64REVBV
1780 OpLOONG64BITREV4B
1781 OpLOONG64BITREVW
1782 OpLOONG64BITREVV
1783 OpLOONG64VPCNT64
1784 OpLOONG64VPCNT32
1785 OpLOONG64VPCNT16
1786 OpLOONG64ADDV
1787 OpLOONG64ADDVconst
1788 OpLOONG64SUBV
1789 OpLOONG64SUBVconst
1790 OpLOONG64MULV
1791 OpLOONG64MULHV
1792 OpLOONG64MULHVU
1793 OpLOONG64DIVV
1794 OpLOONG64DIVVU
1795 OpLOONG64REMV
1796 OpLOONG64REMVU
1797 OpLOONG64ADDF
1798 OpLOONG64ADDD
1799 OpLOONG64SUBF
1800 OpLOONG64SUBD
1801 OpLOONG64MULF
1802 OpLOONG64MULD
1803 OpLOONG64DIVF
1804 OpLOONG64DIVD
1805 OpLOONG64AND
1806 OpLOONG64ANDconst
1807 OpLOONG64OR
1808 OpLOONG64ORconst
1809 OpLOONG64XOR
1810 OpLOONG64XORconst
1811 OpLOONG64NOR
1812 OpLOONG64NORconst
1813 OpLOONG64ANDN
1814 OpLOONG64ORN
1815 OpLOONG64FMADDF
1816 OpLOONG64FMADDD
1817 OpLOONG64FMSUBF
1818 OpLOONG64FMSUBD
1819 OpLOONG64FNMADDF
1820 OpLOONG64FNMADDD
1821 OpLOONG64FNMSUBF
1822 OpLOONG64FNMSUBD
1823 OpLOONG64FMINF
1824 OpLOONG64FMIND
1825 OpLOONG64FMAXF
1826 OpLOONG64FMAXD
1827 OpLOONG64MASKEQZ
1828 OpLOONG64MASKNEZ
1829 OpLOONG64FCOPYSGD
1830 OpLOONG64SLL
1831 OpLOONG64SLLV
1832 OpLOONG64SLLconst
1833 OpLOONG64SLLVconst
1834 OpLOONG64SRL
1835 OpLOONG64SRLV
1836 OpLOONG64SRLconst
1837 OpLOONG64SRLVconst
1838 OpLOONG64SRA
1839 OpLOONG64SRAV
1840 OpLOONG64SRAconst
1841 OpLOONG64SRAVconst
1842 OpLOONG64ROTR
1843 OpLOONG64ROTRV
1844 OpLOONG64ROTRconst
1845 OpLOONG64ROTRVconst
1846 OpLOONG64SGT
1847 OpLOONG64SGTconst
1848 OpLOONG64SGTU
1849 OpLOONG64SGTUconst
1850 OpLOONG64CMPEQF
1851 OpLOONG64CMPEQD
1852 OpLOONG64CMPGEF
1853 OpLOONG64CMPGED
1854 OpLOONG64CMPGTF
1855 OpLOONG64CMPGTD
1856 OpLOONG64BSTRPICKW
1857 OpLOONG64BSTRPICKV
1858 OpLOONG64MOVVconst
1859 OpLOONG64MOVFconst
1860 OpLOONG64MOVDconst
1861 OpLOONG64MOVVaddr
1862 OpLOONG64MOVBload
1863 OpLOONG64MOVBUload
1864 OpLOONG64MOVHload
1865 OpLOONG64MOVHUload
1866 OpLOONG64MOVWload
1867 OpLOONG64MOVWUload
1868 OpLOONG64MOVVload
1869 OpLOONG64MOVFload
1870 OpLOONG64MOVDload
1871 OpLOONG64MOVVloadidx
1872 OpLOONG64MOVWloadidx
1873 OpLOONG64MOVWUloadidx
1874 OpLOONG64MOVHloadidx
1875 OpLOONG64MOVHUloadidx
1876 OpLOONG64MOVBloadidx
1877 OpLOONG64MOVBUloadidx
1878 OpLOONG64MOVFloadidx
1879 OpLOONG64MOVDloadidx
1880 OpLOONG64MOVBstore
1881 OpLOONG64MOVHstore
1882 OpLOONG64MOVWstore
1883 OpLOONG64MOVVstore
1884 OpLOONG64MOVFstore
1885 OpLOONG64MOVDstore
1886 OpLOONG64MOVBstoreidx
1887 OpLOONG64MOVHstoreidx
1888 OpLOONG64MOVWstoreidx
1889 OpLOONG64MOVVstoreidx
1890 OpLOONG64MOVFstoreidx
1891 OpLOONG64MOVDstoreidx
1892 OpLOONG64MOVBstorezero
1893 OpLOONG64MOVHstorezero
1894 OpLOONG64MOVWstorezero
1895 OpLOONG64MOVVstorezero
1896 OpLOONG64MOVBstorezeroidx
1897 OpLOONG64MOVHstorezeroidx
1898 OpLOONG64MOVWstorezeroidx
1899 OpLOONG64MOVVstorezeroidx
1900 OpLOONG64MOVWfpgp
1901 OpLOONG64MOVWgpfp
1902 OpLOONG64MOVVfpgp
1903 OpLOONG64MOVVgpfp
1904 OpLOONG64MOVBreg
1905 OpLOONG64MOVBUreg
1906 OpLOONG64MOVHreg
1907 OpLOONG64MOVHUreg
1908 OpLOONG64MOVWreg
1909 OpLOONG64MOVWUreg
1910 OpLOONG64MOVVreg
1911 OpLOONG64MOVVnop
1912 OpLOONG64MOVWF
1913 OpLOONG64MOVWD
1914 OpLOONG64MOVVF
1915 OpLOONG64MOVVD
1916 OpLOONG64TRUNCFW
1917 OpLOONG64TRUNCDW
1918 OpLOONG64TRUNCFV
1919 OpLOONG64TRUNCDV
1920 OpLOONG64MOVFD
1921 OpLOONG64MOVDF
1922 OpLOONG64LoweredRound32F
1923 OpLOONG64LoweredRound64F
1924 OpLOONG64CALLstatic
1925 OpLOONG64CALLtail
1926 OpLOONG64CALLclosure
1927 OpLOONG64CALLinter
1928 OpLOONG64DUFFZERO
1929 OpLOONG64DUFFCOPY
1930 OpLOONG64LoweredZero
1931 OpLOONG64LoweredMove
1932 OpLOONG64LoweredAtomicLoad8
1933 OpLOONG64LoweredAtomicLoad32
1934 OpLOONG64LoweredAtomicLoad64
1935 OpLOONG64LoweredAtomicStore8
1936 OpLOONG64LoweredAtomicStore32
1937 OpLOONG64LoweredAtomicStore64
1938 OpLOONG64LoweredAtomicStore8Variant
1939 OpLOONG64LoweredAtomicStore32Variant
1940 OpLOONG64LoweredAtomicStore64Variant
1941 OpLOONG64LoweredAtomicExchange32
1942 OpLOONG64LoweredAtomicExchange64
1943 OpLOONG64LoweredAtomicExchange8Variant
1944 OpLOONG64LoweredAtomicAdd32
1945 OpLOONG64LoweredAtomicAdd64
1946 OpLOONG64LoweredAtomicCas32
1947 OpLOONG64LoweredAtomicCas64
1948 OpLOONG64LoweredAtomicCas64Variant
1949 OpLOONG64LoweredAtomicCas32Variant
1950 OpLOONG64LoweredAtomicAnd32
1951 OpLOONG64LoweredAtomicOr32
1952 OpLOONG64LoweredAtomicAnd32value
1953 OpLOONG64LoweredAtomicAnd64value
1954 OpLOONG64LoweredAtomicOr32value
1955 OpLOONG64LoweredAtomicOr64value
1956 OpLOONG64LoweredNilCheck
1957 OpLOONG64FPFlagTrue
1958 OpLOONG64FPFlagFalse
1959 OpLOONG64LoweredGetClosurePtr
1960 OpLOONG64LoweredGetCallerSP
1961 OpLOONG64LoweredGetCallerPC
1962 OpLOONG64LoweredWB
1963 OpLOONG64LoweredPubBarrier
1964 OpLOONG64LoweredPanicBoundsA
1965 OpLOONG64LoweredPanicBoundsB
1966 OpLOONG64LoweredPanicBoundsC
1967 OpLOONG64PRELD
1968 OpLOONG64PRELDX
1969
1970 OpMIPSADD
1971 OpMIPSADDconst
1972 OpMIPSSUB
1973 OpMIPSSUBconst
1974 OpMIPSMUL
1975 OpMIPSMULT
1976 OpMIPSMULTU
1977 OpMIPSDIV
1978 OpMIPSDIVU
1979 OpMIPSADDF
1980 OpMIPSADDD
1981 OpMIPSSUBF
1982 OpMIPSSUBD
1983 OpMIPSMULF
1984 OpMIPSMULD
1985 OpMIPSDIVF
1986 OpMIPSDIVD
1987 OpMIPSAND
1988 OpMIPSANDconst
1989 OpMIPSOR
1990 OpMIPSORconst
1991 OpMIPSXOR
1992 OpMIPSXORconst
1993 OpMIPSNOR
1994 OpMIPSNORconst
1995 OpMIPSNEG
1996 OpMIPSNEGF
1997 OpMIPSNEGD
1998 OpMIPSABSD
1999 OpMIPSSQRTD
2000 OpMIPSSQRTF
2001 OpMIPSSLL
2002 OpMIPSSLLconst
2003 OpMIPSSRL
2004 OpMIPSSRLconst
2005 OpMIPSSRA
2006 OpMIPSSRAconst
2007 OpMIPSCLZ
2008 OpMIPSSGT
2009 OpMIPSSGTconst
2010 OpMIPSSGTzero
2011 OpMIPSSGTU
2012 OpMIPSSGTUconst
2013 OpMIPSSGTUzero
2014 OpMIPSCMPEQF
2015 OpMIPSCMPEQD
2016 OpMIPSCMPGEF
2017 OpMIPSCMPGED
2018 OpMIPSCMPGTF
2019 OpMIPSCMPGTD
2020 OpMIPSMOVWconst
2021 OpMIPSMOVFconst
2022 OpMIPSMOVDconst
2023 OpMIPSMOVWaddr
2024 OpMIPSMOVBload
2025 OpMIPSMOVBUload
2026 OpMIPSMOVHload
2027 OpMIPSMOVHUload
2028 OpMIPSMOVWload
2029 OpMIPSMOVFload
2030 OpMIPSMOVDload
2031 OpMIPSMOVBstore
2032 OpMIPSMOVHstore
2033 OpMIPSMOVWstore
2034 OpMIPSMOVFstore
2035 OpMIPSMOVDstore
2036 OpMIPSMOVBstorezero
2037 OpMIPSMOVHstorezero
2038 OpMIPSMOVWstorezero
2039 OpMIPSMOVWfpgp
2040 OpMIPSMOVWgpfp
2041 OpMIPSMOVBreg
2042 OpMIPSMOVBUreg
2043 OpMIPSMOVHreg
2044 OpMIPSMOVHUreg
2045 OpMIPSMOVWreg
2046 OpMIPSMOVWnop
2047 OpMIPSCMOVZ
2048 OpMIPSCMOVZzero
2049 OpMIPSMOVWF
2050 OpMIPSMOVWD
2051 OpMIPSTRUNCFW
2052 OpMIPSTRUNCDW
2053 OpMIPSMOVFD
2054 OpMIPSMOVDF
2055 OpMIPSCALLstatic
2056 OpMIPSCALLtail
2057 OpMIPSCALLclosure
2058 OpMIPSCALLinter
2059 OpMIPSLoweredAtomicLoad8
2060 OpMIPSLoweredAtomicLoad32
2061 OpMIPSLoweredAtomicStore8
2062 OpMIPSLoweredAtomicStore32
2063 OpMIPSLoweredAtomicStorezero
2064 OpMIPSLoweredAtomicExchange
2065 OpMIPSLoweredAtomicAdd
2066 OpMIPSLoweredAtomicAddconst
2067 OpMIPSLoweredAtomicCas
2068 OpMIPSLoweredAtomicAnd
2069 OpMIPSLoweredAtomicOr
2070 OpMIPSLoweredZero
2071 OpMIPSLoweredMove
2072 OpMIPSLoweredNilCheck
2073 OpMIPSFPFlagTrue
2074 OpMIPSFPFlagFalse
2075 OpMIPSLoweredGetClosurePtr
2076 OpMIPSLoweredGetCallerSP
2077 OpMIPSLoweredGetCallerPC
2078 OpMIPSLoweredWB
2079 OpMIPSLoweredPubBarrier
2080 OpMIPSLoweredPanicBoundsA
2081 OpMIPSLoweredPanicBoundsB
2082 OpMIPSLoweredPanicBoundsC
2083 OpMIPSLoweredPanicExtendA
2084 OpMIPSLoweredPanicExtendB
2085 OpMIPSLoweredPanicExtendC
2086
2087 OpMIPS64ADDV
2088 OpMIPS64ADDVconst
2089 OpMIPS64SUBV
2090 OpMIPS64SUBVconst
2091 OpMIPS64MULV
2092 OpMIPS64MULVU
2093 OpMIPS64DIVV
2094 OpMIPS64DIVVU
2095 OpMIPS64ADDF
2096 OpMIPS64ADDD
2097 OpMIPS64SUBF
2098 OpMIPS64SUBD
2099 OpMIPS64MULF
2100 OpMIPS64MULD
2101 OpMIPS64DIVF
2102 OpMIPS64DIVD
2103 OpMIPS64AND
2104 OpMIPS64ANDconst
2105 OpMIPS64OR
2106 OpMIPS64ORconst
2107 OpMIPS64XOR
2108 OpMIPS64XORconst
2109 OpMIPS64NOR
2110 OpMIPS64NORconst
2111 OpMIPS64NEGV
2112 OpMIPS64NEGF
2113 OpMIPS64NEGD
2114 OpMIPS64ABSD
2115 OpMIPS64SQRTD
2116 OpMIPS64SQRTF
2117 OpMIPS64SLLV
2118 OpMIPS64SLLVconst
2119 OpMIPS64SRLV
2120 OpMIPS64SRLVconst
2121 OpMIPS64SRAV
2122 OpMIPS64SRAVconst
2123 OpMIPS64SGT
2124 OpMIPS64SGTconst
2125 OpMIPS64SGTU
2126 OpMIPS64SGTUconst
2127 OpMIPS64CMPEQF
2128 OpMIPS64CMPEQD
2129 OpMIPS64CMPGEF
2130 OpMIPS64CMPGED
2131 OpMIPS64CMPGTF
2132 OpMIPS64CMPGTD
2133 OpMIPS64MOVVconst
2134 OpMIPS64MOVFconst
2135 OpMIPS64MOVDconst
2136 OpMIPS64MOVVaddr
2137 OpMIPS64MOVBload
2138 OpMIPS64MOVBUload
2139 OpMIPS64MOVHload
2140 OpMIPS64MOVHUload
2141 OpMIPS64MOVWload
2142 OpMIPS64MOVWUload
2143 OpMIPS64MOVVload
2144 OpMIPS64MOVFload
2145 OpMIPS64MOVDload
2146 OpMIPS64MOVBstore
2147 OpMIPS64MOVHstore
2148 OpMIPS64MOVWstore
2149 OpMIPS64MOVVstore
2150 OpMIPS64MOVFstore
2151 OpMIPS64MOVDstore
2152 OpMIPS64MOVBstorezero
2153 OpMIPS64MOVHstorezero
2154 OpMIPS64MOVWstorezero
2155 OpMIPS64MOVVstorezero
2156 OpMIPS64MOVWfpgp
2157 OpMIPS64MOVWgpfp
2158 OpMIPS64MOVVfpgp
2159 OpMIPS64MOVVgpfp
2160 OpMIPS64MOVBreg
2161 OpMIPS64MOVBUreg
2162 OpMIPS64MOVHreg
2163 OpMIPS64MOVHUreg
2164 OpMIPS64MOVWreg
2165 OpMIPS64MOVWUreg
2166 OpMIPS64MOVVreg
2167 OpMIPS64MOVVnop
2168 OpMIPS64MOVWF
2169 OpMIPS64MOVWD
2170 OpMIPS64MOVVF
2171 OpMIPS64MOVVD
2172 OpMIPS64TRUNCFW
2173 OpMIPS64TRUNCDW
2174 OpMIPS64TRUNCFV
2175 OpMIPS64TRUNCDV
2176 OpMIPS64MOVFD
2177 OpMIPS64MOVDF
2178 OpMIPS64CALLstatic
2179 OpMIPS64CALLtail
2180 OpMIPS64CALLclosure
2181 OpMIPS64CALLinter
2182 OpMIPS64DUFFZERO
2183 OpMIPS64DUFFCOPY
2184 OpMIPS64LoweredZero
2185 OpMIPS64LoweredMove
2186 OpMIPS64LoweredAtomicAnd32
2187 OpMIPS64LoweredAtomicOr32
2188 OpMIPS64LoweredAtomicLoad8
2189 OpMIPS64LoweredAtomicLoad32
2190 OpMIPS64LoweredAtomicLoad64
2191 OpMIPS64LoweredAtomicStore8
2192 OpMIPS64LoweredAtomicStore32
2193 OpMIPS64LoweredAtomicStore64
2194 OpMIPS64LoweredAtomicStorezero32
2195 OpMIPS64LoweredAtomicStorezero64
2196 OpMIPS64LoweredAtomicExchange32
2197 OpMIPS64LoweredAtomicExchange64
2198 OpMIPS64LoweredAtomicAdd32
2199 OpMIPS64LoweredAtomicAdd64
2200 OpMIPS64LoweredAtomicAddconst32
2201 OpMIPS64LoweredAtomicAddconst64
2202 OpMIPS64LoweredAtomicCas32
2203 OpMIPS64LoweredAtomicCas64
2204 OpMIPS64LoweredNilCheck
2205 OpMIPS64FPFlagTrue
2206 OpMIPS64FPFlagFalse
2207 OpMIPS64LoweredGetClosurePtr
2208 OpMIPS64LoweredGetCallerSP
2209 OpMIPS64LoweredGetCallerPC
2210 OpMIPS64LoweredWB
2211 OpMIPS64LoweredPubBarrier
2212 OpMIPS64LoweredPanicBoundsA
2213 OpMIPS64LoweredPanicBoundsB
2214 OpMIPS64LoweredPanicBoundsC
2215
2216 OpPPC64ADD
2217 OpPPC64ADDCC
2218 OpPPC64ADDconst
2219 OpPPC64ADDCCconst
2220 OpPPC64FADD
2221 OpPPC64FADDS
2222 OpPPC64SUB
2223 OpPPC64SUBCC
2224 OpPPC64SUBFCconst
2225 OpPPC64FSUB
2226 OpPPC64FSUBS
2227 OpPPC64XSMINJDP
2228 OpPPC64XSMAXJDP
2229 OpPPC64MULLD
2230 OpPPC64MULLW
2231 OpPPC64MULLDconst
2232 OpPPC64MULLWconst
2233 OpPPC64MADDLD
2234 OpPPC64MULHD
2235 OpPPC64MULHW
2236 OpPPC64MULHDU
2237 OpPPC64MULHDUCC
2238 OpPPC64MULHWU
2239 OpPPC64FMUL
2240 OpPPC64FMULS
2241 OpPPC64FMADD
2242 OpPPC64FMADDS
2243 OpPPC64FMSUB
2244 OpPPC64FMSUBS
2245 OpPPC64SRAD
2246 OpPPC64SRAW
2247 OpPPC64SRD
2248 OpPPC64SRW
2249 OpPPC64SLD
2250 OpPPC64SLW
2251 OpPPC64ROTL
2252 OpPPC64ROTLW
2253 OpPPC64CLRLSLWI
2254 OpPPC64CLRLSLDI
2255 OpPPC64ADDC
2256 OpPPC64SUBC
2257 OpPPC64ADDCconst
2258 OpPPC64SUBCconst
2259 OpPPC64ADDE
2260 OpPPC64ADDZE
2261 OpPPC64SUBE
2262 OpPPC64ADDZEzero
2263 OpPPC64SUBZEzero
2264 OpPPC64SRADconst
2265 OpPPC64SRAWconst
2266 OpPPC64SRDconst
2267 OpPPC64SRWconst
2268 OpPPC64SLDconst
2269 OpPPC64SLWconst
2270 OpPPC64ROTLconst
2271 OpPPC64ROTLWconst
2272 OpPPC64EXTSWSLconst
2273 OpPPC64RLWINM
2274 OpPPC64RLWNM
2275 OpPPC64RLWMI
2276 OpPPC64RLDICL
2277 OpPPC64RLDICLCC
2278 OpPPC64RLDICR
2279 OpPPC64CNTLZD
2280 OpPPC64CNTLZDCC
2281 OpPPC64CNTLZW
2282 OpPPC64CNTTZD
2283 OpPPC64CNTTZW
2284 OpPPC64POPCNTD
2285 OpPPC64POPCNTW
2286 OpPPC64POPCNTB
2287 OpPPC64FDIV
2288 OpPPC64FDIVS
2289 OpPPC64DIVD
2290 OpPPC64DIVW
2291 OpPPC64DIVDU
2292 OpPPC64DIVWU
2293 OpPPC64MODUD
2294 OpPPC64MODSD
2295 OpPPC64MODUW
2296 OpPPC64MODSW
2297 OpPPC64FCTIDZ
2298 OpPPC64FCTIWZ
2299 OpPPC64FCFID
2300 OpPPC64FCFIDS
2301 OpPPC64FRSP
2302 OpPPC64MFVSRD
2303 OpPPC64MTVSRD
2304 OpPPC64AND
2305 OpPPC64ANDN
2306 OpPPC64ANDNCC
2307 OpPPC64ANDCC
2308 OpPPC64OR
2309 OpPPC64ORN
2310 OpPPC64ORCC
2311 OpPPC64NOR
2312 OpPPC64NORCC
2313 OpPPC64XOR
2314 OpPPC64XORCC
2315 OpPPC64EQV
2316 OpPPC64NEG
2317 OpPPC64NEGCC
2318 OpPPC64BRD
2319 OpPPC64BRW
2320 OpPPC64BRH
2321 OpPPC64FNEG
2322 OpPPC64FSQRT
2323 OpPPC64FSQRTS
2324 OpPPC64FFLOOR
2325 OpPPC64FCEIL
2326 OpPPC64FTRUNC
2327 OpPPC64FROUND
2328 OpPPC64FABS
2329 OpPPC64FNABS
2330 OpPPC64FCPSGN
2331 OpPPC64ORconst
2332 OpPPC64XORconst
2333 OpPPC64ANDCCconst
2334 OpPPC64ANDconst
2335 OpPPC64MOVBreg
2336 OpPPC64MOVBZreg
2337 OpPPC64MOVHreg
2338 OpPPC64MOVHZreg
2339 OpPPC64MOVWreg
2340 OpPPC64MOVWZreg
2341 OpPPC64MOVBZload
2342 OpPPC64MOVHload
2343 OpPPC64MOVHZload
2344 OpPPC64MOVWload
2345 OpPPC64MOVWZload
2346 OpPPC64MOVDload
2347 OpPPC64MOVDBRload
2348 OpPPC64MOVWBRload
2349 OpPPC64MOVHBRload
2350 OpPPC64MOVBZloadidx
2351 OpPPC64MOVHloadidx
2352 OpPPC64MOVHZloadidx
2353 OpPPC64MOVWloadidx
2354 OpPPC64MOVWZloadidx
2355 OpPPC64MOVDloadidx
2356 OpPPC64MOVHBRloadidx
2357 OpPPC64MOVWBRloadidx
2358 OpPPC64MOVDBRloadidx
2359 OpPPC64FMOVDloadidx
2360 OpPPC64FMOVSloadidx
2361 OpPPC64DCBT
2362 OpPPC64MOVDBRstore
2363 OpPPC64MOVWBRstore
2364 OpPPC64MOVHBRstore
2365 OpPPC64FMOVDload
2366 OpPPC64FMOVSload
2367 OpPPC64MOVBstore
2368 OpPPC64MOVHstore
2369 OpPPC64MOVWstore
2370 OpPPC64MOVDstore
2371 OpPPC64FMOVDstore
2372 OpPPC64FMOVSstore
2373 OpPPC64MOVBstoreidx
2374 OpPPC64MOVHstoreidx
2375 OpPPC64MOVWstoreidx
2376 OpPPC64MOVDstoreidx
2377 OpPPC64FMOVDstoreidx
2378 OpPPC64FMOVSstoreidx
2379 OpPPC64MOVHBRstoreidx
2380 OpPPC64MOVWBRstoreidx
2381 OpPPC64MOVDBRstoreidx
2382 OpPPC64MOVBstorezero
2383 OpPPC64MOVHstorezero
2384 OpPPC64MOVWstorezero
2385 OpPPC64MOVDstorezero
2386 OpPPC64MOVDaddr
2387 OpPPC64MOVDconst
2388 OpPPC64FMOVDconst
2389 OpPPC64FMOVSconst
2390 OpPPC64FCMPU
2391 OpPPC64CMP
2392 OpPPC64CMPU
2393 OpPPC64CMPW
2394 OpPPC64CMPWU
2395 OpPPC64CMPconst
2396 OpPPC64CMPUconst
2397 OpPPC64CMPWconst
2398 OpPPC64CMPWUconst
2399 OpPPC64ISEL
2400 OpPPC64ISELZ
2401 OpPPC64SETBC
2402 OpPPC64SETBCR
2403 OpPPC64Equal
2404 OpPPC64NotEqual
2405 OpPPC64LessThan
2406 OpPPC64FLessThan
2407 OpPPC64LessEqual
2408 OpPPC64FLessEqual
2409 OpPPC64GreaterThan
2410 OpPPC64FGreaterThan
2411 OpPPC64GreaterEqual
2412 OpPPC64FGreaterEqual
2413 OpPPC64LoweredGetClosurePtr
2414 OpPPC64LoweredGetCallerSP
2415 OpPPC64LoweredGetCallerPC
2416 OpPPC64LoweredNilCheck
2417 OpPPC64LoweredRound32F
2418 OpPPC64LoweredRound64F
2419 OpPPC64CALLstatic
2420 OpPPC64CALLtail
2421 OpPPC64CALLclosure
2422 OpPPC64CALLinter
2423 OpPPC64LoweredZero
2424 OpPPC64LoweredZeroShort
2425 OpPPC64LoweredQuadZeroShort
2426 OpPPC64LoweredQuadZero
2427 OpPPC64LoweredMove
2428 OpPPC64LoweredMoveShort
2429 OpPPC64LoweredQuadMove
2430 OpPPC64LoweredQuadMoveShort
2431 OpPPC64LoweredAtomicStore8
2432 OpPPC64LoweredAtomicStore32
2433 OpPPC64LoweredAtomicStore64
2434 OpPPC64LoweredAtomicLoad8
2435 OpPPC64LoweredAtomicLoad32
2436 OpPPC64LoweredAtomicLoad64
2437 OpPPC64LoweredAtomicLoadPtr
2438 OpPPC64LoweredAtomicAdd32
2439 OpPPC64LoweredAtomicAdd64
2440 OpPPC64LoweredAtomicExchange8
2441 OpPPC64LoweredAtomicExchange32
2442 OpPPC64LoweredAtomicExchange64
2443 OpPPC64LoweredAtomicCas64
2444 OpPPC64LoweredAtomicCas32
2445 OpPPC64LoweredAtomicAnd8
2446 OpPPC64LoweredAtomicAnd32
2447 OpPPC64LoweredAtomicOr8
2448 OpPPC64LoweredAtomicOr32
2449 OpPPC64LoweredWB
2450 OpPPC64LoweredPubBarrier
2451 OpPPC64LoweredPanicBoundsA
2452 OpPPC64LoweredPanicBoundsB
2453 OpPPC64LoweredPanicBoundsC
2454 OpPPC64InvertFlags
2455 OpPPC64FlagEQ
2456 OpPPC64FlagLT
2457 OpPPC64FlagGT
2458
2459 OpRISCV64ADD
2460 OpRISCV64ADDI
2461 OpRISCV64ADDIW
2462 OpRISCV64NEG
2463 OpRISCV64NEGW
2464 OpRISCV64SUB
2465 OpRISCV64SUBW
2466 OpRISCV64MUL
2467 OpRISCV64MULW
2468 OpRISCV64MULH
2469 OpRISCV64MULHU
2470 OpRISCV64LoweredMuluhilo
2471 OpRISCV64LoweredMuluover
2472 OpRISCV64DIV
2473 OpRISCV64DIVU
2474 OpRISCV64DIVW
2475 OpRISCV64DIVUW
2476 OpRISCV64REM
2477 OpRISCV64REMU
2478 OpRISCV64REMW
2479 OpRISCV64REMUW
2480 OpRISCV64MOVaddr
2481 OpRISCV64MOVDconst
2482 OpRISCV64MOVBload
2483 OpRISCV64MOVHload
2484 OpRISCV64MOVWload
2485 OpRISCV64MOVDload
2486 OpRISCV64MOVBUload
2487 OpRISCV64MOVHUload
2488 OpRISCV64MOVWUload
2489 OpRISCV64MOVBstore
2490 OpRISCV64MOVHstore
2491 OpRISCV64MOVWstore
2492 OpRISCV64MOVDstore
2493 OpRISCV64MOVBstorezero
2494 OpRISCV64MOVHstorezero
2495 OpRISCV64MOVWstorezero
2496 OpRISCV64MOVDstorezero
2497 OpRISCV64MOVBreg
2498 OpRISCV64MOVHreg
2499 OpRISCV64MOVWreg
2500 OpRISCV64MOVDreg
2501 OpRISCV64MOVBUreg
2502 OpRISCV64MOVHUreg
2503 OpRISCV64MOVWUreg
2504 OpRISCV64MOVDnop
2505 OpRISCV64SLL
2506 OpRISCV64SLLW
2507 OpRISCV64SRA
2508 OpRISCV64SRAW
2509 OpRISCV64SRL
2510 OpRISCV64SRLW
2511 OpRISCV64SLLI
2512 OpRISCV64SLLIW
2513 OpRISCV64SRAI
2514 OpRISCV64SRAIW
2515 OpRISCV64SRLI
2516 OpRISCV64SRLIW
2517 OpRISCV64SH1ADD
2518 OpRISCV64SH2ADD
2519 OpRISCV64SH3ADD
2520 OpRISCV64AND
2521 OpRISCV64ANDN
2522 OpRISCV64ANDI
2523 OpRISCV64CLZ
2524 OpRISCV64CLZW
2525 OpRISCV64CPOP
2526 OpRISCV64CPOPW
2527 OpRISCV64CTZ
2528 OpRISCV64CTZW
2529 OpRISCV64NOT
2530 OpRISCV64OR
2531 OpRISCV64ORN
2532 OpRISCV64ORI
2533 OpRISCV64REV8
2534 OpRISCV64ROL
2535 OpRISCV64ROLW
2536 OpRISCV64ROR
2537 OpRISCV64RORI
2538 OpRISCV64RORIW
2539 OpRISCV64RORW
2540 OpRISCV64XNOR
2541 OpRISCV64XOR
2542 OpRISCV64XORI
2543 OpRISCV64MIN
2544 OpRISCV64MAX
2545 OpRISCV64MINU
2546 OpRISCV64MAXU
2547 OpRISCV64SEQZ
2548 OpRISCV64SNEZ
2549 OpRISCV64SLT
2550 OpRISCV64SLTI
2551 OpRISCV64SLTU
2552 OpRISCV64SLTIU
2553 OpRISCV64LoweredRound32F
2554 OpRISCV64LoweredRound64F
2555 OpRISCV64CALLstatic
2556 OpRISCV64CALLtail
2557 OpRISCV64CALLclosure
2558 OpRISCV64CALLinter
2559 OpRISCV64DUFFZERO
2560 OpRISCV64DUFFCOPY
2561 OpRISCV64LoweredZero
2562 OpRISCV64LoweredMove
2563 OpRISCV64LoweredAtomicLoad8
2564 OpRISCV64LoweredAtomicLoad32
2565 OpRISCV64LoweredAtomicLoad64
2566 OpRISCV64LoweredAtomicStore8
2567 OpRISCV64LoweredAtomicStore32
2568 OpRISCV64LoweredAtomicStore64
2569 OpRISCV64LoweredAtomicExchange32
2570 OpRISCV64LoweredAtomicExchange64
2571 OpRISCV64LoweredAtomicAdd32
2572 OpRISCV64LoweredAtomicAdd64
2573 OpRISCV64LoweredAtomicCas32
2574 OpRISCV64LoweredAtomicCas64
2575 OpRISCV64LoweredAtomicAnd32
2576 OpRISCV64LoweredAtomicOr32
2577 OpRISCV64LoweredNilCheck
2578 OpRISCV64LoweredGetClosurePtr
2579 OpRISCV64LoweredGetCallerSP
2580 OpRISCV64LoweredGetCallerPC
2581 OpRISCV64LoweredWB
2582 OpRISCV64LoweredPubBarrier
2583 OpRISCV64LoweredPanicBoundsA
2584 OpRISCV64LoweredPanicBoundsB
2585 OpRISCV64LoweredPanicBoundsC
2586 OpRISCV64FADDS
2587 OpRISCV64FSUBS
2588 OpRISCV64FMULS
2589 OpRISCV64FDIVS
2590 OpRISCV64FMADDS
2591 OpRISCV64FMSUBS
2592 OpRISCV64FNMADDS
2593 OpRISCV64FNMSUBS
2594 OpRISCV64FSQRTS
2595 OpRISCV64FNEGS
2596 OpRISCV64FMVSX
2597 OpRISCV64FCVTSW
2598 OpRISCV64FCVTSL
2599 OpRISCV64FCVTWS
2600 OpRISCV64FCVTLS
2601 OpRISCV64FMOVWload
2602 OpRISCV64FMOVWstore
2603 OpRISCV64FEQS
2604 OpRISCV64FNES
2605 OpRISCV64FLTS
2606 OpRISCV64FLES
2607 OpRISCV64LoweredFMAXS
2608 OpRISCV64LoweredFMINS
2609 OpRISCV64FADDD
2610 OpRISCV64FSUBD
2611 OpRISCV64FMULD
2612 OpRISCV64FDIVD
2613 OpRISCV64FMADDD
2614 OpRISCV64FMSUBD
2615 OpRISCV64FNMADDD
2616 OpRISCV64FNMSUBD
2617 OpRISCV64FSQRTD
2618 OpRISCV64FNEGD
2619 OpRISCV64FABSD
2620 OpRISCV64FSGNJD
2621 OpRISCV64FMVDX
2622 OpRISCV64FCVTDW
2623 OpRISCV64FCVTDL
2624 OpRISCV64FCVTWD
2625 OpRISCV64FCVTLD
2626 OpRISCV64FCVTDS
2627 OpRISCV64FCVTSD
2628 OpRISCV64FMOVDload
2629 OpRISCV64FMOVDstore
2630 OpRISCV64FEQD
2631 OpRISCV64FNED
2632 OpRISCV64FLTD
2633 OpRISCV64FLED
2634 OpRISCV64LoweredFMIND
2635 OpRISCV64LoweredFMAXD
2636
2637 OpS390XFADDS
2638 OpS390XFADD
2639 OpS390XFSUBS
2640 OpS390XFSUB
2641 OpS390XFMULS
2642 OpS390XFMUL
2643 OpS390XFDIVS
2644 OpS390XFDIV
2645 OpS390XFNEGS
2646 OpS390XFNEG
2647 OpS390XFMADDS
2648 OpS390XFMADD
2649 OpS390XFMSUBS
2650 OpS390XFMSUB
2651 OpS390XLPDFR
2652 OpS390XLNDFR
2653 OpS390XCPSDR
2654 OpS390XFIDBR
2655 OpS390XFMOVSload
2656 OpS390XFMOVDload
2657 OpS390XFMOVSconst
2658 OpS390XFMOVDconst
2659 OpS390XFMOVSloadidx
2660 OpS390XFMOVDloadidx
2661 OpS390XFMOVSstore
2662 OpS390XFMOVDstore
2663 OpS390XFMOVSstoreidx
2664 OpS390XFMOVDstoreidx
2665 OpS390XADD
2666 OpS390XADDW
2667 OpS390XADDconst
2668 OpS390XADDWconst
2669 OpS390XADDload
2670 OpS390XADDWload
2671 OpS390XSUB
2672 OpS390XSUBW
2673 OpS390XSUBconst
2674 OpS390XSUBWconst
2675 OpS390XSUBload
2676 OpS390XSUBWload
2677 OpS390XMULLD
2678 OpS390XMULLW
2679 OpS390XMULLDconst
2680 OpS390XMULLWconst
2681 OpS390XMULLDload
2682 OpS390XMULLWload
2683 OpS390XMULHD
2684 OpS390XMULHDU
2685 OpS390XDIVD
2686 OpS390XDIVW
2687 OpS390XDIVDU
2688 OpS390XDIVWU
2689 OpS390XMODD
2690 OpS390XMODW
2691 OpS390XMODDU
2692 OpS390XMODWU
2693 OpS390XAND
2694 OpS390XANDW
2695 OpS390XANDconst
2696 OpS390XANDWconst
2697 OpS390XANDload
2698 OpS390XANDWload
2699 OpS390XOR
2700 OpS390XORW
2701 OpS390XORconst
2702 OpS390XORWconst
2703 OpS390XORload
2704 OpS390XORWload
2705 OpS390XXOR
2706 OpS390XXORW
2707 OpS390XXORconst
2708 OpS390XXORWconst
2709 OpS390XXORload
2710 OpS390XXORWload
2711 OpS390XADDC
2712 OpS390XADDCconst
2713 OpS390XADDE
2714 OpS390XSUBC
2715 OpS390XSUBE
2716 OpS390XCMP
2717 OpS390XCMPW
2718 OpS390XCMPU
2719 OpS390XCMPWU
2720 OpS390XCMPconst
2721 OpS390XCMPWconst
2722 OpS390XCMPUconst
2723 OpS390XCMPWUconst
2724 OpS390XFCMPS
2725 OpS390XFCMP
2726 OpS390XLTDBR
2727 OpS390XLTEBR
2728 OpS390XSLD
2729 OpS390XSLW
2730 OpS390XSLDconst
2731 OpS390XSLWconst
2732 OpS390XSRD
2733 OpS390XSRW
2734 OpS390XSRDconst
2735 OpS390XSRWconst
2736 OpS390XSRAD
2737 OpS390XSRAW
2738 OpS390XSRADconst
2739 OpS390XSRAWconst
2740 OpS390XRLLG
2741 OpS390XRLL
2742 OpS390XRLLconst
2743 OpS390XRXSBG
2744 OpS390XRISBGZ
2745 OpS390XNEG
2746 OpS390XNEGW
2747 OpS390XNOT
2748 OpS390XNOTW
2749 OpS390XFSQRT
2750 OpS390XFSQRTS
2751 OpS390XLOCGR
2752 OpS390XMOVBreg
2753 OpS390XMOVBZreg
2754 OpS390XMOVHreg
2755 OpS390XMOVHZreg
2756 OpS390XMOVWreg
2757 OpS390XMOVWZreg
2758 OpS390XMOVDconst
2759 OpS390XLDGR
2760 OpS390XLGDR
2761 OpS390XCFDBRA
2762 OpS390XCGDBRA
2763 OpS390XCFEBRA
2764 OpS390XCGEBRA
2765 OpS390XCEFBRA
2766 OpS390XCDFBRA
2767 OpS390XCEGBRA
2768 OpS390XCDGBRA
2769 OpS390XCLFEBR
2770 OpS390XCLFDBR
2771 OpS390XCLGEBR
2772 OpS390XCLGDBR
2773 OpS390XCELFBR
2774 OpS390XCDLFBR
2775 OpS390XCELGBR
2776 OpS390XCDLGBR
2777 OpS390XLEDBR
2778 OpS390XLDEBR
2779 OpS390XMOVDaddr
2780 OpS390XMOVDaddridx
2781 OpS390XMOVBZload
2782 OpS390XMOVBload
2783 OpS390XMOVHZload
2784 OpS390XMOVHload
2785 OpS390XMOVWZload
2786 OpS390XMOVWload
2787 OpS390XMOVDload
2788 OpS390XMOVWBR
2789 OpS390XMOVDBR
2790 OpS390XMOVHBRload
2791 OpS390XMOVWBRload
2792 OpS390XMOVDBRload
2793 OpS390XMOVBstore
2794 OpS390XMOVHstore
2795 OpS390XMOVWstore
2796 OpS390XMOVDstore
2797 OpS390XMOVHBRstore
2798 OpS390XMOVWBRstore
2799 OpS390XMOVDBRstore
2800 OpS390XMVC
2801 OpS390XMOVBZloadidx
2802 OpS390XMOVBloadidx
2803 OpS390XMOVHZloadidx
2804 OpS390XMOVHloadidx
2805 OpS390XMOVWZloadidx
2806 OpS390XMOVWloadidx
2807 OpS390XMOVDloadidx
2808 OpS390XMOVHBRloadidx
2809 OpS390XMOVWBRloadidx
2810 OpS390XMOVDBRloadidx
2811 OpS390XMOVBstoreidx
2812 OpS390XMOVHstoreidx
2813 OpS390XMOVWstoreidx
2814 OpS390XMOVDstoreidx
2815 OpS390XMOVHBRstoreidx
2816 OpS390XMOVWBRstoreidx
2817 OpS390XMOVDBRstoreidx
2818 OpS390XMOVBstoreconst
2819 OpS390XMOVHstoreconst
2820 OpS390XMOVWstoreconst
2821 OpS390XMOVDstoreconst
2822 OpS390XCLEAR
2823 OpS390XCALLstatic
2824 OpS390XCALLtail
2825 OpS390XCALLclosure
2826 OpS390XCALLinter
2827 OpS390XInvertFlags
2828 OpS390XLoweredGetG
2829 OpS390XLoweredGetClosurePtr
2830 OpS390XLoweredGetCallerSP
2831 OpS390XLoweredGetCallerPC
2832 OpS390XLoweredNilCheck
2833 OpS390XLoweredRound32F
2834 OpS390XLoweredRound64F
2835 OpS390XLoweredWB
2836 OpS390XLoweredPanicBoundsA
2837 OpS390XLoweredPanicBoundsB
2838 OpS390XLoweredPanicBoundsC
2839 OpS390XFlagEQ
2840 OpS390XFlagLT
2841 OpS390XFlagGT
2842 OpS390XFlagOV
2843 OpS390XSYNC
2844 OpS390XMOVBZatomicload
2845 OpS390XMOVWZatomicload
2846 OpS390XMOVDatomicload
2847 OpS390XMOVBatomicstore
2848 OpS390XMOVWatomicstore
2849 OpS390XMOVDatomicstore
2850 OpS390XLAA
2851 OpS390XLAAG
2852 OpS390XAddTupleFirst32
2853 OpS390XAddTupleFirst64
2854 OpS390XLAN
2855 OpS390XLANfloor
2856 OpS390XLAO
2857 OpS390XLAOfloor
2858 OpS390XLoweredAtomicCas32
2859 OpS390XLoweredAtomicCas64
2860 OpS390XLoweredAtomicExchange32
2861 OpS390XLoweredAtomicExchange64
2862 OpS390XFLOGR
2863 OpS390XPOPCNT
2864 OpS390XMLGR
2865 OpS390XSumBytes2
2866 OpS390XSumBytes4
2867 OpS390XSumBytes8
2868 OpS390XSTMG2
2869 OpS390XSTMG3
2870 OpS390XSTMG4
2871 OpS390XSTM2
2872 OpS390XSTM3
2873 OpS390XSTM4
2874 OpS390XLoweredMove
2875 OpS390XLoweredZero
2876
2877 OpWasmLoweredStaticCall
2878 OpWasmLoweredTailCall
2879 OpWasmLoweredClosureCall
2880 OpWasmLoweredInterCall
2881 OpWasmLoweredAddr
2882 OpWasmLoweredMove
2883 OpWasmLoweredZero
2884 OpWasmLoweredGetClosurePtr
2885 OpWasmLoweredGetCallerPC
2886 OpWasmLoweredGetCallerSP
2887 OpWasmLoweredNilCheck
2888 OpWasmLoweredWB
2889 OpWasmLoweredConvert
2890 OpWasmSelect
2891 OpWasmI64Load8U
2892 OpWasmI64Load8S
2893 OpWasmI64Load16U
2894 OpWasmI64Load16S
2895 OpWasmI64Load32U
2896 OpWasmI64Load32S
2897 OpWasmI64Load
2898 OpWasmI64Store8
2899 OpWasmI64Store16
2900 OpWasmI64Store32
2901 OpWasmI64Store
2902 OpWasmF32Load
2903 OpWasmF64Load
2904 OpWasmF32Store
2905 OpWasmF64Store
2906 OpWasmI64Const
2907 OpWasmF32Const
2908 OpWasmF64Const
2909 OpWasmI64Eqz
2910 OpWasmI64Eq
2911 OpWasmI64Ne
2912 OpWasmI64LtS
2913 OpWasmI64LtU
2914 OpWasmI64GtS
2915 OpWasmI64GtU
2916 OpWasmI64LeS
2917 OpWasmI64LeU
2918 OpWasmI64GeS
2919 OpWasmI64GeU
2920 OpWasmF32Eq
2921 OpWasmF32Ne
2922 OpWasmF32Lt
2923 OpWasmF32Gt
2924 OpWasmF32Le
2925 OpWasmF32Ge
2926 OpWasmF64Eq
2927 OpWasmF64Ne
2928 OpWasmF64Lt
2929 OpWasmF64Gt
2930 OpWasmF64Le
2931 OpWasmF64Ge
2932 OpWasmI64Add
2933 OpWasmI64AddConst
2934 OpWasmI64Sub
2935 OpWasmI64Mul
2936 OpWasmI64DivS
2937 OpWasmI64DivU
2938 OpWasmI64RemS
2939 OpWasmI64RemU
2940 OpWasmI64And
2941 OpWasmI64Or
2942 OpWasmI64Xor
2943 OpWasmI64Shl
2944 OpWasmI64ShrS
2945 OpWasmI64ShrU
2946 OpWasmF32Neg
2947 OpWasmF32Add
2948 OpWasmF32Sub
2949 OpWasmF32Mul
2950 OpWasmF32Div
2951 OpWasmF64Neg
2952 OpWasmF64Add
2953 OpWasmF64Sub
2954 OpWasmF64Mul
2955 OpWasmF64Div
2956 OpWasmI64TruncSatF64S
2957 OpWasmI64TruncSatF64U
2958 OpWasmI64TruncSatF32S
2959 OpWasmI64TruncSatF32U
2960 OpWasmF32ConvertI64S
2961 OpWasmF32ConvertI64U
2962 OpWasmF64ConvertI64S
2963 OpWasmF64ConvertI64U
2964 OpWasmF32DemoteF64
2965 OpWasmF64PromoteF32
2966 OpWasmI64Extend8S
2967 OpWasmI64Extend16S
2968 OpWasmI64Extend32S
2969 OpWasmF32Sqrt
2970 OpWasmF32Trunc
2971 OpWasmF32Ceil
2972 OpWasmF32Floor
2973 OpWasmF32Nearest
2974 OpWasmF32Abs
2975 OpWasmF32Copysign
2976 OpWasmF64Sqrt
2977 OpWasmF64Trunc
2978 OpWasmF64Ceil
2979 OpWasmF64Floor
2980 OpWasmF64Nearest
2981 OpWasmF64Abs
2982 OpWasmF64Copysign
2983 OpWasmI64Ctz
2984 OpWasmI64Clz
2985 OpWasmI32Rotl
2986 OpWasmI64Rotl
2987 OpWasmI64Popcnt
2988
2989 OpAdd8
2990 OpAdd16
2991 OpAdd32
2992 OpAdd64
2993 OpAddPtr
2994 OpAdd32F
2995 OpAdd64F
2996 OpSub8
2997 OpSub16
2998 OpSub32
2999 OpSub64
3000 OpSubPtr
3001 OpSub32F
3002 OpSub64F
3003 OpMul8
3004 OpMul16
3005 OpMul32
3006 OpMul64
3007 OpMul32F
3008 OpMul64F
3009 OpDiv32F
3010 OpDiv64F
3011 OpHmul32
3012 OpHmul32u
3013 OpHmul64
3014 OpHmul64u
3015 OpMul32uhilo
3016 OpMul64uhilo
3017 OpMul32uover
3018 OpMul64uover
3019 OpAvg32u
3020 OpAvg64u
3021 OpDiv8
3022 OpDiv8u
3023 OpDiv16
3024 OpDiv16u
3025 OpDiv32
3026 OpDiv32u
3027 OpDiv64
3028 OpDiv64u
3029 OpDiv128u
3030 OpMod8
3031 OpMod8u
3032 OpMod16
3033 OpMod16u
3034 OpMod32
3035 OpMod32u
3036 OpMod64
3037 OpMod64u
3038 OpAnd8
3039 OpAnd16
3040 OpAnd32
3041 OpAnd64
3042 OpOr8
3043 OpOr16
3044 OpOr32
3045 OpOr64
3046 OpXor8
3047 OpXor16
3048 OpXor32
3049 OpXor64
3050 OpLsh8x8
3051 OpLsh8x16
3052 OpLsh8x32
3053 OpLsh8x64
3054 OpLsh16x8
3055 OpLsh16x16
3056 OpLsh16x32
3057 OpLsh16x64
3058 OpLsh32x8
3059 OpLsh32x16
3060 OpLsh32x32
3061 OpLsh32x64
3062 OpLsh64x8
3063 OpLsh64x16
3064 OpLsh64x32
3065 OpLsh64x64
3066 OpRsh8x8
3067 OpRsh8x16
3068 OpRsh8x32
3069 OpRsh8x64
3070 OpRsh16x8
3071 OpRsh16x16
3072 OpRsh16x32
3073 OpRsh16x64
3074 OpRsh32x8
3075 OpRsh32x16
3076 OpRsh32x32
3077 OpRsh32x64
3078 OpRsh64x8
3079 OpRsh64x16
3080 OpRsh64x32
3081 OpRsh64x64
3082 OpRsh8Ux8
3083 OpRsh8Ux16
3084 OpRsh8Ux32
3085 OpRsh8Ux64
3086 OpRsh16Ux8
3087 OpRsh16Ux16
3088 OpRsh16Ux32
3089 OpRsh16Ux64
3090 OpRsh32Ux8
3091 OpRsh32Ux16
3092 OpRsh32Ux32
3093 OpRsh32Ux64
3094 OpRsh64Ux8
3095 OpRsh64Ux16
3096 OpRsh64Ux32
3097 OpRsh64Ux64
3098 OpEq8
3099 OpEq16
3100 OpEq32
3101 OpEq64
3102 OpEqPtr
3103 OpEqInter
3104 OpEqSlice
3105 OpEq32F
3106 OpEq64F
3107 OpNeq8
3108 OpNeq16
3109 OpNeq32
3110 OpNeq64
3111 OpNeqPtr
3112 OpNeqInter
3113 OpNeqSlice
3114 OpNeq32F
3115 OpNeq64F
3116 OpLess8
3117 OpLess8U
3118 OpLess16
3119 OpLess16U
3120 OpLess32
3121 OpLess32U
3122 OpLess64
3123 OpLess64U
3124 OpLess32F
3125 OpLess64F
3126 OpLeq8
3127 OpLeq8U
3128 OpLeq16
3129 OpLeq16U
3130 OpLeq32
3131 OpLeq32U
3132 OpLeq64
3133 OpLeq64U
3134 OpLeq32F
3135 OpLeq64F
3136 OpCondSelect
3137 OpAndB
3138 OpOrB
3139 OpEqB
3140 OpNeqB
3141 OpNot
3142 OpNeg8
3143 OpNeg16
3144 OpNeg32
3145 OpNeg64
3146 OpNeg32F
3147 OpNeg64F
3148 OpCom8
3149 OpCom16
3150 OpCom32
3151 OpCom64
3152 OpCtz8
3153 OpCtz16
3154 OpCtz32
3155 OpCtz64
3156 OpCtz64On32
3157 OpCtz8NonZero
3158 OpCtz16NonZero
3159 OpCtz32NonZero
3160 OpCtz64NonZero
3161 OpBitLen8
3162 OpBitLen16
3163 OpBitLen32
3164 OpBitLen64
3165 OpBswap16
3166 OpBswap32
3167 OpBswap64
3168 OpBitRev8
3169 OpBitRev16
3170 OpBitRev32
3171 OpBitRev64
3172 OpPopCount8
3173 OpPopCount16
3174 OpPopCount32
3175 OpPopCount64
3176 OpRotateLeft64
3177 OpRotateLeft32
3178 OpRotateLeft16
3179 OpRotateLeft8
3180 OpSqrt
3181 OpSqrt32
3182 OpFloor
3183 OpCeil
3184 OpTrunc
3185 OpRound
3186 OpRoundToEven
3187 OpAbs
3188 OpCopysign
3189 OpMin64
3190 OpMax64
3191 OpMin64u
3192 OpMax64u
3193 OpMin64F
3194 OpMin32F
3195 OpMax64F
3196 OpMax32F
3197 OpFMA
3198 OpPhi
3199 OpCopy
3200 OpConvert
3201 OpConstBool
3202 OpConstString
3203 OpConstNil
3204 OpConst8
3205 OpConst16
3206 OpConst32
3207 OpConst64
3208 OpConst32F
3209 OpConst64F
3210 OpConstInterface
3211 OpConstSlice
3212 OpInitMem
3213 OpArg
3214 OpArgIntReg
3215 OpArgFloatReg
3216 OpAddr
3217 OpLocalAddr
3218 OpSP
3219 OpSB
3220 OpSPanchored
3221 OpLoad
3222 OpDereference
3223 OpStore
3224 OpMove
3225 OpZero
3226 OpStoreWB
3227 OpMoveWB
3228 OpZeroWB
3229 OpWBend
3230 OpWB
3231 OpHasCPUFeature
3232 OpPanicBounds
3233 OpPanicExtend
3234 OpClosureCall
3235 OpStaticCall
3236 OpInterCall
3237 OpTailCall
3238 OpClosureLECall
3239 OpStaticLECall
3240 OpInterLECall
3241 OpTailLECall
3242 OpSignExt8to16
3243 OpSignExt8to32
3244 OpSignExt8to64
3245 OpSignExt16to32
3246 OpSignExt16to64
3247 OpSignExt32to64
3248 OpZeroExt8to16
3249 OpZeroExt8to32
3250 OpZeroExt8to64
3251 OpZeroExt16to32
3252 OpZeroExt16to64
3253 OpZeroExt32to64
3254 OpTrunc16to8
3255 OpTrunc32to8
3256 OpTrunc32to16
3257 OpTrunc64to8
3258 OpTrunc64to16
3259 OpTrunc64to32
3260 OpCvt32to32F
3261 OpCvt32to64F
3262 OpCvt64to32F
3263 OpCvt64to64F
3264 OpCvt32Fto32
3265 OpCvt32Fto64
3266 OpCvt64Fto32
3267 OpCvt64Fto64
3268 OpCvt32Fto64F
3269 OpCvt64Fto32F
3270 OpCvtBoolToUint8
3271 OpRound32F
3272 OpRound64F
3273 OpIsNonNil
3274 OpIsInBounds
3275 OpIsSliceInBounds
3276 OpNilCheck
3277 OpGetG
3278 OpGetClosurePtr
3279 OpGetCallerPC
3280 OpGetCallerSP
3281 OpPtrIndex
3282 OpOffPtr
3283 OpSliceMake
3284 OpSlicePtr
3285 OpSliceLen
3286 OpSliceCap
3287 OpSlicePtrUnchecked
3288 OpComplexMake
3289 OpComplexReal
3290 OpComplexImag
3291 OpStringMake
3292 OpStringPtr
3293 OpStringLen
3294 OpIMake
3295 OpITab
3296 OpIData
3297 OpStructMake
3298 OpStructSelect
3299 OpArrayMake0
3300 OpArrayMake1
3301 OpArraySelect
3302 OpStoreReg
3303 OpLoadReg
3304 OpFwdRef
3305 OpUnknown
3306 OpVarDef
3307 OpVarLive
3308 OpKeepAlive
3309 OpInlMark
3310 OpInt64Make
3311 OpInt64Hi
3312 OpInt64Lo
3313 OpAdd32carry
3314 OpAdd32withcarry
3315 OpSub32carry
3316 OpSub32withcarry
3317 OpAdd64carry
3318 OpSub64borrow
3319 OpSignmask
3320 OpZeromask
3321 OpSlicemask
3322 OpSpectreIndex
3323 OpSpectreSliceIndex
3324 OpCvt32Uto32F
3325 OpCvt32Uto64F
3326 OpCvt32Fto32U
3327 OpCvt64Fto32U
3328 OpCvt64Uto32F
3329 OpCvt64Uto64F
3330 OpCvt32Fto64U
3331 OpCvt64Fto64U
3332 OpSelect0
3333 OpSelect1
3334 OpMakeTuple
3335 OpSelectN
3336 OpSelectNAddr
3337 OpMakeResult
3338 OpAtomicLoad8
3339 OpAtomicLoad32
3340 OpAtomicLoad64
3341 OpAtomicLoadPtr
3342 OpAtomicLoadAcq32
3343 OpAtomicLoadAcq64
3344 OpAtomicStore8
3345 OpAtomicStore32
3346 OpAtomicStore64
3347 OpAtomicStorePtrNoWB
3348 OpAtomicStoreRel32
3349 OpAtomicStoreRel64
3350 OpAtomicExchange8
3351 OpAtomicExchange32
3352 OpAtomicExchange64
3353 OpAtomicAdd32
3354 OpAtomicAdd64
3355 OpAtomicCompareAndSwap32
3356 OpAtomicCompareAndSwap64
3357 OpAtomicCompareAndSwapRel32
3358 OpAtomicAnd8
3359 OpAtomicOr8
3360 OpAtomicAnd32
3361 OpAtomicOr32
3362 OpAtomicAnd64value
3363 OpAtomicAnd32value
3364 OpAtomicAnd8value
3365 OpAtomicOr64value
3366 OpAtomicOr32value
3367 OpAtomicOr8value
3368 OpAtomicStore8Variant
3369 OpAtomicStore32Variant
3370 OpAtomicStore64Variant
3371 OpAtomicAdd32Variant
3372 OpAtomicAdd64Variant
3373 OpAtomicExchange8Variant
3374 OpAtomicExchange32Variant
3375 OpAtomicExchange64Variant
3376 OpAtomicCompareAndSwap32Variant
3377 OpAtomicCompareAndSwap64Variant
3378 OpAtomicAnd64valueVariant
3379 OpAtomicOr64valueVariant
3380 OpAtomicAnd32valueVariant
3381 OpAtomicOr32valueVariant
3382 OpAtomicAnd8valueVariant
3383 OpAtomicOr8valueVariant
3384 OpPubBarrier
3385 OpClobber
3386 OpClobberReg
3387 OpPrefetchCache
3388 OpPrefetchCacheStreamed
3389 )
3390
3391 var opcodeTable = [...]opInfo{
3392 {name: "OpInvalid"},
3393
3394 {
3395 name: "ADDSS",
3396 argLen: 2,
3397 commutative: true,
3398 resultInArg0: true,
3399 asm: x86.AADDSS,
3400 reg: regInfo{
3401 inputs: []inputInfo{
3402 {0, 65280},
3403 {1, 65280},
3404 },
3405 outputs: []outputInfo{
3406 {0, 65280},
3407 },
3408 },
3409 },
3410 {
3411 name: "ADDSD",
3412 argLen: 2,
3413 commutative: true,
3414 resultInArg0: true,
3415 asm: x86.AADDSD,
3416 reg: regInfo{
3417 inputs: []inputInfo{
3418 {0, 65280},
3419 {1, 65280},
3420 },
3421 outputs: []outputInfo{
3422 {0, 65280},
3423 },
3424 },
3425 },
3426 {
3427 name: "SUBSS",
3428 argLen: 2,
3429 resultInArg0: true,
3430 asm: x86.ASUBSS,
3431 reg: regInfo{
3432 inputs: []inputInfo{
3433 {0, 65280},
3434 {1, 65280},
3435 },
3436 outputs: []outputInfo{
3437 {0, 65280},
3438 },
3439 },
3440 },
3441 {
3442 name: "SUBSD",
3443 argLen: 2,
3444 resultInArg0: true,
3445 asm: x86.ASUBSD,
3446 reg: regInfo{
3447 inputs: []inputInfo{
3448 {0, 65280},
3449 {1, 65280},
3450 },
3451 outputs: []outputInfo{
3452 {0, 65280},
3453 },
3454 },
3455 },
3456 {
3457 name: "MULSS",
3458 argLen: 2,
3459 commutative: true,
3460 resultInArg0: true,
3461 asm: x86.AMULSS,
3462 reg: regInfo{
3463 inputs: []inputInfo{
3464 {0, 65280},
3465 {1, 65280},
3466 },
3467 outputs: []outputInfo{
3468 {0, 65280},
3469 },
3470 },
3471 },
3472 {
3473 name: "MULSD",
3474 argLen: 2,
3475 commutative: true,
3476 resultInArg0: true,
3477 asm: x86.AMULSD,
3478 reg: regInfo{
3479 inputs: []inputInfo{
3480 {0, 65280},
3481 {1, 65280},
3482 },
3483 outputs: []outputInfo{
3484 {0, 65280},
3485 },
3486 },
3487 },
3488 {
3489 name: "DIVSS",
3490 argLen: 2,
3491 resultInArg0: true,
3492 asm: x86.ADIVSS,
3493 reg: regInfo{
3494 inputs: []inputInfo{
3495 {0, 65280},
3496 {1, 65280},
3497 },
3498 outputs: []outputInfo{
3499 {0, 65280},
3500 },
3501 },
3502 },
3503 {
3504 name: "DIVSD",
3505 argLen: 2,
3506 resultInArg0: true,
3507 asm: x86.ADIVSD,
3508 reg: regInfo{
3509 inputs: []inputInfo{
3510 {0, 65280},
3511 {1, 65280},
3512 },
3513 outputs: []outputInfo{
3514 {0, 65280},
3515 },
3516 },
3517 },
3518 {
3519 name: "MOVSSload",
3520 auxType: auxSymOff,
3521 argLen: 2,
3522 faultOnNilArg0: true,
3523 symEffect: SymRead,
3524 asm: x86.AMOVSS,
3525 reg: regInfo{
3526 inputs: []inputInfo{
3527 {0, 65791},
3528 },
3529 outputs: []outputInfo{
3530 {0, 65280},
3531 },
3532 },
3533 },
3534 {
3535 name: "MOVSDload",
3536 auxType: auxSymOff,
3537 argLen: 2,
3538 faultOnNilArg0: true,
3539 symEffect: SymRead,
3540 asm: x86.AMOVSD,
3541 reg: regInfo{
3542 inputs: []inputInfo{
3543 {0, 65791},
3544 },
3545 outputs: []outputInfo{
3546 {0, 65280},
3547 },
3548 },
3549 },
3550 {
3551 name: "MOVSSconst",
3552 auxType: auxFloat32,
3553 argLen: 0,
3554 rematerializeable: true,
3555 asm: x86.AMOVSS,
3556 reg: regInfo{
3557 outputs: []outputInfo{
3558 {0, 65280},
3559 },
3560 },
3561 },
3562 {
3563 name: "MOVSDconst",
3564 auxType: auxFloat64,
3565 argLen: 0,
3566 rematerializeable: true,
3567 asm: x86.AMOVSD,
3568 reg: regInfo{
3569 outputs: []outputInfo{
3570 {0, 65280},
3571 },
3572 },
3573 },
3574 {
3575 name: "MOVSSloadidx1",
3576 auxType: auxSymOff,
3577 argLen: 3,
3578 symEffect: SymRead,
3579 asm: x86.AMOVSS,
3580 reg: regInfo{
3581 inputs: []inputInfo{
3582 {1, 255},
3583 {0, 65791},
3584 },
3585 outputs: []outputInfo{
3586 {0, 65280},
3587 },
3588 },
3589 },
3590 {
3591 name: "MOVSSloadidx4",
3592 auxType: auxSymOff,
3593 argLen: 3,
3594 symEffect: SymRead,
3595 asm: x86.AMOVSS,
3596 reg: regInfo{
3597 inputs: []inputInfo{
3598 {1, 255},
3599 {0, 65791},
3600 },
3601 outputs: []outputInfo{
3602 {0, 65280},
3603 },
3604 },
3605 },
3606 {
3607 name: "MOVSDloadidx1",
3608 auxType: auxSymOff,
3609 argLen: 3,
3610 symEffect: SymRead,
3611 asm: x86.AMOVSD,
3612 reg: regInfo{
3613 inputs: []inputInfo{
3614 {1, 255},
3615 {0, 65791},
3616 },
3617 outputs: []outputInfo{
3618 {0, 65280},
3619 },
3620 },
3621 },
3622 {
3623 name: "MOVSDloadidx8",
3624 auxType: auxSymOff,
3625 argLen: 3,
3626 symEffect: SymRead,
3627 asm: x86.AMOVSD,
3628 reg: regInfo{
3629 inputs: []inputInfo{
3630 {1, 255},
3631 {0, 65791},
3632 },
3633 outputs: []outputInfo{
3634 {0, 65280},
3635 },
3636 },
3637 },
3638 {
3639 name: "MOVSSstore",
3640 auxType: auxSymOff,
3641 argLen: 3,
3642 faultOnNilArg0: true,
3643 symEffect: SymWrite,
3644 asm: x86.AMOVSS,
3645 reg: regInfo{
3646 inputs: []inputInfo{
3647 {1, 65280},
3648 {0, 65791},
3649 },
3650 },
3651 },
3652 {
3653 name: "MOVSDstore",
3654 auxType: auxSymOff,
3655 argLen: 3,
3656 faultOnNilArg0: true,
3657 symEffect: SymWrite,
3658 asm: x86.AMOVSD,
3659 reg: regInfo{
3660 inputs: []inputInfo{
3661 {1, 65280},
3662 {0, 65791},
3663 },
3664 },
3665 },
3666 {
3667 name: "MOVSSstoreidx1",
3668 auxType: auxSymOff,
3669 argLen: 4,
3670 symEffect: SymWrite,
3671 asm: x86.AMOVSS,
3672 reg: regInfo{
3673 inputs: []inputInfo{
3674 {1, 255},
3675 {2, 65280},
3676 {0, 65791},
3677 },
3678 },
3679 },
3680 {
3681 name: "MOVSSstoreidx4",
3682 auxType: auxSymOff,
3683 argLen: 4,
3684 symEffect: SymWrite,
3685 asm: x86.AMOVSS,
3686 reg: regInfo{
3687 inputs: []inputInfo{
3688 {1, 255},
3689 {2, 65280},
3690 {0, 65791},
3691 },
3692 },
3693 },
3694 {
3695 name: "MOVSDstoreidx1",
3696 auxType: auxSymOff,
3697 argLen: 4,
3698 symEffect: SymWrite,
3699 asm: x86.AMOVSD,
3700 reg: regInfo{
3701 inputs: []inputInfo{
3702 {1, 255},
3703 {2, 65280},
3704 {0, 65791},
3705 },
3706 },
3707 },
3708 {
3709 name: "MOVSDstoreidx8",
3710 auxType: auxSymOff,
3711 argLen: 4,
3712 symEffect: SymWrite,
3713 asm: x86.AMOVSD,
3714 reg: regInfo{
3715 inputs: []inputInfo{
3716 {1, 255},
3717 {2, 65280},
3718 {0, 65791},
3719 },
3720 },
3721 },
3722 {
3723 name: "ADDSSload",
3724 auxType: auxSymOff,
3725 argLen: 3,
3726 resultInArg0: true,
3727 faultOnNilArg1: true,
3728 symEffect: SymRead,
3729 asm: x86.AADDSS,
3730 reg: regInfo{
3731 inputs: []inputInfo{
3732 {0, 65280},
3733 {1, 65791},
3734 },
3735 outputs: []outputInfo{
3736 {0, 65280},
3737 },
3738 },
3739 },
3740 {
3741 name: "ADDSDload",
3742 auxType: auxSymOff,
3743 argLen: 3,
3744 resultInArg0: true,
3745 faultOnNilArg1: true,
3746 symEffect: SymRead,
3747 asm: x86.AADDSD,
3748 reg: regInfo{
3749 inputs: []inputInfo{
3750 {0, 65280},
3751 {1, 65791},
3752 },
3753 outputs: []outputInfo{
3754 {0, 65280},
3755 },
3756 },
3757 },
3758 {
3759 name: "SUBSSload",
3760 auxType: auxSymOff,
3761 argLen: 3,
3762 resultInArg0: true,
3763 faultOnNilArg1: true,
3764 symEffect: SymRead,
3765 asm: x86.ASUBSS,
3766 reg: regInfo{
3767 inputs: []inputInfo{
3768 {0, 65280},
3769 {1, 65791},
3770 },
3771 outputs: []outputInfo{
3772 {0, 65280},
3773 },
3774 },
3775 },
3776 {
3777 name: "SUBSDload",
3778 auxType: auxSymOff,
3779 argLen: 3,
3780 resultInArg0: true,
3781 faultOnNilArg1: true,
3782 symEffect: SymRead,
3783 asm: x86.ASUBSD,
3784 reg: regInfo{
3785 inputs: []inputInfo{
3786 {0, 65280},
3787 {1, 65791},
3788 },
3789 outputs: []outputInfo{
3790 {0, 65280},
3791 },
3792 },
3793 },
3794 {
3795 name: "MULSSload",
3796 auxType: auxSymOff,
3797 argLen: 3,
3798 resultInArg0: true,
3799 faultOnNilArg1: true,
3800 symEffect: SymRead,
3801 asm: x86.AMULSS,
3802 reg: regInfo{
3803 inputs: []inputInfo{
3804 {0, 65280},
3805 {1, 65791},
3806 },
3807 outputs: []outputInfo{
3808 {0, 65280},
3809 },
3810 },
3811 },
3812 {
3813 name: "MULSDload",
3814 auxType: auxSymOff,
3815 argLen: 3,
3816 resultInArg0: true,
3817 faultOnNilArg1: true,
3818 symEffect: SymRead,
3819 asm: x86.AMULSD,
3820 reg: regInfo{
3821 inputs: []inputInfo{
3822 {0, 65280},
3823 {1, 65791},
3824 },
3825 outputs: []outputInfo{
3826 {0, 65280},
3827 },
3828 },
3829 },
3830 {
3831 name: "DIVSSload",
3832 auxType: auxSymOff,
3833 argLen: 3,
3834 resultInArg0: true,
3835 faultOnNilArg1: true,
3836 symEffect: SymRead,
3837 asm: x86.ADIVSS,
3838 reg: regInfo{
3839 inputs: []inputInfo{
3840 {0, 65280},
3841 {1, 65791},
3842 },
3843 outputs: []outputInfo{
3844 {0, 65280},
3845 },
3846 },
3847 },
3848 {
3849 name: "DIVSDload",
3850 auxType: auxSymOff,
3851 argLen: 3,
3852 resultInArg0: true,
3853 faultOnNilArg1: true,
3854 symEffect: SymRead,
3855 asm: x86.ADIVSD,
3856 reg: regInfo{
3857 inputs: []inputInfo{
3858 {0, 65280},
3859 {1, 65791},
3860 },
3861 outputs: []outputInfo{
3862 {0, 65280},
3863 },
3864 },
3865 },
3866 {
3867 name: "ADDL",
3868 argLen: 2,
3869 commutative: true,
3870 clobberFlags: true,
3871 asm: x86.AADDL,
3872 reg: regInfo{
3873 inputs: []inputInfo{
3874 {1, 239},
3875 {0, 255},
3876 },
3877 outputs: []outputInfo{
3878 {0, 239},
3879 },
3880 },
3881 },
3882 {
3883 name: "ADDLconst",
3884 auxType: auxInt32,
3885 argLen: 1,
3886 clobberFlags: true,
3887 asm: x86.AADDL,
3888 reg: regInfo{
3889 inputs: []inputInfo{
3890 {0, 255},
3891 },
3892 outputs: []outputInfo{
3893 {0, 239},
3894 },
3895 },
3896 },
3897 {
3898 name: "ADDLcarry",
3899 argLen: 2,
3900 commutative: true,
3901 resultInArg0: true,
3902 asm: x86.AADDL,
3903 reg: regInfo{
3904 inputs: []inputInfo{
3905 {0, 239},
3906 {1, 239},
3907 },
3908 outputs: []outputInfo{
3909 {1, 0},
3910 {0, 239},
3911 },
3912 },
3913 },
3914 {
3915 name: "ADDLconstcarry",
3916 auxType: auxInt32,
3917 argLen: 1,
3918 resultInArg0: true,
3919 asm: x86.AADDL,
3920 reg: regInfo{
3921 inputs: []inputInfo{
3922 {0, 239},
3923 },
3924 outputs: []outputInfo{
3925 {1, 0},
3926 {0, 239},
3927 },
3928 },
3929 },
3930 {
3931 name: "ADCL",
3932 argLen: 3,
3933 commutative: true,
3934 resultInArg0: true,
3935 clobberFlags: true,
3936 asm: x86.AADCL,
3937 reg: regInfo{
3938 inputs: []inputInfo{
3939 {0, 239},
3940 {1, 239},
3941 },
3942 outputs: []outputInfo{
3943 {0, 239},
3944 },
3945 },
3946 },
3947 {
3948 name: "ADCLconst",
3949 auxType: auxInt32,
3950 argLen: 2,
3951 resultInArg0: true,
3952 clobberFlags: true,
3953 asm: x86.AADCL,
3954 reg: regInfo{
3955 inputs: []inputInfo{
3956 {0, 239},
3957 },
3958 outputs: []outputInfo{
3959 {0, 239},
3960 },
3961 },
3962 },
3963 {
3964 name: "SUBL",
3965 argLen: 2,
3966 resultInArg0: true,
3967 clobberFlags: true,
3968 asm: x86.ASUBL,
3969 reg: regInfo{
3970 inputs: []inputInfo{
3971 {0, 239},
3972 {1, 239},
3973 },
3974 outputs: []outputInfo{
3975 {0, 239},
3976 },
3977 },
3978 },
3979 {
3980 name: "SUBLconst",
3981 auxType: auxInt32,
3982 argLen: 1,
3983 resultInArg0: true,
3984 clobberFlags: true,
3985 asm: x86.ASUBL,
3986 reg: regInfo{
3987 inputs: []inputInfo{
3988 {0, 239},
3989 },
3990 outputs: []outputInfo{
3991 {0, 239},
3992 },
3993 },
3994 },
3995 {
3996 name: "SUBLcarry",
3997 argLen: 2,
3998 resultInArg0: true,
3999 asm: x86.ASUBL,
4000 reg: regInfo{
4001 inputs: []inputInfo{
4002 {0, 239},
4003 {1, 239},
4004 },
4005 outputs: []outputInfo{
4006 {1, 0},
4007 {0, 239},
4008 },
4009 },
4010 },
4011 {
4012 name: "SUBLconstcarry",
4013 auxType: auxInt32,
4014 argLen: 1,
4015 resultInArg0: true,
4016 asm: x86.ASUBL,
4017 reg: regInfo{
4018 inputs: []inputInfo{
4019 {0, 239},
4020 },
4021 outputs: []outputInfo{
4022 {1, 0},
4023 {0, 239},
4024 },
4025 },
4026 },
4027 {
4028 name: "SBBL",
4029 argLen: 3,
4030 resultInArg0: true,
4031 clobberFlags: true,
4032 asm: x86.ASBBL,
4033 reg: regInfo{
4034 inputs: []inputInfo{
4035 {0, 239},
4036 {1, 239},
4037 },
4038 outputs: []outputInfo{
4039 {0, 239},
4040 },
4041 },
4042 },
4043 {
4044 name: "SBBLconst",
4045 auxType: auxInt32,
4046 argLen: 2,
4047 resultInArg0: true,
4048 clobberFlags: true,
4049 asm: x86.ASBBL,
4050 reg: regInfo{
4051 inputs: []inputInfo{
4052 {0, 239},
4053 },
4054 outputs: []outputInfo{
4055 {0, 239},
4056 },
4057 },
4058 },
4059 {
4060 name: "MULL",
4061 argLen: 2,
4062 commutative: true,
4063 resultInArg0: true,
4064 clobberFlags: true,
4065 asm: x86.AIMULL,
4066 reg: regInfo{
4067 inputs: []inputInfo{
4068 {0, 239},
4069 {1, 239},
4070 },
4071 outputs: []outputInfo{
4072 {0, 239},
4073 },
4074 },
4075 },
4076 {
4077 name: "MULLconst",
4078 auxType: auxInt32,
4079 argLen: 1,
4080 clobberFlags: true,
4081 asm: x86.AIMUL3L,
4082 reg: regInfo{
4083 inputs: []inputInfo{
4084 {0, 239},
4085 },
4086 outputs: []outputInfo{
4087 {0, 239},
4088 },
4089 },
4090 },
4091 {
4092 name: "MULLU",
4093 argLen: 2,
4094 commutative: true,
4095 clobberFlags: true,
4096 asm: x86.AMULL,
4097 reg: regInfo{
4098 inputs: []inputInfo{
4099 {0, 1},
4100 {1, 255},
4101 },
4102 clobbers: 4,
4103 outputs: []outputInfo{
4104 {1, 0},
4105 {0, 1},
4106 },
4107 },
4108 },
4109 {
4110 name: "HMULL",
4111 argLen: 2,
4112 commutative: true,
4113 clobberFlags: true,
4114 asm: x86.AIMULL,
4115 reg: regInfo{
4116 inputs: []inputInfo{
4117 {0, 1},
4118 {1, 255},
4119 },
4120 clobbers: 1,
4121 outputs: []outputInfo{
4122 {0, 4},
4123 },
4124 },
4125 },
4126 {
4127 name: "HMULLU",
4128 argLen: 2,
4129 commutative: true,
4130 clobberFlags: true,
4131 asm: x86.AMULL,
4132 reg: regInfo{
4133 inputs: []inputInfo{
4134 {0, 1},
4135 {1, 255},
4136 },
4137 clobbers: 1,
4138 outputs: []outputInfo{
4139 {0, 4},
4140 },
4141 },
4142 },
4143 {
4144 name: "MULLQU",
4145 argLen: 2,
4146 commutative: true,
4147 clobberFlags: true,
4148 asm: x86.AMULL,
4149 reg: regInfo{
4150 inputs: []inputInfo{
4151 {0, 1},
4152 {1, 255},
4153 },
4154 outputs: []outputInfo{
4155 {0, 4},
4156 {1, 1},
4157 },
4158 },
4159 },
4160 {
4161 name: "AVGLU",
4162 argLen: 2,
4163 commutative: true,
4164 resultInArg0: true,
4165 clobberFlags: true,
4166 reg: regInfo{
4167 inputs: []inputInfo{
4168 {0, 239},
4169 {1, 239},
4170 },
4171 outputs: []outputInfo{
4172 {0, 239},
4173 },
4174 },
4175 },
4176 {
4177 name: "DIVL",
4178 auxType: auxBool,
4179 argLen: 2,
4180 clobberFlags: true,
4181 asm: x86.AIDIVL,
4182 reg: regInfo{
4183 inputs: []inputInfo{
4184 {0, 1},
4185 {1, 251},
4186 },
4187 clobbers: 4,
4188 outputs: []outputInfo{
4189 {0, 1},
4190 },
4191 },
4192 },
4193 {
4194 name: "DIVW",
4195 auxType: auxBool,
4196 argLen: 2,
4197 clobberFlags: true,
4198 asm: x86.AIDIVW,
4199 reg: regInfo{
4200 inputs: []inputInfo{
4201 {0, 1},
4202 {1, 251},
4203 },
4204 clobbers: 4,
4205 outputs: []outputInfo{
4206 {0, 1},
4207 },
4208 },
4209 },
4210 {
4211 name: "DIVLU",
4212 argLen: 2,
4213 clobberFlags: true,
4214 asm: x86.ADIVL,
4215 reg: regInfo{
4216 inputs: []inputInfo{
4217 {0, 1},
4218 {1, 251},
4219 },
4220 clobbers: 4,
4221 outputs: []outputInfo{
4222 {0, 1},
4223 },
4224 },
4225 },
4226 {
4227 name: "DIVWU",
4228 argLen: 2,
4229 clobberFlags: true,
4230 asm: x86.ADIVW,
4231 reg: regInfo{
4232 inputs: []inputInfo{
4233 {0, 1},
4234 {1, 251},
4235 },
4236 clobbers: 4,
4237 outputs: []outputInfo{
4238 {0, 1},
4239 },
4240 },
4241 },
4242 {
4243 name: "MODL",
4244 auxType: auxBool,
4245 argLen: 2,
4246 clobberFlags: true,
4247 asm: x86.AIDIVL,
4248 reg: regInfo{
4249 inputs: []inputInfo{
4250 {0, 1},
4251 {1, 251},
4252 },
4253 clobbers: 1,
4254 outputs: []outputInfo{
4255 {0, 4},
4256 },
4257 },
4258 },
4259 {
4260 name: "MODW",
4261 auxType: auxBool,
4262 argLen: 2,
4263 clobberFlags: true,
4264 asm: x86.AIDIVW,
4265 reg: regInfo{
4266 inputs: []inputInfo{
4267 {0, 1},
4268 {1, 251},
4269 },
4270 clobbers: 1,
4271 outputs: []outputInfo{
4272 {0, 4},
4273 },
4274 },
4275 },
4276 {
4277 name: "MODLU",
4278 argLen: 2,
4279 clobberFlags: true,
4280 asm: x86.ADIVL,
4281 reg: regInfo{
4282 inputs: []inputInfo{
4283 {0, 1},
4284 {1, 251},
4285 },
4286 clobbers: 1,
4287 outputs: []outputInfo{
4288 {0, 4},
4289 },
4290 },
4291 },
4292 {
4293 name: "MODWU",
4294 argLen: 2,
4295 clobberFlags: true,
4296 asm: x86.ADIVW,
4297 reg: regInfo{
4298 inputs: []inputInfo{
4299 {0, 1},
4300 {1, 251},
4301 },
4302 clobbers: 1,
4303 outputs: []outputInfo{
4304 {0, 4},
4305 },
4306 },
4307 },
4308 {
4309 name: "ANDL",
4310 argLen: 2,
4311 commutative: true,
4312 resultInArg0: true,
4313 clobberFlags: true,
4314 asm: x86.AANDL,
4315 reg: regInfo{
4316 inputs: []inputInfo{
4317 {0, 239},
4318 {1, 239},
4319 },
4320 outputs: []outputInfo{
4321 {0, 239},
4322 },
4323 },
4324 },
4325 {
4326 name: "ANDLconst",
4327 auxType: auxInt32,
4328 argLen: 1,
4329 resultInArg0: true,
4330 clobberFlags: true,
4331 asm: x86.AANDL,
4332 reg: regInfo{
4333 inputs: []inputInfo{
4334 {0, 239},
4335 },
4336 outputs: []outputInfo{
4337 {0, 239},
4338 },
4339 },
4340 },
4341 {
4342 name: "ORL",
4343 argLen: 2,
4344 commutative: true,
4345 resultInArg0: true,
4346 clobberFlags: true,
4347 asm: x86.AORL,
4348 reg: regInfo{
4349 inputs: []inputInfo{
4350 {0, 239},
4351 {1, 239},
4352 },
4353 outputs: []outputInfo{
4354 {0, 239},
4355 },
4356 },
4357 },
4358 {
4359 name: "ORLconst",
4360 auxType: auxInt32,
4361 argLen: 1,
4362 resultInArg0: true,
4363 clobberFlags: true,
4364 asm: x86.AORL,
4365 reg: regInfo{
4366 inputs: []inputInfo{
4367 {0, 239},
4368 },
4369 outputs: []outputInfo{
4370 {0, 239},
4371 },
4372 },
4373 },
4374 {
4375 name: "XORL",
4376 argLen: 2,
4377 commutative: true,
4378 resultInArg0: true,
4379 clobberFlags: true,
4380 asm: x86.AXORL,
4381 reg: regInfo{
4382 inputs: []inputInfo{
4383 {0, 239},
4384 {1, 239},
4385 },
4386 outputs: []outputInfo{
4387 {0, 239},
4388 },
4389 },
4390 },
4391 {
4392 name: "XORLconst",
4393 auxType: auxInt32,
4394 argLen: 1,
4395 resultInArg0: true,
4396 clobberFlags: true,
4397 asm: x86.AXORL,
4398 reg: regInfo{
4399 inputs: []inputInfo{
4400 {0, 239},
4401 },
4402 outputs: []outputInfo{
4403 {0, 239},
4404 },
4405 },
4406 },
4407 {
4408 name: "CMPL",
4409 argLen: 2,
4410 asm: x86.ACMPL,
4411 reg: regInfo{
4412 inputs: []inputInfo{
4413 {0, 255},
4414 {1, 255},
4415 },
4416 },
4417 },
4418 {
4419 name: "CMPW",
4420 argLen: 2,
4421 asm: x86.ACMPW,
4422 reg: regInfo{
4423 inputs: []inputInfo{
4424 {0, 255},
4425 {1, 255},
4426 },
4427 },
4428 },
4429 {
4430 name: "CMPB",
4431 argLen: 2,
4432 asm: x86.ACMPB,
4433 reg: regInfo{
4434 inputs: []inputInfo{
4435 {0, 255},
4436 {1, 255},
4437 },
4438 },
4439 },
4440 {
4441 name: "CMPLconst",
4442 auxType: auxInt32,
4443 argLen: 1,
4444 asm: x86.ACMPL,
4445 reg: regInfo{
4446 inputs: []inputInfo{
4447 {0, 255},
4448 },
4449 },
4450 },
4451 {
4452 name: "CMPWconst",
4453 auxType: auxInt16,
4454 argLen: 1,
4455 asm: x86.ACMPW,
4456 reg: regInfo{
4457 inputs: []inputInfo{
4458 {0, 255},
4459 },
4460 },
4461 },
4462 {
4463 name: "CMPBconst",
4464 auxType: auxInt8,
4465 argLen: 1,
4466 asm: x86.ACMPB,
4467 reg: regInfo{
4468 inputs: []inputInfo{
4469 {0, 255},
4470 },
4471 },
4472 },
4473 {
4474 name: "CMPLload",
4475 auxType: auxSymOff,
4476 argLen: 3,
4477 faultOnNilArg0: true,
4478 symEffect: SymRead,
4479 asm: x86.ACMPL,
4480 reg: regInfo{
4481 inputs: []inputInfo{
4482 {1, 255},
4483 {0, 65791},
4484 },
4485 },
4486 },
4487 {
4488 name: "CMPWload",
4489 auxType: auxSymOff,
4490 argLen: 3,
4491 faultOnNilArg0: true,
4492 symEffect: SymRead,
4493 asm: x86.ACMPW,
4494 reg: regInfo{
4495 inputs: []inputInfo{
4496 {1, 255},
4497 {0, 65791},
4498 },
4499 },
4500 },
4501 {
4502 name: "CMPBload",
4503 auxType: auxSymOff,
4504 argLen: 3,
4505 faultOnNilArg0: true,
4506 symEffect: SymRead,
4507 asm: x86.ACMPB,
4508 reg: regInfo{
4509 inputs: []inputInfo{
4510 {1, 255},
4511 {0, 65791},
4512 },
4513 },
4514 },
4515 {
4516 name: "CMPLconstload",
4517 auxType: auxSymValAndOff,
4518 argLen: 2,
4519 faultOnNilArg0: true,
4520 symEffect: SymRead,
4521 asm: x86.ACMPL,
4522 reg: regInfo{
4523 inputs: []inputInfo{
4524 {0, 65791},
4525 },
4526 },
4527 },
4528 {
4529 name: "CMPWconstload",
4530 auxType: auxSymValAndOff,
4531 argLen: 2,
4532 faultOnNilArg0: true,
4533 symEffect: SymRead,
4534 asm: x86.ACMPW,
4535 reg: regInfo{
4536 inputs: []inputInfo{
4537 {0, 65791},
4538 },
4539 },
4540 },
4541 {
4542 name: "CMPBconstload",
4543 auxType: auxSymValAndOff,
4544 argLen: 2,
4545 faultOnNilArg0: true,
4546 symEffect: SymRead,
4547 asm: x86.ACMPB,
4548 reg: regInfo{
4549 inputs: []inputInfo{
4550 {0, 65791},
4551 },
4552 },
4553 },
4554 {
4555 name: "UCOMISS",
4556 argLen: 2,
4557 asm: x86.AUCOMISS,
4558 reg: regInfo{
4559 inputs: []inputInfo{
4560 {0, 65280},
4561 {1, 65280},
4562 },
4563 },
4564 },
4565 {
4566 name: "UCOMISD",
4567 argLen: 2,
4568 asm: x86.AUCOMISD,
4569 reg: regInfo{
4570 inputs: []inputInfo{
4571 {0, 65280},
4572 {1, 65280},
4573 },
4574 },
4575 },
4576 {
4577 name: "TESTL",
4578 argLen: 2,
4579 commutative: true,
4580 asm: x86.ATESTL,
4581 reg: regInfo{
4582 inputs: []inputInfo{
4583 {0, 255},
4584 {1, 255},
4585 },
4586 },
4587 },
4588 {
4589 name: "TESTW",
4590 argLen: 2,
4591 commutative: true,
4592 asm: x86.ATESTW,
4593 reg: regInfo{
4594 inputs: []inputInfo{
4595 {0, 255},
4596 {1, 255},
4597 },
4598 },
4599 },
4600 {
4601 name: "TESTB",
4602 argLen: 2,
4603 commutative: true,
4604 asm: x86.ATESTB,
4605 reg: regInfo{
4606 inputs: []inputInfo{
4607 {0, 255},
4608 {1, 255},
4609 },
4610 },
4611 },
4612 {
4613 name: "TESTLconst",
4614 auxType: auxInt32,
4615 argLen: 1,
4616 asm: x86.ATESTL,
4617 reg: regInfo{
4618 inputs: []inputInfo{
4619 {0, 255},
4620 },
4621 },
4622 },
4623 {
4624 name: "TESTWconst",
4625 auxType: auxInt16,
4626 argLen: 1,
4627 asm: x86.ATESTW,
4628 reg: regInfo{
4629 inputs: []inputInfo{
4630 {0, 255},
4631 },
4632 },
4633 },
4634 {
4635 name: "TESTBconst",
4636 auxType: auxInt8,
4637 argLen: 1,
4638 asm: x86.ATESTB,
4639 reg: regInfo{
4640 inputs: []inputInfo{
4641 {0, 255},
4642 },
4643 },
4644 },
4645 {
4646 name: "SHLL",
4647 argLen: 2,
4648 resultInArg0: true,
4649 clobberFlags: true,
4650 asm: x86.ASHLL,
4651 reg: regInfo{
4652 inputs: []inputInfo{
4653 {1, 2},
4654 {0, 239},
4655 },
4656 outputs: []outputInfo{
4657 {0, 239},
4658 },
4659 },
4660 },
4661 {
4662 name: "SHLLconst",
4663 auxType: auxInt32,
4664 argLen: 1,
4665 resultInArg0: true,
4666 clobberFlags: true,
4667 asm: x86.ASHLL,
4668 reg: regInfo{
4669 inputs: []inputInfo{
4670 {0, 239},
4671 },
4672 outputs: []outputInfo{
4673 {0, 239},
4674 },
4675 },
4676 },
4677 {
4678 name: "SHRL",
4679 argLen: 2,
4680 resultInArg0: true,
4681 clobberFlags: true,
4682 asm: x86.ASHRL,
4683 reg: regInfo{
4684 inputs: []inputInfo{
4685 {1, 2},
4686 {0, 239},
4687 },
4688 outputs: []outputInfo{
4689 {0, 239},
4690 },
4691 },
4692 },
4693 {
4694 name: "SHRW",
4695 argLen: 2,
4696 resultInArg0: true,
4697 clobberFlags: true,
4698 asm: x86.ASHRW,
4699 reg: regInfo{
4700 inputs: []inputInfo{
4701 {1, 2},
4702 {0, 239},
4703 },
4704 outputs: []outputInfo{
4705 {0, 239},
4706 },
4707 },
4708 },
4709 {
4710 name: "SHRB",
4711 argLen: 2,
4712 resultInArg0: true,
4713 clobberFlags: true,
4714 asm: x86.ASHRB,
4715 reg: regInfo{
4716 inputs: []inputInfo{
4717 {1, 2},
4718 {0, 239},
4719 },
4720 outputs: []outputInfo{
4721 {0, 239},
4722 },
4723 },
4724 },
4725 {
4726 name: "SHRLconst",
4727 auxType: auxInt32,
4728 argLen: 1,
4729 resultInArg0: true,
4730 clobberFlags: true,
4731 asm: x86.ASHRL,
4732 reg: regInfo{
4733 inputs: []inputInfo{
4734 {0, 239},
4735 },
4736 outputs: []outputInfo{
4737 {0, 239},
4738 },
4739 },
4740 },
4741 {
4742 name: "SHRWconst",
4743 auxType: auxInt16,
4744 argLen: 1,
4745 resultInArg0: true,
4746 clobberFlags: true,
4747 asm: x86.ASHRW,
4748 reg: regInfo{
4749 inputs: []inputInfo{
4750 {0, 239},
4751 },
4752 outputs: []outputInfo{
4753 {0, 239},
4754 },
4755 },
4756 },
4757 {
4758 name: "SHRBconst",
4759 auxType: auxInt8,
4760 argLen: 1,
4761 resultInArg0: true,
4762 clobberFlags: true,
4763 asm: x86.ASHRB,
4764 reg: regInfo{
4765 inputs: []inputInfo{
4766 {0, 239},
4767 },
4768 outputs: []outputInfo{
4769 {0, 239},
4770 },
4771 },
4772 },
4773 {
4774 name: "SARL",
4775 argLen: 2,
4776 resultInArg0: true,
4777 clobberFlags: true,
4778 asm: x86.ASARL,
4779 reg: regInfo{
4780 inputs: []inputInfo{
4781 {1, 2},
4782 {0, 239},
4783 },
4784 outputs: []outputInfo{
4785 {0, 239},
4786 },
4787 },
4788 },
4789 {
4790 name: "SARW",
4791 argLen: 2,
4792 resultInArg0: true,
4793 clobberFlags: true,
4794 asm: x86.ASARW,
4795 reg: regInfo{
4796 inputs: []inputInfo{
4797 {1, 2},
4798 {0, 239},
4799 },
4800 outputs: []outputInfo{
4801 {0, 239},
4802 },
4803 },
4804 },
4805 {
4806 name: "SARB",
4807 argLen: 2,
4808 resultInArg0: true,
4809 clobberFlags: true,
4810 asm: x86.ASARB,
4811 reg: regInfo{
4812 inputs: []inputInfo{
4813 {1, 2},
4814 {0, 239},
4815 },
4816 outputs: []outputInfo{
4817 {0, 239},
4818 },
4819 },
4820 },
4821 {
4822 name: "SARLconst",
4823 auxType: auxInt32,
4824 argLen: 1,
4825 resultInArg0: true,
4826 clobberFlags: true,
4827 asm: x86.ASARL,
4828 reg: regInfo{
4829 inputs: []inputInfo{
4830 {0, 239},
4831 },
4832 outputs: []outputInfo{
4833 {0, 239},
4834 },
4835 },
4836 },
4837 {
4838 name: "SARWconst",
4839 auxType: auxInt16,
4840 argLen: 1,
4841 resultInArg0: true,
4842 clobberFlags: true,
4843 asm: x86.ASARW,
4844 reg: regInfo{
4845 inputs: []inputInfo{
4846 {0, 239},
4847 },
4848 outputs: []outputInfo{
4849 {0, 239},
4850 },
4851 },
4852 },
4853 {
4854 name: "SARBconst",
4855 auxType: auxInt8,
4856 argLen: 1,
4857 resultInArg0: true,
4858 clobberFlags: true,
4859 asm: x86.ASARB,
4860 reg: regInfo{
4861 inputs: []inputInfo{
4862 {0, 239},
4863 },
4864 outputs: []outputInfo{
4865 {0, 239},
4866 },
4867 },
4868 },
4869 {
4870 name: "ROLL",
4871 argLen: 2,
4872 resultInArg0: true,
4873 clobberFlags: true,
4874 asm: x86.AROLL,
4875 reg: regInfo{
4876 inputs: []inputInfo{
4877 {1, 2},
4878 {0, 239},
4879 },
4880 outputs: []outputInfo{
4881 {0, 239},
4882 },
4883 },
4884 },
4885 {
4886 name: "ROLW",
4887 argLen: 2,
4888 resultInArg0: true,
4889 clobberFlags: true,
4890 asm: x86.AROLW,
4891 reg: regInfo{
4892 inputs: []inputInfo{
4893 {1, 2},
4894 {0, 239},
4895 },
4896 outputs: []outputInfo{
4897 {0, 239},
4898 },
4899 },
4900 },
4901 {
4902 name: "ROLB",
4903 argLen: 2,
4904 resultInArg0: true,
4905 clobberFlags: true,
4906 asm: x86.AROLB,
4907 reg: regInfo{
4908 inputs: []inputInfo{
4909 {1, 2},
4910 {0, 239},
4911 },
4912 outputs: []outputInfo{
4913 {0, 239},
4914 },
4915 },
4916 },
4917 {
4918 name: "ROLLconst",
4919 auxType: auxInt32,
4920 argLen: 1,
4921 resultInArg0: true,
4922 clobberFlags: true,
4923 asm: x86.AROLL,
4924 reg: regInfo{
4925 inputs: []inputInfo{
4926 {0, 239},
4927 },
4928 outputs: []outputInfo{
4929 {0, 239},
4930 },
4931 },
4932 },
4933 {
4934 name: "ROLWconst",
4935 auxType: auxInt16,
4936 argLen: 1,
4937 resultInArg0: true,
4938 clobberFlags: true,
4939 asm: x86.AROLW,
4940 reg: regInfo{
4941 inputs: []inputInfo{
4942 {0, 239},
4943 },
4944 outputs: []outputInfo{
4945 {0, 239},
4946 },
4947 },
4948 },
4949 {
4950 name: "ROLBconst",
4951 auxType: auxInt8,
4952 argLen: 1,
4953 resultInArg0: true,
4954 clobberFlags: true,
4955 asm: x86.AROLB,
4956 reg: regInfo{
4957 inputs: []inputInfo{
4958 {0, 239},
4959 },
4960 outputs: []outputInfo{
4961 {0, 239},
4962 },
4963 },
4964 },
4965 {
4966 name: "ADDLload",
4967 auxType: auxSymOff,
4968 argLen: 3,
4969 resultInArg0: true,
4970 clobberFlags: true,
4971 faultOnNilArg1: true,
4972 symEffect: SymRead,
4973 asm: x86.AADDL,
4974 reg: regInfo{
4975 inputs: []inputInfo{
4976 {0, 239},
4977 {1, 65791},
4978 },
4979 outputs: []outputInfo{
4980 {0, 239},
4981 },
4982 },
4983 },
4984 {
4985 name: "SUBLload",
4986 auxType: auxSymOff,
4987 argLen: 3,
4988 resultInArg0: true,
4989 clobberFlags: true,
4990 faultOnNilArg1: true,
4991 symEffect: SymRead,
4992 asm: x86.ASUBL,
4993 reg: regInfo{
4994 inputs: []inputInfo{
4995 {0, 239},
4996 {1, 65791},
4997 },
4998 outputs: []outputInfo{
4999 {0, 239},
5000 },
5001 },
5002 },
5003 {
5004 name: "MULLload",
5005 auxType: auxSymOff,
5006 argLen: 3,
5007 resultInArg0: true,
5008 clobberFlags: true,
5009 faultOnNilArg1: true,
5010 symEffect: SymRead,
5011 asm: x86.AIMULL,
5012 reg: regInfo{
5013 inputs: []inputInfo{
5014 {0, 239},
5015 {1, 65791},
5016 },
5017 outputs: []outputInfo{
5018 {0, 239},
5019 },
5020 },
5021 },
5022 {
5023 name: "ANDLload",
5024 auxType: auxSymOff,
5025 argLen: 3,
5026 resultInArg0: true,
5027 clobberFlags: true,
5028 faultOnNilArg1: true,
5029 symEffect: SymRead,
5030 asm: x86.AANDL,
5031 reg: regInfo{
5032 inputs: []inputInfo{
5033 {0, 239},
5034 {1, 65791},
5035 },
5036 outputs: []outputInfo{
5037 {0, 239},
5038 },
5039 },
5040 },
5041 {
5042 name: "ORLload",
5043 auxType: auxSymOff,
5044 argLen: 3,
5045 resultInArg0: true,
5046 clobberFlags: true,
5047 faultOnNilArg1: true,
5048 symEffect: SymRead,
5049 asm: x86.AORL,
5050 reg: regInfo{
5051 inputs: []inputInfo{
5052 {0, 239},
5053 {1, 65791},
5054 },
5055 outputs: []outputInfo{
5056 {0, 239},
5057 },
5058 },
5059 },
5060 {
5061 name: "XORLload",
5062 auxType: auxSymOff,
5063 argLen: 3,
5064 resultInArg0: true,
5065 clobberFlags: true,
5066 faultOnNilArg1: true,
5067 symEffect: SymRead,
5068 asm: x86.AXORL,
5069 reg: regInfo{
5070 inputs: []inputInfo{
5071 {0, 239},
5072 {1, 65791},
5073 },
5074 outputs: []outputInfo{
5075 {0, 239},
5076 },
5077 },
5078 },
5079 {
5080 name: "ADDLloadidx4",
5081 auxType: auxSymOff,
5082 argLen: 4,
5083 resultInArg0: true,
5084 clobberFlags: true,
5085 symEffect: SymRead,
5086 asm: x86.AADDL,
5087 reg: regInfo{
5088 inputs: []inputInfo{
5089 {0, 239},
5090 {2, 255},
5091 {1, 65791},
5092 },
5093 outputs: []outputInfo{
5094 {0, 239},
5095 },
5096 },
5097 },
5098 {
5099 name: "SUBLloadidx4",
5100 auxType: auxSymOff,
5101 argLen: 4,
5102 resultInArg0: true,
5103 clobberFlags: true,
5104 symEffect: SymRead,
5105 asm: x86.ASUBL,
5106 reg: regInfo{
5107 inputs: []inputInfo{
5108 {0, 239},
5109 {2, 255},
5110 {1, 65791},
5111 },
5112 outputs: []outputInfo{
5113 {0, 239},
5114 },
5115 },
5116 },
5117 {
5118 name: "MULLloadidx4",
5119 auxType: auxSymOff,
5120 argLen: 4,
5121 resultInArg0: true,
5122 clobberFlags: true,
5123 symEffect: SymRead,
5124 asm: x86.AIMULL,
5125 reg: regInfo{
5126 inputs: []inputInfo{
5127 {0, 239},
5128 {2, 255},
5129 {1, 65791},
5130 },
5131 outputs: []outputInfo{
5132 {0, 239},
5133 },
5134 },
5135 },
5136 {
5137 name: "ANDLloadidx4",
5138 auxType: auxSymOff,
5139 argLen: 4,
5140 resultInArg0: true,
5141 clobberFlags: true,
5142 symEffect: SymRead,
5143 asm: x86.AANDL,
5144 reg: regInfo{
5145 inputs: []inputInfo{
5146 {0, 239},
5147 {2, 255},
5148 {1, 65791},
5149 },
5150 outputs: []outputInfo{
5151 {0, 239},
5152 },
5153 },
5154 },
5155 {
5156 name: "ORLloadidx4",
5157 auxType: auxSymOff,
5158 argLen: 4,
5159 resultInArg0: true,
5160 clobberFlags: true,
5161 symEffect: SymRead,
5162 asm: x86.AORL,
5163 reg: regInfo{
5164 inputs: []inputInfo{
5165 {0, 239},
5166 {2, 255},
5167 {1, 65791},
5168 },
5169 outputs: []outputInfo{
5170 {0, 239},
5171 },
5172 },
5173 },
5174 {
5175 name: "XORLloadidx4",
5176 auxType: auxSymOff,
5177 argLen: 4,
5178 resultInArg0: true,
5179 clobberFlags: true,
5180 symEffect: SymRead,
5181 asm: x86.AXORL,
5182 reg: regInfo{
5183 inputs: []inputInfo{
5184 {0, 239},
5185 {2, 255},
5186 {1, 65791},
5187 },
5188 outputs: []outputInfo{
5189 {0, 239},
5190 },
5191 },
5192 },
5193 {
5194 name: "NEGL",
5195 argLen: 1,
5196 resultInArg0: true,
5197 clobberFlags: true,
5198 asm: x86.ANEGL,
5199 reg: regInfo{
5200 inputs: []inputInfo{
5201 {0, 239},
5202 },
5203 outputs: []outputInfo{
5204 {0, 239},
5205 },
5206 },
5207 },
5208 {
5209 name: "NOTL",
5210 argLen: 1,
5211 resultInArg0: true,
5212 asm: x86.ANOTL,
5213 reg: regInfo{
5214 inputs: []inputInfo{
5215 {0, 239},
5216 },
5217 outputs: []outputInfo{
5218 {0, 239},
5219 },
5220 },
5221 },
5222 {
5223 name: "BSFL",
5224 argLen: 1,
5225 clobberFlags: true,
5226 asm: x86.ABSFL,
5227 reg: regInfo{
5228 inputs: []inputInfo{
5229 {0, 239},
5230 },
5231 outputs: []outputInfo{
5232 {0, 239},
5233 },
5234 },
5235 },
5236 {
5237 name: "BSFW",
5238 argLen: 1,
5239 clobberFlags: true,
5240 asm: x86.ABSFW,
5241 reg: regInfo{
5242 inputs: []inputInfo{
5243 {0, 239},
5244 },
5245 outputs: []outputInfo{
5246 {0, 239},
5247 },
5248 },
5249 },
5250 {
5251 name: "LoweredCtz32",
5252 argLen: 1,
5253 clobberFlags: true,
5254 reg: regInfo{
5255 inputs: []inputInfo{
5256 {0, 239},
5257 },
5258 outputs: []outputInfo{
5259 {0, 239},
5260 },
5261 },
5262 },
5263 {
5264 name: "LoweredCtz64",
5265 argLen: 2,
5266 resultNotInArgs: true,
5267 clobberFlags: true,
5268 reg: regInfo{
5269 inputs: []inputInfo{
5270 {0, 239},
5271 {1, 239},
5272 },
5273 outputs: []outputInfo{
5274 {0, 239},
5275 },
5276 },
5277 },
5278 {
5279 name: "BSRL",
5280 argLen: 1,
5281 clobberFlags: true,
5282 asm: x86.ABSRL,
5283 reg: regInfo{
5284 inputs: []inputInfo{
5285 {0, 239},
5286 },
5287 outputs: []outputInfo{
5288 {0, 239},
5289 },
5290 },
5291 },
5292 {
5293 name: "BSRW",
5294 argLen: 1,
5295 clobberFlags: true,
5296 asm: x86.ABSRW,
5297 reg: regInfo{
5298 inputs: []inputInfo{
5299 {0, 239},
5300 },
5301 outputs: []outputInfo{
5302 {0, 239},
5303 },
5304 },
5305 },
5306 {
5307 name: "BSWAPL",
5308 argLen: 1,
5309 resultInArg0: true,
5310 asm: x86.ABSWAPL,
5311 reg: regInfo{
5312 inputs: []inputInfo{
5313 {0, 239},
5314 },
5315 outputs: []outputInfo{
5316 {0, 239},
5317 },
5318 },
5319 },
5320 {
5321 name: "SQRTSD",
5322 argLen: 1,
5323 asm: x86.ASQRTSD,
5324 reg: regInfo{
5325 inputs: []inputInfo{
5326 {0, 65280},
5327 },
5328 outputs: []outputInfo{
5329 {0, 65280},
5330 },
5331 },
5332 },
5333 {
5334 name: "SQRTSS",
5335 argLen: 1,
5336 asm: x86.ASQRTSS,
5337 reg: regInfo{
5338 inputs: []inputInfo{
5339 {0, 65280},
5340 },
5341 outputs: []outputInfo{
5342 {0, 65280},
5343 },
5344 },
5345 },
5346 {
5347 name: "SBBLcarrymask",
5348 argLen: 1,
5349 asm: x86.ASBBL,
5350 reg: regInfo{
5351 outputs: []outputInfo{
5352 {0, 239},
5353 },
5354 },
5355 },
5356 {
5357 name: "SETEQ",
5358 argLen: 1,
5359 asm: x86.ASETEQ,
5360 reg: regInfo{
5361 outputs: []outputInfo{
5362 {0, 239},
5363 },
5364 },
5365 },
5366 {
5367 name: "SETNE",
5368 argLen: 1,
5369 asm: x86.ASETNE,
5370 reg: regInfo{
5371 outputs: []outputInfo{
5372 {0, 239},
5373 },
5374 },
5375 },
5376 {
5377 name: "SETL",
5378 argLen: 1,
5379 asm: x86.ASETLT,
5380 reg: regInfo{
5381 outputs: []outputInfo{
5382 {0, 239},
5383 },
5384 },
5385 },
5386 {
5387 name: "SETLE",
5388 argLen: 1,
5389 asm: x86.ASETLE,
5390 reg: regInfo{
5391 outputs: []outputInfo{
5392 {0, 239},
5393 },
5394 },
5395 },
5396 {
5397 name: "SETG",
5398 argLen: 1,
5399 asm: x86.ASETGT,
5400 reg: regInfo{
5401 outputs: []outputInfo{
5402 {0, 239},
5403 },
5404 },
5405 },
5406 {
5407 name: "SETGE",
5408 argLen: 1,
5409 asm: x86.ASETGE,
5410 reg: regInfo{
5411 outputs: []outputInfo{
5412 {0, 239},
5413 },
5414 },
5415 },
5416 {
5417 name: "SETB",
5418 argLen: 1,
5419 asm: x86.ASETCS,
5420 reg: regInfo{
5421 outputs: []outputInfo{
5422 {0, 239},
5423 },
5424 },
5425 },
5426 {
5427 name: "SETBE",
5428 argLen: 1,
5429 asm: x86.ASETLS,
5430 reg: regInfo{
5431 outputs: []outputInfo{
5432 {0, 239},
5433 },
5434 },
5435 },
5436 {
5437 name: "SETA",
5438 argLen: 1,
5439 asm: x86.ASETHI,
5440 reg: regInfo{
5441 outputs: []outputInfo{
5442 {0, 239},
5443 },
5444 },
5445 },
5446 {
5447 name: "SETAE",
5448 argLen: 1,
5449 asm: x86.ASETCC,
5450 reg: regInfo{
5451 outputs: []outputInfo{
5452 {0, 239},
5453 },
5454 },
5455 },
5456 {
5457 name: "SETO",
5458 argLen: 1,
5459 asm: x86.ASETOS,
5460 reg: regInfo{
5461 outputs: []outputInfo{
5462 {0, 239},
5463 },
5464 },
5465 },
5466 {
5467 name: "SETEQF",
5468 argLen: 1,
5469 clobberFlags: true,
5470 asm: x86.ASETEQ,
5471 reg: regInfo{
5472 clobbers: 1,
5473 outputs: []outputInfo{
5474 {0, 238},
5475 },
5476 },
5477 },
5478 {
5479 name: "SETNEF",
5480 argLen: 1,
5481 clobberFlags: true,
5482 asm: x86.ASETNE,
5483 reg: regInfo{
5484 clobbers: 1,
5485 outputs: []outputInfo{
5486 {0, 238},
5487 },
5488 },
5489 },
5490 {
5491 name: "SETORD",
5492 argLen: 1,
5493 asm: x86.ASETPC,
5494 reg: regInfo{
5495 outputs: []outputInfo{
5496 {0, 239},
5497 },
5498 },
5499 },
5500 {
5501 name: "SETNAN",
5502 argLen: 1,
5503 asm: x86.ASETPS,
5504 reg: regInfo{
5505 outputs: []outputInfo{
5506 {0, 239},
5507 },
5508 },
5509 },
5510 {
5511 name: "SETGF",
5512 argLen: 1,
5513 asm: x86.ASETHI,
5514 reg: regInfo{
5515 outputs: []outputInfo{
5516 {0, 239},
5517 },
5518 },
5519 },
5520 {
5521 name: "SETGEF",
5522 argLen: 1,
5523 asm: x86.ASETCC,
5524 reg: regInfo{
5525 outputs: []outputInfo{
5526 {0, 239},
5527 },
5528 },
5529 },
5530 {
5531 name: "MOVBLSX",
5532 argLen: 1,
5533 asm: x86.AMOVBLSX,
5534 reg: regInfo{
5535 inputs: []inputInfo{
5536 {0, 239},
5537 },
5538 outputs: []outputInfo{
5539 {0, 239},
5540 },
5541 },
5542 },
5543 {
5544 name: "MOVBLZX",
5545 argLen: 1,
5546 asm: x86.AMOVBLZX,
5547 reg: regInfo{
5548 inputs: []inputInfo{
5549 {0, 239},
5550 },
5551 outputs: []outputInfo{
5552 {0, 239},
5553 },
5554 },
5555 },
5556 {
5557 name: "MOVWLSX",
5558 argLen: 1,
5559 asm: x86.AMOVWLSX,
5560 reg: regInfo{
5561 inputs: []inputInfo{
5562 {0, 239},
5563 },
5564 outputs: []outputInfo{
5565 {0, 239},
5566 },
5567 },
5568 },
5569 {
5570 name: "MOVWLZX",
5571 argLen: 1,
5572 asm: x86.AMOVWLZX,
5573 reg: regInfo{
5574 inputs: []inputInfo{
5575 {0, 239},
5576 },
5577 outputs: []outputInfo{
5578 {0, 239},
5579 },
5580 },
5581 },
5582 {
5583 name: "MOVLconst",
5584 auxType: auxInt32,
5585 argLen: 0,
5586 rematerializeable: true,
5587 asm: x86.AMOVL,
5588 reg: regInfo{
5589 outputs: []outputInfo{
5590 {0, 239},
5591 },
5592 },
5593 },
5594 {
5595 name: "CVTTSD2SL",
5596 argLen: 1,
5597 asm: x86.ACVTTSD2SL,
5598 reg: regInfo{
5599 inputs: []inputInfo{
5600 {0, 65280},
5601 },
5602 outputs: []outputInfo{
5603 {0, 239},
5604 },
5605 },
5606 },
5607 {
5608 name: "CVTTSS2SL",
5609 argLen: 1,
5610 asm: x86.ACVTTSS2SL,
5611 reg: regInfo{
5612 inputs: []inputInfo{
5613 {0, 65280},
5614 },
5615 outputs: []outputInfo{
5616 {0, 239},
5617 },
5618 },
5619 },
5620 {
5621 name: "CVTSL2SS",
5622 argLen: 1,
5623 asm: x86.ACVTSL2SS,
5624 reg: regInfo{
5625 inputs: []inputInfo{
5626 {0, 239},
5627 },
5628 outputs: []outputInfo{
5629 {0, 65280},
5630 },
5631 },
5632 },
5633 {
5634 name: "CVTSL2SD",
5635 argLen: 1,
5636 asm: x86.ACVTSL2SD,
5637 reg: regInfo{
5638 inputs: []inputInfo{
5639 {0, 239},
5640 },
5641 outputs: []outputInfo{
5642 {0, 65280},
5643 },
5644 },
5645 },
5646 {
5647 name: "CVTSD2SS",
5648 argLen: 1,
5649 asm: x86.ACVTSD2SS,
5650 reg: regInfo{
5651 inputs: []inputInfo{
5652 {0, 65280},
5653 },
5654 outputs: []outputInfo{
5655 {0, 65280},
5656 },
5657 },
5658 },
5659 {
5660 name: "CVTSS2SD",
5661 argLen: 1,
5662 asm: x86.ACVTSS2SD,
5663 reg: regInfo{
5664 inputs: []inputInfo{
5665 {0, 65280},
5666 },
5667 outputs: []outputInfo{
5668 {0, 65280},
5669 },
5670 },
5671 },
5672 {
5673 name: "PXOR",
5674 argLen: 2,
5675 commutative: true,
5676 resultInArg0: true,
5677 asm: x86.APXOR,
5678 reg: regInfo{
5679 inputs: []inputInfo{
5680 {0, 65280},
5681 {1, 65280},
5682 },
5683 outputs: []outputInfo{
5684 {0, 65280},
5685 },
5686 },
5687 },
5688 {
5689 name: "LEAL",
5690 auxType: auxSymOff,
5691 argLen: 1,
5692 rematerializeable: true,
5693 symEffect: SymAddr,
5694 reg: regInfo{
5695 inputs: []inputInfo{
5696 {0, 65791},
5697 },
5698 outputs: []outputInfo{
5699 {0, 239},
5700 },
5701 },
5702 },
5703 {
5704 name: "LEAL1",
5705 auxType: auxSymOff,
5706 argLen: 2,
5707 commutative: true,
5708 symEffect: SymAddr,
5709 reg: regInfo{
5710 inputs: []inputInfo{
5711 {1, 255},
5712 {0, 65791},
5713 },
5714 outputs: []outputInfo{
5715 {0, 239},
5716 },
5717 },
5718 },
5719 {
5720 name: "LEAL2",
5721 auxType: auxSymOff,
5722 argLen: 2,
5723 symEffect: SymAddr,
5724 reg: regInfo{
5725 inputs: []inputInfo{
5726 {1, 255},
5727 {0, 65791},
5728 },
5729 outputs: []outputInfo{
5730 {0, 239},
5731 },
5732 },
5733 },
5734 {
5735 name: "LEAL4",
5736 auxType: auxSymOff,
5737 argLen: 2,
5738 symEffect: SymAddr,
5739 reg: regInfo{
5740 inputs: []inputInfo{
5741 {1, 255},
5742 {0, 65791},
5743 },
5744 outputs: []outputInfo{
5745 {0, 239},
5746 },
5747 },
5748 },
5749 {
5750 name: "LEAL8",
5751 auxType: auxSymOff,
5752 argLen: 2,
5753 symEffect: SymAddr,
5754 reg: regInfo{
5755 inputs: []inputInfo{
5756 {1, 255},
5757 {0, 65791},
5758 },
5759 outputs: []outputInfo{
5760 {0, 239},
5761 },
5762 },
5763 },
5764 {
5765 name: "MOVBload",
5766 auxType: auxSymOff,
5767 argLen: 2,
5768 faultOnNilArg0: true,
5769 symEffect: SymRead,
5770 asm: x86.AMOVBLZX,
5771 reg: regInfo{
5772 inputs: []inputInfo{
5773 {0, 65791},
5774 },
5775 outputs: []outputInfo{
5776 {0, 239},
5777 },
5778 },
5779 },
5780 {
5781 name: "MOVBLSXload",
5782 auxType: auxSymOff,
5783 argLen: 2,
5784 faultOnNilArg0: true,
5785 symEffect: SymRead,
5786 asm: x86.AMOVBLSX,
5787 reg: regInfo{
5788 inputs: []inputInfo{
5789 {0, 65791},
5790 },
5791 outputs: []outputInfo{
5792 {0, 239},
5793 },
5794 },
5795 },
5796 {
5797 name: "MOVWload",
5798 auxType: auxSymOff,
5799 argLen: 2,
5800 faultOnNilArg0: true,
5801 symEffect: SymRead,
5802 asm: x86.AMOVWLZX,
5803 reg: regInfo{
5804 inputs: []inputInfo{
5805 {0, 65791},
5806 },
5807 outputs: []outputInfo{
5808 {0, 239},
5809 },
5810 },
5811 },
5812 {
5813 name: "MOVWLSXload",
5814 auxType: auxSymOff,
5815 argLen: 2,
5816 faultOnNilArg0: true,
5817 symEffect: SymRead,
5818 asm: x86.AMOVWLSX,
5819 reg: regInfo{
5820 inputs: []inputInfo{
5821 {0, 65791},
5822 },
5823 outputs: []outputInfo{
5824 {0, 239},
5825 },
5826 },
5827 },
5828 {
5829 name: "MOVLload",
5830 auxType: auxSymOff,
5831 argLen: 2,
5832 faultOnNilArg0: true,
5833 symEffect: SymRead,
5834 asm: x86.AMOVL,
5835 reg: regInfo{
5836 inputs: []inputInfo{
5837 {0, 65791},
5838 },
5839 outputs: []outputInfo{
5840 {0, 239},
5841 },
5842 },
5843 },
5844 {
5845 name: "MOVBstore",
5846 auxType: auxSymOff,
5847 argLen: 3,
5848 faultOnNilArg0: true,
5849 symEffect: SymWrite,
5850 asm: x86.AMOVB,
5851 reg: regInfo{
5852 inputs: []inputInfo{
5853 {1, 255},
5854 {0, 65791},
5855 },
5856 },
5857 },
5858 {
5859 name: "MOVWstore",
5860 auxType: auxSymOff,
5861 argLen: 3,
5862 faultOnNilArg0: true,
5863 symEffect: SymWrite,
5864 asm: x86.AMOVW,
5865 reg: regInfo{
5866 inputs: []inputInfo{
5867 {1, 255},
5868 {0, 65791},
5869 },
5870 },
5871 },
5872 {
5873 name: "MOVLstore",
5874 auxType: auxSymOff,
5875 argLen: 3,
5876 faultOnNilArg0: true,
5877 symEffect: SymWrite,
5878 asm: x86.AMOVL,
5879 reg: regInfo{
5880 inputs: []inputInfo{
5881 {1, 255},
5882 {0, 65791},
5883 },
5884 },
5885 },
5886 {
5887 name: "ADDLmodify",
5888 auxType: auxSymOff,
5889 argLen: 3,
5890 clobberFlags: true,
5891 faultOnNilArg0: true,
5892 symEffect: SymRead | SymWrite,
5893 asm: x86.AADDL,
5894 reg: regInfo{
5895 inputs: []inputInfo{
5896 {1, 255},
5897 {0, 65791},
5898 },
5899 },
5900 },
5901 {
5902 name: "SUBLmodify",
5903 auxType: auxSymOff,
5904 argLen: 3,
5905 clobberFlags: true,
5906 faultOnNilArg0: true,
5907 symEffect: SymRead | SymWrite,
5908 asm: x86.ASUBL,
5909 reg: regInfo{
5910 inputs: []inputInfo{
5911 {1, 255},
5912 {0, 65791},
5913 },
5914 },
5915 },
5916 {
5917 name: "ANDLmodify",
5918 auxType: auxSymOff,
5919 argLen: 3,
5920 clobberFlags: true,
5921 faultOnNilArg0: true,
5922 symEffect: SymRead | SymWrite,
5923 asm: x86.AANDL,
5924 reg: regInfo{
5925 inputs: []inputInfo{
5926 {1, 255},
5927 {0, 65791},
5928 },
5929 },
5930 },
5931 {
5932 name: "ORLmodify",
5933 auxType: auxSymOff,
5934 argLen: 3,
5935 clobberFlags: true,
5936 faultOnNilArg0: true,
5937 symEffect: SymRead | SymWrite,
5938 asm: x86.AORL,
5939 reg: regInfo{
5940 inputs: []inputInfo{
5941 {1, 255},
5942 {0, 65791},
5943 },
5944 },
5945 },
5946 {
5947 name: "XORLmodify",
5948 auxType: auxSymOff,
5949 argLen: 3,
5950 clobberFlags: true,
5951 faultOnNilArg0: true,
5952 symEffect: SymRead | SymWrite,
5953 asm: x86.AXORL,
5954 reg: regInfo{
5955 inputs: []inputInfo{
5956 {1, 255},
5957 {0, 65791},
5958 },
5959 },
5960 },
5961 {
5962 name: "ADDLmodifyidx4",
5963 auxType: auxSymOff,
5964 argLen: 4,
5965 clobberFlags: true,
5966 symEffect: SymRead | SymWrite,
5967 asm: x86.AADDL,
5968 reg: regInfo{
5969 inputs: []inputInfo{
5970 {1, 255},
5971 {2, 255},
5972 {0, 65791},
5973 },
5974 },
5975 },
5976 {
5977 name: "SUBLmodifyidx4",
5978 auxType: auxSymOff,
5979 argLen: 4,
5980 clobberFlags: true,
5981 symEffect: SymRead | SymWrite,
5982 asm: x86.ASUBL,
5983 reg: regInfo{
5984 inputs: []inputInfo{
5985 {1, 255},
5986 {2, 255},
5987 {0, 65791},
5988 },
5989 },
5990 },
5991 {
5992 name: "ANDLmodifyidx4",
5993 auxType: auxSymOff,
5994 argLen: 4,
5995 clobberFlags: true,
5996 symEffect: SymRead | SymWrite,
5997 asm: x86.AANDL,
5998 reg: regInfo{
5999 inputs: []inputInfo{
6000 {1, 255},
6001 {2, 255},
6002 {0, 65791},
6003 },
6004 },
6005 },
6006 {
6007 name: "ORLmodifyidx4",
6008 auxType: auxSymOff,
6009 argLen: 4,
6010 clobberFlags: true,
6011 symEffect: SymRead | SymWrite,
6012 asm: x86.AORL,
6013 reg: regInfo{
6014 inputs: []inputInfo{
6015 {1, 255},
6016 {2, 255},
6017 {0, 65791},
6018 },
6019 },
6020 },
6021 {
6022 name: "XORLmodifyidx4",
6023 auxType: auxSymOff,
6024 argLen: 4,
6025 clobberFlags: true,
6026 symEffect: SymRead | SymWrite,
6027 asm: x86.AXORL,
6028 reg: regInfo{
6029 inputs: []inputInfo{
6030 {1, 255},
6031 {2, 255},
6032 {0, 65791},
6033 },
6034 },
6035 },
6036 {
6037 name: "ADDLconstmodify",
6038 auxType: auxSymValAndOff,
6039 argLen: 2,
6040 clobberFlags: true,
6041 faultOnNilArg0: true,
6042 symEffect: SymRead | SymWrite,
6043 asm: x86.AADDL,
6044 reg: regInfo{
6045 inputs: []inputInfo{
6046 {0, 65791},
6047 },
6048 },
6049 },
6050 {
6051 name: "ANDLconstmodify",
6052 auxType: auxSymValAndOff,
6053 argLen: 2,
6054 clobberFlags: true,
6055 faultOnNilArg0: true,
6056 symEffect: SymRead | SymWrite,
6057 asm: x86.AANDL,
6058 reg: regInfo{
6059 inputs: []inputInfo{
6060 {0, 65791},
6061 },
6062 },
6063 },
6064 {
6065 name: "ORLconstmodify",
6066 auxType: auxSymValAndOff,
6067 argLen: 2,
6068 clobberFlags: true,
6069 faultOnNilArg0: true,
6070 symEffect: SymRead | SymWrite,
6071 asm: x86.AORL,
6072 reg: regInfo{
6073 inputs: []inputInfo{
6074 {0, 65791},
6075 },
6076 },
6077 },
6078 {
6079 name: "XORLconstmodify",
6080 auxType: auxSymValAndOff,
6081 argLen: 2,
6082 clobberFlags: true,
6083 faultOnNilArg0: true,
6084 symEffect: SymRead | SymWrite,
6085 asm: x86.AXORL,
6086 reg: regInfo{
6087 inputs: []inputInfo{
6088 {0, 65791},
6089 },
6090 },
6091 },
6092 {
6093 name: "ADDLconstmodifyidx4",
6094 auxType: auxSymValAndOff,
6095 argLen: 3,
6096 clobberFlags: true,
6097 symEffect: SymRead | SymWrite,
6098 asm: x86.AADDL,
6099 reg: regInfo{
6100 inputs: []inputInfo{
6101 {1, 255},
6102 {0, 65791},
6103 },
6104 },
6105 },
6106 {
6107 name: "ANDLconstmodifyidx4",
6108 auxType: auxSymValAndOff,
6109 argLen: 3,
6110 clobberFlags: true,
6111 symEffect: SymRead | SymWrite,
6112 asm: x86.AANDL,
6113 reg: regInfo{
6114 inputs: []inputInfo{
6115 {1, 255},
6116 {0, 65791},
6117 },
6118 },
6119 },
6120 {
6121 name: "ORLconstmodifyidx4",
6122 auxType: auxSymValAndOff,
6123 argLen: 3,
6124 clobberFlags: true,
6125 symEffect: SymRead | SymWrite,
6126 asm: x86.AORL,
6127 reg: regInfo{
6128 inputs: []inputInfo{
6129 {1, 255},
6130 {0, 65791},
6131 },
6132 },
6133 },
6134 {
6135 name: "XORLconstmodifyidx4",
6136 auxType: auxSymValAndOff,
6137 argLen: 3,
6138 clobberFlags: true,
6139 symEffect: SymRead | SymWrite,
6140 asm: x86.AXORL,
6141 reg: regInfo{
6142 inputs: []inputInfo{
6143 {1, 255},
6144 {0, 65791},
6145 },
6146 },
6147 },
6148 {
6149 name: "MOVBloadidx1",
6150 auxType: auxSymOff,
6151 argLen: 3,
6152 commutative: true,
6153 symEffect: SymRead,
6154 asm: x86.AMOVBLZX,
6155 reg: regInfo{
6156 inputs: []inputInfo{
6157 {1, 255},
6158 {0, 65791},
6159 },
6160 outputs: []outputInfo{
6161 {0, 239},
6162 },
6163 },
6164 },
6165 {
6166 name: "MOVWloadidx1",
6167 auxType: auxSymOff,
6168 argLen: 3,
6169 commutative: true,
6170 symEffect: SymRead,
6171 asm: x86.AMOVWLZX,
6172 reg: regInfo{
6173 inputs: []inputInfo{
6174 {1, 255},
6175 {0, 65791},
6176 },
6177 outputs: []outputInfo{
6178 {0, 239},
6179 },
6180 },
6181 },
6182 {
6183 name: "MOVWloadidx2",
6184 auxType: auxSymOff,
6185 argLen: 3,
6186 symEffect: SymRead,
6187 asm: x86.AMOVWLZX,
6188 reg: regInfo{
6189 inputs: []inputInfo{
6190 {1, 255},
6191 {0, 65791},
6192 },
6193 outputs: []outputInfo{
6194 {0, 239},
6195 },
6196 },
6197 },
6198 {
6199 name: "MOVLloadidx1",
6200 auxType: auxSymOff,
6201 argLen: 3,
6202 commutative: true,
6203 symEffect: SymRead,
6204 asm: x86.AMOVL,
6205 reg: regInfo{
6206 inputs: []inputInfo{
6207 {1, 255},
6208 {0, 65791},
6209 },
6210 outputs: []outputInfo{
6211 {0, 239},
6212 },
6213 },
6214 },
6215 {
6216 name: "MOVLloadidx4",
6217 auxType: auxSymOff,
6218 argLen: 3,
6219 symEffect: SymRead,
6220 asm: x86.AMOVL,
6221 reg: regInfo{
6222 inputs: []inputInfo{
6223 {1, 255},
6224 {0, 65791},
6225 },
6226 outputs: []outputInfo{
6227 {0, 239},
6228 },
6229 },
6230 },
6231 {
6232 name: "MOVBstoreidx1",
6233 auxType: auxSymOff,
6234 argLen: 4,
6235 commutative: true,
6236 symEffect: SymWrite,
6237 asm: x86.AMOVB,
6238 reg: regInfo{
6239 inputs: []inputInfo{
6240 {1, 255},
6241 {2, 255},
6242 {0, 65791},
6243 },
6244 },
6245 },
6246 {
6247 name: "MOVWstoreidx1",
6248 auxType: auxSymOff,
6249 argLen: 4,
6250 commutative: true,
6251 symEffect: SymWrite,
6252 asm: x86.AMOVW,
6253 reg: regInfo{
6254 inputs: []inputInfo{
6255 {1, 255},
6256 {2, 255},
6257 {0, 65791},
6258 },
6259 },
6260 },
6261 {
6262 name: "MOVWstoreidx2",
6263 auxType: auxSymOff,
6264 argLen: 4,
6265 symEffect: SymWrite,
6266 asm: x86.AMOVW,
6267 reg: regInfo{
6268 inputs: []inputInfo{
6269 {1, 255},
6270 {2, 255},
6271 {0, 65791},
6272 },
6273 },
6274 },
6275 {
6276 name: "MOVLstoreidx1",
6277 auxType: auxSymOff,
6278 argLen: 4,
6279 commutative: true,
6280 symEffect: SymWrite,
6281 asm: x86.AMOVL,
6282 reg: regInfo{
6283 inputs: []inputInfo{
6284 {1, 255},
6285 {2, 255},
6286 {0, 65791},
6287 },
6288 },
6289 },
6290 {
6291 name: "MOVLstoreidx4",
6292 auxType: auxSymOff,
6293 argLen: 4,
6294 symEffect: SymWrite,
6295 asm: x86.AMOVL,
6296 reg: regInfo{
6297 inputs: []inputInfo{
6298 {1, 255},
6299 {2, 255},
6300 {0, 65791},
6301 },
6302 },
6303 },
6304 {
6305 name: "MOVBstoreconst",
6306 auxType: auxSymValAndOff,
6307 argLen: 2,
6308 faultOnNilArg0: true,
6309 symEffect: SymWrite,
6310 asm: x86.AMOVB,
6311 reg: regInfo{
6312 inputs: []inputInfo{
6313 {0, 65791},
6314 },
6315 },
6316 },
6317 {
6318 name: "MOVWstoreconst",
6319 auxType: auxSymValAndOff,
6320 argLen: 2,
6321 faultOnNilArg0: true,
6322 symEffect: SymWrite,
6323 asm: x86.AMOVW,
6324 reg: regInfo{
6325 inputs: []inputInfo{
6326 {0, 65791},
6327 },
6328 },
6329 },
6330 {
6331 name: "MOVLstoreconst",
6332 auxType: auxSymValAndOff,
6333 argLen: 2,
6334 faultOnNilArg0: true,
6335 symEffect: SymWrite,
6336 asm: x86.AMOVL,
6337 reg: regInfo{
6338 inputs: []inputInfo{
6339 {0, 65791},
6340 },
6341 },
6342 },
6343 {
6344 name: "MOVBstoreconstidx1",
6345 auxType: auxSymValAndOff,
6346 argLen: 3,
6347 symEffect: SymWrite,
6348 asm: x86.AMOVB,
6349 reg: regInfo{
6350 inputs: []inputInfo{
6351 {1, 255},
6352 {0, 65791},
6353 },
6354 },
6355 },
6356 {
6357 name: "MOVWstoreconstidx1",
6358 auxType: auxSymValAndOff,
6359 argLen: 3,
6360 symEffect: SymWrite,
6361 asm: x86.AMOVW,
6362 reg: regInfo{
6363 inputs: []inputInfo{
6364 {1, 255},
6365 {0, 65791},
6366 },
6367 },
6368 },
6369 {
6370 name: "MOVWstoreconstidx2",
6371 auxType: auxSymValAndOff,
6372 argLen: 3,
6373 symEffect: SymWrite,
6374 asm: x86.AMOVW,
6375 reg: regInfo{
6376 inputs: []inputInfo{
6377 {1, 255},
6378 {0, 65791},
6379 },
6380 },
6381 },
6382 {
6383 name: "MOVLstoreconstidx1",
6384 auxType: auxSymValAndOff,
6385 argLen: 3,
6386 symEffect: SymWrite,
6387 asm: x86.AMOVL,
6388 reg: regInfo{
6389 inputs: []inputInfo{
6390 {1, 255},
6391 {0, 65791},
6392 },
6393 },
6394 },
6395 {
6396 name: "MOVLstoreconstidx4",
6397 auxType: auxSymValAndOff,
6398 argLen: 3,
6399 symEffect: SymWrite,
6400 asm: x86.AMOVL,
6401 reg: regInfo{
6402 inputs: []inputInfo{
6403 {1, 255},
6404 {0, 65791},
6405 },
6406 },
6407 },
6408 {
6409 name: "DUFFZERO",
6410 auxType: auxInt64,
6411 argLen: 3,
6412 faultOnNilArg0: true,
6413 reg: regInfo{
6414 inputs: []inputInfo{
6415 {0, 128},
6416 {1, 1},
6417 },
6418 clobbers: 130,
6419 },
6420 },
6421 {
6422 name: "REPSTOSL",
6423 argLen: 4,
6424 faultOnNilArg0: true,
6425 reg: regInfo{
6426 inputs: []inputInfo{
6427 {0, 128},
6428 {1, 2},
6429 {2, 1},
6430 },
6431 clobbers: 130,
6432 },
6433 },
6434 {
6435 name: "CALLstatic",
6436 auxType: auxCallOff,
6437 argLen: 1,
6438 clobberFlags: true,
6439 call: true,
6440 reg: regInfo{
6441 clobbers: 65519,
6442 },
6443 },
6444 {
6445 name: "CALLtail",
6446 auxType: auxCallOff,
6447 argLen: 1,
6448 clobberFlags: true,
6449 call: true,
6450 tailCall: true,
6451 reg: regInfo{
6452 clobbers: 65519,
6453 },
6454 },
6455 {
6456 name: "CALLclosure",
6457 auxType: auxCallOff,
6458 argLen: 3,
6459 clobberFlags: true,
6460 call: true,
6461 reg: regInfo{
6462 inputs: []inputInfo{
6463 {1, 4},
6464 {0, 255},
6465 },
6466 clobbers: 65519,
6467 },
6468 },
6469 {
6470 name: "CALLinter",
6471 auxType: auxCallOff,
6472 argLen: 2,
6473 clobberFlags: true,
6474 call: true,
6475 reg: regInfo{
6476 inputs: []inputInfo{
6477 {0, 239},
6478 },
6479 clobbers: 65519,
6480 },
6481 },
6482 {
6483 name: "DUFFCOPY",
6484 auxType: auxInt64,
6485 argLen: 3,
6486 clobberFlags: true,
6487 faultOnNilArg0: true,
6488 faultOnNilArg1: true,
6489 reg: regInfo{
6490 inputs: []inputInfo{
6491 {0, 128},
6492 {1, 64},
6493 },
6494 clobbers: 194,
6495 },
6496 },
6497 {
6498 name: "REPMOVSL",
6499 argLen: 4,
6500 faultOnNilArg0: true,
6501 faultOnNilArg1: true,
6502 reg: regInfo{
6503 inputs: []inputInfo{
6504 {0, 128},
6505 {1, 64},
6506 {2, 2},
6507 },
6508 clobbers: 194,
6509 },
6510 },
6511 {
6512 name: "InvertFlags",
6513 argLen: 1,
6514 reg: regInfo{},
6515 },
6516 {
6517 name: "LoweredGetG",
6518 argLen: 1,
6519 reg: regInfo{
6520 outputs: []outputInfo{
6521 {0, 239},
6522 },
6523 },
6524 },
6525 {
6526 name: "LoweredGetClosurePtr",
6527 argLen: 0,
6528 zeroWidth: true,
6529 reg: regInfo{
6530 outputs: []outputInfo{
6531 {0, 4},
6532 },
6533 },
6534 },
6535 {
6536 name: "LoweredGetCallerPC",
6537 argLen: 0,
6538 rematerializeable: true,
6539 reg: regInfo{
6540 outputs: []outputInfo{
6541 {0, 239},
6542 },
6543 },
6544 },
6545 {
6546 name: "LoweredGetCallerSP",
6547 argLen: 1,
6548 rematerializeable: true,
6549 reg: regInfo{
6550 outputs: []outputInfo{
6551 {0, 239},
6552 },
6553 },
6554 },
6555 {
6556 name: "LoweredNilCheck",
6557 argLen: 2,
6558 clobberFlags: true,
6559 nilCheck: true,
6560 faultOnNilArg0: true,
6561 reg: regInfo{
6562 inputs: []inputInfo{
6563 {0, 255},
6564 },
6565 },
6566 },
6567 {
6568 name: "LoweredWB",
6569 auxType: auxInt64,
6570 argLen: 1,
6571 clobberFlags: true,
6572 reg: regInfo{
6573 clobbers: 65280,
6574 outputs: []outputInfo{
6575 {0, 128},
6576 },
6577 },
6578 },
6579 {
6580 name: "LoweredPanicBoundsA",
6581 auxType: auxInt64,
6582 argLen: 3,
6583 call: true,
6584 reg: regInfo{
6585 inputs: []inputInfo{
6586 {0, 4},
6587 {1, 8},
6588 },
6589 },
6590 },
6591 {
6592 name: "LoweredPanicBoundsB",
6593 auxType: auxInt64,
6594 argLen: 3,
6595 call: true,
6596 reg: regInfo{
6597 inputs: []inputInfo{
6598 {0, 2},
6599 {1, 4},
6600 },
6601 },
6602 },
6603 {
6604 name: "LoweredPanicBoundsC",
6605 auxType: auxInt64,
6606 argLen: 3,
6607 call: true,
6608 reg: regInfo{
6609 inputs: []inputInfo{
6610 {0, 1},
6611 {1, 2},
6612 },
6613 },
6614 },
6615 {
6616 name: "LoweredPanicExtendA",
6617 auxType: auxInt64,
6618 argLen: 4,
6619 call: true,
6620 reg: regInfo{
6621 inputs: []inputInfo{
6622 {0, 64},
6623 {1, 4},
6624 {2, 8},
6625 },
6626 },
6627 },
6628 {
6629 name: "LoweredPanicExtendB",
6630 auxType: auxInt64,
6631 argLen: 4,
6632 call: true,
6633 reg: regInfo{
6634 inputs: []inputInfo{
6635 {0, 64},
6636 {1, 2},
6637 {2, 4},
6638 },
6639 },
6640 },
6641 {
6642 name: "LoweredPanicExtendC",
6643 auxType: auxInt64,
6644 argLen: 4,
6645 call: true,
6646 reg: regInfo{
6647 inputs: []inputInfo{
6648 {0, 64},
6649 {1, 1},
6650 {2, 2},
6651 },
6652 },
6653 },
6654 {
6655 name: "FlagEQ",
6656 argLen: 0,
6657 reg: regInfo{},
6658 },
6659 {
6660 name: "FlagLT_ULT",
6661 argLen: 0,
6662 reg: regInfo{},
6663 },
6664 {
6665 name: "FlagLT_UGT",
6666 argLen: 0,
6667 reg: regInfo{},
6668 },
6669 {
6670 name: "FlagGT_UGT",
6671 argLen: 0,
6672 reg: regInfo{},
6673 },
6674 {
6675 name: "FlagGT_ULT",
6676 argLen: 0,
6677 reg: regInfo{},
6678 },
6679 {
6680 name: "MOVSSconst1",
6681 auxType: auxFloat32,
6682 argLen: 0,
6683 reg: regInfo{
6684 outputs: []outputInfo{
6685 {0, 239},
6686 },
6687 },
6688 },
6689 {
6690 name: "MOVSDconst1",
6691 auxType: auxFloat64,
6692 argLen: 0,
6693 reg: regInfo{
6694 outputs: []outputInfo{
6695 {0, 239},
6696 },
6697 },
6698 },
6699 {
6700 name: "MOVSSconst2",
6701 argLen: 1,
6702 asm: x86.AMOVSS,
6703 reg: regInfo{
6704 inputs: []inputInfo{
6705 {0, 239},
6706 },
6707 outputs: []outputInfo{
6708 {0, 65280},
6709 },
6710 },
6711 },
6712 {
6713 name: "MOVSDconst2",
6714 argLen: 1,
6715 asm: x86.AMOVSD,
6716 reg: regInfo{
6717 inputs: []inputInfo{
6718 {0, 239},
6719 },
6720 outputs: []outputInfo{
6721 {0, 65280},
6722 },
6723 },
6724 },
6725
6726 {
6727 name: "ADDSS",
6728 argLen: 2,
6729 commutative: true,
6730 resultInArg0: true,
6731 asm: x86.AADDSS,
6732 reg: regInfo{
6733 inputs: []inputInfo{
6734 {0, 2147418112},
6735 {1, 2147418112},
6736 },
6737 outputs: []outputInfo{
6738 {0, 2147418112},
6739 },
6740 },
6741 },
6742 {
6743 name: "ADDSD",
6744 argLen: 2,
6745 commutative: true,
6746 resultInArg0: true,
6747 asm: x86.AADDSD,
6748 reg: regInfo{
6749 inputs: []inputInfo{
6750 {0, 2147418112},
6751 {1, 2147418112},
6752 },
6753 outputs: []outputInfo{
6754 {0, 2147418112},
6755 },
6756 },
6757 },
6758 {
6759 name: "SUBSS",
6760 argLen: 2,
6761 resultInArg0: true,
6762 asm: x86.ASUBSS,
6763 reg: regInfo{
6764 inputs: []inputInfo{
6765 {0, 2147418112},
6766 {1, 2147418112},
6767 },
6768 outputs: []outputInfo{
6769 {0, 2147418112},
6770 },
6771 },
6772 },
6773 {
6774 name: "SUBSD",
6775 argLen: 2,
6776 resultInArg0: true,
6777 asm: x86.ASUBSD,
6778 reg: regInfo{
6779 inputs: []inputInfo{
6780 {0, 2147418112},
6781 {1, 2147418112},
6782 },
6783 outputs: []outputInfo{
6784 {0, 2147418112},
6785 },
6786 },
6787 },
6788 {
6789 name: "MULSS",
6790 argLen: 2,
6791 commutative: true,
6792 resultInArg0: true,
6793 asm: x86.AMULSS,
6794 reg: regInfo{
6795 inputs: []inputInfo{
6796 {0, 2147418112},
6797 {1, 2147418112},
6798 },
6799 outputs: []outputInfo{
6800 {0, 2147418112},
6801 },
6802 },
6803 },
6804 {
6805 name: "MULSD",
6806 argLen: 2,
6807 commutative: true,
6808 resultInArg0: true,
6809 asm: x86.AMULSD,
6810 reg: regInfo{
6811 inputs: []inputInfo{
6812 {0, 2147418112},
6813 {1, 2147418112},
6814 },
6815 outputs: []outputInfo{
6816 {0, 2147418112},
6817 },
6818 },
6819 },
6820 {
6821 name: "DIVSS",
6822 argLen: 2,
6823 resultInArg0: true,
6824 asm: x86.ADIVSS,
6825 reg: regInfo{
6826 inputs: []inputInfo{
6827 {0, 2147418112},
6828 {1, 2147418112},
6829 },
6830 outputs: []outputInfo{
6831 {0, 2147418112},
6832 },
6833 },
6834 },
6835 {
6836 name: "DIVSD",
6837 argLen: 2,
6838 resultInArg0: true,
6839 asm: x86.ADIVSD,
6840 reg: regInfo{
6841 inputs: []inputInfo{
6842 {0, 2147418112},
6843 {1, 2147418112},
6844 },
6845 outputs: []outputInfo{
6846 {0, 2147418112},
6847 },
6848 },
6849 },
6850 {
6851 name: "MOVSSload",
6852 auxType: auxSymOff,
6853 argLen: 2,
6854 faultOnNilArg0: true,
6855 symEffect: SymRead,
6856 asm: x86.AMOVSS,
6857 reg: regInfo{
6858 inputs: []inputInfo{
6859 {0, 4295016447},
6860 },
6861 outputs: []outputInfo{
6862 {0, 2147418112},
6863 },
6864 },
6865 },
6866 {
6867 name: "MOVSDload",
6868 auxType: auxSymOff,
6869 argLen: 2,
6870 faultOnNilArg0: true,
6871 symEffect: SymRead,
6872 asm: x86.AMOVSD,
6873 reg: regInfo{
6874 inputs: []inputInfo{
6875 {0, 4295016447},
6876 },
6877 outputs: []outputInfo{
6878 {0, 2147418112},
6879 },
6880 },
6881 },
6882 {
6883 name: "MOVSSconst",
6884 auxType: auxFloat32,
6885 argLen: 0,
6886 rematerializeable: true,
6887 asm: x86.AMOVSS,
6888 reg: regInfo{
6889 outputs: []outputInfo{
6890 {0, 2147418112},
6891 },
6892 },
6893 },
6894 {
6895 name: "MOVSDconst",
6896 auxType: auxFloat64,
6897 argLen: 0,
6898 rematerializeable: true,
6899 asm: x86.AMOVSD,
6900 reg: regInfo{
6901 outputs: []outputInfo{
6902 {0, 2147418112},
6903 },
6904 },
6905 },
6906 {
6907 name: "MOVSSloadidx1",
6908 auxType: auxSymOff,
6909 argLen: 3,
6910 symEffect: SymRead,
6911 asm: x86.AMOVSS,
6912 scale: 1,
6913 reg: regInfo{
6914 inputs: []inputInfo{
6915 {1, 49151},
6916 {0, 4295016447},
6917 },
6918 outputs: []outputInfo{
6919 {0, 2147418112},
6920 },
6921 },
6922 },
6923 {
6924 name: "MOVSSloadidx4",
6925 auxType: auxSymOff,
6926 argLen: 3,
6927 symEffect: SymRead,
6928 asm: x86.AMOVSS,
6929 scale: 4,
6930 reg: regInfo{
6931 inputs: []inputInfo{
6932 {1, 49151},
6933 {0, 4295016447},
6934 },
6935 outputs: []outputInfo{
6936 {0, 2147418112},
6937 },
6938 },
6939 },
6940 {
6941 name: "MOVSDloadidx1",
6942 auxType: auxSymOff,
6943 argLen: 3,
6944 symEffect: SymRead,
6945 asm: x86.AMOVSD,
6946 scale: 1,
6947 reg: regInfo{
6948 inputs: []inputInfo{
6949 {1, 49151},
6950 {0, 4295016447},
6951 },
6952 outputs: []outputInfo{
6953 {0, 2147418112},
6954 },
6955 },
6956 },
6957 {
6958 name: "MOVSDloadidx8",
6959 auxType: auxSymOff,
6960 argLen: 3,
6961 symEffect: SymRead,
6962 asm: x86.AMOVSD,
6963 scale: 8,
6964 reg: regInfo{
6965 inputs: []inputInfo{
6966 {1, 49151},
6967 {0, 4295016447},
6968 },
6969 outputs: []outputInfo{
6970 {0, 2147418112},
6971 },
6972 },
6973 },
6974 {
6975 name: "MOVSSstore",
6976 auxType: auxSymOff,
6977 argLen: 3,
6978 faultOnNilArg0: true,
6979 symEffect: SymWrite,
6980 asm: x86.AMOVSS,
6981 reg: regInfo{
6982 inputs: []inputInfo{
6983 {1, 2147418112},
6984 {0, 4295016447},
6985 },
6986 },
6987 },
6988 {
6989 name: "MOVSDstore",
6990 auxType: auxSymOff,
6991 argLen: 3,
6992 faultOnNilArg0: true,
6993 symEffect: SymWrite,
6994 asm: x86.AMOVSD,
6995 reg: regInfo{
6996 inputs: []inputInfo{
6997 {1, 2147418112},
6998 {0, 4295016447},
6999 },
7000 },
7001 },
7002 {
7003 name: "MOVSSstoreidx1",
7004 auxType: auxSymOff,
7005 argLen: 4,
7006 symEffect: SymWrite,
7007 asm: x86.AMOVSS,
7008 scale: 1,
7009 reg: regInfo{
7010 inputs: []inputInfo{
7011 {1, 49151},
7012 {2, 2147418112},
7013 {0, 4295016447},
7014 },
7015 },
7016 },
7017 {
7018 name: "MOVSSstoreidx4",
7019 auxType: auxSymOff,
7020 argLen: 4,
7021 symEffect: SymWrite,
7022 asm: x86.AMOVSS,
7023 scale: 4,
7024 reg: regInfo{
7025 inputs: []inputInfo{
7026 {1, 49151},
7027 {2, 2147418112},
7028 {0, 4295016447},
7029 },
7030 },
7031 },
7032 {
7033 name: "MOVSDstoreidx1",
7034 auxType: auxSymOff,
7035 argLen: 4,
7036 symEffect: SymWrite,
7037 asm: x86.AMOVSD,
7038 scale: 1,
7039 reg: regInfo{
7040 inputs: []inputInfo{
7041 {1, 49151},
7042 {2, 2147418112},
7043 {0, 4295016447},
7044 },
7045 },
7046 },
7047 {
7048 name: "MOVSDstoreidx8",
7049 auxType: auxSymOff,
7050 argLen: 4,
7051 symEffect: SymWrite,
7052 asm: x86.AMOVSD,
7053 scale: 8,
7054 reg: regInfo{
7055 inputs: []inputInfo{
7056 {1, 49151},
7057 {2, 2147418112},
7058 {0, 4295016447},
7059 },
7060 },
7061 },
7062 {
7063 name: "ADDSSload",
7064 auxType: auxSymOff,
7065 argLen: 3,
7066 resultInArg0: true,
7067 faultOnNilArg1: true,
7068 symEffect: SymRead,
7069 asm: x86.AADDSS,
7070 reg: regInfo{
7071 inputs: []inputInfo{
7072 {0, 2147418112},
7073 {1, 4295032831},
7074 },
7075 outputs: []outputInfo{
7076 {0, 2147418112},
7077 },
7078 },
7079 },
7080 {
7081 name: "ADDSDload",
7082 auxType: auxSymOff,
7083 argLen: 3,
7084 resultInArg0: true,
7085 faultOnNilArg1: true,
7086 symEffect: SymRead,
7087 asm: x86.AADDSD,
7088 reg: regInfo{
7089 inputs: []inputInfo{
7090 {0, 2147418112},
7091 {1, 4295032831},
7092 },
7093 outputs: []outputInfo{
7094 {0, 2147418112},
7095 },
7096 },
7097 },
7098 {
7099 name: "SUBSSload",
7100 auxType: auxSymOff,
7101 argLen: 3,
7102 resultInArg0: true,
7103 faultOnNilArg1: true,
7104 symEffect: SymRead,
7105 asm: x86.ASUBSS,
7106 reg: regInfo{
7107 inputs: []inputInfo{
7108 {0, 2147418112},
7109 {1, 4295032831},
7110 },
7111 outputs: []outputInfo{
7112 {0, 2147418112},
7113 },
7114 },
7115 },
7116 {
7117 name: "SUBSDload",
7118 auxType: auxSymOff,
7119 argLen: 3,
7120 resultInArg0: true,
7121 faultOnNilArg1: true,
7122 symEffect: SymRead,
7123 asm: x86.ASUBSD,
7124 reg: regInfo{
7125 inputs: []inputInfo{
7126 {0, 2147418112},
7127 {1, 4295032831},
7128 },
7129 outputs: []outputInfo{
7130 {0, 2147418112},
7131 },
7132 },
7133 },
7134 {
7135 name: "MULSSload",
7136 auxType: auxSymOff,
7137 argLen: 3,
7138 resultInArg0: true,
7139 faultOnNilArg1: true,
7140 symEffect: SymRead,
7141 asm: x86.AMULSS,
7142 reg: regInfo{
7143 inputs: []inputInfo{
7144 {0, 2147418112},
7145 {1, 4295032831},
7146 },
7147 outputs: []outputInfo{
7148 {0, 2147418112},
7149 },
7150 },
7151 },
7152 {
7153 name: "MULSDload",
7154 auxType: auxSymOff,
7155 argLen: 3,
7156 resultInArg0: true,
7157 faultOnNilArg1: true,
7158 symEffect: SymRead,
7159 asm: x86.AMULSD,
7160 reg: regInfo{
7161 inputs: []inputInfo{
7162 {0, 2147418112},
7163 {1, 4295032831},
7164 },
7165 outputs: []outputInfo{
7166 {0, 2147418112},
7167 },
7168 },
7169 },
7170 {
7171 name: "DIVSSload",
7172 auxType: auxSymOff,
7173 argLen: 3,
7174 resultInArg0: true,
7175 faultOnNilArg1: true,
7176 symEffect: SymRead,
7177 asm: x86.ADIVSS,
7178 reg: regInfo{
7179 inputs: []inputInfo{
7180 {0, 2147418112},
7181 {1, 4295032831},
7182 },
7183 outputs: []outputInfo{
7184 {0, 2147418112},
7185 },
7186 },
7187 },
7188 {
7189 name: "DIVSDload",
7190 auxType: auxSymOff,
7191 argLen: 3,
7192 resultInArg0: true,
7193 faultOnNilArg1: true,
7194 symEffect: SymRead,
7195 asm: x86.ADIVSD,
7196 reg: regInfo{
7197 inputs: []inputInfo{
7198 {0, 2147418112},
7199 {1, 4295032831},
7200 },
7201 outputs: []outputInfo{
7202 {0, 2147418112},
7203 },
7204 },
7205 },
7206 {
7207 name: "ADDSSloadidx1",
7208 auxType: auxSymOff,
7209 argLen: 4,
7210 resultInArg0: true,
7211 symEffect: SymRead,
7212 asm: x86.AADDSS,
7213 scale: 1,
7214 reg: regInfo{
7215 inputs: []inputInfo{
7216 {0, 2147418112},
7217 {2, 4295016447},
7218 {1, 4295032831},
7219 },
7220 outputs: []outputInfo{
7221 {0, 2147418112},
7222 },
7223 },
7224 },
7225 {
7226 name: "ADDSSloadidx4",
7227 auxType: auxSymOff,
7228 argLen: 4,
7229 resultInArg0: true,
7230 symEffect: SymRead,
7231 asm: x86.AADDSS,
7232 scale: 4,
7233 reg: regInfo{
7234 inputs: []inputInfo{
7235 {0, 2147418112},
7236 {2, 4295016447},
7237 {1, 4295032831},
7238 },
7239 outputs: []outputInfo{
7240 {0, 2147418112},
7241 },
7242 },
7243 },
7244 {
7245 name: "ADDSDloadidx1",
7246 auxType: auxSymOff,
7247 argLen: 4,
7248 resultInArg0: true,
7249 symEffect: SymRead,
7250 asm: x86.AADDSD,
7251 scale: 1,
7252 reg: regInfo{
7253 inputs: []inputInfo{
7254 {0, 2147418112},
7255 {2, 4295016447},
7256 {1, 4295032831},
7257 },
7258 outputs: []outputInfo{
7259 {0, 2147418112},
7260 },
7261 },
7262 },
7263 {
7264 name: "ADDSDloadidx8",
7265 auxType: auxSymOff,
7266 argLen: 4,
7267 resultInArg0: true,
7268 symEffect: SymRead,
7269 asm: x86.AADDSD,
7270 scale: 8,
7271 reg: regInfo{
7272 inputs: []inputInfo{
7273 {0, 2147418112},
7274 {2, 4295016447},
7275 {1, 4295032831},
7276 },
7277 outputs: []outputInfo{
7278 {0, 2147418112},
7279 },
7280 },
7281 },
7282 {
7283 name: "SUBSSloadidx1",
7284 auxType: auxSymOff,
7285 argLen: 4,
7286 resultInArg0: true,
7287 symEffect: SymRead,
7288 asm: x86.ASUBSS,
7289 scale: 1,
7290 reg: regInfo{
7291 inputs: []inputInfo{
7292 {0, 2147418112},
7293 {2, 4295016447},
7294 {1, 4295032831},
7295 },
7296 outputs: []outputInfo{
7297 {0, 2147418112},
7298 },
7299 },
7300 },
7301 {
7302 name: "SUBSSloadidx4",
7303 auxType: auxSymOff,
7304 argLen: 4,
7305 resultInArg0: true,
7306 symEffect: SymRead,
7307 asm: x86.ASUBSS,
7308 scale: 4,
7309 reg: regInfo{
7310 inputs: []inputInfo{
7311 {0, 2147418112},
7312 {2, 4295016447},
7313 {1, 4295032831},
7314 },
7315 outputs: []outputInfo{
7316 {0, 2147418112},
7317 },
7318 },
7319 },
7320 {
7321 name: "SUBSDloadidx1",
7322 auxType: auxSymOff,
7323 argLen: 4,
7324 resultInArg0: true,
7325 symEffect: SymRead,
7326 asm: x86.ASUBSD,
7327 scale: 1,
7328 reg: regInfo{
7329 inputs: []inputInfo{
7330 {0, 2147418112},
7331 {2, 4295016447},
7332 {1, 4295032831},
7333 },
7334 outputs: []outputInfo{
7335 {0, 2147418112},
7336 },
7337 },
7338 },
7339 {
7340 name: "SUBSDloadidx8",
7341 auxType: auxSymOff,
7342 argLen: 4,
7343 resultInArg0: true,
7344 symEffect: SymRead,
7345 asm: x86.ASUBSD,
7346 scale: 8,
7347 reg: regInfo{
7348 inputs: []inputInfo{
7349 {0, 2147418112},
7350 {2, 4295016447},
7351 {1, 4295032831},
7352 },
7353 outputs: []outputInfo{
7354 {0, 2147418112},
7355 },
7356 },
7357 },
7358 {
7359 name: "MULSSloadidx1",
7360 auxType: auxSymOff,
7361 argLen: 4,
7362 resultInArg0: true,
7363 symEffect: SymRead,
7364 asm: x86.AMULSS,
7365 scale: 1,
7366 reg: regInfo{
7367 inputs: []inputInfo{
7368 {0, 2147418112},
7369 {2, 4295016447},
7370 {1, 4295032831},
7371 },
7372 outputs: []outputInfo{
7373 {0, 2147418112},
7374 },
7375 },
7376 },
7377 {
7378 name: "MULSSloadidx4",
7379 auxType: auxSymOff,
7380 argLen: 4,
7381 resultInArg0: true,
7382 symEffect: SymRead,
7383 asm: x86.AMULSS,
7384 scale: 4,
7385 reg: regInfo{
7386 inputs: []inputInfo{
7387 {0, 2147418112},
7388 {2, 4295016447},
7389 {1, 4295032831},
7390 },
7391 outputs: []outputInfo{
7392 {0, 2147418112},
7393 },
7394 },
7395 },
7396 {
7397 name: "MULSDloadidx1",
7398 auxType: auxSymOff,
7399 argLen: 4,
7400 resultInArg0: true,
7401 symEffect: SymRead,
7402 asm: x86.AMULSD,
7403 scale: 1,
7404 reg: regInfo{
7405 inputs: []inputInfo{
7406 {0, 2147418112},
7407 {2, 4295016447},
7408 {1, 4295032831},
7409 },
7410 outputs: []outputInfo{
7411 {0, 2147418112},
7412 },
7413 },
7414 },
7415 {
7416 name: "MULSDloadidx8",
7417 auxType: auxSymOff,
7418 argLen: 4,
7419 resultInArg0: true,
7420 symEffect: SymRead,
7421 asm: x86.AMULSD,
7422 scale: 8,
7423 reg: regInfo{
7424 inputs: []inputInfo{
7425 {0, 2147418112},
7426 {2, 4295016447},
7427 {1, 4295032831},
7428 },
7429 outputs: []outputInfo{
7430 {0, 2147418112},
7431 },
7432 },
7433 },
7434 {
7435 name: "DIVSSloadidx1",
7436 auxType: auxSymOff,
7437 argLen: 4,
7438 resultInArg0: true,
7439 symEffect: SymRead,
7440 asm: x86.ADIVSS,
7441 scale: 1,
7442 reg: regInfo{
7443 inputs: []inputInfo{
7444 {0, 2147418112},
7445 {2, 4295016447},
7446 {1, 4295032831},
7447 },
7448 outputs: []outputInfo{
7449 {0, 2147418112},
7450 },
7451 },
7452 },
7453 {
7454 name: "DIVSSloadidx4",
7455 auxType: auxSymOff,
7456 argLen: 4,
7457 resultInArg0: true,
7458 symEffect: SymRead,
7459 asm: x86.ADIVSS,
7460 scale: 4,
7461 reg: regInfo{
7462 inputs: []inputInfo{
7463 {0, 2147418112},
7464 {2, 4295016447},
7465 {1, 4295032831},
7466 },
7467 outputs: []outputInfo{
7468 {0, 2147418112},
7469 },
7470 },
7471 },
7472 {
7473 name: "DIVSDloadidx1",
7474 auxType: auxSymOff,
7475 argLen: 4,
7476 resultInArg0: true,
7477 symEffect: SymRead,
7478 asm: x86.ADIVSD,
7479 scale: 1,
7480 reg: regInfo{
7481 inputs: []inputInfo{
7482 {0, 2147418112},
7483 {2, 4295016447},
7484 {1, 4295032831},
7485 },
7486 outputs: []outputInfo{
7487 {0, 2147418112},
7488 },
7489 },
7490 },
7491 {
7492 name: "DIVSDloadidx8",
7493 auxType: auxSymOff,
7494 argLen: 4,
7495 resultInArg0: true,
7496 symEffect: SymRead,
7497 asm: x86.ADIVSD,
7498 scale: 8,
7499 reg: regInfo{
7500 inputs: []inputInfo{
7501 {0, 2147418112},
7502 {2, 4295016447},
7503 {1, 4295032831},
7504 },
7505 outputs: []outputInfo{
7506 {0, 2147418112},
7507 },
7508 },
7509 },
7510 {
7511 name: "ADDQ",
7512 argLen: 2,
7513 commutative: true,
7514 clobberFlags: true,
7515 asm: x86.AADDQ,
7516 reg: regInfo{
7517 inputs: []inputInfo{
7518 {1, 49135},
7519 {0, 49151},
7520 },
7521 outputs: []outputInfo{
7522 {0, 49135},
7523 },
7524 },
7525 },
7526 {
7527 name: "ADDL",
7528 argLen: 2,
7529 commutative: true,
7530 clobberFlags: true,
7531 asm: x86.AADDL,
7532 reg: regInfo{
7533 inputs: []inputInfo{
7534 {1, 49135},
7535 {0, 49151},
7536 },
7537 outputs: []outputInfo{
7538 {0, 49135},
7539 },
7540 },
7541 },
7542 {
7543 name: "ADDQconst",
7544 auxType: auxInt32,
7545 argLen: 1,
7546 clobberFlags: true,
7547 asm: x86.AADDQ,
7548 reg: regInfo{
7549 inputs: []inputInfo{
7550 {0, 49151},
7551 },
7552 outputs: []outputInfo{
7553 {0, 49135},
7554 },
7555 },
7556 },
7557 {
7558 name: "ADDLconst",
7559 auxType: auxInt32,
7560 argLen: 1,
7561 clobberFlags: true,
7562 asm: x86.AADDL,
7563 reg: regInfo{
7564 inputs: []inputInfo{
7565 {0, 49151},
7566 },
7567 outputs: []outputInfo{
7568 {0, 49135},
7569 },
7570 },
7571 },
7572 {
7573 name: "ADDQconstmodify",
7574 auxType: auxSymValAndOff,
7575 argLen: 2,
7576 clobberFlags: true,
7577 faultOnNilArg0: true,
7578 symEffect: SymRead | SymWrite,
7579 asm: x86.AADDQ,
7580 reg: regInfo{
7581 inputs: []inputInfo{
7582 {0, 4295032831},
7583 },
7584 },
7585 },
7586 {
7587 name: "ADDLconstmodify",
7588 auxType: auxSymValAndOff,
7589 argLen: 2,
7590 clobberFlags: true,
7591 faultOnNilArg0: true,
7592 symEffect: SymRead | SymWrite,
7593 asm: x86.AADDL,
7594 reg: regInfo{
7595 inputs: []inputInfo{
7596 {0, 4295032831},
7597 },
7598 },
7599 },
7600 {
7601 name: "SUBQ",
7602 argLen: 2,
7603 resultInArg0: true,
7604 clobberFlags: true,
7605 asm: x86.ASUBQ,
7606 reg: regInfo{
7607 inputs: []inputInfo{
7608 {0, 49135},
7609 {1, 49135},
7610 },
7611 outputs: []outputInfo{
7612 {0, 49135},
7613 },
7614 },
7615 },
7616 {
7617 name: "SUBL",
7618 argLen: 2,
7619 resultInArg0: true,
7620 clobberFlags: true,
7621 asm: x86.ASUBL,
7622 reg: regInfo{
7623 inputs: []inputInfo{
7624 {0, 49135},
7625 {1, 49135},
7626 },
7627 outputs: []outputInfo{
7628 {0, 49135},
7629 },
7630 },
7631 },
7632 {
7633 name: "SUBQconst",
7634 auxType: auxInt32,
7635 argLen: 1,
7636 resultInArg0: true,
7637 clobberFlags: true,
7638 asm: x86.ASUBQ,
7639 reg: regInfo{
7640 inputs: []inputInfo{
7641 {0, 49135},
7642 },
7643 outputs: []outputInfo{
7644 {0, 49135},
7645 },
7646 },
7647 },
7648 {
7649 name: "SUBLconst",
7650 auxType: auxInt32,
7651 argLen: 1,
7652 resultInArg0: true,
7653 clobberFlags: true,
7654 asm: x86.ASUBL,
7655 reg: regInfo{
7656 inputs: []inputInfo{
7657 {0, 49135},
7658 },
7659 outputs: []outputInfo{
7660 {0, 49135},
7661 },
7662 },
7663 },
7664 {
7665 name: "MULQ",
7666 argLen: 2,
7667 commutative: true,
7668 resultInArg0: true,
7669 clobberFlags: true,
7670 asm: x86.AIMULQ,
7671 reg: regInfo{
7672 inputs: []inputInfo{
7673 {0, 49135},
7674 {1, 49135},
7675 },
7676 outputs: []outputInfo{
7677 {0, 49135},
7678 },
7679 },
7680 },
7681 {
7682 name: "MULL",
7683 argLen: 2,
7684 commutative: true,
7685 resultInArg0: true,
7686 clobberFlags: true,
7687 asm: x86.AIMULL,
7688 reg: regInfo{
7689 inputs: []inputInfo{
7690 {0, 49135},
7691 {1, 49135},
7692 },
7693 outputs: []outputInfo{
7694 {0, 49135},
7695 },
7696 },
7697 },
7698 {
7699 name: "MULQconst",
7700 auxType: auxInt32,
7701 argLen: 1,
7702 clobberFlags: true,
7703 asm: x86.AIMUL3Q,
7704 reg: regInfo{
7705 inputs: []inputInfo{
7706 {0, 49135},
7707 },
7708 outputs: []outputInfo{
7709 {0, 49135},
7710 },
7711 },
7712 },
7713 {
7714 name: "MULLconst",
7715 auxType: auxInt32,
7716 argLen: 1,
7717 clobberFlags: true,
7718 asm: x86.AIMUL3L,
7719 reg: regInfo{
7720 inputs: []inputInfo{
7721 {0, 49135},
7722 },
7723 outputs: []outputInfo{
7724 {0, 49135},
7725 },
7726 },
7727 },
7728 {
7729 name: "MULLU",
7730 argLen: 2,
7731 commutative: true,
7732 clobberFlags: true,
7733 asm: x86.AMULL,
7734 reg: regInfo{
7735 inputs: []inputInfo{
7736 {0, 1},
7737 {1, 49151},
7738 },
7739 clobbers: 4,
7740 outputs: []outputInfo{
7741 {1, 0},
7742 {0, 1},
7743 },
7744 },
7745 },
7746 {
7747 name: "MULQU",
7748 argLen: 2,
7749 commutative: true,
7750 clobberFlags: true,
7751 asm: x86.AMULQ,
7752 reg: regInfo{
7753 inputs: []inputInfo{
7754 {0, 1},
7755 {1, 49151},
7756 },
7757 clobbers: 4,
7758 outputs: []outputInfo{
7759 {1, 0},
7760 {0, 1},
7761 },
7762 },
7763 },
7764 {
7765 name: "HMULQ",
7766 argLen: 2,
7767 clobberFlags: true,
7768 asm: x86.AIMULQ,
7769 reg: regInfo{
7770 inputs: []inputInfo{
7771 {0, 1},
7772 {1, 49151},
7773 },
7774 clobbers: 1,
7775 outputs: []outputInfo{
7776 {0, 4},
7777 },
7778 },
7779 },
7780 {
7781 name: "HMULL",
7782 argLen: 2,
7783 clobberFlags: true,
7784 asm: x86.AIMULL,
7785 reg: regInfo{
7786 inputs: []inputInfo{
7787 {0, 1},
7788 {1, 49151},
7789 },
7790 clobbers: 1,
7791 outputs: []outputInfo{
7792 {0, 4},
7793 },
7794 },
7795 },
7796 {
7797 name: "HMULQU",
7798 argLen: 2,
7799 clobberFlags: true,
7800 asm: x86.AMULQ,
7801 reg: regInfo{
7802 inputs: []inputInfo{
7803 {0, 1},
7804 {1, 49151},
7805 },
7806 clobbers: 1,
7807 outputs: []outputInfo{
7808 {0, 4},
7809 },
7810 },
7811 },
7812 {
7813 name: "HMULLU",
7814 argLen: 2,
7815 clobberFlags: true,
7816 asm: x86.AMULL,
7817 reg: regInfo{
7818 inputs: []inputInfo{
7819 {0, 1},
7820 {1, 49151},
7821 },
7822 clobbers: 1,
7823 outputs: []outputInfo{
7824 {0, 4},
7825 },
7826 },
7827 },
7828 {
7829 name: "AVGQU",
7830 argLen: 2,
7831 commutative: true,
7832 resultInArg0: true,
7833 clobberFlags: true,
7834 reg: regInfo{
7835 inputs: []inputInfo{
7836 {0, 49135},
7837 {1, 49135},
7838 },
7839 outputs: []outputInfo{
7840 {0, 49135},
7841 },
7842 },
7843 },
7844 {
7845 name: "DIVQ",
7846 auxType: auxBool,
7847 argLen: 2,
7848 clobberFlags: true,
7849 asm: x86.AIDIVQ,
7850 reg: regInfo{
7851 inputs: []inputInfo{
7852 {0, 1},
7853 {1, 49147},
7854 },
7855 outputs: []outputInfo{
7856 {0, 1},
7857 {1, 4},
7858 },
7859 },
7860 },
7861 {
7862 name: "DIVL",
7863 auxType: auxBool,
7864 argLen: 2,
7865 clobberFlags: true,
7866 asm: x86.AIDIVL,
7867 reg: regInfo{
7868 inputs: []inputInfo{
7869 {0, 1},
7870 {1, 49147},
7871 },
7872 outputs: []outputInfo{
7873 {0, 1},
7874 {1, 4},
7875 },
7876 },
7877 },
7878 {
7879 name: "DIVW",
7880 auxType: auxBool,
7881 argLen: 2,
7882 clobberFlags: true,
7883 asm: x86.AIDIVW,
7884 reg: regInfo{
7885 inputs: []inputInfo{
7886 {0, 1},
7887 {1, 49147},
7888 },
7889 outputs: []outputInfo{
7890 {0, 1},
7891 {1, 4},
7892 },
7893 },
7894 },
7895 {
7896 name: "DIVQU",
7897 argLen: 2,
7898 clobberFlags: true,
7899 asm: x86.ADIVQ,
7900 reg: regInfo{
7901 inputs: []inputInfo{
7902 {0, 1},
7903 {1, 49147},
7904 },
7905 outputs: []outputInfo{
7906 {0, 1},
7907 {1, 4},
7908 },
7909 },
7910 },
7911 {
7912 name: "DIVLU",
7913 argLen: 2,
7914 clobberFlags: true,
7915 asm: x86.ADIVL,
7916 reg: regInfo{
7917 inputs: []inputInfo{
7918 {0, 1},
7919 {1, 49147},
7920 },
7921 outputs: []outputInfo{
7922 {0, 1},
7923 {1, 4},
7924 },
7925 },
7926 },
7927 {
7928 name: "DIVWU",
7929 argLen: 2,
7930 clobberFlags: true,
7931 asm: x86.ADIVW,
7932 reg: regInfo{
7933 inputs: []inputInfo{
7934 {0, 1},
7935 {1, 49147},
7936 },
7937 outputs: []outputInfo{
7938 {0, 1},
7939 {1, 4},
7940 },
7941 },
7942 },
7943 {
7944 name: "NEGLflags",
7945 argLen: 1,
7946 resultInArg0: true,
7947 asm: x86.ANEGL,
7948 reg: regInfo{
7949 inputs: []inputInfo{
7950 {0, 49135},
7951 },
7952 outputs: []outputInfo{
7953 {1, 0},
7954 {0, 49135},
7955 },
7956 },
7957 },
7958 {
7959 name: "ADDQconstflags",
7960 auxType: auxInt32,
7961 argLen: 1,
7962 resultInArg0: true,
7963 asm: x86.AADDQ,
7964 reg: regInfo{
7965 inputs: []inputInfo{
7966 {0, 49135},
7967 },
7968 outputs: []outputInfo{
7969 {1, 0},
7970 {0, 49135},
7971 },
7972 },
7973 },
7974 {
7975 name: "ADDLconstflags",
7976 auxType: auxInt32,
7977 argLen: 1,
7978 resultInArg0: true,
7979 asm: x86.AADDL,
7980 reg: regInfo{
7981 inputs: []inputInfo{
7982 {0, 49135},
7983 },
7984 outputs: []outputInfo{
7985 {1, 0},
7986 {0, 49135},
7987 },
7988 },
7989 },
7990 {
7991 name: "ADDQcarry",
7992 argLen: 2,
7993 commutative: true,
7994 resultInArg0: true,
7995 asm: x86.AADDQ,
7996 reg: regInfo{
7997 inputs: []inputInfo{
7998 {0, 49135},
7999 {1, 49135},
8000 },
8001 outputs: []outputInfo{
8002 {1, 0},
8003 {0, 49135},
8004 },
8005 },
8006 },
8007 {
8008 name: "ADCQ",
8009 argLen: 3,
8010 commutative: true,
8011 resultInArg0: true,
8012 asm: x86.AADCQ,
8013 reg: regInfo{
8014 inputs: []inputInfo{
8015 {0, 49135},
8016 {1, 49135},
8017 },
8018 outputs: []outputInfo{
8019 {1, 0},
8020 {0, 49135},
8021 },
8022 },
8023 },
8024 {
8025 name: "ADDQconstcarry",
8026 auxType: auxInt32,
8027 argLen: 1,
8028 resultInArg0: true,
8029 asm: x86.AADDQ,
8030 reg: regInfo{
8031 inputs: []inputInfo{
8032 {0, 49135},
8033 },
8034 outputs: []outputInfo{
8035 {1, 0},
8036 {0, 49135},
8037 },
8038 },
8039 },
8040 {
8041 name: "ADCQconst",
8042 auxType: auxInt32,
8043 argLen: 2,
8044 resultInArg0: true,
8045 asm: x86.AADCQ,
8046 reg: regInfo{
8047 inputs: []inputInfo{
8048 {0, 49135},
8049 },
8050 outputs: []outputInfo{
8051 {1, 0},
8052 {0, 49135},
8053 },
8054 },
8055 },
8056 {
8057 name: "SUBQborrow",
8058 argLen: 2,
8059 resultInArg0: true,
8060 asm: x86.ASUBQ,
8061 reg: regInfo{
8062 inputs: []inputInfo{
8063 {0, 49135},
8064 {1, 49135},
8065 },
8066 outputs: []outputInfo{
8067 {1, 0},
8068 {0, 49135},
8069 },
8070 },
8071 },
8072 {
8073 name: "SBBQ",
8074 argLen: 3,
8075 resultInArg0: true,
8076 asm: x86.ASBBQ,
8077 reg: regInfo{
8078 inputs: []inputInfo{
8079 {0, 49135},
8080 {1, 49135},
8081 },
8082 outputs: []outputInfo{
8083 {1, 0},
8084 {0, 49135},
8085 },
8086 },
8087 },
8088 {
8089 name: "SUBQconstborrow",
8090 auxType: auxInt32,
8091 argLen: 1,
8092 resultInArg0: true,
8093 asm: x86.ASUBQ,
8094 reg: regInfo{
8095 inputs: []inputInfo{
8096 {0, 49135},
8097 },
8098 outputs: []outputInfo{
8099 {1, 0},
8100 {0, 49135},
8101 },
8102 },
8103 },
8104 {
8105 name: "SBBQconst",
8106 auxType: auxInt32,
8107 argLen: 2,
8108 resultInArg0: true,
8109 asm: x86.ASBBQ,
8110 reg: regInfo{
8111 inputs: []inputInfo{
8112 {0, 49135},
8113 },
8114 outputs: []outputInfo{
8115 {1, 0},
8116 {0, 49135},
8117 },
8118 },
8119 },
8120 {
8121 name: "MULQU2",
8122 argLen: 2,
8123 commutative: true,
8124 clobberFlags: true,
8125 asm: x86.AMULQ,
8126 reg: regInfo{
8127 inputs: []inputInfo{
8128 {0, 1},
8129 {1, 49151},
8130 },
8131 outputs: []outputInfo{
8132 {0, 4},
8133 {1, 1},
8134 },
8135 },
8136 },
8137 {
8138 name: "DIVQU2",
8139 argLen: 3,
8140 clobberFlags: true,
8141 asm: x86.ADIVQ,
8142 reg: regInfo{
8143 inputs: []inputInfo{
8144 {0, 4},
8145 {1, 1},
8146 {2, 49151},
8147 },
8148 outputs: []outputInfo{
8149 {0, 1},
8150 {1, 4},
8151 },
8152 },
8153 },
8154 {
8155 name: "ANDQ",
8156 argLen: 2,
8157 commutative: true,
8158 resultInArg0: true,
8159 clobberFlags: true,
8160 asm: x86.AANDQ,
8161 reg: regInfo{
8162 inputs: []inputInfo{
8163 {0, 49135},
8164 {1, 49135},
8165 },
8166 outputs: []outputInfo{
8167 {0, 49135},
8168 },
8169 },
8170 },
8171 {
8172 name: "ANDL",
8173 argLen: 2,
8174 commutative: true,
8175 resultInArg0: true,
8176 clobberFlags: true,
8177 asm: x86.AANDL,
8178 reg: regInfo{
8179 inputs: []inputInfo{
8180 {0, 49135},
8181 {1, 49135},
8182 },
8183 outputs: []outputInfo{
8184 {0, 49135},
8185 },
8186 },
8187 },
8188 {
8189 name: "ANDQconst",
8190 auxType: auxInt32,
8191 argLen: 1,
8192 resultInArg0: true,
8193 clobberFlags: true,
8194 asm: x86.AANDQ,
8195 reg: regInfo{
8196 inputs: []inputInfo{
8197 {0, 49135},
8198 },
8199 outputs: []outputInfo{
8200 {0, 49135},
8201 },
8202 },
8203 },
8204 {
8205 name: "ANDLconst",
8206 auxType: auxInt32,
8207 argLen: 1,
8208 resultInArg0: true,
8209 clobberFlags: true,
8210 asm: x86.AANDL,
8211 reg: regInfo{
8212 inputs: []inputInfo{
8213 {0, 49135},
8214 },
8215 outputs: []outputInfo{
8216 {0, 49135},
8217 },
8218 },
8219 },
8220 {
8221 name: "ANDQconstmodify",
8222 auxType: auxSymValAndOff,
8223 argLen: 2,
8224 clobberFlags: true,
8225 faultOnNilArg0: true,
8226 symEffect: SymRead | SymWrite,
8227 asm: x86.AANDQ,
8228 reg: regInfo{
8229 inputs: []inputInfo{
8230 {0, 4295032831},
8231 },
8232 },
8233 },
8234 {
8235 name: "ANDLconstmodify",
8236 auxType: auxSymValAndOff,
8237 argLen: 2,
8238 clobberFlags: true,
8239 faultOnNilArg0: true,
8240 symEffect: SymRead | SymWrite,
8241 asm: x86.AANDL,
8242 reg: regInfo{
8243 inputs: []inputInfo{
8244 {0, 4295032831},
8245 },
8246 },
8247 },
8248 {
8249 name: "ORQ",
8250 argLen: 2,
8251 commutative: true,
8252 resultInArg0: true,
8253 clobberFlags: true,
8254 asm: x86.AORQ,
8255 reg: regInfo{
8256 inputs: []inputInfo{
8257 {0, 49135},
8258 {1, 49135},
8259 },
8260 outputs: []outputInfo{
8261 {0, 49135},
8262 },
8263 },
8264 },
8265 {
8266 name: "ORL",
8267 argLen: 2,
8268 commutative: true,
8269 resultInArg0: true,
8270 clobberFlags: true,
8271 asm: x86.AORL,
8272 reg: regInfo{
8273 inputs: []inputInfo{
8274 {0, 49135},
8275 {1, 49135},
8276 },
8277 outputs: []outputInfo{
8278 {0, 49135},
8279 },
8280 },
8281 },
8282 {
8283 name: "ORQconst",
8284 auxType: auxInt32,
8285 argLen: 1,
8286 resultInArg0: true,
8287 clobberFlags: true,
8288 asm: x86.AORQ,
8289 reg: regInfo{
8290 inputs: []inputInfo{
8291 {0, 49135},
8292 },
8293 outputs: []outputInfo{
8294 {0, 49135},
8295 },
8296 },
8297 },
8298 {
8299 name: "ORLconst",
8300 auxType: auxInt32,
8301 argLen: 1,
8302 resultInArg0: true,
8303 clobberFlags: true,
8304 asm: x86.AORL,
8305 reg: regInfo{
8306 inputs: []inputInfo{
8307 {0, 49135},
8308 },
8309 outputs: []outputInfo{
8310 {0, 49135},
8311 },
8312 },
8313 },
8314 {
8315 name: "ORQconstmodify",
8316 auxType: auxSymValAndOff,
8317 argLen: 2,
8318 clobberFlags: true,
8319 faultOnNilArg0: true,
8320 symEffect: SymRead | SymWrite,
8321 asm: x86.AORQ,
8322 reg: regInfo{
8323 inputs: []inputInfo{
8324 {0, 4295032831},
8325 },
8326 },
8327 },
8328 {
8329 name: "ORLconstmodify",
8330 auxType: auxSymValAndOff,
8331 argLen: 2,
8332 clobberFlags: true,
8333 faultOnNilArg0: true,
8334 symEffect: SymRead | SymWrite,
8335 asm: x86.AORL,
8336 reg: regInfo{
8337 inputs: []inputInfo{
8338 {0, 4295032831},
8339 },
8340 },
8341 },
8342 {
8343 name: "XORQ",
8344 argLen: 2,
8345 commutative: true,
8346 resultInArg0: true,
8347 clobberFlags: true,
8348 asm: x86.AXORQ,
8349 reg: regInfo{
8350 inputs: []inputInfo{
8351 {0, 49135},
8352 {1, 49135},
8353 },
8354 outputs: []outputInfo{
8355 {0, 49135},
8356 },
8357 },
8358 },
8359 {
8360 name: "XORL",
8361 argLen: 2,
8362 commutative: true,
8363 resultInArg0: true,
8364 clobberFlags: true,
8365 asm: x86.AXORL,
8366 reg: regInfo{
8367 inputs: []inputInfo{
8368 {0, 49135},
8369 {1, 49135},
8370 },
8371 outputs: []outputInfo{
8372 {0, 49135},
8373 },
8374 },
8375 },
8376 {
8377 name: "XORQconst",
8378 auxType: auxInt32,
8379 argLen: 1,
8380 resultInArg0: true,
8381 clobberFlags: true,
8382 asm: x86.AXORQ,
8383 reg: regInfo{
8384 inputs: []inputInfo{
8385 {0, 49135},
8386 },
8387 outputs: []outputInfo{
8388 {0, 49135},
8389 },
8390 },
8391 },
8392 {
8393 name: "XORLconst",
8394 auxType: auxInt32,
8395 argLen: 1,
8396 resultInArg0: true,
8397 clobberFlags: true,
8398 asm: x86.AXORL,
8399 reg: regInfo{
8400 inputs: []inputInfo{
8401 {0, 49135},
8402 },
8403 outputs: []outputInfo{
8404 {0, 49135},
8405 },
8406 },
8407 },
8408 {
8409 name: "XORQconstmodify",
8410 auxType: auxSymValAndOff,
8411 argLen: 2,
8412 clobberFlags: true,
8413 faultOnNilArg0: true,
8414 symEffect: SymRead | SymWrite,
8415 asm: x86.AXORQ,
8416 reg: regInfo{
8417 inputs: []inputInfo{
8418 {0, 4295032831},
8419 },
8420 },
8421 },
8422 {
8423 name: "XORLconstmodify",
8424 auxType: auxSymValAndOff,
8425 argLen: 2,
8426 clobberFlags: true,
8427 faultOnNilArg0: true,
8428 symEffect: SymRead | SymWrite,
8429 asm: x86.AXORL,
8430 reg: regInfo{
8431 inputs: []inputInfo{
8432 {0, 4295032831},
8433 },
8434 },
8435 },
8436 {
8437 name: "CMPQ",
8438 argLen: 2,
8439 asm: x86.ACMPQ,
8440 reg: regInfo{
8441 inputs: []inputInfo{
8442 {0, 49151},
8443 {1, 49151},
8444 },
8445 },
8446 },
8447 {
8448 name: "CMPL",
8449 argLen: 2,
8450 asm: x86.ACMPL,
8451 reg: regInfo{
8452 inputs: []inputInfo{
8453 {0, 49151},
8454 {1, 49151},
8455 },
8456 },
8457 },
8458 {
8459 name: "CMPW",
8460 argLen: 2,
8461 asm: x86.ACMPW,
8462 reg: regInfo{
8463 inputs: []inputInfo{
8464 {0, 49151},
8465 {1, 49151},
8466 },
8467 },
8468 },
8469 {
8470 name: "CMPB",
8471 argLen: 2,
8472 asm: x86.ACMPB,
8473 reg: regInfo{
8474 inputs: []inputInfo{
8475 {0, 49151},
8476 {1, 49151},
8477 },
8478 },
8479 },
8480 {
8481 name: "CMPQconst",
8482 auxType: auxInt32,
8483 argLen: 1,
8484 asm: x86.ACMPQ,
8485 reg: regInfo{
8486 inputs: []inputInfo{
8487 {0, 49151},
8488 },
8489 },
8490 },
8491 {
8492 name: "CMPLconst",
8493 auxType: auxInt32,
8494 argLen: 1,
8495 asm: x86.ACMPL,
8496 reg: regInfo{
8497 inputs: []inputInfo{
8498 {0, 49151},
8499 },
8500 },
8501 },
8502 {
8503 name: "CMPWconst",
8504 auxType: auxInt16,
8505 argLen: 1,
8506 asm: x86.ACMPW,
8507 reg: regInfo{
8508 inputs: []inputInfo{
8509 {0, 49151},
8510 },
8511 },
8512 },
8513 {
8514 name: "CMPBconst",
8515 auxType: auxInt8,
8516 argLen: 1,
8517 asm: x86.ACMPB,
8518 reg: regInfo{
8519 inputs: []inputInfo{
8520 {0, 49151},
8521 },
8522 },
8523 },
8524 {
8525 name: "CMPQload",
8526 auxType: auxSymOff,
8527 argLen: 3,
8528 faultOnNilArg0: true,
8529 symEffect: SymRead,
8530 asm: x86.ACMPQ,
8531 reg: regInfo{
8532 inputs: []inputInfo{
8533 {1, 49151},
8534 {0, 4295032831},
8535 },
8536 },
8537 },
8538 {
8539 name: "CMPLload",
8540 auxType: auxSymOff,
8541 argLen: 3,
8542 faultOnNilArg0: true,
8543 symEffect: SymRead,
8544 asm: x86.ACMPL,
8545 reg: regInfo{
8546 inputs: []inputInfo{
8547 {1, 49151},
8548 {0, 4295032831},
8549 },
8550 },
8551 },
8552 {
8553 name: "CMPWload",
8554 auxType: auxSymOff,
8555 argLen: 3,
8556 faultOnNilArg0: true,
8557 symEffect: SymRead,
8558 asm: x86.ACMPW,
8559 reg: regInfo{
8560 inputs: []inputInfo{
8561 {1, 49151},
8562 {0, 4295032831},
8563 },
8564 },
8565 },
8566 {
8567 name: "CMPBload",
8568 auxType: auxSymOff,
8569 argLen: 3,
8570 faultOnNilArg0: true,
8571 symEffect: SymRead,
8572 asm: x86.ACMPB,
8573 reg: regInfo{
8574 inputs: []inputInfo{
8575 {1, 49151},
8576 {0, 4295032831},
8577 },
8578 },
8579 },
8580 {
8581 name: "CMPQconstload",
8582 auxType: auxSymValAndOff,
8583 argLen: 2,
8584 faultOnNilArg0: true,
8585 symEffect: SymRead,
8586 asm: x86.ACMPQ,
8587 reg: regInfo{
8588 inputs: []inputInfo{
8589 {0, 4295032831},
8590 },
8591 },
8592 },
8593 {
8594 name: "CMPLconstload",
8595 auxType: auxSymValAndOff,
8596 argLen: 2,
8597 faultOnNilArg0: true,
8598 symEffect: SymRead,
8599 asm: x86.ACMPL,
8600 reg: regInfo{
8601 inputs: []inputInfo{
8602 {0, 4295032831},
8603 },
8604 },
8605 },
8606 {
8607 name: "CMPWconstload",
8608 auxType: auxSymValAndOff,
8609 argLen: 2,
8610 faultOnNilArg0: true,
8611 symEffect: SymRead,
8612 asm: x86.ACMPW,
8613 reg: regInfo{
8614 inputs: []inputInfo{
8615 {0, 4295032831},
8616 },
8617 },
8618 },
8619 {
8620 name: "CMPBconstload",
8621 auxType: auxSymValAndOff,
8622 argLen: 2,
8623 faultOnNilArg0: true,
8624 symEffect: SymRead,
8625 asm: x86.ACMPB,
8626 reg: regInfo{
8627 inputs: []inputInfo{
8628 {0, 4295032831},
8629 },
8630 },
8631 },
8632 {
8633 name: "CMPQloadidx8",
8634 auxType: auxSymOff,
8635 argLen: 4,
8636 symEffect: SymRead,
8637 asm: x86.ACMPQ,
8638 scale: 8,
8639 reg: regInfo{
8640 inputs: []inputInfo{
8641 {1, 49151},
8642 {2, 49151},
8643 {0, 4295032831},
8644 },
8645 },
8646 },
8647 {
8648 name: "CMPQloadidx1",
8649 auxType: auxSymOff,
8650 argLen: 4,
8651 commutative: true,
8652 symEffect: SymRead,
8653 asm: x86.ACMPQ,
8654 scale: 1,
8655 reg: regInfo{
8656 inputs: []inputInfo{
8657 {1, 49151},
8658 {2, 49151},
8659 {0, 4295032831},
8660 },
8661 },
8662 },
8663 {
8664 name: "CMPLloadidx4",
8665 auxType: auxSymOff,
8666 argLen: 4,
8667 symEffect: SymRead,
8668 asm: x86.ACMPL,
8669 scale: 4,
8670 reg: regInfo{
8671 inputs: []inputInfo{
8672 {1, 49151},
8673 {2, 49151},
8674 {0, 4295032831},
8675 },
8676 },
8677 },
8678 {
8679 name: "CMPLloadidx1",
8680 auxType: auxSymOff,
8681 argLen: 4,
8682 commutative: true,
8683 symEffect: SymRead,
8684 asm: x86.ACMPL,
8685 scale: 1,
8686 reg: regInfo{
8687 inputs: []inputInfo{
8688 {1, 49151},
8689 {2, 49151},
8690 {0, 4295032831},
8691 },
8692 },
8693 },
8694 {
8695 name: "CMPWloadidx2",
8696 auxType: auxSymOff,
8697 argLen: 4,
8698 symEffect: SymRead,
8699 asm: x86.ACMPW,
8700 scale: 2,
8701 reg: regInfo{
8702 inputs: []inputInfo{
8703 {1, 49151},
8704 {2, 49151},
8705 {0, 4295032831},
8706 },
8707 },
8708 },
8709 {
8710 name: "CMPWloadidx1",
8711 auxType: auxSymOff,
8712 argLen: 4,
8713 commutative: true,
8714 symEffect: SymRead,
8715 asm: x86.ACMPW,
8716 scale: 1,
8717 reg: regInfo{
8718 inputs: []inputInfo{
8719 {1, 49151},
8720 {2, 49151},
8721 {0, 4295032831},
8722 },
8723 },
8724 },
8725 {
8726 name: "CMPBloadidx1",
8727 auxType: auxSymOff,
8728 argLen: 4,
8729 commutative: true,
8730 symEffect: SymRead,
8731 asm: x86.ACMPB,
8732 scale: 1,
8733 reg: regInfo{
8734 inputs: []inputInfo{
8735 {1, 49151},
8736 {2, 49151},
8737 {0, 4295032831},
8738 },
8739 },
8740 },
8741 {
8742 name: "CMPQconstloadidx8",
8743 auxType: auxSymValAndOff,
8744 argLen: 3,
8745 symEffect: SymRead,
8746 asm: x86.ACMPQ,
8747 scale: 8,
8748 reg: regInfo{
8749 inputs: []inputInfo{
8750 {1, 49151},
8751 {0, 4295032831},
8752 },
8753 },
8754 },
8755 {
8756 name: "CMPQconstloadidx1",
8757 auxType: auxSymValAndOff,
8758 argLen: 3,
8759 commutative: true,
8760 symEffect: SymRead,
8761 asm: x86.ACMPQ,
8762 scale: 1,
8763 reg: regInfo{
8764 inputs: []inputInfo{
8765 {1, 49151},
8766 {0, 4295032831},
8767 },
8768 },
8769 },
8770 {
8771 name: "CMPLconstloadidx4",
8772 auxType: auxSymValAndOff,
8773 argLen: 3,
8774 symEffect: SymRead,
8775 asm: x86.ACMPL,
8776 scale: 4,
8777 reg: regInfo{
8778 inputs: []inputInfo{
8779 {1, 49151},
8780 {0, 4295032831},
8781 },
8782 },
8783 },
8784 {
8785 name: "CMPLconstloadidx1",
8786 auxType: auxSymValAndOff,
8787 argLen: 3,
8788 commutative: true,
8789 symEffect: SymRead,
8790 asm: x86.ACMPL,
8791 scale: 1,
8792 reg: regInfo{
8793 inputs: []inputInfo{
8794 {1, 49151},
8795 {0, 4295032831},
8796 },
8797 },
8798 },
8799 {
8800 name: "CMPWconstloadidx2",
8801 auxType: auxSymValAndOff,
8802 argLen: 3,
8803 symEffect: SymRead,
8804 asm: x86.ACMPW,
8805 scale: 2,
8806 reg: regInfo{
8807 inputs: []inputInfo{
8808 {1, 49151},
8809 {0, 4295032831},
8810 },
8811 },
8812 },
8813 {
8814 name: "CMPWconstloadidx1",
8815 auxType: auxSymValAndOff,
8816 argLen: 3,
8817 commutative: true,
8818 symEffect: SymRead,
8819 asm: x86.ACMPW,
8820 scale: 1,
8821 reg: regInfo{
8822 inputs: []inputInfo{
8823 {1, 49151},
8824 {0, 4295032831},
8825 },
8826 },
8827 },
8828 {
8829 name: "CMPBconstloadidx1",
8830 auxType: auxSymValAndOff,
8831 argLen: 3,
8832 commutative: true,
8833 symEffect: SymRead,
8834 asm: x86.ACMPB,
8835 scale: 1,
8836 reg: regInfo{
8837 inputs: []inputInfo{
8838 {1, 49151},
8839 {0, 4295032831},
8840 },
8841 },
8842 },
8843 {
8844 name: "UCOMISS",
8845 argLen: 2,
8846 asm: x86.AUCOMISS,
8847 reg: regInfo{
8848 inputs: []inputInfo{
8849 {0, 2147418112},
8850 {1, 2147418112},
8851 },
8852 },
8853 },
8854 {
8855 name: "UCOMISD",
8856 argLen: 2,
8857 asm: x86.AUCOMISD,
8858 reg: regInfo{
8859 inputs: []inputInfo{
8860 {0, 2147418112},
8861 {1, 2147418112},
8862 },
8863 },
8864 },
8865 {
8866 name: "BTL",
8867 argLen: 2,
8868 asm: x86.ABTL,
8869 reg: regInfo{
8870 inputs: []inputInfo{
8871 {0, 49151},
8872 {1, 49151},
8873 },
8874 },
8875 },
8876 {
8877 name: "BTQ",
8878 argLen: 2,
8879 asm: x86.ABTQ,
8880 reg: regInfo{
8881 inputs: []inputInfo{
8882 {0, 49151},
8883 {1, 49151},
8884 },
8885 },
8886 },
8887 {
8888 name: "BTCL",
8889 argLen: 2,
8890 resultInArg0: true,
8891 clobberFlags: true,
8892 asm: x86.ABTCL,
8893 reg: regInfo{
8894 inputs: []inputInfo{
8895 {0, 49135},
8896 {1, 49135},
8897 },
8898 outputs: []outputInfo{
8899 {0, 49135},
8900 },
8901 },
8902 },
8903 {
8904 name: "BTCQ",
8905 argLen: 2,
8906 resultInArg0: true,
8907 clobberFlags: true,
8908 asm: x86.ABTCQ,
8909 reg: regInfo{
8910 inputs: []inputInfo{
8911 {0, 49135},
8912 {1, 49135},
8913 },
8914 outputs: []outputInfo{
8915 {0, 49135},
8916 },
8917 },
8918 },
8919 {
8920 name: "BTRL",
8921 argLen: 2,
8922 resultInArg0: true,
8923 clobberFlags: true,
8924 asm: x86.ABTRL,
8925 reg: regInfo{
8926 inputs: []inputInfo{
8927 {0, 49135},
8928 {1, 49135},
8929 },
8930 outputs: []outputInfo{
8931 {0, 49135},
8932 },
8933 },
8934 },
8935 {
8936 name: "BTRQ",
8937 argLen: 2,
8938 resultInArg0: true,
8939 clobberFlags: true,
8940 asm: x86.ABTRQ,
8941 reg: regInfo{
8942 inputs: []inputInfo{
8943 {0, 49135},
8944 {1, 49135},
8945 },
8946 outputs: []outputInfo{
8947 {0, 49135},
8948 },
8949 },
8950 },
8951 {
8952 name: "BTSL",
8953 argLen: 2,
8954 resultInArg0: true,
8955 clobberFlags: true,
8956 asm: x86.ABTSL,
8957 reg: regInfo{
8958 inputs: []inputInfo{
8959 {0, 49135},
8960 {1, 49135},
8961 },
8962 outputs: []outputInfo{
8963 {0, 49135},
8964 },
8965 },
8966 },
8967 {
8968 name: "BTSQ",
8969 argLen: 2,
8970 resultInArg0: true,
8971 clobberFlags: true,
8972 asm: x86.ABTSQ,
8973 reg: regInfo{
8974 inputs: []inputInfo{
8975 {0, 49135},
8976 {1, 49135},
8977 },
8978 outputs: []outputInfo{
8979 {0, 49135},
8980 },
8981 },
8982 },
8983 {
8984 name: "BTLconst",
8985 auxType: auxInt8,
8986 argLen: 1,
8987 asm: x86.ABTL,
8988 reg: regInfo{
8989 inputs: []inputInfo{
8990 {0, 49151},
8991 },
8992 },
8993 },
8994 {
8995 name: "BTQconst",
8996 auxType: auxInt8,
8997 argLen: 1,
8998 asm: x86.ABTQ,
8999 reg: regInfo{
9000 inputs: []inputInfo{
9001 {0, 49151},
9002 },
9003 },
9004 },
9005 {
9006 name: "BTCQconst",
9007 auxType: auxInt8,
9008 argLen: 1,
9009 resultInArg0: true,
9010 clobberFlags: true,
9011 asm: x86.ABTCQ,
9012 reg: regInfo{
9013 inputs: []inputInfo{
9014 {0, 49135},
9015 },
9016 outputs: []outputInfo{
9017 {0, 49135},
9018 },
9019 },
9020 },
9021 {
9022 name: "BTRQconst",
9023 auxType: auxInt8,
9024 argLen: 1,
9025 resultInArg0: true,
9026 clobberFlags: true,
9027 asm: x86.ABTRQ,
9028 reg: regInfo{
9029 inputs: []inputInfo{
9030 {0, 49135},
9031 },
9032 outputs: []outputInfo{
9033 {0, 49135},
9034 },
9035 },
9036 },
9037 {
9038 name: "BTSQconst",
9039 auxType: auxInt8,
9040 argLen: 1,
9041 resultInArg0: true,
9042 clobberFlags: true,
9043 asm: x86.ABTSQ,
9044 reg: regInfo{
9045 inputs: []inputInfo{
9046 {0, 49135},
9047 },
9048 outputs: []outputInfo{
9049 {0, 49135},
9050 },
9051 },
9052 },
9053 {
9054 name: "BTSQconstmodify",
9055 auxType: auxSymValAndOff,
9056 argLen: 2,
9057 clobberFlags: true,
9058 faultOnNilArg0: true,
9059 symEffect: SymRead | SymWrite,
9060 asm: x86.ABTSQ,
9061 reg: regInfo{
9062 inputs: []inputInfo{
9063 {0, 4295032831},
9064 },
9065 },
9066 },
9067 {
9068 name: "BTRQconstmodify",
9069 auxType: auxSymValAndOff,
9070 argLen: 2,
9071 clobberFlags: true,
9072 faultOnNilArg0: true,
9073 symEffect: SymRead | SymWrite,
9074 asm: x86.ABTRQ,
9075 reg: regInfo{
9076 inputs: []inputInfo{
9077 {0, 4295032831},
9078 },
9079 },
9080 },
9081 {
9082 name: "BTCQconstmodify",
9083 auxType: auxSymValAndOff,
9084 argLen: 2,
9085 clobberFlags: true,
9086 faultOnNilArg0: true,
9087 symEffect: SymRead | SymWrite,
9088 asm: x86.ABTCQ,
9089 reg: regInfo{
9090 inputs: []inputInfo{
9091 {0, 4295032831},
9092 },
9093 },
9094 },
9095 {
9096 name: "TESTQ",
9097 argLen: 2,
9098 commutative: true,
9099 asm: x86.ATESTQ,
9100 reg: regInfo{
9101 inputs: []inputInfo{
9102 {0, 49151},
9103 {1, 49151},
9104 },
9105 },
9106 },
9107 {
9108 name: "TESTL",
9109 argLen: 2,
9110 commutative: true,
9111 asm: x86.ATESTL,
9112 reg: regInfo{
9113 inputs: []inputInfo{
9114 {0, 49151},
9115 {1, 49151},
9116 },
9117 },
9118 },
9119 {
9120 name: "TESTW",
9121 argLen: 2,
9122 commutative: true,
9123 asm: x86.ATESTW,
9124 reg: regInfo{
9125 inputs: []inputInfo{
9126 {0, 49151},
9127 {1, 49151},
9128 },
9129 },
9130 },
9131 {
9132 name: "TESTB",
9133 argLen: 2,
9134 commutative: true,
9135 asm: x86.ATESTB,
9136 reg: regInfo{
9137 inputs: []inputInfo{
9138 {0, 49151},
9139 {1, 49151},
9140 },
9141 },
9142 },
9143 {
9144 name: "TESTQconst",
9145 auxType: auxInt32,
9146 argLen: 1,
9147 asm: x86.ATESTQ,
9148 reg: regInfo{
9149 inputs: []inputInfo{
9150 {0, 49151},
9151 },
9152 },
9153 },
9154 {
9155 name: "TESTLconst",
9156 auxType: auxInt32,
9157 argLen: 1,
9158 asm: x86.ATESTL,
9159 reg: regInfo{
9160 inputs: []inputInfo{
9161 {0, 49151},
9162 },
9163 },
9164 },
9165 {
9166 name: "TESTWconst",
9167 auxType: auxInt16,
9168 argLen: 1,
9169 asm: x86.ATESTW,
9170 reg: regInfo{
9171 inputs: []inputInfo{
9172 {0, 49151},
9173 },
9174 },
9175 },
9176 {
9177 name: "TESTBconst",
9178 auxType: auxInt8,
9179 argLen: 1,
9180 asm: x86.ATESTB,
9181 reg: regInfo{
9182 inputs: []inputInfo{
9183 {0, 49151},
9184 },
9185 },
9186 },
9187 {
9188 name: "SHLQ",
9189 argLen: 2,
9190 resultInArg0: true,
9191 clobberFlags: true,
9192 asm: x86.ASHLQ,
9193 reg: regInfo{
9194 inputs: []inputInfo{
9195 {1, 2},
9196 {0, 49135},
9197 },
9198 outputs: []outputInfo{
9199 {0, 49135},
9200 },
9201 },
9202 },
9203 {
9204 name: "SHLL",
9205 argLen: 2,
9206 resultInArg0: true,
9207 clobberFlags: true,
9208 asm: x86.ASHLL,
9209 reg: regInfo{
9210 inputs: []inputInfo{
9211 {1, 2},
9212 {0, 49135},
9213 },
9214 outputs: []outputInfo{
9215 {0, 49135},
9216 },
9217 },
9218 },
9219 {
9220 name: "SHLQconst",
9221 auxType: auxInt8,
9222 argLen: 1,
9223 resultInArg0: true,
9224 clobberFlags: true,
9225 asm: x86.ASHLQ,
9226 reg: regInfo{
9227 inputs: []inputInfo{
9228 {0, 49135},
9229 },
9230 outputs: []outputInfo{
9231 {0, 49135},
9232 },
9233 },
9234 },
9235 {
9236 name: "SHLLconst",
9237 auxType: auxInt8,
9238 argLen: 1,
9239 resultInArg0: true,
9240 clobberFlags: true,
9241 asm: x86.ASHLL,
9242 reg: regInfo{
9243 inputs: []inputInfo{
9244 {0, 49135},
9245 },
9246 outputs: []outputInfo{
9247 {0, 49135},
9248 },
9249 },
9250 },
9251 {
9252 name: "SHRQ",
9253 argLen: 2,
9254 resultInArg0: true,
9255 clobberFlags: true,
9256 asm: x86.ASHRQ,
9257 reg: regInfo{
9258 inputs: []inputInfo{
9259 {1, 2},
9260 {0, 49135},
9261 },
9262 outputs: []outputInfo{
9263 {0, 49135},
9264 },
9265 },
9266 },
9267 {
9268 name: "SHRL",
9269 argLen: 2,
9270 resultInArg0: true,
9271 clobberFlags: true,
9272 asm: x86.ASHRL,
9273 reg: regInfo{
9274 inputs: []inputInfo{
9275 {1, 2},
9276 {0, 49135},
9277 },
9278 outputs: []outputInfo{
9279 {0, 49135},
9280 },
9281 },
9282 },
9283 {
9284 name: "SHRW",
9285 argLen: 2,
9286 resultInArg0: true,
9287 clobberFlags: true,
9288 asm: x86.ASHRW,
9289 reg: regInfo{
9290 inputs: []inputInfo{
9291 {1, 2},
9292 {0, 49135},
9293 },
9294 outputs: []outputInfo{
9295 {0, 49135},
9296 },
9297 },
9298 },
9299 {
9300 name: "SHRB",
9301 argLen: 2,
9302 resultInArg0: true,
9303 clobberFlags: true,
9304 asm: x86.ASHRB,
9305 reg: regInfo{
9306 inputs: []inputInfo{
9307 {1, 2},
9308 {0, 49135},
9309 },
9310 outputs: []outputInfo{
9311 {0, 49135},
9312 },
9313 },
9314 },
9315 {
9316 name: "SHRQconst",
9317 auxType: auxInt8,
9318 argLen: 1,
9319 resultInArg0: true,
9320 clobberFlags: true,
9321 asm: x86.ASHRQ,
9322 reg: regInfo{
9323 inputs: []inputInfo{
9324 {0, 49135},
9325 },
9326 outputs: []outputInfo{
9327 {0, 49135},
9328 },
9329 },
9330 },
9331 {
9332 name: "SHRLconst",
9333 auxType: auxInt8,
9334 argLen: 1,
9335 resultInArg0: true,
9336 clobberFlags: true,
9337 asm: x86.ASHRL,
9338 reg: regInfo{
9339 inputs: []inputInfo{
9340 {0, 49135},
9341 },
9342 outputs: []outputInfo{
9343 {0, 49135},
9344 },
9345 },
9346 },
9347 {
9348 name: "SHRWconst",
9349 auxType: auxInt8,
9350 argLen: 1,
9351 resultInArg0: true,
9352 clobberFlags: true,
9353 asm: x86.ASHRW,
9354 reg: regInfo{
9355 inputs: []inputInfo{
9356 {0, 49135},
9357 },
9358 outputs: []outputInfo{
9359 {0, 49135},
9360 },
9361 },
9362 },
9363 {
9364 name: "SHRBconst",
9365 auxType: auxInt8,
9366 argLen: 1,
9367 resultInArg0: true,
9368 clobberFlags: true,
9369 asm: x86.ASHRB,
9370 reg: regInfo{
9371 inputs: []inputInfo{
9372 {0, 49135},
9373 },
9374 outputs: []outputInfo{
9375 {0, 49135},
9376 },
9377 },
9378 },
9379 {
9380 name: "SARQ",
9381 argLen: 2,
9382 resultInArg0: true,
9383 clobberFlags: true,
9384 asm: x86.ASARQ,
9385 reg: regInfo{
9386 inputs: []inputInfo{
9387 {1, 2},
9388 {0, 49135},
9389 },
9390 outputs: []outputInfo{
9391 {0, 49135},
9392 },
9393 },
9394 },
9395 {
9396 name: "SARL",
9397 argLen: 2,
9398 resultInArg0: true,
9399 clobberFlags: true,
9400 asm: x86.ASARL,
9401 reg: regInfo{
9402 inputs: []inputInfo{
9403 {1, 2},
9404 {0, 49135},
9405 },
9406 outputs: []outputInfo{
9407 {0, 49135},
9408 },
9409 },
9410 },
9411 {
9412 name: "SARW",
9413 argLen: 2,
9414 resultInArg0: true,
9415 clobberFlags: true,
9416 asm: x86.ASARW,
9417 reg: regInfo{
9418 inputs: []inputInfo{
9419 {1, 2},
9420 {0, 49135},
9421 },
9422 outputs: []outputInfo{
9423 {0, 49135},
9424 },
9425 },
9426 },
9427 {
9428 name: "SARB",
9429 argLen: 2,
9430 resultInArg0: true,
9431 clobberFlags: true,
9432 asm: x86.ASARB,
9433 reg: regInfo{
9434 inputs: []inputInfo{
9435 {1, 2},
9436 {0, 49135},
9437 },
9438 outputs: []outputInfo{
9439 {0, 49135},
9440 },
9441 },
9442 },
9443 {
9444 name: "SARQconst",
9445 auxType: auxInt8,
9446 argLen: 1,
9447 resultInArg0: true,
9448 clobberFlags: true,
9449 asm: x86.ASARQ,
9450 reg: regInfo{
9451 inputs: []inputInfo{
9452 {0, 49135},
9453 },
9454 outputs: []outputInfo{
9455 {0, 49135},
9456 },
9457 },
9458 },
9459 {
9460 name: "SARLconst",
9461 auxType: auxInt8,
9462 argLen: 1,
9463 resultInArg0: true,
9464 clobberFlags: true,
9465 asm: x86.ASARL,
9466 reg: regInfo{
9467 inputs: []inputInfo{
9468 {0, 49135},
9469 },
9470 outputs: []outputInfo{
9471 {0, 49135},
9472 },
9473 },
9474 },
9475 {
9476 name: "SARWconst",
9477 auxType: auxInt8,
9478 argLen: 1,
9479 resultInArg0: true,
9480 clobberFlags: true,
9481 asm: x86.ASARW,
9482 reg: regInfo{
9483 inputs: []inputInfo{
9484 {0, 49135},
9485 },
9486 outputs: []outputInfo{
9487 {0, 49135},
9488 },
9489 },
9490 },
9491 {
9492 name: "SARBconst",
9493 auxType: auxInt8,
9494 argLen: 1,
9495 resultInArg0: true,
9496 clobberFlags: true,
9497 asm: x86.ASARB,
9498 reg: regInfo{
9499 inputs: []inputInfo{
9500 {0, 49135},
9501 },
9502 outputs: []outputInfo{
9503 {0, 49135},
9504 },
9505 },
9506 },
9507 {
9508 name: "SHRDQ",
9509 argLen: 3,
9510 resultInArg0: true,
9511 clobberFlags: true,
9512 asm: x86.ASHRQ,
9513 reg: regInfo{
9514 inputs: []inputInfo{
9515 {2, 2},
9516 {0, 49135},
9517 {1, 49135},
9518 },
9519 outputs: []outputInfo{
9520 {0, 49135},
9521 },
9522 },
9523 },
9524 {
9525 name: "SHLDQ",
9526 argLen: 3,
9527 resultInArg0: true,
9528 clobberFlags: true,
9529 asm: x86.ASHLQ,
9530 reg: regInfo{
9531 inputs: []inputInfo{
9532 {2, 2},
9533 {0, 49135},
9534 {1, 49135},
9535 },
9536 outputs: []outputInfo{
9537 {0, 49135},
9538 },
9539 },
9540 },
9541 {
9542 name: "ROLQ",
9543 argLen: 2,
9544 resultInArg0: true,
9545 clobberFlags: true,
9546 asm: x86.AROLQ,
9547 reg: regInfo{
9548 inputs: []inputInfo{
9549 {1, 2},
9550 {0, 49135},
9551 },
9552 outputs: []outputInfo{
9553 {0, 49135},
9554 },
9555 },
9556 },
9557 {
9558 name: "ROLL",
9559 argLen: 2,
9560 resultInArg0: true,
9561 clobberFlags: true,
9562 asm: x86.AROLL,
9563 reg: regInfo{
9564 inputs: []inputInfo{
9565 {1, 2},
9566 {0, 49135},
9567 },
9568 outputs: []outputInfo{
9569 {0, 49135},
9570 },
9571 },
9572 },
9573 {
9574 name: "ROLW",
9575 argLen: 2,
9576 resultInArg0: true,
9577 clobberFlags: true,
9578 asm: x86.AROLW,
9579 reg: regInfo{
9580 inputs: []inputInfo{
9581 {1, 2},
9582 {0, 49135},
9583 },
9584 outputs: []outputInfo{
9585 {0, 49135},
9586 },
9587 },
9588 },
9589 {
9590 name: "ROLB",
9591 argLen: 2,
9592 resultInArg0: true,
9593 clobberFlags: true,
9594 asm: x86.AROLB,
9595 reg: regInfo{
9596 inputs: []inputInfo{
9597 {1, 2},
9598 {0, 49135},
9599 },
9600 outputs: []outputInfo{
9601 {0, 49135},
9602 },
9603 },
9604 },
9605 {
9606 name: "RORQ",
9607 argLen: 2,
9608 resultInArg0: true,
9609 clobberFlags: true,
9610 asm: x86.ARORQ,
9611 reg: regInfo{
9612 inputs: []inputInfo{
9613 {1, 2},
9614 {0, 49135},
9615 },
9616 outputs: []outputInfo{
9617 {0, 49135},
9618 },
9619 },
9620 },
9621 {
9622 name: "RORL",
9623 argLen: 2,
9624 resultInArg0: true,
9625 clobberFlags: true,
9626 asm: x86.ARORL,
9627 reg: regInfo{
9628 inputs: []inputInfo{
9629 {1, 2},
9630 {0, 49135},
9631 },
9632 outputs: []outputInfo{
9633 {0, 49135},
9634 },
9635 },
9636 },
9637 {
9638 name: "RORW",
9639 argLen: 2,
9640 resultInArg0: true,
9641 clobberFlags: true,
9642 asm: x86.ARORW,
9643 reg: regInfo{
9644 inputs: []inputInfo{
9645 {1, 2},
9646 {0, 49135},
9647 },
9648 outputs: []outputInfo{
9649 {0, 49135},
9650 },
9651 },
9652 },
9653 {
9654 name: "RORB",
9655 argLen: 2,
9656 resultInArg0: true,
9657 clobberFlags: true,
9658 asm: x86.ARORB,
9659 reg: regInfo{
9660 inputs: []inputInfo{
9661 {1, 2},
9662 {0, 49135},
9663 },
9664 outputs: []outputInfo{
9665 {0, 49135},
9666 },
9667 },
9668 },
9669 {
9670 name: "ROLQconst",
9671 auxType: auxInt8,
9672 argLen: 1,
9673 resultInArg0: true,
9674 clobberFlags: true,
9675 asm: x86.AROLQ,
9676 reg: regInfo{
9677 inputs: []inputInfo{
9678 {0, 49135},
9679 },
9680 outputs: []outputInfo{
9681 {0, 49135},
9682 },
9683 },
9684 },
9685 {
9686 name: "ROLLconst",
9687 auxType: auxInt8,
9688 argLen: 1,
9689 resultInArg0: true,
9690 clobberFlags: true,
9691 asm: x86.AROLL,
9692 reg: regInfo{
9693 inputs: []inputInfo{
9694 {0, 49135},
9695 },
9696 outputs: []outputInfo{
9697 {0, 49135},
9698 },
9699 },
9700 },
9701 {
9702 name: "ROLWconst",
9703 auxType: auxInt8,
9704 argLen: 1,
9705 resultInArg0: true,
9706 clobberFlags: true,
9707 asm: x86.AROLW,
9708 reg: regInfo{
9709 inputs: []inputInfo{
9710 {0, 49135},
9711 },
9712 outputs: []outputInfo{
9713 {0, 49135},
9714 },
9715 },
9716 },
9717 {
9718 name: "ROLBconst",
9719 auxType: auxInt8,
9720 argLen: 1,
9721 resultInArg0: true,
9722 clobberFlags: true,
9723 asm: x86.AROLB,
9724 reg: regInfo{
9725 inputs: []inputInfo{
9726 {0, 49135},
9727 },
9728 outputs: []outputInfo{
9729 {0, 49135},
9730 },
9731 },
9732 },
9733 {
9734 name: "ADDLload",
9735 auxType: auxSymOff,
9736 argLen: 3,
9737 resultInArg0: true,
9738 clobberFlags: true,
9739 faultOnNilArg1: true,
9740 symEffect: SymRead,
9741 asm: x86.AADDL,
9742 reg: regInfo{
9743 inputs: []inputInfo{
9744 {0, 49135},
9745 {1, 4295032831},
9746 },
9747 outputs: []outputInfo{
9748 {0, 49135},
9749 },
9750 },
9751 },
9752 {
9753 name: "ADDQload",
9754 auxType: auxSymOff,
9755 argLen: 3,
9756 resultInArg0: true,
9757 clobberFlags: true,
9758 faultOnNilArg1: true,
9759 symEffect: SymRead,
9760 asm: x86.AADDQ,
9761 reg: regInfo{
9762 inputs: []inputInfo{
9763 {0, 49135},
9764 {1, 4295032831},
9765 },
9766 outputs: []outputInfo{
9767 {0, 49135},
9768 },
9769 },
9770 },
9771 {
9772 name: "SUBQload",
9773 auxType: auxSymOff,
9774 argLen: 3,
9775 resultInArg0: true,
9776 clobberFlags: true,
9777 faultOnNilArg1: true,
9778 symEffect: SymRead,
9779 asm: x86.ASUBQ,
9780 reg: regInfo{
9781 inputs: []inputInfo{
9782 {0, 49135},
9783 {1, 4295032831},
9784 },
9785 outputs: []outputInfo{
9786 {0, 49135},
9787 },
9788 },
9789 },
9790 {
9791 name: "SUBLload",
9792 auxType: auxSymOff,
9793 argLen: 3,
9794 resultInArg0: true,
9795 clobberFlags: true,
9796 faultOnNilArg1: true,
9797 symEffect: SymRead,
9798 asm: x86.ASUBL,
9799 reg: regInfo{
9800 inputs: []inputInfo{
9801 {0, 49135},
9802 {1, 4295032831},
9803 },
9804 outputs: []outputInfo{
9805 {0, 49135},
9806 },
9807 },
9808 },
9809 {
9810 name: "ANDLload",
9811 auxType: auxSymOff,
9812 argLen: 3,
9813 resultInArg0: true,
9814 clobberFlags: true,
9815 faultOnNilArg1: true,
9816 symEffect: SymRead,
9817 asm: x86.AANDL,
9818 reg: regInfo{
9819 inputs: []inputInfo{
9820 {0, 49135},
9821 {1, 4295032831},
9822 },
9823 outputs: []outputInfo{
9824 {0, 49135},
9825 },
9826 },
9827 },
9828 {
9829 name: "ANDQload",
9830 auxType: auxSymOff,
9831 argLen: 3,
9832 resultInArg0: true,
9833 clobberFlags: true,
9834 faultOnNilArg1: true,
9835 symEffect: SymRead,
9836 asm: x86.AANDQ,
9837 reg: regInfo{
9838 inputs: []inputInfo{
9839 {0, 49135},
9840 {1, 4295032831},
9841 },
9842 outputs: []outputInfo{
9843 {0, 49135},
9844 },
9845 },
9846 },
9847 {
9848 name: "ORQload",
9849 auxType: auxSymOff,
9850 argLen: 3,
9851 resultInArg0: true,
9852 clobberFlags: true,
9853 faultOnNilArg1: true,
9854 symEffect: SymRead,
9855 asm: x86.AORQ,
9856 reg: regInfo{
9857 inputs: []inputInfo{
9858 {0, 49135},
9859 {1, 4295032831},
9860 },
9861 outputs: []outputInfo{
9862 {0, 49135},
9863 },
9864 },
9865 },
9866 {
9867 name: "ORLload",
9868 auxType: auxSymOff,
9869 argLen: 3,
9870 resultInArg0: true,
9871 clobberFlags: true,
9872 faultOnNilArg1: true,
9873 symEffect: SymRead,
9874 asm: x86.AORL,
9875 reg: regInfo{
9876 inputs: []inputInfo{
9877 {0, 49135},
9878 {1, 4295032831},
9879 },
9880 outputs: []outputInfo{
9881 {0, 49135},
9882 },
9883 },
9884 },
9885 {
9886 name: "XORQload",
9887 auxType: auxSymOff,
9888 argLen: 3,
9889 resultInArg0: true,
9890 clobberFlags: true,
9891 faultOnNilArg1: true,
9892 symEffect: SymRead,
9893 asm: x86.AXORQ,
9894 reg: regInfo{
9895 inputs: []inputInfo{
9896 {0, 49135},
9897 {1, 4295032831},
9898 },
9899 outputs: []outputInfo{
9900 {0, 49135},
9901 },
9902 },
9903 },
9904 {
9905 name: "XORLload",
9906 auxType: auxSymOff,
9907 argLen: 3,
9908 resultInArg0: true,
9909 clobberFlags: true,
9910 faultOnNilArg1: true,
9911 symEffect: SymRead,
9912 asm: x86.AXORL,
9913 reg: regInfo{
9914 inputs: []inputInfo{
9915 {0, 49135},
9916 {1, 4295032831},
9917 },
9918 outputs: []outputInfo{
9919 {0, 49135},
9920 },
9921 },
9922 },
9923 {
9924 name: "ADDLloadidx1",
9925 auxType: auxSymOff,
9926 argLen: 4,
9927 resultInArg0: true,
9928 clobberFlags: true,
9929 symEffect: SymRead,
9930 asm: x86.AADDL,
9931 scale: 1,
9932 reg: regInfo{
9933 inputs: []inputInfo{
9934 {0, 49135},
9935 {2, 49151},
9936 {1, 4295032831},
9937 },
9938 outputs: []outputInfo{
9939 {0, 49135},
9940 },
9941 },
9942 },
9943 {
9944 name: "ADDLloadidx4",
9945 auxType: auxSymOff,
9946 argLen: 4,
9947 resultInArg0: true,
9948 clobberFlags: true,
9949 symEffect: SymRead,
9950 asm: x86.AADDL,
9951 scale: 4,
9952 reg: regInfo{
9953 inputs: []inputInfo{
9954 {0, 49135},
9955 {2, 49151},
9956 {1, 4295032831},
9957 },
9958 outputs: []outputInfo{
9959 {0, 49135},
9960 },
9961 },
9962 },
9963 {
9964 name: "ADDLloadidx8",
9965 auxType: auxSymOff,
9966 argLen: 4,
9967 resultInArg0: true,
9968 clobberFlags: true,
9969 symEffect: SymRead,
9970 asm: x86.AADDL,
9971 scale: 8,
9972 reg: regInfo{
9973 inputs: []inputInfo{
9974 {0, 49135},
9975 {2, 49151},
9976 {1, 4295032831},
9977 },
9978 outputs: []outputInfo{
9979 {0, 49135},
9980 },
9981 },
9982 },
9983 {
9984 name: "ADDQloadidx1",
9985 auxType: auxSymOff,
9986 argLen: 4,
9987 resultInArg0: true,
9988 clobberFlags: true,
9989 symEffect: SymRead,
9990 asm: x86.AADDQ,
9991 scale: 1,
9992 reg: regInfo{
9993 inputs: []inputInfo{
9994 {0, 49135},
9995 {2, 49151},
9996 {1, 4295032831},
9997 },
9998 outputs: []outputInfo{
9999 {0, 49135},
10000 },
10001 },
10002 },
10003 {
10004 name: "ADDQloadidx8",
10005 auxType: auxSymOff,
10006 argLen: 4,
10007 resultInArg0: true,
10008 clobberFlags: true,
10009 symEffect: SymRead,
10010 asm: x86.AADDQ,
10011 scale: 8,
10012 reg: regInfo{
10013 inputs: []inputInfo{
10014 {0, 49135},
10015 {2, 49151},
10016 {1, 4295032831},
10017 },
10018 outputs: []outputInfo{
10019 {0, 49135},
10020 },
10021 },
10022 },
10023 {
10024 name: "SUBLloadidx1",
10025 auxType: auxSymOff,
10026 argLen: 4,
10027 resultInArg0: true,
10028 clobberFlags: true,
10029 symEffect: SymRead,
10030 asm: x86.ASUBL,
10031 scale: 1,
10032 reg: regInfo{
10033 inputs: []inputInfo{
10034 {0, 49135},
10035 {2, 49151},
10036 {1, 4295032831},
10037 },
10038 outputs: []outputInfo{
10039 {0, 49135},
10040 },
10041 },
10042 },
10043 {
10044 name: "SUBLloadidx4",
10045 auxType: auxSymOff,
10046 argLen: 4,
10047 resultInArg0: true,
10048 clobberFlags: true,
10049 symEffect: SymRead,
10050 asm: x86.ASUBL,
10051 scale: 4,
10052 reg: regInfo{
10053 inputs: []inputInfo{
10054 {0, 49135},
10055 {2, 49151},
10056 {1, 4295032831},
10057 },
10058 outputs: []outputInfo{
10059 {0, 49135},
10060 },
10061 },
10062 },
10063 {
10064 name: "SUBLloadidx8",
10065 auxType: auxSymOff,
10066 argLen: 4,
10067 resultInArg0: true,
10068 clobberFlags: true,
10069 symEffect: SymRead,
10070 asm: x86.ASUBL,
10071 scale: 8,
10072 reg: regInfo{
10073 inputs: []inputInfo{
10074 {0, 49135},
10075 {2, 49151},
10076 {1, 4295032831},
10077 },
10078 outputs: []outputInfo{
10079 {0, 49135},
10080 },
10081 },
10082 },
10083 {
10084 name: "SUBQloadidx1",
10085 auxType: auxSymOff,
10086 argLen: 4,
10087 resultInArg0: true,
10088 clobberFlags: true,
10089 symEffect: SymRead,
10090 asm: x86.ASUBQ,
10091 scale: 1,
10092 reg: regInfo{
10093 inputs: []inputInfo{
10094 {0, 49135},
10095 {2, 49151},
10096 {1, 4295032831},
10097 },
10098 outputs: []outputInfo{
10099 {0, 49135},
10100 },
10101 },
10102 },
10103 {
10104 name: "SUBQloadidx8",
10105 auxType: auxSymOff,
10106 argLen: 4,
10107 resultInArg0: true,
10108 clobberFlags: true,
10109 symEffect: SymRead,
10110 asm: x86.ASUBQ,
10111 scale: 8,
10112 reg: regInfo{
10113 inputs: []inputInfo{
10114 {0, 49135},
10115 {2, 49151},
10116 {1, 4295032831},
10117 },
10118 outputs: []outputInfo{
10119 {0, 49135},
10120 },
10121 },
10122 },
10123 {
10124 name: "ANDLloadidx1",
10125 auxType: auxSymOff,
10126 argLen: 4,
10127 resultInArg0: true,
10128 clobberFlags: true,
10129 symEffect: SymRead,
10130 asm: x86.AANDL,
10131 scale: 1,
10132 reg: regInfo{
10133 inputs: []inputInfo{
10134 {0, 49135},
10135 {2, 49151},
10136 {1, 4295032831},
10137 },
10138 outputs: []outputInfo{
10139 {0, 49135},
10140 },
10141 },
10142 },
10143 {
10144 name: "ANDLloadidx4",
10145 auxType: auxSymOff,
10146 argLen: 4,
10147 resultInArg0: true,
10148 clobberFlags: true,
10149 symEffect: SymRead,
10150 asm: x86.AANDL,
10151 scale: 4,
10152 reg: regInfo{
10153 inputs: []inputInfo{
10154 {0, 49135},
10155 {2, 49151},
10156 {1, 4295032831},
10157 },
10158 outputs: []outputInfo{
10159 {0, 49135},
10160 },
10161 },
10162 },
10163 {
10164 name: "ANDLloadidx8",
10165 auxType: auxSymOff,
10166 argLen: 4,
10167 resultInArg0: true,
10168 clobberFlags: true,
10169 symEffect: SymRead,
10170 asm: x86.AANDL,
10171 scale: 8,
10172 reg: regInfo{
10173 inputs: []inputInfo{
10174 {0, 49135},
10175 {2, 49151},
10176 {1, 4295032831},
10177 },
10178 outputs: []outputInfo{
10179 {0, 49135},
10180 },
10181 },
10182 },
10183 {
10184 name: "ANDQloadidx1",
10185 auxType: auxSymOff,
10186 argLen: 4,
10187 resultInArg0: true,
10188 clobberFlags: true,
10189 symEffect: SymRead,
10190 asm: x86.AANDQ,
10191 scale: 1,
10192 reg: regInfo{
10193 inputs: []inputInfo{
10194 {0, 49135},
10195 {2, 49151},
10196 {1, 4295032831},
10197 },
10198 outputs: []outputInfo{
10199 {0, 49135},
10200 },
10201 },
10202 },
10203 {
10204 name: "ANDQloadidx8",
10205 auxType: auxSymOff,
10206 argLen: 4,
10207 resultInArg0: true,
10208 clobberFlags: true,
10209 symEffect: SymRead,
10210 asm: x86.AANDQ,
10211 scale: 8,
10212 reg: regInfo{
10213 inputs: []inputInfo{
10214 {0, 49135},
10215 {2, 49151},
10216 {1, 4295032831},
10217 },
10218 outputs: []outputInfo{
10219 {0, 49135},
10220 },
10221 },
10222 },
10223 {
10224 name: "ORLloadidx1",
10225 auxType: auxSymOff,
10226 argLen: 4,
10227 resultInArg0: true,
10228 clobberFlags: true,
10229 symEffect: SymRead,
10230 asm: x86.AORL,
10231 scale: 1,
10232 reg: regInfo{
10233 inputs: []inputInfo{
10234 {0, 49135},
10235 {2, 49151},
10236 {1, 4295032831},
10237 },
10238 outputs: []outputInfo{
10239 {0, 49135},
10240 },
10241 },
10242 },
10243 {
10244 name: "ORLloadidx4",
10245 auxType: auxSymOff,
10246 argLen: 4,
10247 resultInArg0: true,
10248 clobberFlags: true,
10249 symEffect: SymRead,
10250 asm: x86.AORL,
10251 scale: 4,
10252 reg: regInfo{
10253 inputs: []inputInfo{
10254 {0, 49135},
10255 {2, 49151},
10256 {1, 4295032831},
10257 },
10258 outputs: []outputInfo{
10259 {0, 49135},
10260 },
10261 },
10262 },
10263 {
10264 name: "ORLloadidx8",
10265 auxType: auxSymOff,
10266 argLen: 4,
10267 resultInArg0: true,
10268 clobberFlags: true,
10269 symEffect: SymRead,
10270 asm: x86.AORL,
10271 scale: 8,
10272 reg: regInfo{
10273 inputs: []inputInfo{
10274 {0, 49135},
10275 {2, 49151},
10276 {1, 4295032831},
10277 },
10278 outputs: []outputInfo{
10279 {0, 49135},
10280 },
10281 },
10282 },
10283 {
10284 name: "ORQloadidx1",
10285 auxType: auxSymOff,
10286 argLen: 4,
10287 resultInArg0: true,
10288 clobberFlags: true,
10289 symEffect: SymRead,
10290 asm: x86.AORQ,
10291 scale: 1,
10292 reg: regInfo{
10293 inputs: []inputInfo{
10294 {0, 49135},
10295 {2, 49151},
10296 {1, 4295032831},
10297 },
10298 outputs: []outputInfo{
10299 {0, 49135},
10300 },
10301 },
10302 },
10303 {
10304 name: "ORQloadidx8",
10305 auxType: auxSymOff,
10306 argLen: 4,
10307 resultInArg0: true,
10308 clobberFlags: true,
10309 symEffect: SymRead,
10310 asm: x86.AORQ,
10311 scale: 8,
10312 reg: regInfo{
10313 inputs: []inputInfo{
10314 {0, 49135},
10315 {2, 49151},
10316 {1, 4295032831},
10317 },
10318 outputs: []outputInfo{
10319 {0, 49135},
10320 },
10321 },
10322 },
10323 {
10324 name: "XORLloadidx1",
10325 auxType: auxSymOff,
10326 argLen: 4,
10327 resultInArg0: true,
10328 clobberFlags: true,
10329 symEffect: SymRead,
10330 asm: x86.AXORL,
10331 scale: 1,
10332 reg: regInfo{
10333 inputs: []inputInfo{
10334 {0, 49135},
10335 {2, 49151},
10336 {1, 4295032831},
10337 },
10338 outputs: []outputInfo{
10339 {0, 49135},
10340 },
10341 },
10342 },
10343 {
10344 name: "XORLloadidx4",
10345 auxType: auxSymOff,
10346 argLen: 4,
10347 resultInArg0: true,
10348 clobberFlags: true,
10349 symEffect: SymRead,
10350 asm: x86.AXORL,
10351 scale: 4,
10352 reg: regInfo{
10353 inputs: []inputInfo{
10354 {0, 49135},
10355 {2, 49151},
10356 {1, 4295032831},
10357 },
10358 outputs: []outputInfo{
10359 {0, 49135},
10360 },
10361 },
10362 },
10363 {
10364 name: "XORLloadidx8",
10365 auxType: auxSymOff,
10366 argLen: 4,
10367 resultInArg0: true,
10368 clobberFlags: true,
10369 symEffect: SymRead,
10370 asm: x86.AXORL,
10371 scale: 8,
10372 reg: regInfo{
10373 inputs: []inputInfo{
10374 {0, 49135},
10375 {2, 49151},
10376 {1, 4295032831},
10377 },
10378 outputs: []outputInfo{
10379 {0, 49135},
10380 },
10381 },
10382 },
10383 {
10384 name: "XORQloadidx1",
10385 auxType: auxSymOff,
10386 argLen: 4,
10387 resultInArg0: true,
10388 clobberFlags: true,
10389 symEffect: SymRead,
10390 asm: x86.AXORQ,
10391 scale: 1,
10392 reg: regInfo{
10393 inputs: []inputInfo{
10394 {0, 49135},
10395 {2, 49151},
10396 {1, 4295032831},
10397 },
10398 outputs: []outputInfo{
10399 {0, 49135},
10400 },
10401 },
10402 },
10403 {
10404 name: "XORQloadidx8",
10405 auxType: auxSymOff,
10406 argLen: 4,
10407 resultInArg0: true,
10408 clobberFlags: true,
10409 symEffect: SymRead,
10410 asm: x86.AXORQ,
10411 scale: 8,
10412 reg: regInfo{
10413 inputs: []inputInfo{
10414 {0, 49135},
10415 {2, 49151},
10416 {1, 4295032831},
10417 },
10418 outputs: []outputInfo{
10419 {0, 49135},
10420 },
10421 },
10422 },
10423 {
10424 name: "ADDQmodify",
10425 auxType: auxSymOff,
10426 argLen: 3,
10427 clobberFlags: true,
10428 faultOnNilArg0: true,
10429 symEffect: SymRead | SymWrite,
10430 asm: x86.AADDQ,
10431 reg: regInfo{
10432 inputs: []inputInfo{
10433 {1, 49151},
10434 {0, 4295032831},
10435 },
10436 },
10437 },
10438 {
10439 name: "SUBQmodify",
10440 auxType: auxSymOff,
10441 argLen: 3,
10442 clobberFlags: true,
10443 faultOnNilArg0: true,
10444 symEffect: SymRead | SymWrite,
10445 asm: x86.ASUBQ,
10446 reg: regInfo{
10447 inputs: []inputInfo{
10448 {1, 49151},
10449 {0, 4295032831},
10450 },
10451 },
10452 },
10453 {
10454 name: "ANDQmodify",
10455 auxType: auxSymOff,
10456 argLen: 3,
10457 clobberFlags: true,
10458 faultOnNilArg0: true,
10459 symEffect: SymRead | SymWrite,
10460 asm: x86.AANDQ,
10461 reg: regInfo{
10462 inputs: []inputInfo{
10463 {1, 49151},
10464 {0, 4295032831},
10465 },
10466 },
10467 },
10468 {
10469 name: "ORQmodify",
10470 auxType: auxSymOff,
10471 argLen: 3,
10472 clobberFlags: true,
10473 faultOnNilArg0: true,
10474 symEffect: SymRead | SymWrite,
10475 asm: x86.AORQ,
10476 reg: regInfo{
10477 inputs: []inputInfo{
10478 {1, 49151},
10479 {0, 4295032831},
10480 },
10481 },
10482 },
10483 {
10484 name: "XORQmodify",
10485 auxType: auxSymOff,
10486 argLen: 3,
10487 clobberFlags: true,
10488 faultOnNilArg0: true,
10489 symEffect: SymRead | SymWrite,
10490 asm: x86.AXORQ,
10491 reg: regInfo{
10492 inputs: []inputInfo{
10493 {1, 49151},
10494 {0, 4295032831},
10495 },
10496 },
10497 },
10498 {
10499 name: "ADDLmodify",
10500 auxType: auxSymOff,
10501 argLen: 3,
10502 clobberFlags: true,
10503 faultOnNilArg0: true,
10504 symEffect: SymRead | SymWrite,
10505 asm: x86.AADDL,
10506 reg: regInfo{
10507 inputs: []inputInfo{
10508 {1, 49151},
10509 {0, 4295032831},
10510 },
10511 },
10512 },
10513 {
10514 name: "SUBLmodify",
10515 auxType: auxSymOff,
10516 argLen: 3,
10517 clobberFlags: true,
10518 faultOnNilArg0: true,
10519 symEffect: SymRead | SymWrite,
10520 asm: x86.ASUBL,
10521 reg: regInfo{
10522 inputs: []inputInfo{
10523 {1, 49151},
10524 {0, 4295032831},
10525 },
10526 },
10527 },
10528 {
10529 name: "ANDLmodify",
10530 auxType: auxSymOff,
10531 argLen: 3,
10532 clobberFlags: true,
10533 faultOnNilArg0: true,
10534 symEffect: SymRead | SymWrite,
10535 asm: x86.AANDL,
10536 reg: regInfo{
10537 inputs: []inputInfo{
10538 {1, 49151},
10539 {0, 4295032831},
10540 },
10541 },
10542 },
10543 {
10544 name: "ORLmodify",
10545 auxType: auxSymOff,
10546 argLen: 3,
10547 clobberFlags: true,
10548 faultOnNilArg0: true,
10549 symEffect: SymRead | SymWrite,
10550 asm: x86.AORL,
10551 reg: regInfo{
10552 inputs: []inputInfo{
10553 {1, 49151},
10554 {0, 4295032831},
10555 },
10556 },
10557 },
10558 {
10559 name: "XORLmodify",
10560 auxType: auxSymOff,
10561 argLen: 3,
10562 clobberFlags: true,
10563 faultOnNilArg0: true,
10564 symEffect: SymRead | SymWrite,
10565 asm: x86.AXORL,
10566 reg: regInfo{
10567 inputs: []inputInfo{
10568 {1, 49151},
10569 {0, 4295032831},
10570 },
10571 },
10572 },
10573 {
10574 name: "ADDQmodifyidx1",
10575 auxType: auxSymOff,
10576 argLen: 4,
10577 clobberFlags: true,
10578 symEffect: SymRead | SymWrite,
10579 asm: x86.AADDQ,
10580 scale: 1,
10581 reg: regInfo{
10582 inputs: []inputInfo{
10583 {1, 49151},
10584 {2, 49151},
10585 {0, 4295032831},
10586 },
10587 },
10588 },
10589 {
10590 name: "ADDQmodifyidx8",
10591 auxType: auxSymOff,
10592 argLen: 4,
10593 clobberFlags: true,
10594 symEffect: SymRead | SymWrite,
10595 asm: x86.AADDQ,
10596 scale: 8,
10597 reg: regInfo{
10598 inputs: []inputInfo{
10599 {1, 49151},
10600 {2, 49151},
10601 {0, 4295032831},
10602 },
10603 },
10604 },
10605 {
10606 name: "SUBQmodifyidx1",
10607 auxType: auxSymOff,
10608 argLen: 4,
10609 clobberFlags: true,
10610 symEffect: SymRead | SymWrite,
10611 asm: x86.ASUBQ,
10612 scale: 1,
10613 reg: regInfo{
10614 inputs: []inputInfo{
10615 {1, 49151},
10616 {2, 49151},
10617 {0, 4295032831},
10618 },
10619 },
10620 },
10621 {
10622 name: "SUBQmodifyidx8",
10623 auxType: auxSymOff,
10624 argLen: 4,
10625 clobberFlags: true,
10626 symEffect: SymRead | SymWrite,
10627 asm: x86.ASUBQ,
10628 scale: 8,
10629 reg: regInfo{
10630 inputs: []inputInfo{
10631 {1, 49151},
10632 {2, 49151},
10633 {0, 4295032831},
10634 },
10635 },
10636 },
10637 {
10638 name: "ANDQmodifyidx1",
10639 auxType: auxSymOff,
10640 argLen: 4,
10641 clobberFlags: true,
10642 symEffect: SymRead | SymWrite,
10643 asm: x86.AANDQ,
10644 scale: 1,
10645 reg: regInfo{
10646 inputs: []inputInfo{
10647 {1, 49151},
10648 {2, 49151},
10649 {0, 4295032831},
10650 },
10651 },
10652 },
10653 {
10654 name: "ANDQmodifyidx8",
10655 auxType: auxSymOff,
10656 argLen: 4,
10657 clobberFlags: true,
10658 symEffect: SymRead | SymWrite,
10659 asm: x86.AANDQ,
10660 scale: 8,
10661 reg: regInfo{
10662 inputs: []inputInfo{
10663 {1, 49151},
10664 {2, 49151},
10665 {0, 4295032831},
10666 },
10667 },
10668 },
10669 {
10670 name: "ORQmodifyidx1",
10671 auxType: auxSymOff,
10672 argLen: 4,
10673 clobberFlags: true,
10674 symEffect: SymRead | SymWrite,
10675 asm: x86.AORQ,
10676 scale: 1,
10677 reg: regInfo{
10678 inputs: []inputInfo{
10679 {1, 49151},
10680 {2, 49151},
10681 {0, 4295032831},
10682 },
10683 },
10684 },
10685 {
10686 name: "ORQmodifyidx8",
10687 auxType: auxSymOff,
10688 argLen: 4,
10689 clobberFlags: true,
10690 symEffect: SymRead | SymWrite,
10691 asm: x86.AORQ,
10692 scale: 8,
10693 reg: regInfo{
10694 inputs: []inputInfo{
10695 {1, 49151},
10696 {2, 49151},
10697 {0, 4295032831},
10698 },
10699 },
10700 },
10701 {
10702 name: "XORQmodifyidx1",
10703 auxType: auxSymOff,
10704 argLen: 4,
10705 clobberFlags: true,
10706 symEffect: SymRead | SymWrite,
10707 asm: x86.AXORQ,
10708 scale: 1,
10709 reg: regInfo{
10710 inputs: []inputInfo{
10711 {1, 49151},
10712 {2, 49151},
10713 {0, 4295032831},
10714 },
10715 },
10716 },
10717 {
10718 name: "XORQmodifyidx8",
10719 auxType: auxSymOff,
10720 argLen: 4,
10721 clobberFlags: true,
10722 symEffect: SymRead | SymWrite,
10723 asm: x86.AXORQ,
10724 scale: 8,
10725 reg: regInfo{
10726 inputs: []inputInfo{
10727 {1, 49151},
10728 {2, 49151},
10729 {0, 4295032831},
10730 },
10731 },
10732 },
10733 {
10734 name: "ADDLmodifyidx1",
10735 auxType: auxSymOff,
10736 argLen: 4,
10737 clobberFlags: true,
10738 symEffect: SymRead | SymWrite,
10739 asm: x86.AADDL,
10740 scale: 1,
10741 reg: regInfo{
10742 inputs: []inputInfo{
10743 {1, 49151},
10744 {2, 49151},
10745 {0, 4295032831},
10746 },
10747 },
10748 },
10749 {
10750 name: "ADDLmodifyidx4",
10751 auxType: auxSymOff,
10752 argLen: 4,
10753 clobberFlags: true,
10754 symEffect: SymRead | SymWrite,
10755 asm: x86.AADDL,
10756 scale: 4,
10757 reg: regInfo{
10758 inputs: []inputInfo{
10759 {1, 49151},
10760 {2, 49151},
10761 {0, 4295032831},
10762 },
10763 },
10764 },
10765 {
10766 name: "ADDLmodifyidx8",
10767 auxType: auxSymOff,
10768 argLen: 4,
10769 clobberFlags: true,
10770 symEffect: SymRead | SymWrite,
10771 asm: x86.AADDL,
10772 scale: 8,
10773 reg: regInfo{
10774 inputs: []inputInfo{
10775 {1, 49151},
10776 {2, 49151},
10777 {0, 4295032831},
10778 },
10779 },
10780 },
10781 {
10782 name: "SUBLmodifyidx1",
10783 auxType: auxSymOff,
10784 argLen: 4,
10785 clobberFlags: true,
10786 symEffect: SymRead | SymWrite,
10787 asm: x86.ASUBL,
10788 scale: 1,
10789 reg: regInfo{
10790 inputs: []inputInfo{
10791 {1, 49151},
10792 {2, 49151},
10793 {0, 4295032831},
10794 },
10795 },
10796 },
10797 {
10798 name: "SUBLmodifyidx4",
10799 auxType: auxSymOff,
10800 argLen: 4,
10801 clobberFlags: true,
10802 symEffect: SymRead | SymWrite,
10803 asm: x86.ASUBL,
10804 scale: 4,
10805 reg: regInfo{
10806 inputs: []inputInfo{
10807 {1, 49151},
10808 {2, 49151},
10809 {0, 4295032831},
10810 },
10811 },
10812 },
10813 {
10814 name: "SUBLmodifyidx8",
10815 auxType: auxSymOff,
10816 argLen: 4,
10817 clobberFlags: true,
10818 symEffect: SymRead | SymWrite,
10819 asm: x86.ASUBL,
10820 scale: 8,
10821 reg: regInfo{
10822 inputs: []inputInfo{
10823 {1, 49151},
10824 {2, 49151},
10825 {0, 4295032831},
10826 },
10827 },
10828 },
10829 {
10830 name: "ANDLmodifyidx1",
10831 auxType: auxSymOff,
10832 argLen: 4,
10833 clobberFlags: true,
10834 symEffect: SymRead | SymWrite,
10835 asm: x86.AANDL,
10836 scale: 1,
10837 reg: regInfo{
10838 inputs: []inputInfo{
10839 {1, 49151},
10840 {2, 49151},
10841 {0, 4295032831},
10842 },
10843 },
10844 },
10845 {
10846 name: "ANDLmodifyidx4",
10847 auxType: auxSymOff,
10848 argLen: 4,
10849 clobberFlags: true,
10850 symEffect: SymRead | SymWrite,
10851 asm: x86.AANDL,
10852 scale: 4,
10853 reg: regInfo{
10854 inputs: []inputInfo{
10855 {1, 49151},
10856 {2, 49151},
10857 {0, 4295032831},
10858 },
10859 },
10860 },
10861 {
10862 name: "ANDLmodifyidx8",
10863 auxType: auxSymOff,
10864 argLen: 4,
10865 clobberFlags: true,
10866 symEffect: SymRead | SymWrite,
10867 asm: x86.AANDL,
10868 scale: 8,
10869 reg: regInfo{
10870 inputs: []inputInfo{
10871 {1, 49151},
10872 {2, 49151},
10873 {0, 4295032831},
10874 },
10875 },
10876 },
10877 {
10878 name: "ORLmodifyidx1",
10879 auxType: auxSymOff,
10880 argLen: 4,
10881 clobberFlags: true,
10882 symEffect: SymRead | SymWrite,
10883 asm: x86.AORL,
10884 scale: 1,
10885 reg: regInfo{
10886 inputs: []inputInfo{
10887 {1, 49151},
10888 {2, 49151},
10889 {0, 4295032831},
10890 },
10891 },
10892 },
10893 {
10894 name: "ORLmodifyidx4",
10895 auxType: auxSymOff,
10896 argLen: 4,
10897 clobberFlags: true,
10898 symEffect: SymRead | SymWrite,
10899 asm: x86.AORL,
10900 scale: 4,
10901 reg: regInfo{
10902 inputs: []inputInfo{
10903 {1, 49151},
10904 {2, 49151},
10905 {0, 4295032831},
10906 },
10907 },
10908 },
10909 {
10910 name: "ORLmodifyidx8",
10911 auxType: auxSymOff,
10912 argLen: 4,
10913 clobberFlags: true,
10914 symEffect: SymRead | SymWrite,
10915 asm: x86.AORL,
10916 scale: 8,
10917 reg: regInfo{
10918 inputs: []inputInfo{
10919 {1, 49151},
10920 {2, 49151},
10921 {0, 4295032831},
10922 },
10923 },
10924 },
10925 {
10926 name: "XORLmodifyidx1",
10927 auxType: auxSymOff,
10928 argLen: 4,
10929 clobberFlags: true,
10930 symEffect: SymRead | SymWrite,
10931 asm: x86.AXORL,
10932 scale: 1,
10933 reg: regInfo{
10934 inputs: []inputInfo{
10935 {1, 49151},
10936 {2, 49151},
10937 {0, 4295032831},
10938 },
10939 },
10940 },
10941 {
10942 name: "XORLmodifyidx4",
10943 auxType: auxSymOff,
10944 argLen: 4,
10945 clobberFlags: true,
10946 symEffect: SymRead | SymWrite,
10947 asm: x86.AXORL,
10948 scale: 4,
10949 reg: regInfo{
10950 inputs: []inputInfo{
10951 {1, 49151},
10952 {2, 49151},
10953 {0, 4295032831},
10954 },
10955 },
10956 },
10957 {
10958 name: "XORLmodifyidx8",
10959 auxType: auxSymOff,
10960 argLen: 4,
10961 clobberFlags: true,
10962 symEffect: SymRead | SymWrite,
10963 asm: x86.AXORL,
10964 scale: 8,
10965 reg: regInfo{
10966 inputs: []inputInfo{
10967 {1, 49151},
10968 {2, 49151},
10969 {0, 4295032831},
10970 },
10971 },
10972 },
10973 {
10974 name: "ADDQconstmodifyidx1",
10975 auxType: auxSymValAndOff,
10976 argLen: 3,
10977 clobberFlags: true,
10978 symEffect: SymRead | SymWrite,
10979 asm: x86.AADDQ,
10980 scale: 1,
10981 reg: regInfo{
10982 inputs: []inputInfo{
10983 {1, 49151},
10984 {0, 4295032831},
10985 },
10986 },
10987 },
10988 {
10989 name: "ADDQconstmodifyidx8",
10990 auxType: auxSymValAndOff,
10991 argLen: 3,
10992 clobberFlags: true,
10993 symEffect: SymRead | SymWrite,
10994 asm: x86.AADDQ,
10995 scale: 8,
10996 reg: regInfo{
10997 inputs: []inputInfo{
10998 {1, 49151},
10999 {0, 4295032831},
11000 },
11001 },
11002 },
11003 {
11004 name: "ANDQconstmodifyidx1",
11005 auxType: auxSymValAndOff,
11006 argLen: 3,
11007 clobberFlags: true,
11008 symEffect: SymRead | SymWrite,
11009 asm: x86.AANDQ,
11010 scale: 1,
11011 reg: regInfo{
11012 inputs: []inputInfo{
11013 {1, 49151},
11014 {0, 4295032831},
11015 },
11016 },
11017 },
11018 {
11019 name: "ANDQconstmodifyidx8",
11020 auxType: auxSymValAndOff,
11021 argLen: 3,
11022 clobberFlags: true,
11023 symEffect: SymRead | SymWrite,
11024 asm: x86.AANDQ,
11025 scale: 8,
11026 reg: regInfo{
11027 inputs: []inputInfo{
11028 {1, 49151},
11029 {0, 4295032831},
11030 },
11031 },
11032 },
11033 {
11034 name: "ORQconstmodifyidx1",
11035 auxType: auxSymValAndOff,
11036 argLen: 3,
11037 clobberFlags: true,
11038 symEffect: SymRead | SymWrite,
11039 asm: x86.AORQ,
11040 scale: 1,
11041 reg: regInfo{
11042 inputs: []inputInfo{
11043 {1, 49151},
11044 {0, 4295032831},
11045 },
11046 },
11047 },
11048 {
11049 name: "ORQconstmodifyidx8",
11050 auxType: auxSymValAndOff,
11051 argLen: 3,
11052 clobberFlags: true,
11053 symEffect: SymRead | SymWrite,
11054 asm: x86.AORQ,
11055 scale: 8,
11056 reg: regInfo{
11057 inputs: []inputInfo{
11058 {1, 49151},
11059 {0, 4295032831},
11060 },
11061 },
11062 },
11063 {
11064 name: "XORQconstmodifyidx1",
11065 auxType: auxSymValAndOff,
11066 argLen: 3,
11067 clobberFlags: true,
11068 symEffect: SymRead | SymWrite,
11069 asm: x86.AXORQ,
11070 scale: 1,
11071 reg: regInfo{
11072 inputs: []inputInfo{
11073 {1, 49151},
11074 {0, 4295032831},
11075 },
11076 },
11077 },
11078 {
11079 name: "XORQconstmodifyidx8",
11080 auxType: auxSymValAndOff,
11081 argLen: 3,
11082 clobberFlags: true,
11083 symEffect: SymRead | SymWrite,
11084 asm: x86.AXORQ,
11085 scale: 8,
11086 reg: regInfo{
11087 inputs: []inputInfo{
11088 {1, 49151},
11089 {0, 4295032831},
11090 },
11091 },
11092 },
11093 {
11094 name: "ADDLconstmodifyidx1",
11095 auxType: auxSymValAndOff,
11096 argLen: 3,
11097 clobberFlags: true,
11098 symEffect: SymRead | SymWrite,
11099 asm: x86.AADDL,
11100 scale: 1,
11101 reg: regInfo{
11102 inputs: []inputInfo{
11103 {1, 49151},
11104 {0, 4295032831},
11105 },
11106 },
11107 },
11108 {
11109 name: "ADDLconstmodifyidx4",
11110 auxType: auxSymValAndOff,
11111 argLen: 3,
11112 clobberFlags: true,
11113 symEffect: SymRead | SymWrite,
11114 asm: x86.AADDL,
11115 scale: 4,
11116 reg: regInfo{
11117 inputs: []inputInfo{
11118 {1, 49151},
11119 {0, 4295032831},
11120 },
11121 },
11122 },
11123 {
11124 name: "ADDLconstmodifyidx8",
11125 auxType: auxSymValAndOff,
11126 argLen: 3,
11127 clobberFlags: true,
11128 symEffect: SymRead | SymWrite,
11129 asm: x86.AADDL,
11130 scale: 8,
11131 reg: regInfo{
11132 inputs: []inputInfo{
11133 {1, 49151},
11134 {0, 4295032831},
11135 },
11136 },
11137 },
11138 {
11139 name: "ANDLconstmodifyidx1",
11140 auxType: auxSymValAndOff,
11141 argLen: 3,
11142 clobberFlags: true,
11143 symEffect: SymRead | SymWrite,
11144 asm: x86.AANDL,
11145 scale: 1,
11146 reg: regInfo{
11147 inputs: []inputInfo{
11148 {1, 49151},
11149 {0, 4295032831},
11150 },
11151 },
11152 },
11153 {
11154 name: "ANDLconstmodifyidx4",
11155 auxType: auxSymValAndOff,
11156 argLen: 3,
11157 clobberFlags: true,
11158 symEffect: SymRead | SymWrite,
11159 asm: x86.AANDL,
11160 scale: 4,
11161 reg: regInfo{
11162 inputs: []inputInfo{
11163 {1, 49151},
11164 {0, 4295032831},
11165 },
11166 },
11167 },
11168 {
11169 name: "ANDLconstmodifyidx8",
11170 auxType: auxSymValAndOff,
11171 argLen: 3,
11172 clobberFlags: true,
11173 symEffect: SymRead | SymWrite,
11174 asm: x86.AANDL,
11175 scale: 8,
11176 reg: regInfo{
11177 inputs: []inputInfo{
11178 {1, 49151},
11179 {0, 4295032831},
11180 },
11181 },
11182 },
11183 {
11184 name: "ORLconstmodifyidx1",
11185 auxType: auxSymValAndOff,
11186 argLen: 3,
11187 clobberFlags: true,
11188 symEffect: SymRead | SymWrite,
11189 asm: x86.AORL,
11190 scale: 1,
11191 reg: regInfo{
11192 inputs: []inputInfo{
11193 {1, 49151},
11194 {0, 4295032831},
11195 },
11196 },
11197 },
11198 {
11199 name: "ORLconstmodifyidx4",
11200 auxType: auxSymValAndOff,
11201 argLen: 3,
11202 clobberFlags: true,
11203 symEffect: SymRead | SymWrite,
11204 asm: x86.AORL,
11205 scale: 4,
11206 reg: regInfo{
11207 inputs: []inputInfo{
11208 {1, 49151},
11209 {0, 4295032831},
11210 },
11211 },
11212 },
11213 {
11214 name: "ORLconstmodifyidx8",
11215 auxType: auxSymValAndOff,
11216 argLen: 3,
11217 clobberFlags: true,
11218 symEffect: SymRead | SymWrite,
11219 asm: x86.AORL,
11220 scale: 8,
11221 reg: regInfo{
11222 inputs: []inputInfo{
11223 {1, 49151},
11224 {0, 4295032831},
11225 },
11226 },
11227 },
11228 {
11229 name: "XORLconstmodifyidx1",
11230 auxType: auxSymValAndOff,
11231 argLen: 3,
11232 clobberFlags: true,
11233 symEffect: SymRead | SymWrite,
11234 asm: x86.AXORL,
11235 scale: 1,
11236 reg: regInfo{
11237 inputs: []inputInfo{
11238 {1, 49151},
11239 {0, 4295032831},
11240 },
11241 },
11242 },
11243 {
11244 name: "XORLconstmodifyidx4",
11245 auxType: auxSymValAndOff,
11246 argLen: 3,
11247 clobberFlags: true,
11248 symEffect: SymRead | SymWrite,
11249 asm: x86.AXORL,
11250 scale: 4,
11251 reg: regInfo{
11252 inputs: []inputInfo{
11253 {1, 49151},
11254 {0, 4295032831},
11255 },
11256 },
11257 },
11258 {
11259 name: "XORLconstmodifyidx8",
11260 auxType: auxSymValAndOff,
11261 argLen: 3,
11262 clobberFlags: true,
11263 symEffect: SymRead | SymWrite,
11264 asm: x86.AXORL,
11265 scale: 8,
11266 reg: regInfo{
11267 inputs: []inputInfo{
11268 {1, 49151},
11269 {0, 4295032831},
11270 },
11271 },
11272 },
11273 {
11274 name: "NEGQ",
11275 argLen: 1,
11276 resultInArg0: true,
11277 clobberFlags: true,
11278 asm: x86.ANEGQ,
11279 reg: regInfo{
11280 inputs: []inputInfo{
11281 {0, 49135},
11282 },
11283 outputs: []outputInfo{
11284 {0, 49135},
11285 },
11286 },
11287 },
11288 {
11289 name: "NEGL",
11290 argLen: 1,
11291 resultInArg0: true,
11292 clobberFlags: true,
11293 asm: x86.ANEGL,
11294 reg: regInfo{
11295 inputs: []inputInfo{
11296 {0, 49135},
11297 },
11298 outputs: []outputInfo{
11299 {0, 49135},
11300 },
11301 },
11302 },
11303 {
11304 name: "NOTQ",
11305 argLen: 1,
11306 resultInArg0: true,
11307 asm: x86.ANOTQ,
11308 reg: regInfo{
11309 inputs: []inputInfo{
11310 {0, 49135},
11311 },
11312 outputs: []outputInfo{
11313 {0, 49135},
11314 },
11315 },
11316 },
11317 {
11318 name: "NOTL",
11319 argLen: 1,
11320 resultInArg0: true,
11321 asm: x86.ANOTL,
11322 reg: regInfo{
11323 inputs: []inputInfo{
11324 {0, 49135},
11325 },
11326 outputs: []outputInfo{
11327 {0, 49135},
11328 },
11329 },
11330 },
11331 {
11332 name: "BSFQ",
11333 argLen: 1,
11334 asm: x86.ABSFQ,
11335 reg: regInfo{
11336 inputs: []inputInfo{
11337 {0, 49135},
11338 },
11339 outputs: []outputInfo{
11340 {1, 0},
11341 {0, 49135},
11342 },
11343 },
11344 },
11345 {
11346 name: "BSFL",
11347 argLen: 1,
11348 clobberFlags: true,
11349 asm: x86.ABSFL,
11350 reg: regInfo{
11351 inputs: []inputInfo{
11352 {0, 49135},
11353 },
11354 outputs: []outputInfo{
11355 {0, 49135},
11356 },
11357 },
11358 },
11359 {
11360 name: "BSRQ",
11361 argLen: 1,
11362 asm: x86.ABSRQ,
11363 reg: regInfo{
11364 inputs: []inputInfo{
11365 {0, 49135},
11366 },
11367 outputs: []outputInfo{
11368 {1, 0},
11369 {0, 49135},
11370 },
11371 },
11372 },
11373 {
11374 name: "BSRL",
11375 argLen: 1,
11376 clobberFlags: true,
11377 asm: x86.ABSRL,
11378 reg: regInfo{
11379 inputs: []inputInfo{
11380 {0, 49135},
11381 },
11382 outputs: []outputInfo{
11383 {0, 49135},
11384 },
11385 },
11386 },
11387 {
11388 name: "CMOVQEQ",
11389 argLen: 3,
11390 resultInArg0: true,
11391 asm: x86.ACMOVQEQ,
11392 reg: regInfo{
11393 inputs: []inputInfo{
11394 {0, 49135},
11395 {1, 49135},
11396 },
11397 outputs: []outputInfo{
11398 {0, 49135},
11399 },
11400 },
11401 },
11402 {
11403 name: "CMOVQNE",
11404 argLen: 3,
11405 resultInArg0: true,
11406 asm: x86.ACMOVQNE,
11407 reg: regInfo{
11408 inputs: []inputInfo{
11409 {0, 49135},
11410 {1, 49135},
11411 },
11412 outputs: []outputInfo{
11413 {0, 49135},
11414 },
11415 },
11416 },
11417 {
11418 name: "CMOVQLT",
11419 argLen: 3,
11420 resultInArg0: true,
11421 asm: x86.ACMOVQLT,
11422 reg: regInfo{
11423 inputs: []inputInfo{
11424 {0, 49135},
11425 {1, 49135},
11426 },
11427 outputs: []outputInfo{
11428 {0, 49135},
11429 },
11430 },
11431 },
11432 {
11433 name: "CMOVQGT",
11434 argLen: 3,
11435 resultInArg0: true,
11436 asm: x86.ACMOVQGT,
11437 reg: regInfo{
11438 inputs: []inputInfo{
11439 {0, 49135},
11440 {1, 49135},
11441 },
11442 outputs: []outputInfo{
11443 {0, 49135},
11444 },
11445 },
11446 },
11447 {
11448 name: "CMOVQLE",
11449 argLen: 3,
11450 resultInArg0: true,
11451 asm: x86.ACMOVQLE,
11452 reg: regInfo{
11453 inputs: []inputInfo{
11454 {0, 49135},
11455 {1, 49135},
11456 },
11457 outputs: []outputInfo{
11458 {0, 49135},
11459 },
11460 },
11461 },
11462 {
11463 name: "CMOVQGE",
11464 argLen: 3,
11465 resultInArg0: true,
11466 asm: x86.ACMOVQGE,
11467 reg: regInfo{
11468 inputs: []inputInfo{
11469 {0, 49135},
11470 {1, 49135},
11471 },
11472 outputs: []outputInfo{
11473 {0, 49135},
11474 },
11475 },
11476 },
11477 {
11478 name: "CMOVQLS",
11479 argLen: 3,
11480 resultInArg0: true,
11481 asm: x86.ACMOVQLS,
11482 reg: regInfo{
11483 inputs: []inputInfo{
11484 {0, 49135},
11485 {1, 49135},
11486 },
11487 outputs: []outputInfo{
11488 {0, 49135},
11489 },
11490 },
11491 },
11492 {
11493 name: "CMOVQHI",
11494 argLen: 3,
11495 resultInArg0: true,
11496 asm: x86.ACMOVQHI,
11497 reg: regInfo{
11498 inputs: []inputInfo{
11499 {0, 49135},
11500 {1, 49135},
11501 },
11502 outputs: []outputInfo{
11503 {0, 49135},
11504 },
11505 },
11506 },
11507 {
11508 name: "CMOVQCC",
11509 argLen: 3,
11510 resultInArg0: true,
11511 asm: x86.ACMOVQCC,
11512 reg: regInfo{
11513 inputs: []inputInfo{
11514 {0, 49135},
11515 {1, 49135},
11516 },
11517 outputs: []outputInfo{
11518 {0, 49135},
11519 },
11520 },
11521 },
11522 {
11523 name: "CMOVQCS",
11524 argLen: 3,
11525 resultInArg0: true,
11526 asm: x86.ACMOVQCS,
11527 reg: regInfo{
11528 inputs: []inputInfo{
11529 {0, 49135},
11530 {1, 49135},
11531 },
11532 outputs: []outputInfo{
11533 {0, 49135},
11534 },
11535 },
11536 },
11537 {
11538 name: "CMOVLEQ",
11539 argLen: 3,
11540 resultInArg0: true,
11541 asm: x86.ACMOVLEQ,
11542 reg: regInfo{
11543 inputs: []inputInfo{
11544 {0, 49135},
11545 {1, 49135},
11546 },
11547 outputs: []outputInfo{
11548 {0, 49135},
11549 },
11550 },
11551 },
11552 {
11553 name: "CMOVLNE",
11554 argLen: 3,
11555 resultInArg0: true,
11556 asm: x86.ACMOVLNE,
11557 reg: regInfo{
11558 inputs: []inputInfo{
11559 {0, 49135},
11560 {1, 49135},
11561 },
11562 outputs: []outputInfo{
11563 {0, 49135},
11564 },
11565 },
11566 },
11567 {
11568 name: "CMOVLLT",
11569 argLen: 3,
11570 resultInArg0: true,
11571 asm: x86.ACMOVLLT,
11572 reg: regInfo{
11573 inputs: []inputInfo{
11574 {0, 49135},
11575 {1, 49135},
11576 },
11577 outputs: []outputInfo{
11578 {0, 49135},
11579 },
11580 },
11581 },
11582 {
11583 name: "CMOVLGT",
11584 argLen: 3,
11585 resultInArg0: true,
11586 asm: x86.ACMOVLGT,
11587 reg: regInfo{
11588 inputs: []inputInfo{
11589 {0, 49135},
11590 {1, 49135},
11591 },
11592 outputs: []outputInfo{
11593 {0, 49135},
11594 },
11595 },
11596 },
11597 {
11598 name: "CMOVLLE",
11599 argLen: 3,
11600 resultInArg0: true,
11601 asm: x86.ACMOVLLE,
11602 reg: regInfo{
11603 inputs: []inputInfo{
11604 {0, 49135},
11605 {1, 49135},
11606 },
11607 outputs: []outputInfo{
11608 {0, 49135},
11609 },
11610 },
11611 },
11612 {
11613 name: "CMOVLGE",
11614 argLen: 3,
11615 resultInArg0: true,
11616 asm: x86.ACMOVLGE,
11617 reg: regInfo{
11618 inputs: []inputInfo{
11619 {0, 49135},
11620 {1, 49135},
11621 },
11622 outputs: []outputInfo{
11623 {0, 49135},
11624 },
11625 },
11626 },
11627 {
11628 name: "CMOVLLS",
11629 argLen: 3,
11630 resultInArg0: true,
11631 asm: x86.ACMOVLLS,
11632 reg: regInfo{
11633 inputs: []inputInfo{
11634 {0, 49135},
11635 {1, 49135},
11636 },
11637 outputs: []outputInfo{
11638 {0, 49135},
11639 },
11640 },
11641 },
11642 {
11643 name: "CMOVLHI",
11644 argLen: 3,
11645 resultInArg0: true,
11646 asm: x86.ACMOVLHI,
11647 reg: regInfo{
11648 inputs: []inputInfo{
11649 {0, 49135},
11650 {1, 49135},
11651 },
11652 outputs: []outputInfo{
11653 {0, 49135},
11654 },
11655 },
11656 },
11657 {
11658 name: "CMOVLCC",
11659 argLen: 3,
11660 resultInArg0: true,
11661 asm: x86.ACMOVLCC,
11662 reg: regInfo{
11663 inputs: []inputInfo{
11664 {0, 49135},
11665 {1, 49135},
11666 },
11667 outputs: []outputInfo{
11668 {0, 49135},
11669 },
11670 },
11671 },
11672 {
11673 name: "CMOVLCS",
11674 argLen: 3,
11675 resultInArg0: true,
11676 asm: x86.ACMOVLCS,
11677 reg: regInfo{
11678 inputs: []inputInfo{
11679 {0, 49135},
11680 {1, 49135},
11681 },
11682 outputs: []outputInfo{
11683 {0, 49135},
11684 },
11685 },
11686 },
11687 {
11688 name: "CMOVWEQ",
11689 argLen: 3,
11690 resultInArg0: true,
11691 asm: x86.ACMOVWEQ,
11692 reg: regInfo{
11693 inputs: []inputInfo{
11694 {0, 49135},
11695 {1, 49135},
11696 },
11697 outputs: []outputInfo{
11698 {0, 49135},
11699 },
11700 },
11701 },
11702 {
11703 name: "CMOVWNE",
11704 argLen: 3,
11705 resultInArg0: true,
11706 asm: x86.ACMOVWNE,
11707 reg: regInfo{
11708 inputs: []inputInfo{
11709 {0, 49135},
11710 {1, 49135},
11711 },
11712 outputs: []outputInfo{
11713 {0, 49135},
11714 },
11715 },
11716 },
11717 {
11718 name: "CMOVWLT",
11719 argLen: 3,
11720 resultInArg0: true,
11721 asm: x86.ACMOVWLT,
11722 reg: regInfo{
11723 inputs: []inputInfo{
11724 {0, 49135},
11725 {1, 49135},
11726 },
11727 outputs: []outputInfo{
11728 {0, 49135},
11729 },
11730 },
11731 },
11732 {
11733 name: "CMOVWGT",
11734 argLen: 3,
11735 resultInArg0: true,
11736 asm: x86.ACMOVWGT,
11737 reg: regInfo{
11738 inputs: []inputInfo{
11739 {0, 49135},
11740 {1, 49135},
11741 },
11742 outputs: []outputInfo{
11743 {0, 49135},
11744 },
11745 },
11746 },
11747 {
11748 name: "CMOVWLE",
11749 argLen: 3,
11750 resultInArg0: true,
11751 asm: x86.ACMOVWLE,
11752 reg: regInfo{
11753 inputs: []inputInfo{
11754 {0, 49135},
11755 {1, 49135},
11756 },
11757 outputs: []outputInfo{
11758 {0, 49135},
11759 },
11760 },
11761 },
11762 {
11763 name: "CMOVWGE",
11764 argLen: 3,
11765 resultInArg0: true,
11766 asm: x86.ACMOVWGE,
11767 reg: regInfo{
11768 inputs: []inputInfo{
11769 {0, 49135},
11770 {1, 49135},
11771 },
11772 outputs: []outputInfo{
11773 {0, 49135},
11774 },
11775 },
11776 },
11777 {
11778 name: "CMOVWLS",
11779 argLen: 3,
11780 resultInArg0: true,
11781 asm: x86.ACMOVWLS,
11782 reg: regInfo{
11783 inputs: []inputInfo{
11784 {0, 49135},
11785 {1, 49135},
11786 },
11787 outputs: []outputInfo{
11788 {0, 49135},
11789 },
11790 },
11791 },
11792 {
11793 name: "CMOVWHI",
11794 argLen: 3,
11795 resultInArg0: true,
11796 asm: x86.ACMOVWHI,
11797 reg: regInfo{
11798 inputs: []inputInfo{
11799 {0, 49135},
11800 {1, 49135},
11801 },
11802 outputs: []outputInfo{
11803 {0, 49135},
11804 },
11805 },
11806 },
11807 {
11808 name: "CMOVWCC",
11809 argLen: 3,
11810 resultInArg0: true,
11811 asm: x86.ACMOVWCC,
11812 reg: regInfo{
11813 inputs: []inputInfo{
11814 {0, 49135},
11815 {1, 49135},
11816 },
11817 outputs: []outputInfo{
11818 {0, 49135},
11819 },
11820 },
11821 },
11822 {
11823 name: "CMOVWCS",
11824 argLen: 3,
11825 resultInArg0: true,
11826 asm: x86.ACMOVWCS,
11827 reg: regInfo{
11828 inputs: []inputInfo{
11829 {0, 49135},
11830 {1, 49135},
11831 },
11832 outputs: []outputInfo{
11833 {0, 49135},
11834 },
11835 },
11836 },
11837 {
11838 name: "CMOVQEQF",
11839 argLen: 3,
11840 resultInArg0: true,
11841 needIntTemp: true,
11842 asm: x86.ACMOVQNE,
11843 reg: regInfo{
11844 inputs: []inputInfo{
11845 {0, 49135},
11846 {1, 49135},
11847 },
11848 outputs: []outputInfo{
11849 {0, 49135},
11850 },
11851 },
11852 },
11853 {
11854 name: "CMOVQNEF",
11855 argLen: 3,
11856 resultInArg0: true,
11857 asm: x86.ACMOVQNE,
11858 reg: regInfo{
11859 inputs: []inputInfo{
11860 {0, 49135},
11861 {1, 49135},
11862 },
11863 outputs: []outputInfo{
11864 {0, 49135},
11865 },
11866 },
11867 },
11868 {
11869 name: "CMOVQGTF",
11870 argLen: 3,
11871 resultInArg0: true,
11872 asm: x86.ACMOVQHI,
11873 reg: regInfo{
11874 inputs: []inputInfo{
11875 {0, 49135},
11876 {1, 49135},
11877 },
11878 outputs: []outputInfo{
11879 {0, 49135},
11880 },
11881 },
11882 },
11883 {
11884 name: "CMOVQGEF",
11885 argLen: 3,
11886 resultInArg0: true,
11887 asm: x86.ACMOVQCC,
11888 reg: regInfo{
11889 inputs: []inputInfo{
11890 {0, 49135},
11891 {1, 49135},
11892 },
11893 outputs: []outputInfo{
11894 {0, 49135},
11895 },
11896 },
11897 },
11898 {
11899 name: "CMOVLEQF",
11900 argLen: 3,
11901 resultInArg0: true,
11902 needIntTemp: true,
11903 asm: x86.ACMOVLNE,
11904 reg: regInfo{
11905 inputs: []inputInfo{
11906 {0, 49135},
11907 {1, 49135},
11908 },
11909 outputs: []outputInfo{
11910 {0, 49135},
11911 },
11912 },
11913 },
11914 {
11915 name: "CMOVLNEF",
11916 argLen: 3,
11917 resultInArg0: true,
11918 asm: x86.ACMOVLNE,
11919 reg: regInfo{
11920 inputs: []inputInfo{
11921 {0, 49135},
11922 {1, 49135},
11923 },
11924 outputs: []outputInfo{
11925 {0, 49135},
11926 },
11927 },
11928 },
11929 {
11930 name: "CMOVLGTF",
11931 argLen: 3,
11932 resultInArg0: true,
11933 asm: x86.ACMOVLHI,
11934 reg: regInfo{
11935 inputs: []inputInfo{
11936 {0, 49135},
11937 {1, 49135},
11938 },
11939 outputs: []outputInfo{
11940 {0, 49135},
11941 },
11942 },
11943 },
11944 {
11945 name: "CMOVLGEF",
11946 argLen: 3,
11947 resultInArg0: true,
11948 asm: x86.ACMOVLCC,
11949 reg: regInfo{
11950 inputs: []inputInfo{
11951 {0, 49135},
11952 {1, 49135},
11953 },
11954 outputs: []outputInfo{
11955 {0, 49135},
11956 },
11957 },
11958 },
11959 {
11960 name: "CMOVWEQF",
11961 argLen: 3,
11962 resultInArg0: true,
11963 needIntTemp: true,
11964 asm: x86.ACMOVWNE,
11965 reg: regInfo{
11966 inputs: []inputInfo{
11967 {0, 49135},
11968 {1, 49135},
11969 },
11970 outputs: []outputInfo{
11971 {0, 49135},
11972 },
11973 },
11974 },
11975 {
11976 name: "CMOVWNEF",
11977 argLen: 3,
11978 resultInArg0: true,
11979 asm: x86.ACMOVWNE,
11980 reg: regInfo{
11981 inputs: []inputInfo{
11982 {0, 49135},
11983 {1, 49135},
11984 },
11985 outputs: []outputInfo{
11986 {0, 49135},
11987 },
11988 },
11989 },
11990 {
11991 name: "CMOVWGTF",
11992 argLen: 3,
11993 resultInArg0: true,
11994 asm: x86.ACMOVWHI,
11995 reg: regInfo{
11996 inputs: []inputInfo{
11997 {0, 49135},
11998 {1, 49135},
11999 },
12000 outputs: []outputInfo{
12001 {0, 49135},
12002 },
12003 },
12004 },
12005 {
12006 name: "CMOVWGEF",
12007 argLen: 3,
12008 resultInArg0: true,
12009 asm: x86.ACMOVWCC,
12010 reg: regInfo{
12011 inputs: []inputInfo{
12012 {0, 49135},
12013 {1, 49135},
12014 },
12015 outputs: []outputInfo{
12016 {0, 49135},
12017 },
12018 },
12019 },
12020 {
12021 name: "BSWAPQ",
12022 argLen: 1,
12023 resultInArg0: true,
12024 asm: x86.ABSWAPQ,
12025 reg: regInfo{
12026 inputs: []inputInfo{
12027 {0, 49135},
12028 },
12029 outputs: []outputInfo{
12030 {0, 49135},
12031 },
12032 },
12033 },
12034 {
12035 name: "BSWAPL",
12036 argLen: 1,
12037 resultInArg0: true,
12038 asm: x86.ABSWAPL,
12039 reg: regInfo{
12040 inputs: []inputInfo{
12041 {0, 49135},
12042 },
12043 outputs: []outputInfo{
12044 {0, 49135},
12045 },
12046 },
12047 },
12048 {
12049 name: "POPCNTQ",
12050 argLen: 1,
12051 clobberFlags: true,
12052 asm: x86.APOPCNTQ,
12053 reg: regInfo{
12054 inputs: []inputInfo{
12055 {0, 49135},
12056 },
12057 outputs: []outputInfo{
12058 {0, 49135},
12059 },
12060 },
12061 },
12062 {
12063 name: "POPCNTL",
12064 argLen: 1,
12065 clobberFlags: true,
12066 asm: x86.APOPCNTL,
12067 reg: regInfo{
12068 inputs: []inputInfo{
12069 {0, 49135},
12070 },
12071 outputs: []outputInfo{
12072 {0, 49135},
12073 },
12074 },
12075 },
12076 {
12077 name: "SQRTSD",
12078 argLen: 1,
12079 asm: x86.ASQRTSD,
12080 reg: regInfo{
12081 inputs: []inputInfo{
12082 {0, 2147418112},
12083 },
12084 outputs: []outputInfo{
12085 {0, 2147418112},
12086 },
12087 },
12088 },
12089 {
12090 name: "SQRTSS",
12091 argLen: 1,
12092 asm: x86.ASQRTSS,
12093 reg: regInfo{
12094 inputs: []inputInfo{
12095 {0, 2147418112},
12096 },
12097 outputs: []outputInfo{
12098 {0, 2147418112},
12099 },
12100 },
12101 },
12102 {
12103 name: "ROUNDSD",
12104 auxType: auxInt8,
12105 argLen: 1,
12106 asm: x86.AROUNDSD,
12107 reg: regInfo{
12108 inputs: []inputInfo{
12109 {0, 2147418112},
12110 },
12111 outputs: []outputInfo{
12112 {0, 2147418112},
12113 },
12114 },
12115 },
12116 {
12117 name: "LoweredRound32F",
12118 argLen: 1,
12119 resultInArg0: true,
12120 zeroWidth: true,
12121 reg: regInfo{
12122 inputs: []inputInfo{
12123 {0, 2147418112},
12124 },
12125 outputs: []outputInfo{
12126 {0, 2147418112},
12127 },
12128 },
12129 },
12130 {
12131 name: "LoweredRound64F",
12132 argLen: 1,
12133 resultInArg0: true,
12134 zeroWidth: true,
12135 reg: regInfo{
12136 inputs: []inputInfo{
12137 {0, 2147418112},
12138 },
12139 outputs: []outputInfo{
12140 {0, 2147418112},
12141 },
12142 },
12143 },
12144 {
12145 name: "VFMADD231SS",
12146 argLen: 3,
12147 resultInArg0: true,
12148 asm: x86.AVFMADD231SS,
12149 reg: regInfo{
12150 inputs: []inputInfo{
12151 {0, 2147418112},
12152 {1, 2147418112},
12153 {2, 2147418112},
12154 },
12155 outputs: []outputInfo{
12156 {0, 2147418112},
12157 },
12158 },
12159 },
12160 {
12161 name: "VFMADD231SD",
12162 argLen: 3,
12163 resultInArg0: true,
12164 asm: x86.AVFMADD231SD,
12165 reg: regInfo{
12166 inputs: []inputInfo{
12167 {0, 2147418112},
12168 {1, 2147418112},
12169 {2, 2147418112},
12170 },
12171 outputs: []outputInfo{
12172 {0, 2147418112},
12173 },
12174 },
12175 },
12176 {
12177 name: "MINSD",
12178 argLen: 2,
12179 resultInArg0: true,
12180 asm: x86.AMINSD,
12181 reg: regInfo{
12182 inputs: []inputInfo{
12183 {0, 2147418112},
12184 {1, 2147418112},
12185 },
12186 outputs: []outputInfo{
12187 {0, 2147418112},
12188 },
12189 },
12190 },
12191 {
12192 name: "MINSS",
12193 argLen: 2,
12194 resultInArg0: true,
12195 asm: x86.AMINSS,
12196 reg: regInfo{
12197 inputs: []inputInfo{
12198 {0, 2147418112},
12199 {1, 2147418112},
12200 },
12201 outputs: []outputInfo{
12202 {0, 2147418112},
12203 },
12204 },
12205 },
12206 {
12207 name: "SBBQcarrymask",
12208 argLen: 1,
12209 asm: x86.ASBBQ,
12210 reg: regInfo{
12211 outputs: []outputInfo{
12212 {0, 49135},
12213 },
12214 },
12215 },
12216 {
12217 name: "SBBLcarrymask",
12218 argLen: 1,
12219 asm: x86.ASBBL,
12220 reg: regInfo{
12221 outputs: []outputInfo{
12222 {0, 49135},
12223 },
12224 },
12225 },
12226 {
12227 name: "SETEQ",
12228 argLen: 1,
12229 asm: x86.ASETEQ,
12230 reg: regInfo{
12231 outputs: []outputInfo{
12232 {0, 49135},
12233 },
12234 },
12235 },
12236 {
12237 name: "SETNE",
12238 argLen: 1,
12239 asm: x86.ASETNE,
12240 reg: regInfo{
12241 outputs: []outputInfo{
12242 {0, 49135},
12243 },
12244 },
12245 },
12246 {
12247 name: "SETL",
12248 argLen: 1,
12249 asm: x86.ASETLT,
12250 reg: regInfo{
12251 outputs: []outputInfo{
12252 {0, 49135},
12253 },
12254 },
12255 },
12256 {
12257 name: "SETLE",
12258 argLen: 1,
12259 asm: x86.ASETLE,
12260 reg: regInfo{
12261 outputs: []outputInfo{
12262 {0, 49135},
12263 },
12264 },
12265 },
12266 {
12267 name: "SETG",
12268 argLen: 1,
12269 asm: x86.ASETGT,
12270 reg: regInfo{
12271 outputs: []outputInfo{
12272 {0, 49135},
12273 },
12274 },
12275 },
12276 {
12277 name: "SETGE",
12278 argLen: 1,
12279 asm: x86.ASETGE,
12280 reg: regInfo{
12281 outputs: []outputInfo{
12282 {0, 49135},
12283 },
12284 },
12285 },
12286 {
12287 name: "SETB",
12288 argLen: 1,
12289 asm: x86.ASETCS,
12290 reg: regInfo{
12291 outputs: []outputInfo{
12292 {0, 49135},
12293 },
12294 },
12295 },
12296 {
12297 name: "SETBE",
12298 argLen: 1,
12299 asm: x86.ASETLS,
12300 reg: regInfo{
12301 outputs: []outputInfo{
12302 {0, 49135},
12303 },
12304 },
12305 },
12306 {
12307 name: "SETA",
12308 argLen: 1,
12309 asm: x86.ASETHI,
12310 reg: regInfo{
12311 outputs: []outputInfo{
12312 {0, 49135},
12313 },
12314 },
12315 },
12316 {
12317 name: "SETAE",
12318 argLen: 1,
12319 asm: x86.ASETCC,
12320 reg: regInfo{
12321 outputs: []outputInfo{
12322 {0, 49135},
12323 },
12324 },
12325 },
12326 {
12327 name: "SETO",
12328 argLen: 1,
12329 asm: x86.ASETOS,
12330 reg: regInfo{
12331 outputs: []outputInfo{
12332 {0, 49135},
12333 },
12334 },
12335 },
12336 {
12337 name: "SETEQstore",
12338 auxType: auxSymOff,
12339 argLen: 3,
12340 faultOnNilArg0: true,
12341 symEffect: SymWrite,
12342 asm: x86.ASETEQ,
12343 reg: regInfo{
12344 inputs: []inputInfo{
12345 {0, 4295032831},
12346 },
12347 },
12348 },
12349 {
12350 name: "SETNEstore",
12351 auxType: auxSymOff,
12352 argLen: 3,
12353 faultOnNilArg0: true,
12354 symEffect: SymWrite,
12355 asm: x86.ASETNE,
12356 reg: regInfo{
12357 inputs: []inputInfo{
12358 {0, 4295032831},
12359 },
12360 },
12361 },
12362 {
12363 name: "SETLstore",
12364 auxType: auxSymOff,
12365 argLen: 3,
12366 faultOnNilArg0: true,
12367 symEffect: SymWrite,
12368 asm: x86.ASETLT,
12369 reg: regInfo{
12370 inputs: []inputInfo{
12371 {0, 4295032831},
12372 },
12373 },
12374 },
12375 {
12376 name: "SETLEstore",
12377 auxType: auxSymOff,
12378 argLen: 3,
12379 faultOnNilArg0: true,
12380 symEffect: SymWrite,
12381 asm: x86.ASETLE,
12382 reg: regInfo{
12383 inputs: []inputInfo{
12384 {0, 4295032831},
12385 },
12386 },
12387 },
12388 {
12389 name: "SETGstore",
12390 auxType: auxSymOff,
12391 argLen: 3,
12392 faultOnNilArg0: true,
12393 symEffect: SymWrite,
12394 asm: x86.ASETGT,
12395 reg: regInfo{
12396 inputs: []inputInfo{
12397 {0, 4295032831},
12398 },
12399 },
12400 },
12401 {
12402 name: "SETGEstore",
12403 auxType: auxSymOff,
12404 argLen: 3,
12405 faultOnNilArg0: true,
12406 symEffect: SymWrite,
12407 asm: x86.ASETGE,
12408 reg: regInfo{
12409 inputs: []inputInfo{
12410 {0, 4295032831},
12411 },
12412 },
12413 },
12414 {
12415 name: "SETBstore",
12416 auxType: auxSymOff,
12417 argLen: 3,
12418 faultOnNilArg0: true,
12419 symEffect: SymWrite,
12420 asm: x86.ASETCS,
12421 reg: regInfo{
12422 inputs: []inputInfo{
12423 {0, 4295032831},
12424 },
12425 },
12426 },
12427 {
12428 name: "SETBEstore",
12429 auxType: auxSymOff,
12430 argLen: 3,
12431 faultOnNilArg0: true,
12432 symEffect: SymWrite,
12433 asm: x86.ASETLS,
12434 reg: regInfo{
12435 inputs: []inputInfo{
12436 {0, 4295032831},
12437 },
12438 },
12439 },
12440 {
12441 name: "SETAstore",
12442 auxType: auxSymOff,
12443 argLen: 3,
12444 faultOnNilArg0: true,
12445 symEffect: SymWrite,
12446 asm: x86.ASETHI,
12447 reg: regInfo{
12448 inputs: []inputInfo{
12449 {0, 4295032831},
12450 },
12451 },
12452 },
12453 {
12454 name: "SETAEstore",
12455 auxType: auxSymOff,
12456 argLen: 3,
12457 faultOnNilArg0: true,
12458 symEffect: SymWrite,
12459 asm: x86.ASETCC,
12460 reg: regInfo{
12461 inputs: []inputInfo{
12462 {0, 4295032831},
12463 },
12464 },
12465 },
12466 {
12467 name: "SETEQstoreidx1",
12468 auxType: auxSymOff,
12469 argLen: 4,
12470 commutative: true,
12471 symEffect: SymWrite,
12472 asm: x86.ASETEQ,
12473 scale: 1,
12474 reg: regInfo{
12475 inputs: []inputInfo{
12476 {1, 49151},
12477 {0, 4295032831},
12478 },
12479 },
12480 },
12481 {
12482 name: "SETNEstoreidx1",
12483 auxType: auxSymOff,
12484 argLen: 4,
12485 commutative: true,
12486 symEffect: SymWrite,
12487 asm: x86.ASETNE,
12488 scale: 1,
12489 reg: regInfo{
12490 inputs: []inputInfo{
12491 {1, 49151},
12492 {0, 4295032831},
12493 },
12494 },
12495 },
12496 {
12497 name: "SETLstoreidx1",
12498 auxType: auxSymOff,
12499 argLen: 4,
12500 commutative: true,
12501 symEffect: SymWrite,
12502 asm: x86.ASETLT,
12503 scale: 1,
12504 reg: regInfo{
12505 inputs: []inputInfo{
12506 {1, 49151},
12507 {0, 4295032831},
12508 },
12509 },
12510 },
12511 {
12512 name: "SETLEstoreidx1",
12513 auxType: auxSymOff,
12514 argLen: 4,
12515 commutative: true,
12516 symEffect: SymWrite,
12517 asm: x86.ASETLE,
12518 scale: 1,
12519 reg: regInfo{
12520 inputs: []inputInfo{
12521 {1, 49151},
12522 {0, 4295032831},
12523 },
12524 },
12525 },
12526 {
12527 name: "SETGstoreidx1",
12528 auxType: auxSymOff,
12529 argLen: 4,
12530 commutative: true,
12531 symEffect: SymWrite,
12532 asm: x86.ASETGT,
12533 scale: 1,
12534 reg: regInfo{
12535 inputs: []inputInfo{
12536 {1, 49151},
12537 {0, 4295032831},
12538 },
12539 },
12540 },
12541 {
12542 name: "SETGEstoreidx1",
12543 auxType: auxSymOff,
12544 argLen: 4,
12545 commutative: true,
12546 symEffect: SymWrite,
12547 asm: x86.ASETGE,
12548 scale: 1,
12549 reg: regInfo{
12550 inputs: []inputInfo{
12551 {1, 49151},
12552 {0, 4295032831},
12553 },
12554 },
12555 },
12556 {
12557 name: "SETBstoreidx1",
12558 auxType: auxSymOff,
12559 argLen: 4,
12560 commutative: true,
12561 symEffect: SymWrite,
12562 asm: x86.ASETCS,
12563 scale: 1,
12564 reg: regInfo{
12565 inputs: []inputInfo{
12566 {1, 49151},
12567 {0, 4295032831},
12568 },
12569 },
12570 },
12571 {
12572 name: "SETBEstoreidx1",
12573 auxType: auxSymOff,
12574 argLen: 4,
12575 commutative: true,
12576 symEffect: SymWrite,
12577 asm: x86.ASETLS,
12578 scale: 1,
12579 reg: regInfo{
12580 inputs: []inputInfo{
12581 {1, 49151},
12582 {0, 4295032831},
12583 },
12584 },
12585 },
12586 {
12587 name: "SETAstoreidx1",
12588 auxType: auxSymOff,
12589 argLen: 4,
12590 commutative: true,
12591 symEffect: SymWrite,
12592 asm: x86.ASETHI,
12593 scale: 1,
12594 reg: regInfo{
12595 inputs: []inputInfo{
12596 {1, 49151},
12597 {0, 4295032831},
12598 },
12599 },
12600 },
12601 {
12602 name: "SETAEstoreidx1",
12603 auxType: auxSymOff,
12604 argLen: 4,
12605 commutative: true,
12606 symEffect: SymWrite,
12607 asm: x86.ASETCC,
12608 scale: 1,
12609 reg: regInfo{
12610 inputs: []inputInfo{
12611 {1, 49151},
12612 {0, 4295032831},
12613 },
12614 },
12615 },
12616 {
12617 name: "SETEQF",
12618 argLen: 1,
12619 clobberFlags: true,
12620 needIntTemp: true,
12621 asm: x86.ASETEQ,
12622 reg: regInfo{
12623 outputs: []outputInfo{
12624 {0, 49135},
12625 },
12626 },
12627 },
12628 {
12629 name: "SETNEF",
12630 argLen: 1,
12631 clobberFlags: true,
12632 needIntTemp: true,
12633 asm: x86.ASETNE,
12634 reg: regInfo{
12635 outputs: []outputInfo{
12636 {0, 49135},
12637 },
12638 },
12639 },
12640 {
12641 name: "SETORD",
12642 argLen: 1,
12643 asm: x86.ASETPC,
12644 reg: regInfo{
12645 outputs: []outputInfo{
12646 {0, 49135},
12647 },
12648 },
12649 },
12650 {
12651 name: "SETNAN",
12652 argLen: 1,
12653 asm: x86.ASETPS,
12654 reg: regInfo{
12655 outputs: []outputInfo{
12656 {0, 49135},
12657 },
12658 },
12659 },
12660 {
12661 name: "SETGF",
12662 argLen: 1,
12663 asm: x86.ASETHI,
12664 reg: regInfo{
12665 outputs: []outputInfo{
12666 {0, 49135},
12667 },
12668 },
12669 },
12670 {
12671 name: "SETGEF",
12672 argLen: 1,
12673 asm: x86.ASETCC,
12674 reg: regInfo{
12675 outputs: []outputInfo{
12676 {0, 49135},
12677 },
12678 },
12679 },
12680 {
12681 name: "MOVBQSX",
12682 argLen: 1,
12683 asm: x86.AMOVBQSX,
12684 reg: regInfo{
12685 inputs: []inputInfo{
12686 {0, 49135},
12687 },
12688 outputs: []outputInfo{
12689 {0, 49135},
12690 },
12691 },
12692 },
12693 {
12694 name: "MOVBQZX",
12695 argLen: 1,
12696 asm: x86.AMOVBLZX,
12697 reg: regInfo{
12698 inputs: []inputInfo{
12699 {0, 49135},
12700 },
12701 outputs: []outputInfo{
12702 {0, 49135},
12703 },
12704 },
12705 },
12706 {
12707 name: "MOVWQSX",
12708 argLen: 1,
12709 asm: x86.AMOVWQSX,
12710 reg: regInfo{
12711 inputs: []inputInfo{
12712 {0, 49135},
12713 },
12714 outputs: []outputInfo{
12715 {0, 49135},
12716 },
12717 },
12718 },
12719 {
12720 name: "MOVWQZX",
12721 argLen: 1,
12722 asm: x86.AMOVWLZX,
12723 reg: regInfo{
12724 inputs: []inputInfo{
12725 {0, 49135},
12726 },
12727 outputs: []outputInfo{
12728 {0, 49135},
12729 },
12730 },
12731 },
12732 {
12733 name: "MOVLQSX",
12734 argLen: 1,
12735 asm: x86.AMOVLQSX,
12736 reg: regInfo{
12737 inputs: []inputInfo{
12738 {0, 49135},
12739 },
12740 outputs: []outputInfo{
12741 {0, 49135},
12742 },
12743 },
12744 },
12745 {
12746 name: "MOVLQZX",
12747 argLen: 1,
12748 asm: x86.AMOVL,
12749 reg: regInfo{
12750 inputs: []inputInfo{
12751 {0, 49135},
12752 },
12753 outputs: []outputInfo{
12754 {0, 49135},
12755 },
12756 },
12757 },
12758 {
12759 name: "MOVLconst",
12760 auxType: auxInt32,
12761 argLen: 0,
12762 rematerializeable: true,
12763 asm: x86.AMOVL,
12764 reg: regInfo{
12765 outputs: []outputInfo{
12766 {0, 49135},
12767 },
12768 },
12769 },
12770 {
12771 name: "MOVQconst",
12772 auxType: auxInt64,
12773 argLen: 0,
12774 rematerializeable: true,
12775 asm: x86.AMOVQ,
12776 reg: regInfo{
12777 outputs: []outputInfo{
12778 {0, 49135},
12779 },
12780 },
12781 },
12782 {
12783 name: "CVTTSD2SL",
12784 argLen: 1,
12785 asm: x86.ACVTTSD2SL,
12786 reg: regInfo{
12787 inputs: []inputInfo{
12788 {0, 2147418112},
12789 },
12790 outputs: []outputInfo{
12791 {0, 49135},
12792 },
12793 },
12794 },
12795 {
12796 name: "CVTTSD2SQ",
12797 argLen: 1,
12798 asm: x86.ACVTTSD2SQ,
12799 reg: regInfo{
12800 inputs: []inputInfo{
12801 {0, 2147418112},
12802 },
12803 outputs: []outputInfo{
12804 {0, 49135},
12805 },
12806 },
12807 },
12808 {
12809 name: "CVTTSS2SL",
12810 argLen: 1,
12811 asm: x86.ACVTTSS2SL,
12812 reg: regInfo{
12813 inputs: []inputInfo{
12814 {0, 2147418112},
12815 },
12816 outputs: []outputInfo{
12817 {0, 49135},
12818 },
12819 },
12820 },
12821 {
12822 name: "CVTTSS2SQ",
12823 argLen: 1,
12824 asm: x86.ACVTTSS2SQ,
12825 reg: regInfo{
12826 inputs: []inputInfo{
12827 {0, 2147418112},
12828 },
12829 outputs: []outputInfo{
12830 {0, 49135},
12831 },
12832 },
12833 },
12834 {
12835 name: "CVTSL2SS",
12836 argLen: 1,
12837 asm: x86.ACVTSL2SS,
12838 reg: regInfo{
12839 inputs: []inputInfo{
12840 {0, 49135},
12841 },
12842 outputs: []outputInfo{
12843 {0, 2147418112},
12844 },
12845 },
12846 },
12847 {
12848 name: "CVTSL2SD",
12849 argLen: 1,
12850 asm: x86.ACVTSL2SD,
12851 reg: regInfo{
12852 inputs: []inputInfo{
12853 {0, 49135},
12854 },
12855 outputs: []outputInfo{
12856 {0, 2147418112},
12857 },
12858 },
12859 },
12860 {
12861 name: "CVTSQ2SS",
12862 argLen: 1,
12863 asm: x86.ACVTSQ2SS,
12864 reg: regInfo{
12865 inputs: []inputInfo{
12866 {0, 49135},
12867 },
12868 outputs: []outputInfo{
12869 {0, 2147418112},
12870 },
12871 },
12872 },
12873 {
12874 name: "CVTSQ2SD",
12875 argLen: 1,
12876 asm: x86.ACVTSQ2SD,
12877 reg: regInfo{
12878 inputs: []inputInfo{
12879 {0, 49135},
12880 },
12881 outputs: []outputInfo{
12882 {0, 2147418112},
12883 },
12884 },
12885 },
12886 {
12887 name: "CVTSD2SS",
12888 argLen: 1,
12889 asm: x86.ACVTSD2SS,
12890 reg: regInfo{
12891 inputs: []inputInfo{
12892 {0, 2147418112},
12893 },
12894 outputs: []outputInfo{
12895 {0, 2147418112},
12896 },
12897 },
12898 },
12899 {
12900 name: "CVTSS2SD",
12901 argLen: 1,
12902 asm: x86.ACVTSS2SD,
12903 reg: regInfo{
12904 inputs: []inputInfo{
12905 {0, 2147418112},
12906 },
12907 outputs: []outputInfo{
12908 {0, 2147418112},
12909 },
12910 },
12911 },
12912 {
12913 name: "MOVQi2f",
12914 argLen: 1,
12915 reg: regInfo{
12916 inputs: []inputInfo{
12917 {0, 49135},
12918 },
12919 outputs: []outputInfo{
12920 {0, 2147418112},
12921 },
12922 },
12923 },
12924 {
12925 name: "MOVQf2i",
12926 argLen: 1,
12927 reg: regInfo{
12928 inputs: []inputInfo{
12929 {0, 2147418112},
12930 },
12931 outputs: []outputInfo{
12932 {0, 49135},
12933 },
12934 },
12935 },
12936 {
12937 name: "MOVLi2f",
12938 argLen: 1,
12939 reg: regInfo{
12940 inputs: []inputInfo{
12941 {0, 49135},
12942 },
12943 outputs: []outputInfo{
12944 {0, 2147418112},
12945 },
12946 },
12947 },
12948 {
12949 name: "MOVLf2i",
12950 argLen: 1,
12951 reg: regInfo{
12952 inputs: []inputInfo{
12953 {0, 2147418112},
12954 },
12955 outputs: []outputInfo{
12956 {0, 49135},
12957 },
12958 },
12959 },
12960 {
12961 name: "PXOR",
12962 argLen: 2,
12963 commutative: true,
12964 resultInArg0: true,
12965 asm: x86.APXOR,
12966 reg: regInfo{
12967 inputs: []inputInfo{
12968 {0, 2147418112},
12969 {1, 2147418112},
12970 },
12971 outputs: []outputInfo{
12972 {0, 2147418112},
12973 },
12974 },
12975 },
12976 {
12977 name: "POR",
12978 argLen: 2,
12979 commutative: true,
12980 resultInArg0: true,
12981 asm: x86.APOR,
12982 reg: regInfo{
12983 inputs: []inputInfo{
12984 {0, 2147418112},
12985 {1, 2147418112},
12986 },
12987 outputs: []outputInfo{
12988 {0, 2147418112},
12989 },
12990 },
12991 },
12992 {
12993 name: "LEAQ",
12994 auxType: auxSymOff,
12995 argLen: 1,
12996 rematerializeable: true,
12997 symEffect: SymAddr,
12998 asm: x86.ALEAQ,
12999 reg: regInfo{
13000 inputs: []inputInfo{
13001 {0, 4295032831},
13002 },
13003 outputs: []outputInfo{
13004 {0, 49135},
13005 },
13006 },
13007 },
13008 {
13009 name: "LEAL",
13010 auxType: auxSymOff,
13011 argLen: 1,
13012 rematerializeable: true,
13013 symEffect: SymAddr,
13014 asm: x86.ALEAL,
13015 reg: regInfo{
13016 inputs: []inputInfo{
13017 {0, 4295032831},
13018 },
13019 outputs: []outputInfo{
13020 {0, 49135},
13021 },
13022 },
13023 },
13024 {
13025 name: "LEAW",
13026 auxType: auxSymOff,
13027 argLen: 1,
13028 rematerializeable: true,
13029 symEffect: SymAddr,
13030 asm: x86.ALEAW,
13031 reg: regInfo{
13032 inputs: []inputInfo{
13033 {0, 4295032831},
13034 },
13035 outputs: []outputInfo{
13036 {0, 49135},
13037 },
13038 },
13039 },
13040 {
13041 name: "LEAQ1",
13042 auxType: auxSymOff,
13043 argLen: 2,
13044 commutative: true,
13045 symEffect: SymAddr,
13046 asm: x86.ALEAQ,
13047 scale: 1,
13048 reg: regInfo{
13049 inputs: []inputInfo{
13050 {1, 49151},
13051 {0, 4295032831},
13052 },
13053 outputs: []outputInfo{
13054 {0, 49135},
13055 },
13056 },
13057 },
13058 {
13059 name: "LEAL1",
13060 auxType: auxSymOff,
13061 argLen: 2,
13062 commutative: true,
13063 symEffect: SymAddr,
13064 asm: x86.ALEAL,
13065 scale: 1,
13066 reg: regInfo{
13067 inputs: []inputInfo{
13068 {1, 49151},
13069 {0, 4295032831},
13070 },
13071 outputs: []outputInfo{
13072 {0, 49135},
13073 },
13074 },
13075 },
13076 {
13077 name: "LEAW1",
13078 auxType: auxSymOff,
13079 argLen: 2,
13080 commutative: true,
13081 symEffect: SymAddr,
13082 asm: x86.ALEAW,
13083 scale: 1,
13084 reg: regInfo{
13085 inputs: []inputInfo{
13086 {1, 49151},
13087 {0, 4295032831},
13088 },
13089 outputs: []outputInfo{
13090 {0, 49135},
13091 },
13092 },
13093 },
13094 {
13095 name: "LEAQ2",
13096 auxType: auxSymOff,
13097 argLen: 2,
13098 symEffect: SymAddr,
13099 asm: x86.ALEAQ,
13100 scale: 2,
13101 reg: regInfo{
13102 inputs: []inputInfo{
13103 {1, 49151},
13104 {0, 4295032831},
13105 },
13106 outputs: []outputInfo{
13107 {0, 49135},
13108 },
13109 },
13110 },
13111 {
13112 name: "LEAL2",
13113 auxType: auxSymOff,
13114 argLen: 2,
13115 symEffect: SymAddr,
13116 asm: x86.ALEAL,
13117 scale: 2,
13118 reg: regInfo{
13119 inputs: []inputInfo{
13120 {1, 49151},
13121 {0, 4295032831},
13122 },
13123 outputs: []outputInfo{
13124 {0, 49135},
13125 },
13126 },
13127 },
13128 {
13129 name: "LEAW2",
13130 auxType: auxSymOff,
13131 argLen: 2,
13132 symEffect: SymAddr,
13133 asm: x86.ALEAW,
13134 scale: 2,
13135 reg: regInfo{
13136 inputs: []inputInfo{
13137 {1, 49151},
13138 {0, 4295032831},
13139 },
13140 outputs: []outputInfo{
13141 {0, 49135},
13142 },
13143 },
13144 },
13145 {
13146 name: "LEAQ4",
13147 auxType: auxSymOff,
13148 argLen: 2,
13149 symEffect: SymAddr,
13150 asm: x86.ALEAQ,
13151 scale: 4,
13152 reg: regInfo{
13153 inputs: []inputInfo{
13154 {1, 49151},
13155 {0, 4295032831},
13156 },
13157 outputs: []outputInfo{
13158 {0, 49135},
13159 },
13160 },
13161 },
13162 {
13163 name: "LEAL4",
13164 auxType: auxSymOff,
13165 argLen: 2,
13166 symEffect: SymAddr,
13167 asm: x86.ALEAL,
13168 scale: 4,
13169 reg: regInfo{
13170 inputs: []inputInfo{
13171 {1, 49151},
13172 {0, 4295032831},
13173 },
13174 outputs: []outputInfo{
13175 {0, 49135},
13176 },
13177 },
13178 },
13179 {
13180 name: "LEAW4",
13181 auxType: auxSymOff,
13182 argLen: 2,
13183 symEffect: SymAddr,
13184 asm: x86.ALEAW,
13185 scale: 4,
13186 reg: regInfo{
13187 inputs: []inputInfo{
13188 {1, 49151},
13189 {0, 4295032831},
13190 },
13191 outputs: []outputInfo{
13192 {0, 49135},
13193 },
13194 },
13195 },
13196 {
13197 name: "LEAQ8",
13198 auxType: auxSymOff,
13199 argLen: 2,
13200 symEffect: SymAddr,
13201 asm: x86.ALEAQ,
13202 scale: 8,
13203 reg: regInfo{
13204 inputs: []inputInfo{
13205 {1, 49151},
13206 {0, 4295032831},
13207 },
13208 outputs: []outputInfo{
13209 {0, 49135},
13210 },
13211 },
13212 },
13213 {
13214 name: "LEAL8",
13215 auxType: auxSymOff,
13216 argLen: 2,
13217 symEffect: SymAddr,
13218 asm: x86.ALEAL,
13219 scale: 8,
13220 reg: regInfo{
13221 inputs: []inputInfo{
13222 {1, 49151},
13223 {0, 4295032831},
13224 },
13225 outputs: []outputInfo{
13226 {0, 49135},
13227 },
13228 },
13229 },
13230 {
13231 name: "LEAW8",
13232 auxType: auxSymOff,
13233 argLen: 2,
13234 symEffect: SymAddr,
13235 asm: x86.ALEAW,
13236 scale: 8,
13237 reg: regInfo{
13238 inputs: []inputInfo{
13239 {1, 49151},
13240 {0, 4295032831},
13241 },
13242 outputs: []outputInfo{
13243 {0, 49135},
13244 },
13245 },
13246 },
13247 {
13248 name: "MOVBload",
13249 auxType: auxSymOff,
13250 argLen: 2,
13251 faultOnNilArg0: true,
13252 symEffect: SymRead,
13253 asm: x86.AMOVBLZX,
13254 reg: regInfo{
13255 inputs: []inputInfo{
13256 {0, 4295032831},
13257 },
13258 outputs: []outputInfo{
13259 {0, 49135},
13260 },
13261 },
13262 },
13263 {
13264 name: "MOVBQSXload",
13265 auxType: auxSymOff,
13266 argLen: 2,
13267 faultOnNilArg0: true,
13268 symEffect: SymRead,
13269 asm: x86.AMOVBQSX,
13270 reg: regInfo{
13271 inputs: []inputInfo{
13272 {0, 4295032831},
13273 },
13274 outputs: []outputInfo{
13275 {0, 49135},
13276 },
13277 },
13278 },
13279 {
13280 name: "MOVWload",
13281 auxType: auxSymOff,
13282 argLen: 2,
13283 faultOnNilArg0: true,
13284 symEffect: SymRead,
13285 asm: x86.AMOVWLZX,
13286 reg: regInfo{
13287 inputs: []inputInfo{
13288 {0, 4295032831},
13289 },
13290 outputs: []outputInfo{
13291 {0, 49135},
13292 },
13293 },
13294 },
13295 {
13296 name: "MOVWQSXload",
13297 auxType: auxSymOff,
13298 argLen: 2,
13299 faultOnNilArg0: true,
13300 symEffect: SymRead,
13301 asm: x86.AMOVWQSX,
13302 reg: regInfo{
13303 inputs: []inputInfo{
13304 {0, 4295032831},
13305 },
13306 outputs: []outputInfo{
13307 {0, 49135},
13308 },
13309 },
13310 },
13311 {
13312 name: "MOVLload",
13313 auxType: auxSymOff,
13314 argLen: 2,
13315 faultOnNilArg0: true,
13316 symEffect: SymRead,
13317 asm: x86.AMOVL,
13318 reg: regInfo{
13319 inputs: []inputInfo{
13320 {0, 4295032831},
13321 },
13322 outputs: []outputInfo{
13323 {0, 49135},
13324 },
13325 },
13326 },
13327 {
13328 name: "MOVLQSXload",
13329 auxType: auxSymOff,
13330 argLen: 2,
13331 faultOnNilArg0: true,
13332 symEffect: SymRead,
13333 asm: x86.AMOVLQSX,
13334 reg: regInfo{
13335 inputs: []inputInfo{
13336 {0, 4295032831},
13337 },
13338 outputs: []outputInfo{
13339 {0, 49135},
13340 },
13341 },
13342 },
13343 {
13344 name: "MOVQload",
13345 auxType: auxSymOff,
13346 argLen: 2,
13347 faultOnNilArg0: true,
13348 symEffect: SymRead,
13349 asm: x86.AMOVQ,
13350 reg: regInfo{
13351 inputs: []inputInfo{
13352 {0, 4295032831},
13353 },
13354 outputs: []outputInfo{
13355 {0, 49135},
13356 },
13357 },
13358 },
13359 {
13360 name: "MOVBstore",
13361 auxType: auxSymOff,
13362 argLen: 3,
13363 faultOnNilArg0: true,
13364 symEffect: SymWrite,
13365 asm: x86.AMOVB,
13366 reg: regInfo{
13367 inputs: []inputInfo{
13368 {1, 49151},
13369 {0, 4295032831},
13370 },
13371 },
13372 },
13373 {
13374 name: "MOVWstore",
13375 auxType: auxSymOff,
13376 argLen: 3,
13377 faultOnNilArg0: true,
13378 symEffect: SymWrite,
13379 asm: x86.AMOVW,
13380 reg: regInfo{
13381 inputs: []inputInfo{
13382 {1, 49151},
13383 {0, 4295032831},
13384 },
13385 },
13386 },
13387 {
13388 name: "MOVLstore",
13389 auxType: auxSymOff,
13390 argLen: 3,
13391 faultOnNilArg0: true,
13392 symEffect: SymWrite,
13393 asm: x86.AMOVL,
13394 reg: regInfo{
13395 inputs: []inputInfo{
13396 {1, 49151},
13397 {0, 4295032831},
13398 },
13399 },
13400 },
13401 {
13402 name: "MOVQstore",
13403 auxType: auxSymOff,
13404 argLen: 3,
13405 faultOnNilArg0: true,
13406 symEffect: SymWrite,
13407 asm: x86.AMOVQ,
13408 reg: regInfo{
13409 inputs: []inputInfo{
13410 {1, 49151},
13411 {0, 4295032831},
13412 },
13413 },
13414 },
13415 {
13416 name: "MOVOload",
13417 auxType: auxSymOff,
13418 argLen: 2,
13419 faultOnNilArg0: true,
13420 symEffect: SymRead,
13421 asm: x86.AMOVUPS,
13422 reg: regInfo{
13423 inputs: []inputInfo{
13424 {0, 4295016447},
13425 },
13426 outputs: []outputInfo{
13427 {0, 2147418112},
13428 },
13429 },
13430 },
13431 {
13432 name: "MOVOstore",
13433 auxType: auxSymOff,
13434 argLen: 3,
13435 faultOnNilArg0: true,
13436 symEffect: SymWrite,
13437 asm: x86.AMOVUPS,
13438 reg: regInfo{
13439 inputs: []inputInfo{
13440 {1, 2147418112},
13441 {0, 4295016447},
13442 },
13443 },
13444 },
13445 {
13446 name: "MOVBloadidx1",
13447 auxType: auxSymOff,
13448 argLen: 3,
13449 commutative: true,
13450 symEffect: SymRead,
13451 asm: x86.AMOVBLZX,
13452 scale: 1,
13453 reg: regInfo{
13454 inputs: []inputInfo{
13455 {1, 49151},
13456 {0, 4295032831},
13457 },
13458 outputs: []outputInfo{
13459 {0, 49135},
13460 },
13461 },
13462 },
13463 {
13464 name: "MOVWloadidx1",
13465 auxType: auxSymOff,
13466 argLen: 3,
13467 commutative: true,
13468 symEffect: SymRead,
13469 asm: x86.AMOVWLZX,
13470 scale: 1,
13471 reg: regInfo{
13472 inputs: []inputInfo{
13473 {1, 49151},
13474 {0, 4295032831},
13475 },
13476 outputs: []outputInfo{
13477 {0, 49135},
13478 },
13479 },
13480 },
13481 {
13482 name: "MOVWloadidx2",
13483 auxType: auxSymOff,
13484 argLen: 3,
13485 symEffect: SymRead,
13486 asm: x86.AMOVWLZX,
13487 scale: 2,
13488 reg: regInfo{
13489 inputs: []inputInfo{
13490 {1, 49151},
13491 {0, 4295032831},
13492 },
13493 outputs: []outputInfo{
13494 {0, 49135},
13495 },
13496 },
13497 },
13498 {
13499 name: "MOVLloadidx1",
13500 auxType: auxSymOff,
13501 argLen: 3,
13502 commutative: true,
13503 symEffect: SymRead,
13504 asm: x86.AMOVL,
13505 scale: 1,
13506 reg: regInfo{
13507 inputs: []inputInfo{
13508 {1, 49151},
13509 {0, 4295032831},
13510 },
13511 outputs: []outputInfo{
13512 {0, 49135},
13513 },
13514 },
13515 },
13516 {
13517 name: "MOVLloadidx4",
13518 auxType: auxSymOff,
13519 argLen: 3,
13520 symEffect: SymRead,
13521 asm: x86.AMOVL,
13522 scale: 4,
13523 reg: regInfo{
13524 inputs: []inputInfo{
13525 {1, 49151},
13526 {0, 4295032831},
13527 },
13528 outputs: []outputInfo{
13529 {0, 49135},
13530 },
13531 },
13532 },
13533 {
13534 name: "MOVLloadidx8",
13535 auxType: auxSymOff,
13536 argLen: 3,
13537 symEffect: SymRead,
13538 asm: x86.AMOVL,
13539 scale: 8,
13540 reg: regInfo{
13541 inputs: []inputInfo{
13542 {1, 49151},
13543 {0, 4295032831},
13544 },
13545 outputs: []outputInfo{
13546 {0, 49135},
13547 },
13548 },
13549 },
13550 {
13551 name: "MOVQloadidx1",
13552 auxType: auxSymOff,
13553 argLen: 3,
13554 commutative: true,
13555 symEffect: SymRead,
13556 asm: x86.AMOVQ,
13557 scale: 1,
13558 reg: regInfo{
13559 inputs: []inputInfo{
13560 {1, 49151},
13561 {0, 4295032831},
13562 },
13563 outputs: []outputInfo{
13564 {0, 49135},
13565 },
13566 },
13567 },
13568 {
13569 name: "MOVQloadidx8",
13570 auxType: auxSymOff,
13571 argLen: 3,
13572 symEffect: SymRead,
13573 asm: x86.AMOVQ,
13574 scale: 8,
13575 reg: regInfo{
13576 inputs: []inputInfo{
13577 {1, 49151},
13578 {0, 4295032831},
13579 },
13580 outputs: []outputInfo{
13581 {0, 49135},
13582 },
13583 },
13584 },
13585 {
13586 name: "MOVBstoreidx1",
13587 auxType: auxSymOff,
13588 argLen: 4,
13589 commutative: true,
13590 symEffect: SymWrite,
13591 asm: x86.AMOVB,
13592 scale: 1,
13593 reg: regInfo{
13594 inputs: []inputInfo{
13595 {1, 49151},
13596 {2, 49151},
13597 {0, 4295032831},
13598 },
13599 },
13600 },
13601 {
13602 name: "MOVWstoreidx1",
13603 auxType: auxSymOff,
13604 argLen: 4,
13605 commutative: true,
13606 symEffect: SymWrite,
13607 asm: x86.AMOVW,
13608 scale: 1,
13609 reg: regInfo{
13610 inputs: []inputInfo{
13611 {1, 49151},
13612 {2, 49151},
13613 {0, 4295032831},
13614 },
13615 },
13616 },
13617 {
13618 name: "MOVWstoreidx2",
13619 auxType: auxSymOff,
13620 argLen: 4,
13621 symEffect: SymWrite,
13622 asm: x86.AMOVW,
13623 scale: 2,
13624 reg: regInfo{
13625 inputs: []inputInfo{
13626 {1, 49151},
13627 {2, 49151},
13628 {0, 4295032831},
13629 },
13630 },
13631 },
13632 {
13633 name: "MOVLstoreidx1",
13634 auxType: auxSymOff,
13635 argLen: 4,
13636 commutative: true,
13637 symEffect: SymWrite,
13638 asm: x86.AMOVL,
13639 scale: 1,
13640 reg: regInfo{
13641 inputs: []inputInfo{
13642 {1, 49151},
13643 {2, 49151},
13644 {0, 4295032831},
13645 },
13646 },
13647 },
13648 {
13649 name: "MOVLstoreidx4",
13650 auxType: auxSymOff,
13651 argLen: 4,
13652 symEffect: SymWrite,
13653 asm: x86.AMOVL,
13654 scale: 4,
13655 reg: regInfo{
13656 inputs: []inputInfo{
13657 {1, 49151},
13658 {2, 49151},
13659 {0, 4295032831},
13660 },
13661 },
13662 },
13663 {
13664 name: "MOVLstoreidx8",
13665 auxType: auxSymOff,
13666 argLen: 4,
13667 symEffect: SymWrite,
13668 asm: x86.AMOVL,
13669 scale: 8,
13670 reg: regInfo{
13671 inputs: []inputInfo{
13672 {1, 49151},
13673 {2, 49151},
13674 {0, 4295032831},
13675 },
13676 },
13677 },
13678 {
13679 name: "MOVQstoreidx1",
13680 auxType: auxSymOff,
13681 argLen: 4,
13682 commutative: true,
13683 symEffect: SymWrite,
13684 asm: x86.AMOVQ,
13685 scale: 1,
13686 reg: regInfo{
13687 inputs: []inputInfo{
13688 {1, 49151},
13689 {2, 49151},
13690 {0, 4295032831},
13691 },
13692 },
13693 },
13694 {
13695 name: "MOVQstoreidx8",
13696 auxType: auxSymOff,
13697 argLen: 4,
13698 symEffect: SymWrite,
13699 asm: x86.AMOVQ,
13700 scale: 8,
13701 reg: regInfo{
13702 inputs: []inputInfo{
13703 {1, 49151},
13704 {2, 49151},
13705 {0, 4295032831},
13706 },
13707 },
13708 },
13709 {
13710 name: "MOVBstoreconst",
13711 auxType: auxSymValAndOff,
13712 argLen: 2,
13713 faultOnNilArg0: true,
13714 symEffect: SymWrite,
13715 asm: x86.AMOVB,
13716 reg: regInfo{
13717 inputs: []inputInfo{
13718 {0, 4295032831},
13719 },
13720 },
13721 },
13722 {
13723 name: "MOVWstoreconst",
13724 auxType: auxSymValAndOff,
13725 argLen: 2,
13726 faultOnNilArg0: true,
13727 symEffect: SymWrite,
13728 asm: x86.AMOVW,
13729 reg: regInfo{
13730 inputs: []inputInfo{
13731 {0, 4295032831},
13732 },
13733 },
13734 },
13735 {
13736 name: "MOVLstoreconst",
13737 auxType: auxSymValAndOff,
13738 argLen: 2,
13739 faultOnNilArg0: true,
13740 symEffect: SymWrite,
13741 asm: x86.AMOVL,
13742 reg: regInfo{
13743 inputs: []inputInfo{
13744 {0, 4295032831},
13745 },
13746 },
13747 },
13748 {
13749 name: "MOVQstoreconst",
13750 auxType: auxSymValAndOff,
13751 argLen: 2,
13752 faultOnNilArg0: true,
13753 symEffect: SymWrite,
13754 asm: x86.AMOVQ,
13755 reg: regInfo{
13756 inputs: []inputInfo{
13757 {0, 4295032831},
13758 },
13759 },
13760 },
13761 {
13762 name: "MOVOstoreconst",
13763 auxType: auxSymValAndOff,
13764 argLen: 2,
13765 faultOnNilArg0: true,
13766 symEffect: SymWrite,
13767 asm: x86.AMOVUPS,
13768 reg: regInfo{
13769 inputs: []inputInfo{
13770 {0, 4295032831},
13771 },
13772 },
13773 },
13774 {
13775 name: "MOVBstoreconstidx1",
13776 auxType: auxSymValAndOff,
13777 argLen: 3,
13778 commutative: true,
13779 symEffect: SymWrite,
13780 asm: x86.AMOVB,
13781 scale: 1,
13782 reg: regInfo{
13783 inputs: []inputInfo{
13784 {1, 49151},
13785 {0, 4295032831},
13786 },
13787 },
13788 },
13789 {
13790 name: "MOVWstoreconstidx1",
13791 auxType: auxSymValAndOff,
13792 argLen: 3,
13793 commutative: true,
13794 symEffect: SymWrite,
13795 asm: x86.AMOVW,
13796 scale: 1,
13797 reg: regInfo{
13798 inputs: []inputInfo{
13799 {1, 49151},
13800 {0, 4295032831},
13801 },
13802 },
13803 },
13804 {
13805 name: "MOVWstoreconstidx2",
13806 auxType: auxSymValAndOff,
13807 argLen: 3,
13808 symEffect: SymWrite,
13809 asm: x86.AMOVW,
13810 scale: 2,
13811 reg: regInfo{
13812 inputs: []inputInfo{
13813 {1, 49151},
13814 {0, 4295032831},
13815 },
13816 },
13817 },
13818 {
13819 name: "MOVLstoreconstidx1",
13820 auxType: auxSymValAndOff,
13821 argLen: 3,
13822 commutative: true,
13823 symEffect: SymWrite,
13824 asm: x86.AMOVL,
13825 scale: 1,
13826 reg: regInfo{
13827 inputs: []inputInfo{
13828 {1, 49151},
13829 {0, 4295032831},
13830 },
13831 },
13832 },
13833 {
13834 name: "MOVLstoreconstidx4",
13835 auxType: auxSymValAndOff,
13836 argLen: 3,
13837 symEffect: SymWrite,
13838 asm: x86.AMOVL,
13839 scale: 4,
13840 reg: regInfo{
13841 inputs: []inputInfo{
13842 {1, 49151},
13843 {0, 4295032831},
13844 },
13845 },
13846 },
13847 {
13848 name: "MOVQstoreconstidx1",
13849 auxType: auxSymValAndOff,
13850 argLen: 3,
13851 commutative: true,
13852 symEffect: SymWrite,
13853 asm: x86.AMOVQ,
13854 scale: 1,
13855 reg: regInfo{
13856 inputs: []inputInfo{
13857 {1, 49151},
13858 {0, 4295032831},
13859 },
13860 },
13861 },
13862 {
13863 name: "MOVQstoreconstidx8",
13864 auxType: auxSymValAndOff,
13865 argLen: 3,
13866 symEffect: SymWrite,
13867 asm: x86.AMOVQ,
13868 scale: 8,
13869 reg: regInfo{
13870 inputs: []inputInfo{
13871 {1, 49151},
13872 {0, 4295032831},
13873 },
13874 },
13875 },
13876 {
13877 name: "DUFFZERO",
13878 auxType: auxInt64,
13879 argLen: 2,
13880 unsafePoint: true,
13881 reg: regInfo{
13882 inputs: []inputInfo{
13883 {0, 128},
13884 },
13885 clobbers: 128,
13886 },
13887 },
13888 {
13889 name: "REPSTOSQ",
13890 argLen: 4,
13891 faultOnNilArg0: true,
13892 reg: regInfo{
13893 inputs: []inputInfo{
13894 {0, 128},
13895 {1, 2},
13896 {2, 1},
13897 },
13898 clobbers: 130,
13899 },
13900 },
13901 {
13902 name: "CALLstatic",
13903 auxType: auxCallOff,
13904 argLen: -1,
13905 clobberFlags: true,
13906 call: true,
13907 reg: regInfo{
13908 clobbers: 2147483631,
13909 },
13910 },
13911 {
13912 name: "CALLtail",
13913 auxType: auxCallOff,
13914 argLen: -1,
13915 clobberFlags: true,
13916 call: true,
13917 tailCall: true,
13918 reg: regInfo{
13919 clobbers: 2147483631,
13920 },
13921 },
13922 {
13923 name: "CALLclosure",
13924 auxType: auxCallOff,
13925 argLen: -1,
13926 clobberFlags: true,
13927 call: true,
13928 reg: regInfo{
13929 inputs: []inputInfo{
13930 {1, 4},
13931 {0, 49151},
13932 },
13933 clobbers: 2147483631,
13934 },
13935 },
13936 {
13937 name: "CALLinter",
13938 auxType: auxCallOff,
13939 argLen: -1,
13940 clobberFlags: true,
13941 call: true,
13942 reg: regInfo{
13943 inputs: []inputInfo{
13944 {0, 49135},
13945 },
13946 clobbers: 2147483631,
13947 },
13948 },
13949 {
13950 name: "DUFFCOPY",
13951 auxType: auxInt64,
13952 argLen: 3,
13953 clobberFlags: true,
13954 unsafePoint: true,
13955 reg: regInfo{
13956 inputs: []inputInfo{
13957 {0, 128},
13958 {1, 64},
13959 },
13960 clobbers: 65728,
13961 },
13962 },
13963 {
13964 name: "REPMOVSQ",
13965 argLen: 4,
13966 faultOnNilArg0: true,
13967 faultOnNilArg1: true,
13968 reg: regInfo{
13969 inputs: []inputInfo{
13970 {0, 128},
13971 {1, 64},
13972 {2, 2},
13973 },
13974 clobbers: 194,
13975 },
13976 },
13977 {
13978 name: "InvertFlags",
13979 argLen: 1,
13980 reg: regInfo{},
13981 },
13982 {
13983 name: "LoweredGetG",
13984 argLen: 1,
13985 reg: regInfo{
13986 outputs: []outputInfo{
13987 {0, 49135},
13988 },
13989 },
13990 },
13991 {
13992 name: "LoweredGetClosurePtr",
13993 argLen: 0,
13994 zeroWidth: true,
13995 reg: regInfo{
13996 outputs: []outputInfo{
13997 {0, 4},
13998 },
13999 },
14000 },
14001 {
14002 name: "LoweredGetCallerPC",
14003 argLen: 0,
14004 rematerializeable: true,
14005 reg: regInfo{
14006 outputs: []outputInfo{
14007 {0, 49135},
14008 },
14009 },
14010 },
14011 {
14012 name: "LoweredGetCallerSP",
14013 argLen: 1,
14014 rematerializeable: true,
14015 reg: regInfo{
14016 outputs: []outputInfo{
14017 {0, 49135},
14018 },
14019 },
14020 },
14021 {
14022 name: "LoweredNilCheck",
14023 argLen: 2,
14024 clobberFlags: true,
14025 nilCheck: true,
14026 faultOnNilArg0: true,
14027 reg: regInfo{
14028 inputs: []inputInfo{
14029 {0, 49151},
14030 },
14031 },
14032 },
14033 {
14034 name: "LoweredWB",
14035 auxType: auxInt64,
14036 argLen: 1,
14037 clobberFlags: true,
14038 reg: regInfo{
14039 clobbers: 2147418112,
14040 outputs: []outputInfo{
14041 {0, 2048},
14042 },
14043 },
14044 },
14045 {
14046 name: "LoweredHasCPUFeature",
14047 auxType: auxSym,
14048 argLen: 0,
14049 rematerializeable: true,
14050 symEffect: SymNone,
14051 reg: regInfo{
14052 outputs: []outputInfo{
14053 {0, 49135},
14054 },
14055 },
14056 },
14057 {
14058 name: "LoweredPanicBoundsA",
14059 auxType: auxInt64,
14060 argLen: 3,
14061 call: true,
14062 reg: regInfo{
14063 inputs: []inputInfo{
14064 {0, 4},
14065 {1, 8},
14066 },
14067 },
14068 },
14069 {
14070 name: "LoweredPanicBoundsB",
14071 auxType: auxInt64,
14072 argLen: 3,
14073 call: true,
14074 reg: regInfo{
14075 inputs: []inputInfo{
14076 {0, 2},
14077 {1, 4},
14078 },
14079 },
14080 },
14081 {
14082 name: "LoweredPanicBoundsC",
14083 auxType: auxInt64,
14084 argLen: 3,
14085 call: true,
14086 reg: regInfo{
14087 inputs: []inputInfo{
14088 {0, 1},
14089 {1, 2},
14090 },
14091 },
14092 },
14093 {
14094 name: "FlagEQ",
14095 argLen: 0,
14096 reg: regInfo{},
14097 },
14098 {
14099 name: "FlagLT_ULT",
14100 argLen: 0,
14101 reg: regInfo{},
14102 },
14103 {
14104 name: "FlagLT_UGT",
14105 argLen: 0,
14106 reg: regInfo{},
14107 },
14108 {
14109 name: "FlagGT_UGT",
14110 argLen: 0,
14111 reg: regInfo{},
14112 },
14113 {
14114 name: "FlagGT_ULT",
14115 argLen: 0,
14116 reg: regInfo{},
14117 },
14118 {
14119 name: "MOVBatomicload",
14120 auxType: auxSymOff,
14121 argLen: 2,
14122 faultOnNilArg0: true,
14123 symEffect: SymRead,
14124 asm: x86.AMOVB,
14125 reg: regInfo{
14126 inputs: []inputInfo{
14127 {0, 4295032831},
14128 },
14129 outputs: []outputInfo{
14130 {0, 49135},
14131 },
14132 },
14133 },
14134 {
14135 name: "MOVLatomicload",
14136 auxType: auxSymOff,
14137 argLen: 2,
14138 faultOnNilArg0: true,
14139 symEffect: SymRead,
14140 asm: x86.AMOVL,
14141 reg: regInfo{
14142 inputs: []inputInfo{
14143 {0, 4295032831},
14144 },
14145 outputs: []outputInfo{
14146 {0, 49135},
14147 },
14148 },
14149 },
14150 {
14151 name: "MOVQatomicload",
14152 auxType: auxSymOff,
14153 argLen: 2,
14154 faultOnNilArg0: true,
14155 symEffect: SymRead,
14156 asm: x86.AMOVQ,
14157 reg: regInfo{
14158 inputs: []inputInfo{
14159 {0, 4295032831},
14160 },
14161 outputs: []outputInfo{
14162 {0, 49135},
14163 },
14164 },
14165 },
14166 {
14167 name: "XCHGB",
14168 auxType: auxSymOff,
14169 argLen: 3,
14170 resultInArg0: true,
14171 faultOnNilArg1: true,
14172 hasSideEffects: true,
14173 symEffect: SymRdWr,
14174 asm: x86.AXCHGB,
14175 reg: regInfo{
14176 inputs: []inputInfo{
14177 {0, 49135},
14178 {1, 4295032831},
14179 },
14180 outputs: []outputInfo{
14181 {0, 49135},
14182 },
14183 },
14184 },
14185 {
14186 name: "XCHGL",
14187 auxType: auxSymOff,
14188 argLen: 3,
14189 resultInArg0: true,
14190 faultOnNilArg1: true,
14191 hasSideEffects: true,
14192 symEffect: SymRdWr,
14193 asm: x86.AXCHGL,
14194 reg: regInfo{
14195 inputs: []inputInfo{
14196 {0, 49135},
14197 {1, 4295032831},
14198 },
14199 outputs: []outputInfo{
14200 {0, 49135},
14201 },
14202 },
14203 },
14204 {
14205 name: "XCHGQ",
14206 auxType: auxSymOff,
14207 argLen: 3,
14208 resultInArg0: true,
14209 faultOnNilArg1: true,
14210 hasSideEffects: true,
14211 symEffect: SymRdWr,
14212 asm: x86.AXCHGQ,
14213 reg: regInfo{
14214 inputs: []inputInfo{
14215 {0, 49135},
14216 {1, 4295032831},
14217 },
14218 outputs: []outputInfo{
14219 {0, 49135},
14220 },
14221 },
14222 },
14223 {
14224 name: "XADDLlock",
14225 auxType: auxSymOff,
14226 argLen: 3,
14227 resultInArg0: true,
14228 clobberFlags: true,
14229 faultOnNilArg1: true,
14230 hasSideEffects: true,
14231 symEffect: SymRdWr,
14232 asm: x86.AXADDL,
14233 reg: regInfo{
14234 inputs: []inputInfo{
14235 {0, 49135},
14236 {1, 4295032831},
14237 },
14238 outputs: []outputInfo{
14239 {0, 49135},
14240 },
14241 },
14242 },
14243 {
14244 name: "XADDQlock",
14245 auxType: auxSymOff,
14246 argLen: 3,
14247 resultInArg0: true,
14248 clobberFlags: true,
14249 faultOnNilArg1: true,
14250 hasSideEffects: true,
14251 symEffect: SymRdWr,
14252 asm: x86.AXADDQ,
14253 reg: regInfo{
14254 inputs: []inputInfo{
14255 {0, 49135},
14256 {1, 4295032831},
14257 },
14258 outputs: []outputInfo{
14259 {0, 49135},
14260 },
14261 },
14262 },
14263 {
14264 name: "AddTupleFirst32",
14265 argLen: 2,
14266 reg: regInfo{},
14267 },
14268 {
14269 name: "AddTupleFirst64",
14270 argLen: 2,
14271 reg: regInfo{},
14272 },
14273 {
14274 name: "CMPXCHGLlock",
14275 auxType: auxSymOff,
14276 argLen: 4,
14277 clobberFlags: true,
14278 faultOnNilArg0: true,
14279 hasSideEffects: true,
14280 symEffect: SymRdWr,
14281 asm: x86.ACMPXCHGL,
14282 reg: regInfo{
14283 inputs: []inputInfo{
14284 {1, 1},
14285 {0, 49135},
14286 {2, 49135},
14287 },
14288 clobbers: 1,
14289 outputs: []outputInfo{
14290 {1, 0},
14291 {0, 49135},
14292 },
14293 },
14294 },
14295 {
14296 name: "CMPXCHGQlock",
14297 auxType: auxSymOff,
14298 argLen: 4,
14299 clobberFlags: true,
14300 faultOnNilArg0: true,
14301 hasSideEffects: true,
14302 symEffect: SymRdWr,
14303 asm: x86.ACMPXCHGQ,
14304 reg: regInfo{
14305 inputs: []inputInfo{
14306 {1, 1},
14307 {0, 49135},
14308 {2, 49135},
14309 },
14310 clobbers: 1,
14311 outputs: []outputInfo{
14312 {1, 0},
14313 {0, 49135},
14314 },
14315 },
14316 },
14317 {
14318 name: "ANDBlock",
14319 auxType: auxSymOff,
14320 argLen: 3,
14321 clobberFlags: true,
14322 faultOnNilArg0: true,
14323 hasSideEffects: true,
14324 symEffect: SymRdWr,
14325 asm: x86.AANDB,
14326 reg: regInfo{
14327 inputs: []inputInfo{
14328 {1, 49151},
14329 {0, 4295032831},
14330 },
14331 },
14332 },
14333 {
14334 name: "ANDLlock",
14335 auxType: auxSymOff,
14336 argLen: 3,
14337 clobberFlags: true,
14338 faultOnNilArg0: true,
14339 hasSideEffects: true,
14340 symEffect: SymRdWr,
14341 asm: x86.AANDL,
14342 reg: regInfo{
14343 inputs: []inputInfo{
14344 {1, 49151},
14345 {0, 4295032831},
14346 },
14347 },
14348 },
14349 {
14350 name: "ANDQlock",
14351 auxType: auxSymOff,
14352 argLen: 3,
14353 clobberFlags: true,
14354 faultOnNilArg0: true,
14355 hasSideEffects: true,
14356 symEffect: SymRdWr,
14357 asm: x86.AANDQ,
14358 reg: regInfo{
14359 inputs: []inputInfo{
14360 {1, 49151},
14361 {0, 4295032831},
14362 },
14363 },
14364 },
14365 {
14366 name: "ORBlock",
14367 auxType: auxSymOff,
14368 argLen: 3,
14369 clobberFlags: true,
14370 faultOnNilArg0: true,
14371 hasSideEffects: true,
14372 symEffect: SymRdWr,
14373 asm: x86.AORB,
14374 reg: regInfo{
14375 inputs: []inputInfo{
14376 {1, 49151},
14377 {0, 4295032831},
14378 },
14379 },
14380 },
14381 {
14382 name: "ORLlock",
14383 auxType: auxSymOff,
14384 argLen: 3,
14385 clobberFlags: true,
14386 faultOnNilArg0: true,
14387 hasSideEffects: true,
14388 symEffect: SymRdWr,
14389 asm: x86.AORL,
14390 reg: regInfo{
14391 inputs: []inputInfo{
14392 {1, 49151},
14393 {0, 4295032831},
14394 },
14395 },
14396 },
14397 {
14398 name: "ORQlock",
14399 auxType: auxSymOff,
14400 argLen: 3,
14401 clobberFlags: true,
14402 faultOnNilArg0: true,
14403 hasSideEffects: true,
14404 symEffect: SymRdWr,
14405 asm: x86.AORQ,
14406 reg: regInfo{
14407 inputs: []inputInfo{
14408 {1, 49151},
14409 {0, 4295032831},
14410 },
14411 },
14412 },
14413 {
14414 name: "LoweredAtomicAnd64",
14415 auxType: auxSymOff,
14416 argLen: 3,
14417 resultNotInArgs: true,
14418 clobberFlags: true,
14419 needIntTemp: true,
14420 faultOnNilArg0: true,
14421 hasSideEffects: true,
14422 unsafePoint: true,
14423 symEffect: SymRdWr,
14424 asm: x86.AANDQ,
14425 reg: regInfo{
14426 inputs: []inputInfo{
14427 {0, 49134},
14428 {1, 49134},
14429 },
14430 outputs: []outputInfo{
14431 {1, 0},
14432 {0, 1},
14433 },
14434 },
14435 },
14436 {
14437 name: "LoweredAtomicAnd32",
14438 auxType: auxSymOff,
14439 argLen: 3,
14440 resultNotInArgs: true,
14441 clobberFlags: true,
14442 needIntTemp: true,
14443 faultOnNilArg0: true,
14444 hasSideEffects: true,
14445 unsafePoint: true,
14446 symEffect: SymRdWr,
14447 asm: x86.AANDL,
14448 reg: regInfo{
14449 inputs: []inputInfo{
14450 {0, 49134},
14451 {1, 49134},
14452 },
14453 outputs: []outputInfo{
14454 {1, 0},
14455 {0, 1},
14456 },
14457 },
14458 },
14459 {
14460 name: "LoweredAtomicOr64",
14461 auxType: auxSymOff,
14462 argLen: 3,
14463 resultNotInArgs: true,
14464 clobberFlags: true,
14465 needIntTemp: true,
14466 faultOnNilArg0: true,
14467 hasSideEffects: true,
14468 unsafePoint: true,
14469 symEffect: SymRdWr,
14470 asm: x86.AORQ,
14471 reg: regInfo{
14472 inputs: []inputInfo{
14473 {0, 49134},
14474 {1, 49134},
14475 },
14476 outputs: []outputInfo{
14477 {1, 0},
14478 {0, 1},
14479 },
14480 },
14481 },
14482 {
14483 name: "LoweredAtomicOr32",
14484 auxType: auxSymOff,
14485 argLen: 3,
14486 resultNotInArgs: true,
14487 clobberFlags: true,
14488 needIntTemp: true,
14489 faultOnNilArg0: true,
14490 hasSideEffects: true,
14491 unsafePoint: true,
14492 symEffect: SymRdWr,
14493 asm: x86.AORL,
14494 reg: regInfo{
14495 inputs: []inputInfo{
14496 {0, 49134},
14497 {1, 49134},
14498 },
14499 outputs: []outputInfo{
14500 {1, 0},
14501 {0, 1},
14502 },
14503 },
14504 },
14505 {
14506 name: "PrefetchT0",
14507 argLen: 2,
14508 hasSideEffects: true,
14509 asm: x86.APREFETCHT0,
14510 reg: regInfo{
14511 inputs: []inputInfo{
14512 {0, 4295032831},
14513 },
14514 },
14515 },
14516 {
14517 name: "PrefetchNTA",
14518 argLen: 2,
14519 hasSideEffects: true,
14520 asm: x86.APREFETCHNTA,
14521 reg: regInfo{
14522 inputs: []inputInfo{
14523 {0, 4295032831},
14524 },
14525 },
14526 },
14527 {
14528 name: "ANDNQ",
14529 argLen: 2,
14530 clobberFlags: true,
14531 asm: x86.AANDNQ,
14532 reg: regInfo{
14533 inputs: []inputInfo{
14534 {0, 49135},
14535 {1, 49135},
14536 },
14537 outputs: []outputInfo{
14538 {0, 49135},
14539 },
14540 },
14541 },
14542 {
14543 name: "ANDNL",
14544 argLen: 2,
14545 clobberFlags: true,
14546 asm: x86.AANDNL,
14547 reg: regInfo{
14548 inputs: []inputInfo{
14549 {0, 49135},
14550 {1, 49135},
14551 },
14552 outputs: []outputInfo{
14553 {0, 49135},
14554 },
14555 },
14556 },
14557 {
14558 name: "BLSIQ",
14559 argLen: 1,
14560 clobberFlags: true,
14561 asm: x86.ABLSIQ,
14562 reg: regInfo{
14563 inputs: []inputInfo{
14564 {0, 49135},
14565 },
14566 outputs: []outputInfo{
14567 {0, 49135},
14568 },
14569 },
14570 },
14571 {
14572 name: "BLSIL",
14573 argLen: 1,
14574 clobberFlags: true,
14575 asm: x86.ABLSIL,
14576 reg: regInfo{
14577 inputs: []inputInfo{
14578 {0, 49135},
14579 },
14580 outputs: []outputInfo{
14581 {0, 49135},
14582 },
14583 },
14584 },
14585 {
14586 name: "BLSMSKQ",
14587 argLen: 1,
14588 clobberFlags: true,
14589 asm: x86.ABLSMSKQ,
14590 reg: regInfo{
14591 inputs: []inputInfo{
14592 {0, 49135},
14593 },
14594 outputs: []outputInfo{
14595 {0, 49135},
14596 },
14597 },
14598 },
14599 {
14600 name: "BLSMSKL",
14601 argLen: 1,
14602 clobberFlags: true,
14603 asm: x86.ABLSMSKL,
14604 reg: regInfo{
14605 inputs: []inputInfo{
14606 {0, 49135},
14607 },
14608 outputs: []outputInfo{
14609 {0, 49135},
14610 },
14611 },
14612 },
14613 {
14614 name: "BLSRQ",
14615 argLen: 1,
14616 asm: x86.ABLSRQ,
14617 reg: regInfo{
14618 inputs: []inputInfo{
14619 {0, 49135},
14620 },
14621 outputs: []outputInfo{
14622 {1, 0},
14623 {0, 49135},
14624 },
14625 },
14626 },
14627 {
14628 name: "BLSRL",
14629 argLen: 1,
14630 asm: x86.ABLSRL,
14631 reg: regInfo{
14632 inputs: []inputInfo{
14633 {0, 49135},
14634 },
14635 outputs: []outputInfo{
14636 {1, 0},
14637 {0, 49135},
14638 },
14639 },
14640 },
14641 {
14642 name: "TZCNTQ",
14643 argLen: 1,
14644 clobberFlags: true,
14645 asm: x86.ATZCNTQ,
14646 reg: regInfo{
14647 inputs: []inputInfo{
14648 {0, 49135},
14649 },
14650 outputs: []outputInfo{
14651 {0, 49135},
14652 },
14653 },
14654 },
14655 {
14656 name: "TZCNTL",
14657 argLen: 1,
14658 clobberFlags: true,
14659 asm: x86.ATZCNTL,
14660 reg: regInfo{
14661 inputs: []inputInfo{
14662 {0, 49135},
14663 },
14664 outputs: []outputInfo{
14665 {0, 49135},
14666 },
14667 },
14668 },
14669 {
14670 name: "LZCNTQ",
14671 argLen: 1,
14672 clobberFlags: true,
14673 asm: x86.ALZCNTQ,
14674 reg: regInfo{
14675 inputs: []inputInfo{
14676 {0, 49135},
14677 },
14678 outputs: []outputInfo{
14679 {0, 49135},
14680 },
14681 },
14682 },
14683 {
14684 name: "LZCNTL",
14685 argLen: 1,
14686 clobberFlags: true,
14687 asm: x86.ALZCNTL,
14688 reg: regInfo{
14689 inputs: []inputInfo{
14690 {0, 49135},
14691 },
14692 outputs: []outputInfo{
14693 {0, 49135},
14694 },
14695 },
14696 },
14697 {
14698 name: "MOVBEWstore",
14699 auxType: auxSymOff,
14700 argLen: 3,
14701 faultOnNilArg0: true,
14702 symEffect: SymWrite,
14703 asm: x86.AMOVBEW,
14704 reg: regInfo{
14705 inputs: []inputInfo{
14706 {1, 49151},
14707 {0, 4295032831},
14708 },
14709 },
14710 },
14711 {
14712 name: "MOVBELload",
14713 auxType: auxSymOff,
14714 argLen: 2,
14715 faultOnNilArg0: true,
14716 symEffect: SymRead,
14717 asm: x86.AMOVBEL,
14718 reg: regInfo{
14719 inputs: []inputInfo{
14720 {0, 4295032831},
14721 },
14722 outputs: []outputInfo{
14723 {0, 49135},
14724 },
14725 },
14726 },
14727 {
14728 name: "MOVBELstore",
14729 auxType: auxSymOff,
14730 argLen: 3,
14731 faultOnNilArg0: true,
14732 symEffect: SymWrite,
14733 asm: x86.AMOVBEL,
14734 reg: regInfo{
14735 inputs: []inputInfo{
14736 {1, 49151},
14737 {0, 4295032831},
14738 },
14739 },
14740 },
14741 {
14742 name: "MOVBEQload",
14743 auxType: auxSymOff,
14744 argLen: 2,
14745 faultOnNilArg0: true,
14746 symEffect: SymRead,
14747 asm: x86.AMOVBEQ,
14748 reg: regInfo{
14749 inputs: []inputInfo{
14750 {0, 4295032831},
14751 },
14752 outputs: []outputInfo{
14753 {0, 49135},
14754 },
14755 },
14756 },
14757 {
14758 name: "MOVBEQstore",
14759 auxType: auxSymOff,
14760 argLen: 3,
14761 faultOnNilArg0: true,
14762 symEffect: SymWrite,
14763 asm: x86.AMOVBEQ,
14764 reg: regInfo{
14765 inputs: []inputInfo{
14766 {1, 49151},
14767 {0, 4295032831},
14768 },
14769 },
14770 },
14771 {
14772 name: "MOVBELloadidx1",
14773 auxType: auxSymOff,
14774 argLen: 3,
14775 commutative: true,
14776 symEffect: SymRead,
14777 asm: x86.AMOVBEL,
14778 scale: 1,
14779 reg: regInfo{
14780 inputs: []inputInfo{
14781 {1, 49151},
14782 {0, 4295032831},
14783 },
14784 outputs: []outputInfo{
14785 {0, 49135},
14786 },
14787 },
14788 },
14789 {
14790 name: "MOVBELloadidx4",
14791 auxType: auxSymOff,
14792 argLen: 3,
14793 symEffect: SymRead,
14794 asm: x86.AMOVBEL,
14795 scale: 4,
14796 reg: regInfo{
14797 inputs: []inputInfo{
14798 {1, 49151},
14799 {0, 4295032831},
14800 },
14801 outputs: []outputInfo{
14802 {0, 49135},
14803 },
14804 },
14805 },
14806 {
14807 name: "MOVBELloadidx8",
14808 auxType: auxSymOff,
14809 argLen: 3,
14810 symEffect: SymRead,
14811 asm: x86.AMOVBEL,
14812 scale: 8,
14813 reg: regInfo{
14814 inputs: []inputInfo{
14815 {1, 49151},
14816 {0, 4295032831},
14817 },
14818 outputs: []outputInfo{
14819 {0, 49135},
14820 },
14821 },
14822 },
14823 {
14824 name: "MOVBEQloadidx1",
14825 auxType: auxSymOff,
14826 argLen: 3,
14827 commutative: true,
14828 symEffect: SymRead,
14829 asm: x86.AMOVBEQ,
14830 scale: 1,
14831 reg: regInfo{
14832 inputs: []inputInfo{
14833 {1, 49151},
14834 {0, 4295032831},
14835 },
14836 outputs: []outputInfo{
14837 {0, 49135},
14838 },
14839 },
14840 },
14841 {
14842 name: "MOVBEQloadidx8",
14843 auxType: auxSymOff,
14844 argLen: 3,
14845 symEffect: SymRead,
14846 asm: x86.AMOVBEQ,
14847 scale: 8,
14848 reg: regInfo{
14849 inputs: []inputInfo{
14850 {1, 49151},
14851 {0, 4295032831},
14852 },
14853 outputs: []outputInfo{
14854 {0, 49135},
14855 },
14856 },
14857 },
14858 {
14859 name: "MOVBEWstoreidx1",
14860 auxType: auxSymOff,
14861 argLen: 4,
14862 commutative: true,
14863 symEffect: SymWrite,
14864 asm: x86.AMOVBEW,
14865 scale: 1,
14866 reg: regInfo{
14867 inputs: []inputInfo{
14868 {1, 49151},
14869 {2, 49151},
14870 {0, 4295032831},
14871 },
14872 },
14873 },
14874 {
14875 name: "MOVBEWstoreidx2",
14876 auxType: auxSymOff,
14877 argLen: 4,
14878 symEffect: SymWrite,
14879 asm: x86.AMOVBEW,
14880 scale: 2,
14881 reg: regInfo{
14882 inputs: []inputInfo{
14883 {1, 49151},
14884 {2, 49151},
14885 {0, 4295032831},
14886 },
14887 },
14888 },
14889 {
14890 name: "MOVBELstoreidx1",
14891 auxType: auxSymOff,
14892 argLen: 4,
14893 commutative: true,
14894 symEffect: SymWrite,
14895 asm: x86.AMOVBEL,
14896 scale: 1,
14897 reg: regInfo{
14898 inputs: []inputInfo{
14899 {1, 49151},
14900 {2, 49151},
14901 {0, 4295032831},
14902 },
14903 },
14904 },
14905 {
14906 name: "MOVBELstoreidx4",
14907 auxType: auxSymOff,
14908 argLen: 4,
14909 symEffect: SymWrite,
14910 asm: x86.AMOVBEL,
14911 scale: 4,
14912 reg: regInfo{
14913 inputs: []inputInfo{
14914 {1, 49151},
14915 {2, 49151},
14916 {0, 4295032831},
14917 },
14918 },
14919 },
14920 {
14921 name: "MOVBELstoreidx8",
14922 auxType: auxSymOff,
14923 argLen: 4,
14924 symEffect: SymWrite,
14925 asm: x86.AMOVBEL,
14926 scale: 8,
14927 reg: regInfo{
14928 inputs: []inputInfo{
14929 {1, 49151},
14930 {2, 49151},
14931 {0, 4295032831},
14932 },
14933 },
14934 },
14935 {
14936 name: "MOVBEQstoreidx1",
14937 auxType: auxSymOff,
14938 argLen: 4,
14939 commutative: true,
14940 symEffect: SymWrite,
14941 asm: x86.AMOVBEQ,
14942 scale: 1,
14943 reg: regInfo{
14944 inputs: []inputInfo{
14945 {1, 49151},
14946 {2, 49151},
14947 {0, 4295032831},
14948 },
14949 },
14950 },
14951 {
14952 name: "MOVBEQstoreidx8",
14953 auxType: auxSymOff,
14954 argLen: 4,
14955 symEffect: SymWrite,
14956 asm: x86.AMOVBEQ,
14957 scale: 8,
14958 reg: regInfo{
14959 inputs: []inputInfo{
14960 {1, 49151},
14961 {2, 49151},
14962 {0, 4295032831},
14963 },
14964 },
14965 },
14966 {
14967 name: "SARXQ",
14968 argLen: 2,
14969 asm: x86.ASARXQ,
14970 reg: regInfo{
14971 inputs: []inputInfo{
14972 {0, 49135},
14973 {1, 49135},
14974 },
14975 outputs: []outputInfo{
14976 {0, 49135},
14977 },
14978 },
14979 },
14980 {
14981 name: "SARXL",
14982 argLen: 2,
14983 asm: x86.ASARXL,
14984 reg: regInfo{
14985 inputs: []inputInfo{
14986 {0, 49135},
14987 {1, 49135},
14988 },
14989 outputs: []outputInfo{
14990 {0, 49135},
14991 },
14992 },
14993 },
14994 {
14995 name: "SHLXQ",
14996 argLen: 2,
14997 asm: x86.ASHLXQ,
14998 reg: regInfo{
14999 inputs: []inputInfo{
15000 {0, 49135},
15001 {1, 49135},
15002 },
15003 outputs: []outputInfo{
15004 {0, 49135},
15005 },
15006 },
15007 },
15008 {
15009 name: "SHLXL",
15010 argLen: 2,
15011 asm: x86.ASHLXL,
15012 reg: regInfo{
15013 inputs: []inputInfo{
15014 {0, 49135},
15015 {1, 49135},
15016 },
15017 outputs: []outputInfo{
15018 {0, 49135},
15019 },
15020 },
15021 },
15022 {
15023 name: "SHRXQ",
15024 argLen: 2,
15025 asm: x86.ASHRXQ,
15026 reg: regInfo{
15027 inputs: []inputInfo{
15028 {0, 49135},
15029 {1, 49135},
15030 },
15031 outputs: []outputInfo{
15032 {0, 49135},
15033 },
15034 },
15035 },
15036 {
15037 name: "SHRXL",
15038 argLen: 2,
15039 asm: x86.ASHRXL,
15040 reg: regInfo{
15041 inputs: []inputInfo{
15042 {0, 49135},
15043 {1, 49135},
15044 },
15045 outputs: []outputInfo{
15046 {0, 49135},
15047 },
15048 },
15049 },
15050 {
15051 name: "SARXLload",
15052 auxType: auxSymOff,
15053 argLen: 3,
15054 faultOnNilArg0: true,
15055 symEffect: SymRead,
15056 asm: x86.ASARXL,
15057 reg: regInfo{
15058 inputs: []inputInfo{
15059 {1, 49135},
15060 {0, 4295032831},
15061 },
15062 outputs: []outputInfo{
15063 {0, 49135},
15064 },
15065 },
15066 },
15067 {
15068 name: "SARXQload",
15069 auxType: auxSymOff,
15070 argLen: 3,
15071 faultOnNilArg0: true,
15072 symEffect: SymRead,
15073 asm: x86.ASARXQ,
15074 reg: regInfo{
15075 inputs: []inputInfo{
15076 {1, 49135},
15077 {0, 4295032831},
15078 },
15079 outputs: []outputInfo{
15080 {0, 49135},
15081 },
15082 },
15083 },
15084 {
15085 name: "SHLXLload",
15086 auxType: auxSymOff,
15087 argLen: 3,
15088 faultOnNilArg0: true,
15089 symEffect: SymRead,
15090 asm: x86.ASHLXL,
15091 reg: regInfo{
15092 inputs: []inputInfo{
15093 {1, 49135},
15094 {0, 4295032831},
15095 },
15096 outputs: []outputInfo{
15097 {0, 49135},
15098 },
15099 },
15100 },
15101 {
15102 name: "SHLXQload",
15103 auxType: auxSymOff,
15104 argLen: 3,
15105 faultOnNilArg0: true,
15106 symEffect: SymRead,
15107 asm: x86.ASHLXQ,
15108 reg: regInfo{
15109 inputs: []inputInfo{
15110 {1, 49135},
15111 {0, 4295032831},
15112 },
15113 outputs: []outputInfo{
15114 {0, 49135},
15115 },
15116 },
15117 },
15118 {
15119 name: "SHRXLload",
15120 auxType: auxSymOff,
15121 argLen: 3,
15122 faultOnNilArg0: true,
15123 symEffect: SymRead,
15124 asm: x86.ASHRXL,
15125 reg: regInfo{
15126 inputs: []inputInfo{
15127 {1, 49135},
15128 {0, 4295032831},
15129 },
15130 outputs: []outputInfo{
15131 {0, 49135},
15132 },
15133 },
15134 },
15135 {
15136 name: "SHRXQload",
15137 auxType: auxSymOff,
15138 argLen: 3,
15139 faultOnNilArg0: true,
15140 symEffect: SymRead,
15141 asm: x86.ASHRXQ,
15142 reg: regInfo{
15143 inputs: []inputInfo{
15144 {1, 49135},
15145 {0, 4295032831},
15146 },
15147 outputs: []outputInfo{
15148 {0, 49135},
15149 },
15150 },
15151 },
15152 {
15153 name: "SARXLloadidx1",
15154 auxType: auxSymOff,
15155 argLen: 4,
15156 faultOnNilArg0: true,
15157 symEffect: SymRead,
15158 asm: x86.ASARXL,
15159 scale: 1,
15160 reg: regInfo{
15161 inputs: []inputInfo{
15162 {2, 49135},
15163 {1, 49151},
15164 {0, 4295032831},
15165 },
15166 outputs: []outputInfo{
15167 {0, 49135},
15168 },
15169 },
15170 },
15171 {
15172 name: "SARXLloadidx4",
15173 auxType: auxSymOff,
15174 argLen: 4,
15175 faultOnNilArg0: true,
15176 symEffect: SymRead,
15177 asm: x86.ASARXL,
15178 scale: 4,
15179 reg: regInfo{
15180 inputs: []inputInfo{
15181 {2, 49135},
15182 {1, 49151},
15183 {0, 4295032831},
15184 },
15185 outputs: []outputInfo{
15186 {0, 49135},
15187 },
15188 },
15189 },
15190 {
15191 name: "SARXLloadidx8",
15192 auxType: auxSymOff,
15193 argLen: 4,
15194 faultOnNilArg0: true,
15195 symEffect: SymRead,
15196 asm: x86.ASARXL,
15197 scale: 8,
15198 reg: regInfo{
15199 inputs: []inputInfo{
15200 {2, 49135},
15201 {1, 49151},
15202 {0, 4295032831},
15203 },
15204 outputs: []outputInfo{
15205 {0, 49135},
15206 },
15207 },
15208 },
15209 {
15210 name: "SARXQloadidx1",
15211 auxType: auxSymOff,
15212 argLen: 4,
15213 faultOnNilArg0: true,
15214 symEffect: SymRead,
15215 asm: x86.ASARXQ,
15216 scale: 1,
15217 reg: regInfo{
15218 inputs: []inputInfo{
15219 {2, 49135},
15220 {1, 49151},
15221 {0, 4295032831},
15222 },
15223 outputs: []outputInfo{
15224 {0, 49135},
15225 },
15226 },
15227 },
15228 {
15229 name: "SARXQloadidx8",
15230 auxType: auxSymOff,
15231 argLen: 4,
15232 faultOnNilArg0: true,
15233 symEffect: SymRead,
15234 asm: x86.ASARXQ,
15235 scale: 8,
15236 reg: regInfo{
15237 inputs: []inputInfo{
15238 {2, 49135},
15239 {1, 49151},
15240 {0, 4295032831},
15241 },
15242 outputs: []outputInfo{
15243 {0, 49135},
15244 },
15245 },
15246 },
15247 {
15248 name: "SHLXLloadidx1",
15249 auxType: auxSymOff,
15250 argLen: 4,
15251 faultOnNilArg0: true,
15252 symEffect: SymRead,
15253 asm: x86.ASHLXL,
15254 scale: 1,
15255 reg: regInfo{
15256 inputs: []inputInfo{
15257 {2, 49135},
15258 {1, 49151},
15259 {0, 4295032831},
15260 },
15261 outputs: []outputInfo{
15262 {0, 49135},
15263 },
15264 },
15265 },
15266 {
15267 name: "SHLXLloadidx4",
15268 auxType: auxSymOff,
15269 argLen: 4,
15270 faultOnNilArg0: true,
15271 symEffect: SymRead,
15272 asm: x86.ASHLXL,
15273 scale: 4,
15274 reg: regInfo{
15275 inputs: []inputInfo{
15276 {2, 49135},
15277 {1, 49151},
15278 {0, 4295032831},
15279 },
15280 outputs: []outputInfo{
15281 {0, 49135},
15282 },
15283 },
15284 },
15285 {
15286 name: "SHLXLloadidx8",
15287 auxType: auxSymOff,
15288 argLen: 4,
15289 faultOnNilArg0: true,
15290 symEffect: SymRead,
15291 asm: x86.ASHLXL,
15292 scale: 8,
15293 reg: regInfo{
15294 inputs: []inputInfo{
15295 {2, 49135},
15296 {1, 49151},
15297 {0, 4295032831},
15298 },
15299 outputs: []outputInfo{
15300 {0, 49135},
15301 },
15302 },
15303 },
15304 {
15305 name: "SHLXQloadidx1",
15306 auxType: auxSymOff,
15307 argLen: 4,
15308 faultOnNilArg0: true,
15309 symEffect: SymRead,
15310 asm: x86.ASHLXQ,
15311 scale: 1,
15312 reg: regInfo{
15313 inputs: []inputInfo{
15314 {2, 49135},
15315 {1, 49151},
15316 {0, 4295032831},
15317 },
15318 outputs: []outputInfo{
15319 {0, 49135},
15320 },
15321 },
15322 },
15323 {
15324 name: "SHLXQloadidx8",
15325 auxType: auxSymOff,
15326 argLen: 4,
15327 faultOnNilArg0: true,
15328 symEffect: SymRead,
15329 asm: x86.ASHLXQ,
15330 scale: 8,
15331 reg: regInfo{
15332 inputs: []inputInfo{
15333 {2, 49135},
15334 {1, 49151},
15335 {0, 4295032831},
15336 },
15337 outputs: []outputInfo{
15338 {0, 49135},
15339 },
15340 },
15341 },
15342 {
15343 name: "SHRXLloadidx1",
15344 auxType: auxSymOff,
15345 argLen: 4,
15346 faultOnNilArg0: true,
15347 symEffect: SymRead,
15348 asm: x86.ASHRXL,
15349 scale: 1,
15350 reg: regInfo{
15351 inputs: []inputInfo{
15352 {2, 49135},
15353 {1, 49151},
15354 {0, 4295032831},
15355 },
15356 outputs: []outputInfo{
15357 {0, 49135},
15358 },
15359 },
15360 },
15361 {
15362 name: "SHRXLloadidx4",
15363 auxType: auxSymOff,
15364 argLen: 4,
15365 faultOnNilArg0: true,
15366 symEffect: SymRead,
15367 asm: x86.ASHRXL,
15368 scale: 4,
15369 reg: regInfo{
15370 inputs: []inputInfo{
15371 {2, 49135},
15372 {1, 49151},
15373 {0, 4295032831},
15374 },
15375 outputs: []outputInfo{
15376 {0, 49135},
15377 },
15378 },
15379 },
15380 {
15381 name: "SHRXLloadidx8",
15382 auxType: auxSymOff,
15383 argLen: 4,
15384 faultOnNilArg0: true,
15385 symEffect: SymRead,
15386 asm: x86.ASHRXL,
15387 scale: 8,
15388 reg: regInfo{
15389 inputs: []inputInfo{
15390 {2, 49135},
15391 {1, 49151},
15392 {0, 4295032831},
15393 },
15394 outputs: []outputInfo{
15395 {0, 49135},
15396 },
15397 },
15398 },
15399 {
15400 name: "SHRXQloadidx1",
15401 auxType: auxSymOff,
15402 argLen: 4,
15403 faultOnNilArg0: true,
15404 symEffect: SymRead,
15405 asm: x86.ASHRXQ,
15406 scale: 1,
15407 reg: regInfo{
15408 inputs: []inputInfo{
15409 {2, 49135},
15410 {1, 49151},
15411 {0, 4295032831},
15412 },
15413 outputs: []outputInfo{
15414 {0, 49135},
15415 },
15416 },
15417 },
15418 {
15419 name: "SHRXQloadidx8",
15420 auxType: auxSymOff,
15421 argLen: 4,
15422 faultOnNilArg0: true,
15423 symEffect: SymRead,
15424 asm: x86.ASHRXQ,
15425 scale: 8,
15426 reg: regInfo{
15427 inputs: []inputInfo{
15428 {2, 49135},
15429 {1, 49151},
15430 {0, 4295032831},
15431 },
15432 outputs: []outputInfo{
15433 {0, 49135},
15434 },
15435 },
15436 },
15437 {
15438 name: "PUNPCKLBW",
15439 argLen: 2,
15440 resultInArg0: true,
15441 asm: x86.APUNPCKLBW,
15442 reg: regInfo{
15443 inputs: []inputInfo{
15444 {0, 2147418112},
15445 {1, 2147418112},
15446 },
15447 outputs: []outputInfo{
15448 {0, 2147418112},
15449 },
15450 },
15451 },
15452 {
15453 name: "PSHUFLW",
15454 auxType: auxInt8,
15455 argLen: 1,
15456 asm: x86.APSHUFLW,
15457 reg: regInfo{
15458 inputs: []inputInfo{
15459 {0, 2147418112},
15460 },
15461 outputs: []outputInfo{
15462 {0, 2147418112},
15463 },
15464 },
15465 },
15466 {
15467 name: "PSHUFBbroadcast",
15468 argLen: 1,
15469 resultInArg0: true,
15470 asm: x86.APSHUFB,
15471 reg: regInfo{
15472 inputs: []inputInfo{
15473 {0, 2147418112},
15474 },
15475 outputs: []outputInfo{
15476 {0, 2147418112},
15477 },
15478 },
15479 },
15480 {
15481 name: "VPBROADCASTB",
15482 argLen: 1,
15483 asm: x86.AVPBROADCASTB,
15484 reg: regInfo{
15485 inputs: []inputInfo{
15486 {0, 49135},
15487 },
15488 outputs: []outputInfo{
15489 {0, 2147418112},
15490 },
15491 },
15492 },
15493 {
15494 name: "PSIGNB",
15495 argLen: 2,
15496 resultInArg0: true,
15497 asm: x86.APSIGNB,
15498 reg: regInfo{
15499 inputs: []inputInfo{
15500 {0, 2147418112},
15501 {1, 2147418112},
15502 },
15503 outputs: []outputInfo{
15504 {0, 2147418112},
15505 },
15506 },
15507 },
15508 {
15509 name: "PCMPEQB",
15510 argLen: 2,
15511 commutative: true,
15512 resultInArg0: true,
15513 asm: x86.APCMPEQB,
15514 reg: regInfo{
15515 inputs: []inputInfo{
15516 {0, 2147418112},
15517 {1, 2147418112},
15518 },
15519 outputs: []outputInfo{
15520 {0, 2147418112},
15521 },
15522 },
15523 },
15524 {
15525 name: "PMOVMSKB",
15526 argLen: 1,
15527 asm: x86.APMOVMSKB,
15528 reg: regInfo{
15529 inputs: []inputInfo{
15530 {0, 2147418112},
15531 },
15532 outputs: []outputInfo{
15533 {0, 49135},
15534 },
15535 },
15536 },
15537
15538 {
15539 name: "ADD",
15540 argLen: 2,
15541 commutative: true,
15542 asm: arm.AADD,
15543 reg: regInfo{
15544 inputs: []inputInfo{
15545 {0, 22527},
15546 {1, 22527},
15547 },
15548 outputs: []outputInfo{
15549 {0, 21503},
15550 },
15551 },
15552 },
15553 {
15554 name: "ADDconst",
15555 auxType: auxInt32,
15556 argLen: 1,
15557 asm: arm.AADD,
15558 reg: regInfo{
15559 inputs: []inputInfo{
15560 {0, 30719},
15561 },
15562 outputs: []outputInfo{
15563 {0, 21503},
15564 },
15565 },
15566 },
15567 {
15568 name: "SUB",
15569 argLen: 2,
15570 asm: arm.ASUB,
15571 reg: regInfo{
15572 inputs: []inputInfo{
15573 {0, 22527},
15574 {1, 22527},
15575 },
15576 outputs: []outputInfo{
15577 {0, 21503},
15578 },
15579 },
15580 },
15581 {
15582 name: "SUBconst",
15583 auxType: auxInt32,
15584 argLen: 1,
15585 asm: arm.ASUB,
15586 reg: regInfo{
15587 inputs: []inputInfo{
15588 {0, 22527},
15589 },
15590 outputs: []outputInfo{
15591 {0, 21503},
15592 },
15593 },
15594 },
15595 {
15596 name: "RSB",
15597 argLen: 2,
15598 asm: arm.ARSB,
15599 reg: regInfo{
15600 inputs: []inputInfo{
15601 {0, 22527},
15602 {1, 22527},
15603 },
15604 outputs: []outputInfo{
15605 {0, 21503},
15606 },
15607 },
15608 },
15609 {
15610 name: "RSBconst",
15611 auxType: auxInt32,
15612 argLen: 1,
15613 asm: arm.ARSB,
15614 reg: regInfo{
15615 inputs: []inputInfo{
15616 {0, 22527},
15617 },
15618 outputs: []outputInfo{
15619 {0, 21503},
15620 },
15621 },
15622 },
15623 {
15624 name: "MUL",
15625 argLen: 2,
15626 commutative: true,
15627 asm: arm.AMUL,
15628 reg: regInfo{
15629 inputs: []inputInfo{
15630 {0, 22527},
15631 {1, 22527},
15632 },
15633 outputs: []outputInfo{
15634 {0, 21503},
15635 },
15636 },
15637 },
15638 {
15639 name: "HMUL",
15640 argLen: 2,
15641 commutative: true,
15642 asm: arm.AMULL,
15643 reg: regInfo{
15644 inputs: []inputInfo{
15645 {0, 22527},
15646 {1, 22527},
15647 },
15648 outputs: []outputInfo{
15649 {0, 21503},
15650 },
15651 },
15652 },
15653 {
15654 name: "HMULU",
15655 argLen: 2,
15656 commutative: true,
15657 asm: arm.AMULLU,
15658 reg: regInfo{
15659 inputs: []inputInfo{
15660 {0, 22527},
15661 {1, 22527},
15662 },
15663 outputs: []outputInfo{
15664 {0, 21503},
15665 },
15666 },
15667 },
15668 {
15669 name: "CALLudiv",
15670 argLen: 2,
15671 clobberFlags: true,
15672 reg: regInfo{
15673 inputs: []inputInfo{
15674 {0, 2},
15675 {1, 1},
15676 },
15677 clobbers: 20492,
15678 outputs: []outputInfo{
15679 {0, 1},
15680 {1, 2},
15681 },
15682 },
15683 },
15684 {
15685 name: "ADDS",
15686 argLen: 2,
15687 commutative: true,
15688 asm: arm.AADD,
15689 reg: regInfo{
15690 inputs: []inputInfo{
15691 {0, 22527},
15692 {1, 22527},
15693 },
15694 outputs: []outputInfo{
15695 {1, 0},
15696 {0, 21503},
15697 },
15698 },
15699 },
15700 {
15701 name: "ADDSconst",
15702 auxType: auxInt32,
15703 argLen: 1,
15704 asm: arm.AADD,
15705 reg: regInfo{
15706 inputs: []inputInfo{
15707 {0, 22527},
15708 },
15709 outputs: []outputInfo{
15710 {1, 0},
15711 {0, 21503},
15712 },
15713 },
15714 },
15715 {
15716 name: "ADC",
15717 argLen: 3,
15718 commutative: true,
15719 asm: arm.AADC,
15720 reg: regInfo{
15721 inputs: []inputInfo{
15722 {0, 21503},
15723 {1, 21503},
15724 },
15725 outputs: []outputInfo{
15726 {0, 21503},
15727 },
15728 },
15729 },
15730 {
15731 name: "ADCconst",
15732 auxType: auxInt32,
15733 argLen: 2,
15734 asm: arm.AADC,
15735 reg: regInfo{
15736 inputs: []inputInfo{
15737 {0, 21503},
15738 },
15739 outputs: []outputInfo{
15740 {0, 21503},
15741 },
15742 },
15743 },
15744 {
15745 name: "SUBS",
15746 argLen: 2,
15747 asm: arm.ASUB,
15748 reg: regInfo{
15749 inputs: []inputInfo{
15750 {0, 22527},
15751 {1, 22527},
15752 },
15753 outputs: []outputInfo{
15754 {1, 0},
15755 {0, 21503},
15756 },
15757 },
15758 },
15759 {
15760 name: "SUBSconst",
15761 auxType: auxInt32,
15762 argLen: 1,
15763 asm: arm.ASUB,
15764 reg: regInfo{
15765 inputs: []inputInfo{
15766 {0, 22527},
15767 },
15768 outputs: []outputInfo{
15769 {1, 0},
15770 {0, 21503},
15771 },
15772 },
15773 },
15774 {
15775 name: "RSBSconst",
15776 auxType: auxInt32,
15777 argLen: 1,
15778 asm: arm.ARSB,
15779 reg: regInfo{
15780 inputs: []inputInfo{
15781 {0, 22527},
15782 },
15783 outputs: []outputInfo{
15784 {1, 0},
15785 {0, 21503},
15786 },
15787 },
15788 },
15789 {
15790 name: "SBC",
15791 argLen: 3,
15792 asm: arm.ASBC,
15793 reg: regInfo{
15794 inputs: []inputInfo{
15795 {0, 21503},
15796 {1, 21503},
15797 },
15798 outputs: []outputInfo{
15799 {0, 21503},
15800 },
15801 },
15802 },
15803 {
15804 name: "SBCconst",
15805 auxType: auxInt32,
15806 argLen: 2,
15807 asm: arm.ASBC,
15808 reg: regInfo{
15809 inputs: []inputInfo{
15810 {0, 21503},
15811 },
15812 outputs: []outputInfo{
15813 {0, 21503},
15814 },
15815 },
15816 },
15817 {
15818 name: "RSCconst",
15819 auxType: auxInt32,
15820 argLen: 2,
15821 asm: arm.ARSC,
15822 reg: regInfo{
15823 inputs: []inputInfo{
15824 {0, 21503},
15825 },
15826 outputs: []outputInfo{
15827 {0, 21503},
15828 },
15829 },
15830 },
15831 {
15832 name: "MULLU",
15833 argLen: 2,
15834 commutative: true,
15835 asm: arm.AMULLU,
15836 reg: regInfo{
15837 inputs: []inputInfo{
15838 {0, 22527},
15839 {1, 22527},
15840 },
15841 outputs: []outputInfo{
15842 {0, 21503},
15843 {1, 21503},
15844 },
15845 },
15846 },
15847 {
15848 name: "MULA",
15849 argLen: 3,
15850 asm: arm.AMULA,
15851 reg: regInfo{
15852 inputs: []inputInfo{
15853 {0, 21503},
15854 {1, 21503},
15855 {2, 21503},
15856 },
15857 outputs: []outputInfo{
15858 {0, 21503},
15859 },
15860 },
15861 },
15862 {
15863 name: "MULS",
15864 argLen: 3,
15865 asm: arm.AMULS,
15866 reg: regInfo{
15867 inputs: []inputInfo{
15868 {0, 21503},
15869 {1, 21503},
15870 {2, 21503},
15871 },
15872 outputs: []outputInfo{
15873 {0, 21503},
15874 },
15875 },
15876 },
15877 {
15878 name: "ADDF",
15879 argLen: 2,
15880 commutative: true,
15881 asm: arm.AADDF,
15882 reg: regInfo{
15883 inputs: []inputInfo{
15884 {0, 4294901760},
15885 {1, 4294901760},
15886 },
15887 outputs: []outputInfo{
15888 {0, 4294901760},
15889 },
15890 },
15891 },
15892 {
15893 name: "ADDD",
15894 argLen: 2,
15895 commutative: true,
15896 asm: arm.AADDD,
15897 reg: regInfo{
15898 inputs: []inputInfo{
15899 {0, 4294901760},
15900 {1, 4294901760},
15901 },
15902 outputs: []outputInfo{
15903 {0, 4294901760},
15904 },
15905 },
15906 },
15907 {
15908 name: "SUBF",
15909 argLen: 2,
15910 asm: arm.ASUBF,
15911 reg: regInfo{
15912 inputs: []inputInfo{
15913 {0, 4294901760},
15914 {1, 4294901760},
15915 },
15916 outputs: []outputInfo{
15917 {0, 4294901760},
15918 },
15919 },
15920 },
15921 {
15922 name: "SUBD",
15923 argLen: 2,
15924 asm: arm.ASUBD,
15925 reg: regInfo{
15926 inputs: []inputInfo{
15927 {0, 4294901760},
15928 {1, 4294901760},
15929 },
15930 outputs: []outputInfo{
15931 {0, 4294901760},
15932 },
15933 },
15934 },
15935 {
15936 name: "MULF",
15937 argLen: 2,
15938 commutative: true,
15939 asm: arm.AMULF,
15940 reg: regInfo{
15941 inputs: []inputInfo{
15942 {0, 4294901760},
15943 {1, 4294901760},
15944 },
15945 outputs: []outputInfo{
15946 {0, 4294901760},
15947 },
15948 },
15949 },
15950 {
15951 name: "MULD",
15952 argLen: 2,
15953 commutative: true,
15954 asm: arm.AMULD,
15955 reg: regInfo{
15956 inputs: []inputInfo{
15957 {0, 4294901760},
15958 {1, 4294901760},
15959 },
15960 outputs: []outputInfo{
15961 {0, 4294901760},
15962 },
15963 },
15964 },
15965 {
15966 name: "NMULF",
15967 argLen: 2,
15968 commutative: true,
15969 asm: arm.ANMULF,
15970 reg: regInfo{
15971 inputs: []inputInfo{
15972 {0, 4294901760},
15973 {1, 4294901760},
15974 },
15975 outputs: []outputInfo{
15976 {0, 4294901760},
15977 },
15978 },
15979 },
15980 {
15981 name: "NMULD",
15982 argLen: 2,
15983 commutative: true,
15984 asm: arm.ANMULD,
15985 reg: regInfo{
15986 inputs: []inputInfo{
15987 {0, 4294901760},
15988 {1, 4294901760},
15989 },
15990 outputs: []outputInfo{
15991 {0, 4294901760},
15992 },
15993 },
15994 },
15995 {
15996 name: "DIVF",
15997 argLen: 2,
15998 asm: arm.ADIVF,
15999 reg: regInfo{
16000 inputs: []inputInfo{
16001 {0, 4294901760},
16002 {1, 4294901760},
16003 },
16004 outputs: []outputInfo{
16005 {0, 4294901760},
16006 },
16007 },
16008 },
16009 {
16010 name: "DIVD",
16011 argLen: 2,
16012 asm: arm.ADIVD,
16013 reg: regInfo{
16014 inputs: []inputInfo{
16015 {0, 4294901760},
16016 {1, 4294901760},
16017 },
16018 outputs: []outputInfo{
16019 {0, 4294901760},
16020 },
16021 },
16022 },
16023 {
16024 name: "MULAF",
16025 argLen: 3,
16026 resultInArg0: true,
16027 asm: arm.AMULAF,
16028 reg: regInfo{
16029 inputs: []inputInfo{
16030 {0, 4294901760},
16031 {1, 4294901760},
16032 {2, 4294901760},
16033 },
16034 outputs: []outputInfo{
16035 {0, 4294901760},
16036 },
16037 },
16038 },
16039 {
16040 name: "MULAD",
16041 argLen: 3,
16042 resultInArg0: true,
16043 asm: arm.AMULAD,
16044 reg: regInfo{
16045 inputs: []inputInfo{
16046 {0, 4294901760},
16047 {1, 4294901760},
16048 {2, 4294901760},
16049 },
16050 outputs: []outputInfo{
16051 {0, 4294901760},
16052 },
16053 },
16054 },
16055 {
16056 name: "MULSF",
16057 argLen: 3,
16058 resultInArg0: true,
16059 asm: arm.AMULSF,
16060 reg: regInfo{
16061 inputs: []inputInfo{
16062 {0, 4294901760},
16063 {1, 4294901760},
16064 {2, 4294901760},
16065 },
16066 outputs: []outputInfo{
16067 {0, 4294901760},
16068 },
16069 },
16070 },
16071 {
16072 name: "MULSD",
16073 argLen: 3,
16074 resultInArg0: true,
16075 asm: arm.AMULSD,
16076 reg: regInfo{
16077 inputs: []inputInfo{
16078 {0, 4294901760},
16079 {1, 4294901760},
16080 {2, 4294901760},
16081 },
16082 outputs: []outputInfo{
16083 {0, 4294901760},
16084 },
16085 },
16086 },
16087 {
16088 name: "FMULAD",
16089 argLen: 3,
16090 resultInArg0: true,
16091 asm: arm.AFMULAD,
16092 reg: regInfo{
16093 inputs: []inputInfo{
16094 {0, 4294901760},
16095 {1, 4294901760},
16096 {2, 4294901760},
16097 },
16098 outputs: []outputInfo{
16099 {0, 4294901760},
16100 },
16101 },
16102 },
16103 {
16104 name: "AND",
16105 argLen: 2,
16106 commutative: true,
16107 asm: arm.AAND,
16108 reg: regInfo{
16109 inputs: []inputInfo{
16110 {0, 22527},
16111 {1, 22527},
16112 },
16113 outputs: []outputInfo{
16114 {0, 21503},
16115 },
16116 },
16117 },
16118 {
16119 name: "ANDconst",
16120 auxType: auxInt32,
16121 argLen: 1,
16122 asm: arm.AAND,
16123 reg: regInfo{
16124 inputs: []inputInfo{
16125 {0, 22527},
16126 },
16127 outputs: []outputInfo{
16128 {0, 21503},
16129 },
16130 },
16131 },
16132 {
16133 name: "OR",
16134 argLen: 2,
16135 commutative: true,
16136 asm: arm.AORR,
16137 reg: regInfo{
16138 inputs: []inputInfo{
16139 {0, 22527},
16140 {1, 22527},
16141 },
16142 outputs: []outputInfo{
16143 {0, 21503},
16144 },
16145 },
16146 },
16147 {
16148 name: "ORconst",
16149 auxType: auxInt32,
16150 argLen: 1,
16151 asm: arm.AORR,
16152 reg: regInfo{
16153 inputs: []inputInfo{
16154 {0, 22527},
16155 },
16156 outputs: []outputInfo{
16157 {0, 21503},
16158 },
16159 },
16160 },
16161 {
16162 name: "XOR",
16163 argLen: 2,
16164 commutative: true,
16165 asm: arm.AEOR,
16166 reg: regInfo{
16167 inputs: []inputInfo{
16168 {0, 22527},
16169 {1, 22527},
16170 },
16171 outputs: []outputInfo{
16172 {0, 21503},
16173 },
16174 },
16175 },
16176 {
16177 name: "XORconst",
16178 auxType: auxInt32,
16179 argLen: 1,
16180 asm: arm.AEOR,
16181 reg: regInfo{
16182 inputs: []inputInfo{
16183 {0, 22527},
16184 },
16185 outputs: []outputInfo{
16186 {0, 21503},
16187 },
16188 },
16189 },
16190 {
16191 name: "BIC",
16192 argLen: 2,
16193 asm: arm.ABIC,
16194 reg: regInfo{
16195 inputs: []inputInfo{
16196 {0, 22527},
16197 {1, 22527},
16198 },
16199 outputs: []outputInfo{
16200 {0, 21503},
16201 },
16202 },
16203 },
16204 {
16205 name: "BICconst",
16206 auxType: auxInt32,
16207 argLen: 1,
16208 asm: arm.ABIC,
16209 reg: regInfo{
16210 inputs: []inputInfo{
16211 {0, 22527},
16212 },
16213 outputs: []outputInfo{
16214 {0, 21503},
16215 },
16216 },
16217 },
16218 {
16219 name: "BFX",
16220 auxType: auxInt32,
16221 argLen: 1,
16222 asm: arm.ABFX,
16223 reg: regInfo{
16224 inputs: []inputInfo{
16225 {0, 22527},
16226 },
16227 outputs: []outputInfo{
16228 {0, 21503},
16229 },
16230 },
16231 },
16232 {
16233 name: "BFXU",
16234 auxType: auxInt32,
16235 argLen: 1,
16236 asm: arm.ABFXU,
16237 reg: regInfo{
16238 inputs: []inputInfo{
16239 {0, 22527},
16240 },
16241 outputs: []outputInfo{
16242 {0, 21503},
16243 },
16244 },
16245 },
16246 {
16247 name: "MVN",
16248 argLen: 1,
16249 asm: arm.AMVN,
16250 reg: regInfo{
16251 inputs: []inputInfo{
16252 {0, 22527},
16253 },
16254 outputs: []outputInfo{
16255 {0, 21503},
16256 },
16257 },
16258 },
16259 {
16260 name: "NEGF",
16261 argLen: 1,
16262 asm: arm.ANEGF,
16263 reg: regInfo{
16264 inputs: []inputInfo{
16265 {0, 4294901760},
16266 },
16267 outputs: []outputInfo{
16268 {0, 4294901760},
16269 },
16270 },
16271 },
16272 {
16273 name: "NEGD",
16274 argLen: 1,
16275 asm: arm.ANEGD,
16276 reg: regInfo{
16277 inputs: []inputInfo{
16278 {0, 4294901760},
16279 },
16280 outputs: []outputInfo{
16281 {0, 4294901760},
16282 },
16283 },
16284 },
16285 {
16286 name: "SQRTD",
16287 argLen: 1,
16288 asm: arm.ASQRTD,
16289 reg: regInfo{
16290 inputs: []inputInfo{
16291 {0, 4294901760},
16292 },
16293 outputs: []outputInfo{
16294 {0, 4294901760},
16295 },
16296 },
16297 },
16298 {
16299 name: "SQRTF",
16300 argLen: 1,
16301 asm: arm.ASQRTF,
16302 reg: regInfo{
16303 inputs: []inputInfo{
16304 {0, 4294901760},
16305 },
16306 outputs: []outputInfo{
16307 {0, 4294901760},
16308 },
16309 },
16310 },
16311 {
16312 name: "ABSD",
16313 argLen: 1,
16314 asm: arm.AABSD,
16315 reg: regInfo{
16316 inputs: []inputInfo{
16317 {0, 4294901760},
16318 },
16319 outputs: []outputInfo{
16320 {0, 4294901760},
16321 },
16322 },
16323 },
16324 {
16325 name: "CLZ",
16326 argLen: 1,
16327 asm: arm.ACLZ,
16328 reg: regInfo{
16329 inputs: []inputInfo{
16330 {0, 22527},
16331 },
16332 outputs: []outputInfo{
16333 {0, 21503},
16334 },
16335 },
16336 },
16337 {
16338 name: "REV",
16339 argLen: 1,
16340 asm: arm.AREV,
16341 reg: regInfo{
16342 inputs: []inputInfo{
16343 {0, 22527},
16344 },
16345 outputs: []outputInfo{
16346 {0, 21503},
16347 },
16348 },
16349 },
16350 {
16351 name: "REV16",
16352 argLen: 1,
16353 asm: arm.AREV16,
16354 reg: regInfo{
16355 inputs: []inputInfo{
16356 {0, 22527},
16357 },
16358 outputs: []outputInfo{
16359 {0, 21503},
16360 },
16361 },
16362 },
16363 {
16364 name: "RBIT",
16365 argLen: 1,
16366 asm: arm.ARBIT,
16367 reg: regInfo{
16368 inputs: []inputInfo{
16369 {0, 22527},
16370 },
16371 outputs: []outputInfo{
16372 {0, 21503},
16373 },
16374 },
16375 },
16376 {
16377 name: "SLL",
16378 argLen: 2,
16379 asm: arm.ASLL,
16380 reg: regInfo{
16381 inputs: []inputInfo{
16382 {0, 22527},
16383 {1, 22527},
16384 },
16385 outputs: []outputInfo{
16386 {0, 21503},
16387 },
16388 },
16389 },
16390 {
16391 name: "SLLconst",
16392 auxType: auxInt32,
16393 argLen: 1,
16394 asm: arm.ASLL,
16395 reg: regInfo{
16396 inputs: []inputInfo{
16397 {0, 22527},
16398 },
16399 outputs: []outputInfo{
16400 {0, 21503},
16401 },
16402 },
16403 },
16404 {
16405 name: "SRL",
16406 argLen: 2,
16407 asm: arm.ASRL,
16408 reg: regInfo{
16409 inputs: []inputInfo{
16410 {0, 22527},
16411 {1, 22527},
16412 },
16413 outputs: []outputInfo{
16414 {0, 21503},
16415 },
16416 },
16417 },
16418 {
16419 name: "SRLconst",
16420 auxType: auxInt32,
16421 argLen: 1,
16422 asm: arm.ASRL,
16423 reg: regInfo{
16424 inputs: []inputInfo{
16425 {0, 22527},
16426 },
16427 outputs: []outputInfo{
16428 {0, 21503},
16429 },
16430 },
16431 },
16432 {
16433 name: "SRA",
16434 argLen: 2,
16435 asm: arm.ASRA,
16436 reg: regInfo{
16437 inputs: []inputInfo{
16438 {0, 22527},
16439 {1, 22527},
16440 },
16441 outputs: []outputInfo{
16442 {0, 21503},
16443 },
16444 },
16445 },
16446 {
16447 name: "SRAconst",
16448 auxType: auxInt32,
16449 argLen: 1,
16450 asm: arm.ASRA,
16451 reg: regInfo{
16452 inputs: []inputInfo{
16453 {0, 22527},
16454 },
16455 outputs: []outputInfo{
16456 {0, 21503},
16457 },
16458 },
16459 },
16460 {
16461 name: "SRR",
16462 argLen: 2,
16463 reg: regInfo{
16464 inputs: []inputInfo{
16465 {0, 22527},
16466 {1, 22527},
16467 },
16468 outputs: []outputInfo{
16469 {0, 21503},
16470 },
16471 },
16472 },
16473 {
16474 name: "SRRconst",
16475 auxType: auxInt32,
16476 argLen: 1,
16477 reg: regInfo{
16478 inputs: []inputInfo{
16479 {0, 22527},
16480 },
16481 outputs: []outputInfo{
16482 {0, 21503},
16483 },
16484 },
16485 },
16486 {
16487 name: "ADDshiftLL",
16488 auxType: auxInt32,
16489 argLen: 2,
16490 asm: arm.AADD,
16491 reg: regInfo{
16492 inputs: []inputInfo{
16493 {0, 22527},
16494 {1, 22527},
16495 },
16496 outputs: []outputInfo{
16497 {0, 21503},
16498 },
16499 },
16500 },
16501 {
16502 name: "ADDshiftRL",
16503 auxType: auxInt32,
16504 argLen: 2,
16505 asm: arm.AADD,
16506 reg: regInfo{
16507 inputs: []inputInfo{
16508 {0, 22527},
16509 {1, 22527},
16510 },
16511 outputs: []outputInfo{
16512 {0, 21503},
16513 },
16514 },
16515 },
16516 {
16517 name: "ADDshiftRA",
16518 auxType: auxInt32,
16519 argLen: 2,
16520 asm: arm.AADD,
16521 reg: regInfo{
16522 inputs: []inputInfo{
16523 {0, 22527},
16524 {1, 22527},
16525 },
16526 outputs: []outputInfo{
16527 {0, 21503},
16528 },
16529 },
16530 },
16531 {
16532 name: "SUBshiftLL",
16533 auxType: auxInt32,
16534 argLen: 2,
16535 asm: arm.ASUB,
16536 reg: regInfo{
16537 inputs: []inputInfo{
16538 {0, 22527},
16539 {1, 22527},
16540 },
16541 outputs: []outputInfo{
16542 {0, 21503},
16543 },
16544 },
16545 },
16546 {
16547 name: "SUBshiftRL",
16548 auxType: auxInt32,
16549 argLen: 2,
16550 asm: arm.ASUB,
16551 reg: regInfo{
16552 inputs: []inputInfo{
16553 {0, 22527},
16554 {1, 22527},
16555 },
16556 outputs: []outputInfo{
16557 {0, 21503},
16558 },
16559 },
16560 },
16561 {
16562 name: "SUBshiftRA",
16563 auxType: auxInt32,
16564 argLen: 2,
16565 asm: arm.ASUB,
16566 reg: regInfo{
16567 inputs: []inputInfo{
16568 {0, 22527},
16569 {1, 22527},
16570 },
16571 outputs: []outputInfo{
16572 {0, 21503},
16573 },
16574 },
16575 },
16576 {
16577 name: "RSBshiftLL",
16578 auxType: auxInt32,
16579 argLen: 2,
16580 asm: arm.ARSB,
16581 reg: regInfo{
16582 inputs: []inputInfo{
16583 {0, 22527},
16584 {1, 22527},
16585 },
16586 outputs: []outputInfo{
16587 {0, 21503},
16588 },
16589 },
16590 },
16591 {
16592 name: "RSBshiftRL",
16593 auxType: auxInt32,
16594 argLen: 2,
16595 asm: arm.ARSB,
16596 reg: regInfo{
16597 inputs: []inputInfo{
16598 {0, 22527},
16599 {1, 22527},
16600 },
16601 outputs: []outputInfo{
16602 {0, 21503},
16603 },
16604 },
16605 },
16606 {
16607 name: "RSBshiftRA",
16608 auxType: auxInt32,
16609 argLen: 2,
16610 asm: arm.ARSB,
16611 reg: regInfo{
16612 inputs: []inputInfo{
16613 {0, 22527},
16614 {1, 22527},
16615 },
16616 outputs: []outputInfo{
16617 {0, 21503},
16618 },
16619 },
16620 },
16621 {
16622 name: "ANDshiftLL",
16623 auxType: auxInt32,
16624 argLen: 2,
16625 asm: arm.AAND,
16626 reg: regInfo{
16627 inputs: []inputInfo{
16628 {0, 22527},
16629 {1, 22527},
16630 },
16631 outputs: []outputInfo{
16632 {0, 21503},
16633 },
16634 },
16635 },
16636 {
16637 name: "ANDshiftRL",
16638 auxType: auxInt32,
16639 argLen: 2,
16640 asm: arm.AAND,
16641 reg: regInfo{
16642 inputs: []inputInfo{
16643 {0, 22527},
16644 {1, 22527},
16645 },
16646 outputs: []outputInfo{
16647 {0, 21503},
16648 },
16649 },
16650 },
16651 {
16652 name: "ANDshiftRA",
16653 auxType: auxInt32,
16654 argLen: 2,
16655 asm: arm.AAND,
16656 reg: regInfo{
16657 inputs: []inputInfo{
16658 {0, 22527},
16659 {1, 22527},
16660 },
16661 outputs: []outputInfo{
16662 {0, 21503},
16663 },
16664 },
16665 },
16666 {
16667 name: "ORshiftLL",
16668 auxType: auxInt32,
16669 argLen: 2,
16670 asm: arm.AORR,
16671 reg: regInfo{
16672 inputs: []inputInfo{
16673 {0, 22527},
16674 {1, 22527},
16675 },
16676 outputs: []outputInfo{
16677 {0, 21503},
16678 },
16679 },
16680 },
16681 {
16682 name: "ORshiftRL",
16683 auxType: auxInt32,
16684 argLen: 2,
16685 asm: arm.AORR,
16686 reg: regInfo{
16687 inputs: []inputInfo{
16688 {0, 22527},
16689 {1, 22527},
16690 },
16691 outputs: []outputInfo{
16692 {0, 21503},
16693 },
16694 },
16695 },
16696 {
16697 name: "ORshiftRA",
16698 auxType: auxInt32,
16699 argLen: 2,
16700 asm: arm.AORR,
16701 reg: regInfo{
16702 inputs: []inputInfo{
16703 {0, 22527},
16704 {1, 22527},
16705 },
16706 outputs: []outputInfo{
16707 {0, 21503},
16708 },
16709 },
16710 },
16711 {
16712 name: "XORshiftLL",
16713 auxType: auxInt32,
16714 argLen: 2,
16715 asm: arm.AEOR,
16716 reg: regInfo{
16717 inputs: []inputInfo{
16718 {0, 22527},
16719 {1, 22527},
16720 },
16721 outputs: []outputInfo{
16722 {0, 21503},
16723 },
16724 },
16725 },
16726 {
16727 name: "XORshiftRL",
16728 auxType: auxInt32,
16729 argLen: 2,
16730 asm: arm.AEOR,
16731 reg: regInfo{
16732 inputs: []inputInfo{
16733 {0, 22527},
16734 {1, 22527},
16735 },
16736 outputs: []outputInfo{
16737 {0, 21503},
16738 },
16739 },
16740 },
16741 {
16742 name: "XORshiftRA",
16743 auxType: auxInt32,
16744 argLen: 2,
16745 asm: arm.AEOR,
16746 reg: regInfo{
16747 inputs: []inputInfo{
16748 {0, 22527},
16749 {1, 22527},
16750 },
16751 outputs: []outputInfo{
16752 {0, 21503},
16753 },
16754 },
16755 },
16756 {
16757 name: "XORshiftRR",
16758 auxType: auxInt32,
16759 argLen: 2,
16760 asm: arm.AEOR,
16761 reg: regInfo{
16762 inputs: []inputInfo{
16763 {0, 22527},
16764 {1, 22527},
16765 },
16766 outputs: []outputInfo{
16767 {0, 21503},
16768 },
16769 },
16770 },
16771 {
16772 name: "BICshiftLL",
16773 auxType: auxInt32,
16774 argLen: 2,
16775 asm: arm.ABIC,
16776 reg: regInfo{
16777 inputs: []inputInfo{
16778 {0, 22527},
16779 {1, 22527},
16780 },
16781 outputs: []outputInfo{
16782 {0, 21503},
16783 },
16784 },
16785 },
16786 {
16787 name: "BICshiftRL",
16788 auxType: auxInt32,
16789 argLen: 2,
16790 asm: arm.ABIC,
16791 reg: regInfo{
16792 inputs: []inputInfo{
16793 {0, 22527},
16794 {1, 22527},
16795 },
16796 outputs: []outputInfo{
16797 {0, 21503},
16798 },
16799 },
16800 },
16801 {
16802 name: "BICshiftRA",
16803 auxType: auxInt32,
16804 argLen: 2,
16805 asm: arm.ABIC,
16806 reg: regInfo{
16807 inputs: []inputInfo{
16808 {0, 22527},
16809 {1, 22527},
16810 },
16811 outputs: []outputInfo{
16812 {0, 21503},
16813 },
16814 },
16815 },
16816 {
16817 name: "MVNshiftLL",
16818 auxType: auxInt32,
16819 argLen: 1,
16820 asm: arm.AMVN,
16821 reg: regInfo{
16822 inputs: []inputInfo{
16823 {0, 22527},
16824 },
16825 outputs: []outputInfo{
16826 {0, 21503},
16827 },
16828 },
16829 },
16830 {
16831 name: "MVNshiftRL",
16832 auxType: auxInt32,
16833 argLen: 1,
16834 asm: arm.AMVN,
16835 reg: regInfo{
16836 inputs: []inputInfo{
16837 {0, 22527},
16838 },
16839 outputs: []outputInfo{
16840 {0, 21503},
16841 },
16842 },
16843 },
16844 {
16845 name: "MVNshiftRA",
16846 auxType: auxInt32,
16847 argLen: 1,
16848 asm: arm.AMVN,
16849 reg: regInfo{
16850 inputs: []inputInfo{
16851 {0, 22527},
16852 },
16853 outputs: []outputInfo{
16854 {0, 21503},
16855 },
16856 },
16857 },
16858 {
16859 name: "ADCshiftLL",
16860 auxType: auxInt32,
16861 argLen: 3,
16862 asm: arm.AADC,
16863 reg: regInfo{
16864 inputs: []inputInfo{
16865 {0, 21503},
16866 {1, 21503},
16867 },
16868 outputs: []outputInfo{
16869 {0, 21503},
16870 },
16871 },
16872 },
16873 {
16874 name: "ADCshiftRL",
16875 auxType: auxInt32,
16876 argLen: 3,
16877 asm: arm.AADC,
16878 reg: regInfo{
16879 inputs: []inputInfo{
16880 {0, 21503},
16881 {1, 21503},
16882 },
16883 outputs: []outputInfo{
16884 {0, 21503},
16885 },
16886 },
16887 },
16888 {
16889 name: "ADCshiftRA",
16890 auxType: auxInt32,
16891 argLen: 3,
16892 asm: arm.AADC,
16893 reg: regInfo{
16894 inputs: []inputInfo{
16895 {0, 21503},
16896 {1, 21503},
16897 },
16898 outputs: []outputInfo{
16899 {0, 21503},
16900 },
16901 },
16902 },
16903 {
16904 name: "SBCshiftLL",
16905 auxType: auxInt32,
16906 argLen: 3,
16907 asm: arm.ASBC,
16908 reg: regInfo{
16909 inputs: []inputInfo{
16910 {0, 21503},
16911 {1, 21503},
16912 },
16913 outputs: []outputInfo{
16914 {0, 21503},
16915 },
16916 },
16917 },
16918 {
16919 name: "SBCshiftRL",
16920 auxType: auxInt32,
16921 argLen: 3,
16922 asm: arm.ASBC,
16923 reg: regInfo{
16924 inputs: []inputInfo{
16925 {0, 21503},
16926 {1, 21503},
16927 },
16928 outputs: []outputInfo{
16929 {0, 21503},
16930 },
16931 },
16932 },
16933 {
16934 name: "SBCshiftRA",
16935 auxType: auxInt32,
16936 argLen: 3,
16937 asm: arm.ASBC,
16938 reg: regInfo{
16939 inputs: []inputInfo{
16940 {0, 21503},
16941 {1, 21503},
16942 },
16943 outputs: []outputInfo{
16944 {0, 21503},
16945 },
16946 },
16947 },
16948 {
16949 name: "RSCshiftLL",
16950 auxType: auxInt32,
16951 argLen: 3,
16952 asm: arm.ARSC,
16953 reg: regInfo{
16954 inputs: []inputInfo{
16955 {0, 21503},
16956 {1, 21503},
16957 },
16958 outputs: []outputInfo{
16959 {0, 21503},
16960 },
16961 },
16962 },
16963 {
16964 name: "RSCshiftRL",
16965 auxType: auxInt32,
16966 argLen: 3,
16967 asm: arm.ARSC,
16968 reg: regInfo{
16969 inputs: []inputInfo{
16970 {0, 21503},
16971 {1, 21503},
16972 },
16973 outputs: []outputInfo{
16974 {0, 21503},
16975 },
16976 },
16977 },
16978 {
16979 name: "RSCshiftRA",
16980 auxType: auxInt32,
16981 argLen: 3,
16982 asm: arm.ARSC,
16983 reg: regInfo{
16984 inputs: []inputInfo{
16985 {0, 21503},
16986 {1, 21503},
16987 },
16988 outputs: []outputInfo{
16989 {0, 21503},
16990 },
16991 },
16992 },
16993 {
16994 name: "ADDSshiftLL",
16995 auxType: auxInt32,
16996 argLen: 2,
16997 asm: arm.AADD,
16998 reg: regInfo{
16999 inputs: []inputInfo{
17000 {0, 22527},
17001 {1, 22527},
17002 },
17003 outputs: []outputInfo{
17004 {1, 0},
17005 {0, 21503},
17006 },
17007 },
17008 },
17009 {
17010 name: "ADDSshiftRL",
17011 auxType: auxInt32,
17012 argLen: 2,
17013 asm: arm.AADD,
17014 reg: regInfo{
17015 inputs: []inputInfo{
17016 {0, 22527},
17017 {1, 22527},
17018 },
17019 outputs: []outputInfo{
17020 {1, 0},
17021 {0, 21503},
17022 },
17023 },
17024 },
17025 {
17026 name: "ADDSshiftRA",
17027 auxType: auxInt32,
17028 argLen: 2,
17029 asm: arm.AADD,
17030 reg: regInfo{
17031 inputs: []inputInfo{
17032 {0, 22527},
17033 {1, 22527},
17034 },
17035 outputs: []outputInfo{
17036 {1, 0},
17037 {0, 21503},
17038 },
17039 },
17040 },
17041 {
17042 name: "SUBSshiftLL",
17043 auxType: auxInt32,
17044 argLen: 2,
17045 asm: arm.ASUB,
17046 reg: regInfo{
17047 inputs: []inputInfo{
17048 {0, 22527},
17049 {1, 22527},
17050 },
17051 outputs: []outputInfo{
17052 {1, 0},
17053 {0, 21503},
17054 },
17055 },
17056 },
17057 {
17058 name: "SUBSshiftRL",
17059 auxType: auxInt32,
17060 argLen: 2,
17061 asm: arm.ASUB,
17062 reg: regInfo{
17063 inputs: []inputInfo{
17064 {0, 22527},
17065 {1, 22527},
17066 },
17067 outputs: []outputInfo{
17068 {1, 0},
17069 {0, 21503},
17070 },
17071 },
17072 },
17073 {
17074 name: "SUBSshiftRA",
17075 auxType: auxInt32,
17076 argLen: 2,
17077 asm: arm.ASUB,
17078 reg: regInfo{
17079 inputs: []inputInfo{
17080 {0, 22527},
17081 {1, 22527},
17082 },
17083 outputs: []outputInfo{
17084 {1, 0},
17085 {0, 21503},
17086 },
17087 },
17088 },
17089 {
17090 name: "RSBSshiftLL",
17091 auxType: auxInt32,
17092 argLen: 2,
17093 asm: arm.ARSB,
17094 reg: regInfo{
17095 inputs: []inputInfo{
17096 {0, 22527},
17097 {1, 22527},
17098 },
17099 outputs: []outputInfo{
17100 {1, 0},
17101 {0, 21503},
17102 },
17103 },
17104 },
17105 {
17106 name: "RSBSshiftRL",
17107 auxType: auxInt32,
17108 argLen: 2,
17109 asm: arm.ARSB,
17110 reg: regInfo{
17111 inputs: []inputInfo{
17112 {0, 22527},
17113 {1, 22527},
17114 },
17115 outputs: []outputInfo{
17116 {1, 0},
17117 {0, 21503},
17118 },
17119 },
17120 },
17121 {
17122 name: "RSBSshiftRA",
17123 auxType: auxInt32,
17124 argLen: 2,
17125 asm: arm.ARSB,
17126 reg: regInfo{
17127 inputs: []inputInfo{
17128 {0, 22527},
17129 {1, 22527},
17130 },
17131 outputs: []outputInfo{
17132 {1, 0},
17133 {0, 21503},
17134 },
17135 },
17136 },
17137 {
17138 name: "ADDshiftLLreg",
17139 argLen: 3,
17140 asm: arm.AADD,
17141 reg: regInfo{
17142 inputs: []inputInfo{
17143 {0, 21503},
17144 {1, 21503},
17145 {2, 21503},
17146 },
17147 outputs: []outputInfo{
17148 {0, 21503},
17149 },
17150 },
17151 },
17152 {
17153 name: "ADDshiftRLreg",
17154 argLen: 3,
17155 asm: arm.AADD,
17156 reg: regInfo{
17157 inputs: []inputInfo{
17158 {0, 21503},
17159 {1, 21503},
17160 {2, 21503},
17161 },
17162 outputs: []outputInfo{
17163 {0, 21503},
17164 },
17165 },
17166 },
17167 {
17168 name: "ADDshiftRAreg",
17169 argLen: 3,
17170 asm: arm.AADD,
17171 reg: regInfo{
17172 inputs: []inputInfo{
17173 {0, 21503},
17174 {1, 21503},
17175 {2, 21503},
17176 },
17177 outputs: []outputInfo{
17178 {0, 21503},
17179 },
17180 },
17181 },
17182 {
17183 name: "SUBshiftLLreg",
17184 argLen: 3,
17185 asm: arm.ASUB,
17186 reg: regInfo{
17187 inputs: []inputInfo{
17188 {0, 21503},
17189 {1, 21503},
17190 {2, 21503},
17191 },
17192 outputs: []outputInfo{
17193 {0, 21503},
17194 },
17195 },
17196 },
17197 {
17198 name: "SUBshiftRLreg",
17199 argLen: 3,
17200 asm: arm.ASUB,
17201 reg: regInfo{
17202 inputs: []inputInfo{
17203 {0, 21503},
17204 {1, 21503},
17205 {2, 21503},
17206 },
17207 outputs: []outputInfo{
17208 {0, 21503},
17209 },
17210 },
17211 },
17212 {
17213 name: "SUBshiftRAreg",
17214 argLen: 3,
17215 asm: arm.ASUB,
17216 reg: regInfo{
17217 inputs: []inputInfo{
17218 {0, 21503},
17219 {1, 21503},
17220 {2, 21503},
17221 },
17222 outputs: []outputInfo{
17223 {0, 21503},
17224 },
17225 },
17226 },
17227 {
17228 name: "RSBshiftLLreg",
17229 argLen: 3,
17230 asm: arm.ARSB,
17231 reg: regInfo{
17232 inputs: []inputInfo{
17233 {0, 21503},
17234 {1, 21503},
17235 {2, 21503},
17236 },
17237 outputs: []outputInfo{
17238 {0, 21503},
17239 },
17240 },
17241 },
17242 {
17243 name: "RSBshiftRLreg",
17244 argLen: 3,
17245 asm: arm.ARSB,
17246 reg: regInfo{
17247 inputs: []inputInfo{
17248 {0, 21503},
17249 {1, 21503},
17250 {2, 21503},
17251 },
17252 outputs: []outputInfo{
17253 {0, 21503},
17254 },
17255 },
17256 },
17257 {
17258 name: "RSBshiftRAreg",
17259 argLen: 3,
17260 asm: arm.ARSB,
17261 reg: regInfo{
17262 inputs: []inputInfo{
17263 {0, 21503},
17264 {1, 21503},
17265 {2, 21503},
17266 },
17267 outputs: []outputInfo{
17268 {0, 21503},
17269 },
17270 },
17271 },
17272 {
17273 name: "ANDshiftLLreg",
17274 argLen: 3,
17275 asm: arm.AAND,
17276 reg: regInfo{
17277 inputs: []inputInfo{
17278 {0, 21503},
17279 {1, 21503},
17280 {2, 21503},
17281 },
17282 outputs: []outputInfo{
17283 {0, 21503},
17284 },
17285 },
17286 },
17287 {
17288 name: "ANDshiftRLreg",
17289 argLen: 3,
17290 asm: arm.AAND,
17291 reg: regInfo{
17292 inputs: []inputInfo{
17293 {0, 21503},
17294 {1, 21503},
17295 {2, 21503},
17296 },
17297 outputs: []outputInfo{
17298 {0, 21503},
17299 },
17300 },
17301 },
17302 {
17303 name: "ANDshiftRAreg",
17304 argLen: 3,
17305 asm: arm.AAND,
17306 reg: regInfo{
17307 inputs: []inputInfo{
17308 {0, 21503},
17309 {1, 21503},
17310 {2, 21503},
17311 },
17312 outputs: []outputInfo{
17313 {0, 21503},
17314 },
17315 },
17316 },
17317 {
17318 name: "ORshiftLLreg",
17319 argLen: 3,
17320 asm: arm.AORR,
17321 reg: regInfo{
17322 inputs: []inputInfo{
17323 {0, 21503},
17324 {1, 21503},
17325 {2, 21503},
17326 },
17327 outputs: []outputInfo{
17328 {0, 21503},
17329 },
17330 },
17331 },
17332 {
17333 name: "ORshiftRLreg",
17334 argLen: 3,
17335 asm: arm.AORR,
17336 reg: regInfo{
17337 inputs: []inputInfo{
17338 {0, 21503},
17339 {1, 21503},
17340 {2, 21503},
17341 },
17342 outputs: []outputInfo{
17343 {0, 21503},
17344 },
17345 },
17346 },
17347 {
17348 name: "ORshiftRAreg",
17349 argLen: 3,
17350 asm: arm.AORR,
17351 reg: regInfo{
17352 inputs: []inputInfo{
17353 {0, 21503},
17354 {1, 21503},
17355 {2, 21503},
17356 },
17357 outputs: []outputInfo{
17358 {0, 21503},
17359 },
17360 },
17361 },
17362 {
17363 name: "XORshiftLLreg",
17364 argLen: 3,
17365 asm: arm.AEOR,
17366 reg: regInfo{
17367 inputs: []inputInfo{
17368 {0, 21503},
17369 {1, 21503},
17370 {2, 21503},
17371 },
17372 outputs: []outputInfo{
17373 {0, 21503},
17374 },
17375 },
17376 },
17377 {
17378 name: "XORshiftRLreg",
17379 argLen: 3,
17380 asm: arm.AEOR,
17381 reg: regInfo{
17382 inputs: []inputInfo{
17383 {0, 21503},
17384 {1, 21503},
17385 {2, 21503},
17386 },
17387 outputs: []outputInfo{
17388 {0, 21503},
17389 },
17390 },
17391 },
17392 {
17393 name: "XORshiftRAreg",
17394 argLen: 3,
17395 asm: arm.AEOR,
17396 reg: regInfo{
17397 inputs: []inputInfo{
17398 {0, 21503},
17399 {1, 21503},
17400 {2, 21503},
17401 },
17402 outputs: []outputInfo{
17403 {0, 21503},
17404 },
17405 },
17406 },
17407 {
17408 name: "BICshiftLLreg",
17409 argLen: 3,
17410 asm: arm.ABIC,
17411 reg: regInfo{
17412 inputs: []inputInfo{
17413 {0, 21503},
17414 {1, 21503},
17415 {2, 21503},
17416 },
17417 outputs: []outputInfo{
17418 {0, 21503},
17419 },
17420 },
17421 },
17422 {
17423 name: "BICshiftRLreg",
17424 argLen: 3,
17425 asm: arm.ABIC,
17426 reg: regInfo{
17427 inputs: []inputInfo{
17428 {0, 21503},
17429 {1, 21503},
17430 {2, 21503},
17431 },
17432 outputs: []outputInfo{
17433 {0, 21503},
17434 },
17435 },
17436 },
17437 {
17438 name: "BICshiftRAreg",
17439 argLen: 3,
17440 asm: arm.ABIC,
17441 reg: regInfo{
17442 inputs: []inputInfo{
17443 {0, 21503},
17444 {1, 21503},
17445 {2, 21503},
17446 },
17447 outputs: []outputInfo{
17448 {0, 21503},
17449 },
17450 },
17451 },
17452 {
17453 name: "MVNshiftLLreg",
17454 argLen: 2,
17455 asm: arm.AMVN,
17456 reg: regInfo{
17457 inputs: []inputInfo{
17458 {0, 22527},
17459 {1, 22527},
17460 },
17461 outputs: []outputInfo{
17462 {0, 21503},
17463 },
17464 },
17465 },
17466 {
17467 name: "MVNshiftRLreg",
17468 argLen: 2,
17469 asm: arm.AMVN,
17470 reg: regInfo{
17471 inputs: []inputInfo{
17472 {0, 22527},
17473 {1, 22527},
17474 },
17475 outputs: []outputInfo{
17476 {0, 21503},
17477 },
17478 },
17479 },
17480 {
17481 name: "MVNshiftRAreg",
17482 argLen: 2,
17483 asm: arm.AMVN,
17484 reg: regInfo{
17485 inputs: []inputInfo{
17486 {0, 22527},
17487 {1, 22527},
17488 },
17489 outputs: []outputInfo{
17490 {0, 21503},
17491 },
17492 },
17493 },
17494 {
17495 name: "ADCshiftLLreg",
17496 argLen: 4,
17497 asm: arm.AADC,
17498 reg: regInfo{
17499 inputs: []inputInfo{
17500 {0, 21503},
17501 {1, 21503},
17502 {2, 21503},
17503 },
17504 outputs: []outputInfo{
17505 {0, 21503},
17506 },
17507 },
17508 },
17509 {
17510 name: "ADCshiftRLreg",
17511 argLen: 4,
17512 asm: arm.AADC,
17513 reg: regInfo{
17514 inputs: []inputInfo{
17515 {0, 21503},
17516 {1, 21503},
17517 {2, 21503},
17518 },
17519 outputs: []outputInfo{
17520 {0, 21503},
17521 },
17522 },
17523 },
17524 {
17525 name: "ADCshiftRAreg",
17526 argLen: 4,
17527 asm: arm.AADC,
17528 reg: regInfo{
17529 inputs: []inputInfo{
17530 {0, 21503},
17531 {1, 21503},
17532 {2, 21503},
17533 },
17534 outputs: []outputInfo{
17535 {0, 21503},
17536 },
17537 },
17538 },
17539 {
17540 name: "SBCshiftLLreg",
17541 argLen: 4,
17542 asm: arm.ASBC,
17543 reg: regInfo{
17544 inputs: []inputInfo{
17545 {0, 21503},
17546 {1, 21503},
17547 {2, 21503},
17548 },
17549 outputs: []outputInfo{
17550 {0, 21503},
17551 },
17552 },
17553 },
17554 {
17555 name: "SBCshiftRLreg",
17556 argLen: 4,
17557 asm: arm.ASBC,
17558 reg: regInfo{
17559 inputs: []inputInfo{
17560 {0, 21503},
17561 {1, 21503},
17562 {2, 21503},
17563 },
17564 outputs: []outputInfo{
17565 {0, 21503},
17566 },
17567 },
17568 },
17569 {
17570 name: "SBCshiftRAreg",
17571 argLen: 4,
17572 asm: arm.ASBC,
17573 reg: regInfo{
17574 inputs: []inputInfo{
17575 {0, 21503},
17576 {1, 21503},
17577 {2, 21503},
17578 },
17579 outputs: []outputInfo{
17580 {0, 21503},
17581 },
17582 },
17583 },
17584 {
17585 name: "RSCshiftLLreg",
17586 argLen: 4,
17587 asm: arm.ARSC,
17588 reg: regInfo{
17589 inputs: []inputInfo{
17590 {0, 21503},
17591 {1, 21503},
17592 {2, 21503},
17593 },
17594 outputs: []outputInfo{
17595 {0, 21503},
17596 },
17597 },
17598 },
17599 {
17600 name: "RSCshiftRLreg",
17601 argLen: 4,
17602 asm: arm.ARSC,
17603 reg: regInfo{
17604 inputs: []inputInfo{
17605 {0, 21503},
17606 {1, 21503},
17607 {2, 21503},
17608 },
17609 outputs: []outputInfo{
17610 {0, 21503},
17611 },
17612 },
17613 },
17614 {
17615 name: "RSCshiftRAreg",
17616 argLen: 4,
17617 asm: arm.ARSC,
17618 reg: regInfo{
17619 inputs: []inputInfo{
17620 {0, 21503},
17621 {1, 21503},
17622 {2, 21503},
17623 },
17624 outputs: []outputInfo{
17625 {0, 21503},
17626 },
17627 },
17628 },
17629 {
17630 name: "ADDSshiftLLreg",
17631 argLen: 3,
17632 asm: arm.AADD,
17633 reg: regInfo{
17634 inputs: []inputInfo{
17635 {0, 21503},
17636 {1, 21503},
17637 {2, 21503},
17638 },
17639 outputs: []outputInfo{
17640 {1, 0},
17641 {0, 21503},
17642 },
17643 },
17644 },
17645 {
17646 name: "ADDSshiftRLreg",
17647 argLen: 3,
17648 asm: arm.AADD,
17649 reg: regInfo{
17650 inputs: []inputInfo{
17651 {0, 21503},
17652 {1, 21503},
17653 {2, 21503},
17654 },
17655 outputs: []outputInfo{
17656 {1, 0},
17657 {0, 21503},
17658 },
17659 },
17660 },
17661 {
17662 name: "ADDSshiftRAreg",
17663 argLen: 3,
17664 asm: arm.AADD,
17665 reg: regInfo{
17666 inputs: []inputInfo{
17667 {0, 21503},
17668 {1, 21503},
17669 {2, 21503},
17670 },
17671 outputs: []outputInfo{
17672 {1, 0},
17673 {0, 21503},
17674 },
17675 },
17676 },
17677 {
17678 name: "SUBSshiftLLreg",
17679 argLen: 3,
17680 asm: arm.ASUB,
17681 reg: regInfo{
17682 inputs: []inputInfo{
17683 {0, 21503},
17684 {1, 21503},
17685 {2, 21503},
17686 },
17687 outputs: []outputInfo{
17688 {1, 0},
17689 {0, 21503},
17690 },
17691 },
17692 },
17693 {
17694 name: "SUBSshiftRLreg",
17695 argLen: 3,
17696 asm: arm.ASUB,
17697 reg: regInfo{
17698 inputs: []inputInfo{
17699 {0, 21503},
17700 {1, 21503},
17701 {2, 21503},
17702 },
17703 outputs: []outputInfo{
17704 {1, 0},
17705 {0, 21503},
17706 },
17707 },
17708 },
17709 {
17710 name: "SUBSshiftRAreg",
17711 argLen: 3,
17712 asm: arm.ASUB,
17713 reg: regInfo{
17714 inputs: []inputInfo{
17715 {0, 21503},
17716 {1, 21503},
17717 {2, 21503},
17718 },
17719 outputs: []outputInfo{
17720 {1, 0},
17721 {0, 21503},
17722 },
17723 },
17724 },
17725 {
17726 name: "RSBSshiftLLreg",
17727 argLen: 3,
17728 asm: arm.ARSB,
17729 reg: regInfo{
17730 inputs: []inputInfo{
17731 {0, 21503},
17732 {1, 21503},
17733 {2, 21503},
17734 },
17735 outputs: []outputInfo{
17736 {1, 0},
17737 {0, 21503},
17738 },
17739 },
17740 },
17741 {
17742 name: "RSBSshiftRLreg",
17743 argLen: 3,
17744 asm: arm.ARSB,
17745 reg: regInfo{
17746 inputs: []inputInfo{
17747 {0, 21503},
17748 {1, 21503},
17749 {2, 21503},
17750 },
17751 outputs: []outputInfo{
17752 {1, 0},
17753 {0, 21503},
17754 },
17755 },
17756 },
17757 {
17758 name: "RSBSshiftRAreg",
17759 argLen: 3,
17760 asm: arm.ARSB,
17761 reg: regInfo{
17762 inputs: []inputInfo{
17763 {0, 21503},
17764 {1, 21503},
17765 {2, 21503},
17766 },
17767 outputs: []outputInfo{
17768 {1, 0},
17769 {0, 21503},
17770 },
17771 },
17772 },
17773 {
17774 name: "CMP",
17775 argLen: 2,
17776 asm: arm.ACMP,
17777 reg: regInfo{
17778 inputs: []inputInfo{
17779 {0, 22527},
17780 {1, 22527},
17781 },
17782 },
17783 },
17784 {
17785 name: "CMPconst",
17786 auxType: auxInt32,
17787 argLen: 1,
17788 asm: arm.ACMP,
17789 reg: regInfo{
17790 inputs: []inputInfo{
17791 {0, 22527},
17792 },
17793 },
17794 },
17795 {
17796 name: "CMN",
17797 argLen: 2,
17798 commutative: true,
17799 asm: arm.ACMN,
17800 reg: regInfo{
17801 inputs: []inputInfo{
17802 {0, 22527},
17803 {1, 22527},
17804 },
17805 },
17806 },
17807 {
17808 name: "CMNconst",
17809 auxType: auxInt32,
17810 argLen: 1,
17811 asm: arm.ACMN,
17812 reg: regInfo{
17813 inputs: []inputInfo{
17814 {0, 22527},
17815 },
17816 },
17817 },
17818 {
17819 name: "TST",
17820 argLen: 2,
17821 commutative: true,
17822 asm: arm.ATST,
17823 reg: regInfo{
17824 inputs: []inputInfo{
17825 {0, 22527},
17826 {1, 22527},
17827 },
17828 },
17829 },
17830 {
17831 name: "TSTconst",
17832 auxType: auxInt32,
17833 argLen: 1,
17834 asm: arm.ATST,
17835 reg: regInfo{
17836 inputs: []inputInfo{
17837 {0, 22527},
17838 },
17839 },
17840 },
17841 {
17842 name: "TEQ",
17843 argLen: 2,
17844 commutative: true,
17845 asm: arm.ATEQ,
17846 reg: regInfo{
17847 inputs: []inputInfo{
17848 {0, 22527},
17849 {1, 22527},
17850 },
17851 },
17852 },
17853 {
17854 name: "TEQconst",
17855 auxType: auxInt32,
17856 argLen: 1,
17857 asm: arm.ATEQ,
17858 reg: regInfo{
17859 inputs: []inputInfo{
17860 {0, 22527},
17861 },
17862 },
17863 },
17864 {
17865 name: "CMPF",
17866 argLen: 2,
17867 asm: arm.ACMPF,
17868 reg: regInfo{
17869 inputs: []inputInfo{
17870 {0, 4294901760},
17871 {1, 4294901760},
17872 },
17873 },
17874 },
17875 {
17876 name: "CMPD",
17877 argLen: 2,
17878 asm: arm.ACMPD,
17879 reg: regInfo{
17880 inputs: []inputInfo{
17881 {0, 4294901760},
17882 {1, 4294901760},
17883 },
17884 },
17885 },
17886 {
17887 name: "CMPshiftLL",
17888 auxType: auxInt32,
17889 argLen: 2,
17890 asm: arm.ACMP,
17891 reg: regInfo{
17892 inputs: []inputInfo{
17893 {0, 22527},
17894 {1, 22527},
17895 },
17896 },
17897 },
17898 {
17899 name: "CMPshiftRL",
17900 auxType: auxInt32,
17901 argLen: 2,
17902 asm: arm.ACMP,
17903 reg: regInfo{
17904 inputs: []inputInfo{
17905 {0, 22527},
17906 {1, 22527},
17907 },
17908 },
17909 },
17910 {
17911 name: "CMPshiftRA",
17912 auxType: auxInt32,
17913 argLen: 2,
17914 asm: arm.ACMP,
17915 reg: regInfo{
17916 inputs: []inputInfo{
17917 {0, 22527},
17918 {1, 22527},
17919 },
17920 },
17921 },
17922 {
17923 name: "CMNshiftLL",
17924 auxType: auxInt32,
17925 argLen: 2,
17926 asm: arm.ACMN,
17927 reg: regInfo{
17928 inputs: []inputInfo{
17929 {0, 22527},
17930 {1, 22527},
17931 },
17932 },
17933 },
17934 {
17935 name: "CMNshiftRL",
17936 auxType: auxInt32,
17937 argLen: 2,
17938 asm: arm.ACMN,
17939 reg: regInfo{
17940 inputs: []inputInfo{
17941 {0, 22527},
17942 {1, 22527},
17943 },
17944 },
17945 },
17946 {
17947 name: "CMNshiftRA",
17948 auxType: auxInt32,
17949 argLen: 2,
17950 asm: arm.ACMN,
17951 reg: regInfo{
17952 inputs: []inputInfo{
17953 {0, 22527},
17954 {1, 22527},
17955 },
17956 },
17957 },
17958 {
17959 name: "TSTshiftLL",
17960 auxType: auxInt32,
17961 argLen: 2,
17962 asm: arm.ATST,
17963 reg: regInfo{
17964 inputs: []inputInfo{
17965 {0, 22527},
17966 {1, 22527},
17967 },
17968 },
17969 },
17970 {
17971 name: "TSTshiftRL",
17972 auxType: auxInt32,
17973 argLen: 2,
17974 asm: arm.ATST,
17975 reg: regInfo{
17976 inputs: []inputInfo{
17977 {0, 22527},
17978 {1, 22527},
17979 },
17980 },
17981 },
17982 {
17983 name: "TSTshiftRA",
17984 auxType: auxInt32,
17985 argLen: 2,
17986 asm: arm.ATST,
17987 reg: regInfo{
17988 inputs: []inputInfo{
17989 {0, 22527},
17990 {1, 22527},
17991 },
17992 },
17993 },
17994 {
17995 name: "TEQshiftLL",
17996 auxType: auxInt32,
17997 argLen: 2,
17998 asm: arm.ATEQ,
17999 reg: regInfo{
18000 inputs: []inputInfo{
18001 {0, 22527},
18002 {1, 22527},
18003 },
18004 },
18005 },
18006 {
18007 name: "TEQshiftRL",
18008 auxType: auxInt32,
18009 argLen: 2,
18010 asm: arm.ATEQ,
18011 reg: regInfo{
18012 inputs: []inputInfo{
18013 {0, 22527},
18014 {1, 22527},
18015 },
18016 },
18017 },
18018 {
18019 name: "TEQshiftRA",
18020 auxType: auxInt32,
18021 argLen: 2,
18022 asm: arm.ATEQ,
18023 reg: regInfo{
18024 inputs: []inputInfo{
18025 {0, 22527},
18026 {1, 22527},
18027 },
18028 },
18029 },
18030 {
18031 name: "CMPshiftLLreg",
18032 argLen: 3,
18033 asm: arm.ACMP,
18034 reg: regInfo{
18035 inputs: []inputInfo{
18036 {0, 21503},
18037 {1, 21503},
18038 {2, 21503},
18039 },
18040 },
18041 },
18042 {
18043 name: "CMPshiftRLreg",
18044 argLen: 3,
18045 asm: arm.ACMP,
18046 reg: regInfo{
18047 inputs: []inputInfo{
18048 {0, 21503},
18049 {1, 21503},
18050 {2, 21503},
18051 },
18052 },
18053 },
18054 {
18055 name: "CMPshiftRAreg",
18056 argLen: 3,
18057 asm: arm.ACMP,
18058 reg: regInfo{
18059 inputs: []inputInfo{
18060 {0, 21503},
18061 {1, 21503},
18062 {2, 21503},
18063 },
18064 },
18065 },
18066 {
18067 name: "CMNshiftLLreg",
18068 argLen: 3,
18069 asm: arm.ACMN,
18070 reg: regInfo{
18071 inputs: []inputInfo{
18072 {0, 21503},
18073 {1, 21503},
18074 {2, 21503},
18075 },
18076 },
18077 },
18078 {
18079 name: "CMNshiftRLreg",
18080 argLen: 3,
18081 asm: arm.ACMN,
18082 reg: regInfo{
18083 inputs: []inputInfo{
18084 {0, 21503},
18085 {1, 21503},
18086 {2, 21503},
18087 },
18088 },
18089 },
18090 {
18091 name: "CMNshiftRAreg",
18092 argLen: 3,
18093 asm: arm.ACMN,
18094 reg: regInfo{
18095 inputs: []inputInfo{
18096 {0, 21503},
18097 {1, 21503},
18098 {2, 21503},
18099 },
18100 },
18101 },
18102 {
18103 name: "TSTshiftLLreg",
18104 argLen: 3,
18105 asm: arm.ATST,
18106 reg: regInfo{
18107 inputs: []inputInfo{
18108 {0, 21503},
18109 {1, 21503},
18110 {2, 21503},
18111 },
18112 },
18113 },
18114 {
18115 name: "TSTshiftRLreg",
18116 argLen: 3,
18117 asm: arm.ATST,
18118 reg: regInfo{
18119 inputs: []inputInfo{
18120 {0, 21503},
18121 {1, 21503},
18122 {2, 21503},
18123 },
18124 },
18125 },
18126 {
18127 name: "TSTshiftRAreg",
18128 argLen: 3,
18129 asm: arm.ATST,
18130 reg: regInfo{
18131 inputs: []inputInfo{
18132 {0, 21503},
18133 {1, 21503},
18134 {2, 21503},
18135 },
18136 },
18137 },
18138 {
18139 name: "TEQshiftLLreg",
18140 argLen: 3,
18141 asm: arm.ATEQ,
18142 reg: regInfo{
18143 inputs: []inputInfo{
18144 {0, 21503},
18145 {1, 21503},
18146 {2, 21503},
18147 },
18148 },
18149 },
18150 {
18151 name: "TEQshiftRLreg",
18152 argLen: 3,
18153 asm: arm.ATEQ,
18154 reg: regInfo{
18155 inputs: []inputInfo{
18156 {0, 21503},
18157 {1, 21503},
18158 {2, 21503},
18159 },
18160 },
18161 },
18162 {
18163 name: "TEQshiftRAreg",
18164 argLen: 3,
18165 asm: arm.ATEQ,
18166 reg: regInfo{
18167 inputs: []inputInfo{
18168 {0, 21503},
18169 {1, 21503},
18170 {2, 21503},
18171 },
18172 },
18173 },
18174 {
18175 name: "CMPF0",
18176 argLen: 1,
18177 asm: arm.ACMPF,
18178 reg: regInfo{
18179 inputs: []inputInfo{
18180 {0, 4294901760},
18181 },
18182 },
18183 },
18184 {
18185 name: "CMPD0",
18186 argLen: 1,
18187 asm: arm.ACMPD,
18188 reg: regInfo{
18189 inputs: []inputInfo{
18190 {0, 4294901760},
18191 },
18192 },
18193 },
18194 {
18195 name: "MOVWconst",
18196 auxType: auxInt32,
18197 argLen: 0,
18198 rematerializeable: true,
18199 asm: arm.AMOVW,
18200 reg: regInfo{
18201 outputs: []outputInfo{
18202 {0, 21503},
18203 },
18204 },
18205 },
18206 {
18207 name: "MOVFconst",
18208 auxType: auxFloat64,
18209 argLen: 0,
18210 rematerializeable: true,
18211 asm: arm.AMOVF,
18212 reg: regInfo{
18213 outputs: []outputInfo{
18214 {0, 4294901760},
18215 },
18216 },
18217 },
18218 {
18219 name: "MOVDconst",
18220 auxType: auxFloat64,
18221 argLen: 0,
18222 rematerializeable: true,
18223 asm: arm.AMOVD,
18224 reg: regInfo{
18225 outputs: []outputInfo{
18226 {0, 4294901760},
18227 },
18228 },
18229 },
18230 {
18231 name: "MOVWaddr",
18232 auxType: auxSymOff,
18233 argLen: 1,
18234 rematerializeable: true,
18235 symEffect: SymAddr,
18236 asm: arm.AMOVW,
18237 reg: regInfo{
18238 inputs: []inputInfo{
18239 {0, 4294975488},
18240 },
18241 outputs: []outputInfo{
18242 {0, 21503},
18243 },
18244 },
18245 },
18246 {
18247 name: "MOVBload",
18248 auxType: auxSymOff,
18249 argLen: 2,
18250 faultOnNilArg0: true,
18251 symEffect: SymRead,
18252 asm: arm.AMOVB,
18253 reg: regInfo{
18254 inputs: []inputInfo{
18255 {0, 4294998015},
18256 },
18257 outputs: []outputInfo{
18258 {0, 21503},
18259 },
18260 },
18261 },
18262 {
18263 name: "MOVBUload",
18264 auxType: auxSymOff,
18265 argLen: 2,
18266 faultOnNilArg0: true,
18267 symEffect: SymRead,
18268 asm: arm.AMOVBU,
18269 reg: regInfo{
18270 inputs: []inputInfo{
18271 {0, 4294998015},
18272 },
18273 outputs: []outputInfo{
18274 {0, 21503},
18275 },
18276 },
18277 },
18278 {
18279 name: "MOVHload",
18280 auxType: auxSymOff,
18281 argLen: 2,
18282 faultOnNilArg0: true,
18283 symEffect: SymRead,
18284 asm: arm.AMOVH,
18285 reg: regInfo{
18286 inputs: []inputInfo{
18287 {0, 4294998015},
18288 },
18289 outputs: []outputInfo{
18290 {0, 21503},
18291 },
18292 },
18293 },
18294 {
18295 name: "MOVHUload",
18296 auxType: auxSymOff,
18297 argLen: 2,
18298 faultOnNilArg0: true,
18299 symEffect: SymRead,
18300 asm: arm.AMOVHU,
18301 reg: regInfo{
18302 inputs: []inputInfo{
18303 {0, 4294998015},
18304 },
18305 outputs: []outputInfo{
18306 {0, 21503},
18307 },
18308 },
18309 },
18310 {
18311 name: "MOVWload",
18312 auxType: auxSymOff,
18313 argLen: 2,
18314 faultOnNilArg0: true,
18315 symEffect: SymRead,
18316 asm: arm.AMOVW,
18317 reg: regInfo{
18318 inputs: []inputInfo{
18319 {0, 4294998015},
18320 },
18321 outputs: []outputInfo{
18322 {0, 21503},
18323 },
18324 },
18325 },
18326 {
18327 name: "MOVFload",
18328 auxType: auxSymOff,
18329 argLen: 2,
18330 faultOnNilArg0: true,
18331 symEffect: SymRead,
18332 asm: arm.AMOVF,
18333 reg: regInfo{
18334 inputs: []inputInfo{
18335 {0, 4294998015},
18336 },
18337 outputs: []outputInfo{
18338 {0, 4294901760},
18339 },
18340 },
18341 },
18342 {
18343 name: "MOVDload",
18344 auxType: auxSymOff,
18345 argLen: 2,
18346 faultOnNilArg0: true,
18347 symEffect: SymRead,
18348 asm: arm.AMOVD,
18349 reg: regInfo{
18350 inputs: []inputInfo{
18351 {0, 4294998015},
18352 },
18353 outputs: []outputInfo{
18354 {0, 4294901760},
18355 },
18356 },
18357 },
18358 {
18359 name: "MOVBstore",
18360 auxType: auxSymOff,
18361 argLen: 3,
18362 faultOnNilArg0: true,
18363 symEffect: SymWrite,
18364 asm: arm.AMOVB,
18365 reg: regInfo{
18366 inputs: []inputInfo{
18367 {1, 22527},
18368 {0, 4294998015},
18369 },
18370 },
18371 },
18372 {
18373 name: "MOVHstore",
18374 auxType: auxSymOff,
18375 argLen: 3,
18376 faultOnNilArg0: true,
18377 symEffect: SymWrite,
18378 asm: arm.AMOVH,
18379 reg: regInfo{
18380 inputs: []inputInfo{
18381 {1, 22527},
18382 {0, 4294998015},
18383 },
18384 },
18385 },
18386 {
18387 name: "MOVWstore",
18388 auxType: auxSymOff,
18389 argLen: 3,
18390 faultOnNilArg0: true,
18391 symEffect: SymWrite,
18392 asm: arm.AMOVW,
18393 reg: regInfo{
18394 inputs: []inputInfo{
18395 {1, 22527},
18396 {0, 4294998015},
18397 },
18398 },
18399 },
18400 {
18401 name: "MOVFstore",
18402 auxType: auxSymOff,
18403 argLen: 3,
18404 faultOnNilArg0: true,
18405 symEffect: SymWrite,
18406 asm: arm.AMOVF,
18407 reg: regInfo{
18408 inputs: []inputInfo{
18409 {0, 4294998015},
18410 {1, 4294901760},
18411 },
18412 },
18413 },
18414 {
18415 name: "MOVDstore",
18416 auxType: auxSymOff,
18417 argLen: 3,
18418 faultOnNilArg0: true,
18419 symEffect: SymWrite,
18420 asm: arm.AMOVD,
18421 reg: regInfo{
18422 inputs: []inputInfo{
18423 {0, 4294998015},
18424 {1, 4294901760},
18425 },
18426 },
18427 },
18428 {
18429 name: "MOVWloadidx",
18430 argLen: 3,
18431 asm: arm.AMOVW,
18432 reg: regInfo{
18433 inputs: []inputInfo{
18434 {1, 22527},
18435 {0, 4294998015},
18436 },
18437 outputs: []outputInfo{
18438 {0, 21503},
18439 },
18440 },
18441 },
18442 {
18443 name: "MOVWloadshiftLL",
18444 auxType: auxInt32,
18445 argLen: 3,
18446 asm: arm.AMOVW,
18447 reg: regInfo{
18448 inputs: []inputInfo{
18449 {1, 22527},
18450 {0, 4294998015},
18451 },
18452 outputs: []outputInfo{
18453 {0, 21503},
18454 },
18455 },
18456 },
18457 {
18458 name: "MOVWloadshiftRL",
18459 auxType: auxInt32,
18460 argLen: 3,
18461 asm: arm.AMOVW,
18462 reg: regInfo{
18463 inputs: []inputInfo{
18464 {1, 22527},
18465 {0, 4294998015},
18466 },
18467 outputs: []outputInfo{
18468 {0, 21503},
18469 },
18470 },
18471 },
18472 {
18473 name: "MOVWloadshiftRA",
18474 auxType: auxInt32,
18475 argLen: 3,
18476 asm: arm.AMOVW,
18477 reg: regInfo{
18478 inputs: []inputInfo{
18479 {1, 22527},
18480 {0, 4294998015},
18481 },
18482 outputs: []outputInfo{
18483 {0, 21503},
18484 },
18485 },
18486 },
18487 {
18488 name: "MOVBUloadidx",
18489 argLen: 3,
18490 asm: arm.AMOVBU,
18491 reg: regInfo{
18492 inputs: []inputInfo{
18493 {1, 22527},
18494 {0, 4294998015},
18495 },
18496 outputs: []outputInfo{
18497 {0, 21503},
18498 },
18499 },
18500 },
18501 {
18502 name: "MOVBloadidx",
18503 argLen: 3,
18504 asm: arm.AMOVB,
18505 reg: regInfo{
18506 inputs: []inputInfo{
18507 {1, 22527},
18508 {0, 4294998015},
18509 },
18510 outputs: []outputInfo{
18511 {0, 21503},
18512 },
18513 },
18514 },
18515 {
18516 name: "MOVHUloadidx",
18517 argLen: 3,
18518 asm: arm.AMOVHU,
18519 reg: regInfo{
18520 inputs: []inputInfo{
18521 {1, 22527},
18522 {0, 4294998015},
18523 },
18524 outputs: []outputInfo{
18525 {0, 21503},
18526 },
18527 },
18528 },
18529 {
18530 name: "MOVHloadidx",
18531 argLen: 3,
18532 asm: arm.AMOVH,
18533 reg: regInfo{
18534 inputs: []inputInfo{
18535 {1, 22527},
18536 {0, 4294998015},
18537 },
18538 outputs: []outputInfo{
18539 {0, 21503},
18540 },
18541 },
18542 },
18543 {
18544 name: "MOVWstoreidx",
18545 argLen: 4,
18546 asm: arm.AMOVW,
18547 reg: regInfo{
18548 inputs: []inputInfo{
18549 {1, 22527},
18550 {2, 22527},
18551 {0, 4294998015},
18552 },
18553 },
18554 },
18555 {
18556 name: "MOVWstoreshiftLL",
18557 auxType: auxInt32,
18558 argLen: 4,
18559 asm: arm.AMOVW,
18560 reg: regInfo{
18561 inputs: []inputInfo{
18562 {1, 22527},
18563 {2, 22527},
18564 {0, 4294998015},
18565 },
18566 },
18567 },
18568 {
18569 name: "MOVWstoreshiftRL",
18570 auxType: auxInt32,
18571 argLen: 4,
18572 asm: arm.AMOVW,
18573 reg: regInfo{
18574 inputs: []inputInfo{
18575 {1, 22527},
18576 {2, 22527},
18577 {0, 4294998015},
18578 },
18579 },
18580 },
18581 {
18582 name: "MOVWstoreshiftRA",
18583 auxType: auxInt32,
18584 argLen: 4,
18585 asm: arm.AMOVW,
18586 reg: regInfo{
18587 inputs: []inputInfo{
18588 {1, 22527},
18589 {2, 22527},
18590 {0, 4294998015},
18591 },
18592 },
18593 },
18594 {
18595 name: "MOVBstoreidx",
18596 argLen: 4,
18597 asm: arm.AMOVB,
18598 reg: regInfo{
18599 inputs: []inputInfo{
18600 {1, 22527},
18601 {2, 22527},
18602 {0, 4294998015},
18603 },
18604 },
18605 },
18606 {
18607 name: "MOVHstoreidx",
18608 argLen: 4,
18609 asm: arm.AMOVH,
18610 reg: regInfo{
18611 inputs: []inputInfo{
18612 {1, 22527},
18613 {2, 22527},
18614 {0, 4294998015},
18615 },
18616 },
18617 },
18618 {
18619 name: "MOVBreg",
18620 argLen: 1,
18621 asm: arm.AMOVBS,
18622 reg: regInfo{
18623 inputs: []inputInfo{
18624 {0, 22527},
18625 },
18626 outputs: []outputInfo{
18627 {0, 21503},
18628 },
18629 },
18630 },
18631 {
18632 name: "MOVBUreg",
18633 argLen: 1,
18634 asm: arm.AMOVBU,
18635 reg: regInfo{
18636 inputs: []inputInfo{
18637 {0, 22527},
18638 },
18639 outputs: []outputInfo{
18640 {0, 21503},
18641 },
18642 },
18643 },
18644 {
18645 name: "MOVHreg",
18646 argLen: 1,
18647 asm: arm.AMOVHS,
18648 reg: regInfo{
18649 inputs: []inputInfo{
18650 {0, 22527},
18651 },
18652 outputs: []outputInfo{
18653 {0, 21503},
18654 },
18655 },
18656 },
18657 {
18658 name: "MOVHUreg",
18659 argLen: 1,
18660 asm: arm.AMOVHU,
18661 reg: regInfo{
18662 inputs: []inputInfo{
18663 {0, 22527},
18664 },
18665 outputs: []outputInfo{
18666 {0, 21503},
18667 },
18668 },
18669 },
18670 {
18671 name: "MOVWreg",
18672 argLen: 1,
18673 asm: arm.AMOVW,
18674 reg: regInfo{
18675 inputs: []inputInfo{
18676 {0, 22527},
18677 },
18678 outputs: []outputInfo{
18679 {0, 21503},
18680 },
18681 },
18682 },
18683 {
18684 name: "MOVWnop",
18685 argLen: 1,
18686 resultInArg0: true,
18687 reg: regInfo{
18688 inputs: []inputInfo{
18689 {0, 21503},
18690 },
18691 outputs: []outputInfo{
18692 {0, 21503},
18693 },
18694 },
18695 },
18696 {
18697 name: "MOVWF",
18698 argLen: 1,
18699 asm: arm.AMOVWF,
18700 reg: regInfo{
18701 inputs: []inputInfo{
18702 {0, 21503},
18703 },
18704 clobbers: 2147483648,
18705 outputs: []outputInfo{
18706 {0, 4294901760},
18707 },
18708 },
18709 },
18710 {
18711 name: "MOVWD",
18712 argLen: 1,
18713 asm: arm.AMOVWD,
18714 reg: regInfo{
18715 inputs: []inputInfo{
18716 {0, 21503},
18717 },
18718 clobbers: 2147483648,
18719 outputs: []outputInfo{
18720 {0, 4294901760},
18721 },
18722 },
18723 },
18724 {
18725 name: "MOVWUF",
18726 argLen: 1,
18727 asm: arm.AMOVWF,
18728 reg: regInfo{
18729 inputs: []inputInfo{
18730 {0, 21503},
18731 },
18732 clobbers: 2147483648,
18733 outputs: []outputInfo{
18734 {0, 4294901760},
18735 },
18736 },
18737 },
18738 {
18739 name: "MOVWUD",
18740 argLen: 1,
18741 asm: arm.AMOVWD,
18742 reg: regInfo{
18743 inputs: []inputInfo{
18744 {0, 21503},
18745 },
18746 clobbers: 2147483648,
18747 outputs: []outputInfo{
18748 {0, 4294901760},
18749 },
18750 },
18751 },
18752 {
18753 name: "MOVFW",
18754 argLen: 1,
18755 asm: arm.AMOVFW,
18756 reg: regInfo{
18757 inputs: []inputInfo{
18758 {0, 4294901760},
18759 },
18760 clobbers: 2147483648,
18761 outputs: []outputInfo{
18762 {0, 21503},
18763 },
18764 },
18765 },
18766 {
18767 name: "MOVDW",
18768 argLen: 1,
18769 asm: arm.AMOVDW,
18770 reg: regInfo{
18771 inputs: []inputInfo{
18772 {0, 4294901760},
18773 },
18774 clobbers: 2147483648,
18775 outputs: []outputInfo{
18776 {0, 21503},
18777 },
18778 },
18779 },
18780 {
18781 name: "MOVFWU",
18782 argLen: 1,
18783 asm: arm.AMOVFW,
18784 reg: regInfo{
18785 inputs: []inputInfo{
18786 {0, 4294901760},
18787 },
18788 clobbers: 2147483648,
18789 outputs: []outputInfo{
18790 {0, 21503},
18791 },
18792 },
18793 },
18794 {
18795 name: "MOVDWU",
18796 argLen: 1,
18797 asm: arm.AMOVDW,
18798 reg: regInfo{
18799 inputs: []inputInfo{
18800 {0, 4294901760},
18801 },
18802 clobbers: 2147483648,
18803 outputs: []outputInfo{
18804 {0, 21503},
18805 },
18806 },
18807 },
18808 {
18809 name: "MOVFD",
18810 argLen: 1,
18811 asm: arm.AMOVFD,
18812 reg: regInfo{
18813 inputs: []inputInfo{
18814 {0, 4294901760},
18815 },
18816 outputs: []outputInfo{
18817 {0, 4294901760},
18818 },
18819 },
18820 },
18821 {
18822 name: "MOVDF",
18823 argLen: 1,
18824 asm: arm.AMOVDF,
18825 reg: regInfo{
18826 inputs: []inputInfo{
18827 {0, 4294901760},
18828 },
18829 outputs: []outputInfo{
18830 {0, 4294901760},
18831 },
18832 },
18833 },
18834 {
18835 name: "CMOVWHSconst",
18836 auxType: auxInt32,
18837 argLen: 2,
18838 resultInArg0: true,
18839 asm: arm.AMOVW,
18840 reg: regInfo{
18841 inputs: []inputInfo{
18842 {0, 21503},
18843 },
18844 outputs: []outputInfo{
18845 {0, 21503},
18846 },
18847 },
18848 },
18849 {
18850 name: "CMOVWLSconst",
18851 auxType: auxInt32,
18852 argLen: 2,
18853 resultInArg0: true,
18854 asm: arm.AMOVW,
18855 reg: regInfo{
18856 inputs: []inputInfo{
18857 {0, 21503},
18858 },
18859 outputs: []outputInfo{
18860 {0, 21503},
18861 },
18862 },
18863 },
18864 {
18865 name: "SRAcond",
18866 argLen: 3,
18867 asm: arm.ASRA,
18868 reg: regInfo{
18869 inputs: []inputInfo{
18870 {0, 21503},
18871 {1, 21503},
18872 },
18873 outputs: []outputInfo{
18874 {0, 21503},
18875 },
18876 },
18877 },
18878 {
18879 name: "CALLstatic",
18880 auxType: auxCallOff,
18881 argLen: 1,
18882 clobberFlags: true,
18883 call: true,
18884 reg: regInfo{
18885 clobbers: 4294924287,
18886 },
18887 },
18888 {
18889 name: "CALLtail",
18890 auxType: auxCallOff,
18891 argLen: 1,
18892 clobberFlags: true,
18893 call: true,
18894 tailCall: true,
18895 reg: regInfo{
18896 clobbers: 4294924287,
18897 },
18898 },
18899 {
18900 name: "CALLclosure",
18901 auxType: auxCallOff,
18902 argLen: 3,
18903 clobberFlags: true,
18904 call: true,
18905 reg: regInfo{
18906 inputs: []inputInfo{
18907 {1, 128},
18908 {0, 29695},
18909 },
18910 clobbers: 4294924287,
18911 },
18912 },
18913 {
18914 name: "CALLinter",
18915 auxType: auxCallOff,
18916 argLen: 2,
18917 clobberFlags: true,
18918 call: true,
18919 reg: regInfo{
18920 inputs: []inputInfo{
18921 {0, 21503},
18922 },
18923 clobbers: 4294924287,
18924 },
18925 },
18926 {
18927 name: "LoweredNilCheck",
18928 argLen: 2,
18929 nilCheck: true,
18930 faultOnNilArg0: true,
18931 reg: regInfo{
18932 inputs: []inputInfo{
18933 {0, 22527},
18934 },
18935 },
18936 },
18937 {
18938 name: "Equal",
18939 argLen: 1,
18940 reg: regInfo{
18941 outputs: []outputInfo{
18942 {0, 21503},
18943 },
18944 },
18945 },
18946 {
18947 name: "NotEqual",
18948 argLen: 1,
18949 reg: regInfo{
18950 outputs: []outputInfo{
18951 {0, 21503},
18952 },
18953 },
18954 },
18955 {
18956 name: "LessThan",
18957 argLen: 1,
18958 reg: regInfo{
18959 outputs: []outputInfo{
18960 {0, 21503},
18961 },
18962 },
18963 },
18964 {
18965 name: "LessEqual",
18966 argLen: 1,
18967 reg: regInfo{
18968 outputs: []outputInfo{
18969 {0, 21503},
18970 },
18971 },
18972 },
18973 {
18974 name: "GreaterThan",
18975 argLen: 1,
18976 reg: regInfo{
18977 outputs: []outputInfo{
18978 {0, 21503},
18979 },
18980 },
18981 },
18982 {
18983 name: "GreaterEqual",
18984 argLen: 1,
18985 reg: regInfo{
18986 outputs: []outputInfo{
18987 {0, 21503},
18988 },
18989 },
18990 },
18991 {
18992 name: "LessThanU",
18993 argLen: 1,
18994 reg: regInfo{
18995 outputs: []outputInfo{
18996 {0, 21503},
18997 },
18998 },
18999 },
19000 {
19001 name: "LessEqualU",
19002 argLen: 1,
19003 reg: regInfo{
19004 outputs: []outputInfo{
19005 {0, 21503},
19006 },
19007 },
19008 },
19009 {
19010 name: "GreaterThanU",
19011 argLen: 1,
19012 reg: regInfo{
19013 outputs: []outputInfo{
19014 {0, 21503},
19015 },
19016 },
19017 },
19018 {
19019 name: "GreaterEqualU",
19020 argLen: 1,
19021 reg: regInfo{
19022 outputs: []outputInfo{
19023 {0, 21503},
19024 },
19025 },
19026 },
19027 {
19028 name: "DUFFZERO",
19029 auxType: auxInt64,
19030 argLen: 3,
19031 faultOnNilArg0: true,
19032 reg: regInfo{
19033 inputs: []inputInfo{
19034 {0, 2},
19035 {1, 1},
19036 },
19037 clobbers: 20482,
19038 },
19039 },
19040 {
19041 name: "DUFFCOPY",
19042 auxType: auxInt64,
19043 argLen: 3,
19044 faultOnNilArg0: true,
19045 faultOnNilArg1: true,
19046 reg: regInfo{
19047 inputs: []inputInfo{
19048 {0, 4},
19049 {1, 2},
19050 },
19051 clobbers: 20487,
19052 },
19053 },
19054 {
19055 name: "LoweredZero",
19056 auxType: auxInt64,
19057 argLen: 4,
19058 clobberFlags: true,
19059 faultOnNilArg0: true,
19060 reg: regInfo{
19061 inputs: []inputInfo{
19062 {0, 2},
19063 {1, 21503},
19064 {2, 21503},
19065 },
19066 clobbers: 2,
19067 },
19068 },
19069 {
19070 name: "LoweredMove",
19071 auxType: auxInt64,
19072 argLen: 4,
19073 clobberFlags: true,
19074 faultOnNilArg0: true,
19075 faultOnNilArg1: true,
19076 reg: regInfo{
19077 inputs: []inputInfo{
19078 {0, 4},
19079 {1, 2},
19080 {2, 21503},
19081 },
19082 clobbers: 6,
19083 },
19084 },
19085 {
19086 name: "LoweredGetClosurePtr",
19087 argLen: 0,
19088 zeroWidth: true,
19089 reg: regInfo{
19090 outputs: []outputInfo{
19091 {0, 128},
19092 },
19093 },
19094 },
19095 {
19096 name: "LoweredGetCallerSP",
19097 argLen: 1,
19098 rematerializeable: true,
19099 reg: regInfo{
19100 outputs: []outputInfo{
19101 {0, 21503},
19102 },
19103 },
19104 },
19105 {
19106 name: "LoweredGetCallerPC",
19107 argLen: 0,
19108 rematerializeable: true,
19109 reg: regInfo{
19110 outputs: []outputInfo{
19111 {0, 21503},
19112 },
19113 },
19114 },
19115 {
19116 name: "LoweredPanicBoundsA",
19117 auxType: auxInt64,
19118 argLen: 3,
19119 call: true,
19120 reg: regInfo{
19121 inputs: []inputInfo{
19122 {0, 4},
19123 {1, 8},
19124 },
19125 },
19126 },
19127 {
19128 name: "LoweredPanicBoundsB",
19129 auxType: auxInt64,
19130 argLen: 3,
19131 call: true,
19132 reg: regInfo{
19133 inputs: []inputInfo{
19134 {0, 2},
19135 {1, 4},
19136 },
19137 },
19138 },
19139 {
19140 name: "LoweredPanicBoundsC",
19141 auxType: auxInt64,
19142 argLen: 3,
19143 call: true,
19144 reg: regInfo{
19145 inputs: []inputInfo{
19146 {0, 1},
19147 {1, 2},
19148 },
19149 },
19150 },
19151 {
19152 name: "LoweredPanicExtendA",
19153 auxType: auxInt64,
19154 argLen: 4,
19155 call: true,
19156 reg: regInfo{
19157 inputs: []inputInfo{
19158 {0, 16},
19159 {1, 4},
19160 {2, 8},
19161 },
19162 },
19163 },
19164 {
19165 name: "LoweredPanicExtendB",
19166 auxType: auxInt64,
19167 argLen: 4,
19168 call: true,
19169 reg: regInfo{
19170 inputs: []inputInfo{
19171 {0, 16},
19172 {1, 2},
19173 {2, 4},
19174 },
19175 },
19176 },
19177 {
19178 name: "LoweredPanicExtendC",
19179 auxType: auxInt64,
19180 argLen: 4,
19181 call: true,
19182 reg: regInfo{
19183 inputs: []inputInfo{
19184 {0, 16},
19185 {1, 1},
19186 {2, 2},
19187 },
19188 },
19189 },
19190 {
19191 name: "FlagConstant",
19192 auxType: auxFlagConstant,
19193 argLen: 0,
19194 reg: regInfo{},
19195 },
19196 {
19197 name: "InvertFlags",
19198 argLen: 1,
19199 reg: regInfo{},
19200 },
19201 {
19202 name: "LoweredWB",
19203 auxType: auxInt64,
19204 argLen: 1,
19205 clobberFlags: true,
19206 reg: regInfo{
19207 clobbers: 4294922240,
19208 outputs: []outputInfo{
19209 {0, 256},
19210 },
19211 },
19212 },
19213
19214 {
19215 name: "ADCSflags",
19216 argLen: 3,
19217 commutative: true,
19218 asm: arm64.AADCS,
19219 reg: regInfo{
19220 inputs: []inputInfo{
19221 {0, 335544319},
19222 {1, 335544319},
19223 },
19224 outputs: []outputInfo{
19225 {1, 0},
19226 {0, 335544319},
19227 },
19228 },
19229 },
19230 {
19231 name: "ADCzerocarry",
19232 argLen: 1,
19233 asm: arm64.AADC,
19234 reg: regInfo{
19235 outputs: []outputInfo{
19236 {0, 335544319},
19237 },
19238 },
19239 },
19240 {
19241 name: "ADD",
19242 argLen: 2,
19243 commutative: true,
19244 asm: arm64.AADD,
19245 reg: regInfo{
19246 inputs: []inputInfo{
19247 {0, 402653183},
19248 {1, 402653183},
19249 },
19250 outputs: []outputInfo{
19251 {0, 335544319},
19252 },
19253 },
19254 },
19255 {
19256 name: "ADDconst",
19257 auxType: auxInt64,
19258 argLen: 1,
19259 asm: arm64.AADD,
19260 reg: regInfo{
19261 inputs: []inputInfo{
19262 {0, 1476395007},
19263 },
19264 outputs: []outputInfo{
19265 {0, 335544319},
19266 },
19267 },
19268 },
19269 {
19270 name: "ADDSconstflags",
19271 auxType: auxInt64,
19272 argLen: 1,
19273 asm: arm64.AADDS,
19274 reg: regInfo{
19275 inputs: []inputInfo{
19276 {0, 402653183},
19277 },
19278 outputs: []outputInfo{
19279 {1, 0},
19280 {0, 335544319},
19281 },
19282 },
19283 },
19284 {
19285 name: "ADDSflags",
19286 argLen: 2,
19287 commutative: true,
19288 asm: arm64.AADDS,
19289 reg: regInfo{
19290 inputs: []inputInfo{
19291 {0, 335544319},
19292 {1, 335544319},
19293 },
19294 outputs: []outputInfo{
19295 {1, 0},
19296 {0, 335544319},
19297 },
19298 },
19299 },
19300 {
19301 name: "SUB",
19302 argLen: 2,
19303 asm: arm64.ASUB,
19304 reg: regInfo{
19305 inputs: []inputInfo{
19306 {0, 402653183},
19307 {1, 402653183},
19308 },
19309 outputs: []outputInfo{
19310 {0, 335544319},
19311 },
19312 },
19313 },
19314 {
19315 name: "SUBconst",
19316 auxType: auxInt64,
19317 argLen: 1,
19318 asm: arm64.ASUB,
19319 reg: regInfo{
19320 inputs: []inputInfo{
19321 {0, 402653183},
19322 },
19323 outputs: []outputInfo{
19324 {0, 335544319},
19325 },
19326 },
19327 },
19328 {
19329 name: "SBCSflags",
19330 argLen: 3,
19331 asm: arm64.ASBCS,
19332 reg: regInfo{
19333 inputs: []inputInfo{
19334 {0, 335544319},
19335 {1, 335544319},
19336 },
19337 outputs: []outputInfo{
19338 {1, 0},
19339 {0, 335544319},
19340 },
19341 },
19342 },
19343 {
19344 name: "SUBSflags",
19345 argLen: 2,
19346 asm: arm64.ASUBS,
19347 reg: regInfo{
19348 inputs: []inputInfo{
19349 {0, 335544319},
19350 {1, 335544319},
19351 },
19352 outputs: []outputInfo{
19353 {1, 0},
19354 {0, 335544319},
19355 },
19356 },
19357 },
19358 {
19359 name: "MUL",
19360 argLen: 2,
19361 commutative: true,
19362 asm: arm64.AMUL,
19363 reg: regInfo{
19364 inputs: []inputInfo{
19365 {0, 402653183},
19366 {1, 402653183},
19367 },
19368 outputs: []outputInfo{
19369 {0, 335544319},
19370 },
19371 },
19372 },
19373 {
19374 name: "MULW",
19375 argLen: 2,
19376 commutative: true,
19377 asm: arm64.AMULW,
19378 reg: regInfo{
19379 inputs: []inputInfo{
19380 {0, 402653183},
19381 {1, 402653183},
19382 },
19383 outputs: []outputInfo{
19384 {0, 335544319},
19385 },
19386 },
19387 },
19388 {
19389 name: "MNEG",
19390 argLen: 2,
19391 commutative: true,
19392 asm: arm64.AMNEG,
19393 reg: regInfo{
19394 inputs: []inputInfo{
19395 {0, 402653183},
19396 {1, 402653183},
19397 },
19398 outputs: []outputInfo{
19399 {0, 335544319},
19400 },
19401 },
19402 },
19403 {
19404 name: "MNEGW",
19405 argLen: 2,
19406 commutative: true,
19407 asm: arm64.AMNEGW,
19408 reg: regInfo{
19409 inputs: []inputInfo{
19410 {0, 402653183},
19411 {1, 402653183},
19412 },
19413 outputs: []outputInfo{
19414 {0, 335544319},
19415 },
19416 },
19417 },
19418 {
19419 name: "MULH",
19420 argLen: 2,
19421 commutative: true,
19422 asm: arm64.ASMULH,
19423 reg: regInfo{
19424 inputs: []inputInfo{
19425 {0, 402653183},
19426 {1, 402653183},
19427 },
19428 outputs: []outputInfo{
19429 {0, 335544319},
19430 },
19431 },
19432 },
19433 {
19434 name: "UMULH",
19435 argLen: 2,
19436 commutative: true,
19437 asm: arm64.AUMULH,
19438 reg: regInfo{
19439 inputs: []inputInfo{
19440 {0, 402653183},
19441 {1, 402653183},
19442 },
19443 outputs: []outputInfo{
19444 {0, 335544319},
19445 },
19446 },
19447 },
19448 {
19449 name: "MULL",
19450 argLen: 2,
19451 commutative: true,
19452 asm: arm64.ASMULL,
19453 reg: regInfo{
19454 inputs: []inputInfo{
19455 {0, 402653183},
19456 {1, 402653183},
19457 },
19458 outputs: []outputInfo{
19459 {0, 335544319},
19460 },
19461 },
19462 },
19463 {
19464 name: "UMULL",
19465 argLen: 2,
19466 commutative: true,
19467 asm: arm64.AUMULL,
19468 reg: regInfo{
19469 inputs: []inputInfo{
19470 {0, 402653183},
19471 {1, 402653183},
19472 },
19473 outputs: []outputInfo{
19474 {0, 335544319},
19475 },
19476 },
19477 },
19478 {
19479 name: "DIV",
19480 argLen: 2,
19481 asm: arm64.ASDIV,
19482 reg: regInfo{
19483 inputs: []inputInfo{
19484 {0, 402653183},
19485 {1, 402653183},
19486 },
19487 outputs: []outputInfo{
19488 {0, 335544319},
19489 },
19490 },
19491 },
19492 {
19493 name: "UDIV",
19494 argLen: 2,
19495 asm: arm64.AUDIV,
19496 reg: regInfo{
19497 inputs: []inputInfo{
19498 {0, 402653183},
19499 {1, 402653183},
19500 },
19501 outputs: []outputInfo{
19502 {0, 335544319},
19503 },
19504 },
19505 },
19506 {
19507 name: "DIVW",
19508 argLen: 2,
19509 asm: arm64.ASDIVW,
19510 reg: regInfo{
19511 inputs: []inputInfo{
19512 {0, 402653183},
19513 {1, 402653183},
19514 },
19515 outputs: []outputInfo{
19516 {0, 335544319},
19517 },
19518 },
19519 },
19520 {
19521 name: "UDIVW",
19522 argLen: 2,
19523 asm: arm64.AUDIVW,
19524 reg: regInfo{
19525 inputs: []inputInfo{
19526 {0, 402653183},
19527 {1, 402653183},
19528 },
19529 outputs: []outputInfo{
19530 {0, 335544319},
19531 },
19532 },
19533 },
19534 {
19535 name: "MOD",
19536 argLen: 2,
19537 asm: arm64.AREM,
19538 reg: regInfo{
19539 inputs: []inputInfo{
19540 {0, 402653183},
19541 {1, 402653183},
19542 },
19543 outputs: []outputInfo{
19544 {0, 335544319},
19545 },
19546 },
19547 },
19548 {
19549 name: "UMOD",
19550 argLen: 2,
19551 asm: arm64.AUREM,
19552 reg: regInfo{
19553 inputs: []inputInfo{
19554 {0, 402653183},
19555 {1, 402653183},
19556 },
19557 outputs: []outputInfo{
19558 {0, 335544319},
19559 },
19560 },
19561 },
19562 {
19563 name: "MODW",
19564 argLen: 2,
19565 asm: arm64.AREMW,
19566 reg: regInfo{
19567 inputs: []inputInfo{
19568 {0, 402653183},
19569 {1, 402653183},
19570 },
19571 outputs: []outputInfo{
19572 {0, 335544319},
19573 },
19574 },
19575 },
19576 {
19577 name: "UMODW",
19578 argLen: 2,
19579 asm: arm64.AUREMW,
19580 reg: regInfo{
19581 inputs: []inputInfo{
19582 {0, 402653183},
19583 {1, 402653183},
19584 },
19585 outputs: []outputInfo{
19586 {0, 335544319},
19587 },
19588 },
19589 },
19590 {
19591 name: "FADDS",
19592 argLen: 2,
19593 commutative: true,
19594 asm: arm64.AFADDS,
19595 reg: regInfo{
19596 inputs: []inputInfo{
19597 {0, 9223372034707292160},
19598 {1, 9223372034707292160},
19599 },
19600 outputs: []outputInfo{
19601 {0, 9223372034707292160},
19602 },
19603 },
19604 },
19605 {
19606 name: "FADDD",
19607 argLen: 2,
19608 commutative: true,
19609 asm: arm64.AFADDD,
19610 reg: regInfo{
19611 inputs: []inputInfo{
19612 {0, 9223372034707292160},
19613 {1, 9223372034707292160},
19614 },
19615 outputs: []outputInfo{
19616 {0, 9223372034707292160},
19617 },
19618 },
19619 },
19620 {
19621 name: "FSUBS",
19622 argLen: 2,
19623 asm: arm64.AFSUBS,
19624 reg: regInfo{
19625 inputs: []inputInfo{
19626 {0, 9223372034707292160},
19627 {1, 9223372034707292160},
19628 },
19629 outputs: []outputInfo{
19630 {0, 9223372034707292160},
19631 },
19632 },
19633 },
19634 {
19635 name: "FSUBD",
19636 argLen: 2,
19637 asm: arm64.AFSUBD,
19638 reg: regInfo{
19639 inputs: []inputInfo{
19640 {0, 9223372034707292160},
19641 {1, 9223372034707292160},
19642 },
19643 outputs: []outputInfo{
19644 {0, 9223372034707292160},
19645 },
19646 },
19647 },
19648 {
19649 name: "FMULS",
19650 argLen: 2,
19651 commutative: true,
19652 asm: arm64.AFMULS,
19653 reg: regInfo{
19654 inputs: []inputInfo{
19655 {0, 9223372034707292160},
19656 {1, 9223372034707292160},
19657 },
19658 outputs: []outputInfo{
19659 {0, 9223372034707292160},
19660 },
19661 },
19662 },
19663 {
19664 name: "FMULD",
19665 argLen: 2,
19666 commutative: true,
19667 asm: arm64.AFMULD,
19668 reg: regInfo{
19669 inputs: []inputInfo{
19670 {0, 9223372034707292160},
19671 {1, 9223372034707292160},
19672 },
19673 outputs: []outputInfo{
19674 {0, 9223372034707292160},
19675 },
19676 },
19677 },
19678 {
19679 name: "FNMULS",
19680 argLen: 2,
19681 commutative: true,
19682 asm: arm64.AFNMULS,
19683 reg: regInfo{
19684 inputs: []inputInfo{
19685 {0, 9223372034707292160},
19686 {1, 9223372034707292160},
19687 },
19688 outputs: []outputInfo{
19689 {0, 9223372034707292160},
19690 },
19691 },
19692 },
19693 {
19694 name: "FNMULD",
19695 argLen: 2,
19696 commutative: true,
19697 asm: arm64.AFNMULD,
19698 reg: regInfo{
19699 inputs: []inputInfo{
19700 {0, 9223372034707292160},
19701 {1, 9223372034707292160},
19702 },
19703 outputs: []outputInfo{
19704 {0, 9223372034707292160},
19705 },
19706 },
19707 },
19708 {
19709 name: "FDIVS",
19710 argLen: 2,
19711 asm: arm64.AFDIVS,
19712 reg: regInfo{
19713 inputs: []inputInfo{
19714 {0, 9223372034707292160},
19715 {1, 9223372034707292160},
19716 },
19717 outputs: []outputInfo{
19718 {0, 9223372034707292160},
19719 },
19720 },
19721 },
19722 {
19723 name: "FDIVD",
19724 argLen: 2,
19725 asm: arm64.AFDIVD,
19726 reg: regInfo{
19727 inputs: []inputInfo{
19728 {0, 9223372034707292160},
19729 {1, 9223372034707292160},
19730 },
19731 outputs: []outputInfo{
19732 {0, 9223372034707292160},
19733 },
19734 },
19735 },
19736 {
19737 name: "AND",
19738 argLen: 2,
19739 commutative: true,
19740 asm: arm64.AAND,
19741 reg: regInfo{
19742 inputs: []inputInfo{
19743 {0, 402653183},
19744 {1, 402653183},
19745 },
19746 outputs: []outputInfo{
19747 {0, 335544319},
19748 },
19749 },
19750 },
19751 {
19752 name: "ANDconst",
19753 auxType: auxInt64,
19754 argLen: 1,
19755 asm: arm64.AAND,
19756 reg: regInfo{
19757 inputs: []inputInfo{
19758 {0, 402653183},
19759 },
19760 outputs: []outputInfo{
19761 {0, 335544319},
19762 },
19763 },
19764 },
19765 {
19766 name: "OR",
19767 argLen: 2,
19768 commutative: true,
19769 asm: arm64.AORR,
19770 reg: regInfo{
19771 inputs: []inputInfo{
19772 {0, 402653183},
19773 {1, 402653183},
19774 },
19775 outputs: []outputInfo{
19776 {0, 335544319},
19777 },
19778 },
19779 },
19780 {
19781 name: "ORconst",
19782 auxType: auxInt64,
19783 argLen: 1,
19784 asm: arm64.AORR,
19785 reg: regInfo{
19786 inputs: []inputInfo{
19787 {0, 402653183},
19788 },
19789 outputs: []outputInfo{
19790 {0, 335544319},
19791 },
19792 },
19793 },
19794 {
19795 name: "XOR",
19796 argLen: 2,
19797 commutative: true,
19798 asm: arm64.AEOR,
19799 reg: regInfo{
19800 inputs: []inputInfo{
19801 {0, 402653183},
19802 {1, 402653183},
19803 },
19804 outputs: []outputInfo{
19805 {0, 335544319},
19806 },
19807 },
19808 },
19809 {
19810 name: "XORconst",
19811 auxType: auxInt64,
19812 argLen: 1,
19813 asm: arm64.AEOR,
19814 reg: regInfo{
19815 inputs: []inputInfo{
19816 {0, 402653183},
19817 },
19818 outputs: []outputInfo{
19819 {0, 335544319},
19820 },
19821 },
19822 },
19823 {
19824 name: "BIC",
19825 argLen: 2,
19826 asm: arm64.ABIC,
19827 reg: regInfo{
19828 inputs: []inputInfo{
19829 {0, 402653183},
19830 {1, 402653183},
19831 },
19832 outputs: []outputInfo{
19833 {0, 335544319},
19834 },
19835 },
19836 },
19837 {
19838 name: "EON",
19839 argLen: 2,
19840 asm: arm64.AEON,
19841 reg: regInfo{
19842 inputs: []inputInfo{
19843 {0, 402653183},
19844 {1, 402653183},
19845 },
19846 outputs: []outputInfo{
19847 {0, 335544319},
19848 },
19849 },
19850 },
19851 {
19852 name: "ORN",
19853 argLen: 2,
19854 asm: arm64.AORN,
19855 reg: regInfo{
19856 inputs: []inputInfo{
19857 {0, 402653183},
19858 {1, 402653183},
19859 },
19860 outputs: []outputInfo{
19861 {0, 335544319},
19862 },
19863 },
19864 },
19865 {
19866 name: "MVN",
19867 argLen: 1,
19868 asm: arm64.AMVN,
19869 reg: regInfo{
19870 inputs: []inputInfo{
19871 {0, 402653183},
19872 },
19873 outputs: []outputInfo{
19874 {0, 335544319},
19875 },
19876 },
19877 },
19878 {
19879 name: "NEG",
19880 argLen: 1,
19881 asm: arm64.ANEG,
19882 reg: regInfo{
19883 inputs: []inputInfo{
19884 {0, 402653183},
19885 },
19886 outputs: []outputInfo{
19887 {0, 335544319},
19888 },
19889 },
19890 },
19891 {
19892 name: "NEGSflags",
19893 argLen: 1,
19894 asm: arm64.ANEGS,
19895 reg: regInfo{
19896 inputs: []inputInfo{
19897 {0, 402653183},
19898 },
19899 outputs: []outputInfo{
19900 {1, 0},
19901 {0, 335544319},
19902 },
19903 },
19904 },
19905 {
19906 name: "NGCzerocarry",
19907 argLen: 1,
19908 asm: arm64.ANGC,
19909 reg: regInfo{
19910 outputs: []outputInfo{
19911 {0, 335544319},
19912 },
19913 },
19914 },
19915 {
19916 name: "FABSD",
19917 argLen: 1,
19918 asm: arm64.AFABSD,
19919 reg: regInfo{
19920 inputs: []inputInfo{
19921 {0, 9223372034707292160},
19922 },
19923 outputs: []outputInfo{
19924 {0, 9223372034707292160},
19925 },
19926 },
19927 },
19928 {
19929 name: "FNEGS",
19930 argLen: 1,
19931 asm: arm64.AFNEGS,
19932 reg: regInfo{
19933 inputs: []inputInfo{
19934 {0, 9223372034707292160},
19935 },
19936 outputs: []outputInfo{
19937 {0, 9223372034707292160},
19938 },
19939 },
19940 },
19941 {
19942 name: "FNEGD",
19943 argLen: 1,
19944 asm: arm64.AFNEGD,
19945 reg: regInfo{
19946 inputs: []inputInfo{
19947 {0, 9223372034707292160},
19948 },
19949 outputs: []outputInfo{
19950 {0, 9223372034707292160},
19951 },
19952 },
19953 },
19954 {
19955 name: "FSQRTD",
19956 argLen: 1,
19957 asm: arm64.AFSQRTD,
19958 reg: regInfo{
19959 inputs: []inputInfo{
19960 {0, 9223372034707292160},
19961 },
19962 outputs: []outputInfo{
19963 {0, 9223372034707292160},
19964 },
19965 },
19966 },
19967 {
19968 name: "FSQRTS",
19969 argLen: 1,
19970 asm: arm64.AFSQRTS,
19971 reg: regInfo{
19972 inputs: []inputInfo{
19973 {0, 9223372034707292160},
19974 },
19975 outputs: []outputInfo{
19976 {0, 9223372034707292160},
19977 },
19978 },
19979 },
19980 {
19981 name: "FMIND",
19982 argLen: 2,
19983 asm: arm64.AFMIND,
19984 reg: regInfo{
19985 inputs: []inputInfo{
19986 {0, 9223372034707292160},
19987 {1, 9223372034707292160},
19988 },
19989 outputs: []outputInfo{
19990 {0, 9223372034707292160},
19991 },
19992 },
19993 },
19994 {
19995 name: "FMINS",
19996 argLen: 2,
19997 asm: arm64.AFMINS,
19998 reg: regInfo{
19999 inputs: []inputInfo{
20000 {0, 9223372034707292160},
20001 {1, 9223372034707292160},
20002 },
20003 outputs: []outputInfo{
20004 {0, 9223372034707292160},
20005 },
20006 },
20007 },
20008 {
20009 name: "FMAXD",
20010 argLen: 2,
20011 asm: arm64.AFMAXD,
20012 reg: regInfo{
20013 inputs: []inputInfo{
20014 {0, 9223372034707292160},
20015 {1, 9223372034707292160},
20016 },
20017 outputs: []outputInfo{
20018 {0, 9223372034707292160},
20019 },
20020 },
20021 },
20022 {
20023 name: "FMAXS",
20024 argLen: 2,
20025 asm: arm64.AFMAXS,
20026 reg: regInfo{
20027 inputs: []inputInfo{
20028 {0, 9223372034707292160},
20029 {1, 9223372034707292160},
20030 },
20031 outputs: []outputInfo{
20032 {0, 9223372034707292160},
20033 },
20034 },
20035 },
20036 {
20037 name: "REV",
20038 argLen: 1,
20039 asm: arm64.AREV,
20040 reg: regInfo{
20041 inputs: []inputInfo{
20042 {0, 402653183},
20043 },
20044 outputs: []outputInfo{
20045 {0, 335544319},
20046 },
20047 },
20048 },
20049 {
20050 name: "REVW",
20051 argLen: 1,
20052 asm: arm64.AREVW,
20053 reg: regInfo{
20054 inputs: []inputInfo{
20055 {0, 402653183},
20056 },
20057 outputs: []outputInfo{
20058 {0, 335544319},
20059 },
20060 },
20061 },
20062 {
20063 name: "REV16",
20064 argLen: 1,
20065 asm: arm64.AREV16,
20066 reg: regInfo{
20067 inputs: []inputInfo{
20068 {0, 402653183},
20069 },
20070 outputs: []outputInfo{
20071 {0, 335544319},
20072 },
20073 },
20074 },
20075 {
20076 name: "REV16W",
20077 argLen: 1,
20078 asm: arm64.AREV16W,
20079 reg: regInfo{
20080 inputs: []inputInfo{
20081 {0, 402653183},
20082 },
20083 outputs: []outputInfo{
20084 {0, 335544319},
20085 },
20086 },
20087 },
20088 {
20089 name: "RBIT",
20090 argLen: 1,
20091 asm: arm64.ARBIT,
20092 reg: regInfo{
20093 inputs: []inputInfo{
20094 {0, 402653183},
20095 },
20096 outputs: []outputInfo{
20097 {0, 335544319},
20098 },
20099 },
20100 },
20101 {
20102 name: "RBITW",
20103 argLen: 1,
20104 asm: arm64.ARBITW,
20105 reg: regInfo{
20106 inputs: []inputInfo{
20107 {0, 402653183},
20108 },
20109 outputs: []outputInfo{
20110 {0, 335544319},
20111 },
20112 },
20113 },
20114 {
20115 name: "CLZ",
20116 argLen: 1,
20117 asm: arm64.ACLZ,
20118 reg: regInfo{
20119 inputs: []inputInfo{
20120 {0, 402653183},
20121 },
20122 outputs: []outputInfo{
20123 {0, 335544319},
20124 },
20125 },
20126 },
20127 {
20128 name: "CLZW",
20129 argLen: 1,
20130 asm: arm64.ACLZW,
20131 reg: regInfo{
20132 inputs: []inputInfo{
20133 {0, 402653183},
20134 },
20135 outputs: []outputInfo{
20136 {0, 335544319},
20137 },
20138 },
20139 },
20140 {
20141 name: "VCNT",
20142 argLen: 1,
20143 asm: arm64.AVCNT,
20144 reg: regInfo{
20145 inputs: []inputInfo{
20146 {0, 9223372034707292160},
20147 },
20148 outputs: []outputInfo{
20149 {0, 9223372034707292160},
20150 },
20151 },
20152 },
20153 {
20154 name: "VUADDLV",
20155 argLen: 1,
20156 asm: arm64.AVUADDLV,
20157 reg: regInfo{
20158 inputs: []inputInfo{
20159 {0, 9223372034707292160},
20160 },
20161 outputs: []outputInfo{
20162 {0, 9223372034707292160},
20163 },
20164 },
20165 },
20166 {
20167 name: "LoweredRound32F",
20168 argLen: 1,
20169 resultInArg0: true,
20170 zeroWidth: true,
20171 reg: regInfo{
20172 inputs: []inputInfo{
20173 {0, 9223372034707292160},
20174 },
20175 outputs: []outputInfo{
20176 {0, 9223372034707292160},
20177 },
20178 },
20179 },
20180 {
20181 name: "LoweredRound64F",
20182 argLen: 1,
20183 resultInArg0: true,
20184 zeroWidth: true,
20185 reg: regInfo{
20186 inputs: []inputInfo{
20187 {0, 9223372034707292160},
20188 },
20189 outputs: []outputInfo{
20190 {0, 9223372034707292160},
20191 },
20192 },
20193 },
20194 {
20195 name: "FMADDS",
20196 argLen: 3,
20197 asm: arm64.AFMADDS,
20198 reg: regInfo{
20199 inputs: []inputInfo{
20200 {0, 9223372034707292160},
20201 {1, 9223372034707292160},
20202 {2, 9223372034707292160},
20203 },
20204 outputs: []outputInfo{
20205 {0, 9223372034707292160},
20206 },
20207 },
20208 },
20209 {
20210 name: "FMADDD",
20211 argLen: 3,
20212 asm: arm64.AFMADDD,
20213 reg: regInfo{
20214 inputs: []inputInfo{
20215 {0, 9223372034707292160},
20216 {1, 9223372034707292160},
20217 {2, 9223372034707292160},
20218 },
20219 outputs: []outputInfo{
20220 {0, 9223372034707292160},
20221 },
20222 },
20223 },
20224 {
20225 name: "FNMADDS",
20226 argLen: 3,
20227 asm: arm64.AFNMADDS,
20228 reg: regInfo{
20229 inputs: []inputInfo{
20230 {0, 9223372034707292160},
20231 {1, 9223372034707292160},
20232 {2, 9223372034707292160},
20233 },
20234 outputs: []outputInfo{
20235 {0, 9223372034707292160},
20236 },
20237 },
20238 },
20239 {
20240 name: "FNMADDD",
20241 argLen: 3,
20242 asm: arm64.AFNMADDD,
20243 reg: regInfo{
20244 inputs: []inputInfo{
20245 {0, 9223372034707292160},
20246 {1, 9223372034707292160},
20247 {2, 9223372034707292160},
20248 },
20249 outputs: []outputInfo{
20250 {0, 9223372034707292160},
20251 },
20252 },
20253 },
20254 {
20255 name: "FMSUBS",
20256 argLen: 3,
20257 asm: arm64.AFMSUBS,
20258 reg: regInfo{
20259 inputs: []inputInfo{
20260 {0, 9223372034707292160},
20261 {1, 9223372034707292160},
20262 {2, 9223372034707292160},
20263 },
20264 outputs: []outputInfo{
20265 {0, 9223372034707292160},
20266 },
20267 },
20268 },
20269 {
20270 name: "FMSUBD",
20271 argLen: 3,
20272 asm: arm64.AFMSUBD,
20273 reg: regInfo{
20274 inputs: []inputInfo{
20275 {0, 9223372034707292160},
20276 {1, 9223372034707292160},
20277 {2, 9223372034707292160},
20278 },
20279 outputs: []outputInfo{
20280 {0, 9223372034707292160},
20281 },
20282 },
20283 },
20284 {
20285 name: "FNMSUBS",
20286 argLen: 3,
20287 asm: arm64.AFNMSUBS,
20288 reg: regInfo{
20289 inputs: []inputInfo{
20290 {0, 9223372034707292160},
20291 {1, 9223372034707292160},
20292 {2, 9223372034707292160},
20293 },
20294 outputs: []outputInfo{
20295 {0, 9223372034707292160},
20296 },
20297 },
20298 },
20299 {
20300 name: "FNMSUBD",
20301 argLen: 3,
20302 asm: arm64.AFNMSUBD,
20303 reg: regInfo{
20304 inputs: []inputInfo{
20305 {0, 9223372034707292160},
20306 {1, 9223372034707292160},
20307 {2, 9223372034707292160},
20308 },
20309 outputs: []outputInfo{
20310 {0, 9223372034707292160},
20311 },
20312 },
20313 },
20314 {
20315 name: "MADD",
20316 argLen: 3,
20317 asm: arm64.AMADD,
20318 reg: regInfo{
20319 inputs: []inputInfo{
20320 {0, 402653183},
20321 {1, 402653183},
20322 {2, 402653183},
20323 },
20324 outputs: []outputInfo{
20325 {0, 335544319},
20326 },
20327 },
20328 },
20329 {
20330 name: "MADDW",
20331 argLen: 3,
20332 asm: arm64.AMADDW,
20333 reg: regInfo{
20334 inputs: []inputInfo{
20335 {0, 402653183},
20336 {1, 402653183},
20337 {2, 402653183},
20338 },
20339 outputs: []outputInfo{
20340 {0, 335544319},
20341 },
20342 },
20343 },
20344 {
20345 name: "MSUB",
20346 argLen: 3,
20347 asm: arm64.AMSUB,
20348 reg: regInfo{
20349 inputs: []inputInfo{
20350 {0, 402653183},
20351 {1, 402653183},
20352 {2, 402653183},
20353 },
20354 outputs: []outputInfo{
20355 {0, 335544319},
20356 },
20357 },
20358 },
20359 {
20360 name: "MSUBW",
20361 argLen: 3,
20362 asm: arm64.AMSUBW,
20363 reg: regInfo{
20364 inputs: []inputInfo{
20365 {0, 402653183},
20366 {1, 402653183},
20367 {2, 402653183},
20368 },
20369 outputs: []outputInfo{
20370 {0, 335544319},
20371 },
20372 },
20373 },
20374 {
20375 name: "SLL",
20376 argLen: 2,
20377 asm: arm64.ALSL,
20378 reg: regInfo{
20379 inputs: []inputInfo{
20380 {0, 402653183},
20381 {1, 402653183},
20382 },
20383 outputs: []outputInfo{
20384 {0, 335544319},
20385 },
20386 },
20387 },
20388 {
20389 name: "SLLconst",
20390 auxType: auxInt64,
20391 argLen: 1,
20392 asm: arm64.ALSL,
20393 reg: regInfo{
20394 inputs: []inputInfo{
20395 {0, 402653183},
20396 },
20397 outputs: []outputInfo{
20398 {0, 335544319},
20399 },
20400 },
20401 },
20402 {
20403 name: "SRL",
20404 argLen: 2,
20405 asm: arm64.ALSR,
20406 reg: regInfo{
20407 inputs: []inputInfo{
20408 {0, 402653183},
20409 {1, 402653183},
20410 },
20411 outputs: []outputInfo{
20412 {0, 335544319},
20413 },
20414 },
20415 },
20416 {
20417 name: "SRLconst",
20418 auxType: auxInt64,
20419 argLen: 1,
20420 asm: arm64.ALSR,
20421 reg: regInfo{
20422 inputs: []inputInfo{
20423 {0, 402653183},
20424 },
20425 outputs: []outputInfo{
20426 {0, 335544319},
20427 },
20428 },
20429 },
20430 {
20431 name: "SRA",
20432 argLen: 2,
20433 asm: arm64.AASR,
20434 reg: regInfo{
20435 inputs: []inputInfo{
20436 {0, 402653183},
20437 {1, 402653183},
20438 },
20439 outputs: []outputInfo{
20440 {0, 335544319},
20441 },
20442 },
20443 },
20444 {
20445 name: "SRAconst",
20446 auxType: auxInt64,
20447 argLen: 1,
20448 asm: arm64.AASR,
20449 reg: regInfo{
20450 inputs: []inputInfo{
20451 {0, 402653183},
20452 },
20453 outputs: []outputInfo{
20454 {0, 335544319},
20455 },
20456 },
20457 },
20458 {
20459 name: "ROR",
20460 argLen: 2,
20461 asm: arm64.AROR,
20462 reg: regInfo{
20463 inputs: []inputInfo{
20464 {0, 402653183},
20465 {1, 402653183},
20466 },
20467 outputs: []outputInfo{
20468 {0, 335544319},
20469 },
20470 },
20471 },
20472 {
20473 name: "RORW",
20474 argLen: 2,
20475 asm: arm64.ARORW,
20476 reg: regInfo{
20477 inputs: []inputInfo{
20478 {0, 402653183},
20479 {1, 402653183},
20480 },
20481 outputs: []outputInfo{
20482 {0, 335544319},
20483 },
20484 },
20485 },
20486 {
20487 name: "RORconst",
20488 auxType: auxInt64,
20489 argLen: 1,
20490 asm: arm64.AROR,
20491 reg: regInfo{
20492 inputs: []inputInfo{
20493 {0, 402653183},
20494 },
20495 outputs: []outputInfo{
20496 {0, 335544319},
20497 },
20498 },
20499 },
20500 {
20501 name: "RORWconst",
20502 auxType: auxInt64,
20503 argLen: 1,
20504 asm: arm64.ARORW,
20505 reg: regInfo{
20506 inputs: []inputInfo{
20507 {0, 402653183},
20508 },
20509 outputs: []outputInfo{
20510 {0, 335544319},
20511 },
20512 },
20513 },
20514 {
20515 name: "EXTRconst",
20516 auxType: auxInt64,
20517 argLen: 2,
20518 asm: arm64.AEXTR,
20519 reg: regInfo{
20520 inputs: []inputInfo{
20521 {0, 402653183},
20522 {1, 402653183},
20523 },
20524 outputs: []outputInfo{
20525 {0, 335544319},
20526 },
20527 },
20528 },
20529 {
20530 name: "EXTRWconst",
20531 auxType: auxInt64,
20532 argLen: 2,
20533 asm: arm64.AEXTRW,
20534 reg: regInfo{
20535 inputs: []inputInfo{
20536 {0, 402653183},
20537 {1, 402653183},
20538 },
20539 outputs: []outputInfo{
20540 {0, 335544319},
20541 },
20542 },
20543 },
20544 {
20545 name: "CMP",
20546 argLen: 2,
20547 asm: arm64.ACMP,
20548 reg: regInfo{
20549 inputs: []inputInfo{
20550 {0, 402653183},
20551 {1, 402653183},
20552 },
20553 },
20554 },
20555 {
20556 name: "CMPconst",
20557 auxType: auxInt64,
20558 argLen: 1,
20559 asm: arm64.ACMP,
20560 reg: regInfo{
20561 inputs: []inputInfo{
20562 {0, 402653183},
20563 },
20564 },
20565 },
20566 {
20567 name: "CMPW",
20568 argLen: 2,
20569 asm: arm64.ACMPW,
20570 reg: regInfo{
20571 inputs: []inputInfo{
20572 {0, 402653183},
20573 {1, 402653183},
20574 },
20575 },
20576 },
20577 {
20578 name: "CMPWconst",
20579 auxType: auxInt32,
20580 argLen: 1,
20581 asm: arm64.ACMPW,
20582 reg: regInfo{
20583 inputs: []inputInfo{
20584 {0, 402653183},
20585 },
20586 },
20587 },
20588 {
20589 name: "CMN",
20590 argLen: 2,
20591 commutative: true,
20592 asm: arm64.ACMN,
20593 reg: regInfo{
20594 inputs: []inputInfo{
20595 {0, 402653183},
20596 {1, 402653183},
20597 },
20598 },
20599 },
20600 {
20601 name: "CMNconst",
20602 auxType: auxInt64,
20603 argLen: 1,
20604 asm: arm64.ACMN,
20605 reg: regInfo{
20606 inputs: []inputInfo{
20607 {0, 402653183},
20608 },
20609 },
20610 },
20611 {
20612 name: "CMNW",
20613 argLen: 2,
20614 commutative: true,
20615 asm: arm64.ACMNW,
20616 reg: regInfo{
20617 inputs: []inputInfo{
20618 {0, 402653183},
20619 {1, 402653183},
20620 },
20621 },
20622 },
20623 {
20624 name: "CMNWconst",
20625 auxType: auxInt32,
20626 argLen: 1,
20627 asm: arm64.ACMNW,
20628 reg: regInfo{
20629 inputs: []inputInfo{
20630 {0, 402653183},
20631 },
20632 },
20633 },
20634 {
20635 name: "TST",
20636 argLen: 2,
20637 commutative: true,
20638 asm: arm64.ATST,
20639 reg: regInfo{
20640 inputs: []inputInfo{
20641 {0, 402653183},
20642 {1, 402653183},
20643 },
20644 },
20645 },
20646 {
20647 name: "TSTconst",
20648 auxType: auxInt64,
20649 argLen: 1,
20650 asm: arm64.ATST,
20651 reg: regInfo{
20652 inputs: []inputInfo{
20653 {0, 402653183},
20654 },
20655 },
20656 },
20657 {
20658 name: "TSTW",
20659 argLen: 2,
20660 commutative: true,
20661 asm: arm64.ATSTW,
20662 reg: regInfo{
20663 inputs: []inputInfo{
20664 {0, 402653183},
20665 {1, 402653183},
20666 },
20667 },
20668 },
20669 {
20670 name: "TSTWconst",
20671 auxType: auxInt32,
20672 argLen: 1,
20673 asm: arm64.ATSTW,
20674 reg: regInfo{
20675 inputs: []inputInfo{
20676 {0, 402653183},
20677 },
20678 },
20679 },
20680 {
20681 name: "FCMPS",
20682 argLen: 2,
20683 asm: arm64.AFCMPS,
20684 reg: regInfo{
20685 inputs: []inputInfo{
20686 {0, 9223372034707292160},
20687 {1, 9223372034707292160},
20688 },
20689 },
20690 },
20691 {
20692 name: "FCMPD",
20693 argLen: 2,
20694 asm: arm64.AFCMPD,
20695 reg: regInfo{
20696 inputs: []inputInfo{
20697 {0, 9223372034707292160},
20698 {1, 9223372034707292160},
20699 },
20700 },
20701 },
20702 {
20703 name: "FCMPS0",
20704 argLen: 1,
20705 asm: arm64.AFCMPS,
20706 reg: regInfo{
20707 inputs: []inputInfo{
20708 {0, 9223372034707292160},
20709 },
20710 },
20711 },
20712 {
20713 name: "FCMPD0",
20714 argLen: 1,
20715 asm: arm64.AFCMPD,
20716 reg: regInfo{
20717 inputs: []inputInfo{
20718 {0, 9223372034707292160},
20719 },
20720 },
20721 },
20722 {
20723 name: "MVNshiftLL",
20724 auxType: auxInt64,
20725 argLen: 1,
20726 asm: arm64.AMVN,
20727 reg: regInfo{
20728 inputs: []inputInfo{
20729 {0, 402653183},
20730 },
20731 outputs: []outputInfo{
20732 {0, 335544319},
20733 },
20734 },
20735 },
20736 {
20737 name: "MVNshiftRL",
20738 auxType: auxInt64,
20739 argLen: 1,
20740 asm: arm64.AMVN,
20741 reg: regInfo{
20742 inputs: []inputInfo{
20743 {0, 402653183},
20744 },
20745 outputs: []outputInfo{
20746 {0, 335544319},
20747 },
20748 },
20749 },
20750 {
20751 name: "MVNshiftRA",
20752 auxType: auxInt64,
20753 argLen: 1,
20754 asm: arm64.AMVN,
20755 reg: regInfo{
20756 inputs: []inputInfo{
20757 {0, 402653183},
20758 },
20759 outputs: []outputInfo{
20760 {0, 335544319},
20761 },
20762 },
20763 },
20764 {
20765 name: "MVNshiftRO",
20766 auxType: auxInt64,
20767 argLen: 1,
20768 asm: arm64.AMVN,
20769 reg: regInfo{
20770 inputs: []inputInfo{
20771 {0, 402653183},
20772 },
20773 outputs: []outputInfo{
20774 {0, 335544319},
20775 },
20776 },
20777 },
20778 {
20779 name: "NEGshiftLL",
20780 auxType: auxInt64,
20781 argLen: 1,
20782 asm: arm64.ANEG,
20783 reg: regInfo{
20784 inputs: []inputInfo{
20785 {0, 402653183},
20786 },
20787 outputs: []outputInfo{
20788 {0, 335544319},
20789 },
20790 },
20791 },
20792 {
20793 name: "NEGshiftRL",
20794 auxType: auxInt64,
20795 argLen: 1,
20796 asm: arm64.ANEG,
20797 reg: regInfo{
20798 inputs: []inputInfo{
20799 {0, 402653183},
20800 },
20801 outputs: []outputInfo{
20802 {0, 335544319},
20803 },
20804 },
20805 },
20806 {
20807 name: "NEGshiftRA",
20808 auxType: auxInt64,
20809 argLen: 1,
20810 asm: arm64.ANEG,
20811 reg: regInfo{
20812 inputs: []inputInfo{
20813 {0, 402653183},
20814 },
20815 outputs: []outputInfo{
20816 {0, 335544319},
20817 },
20818 },
20819 },
20820 {
20821 name: "ADDshiftLL",
20822 auxType: auxInt64,
20823 argLen: 2,
20824 asm: arm64.AADD,
20825 reg: regInfo{
20826 inputs: []inputInfo{
20827 {0, 402653183},
20828 {1, 402653183},
20829 },
20830 outputs: []outputInfo{
20831 {0, 335544319},
20832 },
20833 },
20834 },
20835 {
20836 name: "ADDshiftRL",
20837 auxType: auxInt64,
20838 argLen: 2,
20839 asm: arm64.AADD,
20840 reg: regInfo{
20841 inputs: []inputInfo{
20842 {0, 402653183},
20843 {1, 402653183},
20844 },
20845 outputs: []outputInfo{
20846 {0, 335544319},
20847 },
20848 },
20849 },
20850 {
20851 name: "ADDshiftRA",
20852 auxType: auxInt64,
20853 argLen: 2,
20854 asm: arm64.AADD,
20855 reg: regInfo{
20856 inputs: []inputInfo{
20857 {0, 402653183},
20858 {1, 402653183},
20859 },
20860 outputs: []outputInfo{
20861 {0, 335544319},
20862 },
20863 },
20864 },
20865 {
20866 name: "SUBshiftLL",
20867 auxType: auxInt64,
20868 argLen: 2,
20869 asm: arm64.ASUB,
20870 reg: regInfo{
20871 inputs: []inputInfo{
20872 {0, 402653183},
20873 {1, 402653183},
20874 },
20875 outputs: []outputInfo{
20876 {0, 335544319},
20877 },
20878 },
20879 },
20880 {
20881 name: "SUBshiftRL",
20882 auxType: auxInt64,
20883 argLen: 2,
20884 asm: arm64.ASUB,
20885 reg: regInfo{
20886 inputs: []inputInfo{
20887 {0, 402653183},
20888 {1, 402653183},
20889 },
20890 outputs: []outputInfo{
20891 {0, 335544319},
20892 },
20893 },
20894 },
20895 {
20896 name: "SUBshiftRA",
20897 auxType: auxInt64,
20898 argLen: 2,
20899 asm: arm64.ASUB,
20900 reg: regInfo{
20901 inputs: []inputInfo{
20902 {0, 402653183},
20903 {1, 402653183},
20904 },
20905 outputs: []outputInfo{
20906 {0, 335544319},
20907 },
20908 },
20909 },
20910 {
20911 name: "ANDshiftLL",
20912 auxType: auxInt64,
20913 argLen: 2,
20914 asm: arm64.AAND,
20915 reg: regInfo{
20916 inputs: []inputInfo{
20917 {0, 402653183},
20918 {1, 402653183},
20919 },
20920 outputs: []outputInfo{
20921 {0, 335544319},
20922 },
20923 },
20924 },
20925 {
20926 name: "ANDshiftRL",
20927 auxType: auxInt64,
20928 argLen: 2,
20929 asm: arm64.AAND,
20930 reg: regInfo{
20931 inputs: []inputInfo{
20932 {0, 402653183},
20933 {1, 402653183},
20934 },
20935 outputs: []outputInfo{
20936 {0, 335544319},
20937 },
20938 },
20939 },
20940 {
20941 name: "ANDshiftRA",
20942 auxType: auxInt64,
20943 argLen: 2,
20944 asm: arm64.AAND,
20945 reg: regInfo{
20946 inputs: []inputInfo{
20947 {0, 402653183},
20948 {1, 402653183},
20949 },
20950 outputs: []outputInfo{
20951 {0, 335544319},
20952 },
20953 },
20954 },
20955 {
20956 name: "ANDshiftRO",
20957 auxType: auxInt64,
20958 argLen: 2,
20959 asm: arm64.AAND,
20960 reg: regInfo{
20961 inputs: []inputInfo{
20962 {0, 402653183},
20963 {1, 402653183},
20964 },
20965 outputs: []outputInfo{
20966 {0, 335544319},
20967 },
20968 },
20969 },
20970 {
20971 name: "ORshiftLL",
20972 auxType: auxInt64,
20973 argLen: 2,
20974 asm: arm64.AORR,
20975 reg: regInfo{
20976 inputs: []inputInfo{
20977 {0, 402653183},
20978 {1, 402653183},
20979 },
20980 outputs: []outputInfo{
20981 {0, 335544319},
20982 },
20983 },
20984 },
20985 {
20986 name: "ORshiftRL",
20987 auxType: auxInt64,
20988 argLen: 2,
20989 asm: arm64.AORR,
20990 reg: regInfo{
20991 inputs: []inputInfo{
20992 {0, 402653183},
20993 {1, 402653183},
20994 },
20995 outputs: []outputInfo{
20996 {0, 335544319},
20997 },
20998 },
20999 },
21000 {
21001 name: "ORshiftRA",
21002 auxType: auxInt64,
21003 argLen: 2,
21004 asm: arm64.AORR,
21005 reg: regInfo{
21006 inputs: []inputInfo{
21007 {0, 402653183},
21008 {1, 402653183},
21009 },
21010 outputs: []outputInfo{
21011 {0, 335544319},
21012 },
21013 },
21014 },
21015 {
21016 name: "ORshiftRO",
21017 auxType: auxInt64,
21018 argLen: 2,
21019 asm: arm64.AORR,
21020 reg: regInfo{
21021 inputs: []inputInfo{
21022 {0, 402653183},
21023 {1, 402653183},
21024 },
21025 outputs: []outputInfo{
21026 {0, 335544319},
21027 },
21028 },
21029 },
21030 {
21031 name: "XORshiftLL",
21032 auxType: auxInt64,
21033 argLen: 2,
21034 asm: arm64.AEOR,
21035 reg: regInfo{
21036 inputs: []inputInfo{
21037 {0, 402653183},
21038 {1, 402653183},
21039 },
21040 outputs: []outputInfo{
21041 {0, 335544319},
21042 },
21043 },
21044 },
21045 {
21046 name: "XORshiftRL",
21047 auxType: auxInt64,
21048 argLen: 2,
21049 asm: arm64.AEOR,
21050 reg: regInfo{
21051 inputs: []inputInfo{
21052 {0, 402653183},
21053 {1, 402653183},
21054 },
21055 outputs: []outputInfo{
21056 {0, 335544319},
21057 },
21058 },
21059 },
21060 {
21061 name: "XORshiftRA",
21062 auxType: auxInt64,
21063 argLen: 2,
21064 asm: arm64.AEOR,
21065 reg: regInfo{
21066 inputs: []inputInfo{
21067 {0, 402653183},
21068 {1, 402653183},
21069 },
21070 outputs: []outputInfo{
21071 {0, 335544319},
21072 },
21073 },
21074 },
21075 {
21076 name: "XORshiftRO",
21077 auxType: auxInt64,
21078 argLen: 2,
21079 asm: arm64.AEOR,
21080 reg: regInfo{
21081 inputs: []inputInfo{
21082 {0, 402653183},
21083 {1, 402653183},
21084 },
21085 outputs: []outputInfo{
21086 {0, 335544319},
21087 },
21088 },
21089 },
21090 {
21091 name: "BICshiftLL",
21092 auxType: auxInt64,
21093 argLen: 2,
21094 asm: arm64.ABIC,
21095 reg: regInfo{
21096 inputs: []inputInfo{
21097 {0, 402653183},
21098 {1, 402653183},
21099 },
21100 outputs: []outputInfo{
21101 {0, 335544319},
21102 },
21103 },
21104 },
21105 {
21106 name: "BICshiftRL",
21107 auxType: auxInt64,
21108 argLen: 2,
21109 asm: arm64.ABIC,
21110 reg: regInfo{
21111 inputs: []inputInfo{
21112 {0, 402653183},
21113 {1, 402653183},
21114 },
21115 outputs: []outputInfo{
21116 {0, 335544319},
21117 },
21118 },
21119 },
21120 {
21121 name: "BICshiftRA",
21122 auxType: auxInt64,
21123 argLen: 2,
21124 asm: arm64.ABIC,
21125 reg: regInfo{
21126 inputs: []inputInfo{
21127 {0, 402653183},
21128 {1, 402653183},
21129 },
21130 outputs: []outputInfo{
21131 {0, 335544319},
21132 },
21133 },
21134 },
21135 {
21136 name: "BICshiftRO",
21137 auxType: auxInt64,
21138 argLen: 2,
21139 asm: arm64.ABIC,
21140 reg: regInfo{
21141 inputs: []inputInfo{
21142 {0, 402653183},
21143 {1, 402653183},
21144 },
21145 outputs: []outputInfo{
21146 {0, 335544319},
21147 },
21148 },
21149 },
21150 {
21151 name: "EONshiftLL",
21152 auxType: auxInt64,
21153 argLen: 2,
21154 asm: arm64.AEON,
21155 reg: regInfo{
21156 inputs: []inputInfo{
21157 {0, 402653183},
21158 {1, 402653183},
21159 },
21160 outputs: []outputInfo{
21161 {0, 335544319},
21162 },
21163 },
21164 },
21165 {
21166 name: "EONshiftRL",
21167 auxType: auxInt64,
21168 argLen: 2,
21169 asm: arm64.AEON,
21170 reg: regInfo{
21171 inputs: []inputInfo{
21172 {0, 402653183},
21173 {1, 402653183},
21174 },
21175 outputs: []outputInfo{
21176 {0, 335544319},
21177 },
21178 },
21179 },
21180 {
21181 name: "EONshiftRA",
21182 auxType: auxInt64,
21183 argLen: 2,
21184 asm: arm64.AEON,
21185 reg: regInfo{
21186 inputs: []inputInfo{
21187 {0, 402653183},
21188 {1, 402653183},
21189 },
21190 outputs: []outputInfo{
21191 {0, 335544319},
21192 },
21193 },
21194 },
21195 {
21196 name: "EONshiftRO",
21197 auxType: auxInt64,
21198 argLen: 2,
21199 asm: arm64.AEON,
21200 reg: regInfo{
21201 inputs: []inputInfo{
21202 {0, 402653183},
21203 {1, 402653183},
21204 },
21205 outputs: []outputInfo{
21206 {0, 335544319},
21207 },
21208 },
21209 },
21210 {
21211 name: "ORNshiftLL",
21212 auxType: auxInt64,
21213 argLen: 2,
21214 asm: arm64.AORN,
21215 reg: regInfo{
21216 inputs: []inputInfo{
21217 {0, 402653183},
21218 {1, 402653183},
21219 },
21220 outputs: []outputInfo{
21221 {0, 335544319},
21222 },
21223 },
21224 },
21225 {
21226 name: "ORNshiftRL",
21227 auxType: auxInt64,
21228 argLen: 2,
21229 asm: arm64.AORN,
21230 reg: regInfo{
21231 inputs: []inputInfo{
21232 {0, 402653183},
21233 {1, 402653183},
21234 },
21235 outputs: []outputInfo{
21236 {0, 335544319},
21237 },
21238 },
21239 },
21240 {
21241 name: "ORNshiftRA",
21242 auxType: auxInt64,
21243 argLen: 2,
21244 asm: arm64.AORN,
21245 reg: regInfo{
21246 inputs: []inputInfo{
21247 {0, 402653183},
21248 {1, 402653183},
21249 },
21250 outputs: []outputInfo{
21251 {0, 335544319},
21252 },
21253 },
21254 },
21255 {
21256 name: "ORNshiftRO",
21257 auxType: auxInt64,
21258 argLen: 2,
21259 asm: arm64.AORN,
21260 reg: regInfo{
21261 inputs: []inputInfo{
21262 {0, 402653183},
21263 {1, 402653183},
21264 },
21265 outputs: []outputInfo{
21266 {0, 335544319},
21267 },
21268 },
21269 },
21270 {
21271 name: "CMPshiftLL",
21272 auxType: auxInt64,
21273 argLen: 2,
21274 asm: arm64.ACMP,
21275 reg: regInfo{
21276 inputs: []inputInfo{
21277 {0, 402653183},
21278 {1, 402653183},
21279 },
21280 },
21281 },
21282 {
21283 name: "CMPshiftRL",
21284 auxType: auxInt64,
21285 argLen: 2,
21286 asm: arm64.ACMP,
21287 reg: regInfo{
21288 inputs: []inputInfo{
21289 {0, 402653183},
21290 {1, 402653183},
21291 },
21292 },
21293 },
21294 {
21295 name: "CMPshiftRA",
21296 auxType: auxInt64,
21297 argLen: 2,
21298 asm: arm64.ACMP,
21299 reg: regInfo{
21300 inputs: []inputInfo{
21301 {0, 402653183},
21302 {1, 402653183},
21303 },
21304 },
21305 },
21306 {
21307 name: "CMNshiftLL",
21308 auxType: auxInt64,
21309 argLen: 2,
21310 asm: arm64.ACMN,
21311 reg: regInfo{
21312 inputs: []inputInfo{
21313 {0, 402653183},
21314 {1, 402653183},
21315 },
21316 },
21317 },
21318 {
21319 name: "CMNshiftRL",
21320 auxType: auxInt64,
21321 argLen: 2,
21322 asm: arm64.ACMN,
21323 reg: regInfo{
21324 inputs: []inputInfo{
21325 {0, 402653183},
21326 {1, 402653183},
21327 },
21328 },
21329 },
21330 {
21331 name: "CMNshiftRA",
21332 auxType: auxInt64,
21333 argLen: 2,
21334 asm: arm64.ACMN,
21335 reg: regInfo{
21336 inputs: []inputInfo{
21337 {0, 402653183},
21338 {1, 402653183},
21339 },
21340 },
21341 },
21342 {
21343 name: "TSTshiftLL",
21344 auxType: auxInt64,
21345 argLen: 2,
21346 asm: arm64.ATST,
21347 reg: regInfo{
21348 inputs: []inputInfo{
21349 {0, 402653183},
21350 {1, 402653183},
21351 },
21352 },
21353 },
21354 {
21355 name: "TSTshiftRL",
21356 auxType: auxInt64,
21357 argLen: 2,
21358 asm: arm64.ATST,
21359 reg: regInfo{
21360 inputs: []inputInfo{
21361 {0, 402653183},
21362 {1, 402653183},
21363 },
21364 },
21365 },
21366 {
21367 name: "TSTshiftRA",
21368 auxType: auxInt64,
21369 argLen: 2,
21370 asm: arm64.ATST,
21371 reg: regInfo{
21372 inputs: []inputInfo{
21373 {0, 402653183},
21374 {1, 402653183},
21375 },
21376 },
21377 },
21378 {
21379 name: "TSTshiftRO",
21380 auxType: auxInt64,
21381 argLen: 2,
21382 asm: arm64.ATST,
21383 reg: regInfo{
21384 inputs: []inputInfo{
21385 {0, 402653183},
21386 {1, 402653183},
21387 },
21388 },
21389 },
21390 {
21391 name: "BFI",
21392 auxType: auxARM64BitField,
21393 argLen: 2,
21394 resultInArg0: true,
21395 asm: arm64.ABFI,
21396 reg: regInfo{
21397 inputs: []inputInfo{
21398 {0, 335544319},
21399 {1, 335544319},
21400 },
21401 outputs: []outputInfo{
21402 {0, 335544319},
21403 },
21404 },
21405 },
21406 {
21407 name: "BFXIL",
21408 auxType: auxARM64BitField,
21409 argLen: 2,
21410 resultInArg0: true,
21411 asm: arm64.ABFXIL,
21412 reg: regInfo{
21413 inputs: []inputInfo{
21414 {0, 335544319},
21415 {1, 335544319},
21416 },
21417 outputs: []outputInfo{
21418 {0, 335544319},
21419 },
21420 },
21421 },
21422 {
21423 name: "SBFIZ",
21424 auxType: auxARM64BitField,
21425 argLen: 1,
21426 asm: arm64.ASBFIZ,
21427 reg: regInfo{
21428 inputs: []inputInfo{
21429 {0, 402653183},
21430 },
21431 outputs: []outputInfo{
21432 {0, 335544319},
21433 },
21434 },
21435 },
21436 {
21437 name: "SBFX",
21438 auxType: auxARM64BitField,
21439 argLen: 1,
21440 asm: arm64.ASBFX,
21441 reg: regInfo{
21442 inputs: []inputInfo{
21443 {0, 402653183},
21444 },
21445 outputs: []outputInfo{
21446 {0, 335544319},
21447 },
21448 },
21449 },
21450 {
21451 name: "UBFIZ",
21452 auxType: auxARM64BitField,
21453 argLen: 1,
21454 asm: arm64.AUBFIZ,
21455 reg: regInfo{
21456 inputs: []inputInfo{
21457 {0, 402653183},
21458 },
21459 outputs: []outputInfo{
21460 {0, 335544319},
21461 },
21462 },
21463 },
21464 {
21465 name: "UBFX",
21466 auxType: auxARM64BitField,
21467 argLen: 1,
21468 asm: arm64.AUBFX,
21469 reg: regInfo{
21470 inputs: []inputInfo{
21471 {0, 402653183},
21472 },
21473 outputs: []outputInfo{
21474 {0, 335544319},
21475 },
21476 },
21477 },
21478 {
21479 name: "MOVDconst",
21480 auxType: auxInt64,
21481 argLen: 0,
21482 rematerializeable: true,
21483 asm: arm64.AMOVD,
21484 reg: regInfo{
21485 outputs: []outputInfo{
21486 {0, 335544319},
21487 },
21488 },
21489 },
21490 {
21491 name: "FMOVSconst",
21492 auxType: auxFloat64,
21493 argLen: 0,
21494 rematerializeable: true,
21495 asm: arm64.AFMOVS,
21496 reg: regInfo{
21497 outputs: []outputInfo{
21498 {0, 9223372034707292160},
21499 },
21500 },
21501 },
21502 {
21503 name: "FMOVDconst",
21504 auxType: auxFloat64,
21505 argLen: 0,
21506 rematerializeable: true,
21507 asm: arm64.AFMOVD,
21508 reg: regInfo{
21509 outputs: []outputInfo{
21510 {0, 9223372034707292160},
21511 },
21512 },
21513 },
21514 {
21515 name: "MOVDaddr",
21516 auxType: auxSymOff,
21517 argLen: 1,
21518 rematerializeable: true,
21519 symEffect: SymAddr,
21520 asm: arm64.AMOVD,
21521 reg: regInfo{
21522 inputs: []inputInfo{
21523 {0, 9223372037928517632},
21524 },
21525 outputs: []outputInfo{
21526 {0, 335544319},
21527 },
21528 },
21529 },
21530 {
21531 name: "MOVBload",
21532 auxType: auxSymOff,
21533 argLen: 2,
21534 faultOnNilArg0: true,
21535 symEffect: SymRead,
21536 asm: arm64.AMOVB,
21537 reg: regInfo{
21538 inputs: []inputInfo{
21539 {0, 9223372038331170815},
21540 },
21541 outputs: []outputInfo{
21542 {0, 335544319},
21543 },
21544 },
21545 },
21546 {
21547 name: "MOVBUload",
21548 auxType: auxSymOff,
21549 argLen: 2,
21550 faultOnNilArg0: true,
21551 symEffect: SymRead,
21552 asm: arm64.AMOVBU,
21553 reg: regInfo{
21554 inputs: []inputInfo{
21555 {0, 9223372038331170815},
21556 },
21557 outputs: []outputInfo{
21558 {0, 335544319},
21559 },
21560 },
21561 },
21562 {
21563 name: "MOVHload",
21564 auxType: auxSymOff,
21565 argLen: 2,
21566 faultOnNilArg0: true,
21567 symEffect: SymRead,
21568 asm: arm64.AMOVH,
21569 reg: regInfo{
21570 inputs: []inputInfo{
21571 {0, 9223372038331170815},
21572 },
21573 outputs: []outputInfo{
21574 {0, 335544319},
21575 },
21576 },
21577 },
21578 {
21579 name: "MOVHUload",
21580 auxType: auxSymOff,
21581 argLen: 2,
21582 faultOnNilArg0: true,
21583 symEffect: SymRead,
21584 asm: arm64.AMOVHU,
21585 reg: regInfo{
21586 inputs: []inputInfo{
21587 {0, 9223372038331170815},
21588 },
21589 outputs: []outputInfo{
21590 {0, 335544319},
21591 },
21592 },
21593 },
21594 {
21595 name: "MOVWload",
21596 auxType: auxSymOff,
21597 argLen: 2,
21598 faultOnNilArg0: true,
21599 symEffect: SymRead,
21600 asm: arm64.AMOVW,
21601 reg: regInfo{
21602 inputs: []inputInfo{
21603 {0, 9223372038331170815},
21604 },
21605 outputs: []outputInfo{
21606 {0, 335544319},
21607 },
21608 },
21609 },
21610 {
21611 name: "MOVWUload",
21612 auxType: auxSymOff,
21613 argLen: 2,
21614 faultOnNilArg0: true,
21615 symEffect: SymRead,
21616 asm: arm64.AMOVWU,
21617 reg: regInfo{
21618 inputs: []inputInfo{
21619 {0, 9223372038331170815},
21620 },
21621 outputs: []outputInfo{
21622 {0, 335544319},
21623 },
21624 },
21625 },
21626 {
21627 name: "MOVDload",
21628 auxType: auxSymOff,
21629 argLen: 2,
21630 faultOnNilArg0: true,
21631 symEffect: SymRead,
21632 asm: arm64.AMOVD,
21633 reg: regInfo{
21634 inputs: []inputInfo{
21635 {0, 9223372038331170815},
21636 },
21637 outputs: []outputInfo{
21638 {0, 335544319},
21639 },
21640 },
21641 },
21642 {
21643 name: "FMOVSload",
21644 auxType: auxSymOff,
21645 argLen: 2,
21646 faultOnNilArg0: true,
21647 symEffect: SymRead,
21648 asm: arm64.AFMOVS,
21649 reg: regInfo{
21650 inputs: []inputInfo{
21651 {0, 9223372038331170815},
21652 },
21653 outputs: []outputInfo{
21654 {0, 9223372034707292160},
21655 },
21656 },
21657 },
21658 {
21659 name: "FMOVDload",
21660 auxType: auxSymOff,
21661 argLen: 2,
21662 faultOnNilArg0: true,
21663 symEffect: SymRead,
21664 asm: arm64.AFMOVD,
21665 reg: regInfo{
21666 inputs: []inputInfo{
21667 {0, 9223372038331170815},
21668 },
21669 outputs: []outputInfo{
21670 {0, 9223372034707292160},
21671 },
21672 },
21673 },
21674 {
21675 name: "LDP",
21676 auxType: auxSymOff,
21677 argLen: 2,
21678 faultOnNilArg0: true,
21679 symEffect: SymRead,
21680 asm: arm64.ALDP,
21681 reg: regInfo{
21682 inputs: []inputInfo{
21683 {0, 9223372038331170815},
21684 },
21685 outputs: []outputInfo{
21686 {0, 402653183},
21687 {1, 402653183},
21688 },
21689 },
21690 },
21691 {
21692 name: "LDPW",
21693 auxType: auxSymOff,
21694 argLen: 2,
21695 faultOnNilArg0: true,
21696 symEffect: SymRead,
21697 asm: arm64.ALDPW,
21698 reg: regInfo{
21699 inputs: []inputInfo{
21700 {0, 9223372038331170815},
21701 },
21702 outputs: []outputInfo{
21703 {0, 402653183},
21704 {1, 402653183},
21705 },
21706 },
21707 },
21708 {
21709 name: "LDPSW",
21710 auxType: auxSymOff,
21711 argLen: 2,
21712 faultOnNilArg0: true,
21713 symEffect: SymRead,
21714 asm: arm64.ALDPSW,
21715 reg: regInfo{
21716 inputs: []inputInfo{
21717 {0, 9223372038331170815},
21718 },
21719 outputs: []outputInfo{
21720 {0, 402653183},
21721 {1, 402653183},
21722 },
21723 },
21724 },
21725 {
21726 name: "FLDPD",
21727 auxType: auxSymOff,
21728 argLen: 2,
21729 faultOnNilArg0: true,
21730 symEffect: SymRead,
21731 asm: arm64.AFLDPD,
21732 reg: regInfo{
21733 inputs: []inputInfo{
21734 {0, 9223372038331170815},
21735 },
21736 outputs: []outputInfo{
21737 {0, 9223372034707292160},
21738 {1, 9223372034707292160},
21739 },
21740 },
21741 },
21742 {
21743 name: "FLDPS",
21744 auxType: auxSymOff,
21745 argLen: 2,
21746 faultOnNilArg0: true,
21747 symEffect: SymRead,
21748 asm: arm64.AFLDPS,
21749 reg: regInfo{
21750 inputs: []inputInfo{
21751 {0, 9223372038331170815},
21752 },
21753 outputs: []outputInfo{
21754 {0, 9223372034707292160},
21755 {1, 9223372034707292160},
21756 },
21757 },
21758 },
21759 {
21760 name: "MOVDloadidx",
21761 argLen: 3,
21762 asm: arm64.AMOVD,
21763 reg: regInfo{
21764 inputs: []inputInfo{
21765 {1, 402653183},
21766 {0, 9223372038331170815},
21767 },
21768 outputs: []outputInfo{
21769 {0, 335544319},
21770 },
21771 },
21772 },
21773 {
21774 name: "MOVWloadidx",
21775 argLen: 3,
21776 asm: arm64.AMOVW,
21777 reg: regInfo{
21778 inputs: []inputInfo{
21779 {1, 402653183},
21780 {0, 9223372038331170815},
21781 },
21782 outputs: []outputInfo{
21783 {0, 335544319},
21784 },
21785 },
21786 },
21787 {
21788 name: "MOVWUloadidx",
21789 argLen: 3,
21790 asm: arm64.AMOVWU,
21791 reg: regInfo{
21792 inputs: []inputInfo{
21793 {1, 402653183},
21794 {0, 9223372038331170815},
21795 },
21796 outputs: []outputInfo{
21797 {0, 335544319},
21798 },
21799 },
21800 },
21801 {
21802 name: "MOVHloadidx",
21803 argLen: 3,
21804 asm: arm64.AMOVH,
21805 reg: regInfo{
21806 inputs: []inputInfo{
21807 {1, 402653183},
21808 {0, 9223372038331170815},
21809 },
21810 outputs: []outputInfo{
21811 {0, 335544319},
21812 },
21813 },
21814 },
21815 {
21816 name: "MOVHUloadidx",
21817 argLen: 3,
21818 asm: arm64.AMOVHU,
21819 reg: regInfo{
21820 inputs: []inputInfo{
21821 {1, 402653183},
21822 {0, 9223372038331170815},
21823 },
21824 outputs: []outputInfo{
21825 {0, 335544319},
21826 },
21827 },
21828 },
21829 {
21830 name: "MOVBloadidx",
21831 argLen: 3,
21832 asm: arm64.AMOVB,
21833 reg: regInfo{
21834 inputs: []inputInfo{
21835 {1, 402653183},
21836 {0, 9223372038331170815},
21837 },
21838 outputs: []outputInfo{
21839 {0, 335544319},
21840 },
21841 },
21842 },
21843 {
21844 name: "MOVBUloadidx",
21845 argLen: 3,
21846 asm: arm64.AMOVBU,
21847 reg: regInfo{
21848 inputs: []inputInfo{
21849 {1, 402653183},
21850 {0, 9223372038331170815},
21851 },
21852 outputs: []outputInfo{
21853 {0, 335544319},
21854 },
21855 },
21856 },
21857 {
21858 name: "FMOVSloadidx",
21859 argLen: 3,
21860 asm: arm64.AFMOVS,
21861 reg: regInfo{
21862 inputs: []inputInfo{
21863 {1, 402653183},
21864 {0, 9223372038331170815},
21865 },
21866 outputs: []outputInfo{
21867 {0, 9223372034707292160},
21868 },
21869 },
21870 },
21871 {
21872 name: "FMOVDloadidx",
21873 argLen: 3,
21874 asm: arm64.AFMOVD,
21875 reg: regInfo{
21876 inputs: []inputInfo{
21877 {1, 402653183},
21878 {0, 9223372038331170815},
21879 },
21880 outputs: []outputInfo{
21881 {0, 9223372034707292160},
21882 },
21883 },
21884 },
21885 {
21886 name: "MOVHloadidx2",
21887 argLen: 3,
21888 asm: arm64.AMOVH,
21889 reg: regInfo{
21890 inputs: []inputInfo{
21891 {1, 402653183},
21892 {0, 9223372038331170815},
21893 },
21894 outputs: []outputInfo{
21895 {0, 335544319},
21896 },
21897 },
21898 },
21899 {
21900 name: "MOVHUloadidx2",
21901 argLen: 3,
21902 asm: arm64.AMOVHU,
21903 reg: regInfo{
21904 inputs: []inputInfo{
21905 {1, 402653183},
21906 {0, 9223372038331170815},
21907 },
21908 outputs: []outputInfo{
21909 {0, 335544319},
21910 },
21911 },
21912 },
21913 {
21914 name: "MOVWloadidx4",
21915 argLen: 3,
21916 asm: arm64.AMOVW,
21917 reg: regInfo{
21918 inputs: []inputInfo{
21919 {1, 402653183},
21920 {0, 9223372038331170815},
21921 },
21922 outputs: []outputInfo{
21923 {0, 335544319},
21924 },
21925 },
21926 },
21927 {
21928 name: "MOVWUloadidx4",
21929 argLen: 3,
21930 asm: arm64.AMOVWU,
21931 reg: regInfo{
21932 inputs: []inputInfo{
21933 {1, 402653183},
21934 {0, 9223372038331170815},
21935 },
21936 outputs: []outputInfo{
21937 {0, 335544319},
21938 },
21939 },
21940 },
21941 {
21942 name: "MOVDloadidx8",
21943 argLen: 3,
21944 asm: arm64.AMOVD,
21945 reg: regInfo{
21946 inputs: []inputInfo{
21947 {1, 402653183},
21948 {0, 9223372038331170815},
21949 },
21950 outputs: []outputInfo{
21951 {0, 335544319},
21952 },
21953 },
21954 },
21955 {
21956 name: "FMOVSloadidx4",
21957 argLen: 3,
21958 asm: arm64.AFMOVS,
21959 reg: regInfo{
21960 inputs: []inputInfo{
21961 {1, 402653183},
21962 {0, 9223372038331170815},
21963 },
21964 outputs: []outputInfo{
21965 {0, 9223372034707292160},
21966 },
21967 },
21968 },
21969 {
21970 name: "FMOVDloadidx8",
21971 argLen: 3,
21972 asm: arm64.AFMOVD,
21973 reg: regInfo{
21974 inputs: []inputInfo{
21975 {1, 402653183},
21976 {0, 9223372038331170815},
21977 },
21978 outputs: []outputInfo{
21979 {0, 9223372034707292160},
21980 },
21981 },
21982 },
21983 {
21984 name: "MOVBstore",
21985 auxType: auxSymOff,
21986 argLen: 3,
21987 faultOnNilArg0: true,
21988 symEffect: SymWrite,
21989 asm: arm64.AMOVB,
21990 reg: regInfo{
21991 inputs: []inputInfo{
21992 {1, 939524095},
21993 {0, 9223372038331170815},
21994 },
21995 },
21996 },
21997 {
21998 name: "MOVHstore",
21999 auxType: auxSymOff,
22000 argLen: 3,
22001 faultOnNilArg0: true,
22002 symEffect: SymWrite,
22003 asm: arm64.AMOVH,
22004 reg: regInfo{
22005 inputs: []inputInfo{
22006 {1, 939524095},
22007 {0, 9223372038331170815},
22008 },
22009 },
22010 },
22011 {
22012 name: "MOVWstore",
22013 auxType: auxSymOff,
22014 argLen: 3,
22015 faultOnNilArg0: true,
22016 symEffect: SymWrite,
22017 asm: arm64.AMOVW,
22018 reg: regInfo{
22019 inputs: []inputInfo{
22020 {1, 939524095},
22021 {0, 9223372038331170815},
22022 },
22023 },
22024 },
22025 {
22026 name: "MOVDstore",
22027 auxType: auxSymOff,
22028 argLen: 3,
22029 faultOnNilArg0: true,
22030 symEffect: SymWrite,
22031 asm: arm64.AMOVD,
22032 reg: regInfo{
22033 inputs: []inputInfo{
22034 {1, 939524095},
22035 {0, 9223372038331170815},
22036 },
22037 },
22038 },
22039 {
22040 name: "FMOVSstore",
22041 auxType: auxSymOff,
22042 argLen: 3,
22043 faultOnNilArg0: true,
22044 symEffect: SymWrite,
22045 asm: arm64.AFMOVS,
22046 reg: regInfo{
22047 inputs: []inputInfo{
22048 {0, 9223372038331170815},
22049 {1, 9223372034707292160},
22050 },
22051 },
22052 },
22053 {
22054 name: "FMOVDstore",
22055 auxType: auxSymOff,
22056 argLen: 3,
22057 faultOnNilArg0: true,
22058 symEffect: SymWrite,
22059 asm: arm64.AFMOVD,
22060 reg: regInfo{
22061 inputs: []inputInfo{
22062 {0, 9223372038331170815},
22063 {1, 9223372034707292160},
22064 },
22065 },
22066 },
22067 {
22068 name: "STP",
22069 auxType: auxSymOff,
22070 argLen: 4,
22071 faultOnNilArg0: true,
22072 symEffect: SymWrite,
22073 asm: arm64.ASTP,
22074 reg: regInfo{
22075 inputs: []inputInfo{
22076 {1, 939524095},
22077 {2, 939524095},
22078 {0, 9223372038331170815},
22079 },
22080 },
22081 },
22082 {
22083 name: "STPW",
22084 auxType: auxSymOff,
22085 argLen: 4,
22086 faultOnNilArg0: true,
22087 symEffect: SymWrite,
22088 asm: arm64.ASTPW,
22089 reg: regInfo{
22090 inputs: []inputInfo{
22091 {1, 939524095},
22092 {2, 939524095},
22093 {0, 9223372038331170815},
22094 },
22095 },
22096 },
22097 {
22098 name: "FSTPD",
22099 auxType: auxSymOff,
22100 argLen: 4,
22101 faultOnNilArg0: true,
22102 symEffect: SymWrite,
22103 asm: arm64.AFSTPD,
22104 reg: regInfo{
22105 inputs: []inputInfo{
22106 {0, 9223372038331170815},
22107 {1, 9223372034707292160},
22108 {2, 9223372034707292160},
22109 },
22110 },
22111 },
22112 {
22113 name: "FSTPS",
22114 auxType: auxSymOff,
22115 argLen: 4,
22116 faultOnNilArg0: true,
22117 symEffect: SymWrite,
22118 asm: arm64.AFSTPS,
22119 reg: regInfo{
22120 inputs: []inputInfo{
22121 {0, 9223372038331170815},
22122 {1, 9223372034707292160},
22123 {2, 9223372034707292160},
22124 },
22125 },
22126 },
22127 {
22128 name: "MOVBstoreidx",
22129 argLen: 4,
22130 asm: arm64.AMOVB,
22131 reg: regInfo{
22132 inputs: []inputInfo{
22133 {1, 939524095},
22134 {2, 939524095},
22135 {0, 9223372038331170815},
22136 },
22137 },
22138 },
22139 {
22140 name: "MOVHstoreidx",
22141 argLen: 4,
22142 asm: arm64.AMOVH,
22143 reg: regInfo{
22144 inputs: []inputInfo{
22145 {1, 939524095},
22146 {2, 939524095},
22147 {0, 9223372038331170815},
22148 },
22149 },
22150 },
22151 {
22152 name: "MOVWstoreidx",
22153 argLen: 4,
22154 asm: arm64.AMOVW,
22155 reg: regInfo{
22156 inputs: []inputInfo{
22157 {1, 939524095},
22158 {2, 939524095},
22159 {0, 9223372038331170815},
22160 },
22161 },
22162 },
22163 {
22164 name: "MOVDstoreidx",
22165 argLen: 4,
22166 asm: arm64.AMOVD,
22167 reg: regInfo{
22168 inputs: []inputInfo{
22169 {1, 939524095},
22170 {2, 939524095},
22171 {0, 9223372038331170815},
22172 },
22173 },
22174 },
22175 {
22176 name: "FMOVSstoreidx",
22177 argLen: 4,
22178 asm: arm64.AFMOVS,
22179 reg: regInfo{
22180 inputs: []inputInfo{
22181 {1, 402653183},
22182 {0, 9223372038331170815},
22183 {2, 9223372034707292160},
22184 },
22185 },
22186 },
22187 {
22188 name: "FMOVDstoreidx",
22189 argLen: 4,
22190 asm: arm64.AFMOVD,
22191 reg: regInfo{
22192 inputs: []inputInfo{
22193 {1, 402653183},
22194 {0, 9223372038331170815},
22195 {2, 9223372034707292160},
22196 },
22197 },
22198 },
22199 {
22200 name: "MOVHstoreidx2",
22201 argLen: 4,
22202 asm: arm64.AMOVH,
22203 reg: regInfo{
22204 inputs: []inputInfo{
22205 {1, 939524095},
22206 {2, 939524095},
22207 {0, 9223372038331170815},
22208 },
22209 },
22210 },
22211 {
22212 name: "MOVWstoreidx4",
22213 argLen: 4,
22214 asm: arm64.AMOVW,
22215 reg: regInfo{
22216 inputs: []inputInfo{
22217 {1, 939524095},
22218 {2, 939524095},
22219 {0, 9223372038331170815},
22220 },
22221 },
22222 },
22223 {
22224 name: "MOVDstoreidx8",
22225 argLen: 4,
22226 asm: arm64.AMOVD,
22227 reg: regInfo{
22228 inputs: []inputInfo{
22229 {1, 939524095},
22230 {2, 939524095},
22231 {0, 9223372038331170815},
22232 },
22233 },
22234 },
22235 {
22236 name: "FMOVSstoreidx4",
22237 argLen: 4,
22238 asm: arm64.AFMOVS,
22239 reg: regInfo{
22240 inputs: []inputInfo{
22241 {1, 402653183},
22242 {0, 9223372038331170815},
22243 {2, 9223372034707292160},
22244 },
22245 },
22246 },
22247 {
22248 name: "FMOVDstoreidx8",
22249 argLen: 4,
22250 asm: arm64.AFMOVD,
22251 reg: regInfo{
22252 inputs: []inputInfo{
22253 {1, 402653183},
22254 {0, 9223372038331170815},
22255 {2, 9223372034707292160},
22256 },
22257 },
22258 },
22259 {
22260 name: "FMOVDgpfp",
22261 argLen: 1,
22262 asm: arm64.AFMOVD,
22263 reg: regInfo{
22264 inputs: []inputInfo{
22265 {0, 335544319},
22266 },
22267 outputs: []outputInfo{
22268 {0, 9223372034707292160},
22269 },
22270 },
22271 },
22272 {
22273 name: "FMOVDfpgp",
22274 argLen: 1,
22275 asm: arm64.AFMOVD,
22276 reg: regInfo{
22277 inputs: []inputInfo{
22278 {0, 9223372034707292160},
22279 },
22280 outputs: []outputInfo{
22281 {0, 335544319},
22282 },
22283 },
22284 },
22285 {
22286 name: "FMOVSgpfp",
22287 argLen: 1,
22288 asm: arm64.AFMOVS,
22289 reg: regInfo{
22290 inputs: []inputInfo{
22291 {0, 335544319},
22292 },
22293 outputs: []outputInfo{
22294 {0, 9223372034707292160},
22295 },
22296 },
22297 },
22298 {
22299 name: "FMOVSfpgp",
22300 argLen: 1,
22301 asm: arm64.AFMOVS,
22302 reg: regInfo{
22303 inputs: []inputInfo{
22304 {0, 9223372034707292160},
22305 },
22306 outputs: []outputInfo{
22307 {0, 335544319},
22308 },
22309 },
22310 },
22311 {
22312 name: "MOVBreg",
22313 argLen: 1,
22314 asm: arm64.AMOVB,
22315 reg: regInfo{
22316 inputs: []inputInfo{
22317 {0, 402653183},
22318 },
22319 outputs: []outputInfo{
22320 {0, 335544319},
22321 },
22322 },
22323 },
22324 {
22325 name: "MOVBUreg",
22326 argLen: 1,
22327 asm: arm64.AMOVBU,
22328 reg: regInfo{
22329 inputs: []inputInfo{
22330 {0, 402653183},
22331 },
22332 outputs: []outputInfo{
22333 {0, 335544319},
22334 },
22335 },
22336 },
22337 {
22338 name: "MOVHreg",
22339 argLen: 1,
22340 asm: arm64.AMOVH,
22341 reg: regInfo{
22342 inputs: []inputInfo{
22343 {0, 402653183},
22344 },
22345 outputs: []outputInfo{
22346 {0, 335544319},
22347 },
22348 },
22349 },
22350 {
22351 name: "MOVHUreg",
22352 argLen: 1,
22353 asm: arm64.AMOVHU,
22354 reg: regInfo{
22355 inputs: []inputInfo{
22356 {0, 402653183},
22357 },
22358 outputs: []outputInfo{
22359 {0, 335544319},
22360 },
22361 },
22362 },
22363 {
22364 name: "MOVWreg",
22365 argLen: 1,
22366 asm: arm64.AMOVW,
22367 reg: regInfo{
22368 inputs: []inputInfo{
22369 {0, 402653183},
22370 },
22371 outputs: []outputInfo{
22372 {0, 335544319},
22373 },
22374 },
22375 },
22376 {
22377 name: "MOVWUreg",
22378 argLen: 1,
22379 asm: arm64.AMOVWU,
22380 reg: regInfo{
22381 inputs: []inputInfo{
22382 {0, 402653183},
22383 },
22384 outputs: []outputInfo{
22385 {0, 335544319},
22386 },
22387 },
22388 },
22389 {
22390 name: "MOVDreg",
22391 argLen: 1,
22392 asm: arm64.AMOVD,
22393 reg: regInfo{
22394 inputs: []inputInfo{
22395 {0, 402653183},
22396 },
22397 outputs: []outputInfo{
22398 {0, 335544319},
22399 },
22400 },
22401 },
22402 {
22403 name: "MOVDnop",
22404 argLen: 1,
22405 resultInArg0: true,
22406 reg: regInfo{
22407 inputs: []inputInfo{
22408 {0, 335544319},
22409 },
22410 outputs: []outputInfo{
22411 {0, 335544319},
22412 },
22413 },
22414 },
22415 {
22416 name: "SCVTFWS",
22417 argLen: 1,
22418 asm: arm64.ASCVTFWS,
22419 reg: regInfo{
22420 inputs: []inputInfo{
22421 {0, 335544319},
22422 },
22423 outputs: []outputInfo{
22424 {0, 9223372034707292160},
22425 },
22426 },
22427 },
22428 {
22429 name: "SCVTFWD",
22430 argLen: 1,
22431 asm: arm64.ASCVTFWD,
22432 reg: regInfo{
22433 inputs: []inputInfo{
22434 {0, 335544319},
22435 },
22436 outputs: []outputInfo{
22437 {0, 9223372034707292160},
22438 },
22439 },
22440 },
22441 {
22442 name: "UCVTFWS",
22443 argLen: 1,
22444 asm: arm64.AUCVTFWS,
22445 reg: regInfo{
22446 inputs: []inputInfo{
22447 {0, 335544319},
22448 },
22449 outputs: []outputInfo{
22450 {0, 9223372034707292160},
22451 },
22452 },
22453 },
22454 {
22455 name: "UCVTFWD",
22456 argLen: 1,
22457 asm: arm64.AUCVTFWD,
22458 reg: regInfo{
22459 inputs: []inputInfo{
22460 {0, 335544319},
22461 },
22462 outputs: []outputInfo{
22463 {0, 9223372034707292160},
22464 },
22465 },
22466 },
22467 {
22468 name: "SCVTFS",
22469 argLen: 1,
22470 asm: arm64.ASCVTFS,
22471 reg: regInfo{
22472 inputs: []inputInfo{
22473 {0, 335544319},
22474 },
22475 outputs: []outputInfo{
22476 {0, 9223372034707292160},
22477 },
22478 },
22479 },
22480 {
22481 name: "SCVTFD",
22482 argLen: 1,
22483 asm: arm64.ASCVTFD,
22484 reg: regInfo{
22485 inputs: []inputInfo{
22486 {0, 335544319},
22487 },
22488 outputs: []outputInfo{
22489 {0, 9223372034707292160},
22490 },
22491 },
22492 },
22493 {
22494 name: "UCVTFS",
22495 argLen: 1,
22496 asm: arm64.AUCVTFS,
22497 reg: regInfo{
22498 inputs: []inputInfo{
22499 {0, 335544319},
22500 },
22501 outputs: []outputInfo{
22502 {0, 9223372034707292160},
22503 },
22504 },
22505 },
22506 {
22507 name: "UCVTFD",
22508 argLen: 1,
22509 asm: arm64.AUCVTFD,
22510 reg: regInfo{
22511 inputs: []inputInfo{
22512 {0, 335544319},
22513 },
22514 outputs: []outputInfo{
22515 {0, 9223372034707292160},
22516 },
22517 },
22518 },
22519 {
22520 name: "FCVTZSSW",
22521 argLen: 1,
22522 asm: arm64.AFCVTZSSW,
22523 reg: regInfo{
22524 inputs: []inputInfo{
22525 {0, 9223372034707292160},
22526 },
22527 outputs: []outputInfo{
22528 {0, 335544319},
22529 },
22530 },
22531 },
22532 {
22533 name: "FCVTZSDW",
22534 argLen: 1,
22535 asm: arm64.AFCVTZSDW,
22536 reg: regInfo{
22537 inputs: []inputInfo{
22538 {0, 9223372034707292160},
22539 },
22540 outputs: []outputInfo{
22541 {0, 335544319},
22542 },
22543 },
22544 },
22545 {
22546 name: "FCVTZUSW",
22547 argLen: 1,
22548 asm: arm64.AFCVTZUSW,
22549 reg: regInfo{
22550 inputs: []inputInfo{
22551 {0, 9223372034707292160},
22552 },
22553 outputs: []outputInfo{
22554 {0, 335544319},
22555 },
22556 },
22557 },
22558 {
22559 name: "FCVTZUDW",
22560 argLen: 1,
22561 asm: arm64.AFCVTZUDW,
22562 reg: regInfo{
22563 inputs: []inputInfo{
22564 {0, 9223372034707292160},
22565 },
22566 outputs: []outputInfo{
22567 {0, 335544319},
22568 },
22569 },
22570 },
22571 {
22572 name: "FCVTZSS",
22573 argLen: 1,
22574 asm: arm64.AFCVTZSS,
22575 reg: regInfo{
22576 inputs: []inputInfo{
22577 {0, 9223372034707292160},
22578 },
22579 outputs: []outputInfo{
22580 {0, 335544319},
22581 },
22582 },
22583 },
22584 {
22585 name: "FCVTZSD",
22586 argLen: 1,
22587 asm: arm64.AFCVTZSD,
22588 reg: regInfo{
22589 inputs: []inputInfo{
22590 {0, 9223372034707292160},
22591 },
22592 outputs: []outputInfo{
22593 {0, 335544319},
22594 },
22595 },
22596 },
22597 {
22598 name: "FCVTZUS",
22599 argLen: 1,
22600 asm: arm64.AFCVTZUS,
22601 reg: regInfo{
22602 inputs: []inputInfo{
22603 {0, 9223372034707292160},
22604 },
22605 outputs: []outputInfo{
22606 {0, 335544319},
22607 },
22608 },
22609 },
22610 {
22611 name: "FCVTZUD",
22612 argLen: 1,
22613 asm: arm64.AFCVTZUD,
22614 reg: regInfo{
22615 inputs: []inputInfo{
22616 {0, 9223372034707292160},
22617 },
22618 outputs: []outputInfo{
22619 {0, 335544319},
22620 },
22621 },
22622 },
22623 {
22624 name: "FCVTSD",
22625 argLen: 1,
22626 asm: arm64.AFCVTSD,
22627 reg: regInfo{
22628 inputs: []inputInfo{
22629 {0, 9223372034707292160},
22630 },
22631 outputs: []outputInfo{
22632 {0, 9223372034707292160},
22633 },
22634 },
22635 },
22636 {
22637 name: "FCVTDS",
22638 argLen: 1,
22639 asm: arm64.AFCVTDS,
22640 reg: regInfo{
22641 inputs: []inputInfo{
22642 {0, 9223372034707292160},
22643 },
22644 outputs: []outputInfo{
22645 {0, 9223372034707292160},
22646 },
22647 },
22648 },
22649 {
22650 name: "FRINTAD",
22651 argLen: 1,
22652 asm: arm64.AFRINTAD,
22653 reg: regInfo{
22654 inputs: []inputInfo{
22655 {0, 9223372034707292160},
22656 },
22657 outputs: []outputInfo{
22658 {0, 9223372034707292160},
22659 },
22660 },
22661 },
22662 {
22663 name: "FRINTMD",
22664 argLen: 1,
22665 asm: arm64.AFRINTMD,
22666 reg: regInfo{
22667 inputs: []inputInfo{
22668 {0, 9223372034707292160},
22669 },
22670 outputs: []outputInfo{
22671 {0, 9223372034707292160},
22672 },
22673 },
22674 },
22675 {
22676 name: "FRINTND",
22677 argLen: 1,
22678 asm: arm64.AFRINTND,
22679 reg: regInfo{
22680 inputs: []inputInfo{
22681 {0, 9223372034707292160},
22682 },
22683 outputs: []outputInfo{
22684 {0, 9223372034707292160},
22685 },
22686 },
22687 },
22688 {
22689 name: "FRINTPD",
22690 argLen: 1,
22691 asm: arm64.AFRINTPD,
22692 reg: regInfo{
22693 inputs: []inputInfo{
22694 {0, 9223372034707292160},
22695 },
22696 outputs: []outputInfo{
22697 {0, 9223372034707292160},
22698 },
22699 },
22700 },
22701 {
22702 name: "FRINTZD",
22703 argLen: 1,
22704 asm: arm64.AFRINTZD,
22705 reg: regInfo{
22706 inputs: []inputInfo{
22707 {0, 9223372034707292160},
22708 },
22709 outputs: []outputInfo{
22710 {0, 9223372034707292160},
22711 },
22712 },
22713 },
22714 {
22715 name: "CSEL",
22716 auxType: auxCCop,
22717 argLen: 3,
22718 asm: arm64.ACSEL,
22719 reg: regInfo{
22720 inputs: []inputInfo{
22721 {0, 335544319},
22722 {1, 335544319},
22723 },
22724 outputs: []outputInfo{
22725 {0, 335544319},
22726 },
22727 },
22728 },
22729 {
22730 name: "CSEL0",
22731 auxType: auxCCop,
22732 argLen: 2,
22733 asm: arm64.ACSEL,
22734 reg: regInfo{
22735 inputs: []inputInfo{
22736 {0, 402653183},
22737 },
22738 outputs: []outputInfo{
22739 {0, 335544319},
22740 },
22741 },
22742 },
22743 {
22744 name: "CSINC",
22745 auxType: auxCCop,
22746 argLen: 3,
22747 asm: arm64.ACSINC,
22748 reg: regInfo{
22749 inputs: []inputInfo{
22750 {0, 335544319},
22751 {1, 335544319},
22752 },
22753 outputs: []outputInfo{
22754 {0, 335544319},
22755 },
22756 },
22757 },
22758 {
22759 name: "CSINV",
22760 auxType: auxCCop,
22761 argLen: 3,
22762 asm: arm64.ACSINV,
22763 reg: regInfo{
22764 inputs: []inputInfo{
22765 {0, 335544319},
22766 {1, 335544319},
22767 },
22768 outputs: []outputInfo{
22769 {0, 335544319},
22770 },
22771 },
22772 },
22773 {
22774 name: "CSNEG",
22775 auxType: auxCCop,
22776 argLen: 3,
22777 asm: arm64.ACSNEG,
22778 reg: regInfo{
22779 inputs: []inputInfo{
22780 {0, 335544319},
22781 {1, 335544319},
22782 },
22783 outputs: []outputInfo{
22784 {0, 335544319},
22785 },
22786 },
22787 },
22788 {
22789 name: "CSETM",
22790 auxType: auxCCop,
22791 argLen: 1,
22792 asm: arm64.ACSETM,
22793 reg: regInfo{
22794 outputs: []outputInfo{
22795 {0, 335544319},
22796 },
22797 },
22798 },
22799 {
22800 name: "CALLstatic",
22801 auxType: auxCallOff,
22802 argLen: -1,
22803 clobberFlags: true,
22804 call: true,
22805 reg: regInfo{
22806 clobbers: 9223372035109945343,
22807 },
22808 },
22809 {
22810 name: "CALLtail",
22811 auxType: auxCallOff,
22812 argLen: -1,
22813 clobberFlags: true,
22814 call: true,
22815 tailCall: true,
22816 reg: regInfo{
22817 clobbers: 9223372035109945343,
22818 },
22819 },
22820 {
22821 name: "CALLclosure",
22822 auxType: auxCallOff,
22823 argLen: -1,
22824 clobberFlags: true,
22825 call: true,
22826 reg: regInfo{
22827 inputs: []inputInfo{
22828 {1, 33554432},
22829 {0, 1409286143},
22830 },
22831 clobbers: 9223372035109945343,
22832 },
22833 },
22834 {
22835 name: "CALLinter",
22836 auxType: auxCallOff,
22837 argLen: -1,
22838 clobberFlags: true,
22839 call: true,
22840 reg: regInfo{
22841 inputs: []inputInfo{
22842 {0, 335544319},
22843 },
22844 clobbers: 9223372035109945343,
22845 },
22846 },
22847 {
22848 name: "LoweredNilCheck",
22849 argLen: 2,
22850 nilCheck: true,
22851 faultOnNilArg0: true,
22852 reg: regInfo{
22853 inputs: []inputInfo{
22854 {0, 402653183},
22855 },
22856 },
22857 },
22858 {
22859 name: "Equal",
22860 argLen: 1,
22861 reg: regInfo{
22862 outputs: []outputInfo{
22863 {0, 335544319},
22864 },
22865 },
22866 },
22867 {
22868 name: "NotEqual",
22869 argLen: 1,
22870 reg: regInfo{
22871 outputs: []outputInfo{
22872 {0, 335544319},
22873 },
22874 },
22875 },
22876 {
22877 name: "LessThan",
22878 argLen: 1,
22879 reg: regInfo{
22880 outputs: []outputInfo{
22881 {0, 335544319},
22882 },
22883 },
22884 },
22885 {
22886 name: "LessEqual",
22887 argLen: 1,
22888 reg: regInfo{
22889 outputs: []outputInfo{
22890 {0, 335544319},
22891 },
22892 },
22893 },
22894 {
22895 name: "GreaterThan",
22896 argLen: 1,
22897 reg: regInfo{
22898 outputs: []outputInfo{
22899 {0, 335544319},
22900 },
22901 },
22902 },
22903 {
22904 name: "GreaterEqual",
22905 argLen: 1,
22906 reg: regInfo{
22907 outputs: []outputInfo{
22908 {0, 335544319},
22909 },
22910 },
22911 },
22912 {
22913 name: "LessThanU",
22914 argLen: 1,
22915 reg: regInfo{
22916 outputs: []outputInfo{
22917 {0, 335544319},
22918 },
22919 },
22920 },
22921 {
22922 name: "LessEqualU",
22923 argLen: 1,
22924 reg: regInfo{
22925 outputs: []outputInfo{
22926 {0, 335544319},
22927 },
22928 },
22929 },
22930 {
22931 name: "GreaterThanU",
22932 argLen: 1,
22933 reg: regInfo{
22934 outputs: []outputInfo{
22935 {0, 335544319},
22936 },
22937 },
22938 },
22939 {
22940 name: "GreaterEqualU",
22941 argLen: 1,
22942 reg: regInfo{
22943 outputs: []outputInfo{
22944 {0, 335544319},
22945 },
22946 },
22947 },
22948 {
22949 name: "LessThanF",
22950 argLen: 1,
22951 reg: regInfo{
22952 outputs: []outputInfo{
22953 {0, 335544319},
22954 },
22955 },
22956 },
22957 {
22958 name: "LessEqualF",
22959 argLen: 1,
22960 reg: regInfo{
22961 outputs: []outputInfo{
22962 {0, 335544319},
22963 },
22964 },
22965 },
22966 {
22967 name: "GreaterThanF",
22968 argLen: 1,
22969 reg: regInfo{
22970 outputs: []outputInfo{
22971 {0, 335544319},
22972 },
22973 },
22974 },
22975 {
22976 name: "GreaterEqualF",
22977 argLen: 1,
22978 reg: regInfo{
22979 outputs: []outputInfo{
22980 {0, 335544319},
22981 },
22982 },
22983 },
22984 {
22985 name: "NotLessThanF",
22986 argLen: 1,
22987 reg: regInfo{
22988 outputs: []outputInfo{
22989 {0, 335544319},
22990 },
22991 },
22992 },
22993 {
22994 name: "NotLessEqualF",
22995 argLen: 1,
22996 reg: regInfo{
22997 outputs: []outputInfo{
22998 {0, 335544319},
22999 },
23000 },
23001 },
23002 {
23003 name: "NotGreaterThanF",
23004 argLen: 1,
23005 reg: regInfo{
23006 outputs: []outputInfo{
23007 {0, 335544319},
23008 },
23009 },
23010 },
23011 {
23012 name: "NotGreaterEqualF",
23013 argLen: 1,
23014 reg: regInfo{
23015 outputs: []outputInfo{
23016 {0, 335544319},
23017 },
23018 },
23019 },
23020 {
23021 name: "LessThanNoov",
23022 argLen: 1,
23023 reg: regInfo{
23024 outputs: []outputInfo{
23025 {0, 335544319},
23026 },
23027 },
23028 },
23029 {
23030 name: "GreaterEqualNoov",
23031 argLen: 1,
23032 reg: regInfo{
23033 outputs: []outputInfo{
23034 {0, 335544319},
23035 },
23036 },
23037 },
23038 {
23039 name: "DUFFZERO",
23040 auxType: auxInt64,
23041 argLen: 2,
23042 unsafePoint: true,
23043 reg: regInfo{
23044 inputs: []inputInfo{
23045 {0, 524288},
23046 },
23047 clobbers: 269156352,
23048 },
23049 },
23050 {
23051 name: "LoweredZero",
23052 argLen: 3,
23053 clobberFlags: true,
23054 faultOnNilArg0: true,
23055 reg: regInfo{
23056 inputs: []inputInfo{
23057 {0, 65536},
23058 {1, 335544319},
23059 },
23060 clobbers: 65536,
23061 },
23062 },
23063 {
23064 name: "DUFFCOPY",
23065 auxType: auxInt64,
23066 argLen: 3,
23067 unsafePoint: true,
23068 reg: regInfo{
23069 inputs: []inputInfo{
23070 {0, 1048576},
23071 {1, 524288},
23072 },
23073 clobbers: 303759360,
23074 },
23075 },
23076 {
23077 name: "LoweredMove",
23078 argLen: 4,
23079 clobberFlags: true,
23080 faultOnNilArg0: true,
23081 faultOnNilArg1: true,
23082 reg: regInfo{
23083 inputs: []inputInfo{
23084 {0, 131072},
23085 {1, 65536},
23086 {2, 318767103},
23087 },
23088 clobbers: 16973824,
23089 },
23090 },
23091 {
23092 name: "LoweredGetClosurePtr",
23093 argLen: 0,
23094 zeroWidth: true,
23095 reg: regInfo{
23096 outputs: []outputInfo{
23097 {0, 33554432},
23098 },
23099 },
23100 },
23101 {
23102 name: "LoweredGetCallerSP",
23103 argLen: 1,
23104 rematerializeable: true,
23105 reg: regInfo{
23106 outputs: []outputInfo{
23107 {0, 335544319},
23108 },
23109 },
23110 },
23111 {
23112 name: "LoweredGetCallerPC",
23113 argLen: 0,
23114 rematerializeable: true,
23115 reg: regInfo{
23116 outputs: []outputInfo{
23117 {0, 335544319},
23118 },
23119 },
23120 },
23121 {
23122 name: "FlagConstant",
23123 auxType: auxFlagConstant,
23124 argLen: 0,
23125 reg: regInfo{},
23126 },
23127 {
23128 name: "InvertFlags",
23129 argLen: 1,
23130 reg: regInfo{},
23131 },
23132 {
23133 name: "LDAR",
23134 argLen: 2,
23135 faultOnNilArg0: true,
23136 asm: arm64.ALDAR,
23137 reg: regInfo{
23138 inputs: []inputInfo{
23139 {0, 9223372038331170815},
23140 },
23141 outputs: []outputInfo{
23142 {0, 335544319},
23143 },
23144 },
23145 },
23146 {
23147 name: "LDARB",
23148 argLen: 2,
23149 faultOnNilArg0: true,
23150 asm: arm64.ALDARB,
23151 reg: regInfo{
23152 inputs: []inputInfo{
23153 {0, 9223372038331170815},
23154 },
23155 outputs: []outputInfo{
23156 {0, 335544319},
23157 },
23158 },
23159 },
23160 {
23161 name: "LDARW",
23162 argLen: 2,
23163 faultOnNilArg0: true,
23164 asm: arm64.ALDARW,
23165 reg: regInfo{
23166 inputs: []inputInfo{
23167 {0, 9223372038331170815},
23168 },
23169 outputs: []outputInfo{
23170 {0, 335544319},
23171 },
23172 },
23173 },
23174 {
23175 name: "STLRB",
23176 argLen: 3,
23177 faultOnNilArg0: true,
23178 hasSideEffects: true,
23179 asm: arm64.ASTLRB,
23180 reg: regInfo{
23181 inputs: []inputInfo{
23182 {1, 939524095},
23183 {0, 9223372038331170815},
23184 },
23185 },
23186 },
23187 {
23188 name: "STLR",
23189 argLen: 3,
23190 faultOnNilArg0: true,
23191 hasSideEffects: true,
23192 asm: arm64.ASTLR,
23193 reg: regInfo{
23194 inputs: []inputInfo{
23195 {1, 939524095},
23196 {0, 9223372038331170815},
23197 },
23198 },
23199 },
23200 {
23201 name: "STLRW",
23202 argLen: 3,
23203 faultOnNilArg0: true,
23204 hasSideEffects: true,
23205 asm: arm64.ASTLRW,
23206 reg: regInfo{
23207 inputs: []inputInfo{
23208 {1, 939524095},
23209 {0, 9223372038331170815},
23210 },
23211 },
23212 },
23213 {
23214 name: "LoweredAtomicExchange64",
23215 argLen: 3,
23216 resultNotInArgs: true,
23217 faultOnNilArg0: true,
23218 hasSideEffects: true,
23219 unsafePoint: true,
23220 reg: regInfo{
23221 inputs: []inputInfo{
23222 {1, 939524095},
23223 {0, 9223372038331170815},
23224 },
23225 outputs: []outputInfo{
23226 {0, 335544319},
23227 },
23228 },
23229 },
23230 {
23231 name: "LoweredAtomicExchange32",
23232 argLen: 3,
23233 resultNotInArgs: true,
23234 faultOnNilArg0: true,
23235 hasSideEffects: true,
23236 unsafePoint: true,
23237 reg: regInfo{
23238 inputs: []inputInfo{
23239 {1, 939524095},
23240 {0, 9223372038331170815},
23241 },
23242 outputs: []outputInfo{
23243 {0, 335544319},
23244 },
23245 },
23246 },
23247 {
23248 name: "LoweredAtomicExchange8",
23249 argLen: 3,
23250 resultNotInArgs: true,
23251 faultOnNilArg0: true,
23252 hasSideEffects: true,
23253 unsafePoint: true,
23254 reg: regInfo{
23255 inputs: []inputInfo{
23256 {1, 939524095},
23257 {0, 9223372038331170815},
23258 },
23259 outputs: []outputInfo{
23260 {0, 335544319},
23261 },
23262 },
23263 },
23264 {
23265 name: "LoweredAtomicExchange64Variant",
23266 argLen: 3,
23267 resultNotInArgs: true,
23268 faultOnNilArg0: true,
23269 hasSideEffects: true,
23270 reg: regInfo{
23271 inputs: []inputInfo{
23272 {1, 939524095},
23273 {0, 9223372038331170815},
23274 },
23275 outputs: []outputInfo{
23276 {0, 335544319},
23277 },
23278 },
23279 },
23280 {
23281 name: "LoweredAtomicExchange32Variant",
23282 argLen: 3,
23283 resultNotInArgs: true,
23284 faultOnNilArg0: true,
23285 hasSideEffects: true,
23286 reg: regInfo{
23287 inputs: []inputInfo{
23288 {1, 939524095},
23289 {0, 9223372038331170815},
23290 },
23291 outputs: []outputInfo{
23292 {0, 335544319},
23293 },
23294 },
23295 },
23296 {
23297 name: "LoweredAtomicExchange8Variant",
23298 argLen: 3,
23299 resultNotInArgs: true,
23300 faultOnNilArg0: true,
23301 hasSideEffects: true,
23302 unsafePoint: true,
23303 reg: regInfo{
23304 inputs: []inputInfo{
23305 {1, 939524095},
23306 {0, 9223372038331170815},
23307 },
23308 outputs: []outputInfo{
23309 {0, 335544319},
23310 },
23311 },
23312 },
23313 {
23314 name: "LoweredAtomicAdd64",
23315 argLen: 3,
23316 resultNotInArgs: true,
23317 faultOnNilArg0: true,
23318 hasSideEffects: true,
23319 unsafePoint: true,
23320 reg: regInfo{
23321 inputs: []inputInfo{
23322 {1, 939524095},
23323 {0, 9223372038331170815},
23324 },
23325 outputs: []outputInfo{
23326 {0, 335544319},
23327 },
23328 },
23329 },
23330 {
23331 name: "LoweredAtomicAdd32",
23332 argLen: 3,
23333 resultNotInArgs: true,
23334 faultOnNilArg0: true,
23335 hasSideEffects: true,
23336 unsafePoint: true,
23337 reg: regInfo{
23338 inputs: []inputInfo{
23339 {1, 939524095},
23340 {0, 9223372038331170815},
23341 },
23342 outputs: []outputInfo{
23343 {0, 335544319},
23344 },
23345 },
23346 },
23347 {
23348 name: "LoweredAtomicAdd64Variant",
23349 argLen: 3,
23350 resultNotInArgs: true,
23351 faultOnNilArg0: true,
23352 hasSideEffects: true,
23353 reg: regInfo{
23354 inputs: []inputInfo{
23355 {1, 939524095},
23356 {0, 9223372038331170815},
23357 },
23358 outputs: []outputInfo{
23359 {0, 335544319},
23360 },
23361 },
23362 },
23363 {
23364 name: "LoweredAtomicAdd32Variant",
23365 argLen: 3,
23366 resultNotInArgs: true,
23367 faultOnNilArg0: true,
23368 hasSideEffects: true,
23369 reg: regInfo{
23370 inputs: []inputInfo{
23371 {1, 939524095},
23372 {0, 9223372038331170815},
23373 },
23374 outputs: []outputInfo{
23375 {0, 335544319},
23376 },
23377 },
23378 },
23379 {
23380 name: "LoweredAtomicCas64",
23381 argLen: 4,
23382 resultNotInArgs: true,
23383 clobberFlags: true,
23384 faultOnNilArg0: true,
23385 hasSideEffects: true,
23386 unsafePoint: true,
23387 reg: regInfo{
23388 inputs: []inputInfo{
23389 {1, 939524095},
23390 {2, 939524095},
23391 {0, 9223372038331170815},
23392 },
23393 outputs: []outputInfo{
23394 {0, 335544319},
23395 },
23396 },
23397 },
23398 {
23399 name: "LoweredAtomicCas32",
23400 argLen: 4,
23401 resultNotInArgs: true,
23402 clobberFlags: true,
23403 faultOnNilArg0: true,
23404 hasSideEffects: true,
23405 unsafePoint: true,
23406 reg: regInfo{
23407 inputs: []inputInfo{
23408 {1, 939524095},
23409 {2, 939524095},
23410 {0, 9223372038331170815},
23411 },
23412 outputs: []outputInfo{
23413 {0, 335544319},
23414 },
23415 },
23416 },
23417 {
23418 name: "LoweredAtomicCas64Variant",
23419 argLen: 4,
23420 resultNotInArgs: true,
23421 clobberFlags: true,
23422 faultOnNilArg0: true,
23423 hasSideEffects: true,
23424 unsafePoint: true,
23425 reg: regInfo{
23426 inputs: []inputInfo{
23427 {1, 939524095},
23428 {2, 939524095},
23429 {0, 9223372038331170815},
23430 },
23431 outputs: []outputInfo{
23432 {0, 335544319},
23433 },
23434 },
23435 },
23436 {
23437 name: "LoweredAtomicCas32Variant",
23438 argLen: 4,
23439 resultNotInArgs: true,
23440 clobberFlags: true,
23441 faultOnNilArg0: true,
23442 hasSideEffects: true,
23443 unsafePoint: true,
23444 reg: regInfo{
23445 inputs: []inputInfo{
23446 {1, 939524095},
23447 {2, 939524095},
23448 {0, 9223372038331170815},
23449 },
23450 outputs: []outputInfo{
23451 {0, 335544319},
23452 },
23453 },
23454 },
23455 {
23456 name: "LoweredAtomicAnd8",
23457 argLen: 3,
23458 resultNotInArgs: true,
23459 needIntTemp: true,
23460 faultOnNilArg0: true,
23461 hasSideEffects: true,
23462 unsafePoint: true,
23463 asm: arm64.AAND,
23464 reg: regInfo{
23465 inputs: []inputInfo{
23466 {1, 939524095},
23467 {0, 9223372038331170815},
23468 },
23469 outputs: []outputInfo{
23470 {0, 335544319},
23471 },
23472 },
23473 },
23474 {
23475 name: "LoweredAtomicOr8",
23476 argLen: 3,
23477 resultNotInArgs: true,
23478 needIntTemp: true,
23479 faultOnNilArg0: true,
23480 hasSideEffects: true,
23481 unsafePoint: true,
23482 asm: arm64.AORR,
23483 reg: regInfo{
23484 inputs: []inputInfo{
23485 {1, 939524095},
23486 {0, 9223372038331170815},
23487 },
23488 outputs: []outputInfo{
23489 {0, 335544319},
23490 },
23491 },
23492 },
23493 {
23494 name: "LoweredAtomicAnd64",
23495 argLen: 3,
23496 resultNotInArgs: true,
23497 needIntTemp: true,
23498 faultOnNilArg0: true,
23499 hasSideEffects: true,
23500 unsafePoint: true,
23501 asm: arm64.AAND,
23502 reg: regInfo{
23503 inputs: []inputInfo{
23504 {1, 939524095},
23505 {0, 9223372038331170815},
23506 },
23507 outputs: []outputInfo{
23508 {0, 335544319},
23509 },
23510 },
23511 },
23512 {
23513 name: "LoweredAtomicOr64",
23514 argLen: 3,
23515 resultNotInArgs: true,
23516 needIntTemp: true,
23517 faultOnNilArg0: true,
23518 hasSideEffects: true,
23519 unsafePoint: true,
23520 asm: arm64.AORR,
23521 reg: regInfo{
23522 inputs: []inputInfo{
23523 {1, 939524095},
23524 {0, 9223372038331170815},
23525 },
23526 outputs: []outputInfo{
23527 {0, 335544319},
23528 },
23529 },
23530 },
23531 {
23532 name: "LoweredAtomicAnd32",
23533 argLen: 3,
23534 resultNotInArgs: true,
23535 needIntTemp: true,
23536 faultOnNilArg0: true,
23537 hasSideEffects: true,
23538 unsafePoint: true,
23539 asm: arm64.AAND,
23540 reg: regInfo{
23541 inputs: []inputInfo{
23542 {1, 939524095},
23543 {0, 9223372038331170815},
23544 },
23545 outputs: []outputInfo{
23546 {0, 335544319},
23547 },
23548 },
23549 },
23550 {
23551 name: "LoweredAtomicOr32",
23552 argLen: 3,
23553 resultNotInArgs: true,
23554 needIntTemp: true,
23555 faultOnNilArg0: true,
23556 hasSideEffects: true,
23557 unsafePoint: true,
23558 asm: arm64.AORR,
23559 reg: regInfo{
23560 inputs: []inputInfo{
23561 {1, 939524095},
23562 {0, 9223372038331170815},
23563 },
23564 outputs: []outputInfo{
23565 {0, 335544319},
23566 },
23567 },
23568 },
23569 {
23570 name: "LoweredAtomicAnd8Variant",
23571 argLen: 3,
23572 resultNotInArgs: true,
23573 faultOnNilArg0: true,
23574 hasSideEffects: true,
23575 unsafePoint: true,
23576 reg: regInfo{
23577 inputs: []inputInfo{
23578 {1, 939524095},
23579 {0, 9223372038331170815},
23580 },
23581 outputs: []outputInfo{
23582 {0, 335544319},
23583 },
23584 },
23585 },
23586 {
23587 name: "LoweredAtomicOr8Variant",
23588 argLen: 3,
23589 resultNotInArgs: true,
23590 faultOnNilArg0: true,
23591 hasSideEffects: true,
23592 reg: regInfo{
23593 inputs: []inputInfo{
23594 {1, 939524095},
23595 {0, 9223372038331170815},
23596 },
23597 outputs: []outputInfo{
23598 {0, 335544319},
23599 },
23600 },
23601 },
23602 {
23603 name: "LoweredAtomicAnd64Variant",
23604 argLen: 3,
23605 resultNotInArgs: true,
23606 faultOnNilArg0: true,
23607 hasSideEffects: true,
23608 unsafePoint: true,
23609 reg: regInfo{
23610 inputs: []inputInfo{
23611 {1, 939524095},
23612 {0, 9223372038331170815},
23613 },
23614 outputs: []outputInfo{
23615 {0, 335544319},
23616 },
23617 },
23618 },
23619 {
23620 name: "LoweredAtomicOr64Variant",
23621 argLen: 3,
23622 resultNotInArgs: true,
23623 faultOnNilArg0: true,
23624 hasSideEffects: true,
23625 reg: regInfo{
23626 inputs: []inputInfo{
23627 {1, 939524095},
23628 {0, 9223372038331170815},
23629 },
23630 outputs: []outputInfo{
23631 {0, 335544319},
23632 },
23633 },
23634 },
23635 {
23636 name: "LoweredAtomicAnd32Variant",
23637 argLen: 3,
23638 resultNotInArgs: true,
23639 faultOnNilArg0: true,
23640 hasSideEffects: true,
23641 unsafePoint: true,
23642 reg: regInfo{
23643 inputs: []inputInfo{
23644 {1, 939524095},
23645 {0, 9223372038331170815},
23646 },
23647 outputs: []outputInfo{
23648 {0, 335544319},
23649 },
23650 },
23651 },
23652 {
23653 name: "LoweredAtomicOr32Variant",
23654 argLen: 3,
23655 resultNotInArgs: true,
23656 faultOnNilArg0: true,
23657 hasSideEffects: true,
23658 reg: regInfo{
23659 inputs: []inputInfo{
23660 {1, 939524095},
23661 {0, 9223372038331170815},
23662 },
23663 outputs: []outputInfo{
23664 {0, 335544319},
23665 },
23666 },
23667 },
23668 {
23669 name: "LoweredWB",
23670 auxType: auxInt64,
23671 argLen: 1,
23672 clobberFlags: true,
23673 reg: regInfo{
23674 clobbers: 9223372034975924224,
23675 outputs: []outputInfo{
23676 {0, 16777216},
23677 },
23678 },
23679 },
23680 {
23681 name: "LoweredPanicBoundsA",
23682 auxType: auxInt64,
23683 argLen: 3,
23684 call: true,
23685 reg: regInfo{
23686 inputs: []inputInfo{
23687 {0, 4},
23688 {1, 8},
23689 },
23690 },
23691 },
23692 {
23693 name: "LoweredPanicBoundsB",
23694 auxType: auxInt64,
23695 argLen: 3,
23696 call: true,
23697 reg: regInfo{
23698 inputs: []inputInfo{
23699 {0, 2},
23700 {1, 4},
23701 },
23702 },
23703 },
23704 {
23705 name: "LoweredPanicBoundsC",
23706 auxType: auxInt64,
23707 argLen: 3,
23708 call: true,
23709 reg: regInfo{
23710 inputs: []inputInfo{
23711 {0, 1},
23712 {1, 2},
23713 },
23714 },
23715 },
23716 {
23717 name: "PRFM",
23718 auxType: auxInt64,
23719 argLen: 2,
23720 hasSideEffects: true,
23721 asm: arm64.APRFM,
23722 reg: regInfo{
23723 inputs: []inputInfo{
23724 {0, 9223372038331170815},
23725 },
23726 },
23727 },
23728 {
23729 name: "DMB",
23730 auxType: auxInt64,
23731 argLen: 1,
23732 hasSideEffects: true,
23733 asm: arm64.ADMB,
23734 reg: regInfo{},
23735 },
23736 {
23737 name: "ZERO",
23738 argLen: 0,
23739 zeroWidth: true,
23740 fixedReg: true,
23741 reg: regInfo{},
23742 },
23743
23744 {
23745 name: "NEGV",
23746 argLen: 1,
23747 reg: regInfo{
23748 inputs: []inputInfo{
23749 {0, 1073741816},
23750 },
23751 outputs: []outputInfo{
23752 {0, 1071644664},
23753 },
23754 },
23755 },
23756 {
23757 name: "NEGF",
23758 argLen: 1,
23759 asm: loong64.ANEGF,
23760 reg: regInfo{
23761 inputs: []inputInfo{
23762 {0, 4611686017353646080},
23763 },
23764 outputs: []outputInfo{
23765 {0, 4611686017353646080},
23766 },
23767 },
23768 },
23769 {
23770 name: "NEGD",
23771 argLen: 1,
23772 asm: loong64.ANEGD,
23773 reg: regInfo{
23774 inputs: []inputInfo{
23775 {0, 4611686017353646080},
23776 },
23777 outputs: []outputInfo{
23778 {0, 4611686017353646080},
23779 },
23780 },
23781 },
23782 {
23783 name: "SQRTD",
23784 argLen: 1,
23785 asm: loong64.ASQRTD,
23786 reg: regInfo{
23787 inputs: []inputInfo{
23788 {0, 4611686017353646080},
23789 },
23790 outputs: []outputInfo{
23791 {0, 4611686017353646080},
23792 },
23793 },
23794 },
23795 {
23796 name: "SQRTF",
23797 argLen: 1,
23798 asm: loong64.ASQRTF,
23799 reg: regInfo{
23800 inputs: []inputInfo{
23801 {0, 4611686017353646080},
23802 },
23803 outputs: []outputInfo{
23804 {0, 4611686017353646080},
23805 },
23806 },
23807 },
23808 {
23809 name: "ABSD",
23810 argLen: 1,
23811 asm: loong64.AABSD,
23812 reg: regInfo{
23813 inputs: []inputInfo{
23814 {0, 4611686017353646080},
23815 },
23816 outputs: []outputInfo{
23817 {0, 4611686017353646080},
23818 },
23819 },
23820 },
23821 {
23822 name: "CLZW",
23823 argLen: 1,
23824 asm: loong64.ACLZW,
23825 reg: regInfo{
23826 inputs: []inputInfo{
23827 {0, 1073741816},
23828 },
23829 outputs: []outputInfo{
23830 {0, 1071644664},
23831 },
23832 },
23833 },
23834 {
23835 name: "CLZV",
23836 argLen: 1,
23837 asm: loong64.ACLZV,
23838 reg: regInfo{
23839 inputs: []inputInfo{
23840 {0, 1073741816},
23841 },
23842 outputs: []outputInfo{
23843 {0, 1071644664},
23844 },
23845 },
23846 },
23847 {
23848 name: "CTZW",
23849 argLen: 1,
23850 asm: loong64.ACTZW,
23851 reg: regInfo{
23852 inputs: []inputInfo{
23853 {0, 1073741816},
23854 },
23855 outputs: []outputInfo{
23856 {0, 1071644664},
23857 },
23858 },
23859 },
23860 {
23861 name: "CTZV",
23862 argLen: 1,
23863 asm: loong64.ACTZV,
23864 reg: regInfo{
23865 inputs: []inputInfo{
23866 {0, 1073741816},
23867 },
23868 outputs: []outputInfo{
23869 {0, 1071644664},
23870 },
23871 },
23872 },
23873 {
23874 name: "REVB2H",
23875 argLen: 1,
23876 asm: loong64.AREVB2H,
23877 reg: regInfo{
23878 inputs: []inputInfo{
23879 {0, 1073741816},
23880 },
23881 outputs: []outputInfo{
23882 {0, 1071644664},
23883 },
23884 },
23885 },
23886 {
23887 name: "REVB2W",
23888 argLen: 1,
23889 asm: loong64.AREVB2W,
23890 reg: regInfo{
23891 inputs: []inputInfo{
23892 {0, 1073741816},
23893 },
23894 outputs: []outputInfo{
23895 {0, 1071644664},
23896 },
23897 },
23898 },
23899 {
23900 name: "REVBV",
23901 argLen: 1,
23902 asm: loong64.AREVBV,
23903 reg: regInfo{
23904 inputs: []inputInfo{
23905 {0, 1073741816},
23906 },
23907 outputs: []outputInfo{
23908 {0, 1071644664},
23909 },
23910 },
23911 },
23912 {
23913 name: "BITREV4B",
23914 argLen: 1,
23915 asm: loong64.ABITREV4B,
23916 reg: regInfo{
23917 inputs: []inputInfo{
23918 {0, 1073741816},
23919 },
23920 outputs: []outputInfo{
23921 {0, 1071644664},
23922 },
23923 },
23924 },
23925 {
23926 name: "BITREVW",
23927 argLen: 1,
23928 asm: loong64.ABITREVW,
23929 reg: regInfo{
23930 inputs: []inputInfo{
23931 {0, 1073741816},
23932 },
23933 outputs: []outputInfo{
23934 {0, 1071644664},
23935 },
23936 },
23937 },
23938 {
23939 name: "BITREVV",
23940 argLen: 1,
23941 asm: loong64.ABITREVV,
23942 reg: regInfo{
23943 inputs: []inputInfo{
23944 {0, 1073741816},
23945 },
23946 outputs: []outputInfo{
23947 {0, 1071644664},
23948 },
23949 },
23950 },
23951 {
23952 name: "VPCNT64",
23953 argLen: 1,
23954 asm: loong64.AVPCNTV,
23955 reg: regInfo{
23956 inputs: []inputInfo{
23957 {0, 4611686017353646080},
23958 },
23959 outputs: []outputInfo{
23960 {0, 4611686017353646080},
23961 },
23962 },
23963 },
23964 {
23965 name: "VPCNT32",
23966 argLen: 1,
23967 asm: loong64.AVPCNTW,
23968 reg: regInfo{
23969 inputs: []inputInfo{
23970 {0, 4611686017353646080},
23971 },
23972 outputs: []outputInfo{
23973 {0, 4611686017353646080},
23974 },
23975 },
23976 },
23977 {
23978 name: "VPCNT16",
23979 argLen: 1,
23980 asm: loong64.AVPCNTH,
23981 reg: regInfo{
23982 inputs: []inputInfo{
23983 {0, 4611686017353646080},
23984 },
23985 outputs: []outputInfo{
23986 {0, 4611686017353646080},
23987 },
23988 },
23989 },
23990 {
23991 name: "ADDV",
23992 argLen: 2,
23993 commutative: true,
23994 asm: loong64.AADDVU,
23995 reg: regInfo{
23996 inputs: []inputInfo{
23997 {0, 1073741816},
23998 {1, 1073741816},
23999 },
24000 outputs: []outputInfo{
24001 {0, 1071644664},
24002 },
24003 },
24004 },
24005 {
24006 name: "ADDVconst",
24007 auxType: auxInt64,
24008 argLen: 1,
24009 asm: loong64.AADDVU,
24010 reg: regInfo{
24011 inputs: []inputInfo{
24012 {0, 1073741820},
24013 },
24014 outputs: []outputInfo{
24015 {0, 1071644664},
24016 },
24017 },
24018 },
24019 {
24020 name: "SUBV",
24021 argLen: 2,
24022 asm: loong64.ASUBVU,
24023 reg: regInfo{
24024 inputs: []inputInfo{
24025 {0, 1073741816},
24026 {1, 1073741816},
24027 },
24028 outputs: []outputInfo{
24029 {0, 1071644664},
24030 },
24031 },
24032 },
24033 {
24034 name: "SUBVconst",
24035 auxType: auxInt64,
24036 argLen: 1,
24037 asm: loong64.ASUBVU,
24038 reg: regInfo{
24039 inputs: []inputInfo{
24040 {0, 1073741816},
24041 },
24042 outputs: []outputInfo{
24043 {0, 1071644664},
24044 },
24045 },
24046 },
24047 {
24048 name: "MULV",
24049 argLen: 2,
24050 commutative: true,
24051 asm: loong64.AMULV,
24052 reg: regInfo{
24053 inputs: []inputInfo{
24054 {0, 1073741816},
24055 {1, 1073741816},
24056 },
24057 outputs: []outputInfo{
24058 {0, 1071644664},
24059 },
24060 },
24061 },
24062 {
24063 name: "MULHV",
24064 argLen: 2,
24065 commutative: true,
24066 asm: loong64.AMULHV,
24067 reg: regInfo{
24068 inputs: []inputInfo{
24069 {0, 1073741816},
24070 {1, 1073741816},
24071 },
24072 outputs: []outputInfo{
24073 {0, 1071644664},
24074 },
24075 },
24076 },
24077 {
24078 name: "MULHVU",
24079 argLen: 2,
24080 commutative: true,
24081 asm: loong64.AMULHVU,
24082 reg: regInfo{
24083 inputs: []inputInfo{
24084 {0, 1073741816},
24085 {1, 1073741816},
24086 },
24087 outputs: []outputInfo{
24088 {0, 1071644664},
24089 },
24090 },
24091 },
24092 {
24093 name: "DIVV",
24094 argLen: 2,
24095 asm: loong64.ADIVV,
24096 reg: regInfo{
24097 inputs: []inputInfo{
24098 {0, 1073741816},
24099 {1, 1073741816},
24100 },
24101 outputs: []outputInfo{
24102 {0, 1071644664},
24103 },
24104 },
24105 },
24106 {
24107 name: "DIVVU",
24108 argLen: 2,
24109 asm: loong64.ADIVVU,
24110 reg: regInfo{
24111 inputs: []inputInfo{
24112 {0, 1073741816},
24113 {1, 1073741816},
24114 },
24115 outputs: []outputInfo{
24116 {0, 1071644664},
24117 },
24118 },
24119 },
24120 {
24121 name: "REMV",
24122 argLen: 2,
24123 asm: loong64.AREMV,
24124 reg: regInfo{
24125 inputs: []inputInfo{
24126 {0, 1073741816},
24127 {1, 1073741816},
24128 },
24129 outputs: []outputInfo{
24130 {0, 1071644664},
24131 },
24132 },
24133 },
24134 {
24135 name: "REMVU",
24136 argLen: 2,
24137 asm: loong64.AREMVU,
24138 reg: regInfo{
24139 inputs: []inputInfo{
24140 {0, 1073741816},
24141 {1, 1073741816},
24142 },
24143 outputs: []outputInfo{
24144 {0, 1071644664},
24145 },
24146 },
24147 },
24148 {
24149 name: "ADDF",
24150 argLen: 2,
24151 commutative: true,
24152 asm: loong64.AADDF,
24153 reg: regInfo{
24154 inputs: []inputInfo{
24155 {0, 4611686017353646080},
24156 {1, 4611686017353646080},
24157 },
24158 outputs: []outputInfo{
24159 {0, 4611686017353646080},
24160 },
24161 },
24162 },
24163 {
24164 name: "ADDD",
24165 argLen: 2,
24166 commutative: true,
24167 asm: loong64.AADDD,
24168 reg: regInfo{
24169 inputs: []inputInfo{
24170 {0, 4611686017353646080},
24171 {1, 4611686017353646080},
24172 },
24173 outputs: []outputInfo{
24174 {0, 4611686017353646080},
24175 },
24176 },
24177 },
24178 {
24179 name: "SUBF",
24180 argLen: 2,
24181 asm: loong64.ASUBF,
24182 reg: regInfo{
24183 inputs: []inputInfo{
24184 {0, 4611686017353646080},
24185 {1, 4611686017353646080},
24186 },
24187 outputs: []outputInfo{
24188 {0, 4611686017353646080},
24189 },
24190 },
24191 },
24192 {
24193 name: "SUBD",
24194 argLen: 2,
24195 asm: loong64.ASUBD,
24196 reg: regInfo{
24197 inputs: []inputInfo{
24198 {0, 4611686017353646080},
24199 {1, 4611686017353646080},
24200 },
24201 outputs: []outputInfo{
24202 {0, 4611686017353646080},
24203 },
24204 },
24205 },
24206 {
24207 name: "MULF",
24208 argLen: 2,
24209 commutative: true,
24210 asm: loong64.AMULF,
24211 reg: regInfo{
24212 inputs: []inputInfo{
24213 {0, 4611686017353646080},
24214 {1, 4611686017353646080},
24215 },
24216 outputs: []outputInfo{
24217 {0, 4611686017353646080},
24218 },
24219 },
24220 },
24221 {
24222 name: "MULD",
24223 argLen: 2,
24224 commutative: true,
24225 asm: loong64.AMULD,
24226 reg: regInfo{
24227 inputs: []inputInfo{
24228 {0, 4611686017353646080},
24229 {1, 4611686017353646080},
24230 },
24231 outputs: []outputInfo{
24232 {0, 4611686017353646080},
24233 },
24234 },
24235 },
24236 {
24237 name: "DIVF",
24238 argLen: 2,
24239 asm: loong64.ADIVF,
24240 reg: regInfo{
24241 inputs: []inputInfo{
24242 {0, 4611686017353646080},
24243 {1, 4611686017353646080},
24244 },
24245 outputs: []outputInfo{
24246 {0, 4611686017353646080},
24247 },
24248 },
24249 },
24250 {
24251 name: "DIVD",
24252 argLen: 2,
24253 asm: loong64.ADIVD,
24254 reg: regInfo{
24255 inputs: []inputInfo{
24256 {0, 4611686017353646080},
24257 {1, 4611686017353646080},
24258 },
24259 outputs: []outputInfo{
24260 {0, 4611686017353646080},
24261 },
24262 },
24263 },
24264 {
24265 name: "AND",
24266 argLen: 2,
24267 commutative: true,
24268 asm: loong64.AAND,
24269 reg: regInfo{
24270 inputs: []inputInfo{
24271 {0, 1073741816},
24272 {1, 1073741816},
24273 },
24274 outputs: []outputInfo{
24275 {0, 1071644664},
24276 },
24277 },
24278 },
24279 {
24280 name: "ANDconst",
24281 auxType: auxInt64,
24282 argLen: 1,
24283 asm: loong64.AAND,
24284 reg: regInfo{
24285 inputs: []inputInfo{
24286 {0, 1073741816},
24287 },
24288 outputs: []outputInfo{
24289 {0, 1071644664},
24290 },
24291 },
24292 },
24293 {
24294 name: "OR",
24295 argLen: 2,
24296 commutative: true,
24297 asm: loong64.AOR,
24298 reg: regInfo{
24299 inputs: []inputInfo{
24300 {0, 1073741816},
24301 {1, 1073741816},
24302 },
24303 outputs: []outputInfo{
24304 {0, 1071644664},
24305 },
24306 },
24307 },
24308 {
24309 name: "ORconst",
24310 auxType: auxInt64,
24311 argLen: 1,
24312 asm: loong64.AOR,
24313 reg: regInfo{
24314 inputs: []inputInfo{
24315 {0, 1073741816},
24316 },
24317 outputs: []outputInfo{
24318 {0, 1071644664},
24319 },
24320 },
24321 },
24322 {
24323 name: "XOR",
24324 argLen: 2,
24325 commutative: true,
24326 asm: loong64.AXOR,
24327 reg: regInfo{
24328 inputs: []inputInfo{
24329 {0, 1073741816},
24330 {1, 1073741816},
24331 },
24332 outputs: []outputInfo{
24333 {0, 1071644664},
24334 },
24335 },
24336 },
24337 {
24338 name: "XORconst",
24339 auxType: auxInt64,
24340 argLen: 1,
24341 asm: loong64.AXOR,
24342 reg: regInfo{
24343 inputs: []inputInfo{
24344 {0, 1073741816},
24345 },
24346 outputs: []outputInfo{
24347 {0, 1071644664},
24348 },
24349 },
24350 },
24351 {
24352 name: "NOR",
24353 argLen: 2,
24354 commutative: true,
24355 asm: loong64.ANOR,
24356 reg: regInfo{
24357 inputs: []inputInfo{
24358 {0, 1073741816},
24359 {1, 1073741816},
24360 },
24361 outputs: []outputInfo{
24362 {0, 1071644664},
24363 },
24364 },
24365 },
24366 {
24367 name: "NORconst",
24368 auxType: auxInt64,
24369 argLen: 1,
24370 asm: loong64.ANOR,
24371 reg: regInfo{
24372 inputs: []inputInfo{
24373 {0, 1073741816},
24374 },
24375 outputs: []outputInfo{
24376 {0, 1071644664},
24377 },
24378 },
24379 },
24380 {
24381 name: "ANDN",
24382 argLen: 2,
24383 asm: loong64.AANDN,
24384 reg: regInfo{
24385 inputs: []inputInfo{
24386 {0, 1073741816},
24387 {1, 1073741816},
24388 },
24389 outputs: []outputInfo{
24390 {0, 1071644664},
24391 },
24392 },
24393 },
24394 {
24395 name: "ORN",
24396 argLen: 2,
24397 asm: loong64.AORN,
24398 reg: regInfo{
24399 inputs: []inputInfo{
24400 {0, 1073741816},
24401 {1, 1073741816},
24402 },
24403 outputs: []outputInfo{
24404 {0, 1071644664},
24405 },
24406 },
24407 },
24408 {
24409 name: "FMADDF",
24410 argLen: 3,
24411 commutative: true,
24412 asm: loong64.AFMADDF,
24413 reg: regInfo{
24414 inputs: []inputInfo{
24415 {0, 4611686017353646080},
24416 {1, 4611686017353646080},
24417 {2, 4611686017353646080},
24418 },
24419 outputs: []outputInfo{
24420 {0, 4611686017353646080},
24421 },
24422 },
24423 },
24424 {
24425 name: "FMADDD",
24426 argLen: 3,
24427 commutative: true,
24428 asm: loong64.AFMADDD,
24429 reg: regInfo{
24430 inputs: []inputInfo{
24431 {0, 4611686017353646080},
24432 {1, 4611686017353646080},
24433 {2, 4611686017353646080},
24434 },
24435 outputs: []outputInfo{
24436 {0, 4611686017353646080},
24437 },
24438 },
24439 },
24440 {
24441 name: "FMSUBF",
24442 argLen: 3,
24443 commutative: true,
24444 asm: loong64.AFMSUBF,
24445 reg: regInfo{
24446 inputs: []inputInfo{
24447 {0, 4611686017353646080},
24448 {1, 4611686017353646080},
24449 {2, 4611686017353646080},
24450 },
24451 outputs: []outputInfo{
24452 {0, 4611686017353646080},
24453 },
24454 },
24455 },
24456 {
24457 name: "FMSUBD",
24458 argLen: 3,
24459 commutative: true,
24460 asm: loong64.AFMSUBD,
24461 reg: regInfo{
24462 inputs: []inputInfo{
24463 {0, 4611686017353646080},
24464 {1, 4611686017353646080},
24465 {2, 4611686017353646080},
24466 },
24467 outputs: []outputInfo{
24468 {0, 4611686017353646080},
24469 },
24470 },
24471 },
24472 {
24473 name: "FNMADDF",
24474 argLen: 3,
24475 commutative: true,
24476 asm: loong64.AFNMADDF,
24477 reg: regInfo{
24478 inputs: []inputInfo{
24479 {0, 4611686017353646080},
24480 {1, 4611686017353646080},
24481 {2, 4611686017353646080},
24482 },
24483 outputs: []outputInfo{
24484 {0, 4611686017353646080},
24485 },
24486 },
24487 },
24488 {
24489 name: "FNMADDD",
24490 argLen: 3,
24491 commutative: true,
24492 asm: loong64.AFNMADDD,
24493 reg: regInfo{
24494 inputs: []inputInfo{
24495 {0, 4611686017353646080},
24496 {1, 4611686017353646080},
24497 {2, 4611686017353646080},
24498 },
24499 outputs: []outputInfo{
24500 {0, 4611686017353646080},
24501 },
24502 },
24503 },
24504 {
24505 name: "FNMSUBF",
24506 argLen: 3,
24507 commutative: true,
24508 asm: loong64.AFNMSUBF,
24509 reg: regInfo{
24510 inputs: []inputInfo{
24511 {0, 4611686017353646080},
24512 {1, 4611686017353646080},
24513 {2, 4611686017353646080},
24514 },
24515 outputs: []outputInfo{
24516 {0, 4611686017353646080},
24517 },
24518 },
24519 },
24520 {
24521 name: "FNMSUBD",
24522 argLen: 3,
24523 commutative: true,
24524 asm: loong64.AFNMSUBD,
24525 reg: regInfo{
24526 inputs: []inputInfo{
24527 {0, 4611686017353646080},
24528 {1, 4611686017353646080},
24529 {2, 4611686017353646080},
24530 },
24531 outputs: []outputInfo{
24532 {0, 4611686017353646080},
24533 },
24534 },
24535 },
24536 {
24537 name: "FMINF",
24538 argLen: 2,
24539 commutative: true,
24540 resultNotInArgs: true,
24541 asm: loong64.AFMINF,
24542 reg: regInfo{
24543 inputs: []inputInfo{
24544 {0, 4611686017353646080},
24545 {1, 4611686017353646080},
24546 },
24547 outputs: []outputInfo{
24548 {0, 4611686017353646080},
24549 },
24550 },
24551 },
24552 {
24553 name: "FMIND",
24554 argLen: 2,
24555 commutative: true,
24556 resultNotInArgs: true,
24557 asm: loong64.AFMIND,
24558 reg: regInfo{
24559 inputs: []inputInfo{
24560 {0, 4611686017353646080},
24561 {1, 4611686017353646080},
24562 },
24563 outputs: []outputInfo{
24564 {0, 4611686017353646080},
24565 },
24566 },
24567 },
24568 {
24569 name: "FMAXF",
24570 argLen: 2,
24571 commutative: true,
24572 resultNotInArgs: true,
24573 asm: loong64.AFMAXF,
24574 reg: regInfo{
24575 inputs: []inputInfo{
24576 {0, 4611686017353646080},
24577 {1, 4611686017353646080},
24578 },
24579 outputs: []outputInfo{
24580 {0, 4611686017353646080},
24581 },
24582 },
24583 },
24584 {
24585 name: "FMAXD",
24586 argLen: 2,
24587 commutative: true,
24588 resultNotInArgs: true,
24589 asm: loong64.AFMAXD,
24590 reg: regInfo{
24591 inputs: []inputInfo{
24592 {0, 4611686017353646080},
24593 {1, 4611686017353646080},
24594 },
24595 outputs: []outputInfo{
24596 {0, 4611686017353646080},
24597 },
24598 },
24599 },
24600 {
24601 name: "MASKEQZ",
24602 argLen: 2,
24603 asm: loong64.AMASKEQZ,
24604 reg: regInfo{
24605 inputs: []inputInfo{
24606 {0, 1073741816},
24607 {1, 1073741816},
24608 },
24609 outputs: []outputInfo{
24610 {0, 1071644664},
24611 },
24612 },
24613 },
24614 {
24615 name: "MASKNEZ",
24616 argLen: 2,
24617 asm: loong64.AMASKNEZ,
24618 reg: regInfo{
24619 inputs: []inputInfo{
24620 {0, 1073741816},
24621 {1, 1073741816},
24622 },
24623 outputs: []outputInfo{
24624 {0, 1071644664},
24625 },
24626 },
24627 },
24628 {
24629 name: "FCOPYSGD",
24630 argLen: 2,
24631 asm: loong64.AFCOPYSGD,
24632 reg: regInfo{
24633 inputs: []inputInfo{
24634 {0, 4611686017353646080},
24635 {1, 4611686017353646080},
24636 },
24637 outputs: []outputInfo{
24638 {0, 4611686017353646080},
24639 },
24640 },
24641 },
24642 {
24643 name: "SLL",
24644 argLen: 2,
24645 asm: loong64.ASLL,
24646 reg: regInfo{
24647 inputs: []inputInfo{
24648 {0, 1073741816},
24649 {1, 1073741816},
24650 },
24651 outputs: []outputInfo{
24652 {0, 1071644664},
24653 },
24654 },
24655 },
24656 {
24657 name: "SLLV",
24658 argLen: 2,
24659 asm: loong64.ASLLV,
24660 reg: regInfo{
24661 inputs: []inputInfo{
24662 {0, 1073741816},
24663 {1, 1073741816},
24664 },
24665 outputs: []outputInfo{
24666 {0, 1071644664},
24667 },
24668 },
24669 },
24670 {
24671 name: "SLLconst",
24672 auxType: auxInt64,
24673 argLen: 1,
24674 asm: loong64.ASLL,
24675 reg: regInfo{
24676 inputs: []inputInfo{
24677 {0, 1073741816},
24678 },
24679 outputs: []outputInfo{
24680 {0, 1071644664},
24681 },
24682 },
24683 },
24684 {
24685 name: "SLLVconst",
24686 auxType: auxInt64,
24687 argLen: 1,
24688 asm: loong64.ASLLV,
24689 reg: regInfo{
24690 inputs: []inputInfo{
24691 {0, 1073741816},
24692 },
24693 outputs: []outputInfo{
24694 {0, 1071644664},
24695 },
24696 },
24697 },
24698 {
24699 name: "SRL",
24700 argLen: 2,
24701 asm: loong64.ASRL,
24702 reg: regInfo{
24703 inputs: []inputInfo{
24704 {0, 1073741816},
24705 {1, 1073741816},
24706 },
24707 outputs: []outputInfo{
24708 {0, 1071644664},
24709 },
24710 },
24711 },
24712 {
24713 name: "SRLV",
24714 argLen: 2,
24715 asm: loong64.ASRLV,
24716 reg: regInfo{
24717 inputs: []inputInfo{
24718 {0, 1073741816},
24719 {1, 1073741816},
24720 },
24721 outputs: []outputInfo{
24722 {0, 1071644664},
24723 },
24724 },
24725 },
24726 {
24727 name: "SRLconst",
24728 auxType: auxInt64,
24729 argLen: 1,
24730 asm: loong64.ASRL,
24731 reg: regInfo{
24732 inputs: []inputInfo{
24733 {0, 1073741816},
24734 },
24735 outputs: []outputInfo{
24736 {0, 1071644664},
24737 },
24738 },
24739 },
24740 {
24741 name: "SRLVconst",
24742 auxType: auxInt64,
24743 argLen: 1,
24744 asm: loong64.ASRLV,
24745 reg: regInfo{
24746 inputs: []inputInfo{
24747 {0, 1073741816},
24748 },
24749 outputs: []outputInfo{
24750 {0, 1071644664},
24751 },
24752 },
24753 },
24754 {
24755 name: "SRA",
24756 argLen: 2,
24757 asm: loong64.ASRA,
24758 reg: regInfo{
24759 inputs: []inputInfo{
24760 {0, 1073741816},
24761 {1, 1073741816},
24762 },
24763 outputs: []outputInfo{
24764 {0, 1071644664},
24765 },
24766 },
24767 },
24768 {
24769 name: "SRAV",
24770 argLen: 2,
24771 asm: loong64.ASRAV,
24772 reg: regInfo{
24773 inputs: []inputInfo{
24774 {0, 1073741816},
24775 {1, 1073741816},
24776 },
24777 outputs: []outputInfo{
24778 {0, 1071644664},
24779 },
24780 },
24781 },
24782 {
24783 name: "SRAconst",
24784 auxType: auxInt64,
24785 argLen: 1,
24786 asm: loong64.ASRA,
24787 reg: regInfo{
24788 inputs: []inputInfo{
24789 {0, 1073741816},
24790 },
24791 outputs: []outputInfo{
24792 {0, 1071644664},
24793 },
24794 },
24795 },
24796 {
24797 name: "SRAVconst",
24798 auxType: auxInt64,
24799 argLen: 1,
24800 asm: loong64.ASRAV,
24801 reg: regInfo{
24802 inputs: []inputInfo{
24803 {0, 1073741816},
24804 },
24805 outputs: []outputInfo{
24806 {0, 1071644664},
24807 },
24808 },
24809 },
24810 {
24811 name: "ROTR",
24812 argLen: 2,
24813 asm: loong64.AROTR,
24814 reg: regInfo{
24815 inputs: []inputInfo{
24816 {0, 1073741816},
24817 {1, 1073741816},
24818 },
24819 outputs: []outputInfo{
24820 {0, 1071644664},
24821 },
24822 },
24823 },
24824 {
24825 name: "ROTRV",
24826 argLen: 2,
24827 asm: loong64.AROTRV,
24828 reg: regInfo{
24829 inputs: []inputInfo{
24830 {0, 1073741816},
24831 {1, 1073741816},
24832 },
24833 outputs: []outputInfo{
24834 {0, 1071644664},
24835 },
24836 },
24837 },
24838 {
24839 name: "ROTRconst",
24840 auxType: auxInt64,
24841 argLen: 1,
24842 asm: loong64.AROTR,
24843 reg: regInfo{
24844 inputs: []inputInfo{
24845 {0, 1073741816},
24846 },
24847 outputs: []outputInfo{
24848 {0, 1071644664},
24849 },
24850 },
24851 },
24852 {
24853 name: "ROTRVconst",
24854 auxType: auxInt64,
24855 argLen: 1,
24856 asm: loong64.AROTRV,
24857 reg: regInfo{
24858 inputs: []inputInfo{
24859 {0, 1073741816},
24860 },
24861 outputs: []outputInfo{
24862 {0, 1071644664},
24863 },
24864 },
24865 },
24866 {
24867 name: "SGT",
24868 argLen: 2,
24869 asm: loong64.ASGT,
24870 reg: regInfo{
24871 inputs: []inputInfo{
24872 {0, 1073741816},
24873 {1, 1073741816},
24874 },
24875 outputs: []outputInfo{
24876 {0, 1071644664},
24877 },
24878 },
24879 },
24880 {
24881 name: "SGTconst",
24882 auxType: auxInt64,
24883 argLen: 1,
24884 asm: loong64.ASGT,
24885 reg: regInfo{
24886 inputs: []inputInfo{
24887 {0, 1073741816},
24888 },
24889 outputs: []outputInfo{
24890 {0, 1071644664},
24891 },
24892 },
24893 },
24894 {
24895 name: "SGTU",
24896 argLen: 2,
24897 asm: loong64.ASGTU,
24898 reg: regInfo{
24899 inputs: []inputInfo{
24900 {0, 1073741816},
24901 {1, 1073741816},
24902 },
24903 outputs: []outputInfo{
24904 {0, 1071644664},
24905 },
24906 },
24907 },
24908 {
24909 name: "SGTUconst",
24910 auxType: auxInt64,
24911 argLen: 1,
24912 asm: loong64.ASGTU,
24913 reg: regInfo{
24914 inputs: []inputInfo{
24915 {0, 1073741816},
24916 },
24917 outputs: []outputInfo{
24918 {0, 1071644664},
24919 },
24920 },
24921 },
24922 {
24923 name: "CMPEQF",
24924 argLen: 2,
24925 asm: loong64.ACMPEQF,
24926 reg: regInfo{
24927 inputs: []inputInfo{
24928 {0, 4611686017353646080},
24929 {1, 4611686017353646080},
24930 },
24931 },
24932 },
24933 {
24934 name: "CMPEQD",
24935 argLen: 2,
24936 asm: loong64.ACMPEQD,
24937 reg: regInfo{
24938 inputs: []inputInfo{
24939 {0, 4611686017353646080},
24940 {1, 4611686017353646080},
24941 },
24942 },
24943 },
24944 {
24945 name: "CMPGEF",
24946 argLen: 2,
24947 asm: loong64.ACMPGEF,
24948 reg: regInfo{
24949 inputs: []inputInfo{
24950 {0, 4611686017353646080},
24951 {1, 4611686017353646080},
24952 },
24953 },
24954 },
24955 {
24956 name: "CMPGED",
24957 argLen: 2,
24958 asm: loong64.ACMPGED,
24959 reg: regInfo{
24960 inputs: []inputInfo{
24961 {0, 4611686017353646080},
24962 {1, 4611686017353646080},
24963 },
24964 },
24965 },
24966 {
24967 name: "CMPGTF",
24968 argLen: 2,
24969 asm: loong64.ACMPGTF,
24970 reg: regInfo{
24971 inputs: []inputInfo{
24972 {0, 4611686017353646080},
24973 {1, 4611686017353646080},
24974 },
24975 },
24976 },
24977 {
24978 name: "CMPGTD",
24979 argLen: 2,
24980 asm: loong64.ACMPGTD,
24981 reg: regInfo{
24982 inputs: []inputInfo{
24983 {0, 4611686017353646080},
24984 {1, 4611686017353646080},
24985 },
24986 },
24987 },
24988 {
24989 name: "BSTRPICKW",
24990 auxType: auxInt64,
24991 argLen: 1,
24992 asm: loong64.ABSTRPICKW,
24993 reg: regInfo{
24994 inputs: []inputInfo{
24995 {0, 1073741816},
24996 },
24997 outputs: []outputInfo{
24998 {0, 1071644664},
24999 },
25000 },
25001 },
25002 {
25003 name: "BSTRPICKV",
25004 auxType: auxInt64,
25005 argLen: 1,
25006 asm: loong64.ABSTRPICKV,
25007 reg: regInfo{
25008 inputs: []inputInfo{
25009 {0, 1073741816},
25010 },
25011 outputs: []outputInfo{
25012 {0, 1071644664},
25013 },
25014 },
25015 },
25016 {
25017 name: "MOVVconst",
25018 auxType: auxInt64,
25019 argLen: 0,
25020 rematerializeable: true,
25021 asm: loong64.AMOVV,
25022 reg: regInfo{
25023 outputs: []outputInfo{
25024 {0, 1071644664},
25025 },
25026 },
25027 },
25028 {
25029 name: "MOVFconst",
25030 auxType: auxFloat64,
25031 argLen: 0,
25032 rematerializeable: true,
25033 asm: loong64.AMOVF,
25034 reg: regInfo{
25035 outputs: []outputInfo{
25036 {0, 4611686017353646080},
25037 },
25038 },
25039 },
25040 {
25041 name: "MOVDconst",
25042 auxType: auxFloat64,
25043 argLen: 0,
25044 rematerializeable: true,
25045 asm: loong64.AMOVD,
25046 reg: regInfo{
25047 outputs: []outputInfo{
25048 {0, 4611686017353646080},
25049 },
25050 },
25051 },
25052 {
25053 name: "MOVVaddr",
25054 auxType: auxSymOff,
25055 argLen: 1,
25056 rematerializeable: true,
25057 symEffect: SymAddr,
25058 asm: loong64.AMOVV,
25059 reg: regInfo{
25060 inputs: []inputInfo{
25061 {0, 4611686018427387908},
25062 },
25063 outputs: []outputInfo{
25064 {0, 1071644664},
25065 },
25066 },
25067 },
25068 {
25069 name: "MOVBload",
25070 auxType: auxSymOff,
25071 argLen: 2,
25072 faultOnNilArg0: true,
25073 symEffect: SymRead,
25074 asm: loong64.AMOVB,
25075 reg: regInfo{
25076 inputs: []inputInfo{
25077 {0, 4611686019501129724},
25078 },
25079 outputs: []outputInfo{
25080 {0, 1071644664},
25081 },
25082 },
25083 },
25084 {
25085 name: "MOVBUload",
25086 auxType: auxSymOff,
25087 argLen: 2,
25088 faultOnNilArg0: true,
25089 symEffect: SymRead,
25090 asm: loong64.AMOVBU,
25091 reg: regInfo{
25092 inputs: []inputInfo{
25093 {0, 4611686019501129724},
25094 },
25095 outputs: []outputInfo{
25096 {0, 1071644664},
25097 },
25098 },
25099 },
25100 {
25101 name: "MOVHload",
25102 auxType: auxSymOff,
25103 argLen: 2,
25104 faultOnNilArg0: true,
25105 symEffect: SymRead,
25106 asm: loong64.AMOVH,
25107 reg: regInfo{
25108 inputs: []inputInfo{
25109 {0, 4611686019501129724},
25110 },
25111 outputs: []outputInfo{
25112 {0, 1071644664},
25113 },
25114 },
25115 },
25116 {
25117 name: "MOVHUload",
25118 auxType: auxSymOff,
25119 argLen: 2,
25120 faultOnNilArg0: true,
25121 symEffect: SymRead,
25122 asm: loong64.AMOVHU,
25123 reg: regInfo{
25124 inputs: []inputInfo{
25125 {0, 4611686019501129724},
25126 },
25127 outputs: []outputInfo{
25128 {0, 1071644664},
25129 },
25130 },
25131 },
25132 {
25133 name: "MOVWload",
25134 auxType: auxSymOff,
25135 argLen: 2,
25136 faultOnNilArg0: true,
25137 symEffect: SymRead,
25138 asm: loong64.AMOVW,
25139 reg: regInfo{
25140 inputs: []inputInfo{
25141 {0, 4611686019501129724},
25142 },
25143 outputs: []outputInfo{
25144 {0, 1071644664},
25145 },
25146 },
25147 },
25148 {
25149 name: "MOVWUload",
25150 auxType: auxSymOff,
25151 argLen: 2,
25152 faultOnNilArg0: true,
25153 symEffect: SymRead,
25154 asm: loong64.AMOVWU,
25155 reg: regInfo{
25156 inputs: []inputInfo{
25157 {0, 4611686019501129724},
25158 },
25159 outputs: []outputInfo{
25160 {0, 1071644664},
25161 },
25162 },
25163 },
25164 {
25165 name: "MOVVload",
25166 auxType: auxSymOff,
25167 argLen: 2,
25168 faultOnNilArg0: true,
25169 symEffect: SymRead,
25170 asm: loong64.AMOVV,
25171 reg: regInfo{
25172 inputs: []inputInfo{
25173 {0, 4611686019501129724},
25174 },
25175 outputs: []outputInfo{
25176 {0, 1071644664},
25177 },
25178 },
25179 },
25180 {
25181 name: "MOVFload",
25182 auxType: auxSymOff,
25183 argLen: 2,
25184 faultOnNilArg0: true,
25185 symEffect: SymRead,
25186 asm: loong64.AMOVF,
25187 reg: regInfo{
25188 inputs: []inputInfo{
25189 {0, 4611686019501129724},
25190 },
25191 outputs: []outputInfo{
25192 {0, 4611686017353646080},
25193 },
25194 },
25195 },
25196 {
25197 name: "MOVDload",
25198 auxType: auxSymOff,
25199 argLen: 2,
25200 faultOnNilArg0: true,
25201 symEffect: SymRead,
25202 asm: loong64.AMOVD,
25203 reg: regInfo{
25204 inputs: []inputInfo{
25205 {0, 4611686019501129724},
25206 },
25207 outputs: []outputInfo{
25208 {0, 4611686017353646080},
25209 },
25210 },
25211 },
25212 {
25213 name: "MOVVloadidx",
25214 argLen: 3,
25215 asm: loong64.AMOVV,
25216 reg: regInfo{
25217 inputs: []inputInfo{
25218 {1, 1073741816},
25219 {0, 4611686019501129724},
25220 },
25221 outputs: []outputInfo{
25222 {0, 1071644664},
25223 },
25224 },
25225 },
25226 {
25227 name: "MOVWloadidx",
25228 argLen: 3,
25229 asm: loong64.AMOVW,
25230 reg: regInfo{
25231 inputs: []inputInfo{
25232 {1, 1073741816},
25233 {0, 4611686019501129724},
25234 },
25235 outputs: []outputInfo{
25236 {0, 1071644664},
25237 },
25238 },
25239 },
25240 {
25241 name: "MOVWUloadidx",
25242 argLen: 3,
25243 asm: loong64.AMOVWU,
25244 reg: regInfo{
25245 inputs: []inputInfo{
25246 {1, 1073741816},
25247 {0, 4611686019501129724},
25248 },
25249 outputs: []outputInfo{
25250 {0, 1071644664},
25251 },
25252 },
25253 },
25254 {
25255 name: "MOVHloadidx",
25256 argLen: 3,
25257 asm: loong64.AMOVH,
25258 reg: regInfo{
25259 inputs: []inputInfo{
25260 {1, 1073741816},
25261 {0, 4611686019501129724},
25262 },
25263 outputs: []outputInfo{
25264 {0, 1071644664},
25265 },
25266 },
25267 },
25268 {
25269 name: "MOVHUloadidx",
25270 argLen: 3,
25271 asm: loong64.AMOVHU,
25272 reg: regInfo{
25273 inputs: []inputInfo{
25274 {1, 1073741816},
25275 {0, 4611686019501129724},
25276 },
25277 outputs: []outputInfo{
25278 {0, 1071644664},
25279 },
25280 },
25281 },
25282 {
25283 name: "MOVBloadidx",
25284 argLen: 3,
25285 asm: loong64.AMOVB,
25286 reg: regInfo{
25287 inputs: []inputInfo{
25288 {1, 1073741816},
25289 {0, 4611686019501129724},
25290 },
25291 outputs: []outputInfo{
25292 {0, 1071644664},
25293 },
25294 },
25295 },
25296 {
25297 name: "MOVBUloadidx",
25298 argLen: 3,
25299 asm: loong64.AMOVBU,
25300 reg: regInfo{
25301 inputs: []inputInfo{
25302 {1, 1073741816},
25303 {0, 4611686019501129724},
25304 },
25305 outputs: []outputInfo{
25306 {0, 1071644664},
25307 },
25308 },
25309 },
25310 {
25311 name: "MOVFloadidx",
25312 argLen: 3,
25313 asm: loong64.AMOVF,
25314 reg: regInfo{
25315 inputs: []inputInfo{
25316 {1, 1073741816},
25317 {0, 4611686019501129724},
25318 },
25319 outputs: []outputInfo{
25320 {0, 4611686017353646080},
25321 },
25322 },
25323 },
25324 {
25325 name: "MOVDloadidx",
25326 argLen: 3,
25327 asm: loong64.AMOVD,
25328 reg: regInfo{
25329 inputs: []inputInfo{
25330 {1, 1073741816},
25331 {0, 4611686019501129724},
25332 },
25333 outputs: []outputInfo{
25334 {0, 4611686017353646080},
25335 },
25336 },
25337 },
25338 {
25339 name: "MOVBstore",
25340 auxType: auxSymOff,
25341 argLen: 3,
25342 faultOnNilArg0: true,
25343 symEffect: SymWrite,
25344 asm: loong64.AMOVB,
25345 reg: regInfo{
25346 inputs: []inputInfo{
25347 {1, 1073741816},
25348 {0, 4611686019501129724},
25349 },
25350 },
25351 },
25352 {
25353 name: "MOVHstore",
25354 auxType: auxSymOff,
25355 argLen: 3,
25356 faultOnNilArg0: true,
25357 symEffect: SymWrite,
25358 asm: loong64.AMOVH,
25359 reg: regInfo{
25360 inputs: []inputInfo{
25361 {1, 1073741816},
25362 {0, 4611686019501129724},
25363 },
25364 },
25365 },
25366 {
25367 name: "MOVWstore",
25368 auxType: auxSymOff,
25369 argLen: 3,
25370 faultOnNilArg0: true,
25371 symEffect: SymWrite,
25372 asm: loong64.AMOVW,
25373 reg: regInfo{
25374 inputs: []inputInfo{
25375 {1, 1073741816},
25376 {0, 4611686019501129724},
25377 },
25378 },
25379 },
25380 {
25381 name: "MOVVstore",
25382 auxType: auxSymOff,
25383 argLen: 3,
25384 faultOnNilArg0: true,
25385 symEffect: SymWrite,
25386 asm: loong64.AMOVV,
25387 reg: regInfo{
25388 inputs: []inputInfo{
25389 {1, 1073741816},
25390 {0, 4611686019501129724},
25391 },
25392 },
25393 },
25394 {
25395 name: "MOVFstore",
25396 auxType: auxSymOff,
25397 argLen: 3,
25398 faultOnNilArg0: true,
25399 symEffect: SymWrite,
25400 asm: loong64.AMOVF,
25401 reg: regInfo{
25402 inputs: []inputInfo{
25403 {0, 4611686019501129724},
25404 {1, 4611686017353646080},
25405 },
25406 },
25407 },
25408 {
25409 name: "MOVDstore",
25410 auxType: auxSymOff,
25411 argLen: 3,
25412 faultOnNilArg0: true,
25413 symEffect: SymWrite,
25414 asm: loong64.AMOVD,
25415 reg: regInfo{
25416 inputs: []inputInfo{
25417 {0, 4611686019501129724},
25418 {1, 4611686017353646080},
25419 },
25420 },
25421 },
25422 {
25423 name: "MOVBstoreidx",
25424 argLen: 4,
25425 asm: loong64.AMOVB,
25426 reg: regInfo{
25427 inputs: []inputInfo{
25428 {1, 1073741816},
25429 {2, 1073741816},
25430 {0, 4611686019501129724},
25431 },
25432 },
25433 },
25434 {
25435 name: "MOVHstoreidx",
25436 argLen: 4,
25437 asm: loong64.AMOVH,
25438 reg: regInfo{
25439 inputs: []inputInfo{
25440 {1, 1073741816},
25441 {2, 1073741816},
25442 {0, 4611686019501129724},
25443 },
25444 },
25445 },
25446 {
25447 name: "MOVWstoreidx",
25448 argLen: 4,
25449 asm: loong64.AMOVW,
25450 reg: regInfo{
25451 inputs: []inputInfo{
25452 {1, 1073741816},
25453 {2, 1073741816},
25454 {0, 4611686019501129724},
25455 },
25456 },
25457 },
25458 {
25459 name: "MOVVstoreidx",
25460 argLen: 4,
25461 asm: loong64.AMOVV,
25462 reg: regInfo{
25463 inputs: []inputInfo{
25464 {1, 1073741816},
25465 {2, 1073741816},
25466 {0, 4611686019501129724},
25467 },
25468 },
25469 },
25470 {
25471 name: "MOVFstoreidx",
25472 argLen: 4,
25473 asm: loong64.AMOVF,
25474 reg: regInfo{
25475 inputs: []inputInfo{
25476 {1, 1073741816},
25477 {0, 4611686019501129724},
25478 {2, 4611686017353646080},
25479 },
25480 },
25481 },
25482 {
25483 name: "MOVDstoreidx",
25484 argLen: 4,
25485 asm: loong64.AMOVD,
25486 reg: regInfo{
25487 inputs: []inputInfo{
25488 {1, 1073741816},
25489 {0, 4611686019501129724},
25490 {2, 4611686017353646080},
25491 },
25492 },
25493 },
25494 {
25495 name: "MOVBstorezero",
25496 auxType: auxSymOff,
25497 argLen: 2,
25498 faultOnNilArg0: true,
25499 symEffect: SymWrite,
25500 asm: loong64.AMOVB,
25501 reg: regInfo{
25502 inputs: []inputInfo{
25503 {0, 4611686019501129724},
25504 },
25505 },
25506 },
25507 {
25508 name: "MOVHstorezero",
25509 auxType: auxSymOff,
25510 argLen: 2,
25511 faultOnNilArg0: true,
25512 symEffect: SymWrite,
25513 asm: loong64.AMOVH,
25514 reg: regInfo{
25515 inputs: []inputInfo{
25516 {0, 4611686019501129724},
25517 },
25518 },
25519 },
25520 {
25521 name: "MOVWstorezero",
25522 auxType: auxSymOff,
25523 argLen: 2,
25524 faultOnNilArg0: true,
25525 symEffect: SymWrite,
25526 asm: loong64.AMOVW,
25527 reg: regInfo{
25528 inputs: []inputInfo{
25529 {0, 4611686019501129724},
25530 },
25531 },
25532 },
25533 {
25534 name: "MOVVstorezero",
25535 auxType: auxSymOff,
25536 argLen: 2,
25537 faultOnNilArg0: true,
25538 symEffect: SymWrite,
25539 asm: loong64.AMOVV,
25540 reg: regInfo{
25541 inputs: []inputInfo{
25542 {0, 4611686019501129724},
25543 },
25544 },
25545 },
25546 {
25547 name: "MOVBstorezeroidx",
25548 argLen: 3,
25549 asm: loong64.AMOVB,
25550 reg: regInfo{
25551 inputs: []inputInfo{
25552 {1, 1073741816},
25553 {0, 4611686019501129724},
25554 },
25555 },
25556 },
25557 {
25558 name: "MOVHstorezeroidx",
25559 argLen: 3,
25560 asm: loong64.AMOVH,
25561 reg: regInfo{
25562 inputs: []inputInfo{
25563 {1, 1073741816},
25564 {0, 4611686019501129724},
25565 },
25566 },
25567 },
25568 {
25569 name: "MOVWstorezeroidx",
25570 argLen: 3,
25571 asm: loong64.AMOVW,
25572 reg: regInfo{
25573 inputs: []inputInfo{
25574 {1, 1073741816},
25575 {0, 4611686019501129724},
25576 },
25577 },
25578 },
25579 {
25580 name: "MOVVstorezeroidx",
25581 argLen: 3,
25582 asm: loong64.AMOVV,
25583 reg: regInfo{
25584 inputs: []inputInfo{
25585 {1, 1073741816},
25586 {0, 4611686019501129724},
25587 },
25588 },
25589 },
25590 {
25591 name: "MOVWfpgp",
25592 argLen: 1,
25593 asm: loong64.AMOVW,
25594 reg: regInfo{
25595 inputs: []inputInfo{
25596 {0, 4611686017353646080},
25597 },
25598 outputs: []outputInfo{
25599 {0, 1071644664},
25600 },
25601 },
25602 },
25603 {
25604 name: "MOVWgpfp",
25605 argLen: 1,
25606 asm: loong64.AMOVW,
25607 reg: regInfo{
25608 inputs: []inputInfo{
25609 {0, 1071644664},
25610 },
25611 outputs: []outputInfo{
25612 {0, 4611686017353646080},
25613 },
25614 },
25615 },
25616 {
25617 name: "MOVVfpgp",
25618 argLen: 1,
25619 asm: loong64.AMOVV,
25620 reg: regInfo{
25621 inputs: []inputInfo{
25622 {0, 4611686017353646080},
25623 },
25624 outputs: []outputInfo{
25625 {0, 1071644664},
25626 },
25627 },
25628 },
25629 {
25630 name: "MOVVgpfp",
25631 argLen: 1,
25632 asm: loong64.AMOVV,
25633 reg: regInfo{
25634 inputs: []inputInfo{
25635 {0, 1071644664},
25636 },
25637 outputs: []outputInfo{
25638 {0, 4611686017353646080},
25639 },
25640 },
25641 },
25642 {
25643 name: "MOVBreg",
25644 argLen: 1,
25645 asm: loong64.AMOVB,
25646 reg: regInfo{
25647 inputs: []inputInfo{
25648 {0, 1073741816},
25649 },
25650 outputs: []outputInfo{
25651 {0, 1071644664},
25652 },
25653 },
25654 },
25655 {
25656 name: "MOVBUreg",
25657 argLen: 1,
25658 asm: loong64.AMOVBU,
25659 reg: regInfo{
25660 inputs: []inputInfo{
25661 {0, 1073741816},
25662 },
25663 outputs: []outputInfo{
25664 {0, 1071644664},
25665 },
25666 },
25667 },
25668 {
25669 name: "MOVHreg",
25670 argLen: 1,
25671 asm: loong64.AMOVH,
25672 reg: regInfo{
25673 inputs: []inputInfo{
25674 {0, 1073741816},
25675 },
25676 outputs: []outputInfo{
25677 {0, 1071644664},
25678 },
25679 },
25680 },
25681 {
25682 name: "MOVHUreg",
25683 argLen: 1,
25684 asm: loong64.AMOVHU,
25685 reg: regInfo{
25686 inputs: []inputInfo{
25687 {0, 1073741816},
25688 },
25689 outputs: []outputInfo{
25690 {0, 1071644664},
25691 },
25692 },
25693 },
25694 {
25695 name: "MOVWreg",
25696 argLen: 1,
25697 asm: loong64.AMOVW,
25698 reg: regInfo{
25699 inputs: []inputInfo{
25700 {0, 1073741816},
25701 },
25702 outputs: []outputInfo{
25703 {0, 1071644664},
25704 },
25705 },
25706 },
25707 {
25708 name: "MOVWUreg",
25709 argLen: 1,
25710 asm: loong64.AMOVWU,
25711 reg: regInfo{
25712 inputs: []inputInfo{
25713 {0, 1073741816},
25714 },
25715 outputs: []outputInfo{
25716 {0, 1071644664},
25717 },
25718 },
25719 },
25720 {
25721 name: "MOVVreg",
25722 argLen: 1,
25723 asm: loong64.AMOVV,
25724 reg: regInfo{
25725 inputs: []inputInfo{
25726 {0, 1073741816},
25727 },
25728 outputs: []outputInfo{
25729 {0, 1071644664},
25730 },
25731 },
25732 },
25733 {
25734 name: "MOVVnop",
25735 argLen: 1,
25736 resultInArg0: true,
25737 reg: regInfo{
25738 inputs: []inputInfo{
25739 {0, 1071644664},
25740 },
25741 outputs: []outputInfo{
25742 {0, 1071644664},
25743 },
25744 },
25745 },
25746 {
25747 name: "MOVWF",
25748 argLen: 1,
25749 asm: loong64.AMOVWF,
25750 reg: regInfo{
25751 inputs: []inputInfo{
25752 {0, 4611686017353646080},
25753 },
25754 outputs: []outputInfo{
25755 {0, 4611686017353646080},
25756 },
25757 },
25758 },
25759 {
25760 name: "MOVWD",
25761 argLen: 1,
25762 asm: loong64.AMOVWD,
25763 reg: regInfo{
25764 inputs: []inputInfo{
25765 {0, 4611686017353646080},
25766 },
25767 outputs: []outputInfo{
25768 {0, 4611686017353646080},
25769 },
25770 },
25771 },
25772 {
25773 name: "MOVVF",
25774 argLen: 1,
25775 asm: loong64.AMOVVF,
25776 reg: regInfo{
25777 inputs: []inputInfo{
25778 {0, 4611686017353646080},
25779 },
25780 outputs: []outputInfo{
25781 {0, 4611686017353646080},
25782 },
25783 },
25784 },
25785 {
25786 name: "MOVVD",
25787 argLen: 1,
25788 asm: loong64.AMOVVD,
25789 reg: regInfo{
25790 inputs: []inputInfo{
25791 {0, 4611686017353646080},
25792 },
25793 outputs: []outputInfo{
25794 {0, 4611686017353646080},
25795 },
25796 },
25797 },
25798 {
25799 name: "TRUNCFW",
25800 argLen: 1,
25801 asm: loong64.ATRUNCFW,
25802 reg: regInfo{
25803 inputs: []inputInfo{
25804 {0, 4611686017353646080},
25805 },
25806 outputs: []outputInfo{
25807 {0, 4611686017353646080},
25808 },
25809 },
25810 },
25811 {
25812 name: "TRUNCDW",
25813 argLen: 1,
25814 asm: loong64.ATRUNCDW,
25815 reg: regInfo{
25816 inputs: []inputInfo{
25817 {0, 4611686017353646080},
25818 },
25819 outputs: []outputInfo{
25820 {0, 4611686017353646080},
25821 },
25822 },
25823 },
25824 {
25825 name: "TRUNCFV",
25826 argLen: 1,
25827 asm: loong64.ATRUNCFV,
25828 reg: regInfo{
25829 inputs: []inputInfo{
25830 {0, 4611686017353646080},
25831 },
25832 outputs: []outputInfo{
25833 {0, 4611686017353646080},
25834 },
25835 },
25836 },
25837 {
25838 name: "TRUNCDV",
25839 argLen: 1,
25840 asm: loong64.ATRUNCDV,
25841 reg: regInfo{
25842 inputs: []inputInfo{
25843 {0, 4611686017353646080},
25844 },
25845 outputs: []outputInfo{
25846 {0, 4611686017353646080},
25847 },
25848 },
25849 },
25850 {
25851 name: "MOVFD",
25852 argLen: 1,
25853 asm: loong64.AMOVFD,
25854 reg: regInfo{
25855 inputs: []inputInfo{
25856 {0, 4611686017353646080},
25857 },
25858 outputs: []outputInfo{
25859 {0, 4611686017353646080},
25860 },
25861 },
25862 },
25863 {
25864 name: "MOVDF",
25865 argLen: 1,
25866 asm: loong64.AMOVDF,
25867 reg: regInfo{
25868 inputs: []inputInfo{
25869 {0, 4611686017353646080},
25870 },
25871 outputs: []outputInfo{
25872 {0, 4611686017353646080},
25873 },
25874 },
25875 },
25876 {
25877 name: "LoweredRound32F",
25878 argLen: 1,
25879 resultInArg0: true,
25880 reg: regInfo{
25881 inputs: []inputInfo{
25882 {0, 4611686017353646080},
25883 },
25884 outputs: []outputInfo{
25885 {0, 4611686017353646080},
25886 },
25887 },
25888 },
25889 {
25890 name: "LoweredRound64F",
25891 argLen: 1,
25892 resultInArg0: true,
25893 reg: regInfo{
25894 inputs: []inputInfo{
25895 {0, 4611686017353646080},
25896 },
25897 outputs: []outputInfo{
25898 {0, 4611686017353646080},
25899 },
25900 },
25901 },
25902 {
25903 name: "CALLstatic",
25904 auxType: auxCallOff,
25905 argLen: -1,
25906 clobberFlags: true,
25907 call: true,
25908 reg: regInfo{
25909 clobbers: 4611686018427387896,
25910 },
25911 },
25912 {
25913 name: "CALLtail",
25914 auxType: auxCallOff,
25915 argLen: -1,
25916 clobberFlags: true,
25917 call: true,
25918 tailCall: true,
25919 reg: regInfo{
25920 clobbers: 4611686018427387896,
25921 },
25922 },
25923 {
25924 name: "CALLclosure",
25925 auxType: auxCallOff,
25926 argLen: -1,
25927 clobberFlags: true,
25928 call: true,
25929 reg: regInfo{
25930 inputs: []inputInfo{
25931 {1, 268435456},
25932 {0, 1071644668},
25933 },
25934 clobbers: 4611686018427387896,
25935 },
25936 },
25937 {
25938 name: "CALLinter",
25939 auxType: auxCallOff,
25940 argLen: -1,
25941 clobberFlags: true,
25942 call: true,
25943 reg: regInfo{
25944 inputs: []inputInfo{
25945 {0, 1071644664},
25946 },
25947 clobbers: 4611686018427387896,
25948 },
25949 },
25950 {
25951 name: "DUFFZERO",
25952 auxType: auxInt64,
25953 argLen: 2,
25954 faultOnNilArg0: true,
25955 reg: regInfo{
25956 inputs: []inputInfo{
25957 {0, 524288},
25958 },
25959 clobbers: 524290,
25960 },
25961 },
25962 {
25963 name: "DUFFCOPY",
25964 auxType: auxInt64,
25965 argLen: 3,
25966 faultOnNilArg0: true,
25967 faultOnNilArg1: true,
25968 reg: regInfo{
25969 inputs: []inputInfo{
25970 {0, 1048576},
25971 {1, 524288},
25972 },
25973 clobbers: 1572866,
25974 },
25975 },
25976 {
25977 name: "LoweredZero",
25978 auxType: auxInt64,
25979 argLen: 3,
25980 faultOnNilArg0: true,
25981 reg: regInfo{
25982 inputs: []inputInfo{
25983 {0, 524288},
25984 {1, 1071644664},
25985 },
25986 clobbers: 524288,
25987 },
25988 },
25989 {
25990 name: "LoweredMove",
25991 auxType: auxInt64,
25992 argLen: 4,
25993 faultOnNilArg0: true,
25994 faultOnNilArg1: true,
25995 reg: regInfo{
25996 inputs: []inputInfo{
25997 {0, 1048576},
25998 {1, 524288},
25999 {2, 1071644664},
26000 },
26001 clobbers: 1572864,
26002 },
26003 },
26004 {
26005 name: "LoweredAtomicLoad8",
26006 argLen: 2,
26007 faultOnNilArg0: true,
26008 reg: regInfo{
26009 inputs: []inputInfo{
26010 {0, 4611686019501129724},
26011 },
26012 outputs: []outputInfo{
26013 {0, 1071644664},
26014 },
26015 },
26016 },
26017 {
26018 name: "LoweredAtomicLoad32",
26019 argLen: 2,
26020 faultOnNilArg0: true,
26021 reg: regInfo{
26022 inputs: []inputInfo{
26023 {0, 4611686019501129724},
26024 },
26025 outputs: []outputInfo{
26026 {0, 1071644664},
26027 },
26028 },
26029 },
26030 {
26031 name: "LoweredAtomicLoad64",
26032 argLen: 2,
26033 faultOnNilArg0: true,
26034 reg: regInfo{
26035 inputs: []inputInfo{
26036 {0, 4611686019501129724},
26037 },
26038 outputs: []outputInfo{
26039 {0, 1071644664},
26040 },
26041 },
26042 },
26043 {
26044 name: "LoweredAtomicStore8",
26045 argLen: 3,
26046 faultOnNilArg0: true,
26047 hasSideEffects: true,
26048 reg: regInfo{
26049 inputs: []inputInfo{
26050 {1, 1073741816},
26051 {0, 4611686019501129724},
26052 },
26053 },
26054 },
26055 {
26056 name: "LoweredAtomicStore32",
26057 argLen: 3,
26058 faultOnNilArg0: true,
26059 hasSideEffects: true,
26060 reg: regInfo{
26061 inputs: []inputInfo{
26062 {1, 1073741816},
26063 {0, 4611686019501129724},
26064 },
26065 },
26066 },
26067 {
26068 name: "LoweredAtomicStore64",
26069 argLen: 3,
26070 faultOnNilArg0: true,
26071 hasSideEffects: true,
26072 reg: regInfo{
26073 inputs: []inputInfo{
26074 {1, 1073741816},
26075 {0, 4611686019501129724},
26076 },
26077 },
26078 },
26079 {
26080 name: "LoweredAtomicStore8Variant",
26081 argLen: 3,
26082 faultOnNilArg0: true,
26083 hasSideEffects: true,
26084 reg: regInfo{
26085 inputs: []inputInfo{
26086 {1, 1073741816},
26087 {0, 4611686019501129724},
26088 },
26089 },
26090 },
26091 {
26092 name: "LoweredAtomicStore32Variant",
26093 argLen: 3,
26094 faultOnNilArg0: true,
26095 hasSideEffects: true,
26096 reg: regInfo{
26097 inputs: []inputInfo{
26098 {1, 1073741816},
26099 {0, 4611686019501129724},
26100 },
26101 },
26102 },
26103 {
26104 name: "LoweredAtomicStore64Variant",
26105 argLen: 3,
26106 faultOnNilArg0: true,
26107 hasSideEffects: true,
26108 reg: regInfo{
26109 inputs: []inputInfo{
26110 {1, 1073741816},
26111 {0, 4611686019501129724},
26112 },
26113 },
26114 },
26115 {
26116 name: "LoweredAtomicExchange32",
26117 argLen: 3,
26118 resultNotInArgs: true,
26119 faultOnNilArg0: true,
26120 hasSideEffects: true,
26121 reg: regInfo{
26122 inputs: []inputInfo{
26123 {1, 1073741816},
26124 {0, 4611686019501129724},
26125 },
26126 outputs: []outputInfo{
26127 {0, 1071644664},
26128 },
26129 },
26130 },
26131 {
26132 name: "LoweredAtomicExchange64",
26133 argLen: 3,
26134 resultNotInArgs: true,
26135 faultOnNilArg0: true,
26136 hasSideEffects: true,
26137 reg: regInfo{
26138 inputs: []inputInfo{
26139 {1, 1073741816},
26140 {0, 4611686019501129724},
26141 },
26142 outputs: []outputInfo{
26143 {0, 1071644664},
26144 },
26145 },
26146 },
26147 {
26148 name: "LoweredAtomicExchange8Variant",
26149 argLen: 3,
26150 resultNotInArgs: true,
26151 faultOnNilArg0: true,
26152 hasSideEffects: true,
26153 reg: regInfo{
26154 inputs: []inputInfo{
26155 {1, 1073741816},
26156 {0, 4611686019501129724},
26157 },
26158 outputs: []outputInfo{
26159 {0, 1071644664},
26160 },
26161 },
26162 },
26163 {
26164 name: "LoweredAtomicAdd32",
26165 argLen: 3,
26166 resultNotInArgs: true,
26167 faultOnNilArg0: true,
26168 hasSideEffects: true,
26169 reg: regInfo{
26170 inputs: []inputInfo{
26171 {1, 1073741816},
26172 {0, 4611686019501129724},
26173 },
26174 outputs: []outputInfo{
26175 {0, 1071644664},
26176 },
26177 },
26178 },
26179 {
26180 name: "LoweredAtomicAdd64",
26181 argLen: 3,
26182 resultNotInArgs: true,
26183 faultOnNilArg0: true,
26184 hasSideEffects: true,
26185 reg: regInfo{
26186 inputs: []inputInfo{
26187 {1, 1073741816},
26188 {0, 4611686019501129724},
26189 },
26190 outputs: []outputInfo{
26191 {0, 1071644664},
26192 },
26193 },
26194 },
26195 {
26196 name: "LoweredAtomicCas32",
26197 argLen: 4,
26198 resultNotInArgs: true,
26199 faultOnNilArg0: true,
26200 hasSideEffects: true,
26201 unsafePoint: true,
26202 reg: regInfo{
26203 inputs: []inputInfo{
26204 {1, 1073741816},
26205 {2, 1073741816},
26206 {0, 4611686019501129724},
26207 },
26208 outputs: []outputInfo{
26209 {0, 1071644664},
26210 },
26211 },
26212 },
26213 {
26214 name: "LoweredAtomicCas64",
26215 argLen: 4,
26216 resultNotInArgs: true,
26217 faultOnNilArg0: true,
26218 hasSideEffects: true,
26219 unsafePoint: true,
26220 reg: regInfo{
26221 inputs: []inputInfo{
26222 {1, 1073741816},
26223 {2, 1073741816},
26224 {0, 4611686019501129724},
26225 },
26226 outputs: []outputInfo{
26227 {0, 1071644664},
26228 },
26229 },
26230 },
26231 {
26232 name: "LoweredAtomicCas64Variant",
26233 argLen: 4,
26234 resultNotInArgs: true,
26235 faultOnNilArg0: true,
26236 hasSideEffects: true,
26237 unsafePoint: true,
26238 reg: regInfo{
26239 inputs: []inputInfo{
26240 {1, 1073741816},
26241 {2, 1073741816},
26242 {0, 4611686019501129724},
26243 },
26244 outputs: []outputInfo{
26245 {0, 1071644664},
26246 },
26247 },
26248 },
26249 {
26250 name: "LoweredAtomicCas32Variant",
26251 argLen: 4,
26252 resultNotInArgs: true,
26253 faultOnNilArg0: true,
26254 hasSideEffects: true,
26255 unsafePoint: true,
26256 reg: regInfo{
26257 inputs: []inputInfo{
26258 {1, 1073741816},
26259 {2, 1073741816},
26260 {0, 4611686019501129724},
26261 },
26262 outputs: []outputInfo{
26263 {0, 1071644664},
26264 },
26265 },
26266 },
26267 {
26268 name: "LoweredAtomicAnd32",
26269 argLen: 3,
26270 resultNotInArgs: true,
26271 faultOnNilArg0: true,
26272 hasSideEffects: true,
26273 asm: loong64.AAMANDDBW,
26274 reg: regInfo{
26275 inputs: []inputInfo{
26276 {1, 1073741816},
26277 {0, 4611686019501129724},
26278 },
26279 outputs: []outputInfo{
26280 {0, 1071644664},
26281 },
26282 },
26283 },
26284 {
26285 name: "LoweredAtomicOr32",
26286 argLen: 3,
26287 resultNotInArgs: true,
26288 faultOnNilArg0: true,
26289 hasSideEffects: true,
26290 asm: loong64.AAMORDBW,
26291 reg: regInfo{
26292 inputs: []inputInfo{
26293 {1, 1073741816},
26294 {0, 4611686019501129724},
26295 },
26296 outputs: []outputInfo{
26297 {0, 1071644664},
26298 },
26299 },
26300 },
26301 {
26302 name: "LoweredAtomicAnd32value",
26303 argLen: 3,
26304 resultNotInArgs: true,
26305 faultOnNilArg0: true,
26306 hasSideEffects: true,
26307 asm: loong64.AAMANDDBW,
26308 reg: regInfo{
26309 inputs: []inputInfo{
26310 {1, 1073741816},
26311 {0, 4611686019501129724},
26312 },
26313 outputs: []outputInfo{
26314 {0, 1071644664},
26315 },
26316 },
26317 },
26318 {
26319 name: "LoweredAtomicAnd64value",
26320 argLen: 3,
26321 resultNotInArgs: true,
26322 faultOnNilArg0: true,
26323 hasSideEffects: true,
26324 asm: loong64.AAMANDDBV,
26325 reg: regInfo{
26326 inputs: []inputInfo{
26327 {1, 1073741816},
26328 {0, 4611686019501129724},
26329 },
26330 outputs: []outputInfo{
26331 {0, 1071644664},
26332 },
26333 },
26334 },
26335 {
26336 name: "LoweredAtomicOr32value",
26337 argLen: 3,
26338 resultNotInArgs: true,
26339 faultOnNilArg0: true,
26340 hasSideEffects: true,
26341 asm: loong64.AAMORDBW,
26342 reg: regInfo{
26343 inputs: []inputInfo{
26344 {1, 1073741816},
26345 {0, 4611686019501129724},
26346 },
26347 outputs: []outputInfo{
26348 {0, 1071644664},
26349 },
26350 },
26351 },
26352 {
26353 name: "LoweredAtomicOr64value",
26354 argLen: 3,
26355 resultNotInArgs: true,
26356 faultOnNilArg0: true,
26357 hasSideEffects: true,
26358 asm: loong64.AAMORDBV,
26359 reg: regInfo{
26360 inputs: []inputInfo{
26361 {1, 1073741816},
26362 {0, 4611686019501129724},
26363 },
26364 outputs: []outputInfo{
26365 {0, 1071644664},
26366 },
26367 },
26368 },
26369 {
26370 name: "LoweredNilCheck",
26371 argLen: 2,
26372 nilCheck: true,
26373 faultOnNilArg0: true,
26374 reg: regInfo{
26375 inputs: []inputInfo{
26376 {0, 1073741816},
26377 },
26378 },
26379 },
26380 {
26381 name: "FPFlagTrue",
26382 argLen: 1,
26383 reg: regInfo{
26384 outputs: []outputInfo{
26385 {0, 1071644664},
26386 },
26387 },
26388 },
26389 {
26390 name: "FPFlagFalse",
26391 argLen: 1,
26392 reg: regInfo{
26393 outputs: []outputInfo{
26394 {0, 1071644664},
26395 },
26396 },
26397 },
26398 {
26399 name: "LoweredGetClosurePtr",
26400 argLen: 0,
26401 zeroWidth: true,
26402 reg: regInfo{
26403 outputs: []outputInfo{
26404 {0, 268435456},
26405 },
26406 },
26407 },
26408 {
26409 name: "LoweredGetCallerSP",
26410 argLen: 1,
26411 rematerializeable: true,
26412 reg: regInfo{
26413 outputs: []outputInfo{
26414 {0, 1071644664},
26415 },
26416 },
26417 },
26418 {
26419 name: "LoweredGetCallerPC",
26420 argLen: 0,
26421 rematerializeable: true,
26422 reg: regInfo{
26423 outputs: []outputInfo{
26424 {0, 1071644664},
26425 },
26426 },
26427 },
26428 {
26429 name: "LoweredWB",
26430 auxType: auxInt64,
26431 argLen: 1,
26432 clobberFlags: true,
26433 reg: regInfo{
26434 clobbers: 4611686017353646082,
26435 outputs: []outputInfo{
26436 {0, 268435456},
26437 },
26438 },
26439 },
26440 {
26441 name: "LoweredPubBarrier",
26442 argLen: 1,
26443 hasSideEffects: true,
26444 asm: loong64.ADBAR,
26445 reg: regInfo{},
26446 },
26447 {
26448 name: "LoweredPanicBoundsA",
26449 auxType: auxInt64,
26450 argLen: 3,
26451 call: true,
26452 reg: regInfo{
26453 inputs: []inputInfo{
26454 {0, 4194304},
26455 {1, 8388608},
26456 },
26457 },
26458 },
26459 {
26460 name: "LoweredPanicBoundsB",
26461 auxType: auxInt64,
26462 argLen: 3,
26463 call: true,
26464 reg: regInfo{
26465 inputs: []inputInfo{
26466 {0, 1048576},
26467 {1, 4194304},
26468 },
26469 },
26470 },
26471 {
26472 name: "LoweredPanicBoundsC",
26473 auxType: auxInt64,
26474 argLen: 3,
26475 call: true,
26476 reg: regInfo{
26477 inputs: []inputInfo{
26478 {0, 524288},
26479 {1, 1048576},
26480 },
26481 },
26482 },
26483 {
26484 name: "PRELD",
26485 auxType: auxInt64,
26486 argLen: 2,
26487 hasSideEffects: true,
26488 asm: loong64.APRELD,
26489 reg: regInfo{
26490 inputs: []inputInfo{
26491 {0, 1073741820},
26492 },
26493 },
26494 },
26495 {
26496 name: "PRELDX",
26497 auxType: auxInt64,
26498 argLen: 2,
26499 hasSideEffects: true,
26500 asm: loong64.APRELDX,
26501 reg: regInfo{
26502 inputs: []inputInfo{
26503 {0, 1073741820},
26504 },
26505 },
26506 },
26507
26508 {
26509 name: "ADD",
26510 argLen: 2,
26511 commutative: true,
26512 asm: mips.AADDU,
26513 reg: regInfo{
26514 inputs: []inputInfo{
26515 {0, 469762046},
26516 {1, 469762046},
26517 },
26518 outputs: []outputInfo{
26519 {0, 335544318},
26520 },
26521 },
26522 },
26523 {
26524 name: "ADDconst",
26525 auxType: auxInt32,
26526 argLen: 1,
26527 asm: mips.AADDU,
26528 reg: regInfo{
26529 inputs: []inputInfo{
26530 {0, 536870910},
26531 },
26532 outputs: []outputInfo{
26533 {0, 335544318},
26534 },
26535 },
26536 },
26537 {
26538 name: "SUB",
26539 argLen: 2,
26540 asm: mips.ASUBU,
26541 reg: regInfo{
26542 inputs: []inputInfo{
26543 {0, 469762046},
26544 {1, 469762046},
26545 },
26546 outputs: []outputInfo{
26547 {0, 335544318},
26548 },
26549 },
26550 },
26551 {
26552 name: "SUBconst",
26553 auxType: auxInt32,
26554 argLen: 1,
26555 asm: mips.ASUBU,
26556 reg: regInfo{
26557 inputs: []inputInfo{
26558 {0, 469762046},
26559 },
26560 outputs: []outputInfo{
26561 {0, 335544318},
26562 },
26563 },
26564 },
26565 {
26566 name: "MUL",
26567 argLen: 2,
26568 commutative: true,
26569 asm: mips.AMUL,
26570 reg: regInfo{
26571 inputs: []inputInfo{
26572 {0, 469762046},
26573 {1, 469762046},
26574 },
26575 clobbers: 105553116266496,
26576 outputs: []outputInfo{
26577 {0, 335544318},
26578 },
26579 },
26580 },
26581 {
26582 name: "MULT",
26583 argLen: 2,
26584 commutative: true,
26585 asm: mips.AMUL,
26586 reg: regInfo{
26587 inputs: []inputInfo{
26588 {0, 469762046},
26589 {1, 469762046},
26590 },
26591 outputs: []outputInfo{
26592 {0, 35184372088832},
26593 {1, 70368744177664},
26594 },
26595 },
26596 },
26597 {
26598 name: "MULTU",
26599 argLen: 2,
26600 commutative: true,
26601 asm: mips.AMULU,
26602 reg: regInfo{
26603 inputs: []inputInfo{
26604 {0, 469762046},
26605 {1, 469762046},
26606 },
26607 outputs: []outputInfo{
26608 {0, 35184372088832},
26609 {1, 70368744177664},
26610 },
26611 },
26612 },
26613 {
26614 name: "DIV",
26615 argLen: 2,
26616 asm: mips.ADIV,
26617 reg: regInfo{
26618 inputs: []inputInfo{
26619 {0, 469762046},
26620 {1, 469762046},
26621 },
26622 outputs: []outputInfo{
26623 {0, 35184372088832},
26624 {1, 70368744177664},
26625 },
26626 },
26627 },
26628 {
26629 name: "DIVU",
26630 argLen: 2,
26631 asm: mips.ADIVU,
26632 reg: regInfo{
26633 inputs: []inputInfo{
26634 {0, 469762046},
26635 {1, 469762046},
26636 },
26637 outputs: []outputInfo{
26638 {0, 35184372088832},
26639 {1, 70368744177664},
26640 },
26641 },
26642 },
26643 {
26644 name: "ADDF",
26645 argLen: 2,
26646 commutative: true,
26647 asm: mips.AADDF,
26648 reg: regInfo{
26649 inputs: []inputInfo{
26650 {0, 35183835217920},
26651 {1, 35183835217920},
26652 },
26653 outputs: []outputInfo{
26654 {0, 35183835217920},
26655 },
26656 },
26657 },
26658 {
26659 name: "ADDD",
26660 argLen: 2,
26661 commutative: true,
26662 asm: mips.AADDD,
26663 reg: regInfo{
26664 inputs: []inputInfo{
26665 {0, 35183835217920},
26666 {1, 35183835217920},
26667 },
26668 outputs: []outputInfo{
26669 {0, 35183835217920},
26670 },
26671 },
26672 },
26673 {
26674 name: "SUBF",
26675 argLen: 2,
26676 asm: mips.ASUBF,
26677 reg: regInfo{
26678 inputs: []inputInfo{
26679 {0, 35183835217920},
26680 {1, 35183835217920},
26681 },
26682 outputs: []outputInfo{
26683 {0, 35183835217920},
26684 },
26685 },
26686 },
26687 {
26688 name: "SUBD",
26689 argLen: 2,
26690 asm: mips.ASUBD,
26691 reg: regInfo{
26692 inputs: []inputInfo{
26693 {0, 35183835217920},
26694 {1, 35183835217920},
26695 },
26696 outputs: []outputInfo{
26697 {0, 35183835217920},
26698 },
26699 },
26700 },
26701 {
26702 name: "MULF",
26703 argLen: 2,
26704 commutative: true,
26705 asm: mips.AMULF,
26706 reg: regInfo{
26707 inputs: []inputInfo{
26708 {0, 35183835217920},
26709 {1, 35183835217920},
26710 },
26711 outputs: []outputInfo{
26712 {0, 35183835217920},
26713 },
26714 },
26715 },
26716 {
26717 name: "MULD",
26718 argLen: 2,
26719 commutative: true,
26720 asm: mips.AMULD,
26721 reg: regInfo{
26722 inputs: []inputInfo{
26723 {0, 35183835217920},
26724 {1, 35183835217920},
26725 },
26726 outputs: []outputInfo{
26727 {0, 35183835217920},
26728 },
26729 },
26730 },
26731 {
26732 name: "DIVF",
26733 argLen: 2,
26734 asm: mips.ADIVF,
26735 reg: regInfo{
26736 inputs: []inputInfo{
26737 {0, 35183835217920},
26738 {1, 35183835217920},
26739 },
26740 outputs: []outputInfo{
26741 {0, 35183835217920},
26742 },
26743 },
26744 },
26745 {
26746 name: "DIVD",
26747 argLen: 2,
26748 asm: mips.ADIVD,
26749 reg: regInfo{
26750 inputs: []inputInfo{
26751 {0, 35183835217920},
26752 {1, 35183835217920},
26753 },
26754 outputs: []outputInfo{
26755 {0, 35183835217920},
26756 },
26757 },
26758 },
26759 {
26760 name: "AND",
26761 argLen: 2,
26762 commutative: true,
26763 asm: mips.AAND,
26764 reg: regInfo{
26765 inputs: []inputInfo{
26766 {0, 469762046},
26767 {1, 469762046},
26768 },
26769 outputs: []outputInfo{
26770 {0, 335544318},
26771 },
26772 },
26773 },
26774 {
26775 name: "ANDconst",
26776 auxType: auxInt32,
26777 argLen: 1,
26778 asm: mips.AAND,
26779 reg: regInfo{
26780 inputs: []inputInfo{
26781 {0, 469762046},
26782 },
26783 outputs: []outputInfo{
26784 {0, 335544318},
26785 },
26786 },
26787 },
26788 {
26789 name: "OR",
26790 argLen: 2,
26791 commutative: true,
26792 asm: mips.AOR,
26793 reg: regInfo{
26794 inputs: []inputInfo{
26795 {0, 469762046},
26796 {1, 469762046},
26797 },
26798 outputs: []outputInfo{
26799 {0, 335544318},
26800 },
26801 },
26802 },
26803 {
26804 name: "ORconst",
26805 auxType: auxInt32,
26806 argLen: 1,
26807 asm: mips.AOR,
26808 reg: regInfo{
26809 inputs: []inputInfo{
26810 {0, 469762046},
26811 },
26812 outputs: []outputInfo{
26813 {0, 335544318},
26814 },
26815 },
26816 },
26817 {
26818 name: "XOR",
26819 argLen: 2,
26820 commutative: true,
26821 asm: mips.AXOR,
26822 reg: regInfo{
26823 inputs: []inputInfo{
26824 {0, 469762046},
26825 {1, 469762046},
26826 },
26827 outputs: []outputInfo{
26828 {0, 335544318},
26829 },
26830 },
26831 },
26832 {
26833 name: "XORconst",
26834 auxType: auxInt32,
26835 argLen: 1,
26836 asm: mips.AXOR,
26837 reg: regInfo{
26838 inputs: []inputInfo{
26839 {0, 469762046},
26840 },
26841 outputs: []outputInfo{
26842 {0, 335544318},
26843 },
26844 },
26845 },
26846 {
26847 name: "NOR",
26848 argLen: 2,
26849 commutative: true,
26850 asm: mips.ANOR,
26851 reg: regInfo{
26852 inputs: []inputInfo{
26853 {0, 469762046},
26854 {1, 469762046},
26855 },
26856 outputs: []outputInfo{
26857 {0, 335544318},
26858 },
26859 },
26860 },
26861 {
26862 name: "NORconst",
26863 auxType: auxInt32,
26864 argLen: 1,
26865 asm: mips.ANOR,
26866 reg: regInfo{
26867 inputs: []inputInfo{
26868 {0, 469762046},
26869 },
26870 outputs: []outputInfo{
26871 {0, 335544318},
26872 },
26873 },
26874 },
26875 {
26876 name: "NEG",
26877 argLen: 1,
26878 reg: regInfo{
26879 inputs: []inputInfo{
26880 {0, 469762046},
26881 },
26882 outputs: []outputInfo{
26883 {0, 335544318},
26884 },
26885 },
26886 },
26887 {
26888 name: "NEGF",
26889 argLen: 1,
26890 asm: mips.ANEGF,
26891 reg: regInfo{
26892 inputs: []inputInfo{
26893 {0, 35183835217920},
26894 },
26895 outputs: []outputInfo{
26896 {0, 35183835217920},
26897 },
26898 },
26899 },
26900 {
26901 name: "NEGD",
26902 argLen: 1,
26903 asm: mips.ANEGD,
26904 reg: regInfo{
26905 inputs: []inputInfo{
26906 {0, 35183835217920},
26907 },
26908 outputs: []outputInfo{
26909 {0, 35183835217920},
26910 },
26911 },
26912 },
26913 {
26914 name: "ABSD",
26915 argLen: 1,
26916 asm: mips.AABSD,
26917 reg: regInfo{
26918 inputs: []inputInfo{
26919 {0, 35183835217920},
26920 },
26921 outputs: []outputInfo{
26922 {0, 35183835217920},
26923 },
26924 },
26925 },
26926 {
26927 name: "SQRTD",
26928 argLen: 1,
26929 asm: mips.ASQRTD,
26930 reg: regInfo{
26931 inputs: []inputInfo{
26932 {0, 35183835217920},
26933 },
26934 outputs: []outputInfo{
26935 {0, 35183835217920},
26936 },
26937 },
26938 },
26939 {
26940 name: "SQRTF",
26941 argLen: 1,
26942 asm: mips.ASQRTF,
26943 reg: regInfo{
26944 inputs: []inputInfo{
26945 {0, 35183835217920},
26946 },
26947 outputs: []outputInfo{
26948 {0, 35183835217920},
26949 },
26950 },
26951 },
26952 {
26953 name: "SLL",
26954 argLen: 2,
26955 asm: mips.ASLL,
26956 reg: regInfo{
26957 inputs: []inputInfo{
26958 {0, 469762046},
26959 {1, 469762046},
26960 },
26961 outputs: []outputInfo{
26962 {0, 335544318},
26963 },
26964 },
26965 },
26966 {
26967 name: "SLLconst",
26968 auxType: auxInt32,
26969 argLen: 1,
26970 asm: mips.ASLL,
26971 reg: regInfo{
26972 inputs: []inputInfo{
26973 {0, 469762046},
26974 },
26975 outputs: []outputInfo{
26976 {0, 335544318},
26977 },
26978 },
26979 },
26980 {
26981 name: "SRL",
26982 argLen: 2,
26983 asm: mips.ASRL,
26984 reg: regInfo{
26985 inputs: []inputInfo{
26986 {0, 469762046},
26987 {1, 469762046},
26988 },
26989 outputs: []outputInfo{
26990 {0, 335544318},
26991 },
26992 },
26993 },
26994 {
26995 name: "SRLconst",
26996 auxType: auxInt32,
26997 argLen: 1,
26998 asm: mips.ASRL,
26999 reg: regInfo{
27000 inputs: []inputInfo{
27001 {0, 469762046},
27002 },
27003 outputs: []outputInfo{
27004 {0, 335544318},
27005 },
27006 },
27007 },
27008 {
27009 name: "SRA",
27010 argLen: 2,
27011 asm: mips.ASRA,
27012 reg: regInfo{
27013 inputs: []inputInfo{
27014 {0, 469762046},
27015 {1, 469762046},
27016 },
27017 outputs: []outputInfo{
27018 {0, 335544318},
27019 },
27020 },
27021 },
27022 {
27023 name: "SRAconst",
27024 auxType: auxInt32,
27025 argLen: 1,
27026 asm: mips.ASRA,
27027 reg: regInfo{
27028 inputs: []inputInfo{
27029 {0, 469762046},
27030 },
27031 outputs: []outputInfo{
27032 {0, 335544318},
27033 },
27034 },
27035 },
27036 {
27037 name: "CLZ",
27038 argLen: 1,
27039 asm: mips.ACLZ,
27040 reg: regInfo{
27041 inputs: []inputInfo{
27042 {0, 469762046},
27043 },
27044 outputs: []outputInfo{
27045 {0, 335544318},
27046 },
27047 },
27048 },
27049 {
27050 name: "SGT",
27051 argLen: 2,
27052 asm: mips.ASGT,
27053 reg: regInfo{
27054 inputs: []inputInfo{
27055 {0, 469762046},
27056 {1, 469762046},
27057 },
27058 outputs: []outputInfo{
27059 {0, 335544318},
27060 },
27061 },
27062 },
27063 {
27064 name: "SGTconst",
27065 auxType: auxInt32,
27066 argLen: 1,
27067 asm: mips.ASGT,
27068 reg: regInfo{
27069 inputs: []inputInfo{
27070 {0, 469762046},
27071 },
27072 outputs: []outputInfo{
27073 {0, 335544318},
27074 },
27075 },
27076 },
27077 {
27078 name: "SGTzero",
27079 argLen: 1,
27080 asm: mips.ASGT,
27081 reg: regInfo{
27082 inputs: []inputInfo{
27083 {0, 469762046},
27084 },
27085 outputs: []outputInfo{
27086 {0, 335544318},
27087 },
27088 },
27089 },
27090 {
27091 name: "SGTU",
27092 argLen: 2,
27093 asm: mips.ASGTU,
27094 reg: regInfo{
27095 inputs: []inputInfo{
27096 {0, 469762046},
27097 {1, 469762046},
27098 },
27099 outputs: []outputInfo{
27100 {0, 335544318},
27101 },
27102 },
27103 },
27104 {
27105 name: "SGTUconst",
27106 auxType: auxInt32,
27107 argLen: 1,
27108 asm: mips.ASGTU,
27109 reg: regInfo{
27110 inputs: []inputInfo{
27111 {0, 469762046},
27112 },
27113 outputs: []outputInfo{
27114 {0, 335544318},
27115 },
27116 },
27117 },
27118 {
27119 name: "SGTUzero",
27120 argLen: 1,
27121 asm: mips.ASGTU,
27122 reg: regInfo{
27123 inputs: []inputInfo{
27124 {0, 469762046},
27125 },
27126 outputs: []outputInfo{
27127 {0, 335544318},
27128 },
27129 },
27130 },
27131 {
27132 name: "CMPEQF",
27133 argLen: 2,
27134 asm: mips.ACMPEQF,
27135 reg: regInfo{
27136 inputs: []inputInfo{
27137 {0, 35183835217920},
27138 {1, 35183835217920},
27139 },
27140 },
27141 },
27142 {
27143 name: "CMPEQD",
27144 argLen: 2,
27145 asm: mips.ACMPEQD,
27146 reg: regInfo{
27147 inputs: []inputInfo{
27148 {0, 35183835217920},
27149 {1, 35183835217920},
27150 },
27151 },
27152 },
27153 {
27154 name: "CMPGEF",
27155 argLen: 2,
27156 asm: mips.ACMPGEF,
27157 reg: regInfo{
27158 inputs: []inputInfo{
27159 {0, 35183835217920},
27160 {1, 35183835217920},
27161 },
27162 },
27163 },
27164 {
27165 name: "CMPGED",
27166 argLen: 2,
27167 asm: mips.ACMPGED,
27168 reg: regInfo{
27169 inputs: []inputInfo{
27170 {0, 35183835217920},
27171 {1, 35183835217920},
27172 },
27173 },
27174 },
27175 {
27176 name: "CMPGTF",
27177 argLen: 2,
27178 asm: mips.ACMPGTF,
27179 reg: regInfo{
27180 inputs: []inputInfo{
27181 {0, 35183835217920},
27182 {1, 35183835217920},
27183 },
27184 },
27185 },
27186 {
27187 name: "CMPGTD",
27188 argLen: 2,
27189 asm: mips.ACMPGTD,
27190 reg: regInfo{
27191 inputs: []inputInfo{
27192 {0, 35183835217920},
27193 {1, 35183835217920},
27194 },
27195 },
27196 },
27197 {
27198 name: "MOVWconst",
27199 auxType: auxInt32,
27200 argLen: 0,
27201 rematerializeable: true,
27202 asm: mips.AMOVW,
27203 reg: regInfo{
27204 outputs: []outputInfo{
27205 {0, 335544318},
27206 },
27207 },
27208 },
27209 {
27210 name: "MOVFconst",
27211 auxType: auxFloat32,
27212 argLen: 0,
27213 rematerializeable: true,
27214 asm: mips.AMOVF,
27215 reg: regInfo{
27216 outputs: []outputInfo{
27217 {0, 35183835217920},
27218 },
27219 },
27220 },
27221 {
27222 name: "MOVDconst",
27223 auxType: auxFloat64,
27224 argLen: 0,
27225 rematerializeable: true,
27226 asm: mips.AMOVD,
27227 reg: regInfo{
27228 outputs: []outputInfo{
27229 {0, 35183835217920},
27230 },
27231 },
27232 },
27233 {
27234 name: "MOVWaddr",
27235 auxType: auxSymOff,
27236 argLen: 1,
27237 rematerializeable: true,
27238 symEffect: SymAddr,
27239 asm: mips.AMOVW,
27240 reg: regInfo{
27241 inputs: []inputInfo{
27242 {0, 140737555464192},
27243 },
27244 outputs: []outputInfo{
27245 {0, 335544318},
27246 },
27247 },
27248 },
27249 {
27250 name: "MOVBload",
27251 auxType: auxSymOff,
27252 argLen: 2,
27253 faultOnNilArg0: true,
27254 symEffect: SymRead,
27255 asm: mips.AMOVB,
27256 reg: regInfo{
27257 inputs: []inputInfo{
27258 {0, 140738025226238},
27259 },
27260 outputs: []outputInfo{
27261 {0, 335544318},
27262 },
27263 },
27264 },
27265 {
27266 name: "MOVBUload",
27267 auxType: auxSymOff,
27268 argLen: 2,
27269 faultOnNilArg0: true,
27270 symEffect: SymRead,
27271 asm: mips.AMOVBU,
27272 reg: regInfo{
27273 inputs: []inputInfo{
27274 {0, 140738025226238},
27275 },
27276 outputs: []outputInfo{
27277 {0, 335544318},
27278 },
27279 },
27280 },
27281 {
27282 name: "MOVHload",
27283 auxType: auxSymOff,
27284 argLen: 2,
27285 faultOnNilArg0: true,
27286 symEffect: SymRead,
27287 asm: mips.AMOVH,
27288 reg: regInfo{
27289 inputs: []inputInfo{
27290 {0, 140738025226238},
27291 },
27292 outputs: []outputInfo{
27293 {0, 335544318},
27294 },
27295 },
27296 },
27297 {
27298 name: "MOVHUload",
27299 auxType: auxSymOff,
27300 argLen: 2,
27301 faultOnNilArg0: true,
27302 symEffect: SymRead,
27303 asm: mips.AMOVHU,
27304 reg: regInfo{
27305 inputs: []inputInfo{
27306 {0, 140738025226238},
27307 },
27308 outputs: []outputInfo{
27309 {0, 335544318},
27310 },
27311 },
27312 },
27313 {
27314 name: "MOVWload",
27315 auxType: auxSymOff,
27316 argLen: 2,
27317 faultOnNilArg0: true,
27318 symEffect: SymRead,
27319 asm: mips.AMOVW,
27320 reg: regInfo{
27321 inputs: []inputInfo{
27322 {0, 140738025226238},
27323 },
27324 outputs: []outputInfo{
27325 {0, 335544318},
27326 },
27327 },
27328 },
27329 {
27330 name: "MOVFload",
27331 auxType: auxSymOff,
27332 argLen: 2,
27333 faultOnNilArg0: true,
27334 symEffect: SymRead,
27335 asm: mips.AMOVF,
27336 reg: regInfo{
27337 inputs: []inputInfo{
27338 {0, 140738025226238},
27339 },
27340 outputs: []outputInfo{
27341 {0, 35183835217920},
27342 },
27343 },
27344 },
27345 {
27346 name: "MOVDload",
27347 auxType: auxSymOff,
27348 argLen: 2,
27349 faultOnNilArg0: true,
27350 symEffect: SymRead,
27351 asm: mips.AMOVD,
27352 reg: regInfo{
27353 inputs: []inputInfo{
27354 {0, 140738025226238},
27355 },
27356 outputs: []outputInfo{
27357 {0, 35183835217920},
27358 },
27359 },
27360 },
27361 {
27362 name: "MOVBstore",
27363 auxType: auxSymOff,
27364 argLen: 3,
27365 faultOnNilArg0: true,
27366 symEffect: SymWrite,
27367 asm: mips.AMOVB,
27368 reg: regInfo{
27369 inputs: []inputInfo{
27370 {1, 469762046},
27371 {0, 140738025226238},
27372 },
27373 },
27374 },
27375 {
27376 name: "MOVHstore",
27377 auxType: auxSymOff,
27378 argLen: 3,
27379 faultOnNilArg0: true,
27380 symEffect: SymWrite,
27381 asm: mips.AMOVH,
27382 reg: regInfo{
27383 inputs: []inputInfo{
27384 {1, 469762046},
27385 {0, 140738025226238},
27386 },
27387 },
27388 },
27389 {
27390 name: "MOVWstore",
27391 auxType: auxSymOff,
27392 argLen: 3,
27393 faultOnNilArg0: true,
27394 symEffect: SymWrite,
27395 asm: mips.AMOVW,
27396 reg: regInfo{
27397 inputs: []inputInfo{
27398 {1, 469762046},
27399 {0, 140738025226238},
27400 },
27401 },
27402 },
27403 {
27404 name: "MOVFstore",
27405 auxType: auxSymOff,
27406 argLen: 3,
27407 faultOnNilArg0: true,
27408 symEffect: SymWrite,
27409 asm: mips.AMOVF,
27410 reg: regInfo{
27411 inputs: []inputInfo{
27412 {1, 35183835217920},
27413 {0, 140738025226238},
27414 },
27415 },
27416 },
27417 {
27418 name: "MOVDstore",
27419 auxType: auxSymOff,
27420 argLen: 3,
27421 faultOnNilArg0: true,
27422 symEffect: SymWrite,
27423 asm: mips.AMOVD,
27424 reg: regInfo{
27425 inputs: []inputInfo{
27426 {1, 35183835217920},
27427 {0, 140738025226238},
27428 },
27429 },
27430 },
27431 {
27432 name: "MOVBstorezero",
27433 auxType: auxSymOff,
27434 argLen: 2,
27435 faultOnNilArg0: true,
27436 symEffect: SymWrite,
27437 asm: mips.AMOVB,
27438 reg: regInfo{
27439 inputs: []inputInfo{
27440 {0, 140738025226238},
27441 },
27442 },
27443 },
27444 {
27445 name: "MOVHstorezero",
27446 auxType: auxSymOff,
27447 argLen: 2,
27448 faultOnNilArg0: true,
27449 symEffect: SymWrite,
27450 asm: mips.AMOVH,
27451 reg: regInfo{
27452 inputs: []inputInfo{
27453 {0, 140738025226238},
27454 },
27455 },
27456 },
27457 {
27458 name: "MOVWstorezero",
27459 auxType: auxSymOff,
27460 argLen: 2,
27461 faultOnNilArg0: true,
27462 symEffect: SymWrite,
27463 asm: mips.AMOVW,
27464 reg: regInfo{
27465 inputs: []inputInfo{
27466 {0, 140738025226238},
27467 },
27468 },
27469 },
27470 {
27471 name: "MOVWfpgp",
27472 argLen: 1,
27473 asm: mips.AMOVW,
27474 reg: regInfo{
27475 inputs: []inputInfo{
27476 {0, 35183835217920},
27477 },
27478 outputs: []outputInfo{
27479 {0, 335544318},
27480 },
27481 },
27482 },
27483 {
27484 name: "MOVWgpfp",
27485 argLen: 1,
27486 asm: mips.AMOVW,
27487 reg: regInfo{
27488 inputs: []inputInfo{
27489 {0, 335544318},
27490 },
27491 outputs: []outputInfo{
27492 {0, 35183835217920},
27493 },
27494 },
27495 },
27496 {
27497 name: "MOVBreg",
27498 argLen: 1,
27499 asm: mips.AMOVB,
27500 reg: regInfo{
27501 inputs: []inputInfo{
27502 {0, 469762046},
27503 },
27504 outputs: []outputInfo{
27505 {0, 335544318},
27506 },
27507 },
27508 },
27509 {
27510 name: "MOVBUreg",
27511 argLen: 1,
27512 asm: mips.AMOVBU,
27513 reg: regInfo{
27514 inputs: []inputInfo{
27515 {0, 469762046},
27516 },
27517 outputs: []outputInfo{
27518 {0, 335544318},
27519 },
27520 },
27521 },
27522 {
27523 name: "MOVHreg",
27524 argLen: 1,
27525 asm: mips.AMOVH,
27526 reg: regInfo{
27527 inputs: []inputInfo{
27528 {0, 469762046},
27529 },
27530 outputs: []outputInfo{
27531 {0, 335544318},
27532 },
27533 },
27534 },
27535 {
27536 name: "MOVHUreg",
27537 argLen: 1,
27538 asm: mips.AMOVHU,
27539 reg: regInfo{
27540 inputs: []inputInfo{
27541 {0, 469762046},
27542 },
27543 outputs: []outputInfo{
27544 {0, 335544318},
27545 },
27546 },
27547 },
27548 {
27549 name: "MOVWreg",
27550 argLen: 1,
27551 asm: mips.AMOVW,
27552 reg: regInfo{
27553 inputs: []inputInfo{
27554 {0, 469762046},
27555 },
27556 outputs: []outputInfo{
27557 {0, 335544318},
27558 },
27559 },
27560 },
27561 {
27562 name: "MOVWnop",
27563 argLen: 1,
27564 resultInArg0: true,
27565 reg: regInfo{
27566 inputs: []inputInfo{
27567 {0, 335544318},
27568 },
27569 outputs: []outputInfo{
27570 {0, 335544318},
27571 },
27572 },
27573 },
27574 {
27575 name: "CMOVZ",
27576 argLen: 3,
27577 resultInArg0: true,
27578 asm: mips.ACMOVZ,
27579 reg: regInfo{
27580 inputs: []inputInfo{
27581 {0, 335544318},
27582 {1, 335544318},
27583 {2, 335544318},
27584 },
27585 outputs: []outputInfo{
27586 {0, 335544318},
27587 },
27588 },
27589 },
27590 {
27591 name: "CMOVZzero",
27592 argLen: 2,
27593 resultInArg0: true,
27594 asm: mips.ACMOVZ,
27595 reg: regInfo{
27596 inputs: []inputInfo{
27597 {0, 335544318},
27598 {1, 469762046},
27599 },
27600 outputs: []outputInfo{
27601 {0, 335544318},
27602 },
27603 },
27604 },
27605 {
27606 name: "MOVWF",
27607 argLen: 1,
27608 asm: mips.AMOVWF,
27609 reg: regInfo{
27610 inputs: []inputInfo{
27611 {0, 35183835217920},
27612 },
27613 outputs: []outputInfo{
27614 {0, 35183835217920},
27615 },
27616 },
27617 },
27618 {
27619 name: "MOVWD",
27620 argLen: 1,
27621 asm: mips.AMOVWD,
27622 reg: regInfo{
27623 inputs: []inputInfo{
27624 {0, 35183835217920},
27625 },
27626 outputs: []outputInfo{
27627 {0, 35183835217920},
27628 },
27629 },
27630 },
27631 {
27632 name: "TRUNCFW",
27633 argLen: 1,
27634 asm: mips.ATRUNCFW,
27635 reg: regInfo{
27636 inputs: []inputInfo{
27637 {0, 35183835217920},
27638 },
27639 outputs: []outputInfo{
27640 {0, 35183835217920},
27641 },
27642 },
27643 },
27644 {
27645 name: "TRUNCDW",
27646 argLen: 1,
27647 asm: mips.ATRUNCDW,
27648 reg: regInfo{
27649 inputs: []inputInfo{
27650 {0, 35183835217920},
27651 },
27652 outputs: []outputInfo{
27653 {0, 35183835217920},
27654 },
27655 },
27656 },
27657 {
27658 name: "MOVFD",
27659 argLen: 1,
27660 asm: mips.AMOVFD,
27661 reg: regInfo{
27662 inputs: []inputInfo{
27663 {0, 35183835217920},
27664 },
27665 outputs: []outputInfo{
27666 {0, 35183835217920},
27667 },
27668 },
27669 },
27670 {
27671 name: "MOVDF",
27672 argLen: 1,
27673 asm: mips.AMOVDF,
27674 reg: regInfo{
27675 inputs: []inputInfo{
27676 {0, 35183835217920},
27677 },
27678 outputs: []outputInfo{
27679 {0, 35183835217920},
27680 },
27681 },
27682 },
27683 {
27684 name: "CALLstatic",
27685 auxType: auxCallOff,
27686 argLen: 1,
27687 clobberFlags: true,
27688 call: true,
27689 reg: regInfo{
27690 clobbers: 140737421246462,
27691 },
27692 },
27693 {
27694 name: "CALLtail",
27695 auxType: auxCallOff,
27696 argLen: 1,
27697 clobberFlags: true,
27698 call: true,
27699 tailCall: true,
27700 reg: regInfo{
27701 clobbers: 140737421246462,
27702 },
27703 },
27704 {
27705 name: "CALLclosure",
27706 auxType: auxCallOff,
27707 argLen: 3,
27708 clobberFlags: true,
27709 call: true,
27710 reg: regInfo{
27711 inputs: []inputInfo{
27712 {1, 4194304},
27713 {0, 402653182},
27714 },
27715 clobbers: 140737421246462,
27716 },
27717 },
27718 {
27719 name: "CALLinter",
27720 auxType: auxCallOff,
27721 argLen: 2,
27722 clobberFlags: true,
27723 call: true,
27724 reg: regInfo{
27725 inputs: []inputInfo{
27726 {0, 335544318},
27727 },
27728 clobbers: 140737421246462,
27729 },
27730 },
27731 {
27732 name: "LoweredAtomicLoad8",
27733 argLen: 2,
27734 faultOnNilArg0: true,
27735 reg: regInfo{
27736 inputs: []inputInfo{
27737 {0, 140738025226238},
27738 },
27739 outputs: []outputInfo{
27740 {0, 335544318},
27741 },
27742 },
27743 },
27744 {
27745 name: "LoweredAtomicLoad32",
27746 argLen: 2,
27747 faultOnNilArg0: true,
27748 reg: regInfo{
27749 inputs: []inputInfo{
27750 {0, 140738025226238},
27751 },
27752 outputs: []outputInfo{
27753 {0, 335544318},
27754 },
27755 },
27756 },
27757 {
27758 name: "LoweredAtomicStore8",
27759 argLen: 3,
27760 faultOnNilArg0: true,
27761 hasSideEffects: true,
27762 reg: regInfo{
27763 inputs: []inputInfo{
27764 {1, 469762046},
27765 {0, 140738025226238},
27766 },
27767 },
27768 },
27769 {
27770 name: "LoweredAtomicStore32",
27771 argLen: 3,
27772 faultOnNilArg0: true,
27773 hasSideEffects: true,
27774 reg: regInfo{
27775 inputs: []inputInfo{
27776 {1, 469762046},
27777 {0, 140738025226238},
27778 },
27779 },
27780 },
27781 {
27782 name: "LoweredAtomicStorezero",
27783 argLen: 2,
27784 faultOnNilArg0: true,
27785 hasSideEffects: true,
27786 reg: regInfo{
27787 inputs: []inputInfo{
27788 {0, 140738025226238},
27789 },
27790 },
27791 },
27792 {
27793 name: "LoweredAtomicExchange",
27794 argLen: 3,
27795 resultNotInArgs: true,
27796 faultOnNilArg0: true,
27797 hasSideEffects: true,
27798 unsafePoint: true,
27799 reg: regInfo{
27800 inputs: []inputInfo{
27801 {1, 469762046},
27802 {0, 140738025226238},
27803 },
27804 outputs: []outputInfo{
27805 {0, 335544318},
27806 },
27807 },
27808 },
27809 {
27810 name: "LoweredAtomicAdd",
27811 argLen: 3,
27812 resultNotInArgs: true,
27813 faultOnNilArg0: true,
27814 hasSideEffects: true,
27815 unsafePoint: true,
27816 reg: regInfo{
27817 inputs: []inputInfo{
27818 {1, 469762046},
27819 {0, 140738025226238},
27820 },
27821 outputs: []outputInfo{
27822 {0, 335544318},
27823 },
27824 },
27825 },
27826 {
27827 name: "LoweredAtomicAddconst",
27828 auxType: auxInt32,
27829 argLen: 2,
27830 resultNotInArgs: true,
27831 faultOnNilArg0: true,
27832 hasSideEffects: true,
27833 unsafePoint: true,
27834 reg: regInfo{
27835 inputs: []inputInfo{
27836 {0, 140738025226238},
27837 },
27838 outputs: []outputInfo{
27839 {0, 335544318},
27840 },
27841 },
27842 },
27843 {
27844 name: "LoweredAtomicCas",
27845 argLen: 4,
27846 resultNotInArgs: true,
27847 faultOnNilArg0: true,
27848 hasSideEffects: true,
27849 unsafePoint: true,
27850 reg: regInfo{
27851 inputs: []inputInfo{
27852 {1, 469762046},
27853 {2, 469762046},
27854 {0, 140738025226238},
27855 },
27856 outputs: []outputInfo{
27857 {0, 335544318},
27858 },
27859 },
27860 },
27861 {
27862 name: "LoweredAtomicAnd",
27863 argLen: 3,
27864 faultOnNilArg0: true,
27865 hasSideEffects: true,
27866 unsafePoint: true,
27867 asm: mips.AAND,
27868 reg: regInfo{
27869 inputs: []inputInfo{
27870 {1, 469762046},
27871 {0, 140738025226238},
27872 },
27873 },
27874 },
27875 {
27876 name: "LoweredAtomicOr",
27877 argLen: 3,
27878 faultOnNilArg0: true,
27879 hasSideEffects: true,
27880 unsafePoint: true,
27881 asm: mips.AOR,
27882 reg: regInfo{
27883 inputs: []inputInfo{
27884 {1, 469762046},
27885 {0, 140738025226238},
27886 },
27887 },
27888 },
27889 {
27890 name: "LoweredZero",
27891 auxType: auxInt32,
27892 argLen: 3,
27893 faultOnNilArg0: true,
27894 reg: regInfo{
27895 inputs: []inputInfo{
27896 {0, 2},
27897 {1, 335544318},
27898 },
27899 clobbers: 2,
27900 },
27901 },
27902 {
27903 name: "LoweredMove",
27904 auxType: auxInt32,
27905 argLen: 4,
27906 faultOnNilArg0: true,
27907 faultOnNilArg1: true,
27908 reg: regInfo{
27909 inputs: []inputInfo{
27910 {0, 4},
27911 {1, 2},
27912 {2, 335544318},
27913 },
27914 clobbers: 6,
27915 },
27916 },
27917 {
27918 name: "LoweredNilCheck",
27919 argLen: 2,
27920 nilCheck: true,
27921 faultOnNilArg0: true,
27922 reg: regInfo{
27923 inputs: []inputInfo{
27924 {0, 469762046},
27925 },
27926 },
27927 },
27928 {
27929 name: "FPFlagTrue",
27930 argLen: 1,
27931 reg: regInfo{
27932 outputs: []outputInfo{
27933 {0, 335544318},
27934 },
27935 },
27936 },
27937 {
27938 name: "FPFlagFalse",
27939 argLen: 1,
27940 reg: regInfo{
27941 outputs: []outputInfo{
27942 {0, 335544318},
27943 },
27944 },
27945 },
27946 {
27947 name: "LoweredGetClosurePtr",
27948 argLen: 0,
27949 zeroWidth: true,
27950 reg: regInfo{
27951 outputs: []outputInfo{
27952 {0, 4194304},
27953 },
27954 },
27955 },
27956 {
27957 name: "LoweredGetCallerSP",
27958 argLen: 1,
27959 rematerializeable: true,
27960 reg: regInfo{
27961 outputs: []outputInfo{
27962 {0, 335544318},
27963 },
27964 },
27965 },
27966 {
27967 name: "LoweredGetCallerPC",
27968 argLen: 0,
27969 rematerializeable: true,
27970 reg: regInfo{
27971 outputs: []outputInfo{
27972 {0, 335544318},
27973 },
27974 },
27975 },
27976 {
27977 name: "LoweredWB",
27978 auxType: auxInt64,
27979 argLen: 1,
27980 clobberFlags: true,
27981 reg: regInfo{
27982 clobbers: 140737219919872,
27983 outputs: []outputInfo{
27984 {0, 16777216},
27985 },
27986 },
27987 },
27988 {
27989 name: "LoweredPubBarrier",
27990 argLen: 1,
27991 hasSideEffects: true,
27992 asm: mips.ASYNC,
27993 reg: regInfo{},
27994 },
27995 {
27996 name: "LoweredPanicBoundsA",
27997 auxType: auxInt64,
27998 argLen: 3,
27999 call: true,
28000 reg: regInfo{
28001 inputs: []inputInfo{
28002 {0, 8},
28003 {1, 16},
28004 },
28005 },
28006 },
28007 {
28008 name: "LoweredPanicBoundsB",
28009 auxType: auxInt64,
28010 argLen: 3,
28011 call: true,
28012 reg: regInfo{
28013 inputs: []inputInfo{
28014 {0, 4},
28015 {1, 8},
28016 },
28017 },
28018 },
28019 {
28020 name: "LoweredPanicBoundsC",
28021 auxType: auxInt64,
28022 argLen: 3,
28023 call: true,
28024 reg: regInfo{
28025 inputs: []inputInfo{
28026 {0, 2},
28027 {1, 4},
28028 },
28029 },
28030 },
28031 {
28032 name: "LoweredPanicExtendA",
28033 auxType: auxInt64,
28034 argLen: 4,
28035 call: true,
28036 reg: regInfo{
28037 inputs: []inputInfo{
28038 {0, 32},
28039 {1, 8},
28040 {2, 16},
28041 },
28042 },
28043 },
28044 {
28045 name: "LoweredPanicExtendB",
28046 auxType: auxInt64,
28047 argLen: 4,
28048 call: true,
28049 reg: regInfo{
28050 inputs: []inputInfo{
28051 {0, 32},
28052 {1, 4},
28053 {2, 8},
28054 },
28055 },
28056 },
28057 {
28058 name: "LoweredPanicExtendC",
28059 auxType: auxInt64,
28060 argLen: 4,
28061 call: true,
28062 reg: regInfo{
28063 inputs: []inputInfo{
28064 {0, 32},
28065 {1, 2},
28066 {2, 4},
28067 },
28068 },
28069 },
28070
28071 {
28072 name: "ADDV",
28073 argLen: 2,
28074 commutative: true,
28075 asm: mips.AADDVU,
28076 reg: regInfo{
28077 inputs: []inputInfo{
28078 {0, 234881022},
28079 {1, 234881022},
28080 },
28081 outputs: []outputInfo{
28082 {0, 167772158},
28083 },
28084 },
28085 },
28086 {
28087 name: "ADDVconst",
28088 auxType: auxInt64,
28089 argLen: 1,
28090 asm: mips.AADDVU,
28091 reg: regInfo{
28092 inputs: []inputInfo{
28093 {0, 268435454},
28094 },
28095 outputs: []outputInfo{
28096 {0, 167772158},
28097 },
28098 },
28099 },
28100 {
28101 name: "SUBV",
28102 argLen: 2,
28103 asm: mips.ASUBVU,
28104 reg: regInfo{
28105 inputs: []inputInfo{
28106 {0, 234881022},
28107 {1, 234881022},
28108 },
28109 outputs: []outputInfo{
28110 {0, 167772158},
28111 },
28112 },
28113 },
28114 {
28115 name: "SUBVconst",
28116 auxType: auxInt64,
28117 argLen: 1,
28118 asm: mips.ASUBVU,
28119 reg: regInfo{
28120 inputs: []inputInfo{
28121 {0, 234881022},
28122 },
28123 outputs: []outputInfo{
28124 {0, 167772158},
28125 },
28126 },
28127 },
28128 {
28129 name: "MULV",
28130 argLen: 2,
28131 commutative: true,
28132 asm: mips.AMULV,
28133 reg: regInfo{
28134 inputs: []inputInfo{
28135 {0, 234881022},
28136 {1, 234881022},
28137 },
28138 outputs: []outputInfo{
28139 {0, 1152921504606846976},
28140 {1, 2305843009213693952},
28141 },
28142 },
28143 },
28144 {
28145 name: "MULVU",
28146 argLen: 2,
28147 commutative: true,
28148 asm: mips.AMULVU,
28149 reg: regInfo{
28150 inputs: []inputInfo{
28151 {0, 234881022},
28152 {1, 234881022},
28153 },
28154 outputs: []outputInfo{
28155 {0, 1152921504606846976},
28156 {1, 2305843009213693952},
28157 },
28158 },
28159 },
28160 {
28161 name: "DIVV",
28162 argLen: 2,
28163 asm: mips.ADIVV,
28164 reg: regInfo{
28165 inputs: []inputInfo{
28166 {0, 234881022},
28167 {1, 234881022},
28168 },
28169 outputs: []outputInfo{
28170 {0, 1152921504606846976},
28171 {1, 2305843009213693952},
28172 },
28173 },
28174 },
28175 {
28176 name: "DIVVU",
28177 argLen: 2,
28178 asm: mips.ADIVVU,
28179 reg: regInfo{
28180 inputs: []inputInfo{
28181 {0, 234881022},
28182 {1, 234881022},
28183 },
28184 outputs: []outputInfo{
28185 {0, 1152921504606846976},
28186 {1, 2305843009213693952},
28187 },
28188 },
28189 },
28190 {
28191 name: "ADDF",
28192 argLen: 2,
28193 commutative: true,
28194 asm: mips.AADDF,
28195 reg: regInfo{
28196 inputs: []inputInfo{
28197 {0, 1152921504338411520},
28198 {1, 1152921504338411520},
28199 },
28200 outputs: []outputInfo{
28201 {0, 1152921504338411520},
28202 },
28203 },
28204 },
28205 {
28206 name: "ADDD",
28207 argLen: 2,
28208 commutative: true,
28209 asm: mips.AADDD,
28210 reg: regInfo{
28211 inputs: []inputInfo{
28212 {0, 1152921504338411520},
28213 {1, 1152921504338411520},
28214 },
28215 outputs: []outputInfo{
28216 {0, 1152921504338411520},
28217 },
28218 },
28219 },
28220 {
28221 name: "SUBF",
28222 argLen: 2,
28223 asm: mips.ASUBF,
28224 reg: regInfo{
28225 inputs: []inputInfo{
28226 {0, 1152921504338411520},
28227 {1, 1152921504338411520},
28228 },
28229 outputs: []outputInfo{
28230 {0, 1152921504338411520},
28231 },
28232 },
28233 },
28234 {
28235 name: "SUBD",
28236 argLen: 2,
28237 asm: mips.ASUBD,
28238 reg: regInfo{
28239 inputs: []inputInfo{
28240 {0, 1152921504338411520},
28241 {1, 1152921504338411520},
28242 },
28243 outputs: []outputInfo{
28244 {0, 1152921504338411520},
28245 },
28246 },
28247 },
28248 {
28249 name: "MULF",
28250 argLen: 2,
28251 commutative: true,
28252 asm: mips.AMULF,
28253 reg: regInfo{
28254 inputs: []inputInfo{
28255 {0, 1152921504338411520},
28256 {1, 1152921504338411520},
28257 },
28258 outputs: []outputInfo{
28259 {0, 1152921504338411520},
28260 },
28261 },
28262 },
28263 {
28264 name: "MULD",
28265 argLen: 2,
28266 commutative: true,
28267 asm: mips.AMULD,
28268 reg: regInfo{
28269 inputs: []inputInfo{
28270 {0, 1152921504338411520},
28271 {1, 1152921504338411520},
28272 },
28273 outputs: []outputInfo{
28274 {0, 1152921504338411520},
28275 },
28276 },
28277 },
28278 {
28279 name: "DIVF",
28280 argLen: 2,
28281 asm: mips.ADIVF,
28282 reg: regInfo{
28283 inputs: []inputInfo{
28284 {0, 1152921504338411520},
28285 {1, 1152921504338411520},
28286 },
28287 outputs: []outputInfo{
28288 {0, 1152921504338411520},
28289 },
28290 },
28291 },
28292 {
28293 name: "DIVD",
28294 argLen: 2,
28295 asm: mips.ADIVD,
28296 reg: regInfo{
28297 inputs: []inputInfo{
28298 {0, 1152921504338411520},
28299 {1, 1152921504338411520},
28300 },
28301 outputs: []outputInfo{
28302 {0, 1152921504338411520},
28303 },
28304 },
28305 },
28306 {
28307 name: "AND",
28308 argLen: 2,
28309 commutative: true,
28310 asm: mips.AAND,
28311 reg: regInfo{
28312 inputs: []inputInfo{
28313 {0, 234881022},
28314 {1, 234881022},
28315 },
28316 outputs: []outputInfo{
28317 {0, 167772158},
28318 },
28319 },
28320 },
28321 {
28322 name: "ANDconst",
28323 auxType: auxInt64,
28324 argLen: 1,
28325 asm: mips.AAND,
28326 reg: regInfo{
28327 inputs: []inputInfo{
28328 {0, 234881022},
28329 },
28330 outputs: []outputInfo{
28331 {0, 167772158},
28332 },
28333 },
28334 },
28335 {
28336 name: "OR",
28337 argLen: 2,
28338 commutative: true,
28339 asm: mips.AOR,
28340 reg: regInfo{
28341 inputs: []inputInfo{
28342 {0, 234881022},
28343 {1, 234881022},
28344 },
28345 outputs: []outputInfo{
28346 {0, 167772158},
28347 },
28348 },
28349 },
28350 {
28351 name: "ORconst",
28352 auxType: auxInt64,
28353 argLen: 1,
28354 asm: mips.AOR,
28355 reg: regInfo{
28356 inputs: []inputInfo{
28357 {0, 234881022},
28358 },
28359 outputs: []outputInfo{
28360 {0, 167772158},
28361 },
28362 },
28363 },
28364 {
28365 name: "XOR",
28366 argLen: 2,
28367 commutative: true,
28368 asm: mips.AXOR,
28369 reg: regInfo{
28370 inputs: []inputInfo{
28371 {0, 234881022},
28372 {1, 234881022},
28373 },
28374 outputs: []outputInfo{
28375 {0, 167772158},
28376 },
28377 },
28378 },
28379 {
28380 name: "XORconst",
28381 auxType: auxInt64,
28382 argLen: 1,
28383 asm: mips.AXOR,
28384 reg: regInfo{
28385 inputs: []inputInfo{
28386 {0, 234881022},
28387 },
28388 outputs: []outputInfo{
28389 {0, 167772158},
28390 },
28391 },
28392 },
28393 {
28394 name: "NOR",
28395 argLen: 2,
28396 commutative: true,
28397 asm: mips.ANOR,
28398 reg: regInfo{
28399 inputs: []inputInfo{
28400 {0, 234881022},
28401 {1, 234881022},
28402 },
28403 outputs: []outputInfo{
28404 {0, 167772158},
28405 },
28406 },
28407 },
28408 {
28409 name: "NORconst",
28410 auxType: auxInt64,
28411 argLen: 1,
28412 asm: mips.ANOR,
28413 reg: regInfo{
28414 inputs: []inputInfo{
28415 {0, 234881022},
28416 },
28417 outputs: []outputInfo{
28418 {0, 167772158},
28419 },
28420 },
28421 },
28422 {
28423 name: "NEGV",
28424 argLen: 1,
28425 reg: regInfo{
28426 inputs: []inputInfo{
28427 {0, 234881022},
28428 },
28429 outputs: []outputInfo{
28430 {0, 167772158},
28431 },
28432 },
28433 },
28434 {
28435 name: "NEGF",
28436 argLen: 1,
28437 asm: mips.ANEGF,
28438 reg: regInfo{
28439 inputs: []inputInfo{
28440 {0, 1152921504338411520},
28441 },
28442 outputs: []outputInfo{
28443 {0, 1152921504338411520},
28444 },
28445 },
28446 },
28447 {
28448 name: "NEGD",
28449 argLen: 1,
28450 asm: mips.ANEGD,
28451 reg: regInfo{
28452 inputs: []inputInfo{
28453 {0, 1152921504338411520},
28454 },
28455 outputs: []outputInfo{
28456 {0, 1152921504338411520},
28457 },
28458 },
28459 },
28460 {
28461 name: "ABSD",
28462 argLen: 1,
28463 asm: mips.AABSD,
28464 reg: regInfo{
28465 inputs: []inputInfo{
28466 {0, 1152921504338411520},
28467 },
28468 outputs: []outputInfo{
28469 {0, 1152921504338411520},
28470 },
28471 },
28472 },
28473 {
28474 name: "SQRTD",
28475 argLen: 1,
28476 asm: mips.ASQRTD,
28477 reg: regInfo{
28478 inputs: []inputInfo{
28479 {0, 1152921504338411520},
28480 },
28481 outputs: []outputInfo{
28482 {0, 1152921504338411520},
28483 },
28484 },
28485 },
28486 {
28487 name: "SQRTF",
28488 argLen: 1,
28489 asm: mips.ASQRTF,
28490 reg: regInfo{
28491 inputs: []inputInfo{
28492 {0, 1152921504338411520},
28493 },
28494 outputs: []outputInfo{
28495 {0, 1152921504338411520},
28496 },
28497 },
28498 },
28499 {
28500 name: "SLLV",
28501 argLen: 2,
28502 asm: mips.ASLLV,
28503 reg: regInfo{
28504 inputs: []inputInfo{
28505 {0, 234881022},
28506 {1, 234881022},
28507 },
28508 outputs: []outputInfo{
28509 {0, 167772158},
28510 },
28511 },
28512 },
28513 {
28514 name: "SLLVconst",
28515 auxType: auxInt64,
28516 argLen: 1,
28517 asm: mips.ASLLV,
28518 reg: regInfo{
28519 inputs: []inputInfo{
28520 {0, 234881022},
28521 },
28522 outputs: []outputInfo{
28523 {0, 167772158},
28524 },
28525 },
28526 },
28527 {
28528 name: "SRLV",
28529 argLen: 2,
28530 asm: mips.ASRLV,
28531 reg: regInfo{
28532 inputs: []inputInfo{
28533 {0, 234881022},
28534 {1, 234881022},
28535 },
28536 outputs: []outputInfo{
28537 {0, 167772158},
28538 },
28539 },
28540 },
28541 {
28542 name: "SRLVconst",
28543 auxType: auxInt64,
28544 argLen: 1,
28545 asm: mips.ASRLV,
28546 reg: regInfo{
28547 inputs: []inputInfo{
28548 {0, 234881022},
28549 },
28550 outputs: []outputInfo{
28551 {0, 167772158},
28552 },
28553 },
28554 },
28555 {
28556 name: "SRAV",
28557 argLen: 2,
28558 asm: mips.ASRAV,
28559 reg: regInfo{
28560 inputs: []inputInfo{
28561 {0, 234881022},
28562 {1, 234881022},
28563 },
28564 outputs: []outputInfo{
28565 {0, 167772158},
28566 },
28567 },
28568 },
28569 {
28570 name: "SRAVconst",
28571 auxType: auxInt64,
28572 argLen: 1,
28573 asm: mips.ASRAV,
28574 reg: regInfo{
28575 inputs: []inputInfo{
28576 {0, 234881022},
28577 },
28578 outputs: []outputInfo{
28579 {0, 167772158},
28580 },
28581 },
28582 },
28583 {
28584 name: "SGT",
28585 argLen: 2,
28586 asm: mips.ASGT,
28587 reg: regInfo{
28588 inputs: []inputInfo{
28589 {0, 234881022},
28590 {1, 234881022},
28591 },
28592 outputs: []outputInfo{
28593 {0, 167772158},
28594 },
28595 },
28596 },
28597 {
28598 name: "SGTconst",
28599 auxType: auxInt64,
28600 argLen: 1,
28601 asm: mips.ASGT,
28602 reg: regInfo{
28603 inputs: []inputInfo{
28604 {0, 234881022},
28605 },
28606 outputs: []outputInfo{
28607 {0, 167772158},
28608 },
28609 },
28610 },
28611 {
28612 name: "SGTU",
28613 argLen: 2,
28614 asm: mips.ASGTU,
28615 reg: regInfo{
28616 inputs: []inputInfo{
28617 {0, 234881022},
28618 {1, 234881022},
28619 },
28620 outputs: []outputInfo{
28621 {0, 167772158},
28622 },
28623 },
28624 },
28625 {
28626 name: "SGTUconst",
28627 auxType: auxInt64,
28628 argLen: 1,
28629 asm: mips.ASGTU,
28630 reg: regInfo{
28631 inputs: []inputInfo{
28632 {0, 234881022},
28633 },
28634 outputs: []outputInfo{
28635 {0, 167772158},
28636 },
28637 },
28638 },
28639 {
28640 name: "CMPEQF",
28641 argLen: 2,
28642 asm: mips.ACMPEQF,
28643 reg: regInfo{
28644 inputs: []inputInfo{
28645 {0, 1152921504338411520},
28646 {1, 1152921504338411520},
28647 },
28648 },
28649 },
28650 {
28651 name: "CMPEQD",
28652 argLen: 2,
28653 asm: mips.ACMPEQD,
28654 reg: regInfo{
28655 inputs: []inputInfo{
28656 {0, 1152921504338411520},
28657 {1, 1152921504338411520},
28658 },
28659 },
28660 },
28661 {
28662 name: "CMPGEF",
28663 argLen: 2,
28664 asm: mips.ACMPGEF,
28665 reg: regInfo{
28666 inputs: []inputInfo{
28667 {0, 1152921504338411520},
28668 {1, 1152921504338411520},
28669 },
28670 },
28671 },
28672 {
28673 name: "CMPGED",
28674 argLen: 2,
28675 asm: mips.ACMPGED,
28676 reg: regInfo{
28677 inputs: []inputInfo{
28678 {0, 1152921504338411520},
28679 {1, 1152921504338411520},
28680 },
28681 },
28682 },
28683 {
28684 name: "CMPGTF",
28685 argLen: 2,
28686 asm: mips.ACMPGTF,
28687 reg: regInfo{
28688 inputs: []inputInfo{
28689 {0, 1152921504338411520},
28690 {1, 1152921504338411520},
28691 },
28692 },
28693 },
28694 {
28695 name: "CMPGTD",
28696 argLen: 2,
28697 asm: mips.ACMPGTD,
28698 reg: regInfo{
28699 inputs: []inputInfo{
28700 {0, 1152921504338411520},
28701 {1, 1152921504338411520},
28702 },
28703 },
28704 },
28705 {
28706 name: "MOVVconst",
28707 auxType: auxInt64,
28708 argLen: 0,
28709 rematerializeable: true,
28710 asm: mips.AMOVV,
28711 reg: regInfo{
28712 outputs: []outputInfo{
28713 {0, 167772158},
28714 },
28715 },
28716 },
28717 {
28718 name: "MOVFconst",
28719 auxType: auxFloat64,
28720 argLen: 0,
28721 rematerializeable: true,
28722 asm: mips.AMOVF,
28723 reg: regInfo{
28724 outputs: []outputInfo{
28725 {0, 1152921504338411520},
28726 },
28727 },
28728 },
28729 {
28730 name: "MOVDconst",
28731 auxType: auxFloat64,
28732 argLen: 0,
28733 rematerializeable: true,
28734 asm: mips.AMOVD,
28735 reg: regInfo{
28736 outputs: []outputInfo{
28737 {0, 1152921504338411520},
28738 },
28739 },
28740 },
28741 {
28742 name: "MOVVaddr",
28743 auxType: auxSymOff,
28744 argLen: 1,
28745 rematerializeable: true,
28746 symEffect: SymAddr,
28747 asm: mips.AMOVV,
28748 reg: regInfo{
28749 inputs: []inputInfo{
28750 {0, 4611686018460942336},
28751 },
28752 outputs: []outputInfo{
28753 {0, 167772158},
28754 },
28755 },
28756 },
28757 {
28758 name: "MOVBload",
28759 auxType: auxSymOff,
28760 argLen: 2,
28761 faultOnNilArg0: true,
28762 symEffect: SymRead,
28763 asm: mips.AMOVB,
28764 reg: regInfo{
28765 inputs: []inputInfo{
28766 {0, 4611686018695823358},
28767 },
28768 outputs: []outputInfo{
28769 {0, 167772158},
28770 },
28771 },
28772 },
28773 {
28774 name: "MOVBUload",
28775 auxType: auxSymOff,
28776 argLen: 2,
28777 faultOnNilArg0: true,
28778 symEffect: SymRead,
28779 asm: mips.AMOVBU,
28780 reg: regInfo{
28781 inputs: []inputInfo{
28782 {0, 4611686018695823358},
28783 },
28784 outputs: []outputInfo{
28785 {0, 167772158},
28786 },
28787 },
28788 },
28789 {
28790 name: "MOVHload",
28791 auxType: auxSymOff,
28792 argLen: 2,
28793 faultOnNilArg0: true,
28794 symEffect: SymRead,
28795 asm: mips.AMOVH,
28796 reg: regInfo{
28797 inputs: []inputInfo{
28798 {0, 4611686018695823358},
28799 },
28800 outputs: []outputInfo{
28801 {0, 167772158},
28802 },
28803 },
28804 },
28805 {
28806 name: "MOVHUload",
28807 auxType: auxSymOff,
28808 argLen: 2,
28809 faultOnNilArg0: true,
28810 symEffect: SymRead,
28811 asm: mips.AMOVHU,
28812 reg: regInfo{
28813 inputs: []inputInfo{
28814 {0, 4611686018695823358},
28815 },
28816 outputs: []outputInfo{
28817 {0, 167772158},
28818 },
28819 },
28820 },
28821 {
28822 name: "MOVWload",
28823 auxType: auxSymOff,
28824 argLen: 2,
28825 faultOnNilArg0: true,
28826 symEffect: SymRead,
28827 asm: mips.AMOVW,
28828 reg: regInfo{
28829 inputs: []inputInfo{
28830 {0, 4611686018695823358},
28831 },
28832 outputs: []outputInfo{
28833 {0, 167772158},
28834 },
28835 },
28836 },
28837 {
28838 name: "MOVWUload",
28839 auxType: auxSymOff,
28840 argLen: 2,
28841 faultOnNilArg0: true,
28842 symEffect: SymRead,
28843 asm: mips.AMOVWU,
28844 reg: regInfo{
28845 inputs: []inputInfo{
28846 {0, 4611686018695823358},
28847 },
28848 outputs: []outputInfo{
28849 {0, 167772158},
28850 },
28851 },
28852 },
28853 {
28854 name: "MOVVload",
28855 auxType: auxSymOff,
28856 argLen: 2,
28857 faultOnNilArg0: true,
28858 symEffect: SymRead,
28859 asm: mips.AMOVV,
28860 reg: regInfo{
28861 inputs: []inputInfo{
28862 {0, 4611686018695823358},
28863 },
28864 outputs: []outputInfo{
28865 {0, 167772158},
28866 },
28867 },
28868 },
28869 {
28870 name: "MOVFload",
28871 auxType: auxSymOff,
28872 argLen: 2,
28873 faultOnNilArg0: true,
28874 symEffect: SymRead,
28875 asm: mips.AMOVF,
28876 reg: regInfo{
28877 inputs: []inputInfo{
28878 {0, 4611686018695823358},
28879 },
28880 outputs: []outputInfo{
28881 {0, 1152921504338411520},
28882 },
28883 },
28884 },
28885 {
28886 name: "MOVDload",
28887 auxType: auxSymOff,
28888 argLen: 2,
28889 faultOnNilArg0: true,
28890 symEffect: SymRead,
28891 asm: mips.AMOVD,
28892 reg: regInfo{
28893 inputs: []inputInfo{
28894 {0, 4611686018695823358},
28895 },
28896 outputs: []outputInfo{
28897 {0, 1152921504338411520},
28898 },
28899 },
28900 },
28901 {
28902 name: "MOVBstore",
28903 auxType: auxSymOff,
28904 argLen: 3,
28905 faultOnNilArg0: true,
28906 symEffect: SymWrite,
28907 asm: mips.AMOVB,
28908 reg: regInfo{
28909 inputs: []inputInfo{
28910 {1, 234881022},
28911 {0, 4611686018695823358},
28912 },
28913 },
28914 },
28915 {
28916 name: "MOVHstore",
28917 auxType: auxSymOff,
28918 argLen: 3,
28919 faultOnNilArg0: true,
28920 symEffect: SymWrite,
28921 asm: mips.AMOVH,
28922 reg: regInfo{
28923 inputs: []inputInfo{
28924 {1, 234881022},
28925 {0, 4611686018695823358},
28926 },
28927 },
28928 },
28929 {
28930 name: "MOVWstore",
28931 auxType: auxSymOff,
28932 argLen: 3,
28933 faultOnNilArg0: true,
28934 symEffect: SymWrite,
28935 asm: mips.AMOVW,
28936 reg: regInfo{
28937 inputs: []inputInfo{
28938 {1, 234881022},
28939 {0, 4611686018695823358},
28940 },
28941 },
28942 },
28943 {
28944 name: "MOVVstore",
28945 auxType: auxSymOff,
28946 argLen: 3,
28947 faultOnNilArg0: true,
28948 symEffect: SymWrite,
28949 asm: mips.AMOVV,
28950 reg: regInfo{
28951 inputs: []inputInfo{
28952 {1, 234881022},
28953 {0, 4611686018695823358},
28954 },
28955 },
28956 },
28957 {
28958 name: "MOVFstore",
28959 auxType: auxSymOff,
28960 argLen: 3,
28961 faultOnNilArg0: true,
28962 symEffect: SymWrite,
28963 asm: mips.AMOVF,
28964 reg: regInfo{
28965 inputs: []inputInfo{
28966 {0, 4611686018695823358},
28967 {1, 1152921504338411520},
28968 },
28969 },
28970 },
28971 {
28972 name: "MOVDstore",
28973 auxType: auxSymOff,
28974 argLen: 3,
28975 faultOnNilArg0: true,
28976 symEffect: SymWrite,
28977 asm: mips.AMOVD,
28978 reg: regInfo{
28979 inputs: []inputInfo{
28980 {0, 4611686018695823358},
28981 {1, 1152921504338411520},
28982 },
28983 },
28984 },
28985 {
28986 name: "MOVBstorezero",
28987 auxType: auxSymOff,
28988 argLen: 2,
28989 faultOnNilArg0: true,
28990 symEffect: SymWrite,
28991 asm: mips.AMOVB,
28992 reg: regInfo{
28993 inputs: []inputInfo{
28994 {0, 4611686018695823358},
28995 },
28996 },
28997 },
28998 {
28999 name: "MOVHstorezero",
29000 auxType: auxSymOff,
29001 argLen: 2,
29002 faultOnNilArg0: true,
29003 symEffect: SymWrite,
29004 asm: mips.AMOVH,
29005 reg: regInfo{
29006 inputs: []inputInfo{
29007 {0, 4611686018695823358},
29008 },
29009 },
29010 },
29011 {
29012 name: "MOVWstorezero",
29013 auxType: auxSymOff,
29014 argLen: 2,
29015 faultOnNilArg0: true,
29016 symEffect: SymWrite,
29017 asm: mips.AMOVW,
29018 reg: regInfo{
29019 inputs: []inputInfo{
29020 {0, 4611686018695823358},
29021 },
29022 },
29023 },
29024 {
29025 name: "MOVVstorezero",
29026 auxType: auxSymOff,
29027 argLen: 2,
29028 faultOnNilArg0: true,
29029 symEffect: SymWrite,
29030 asm: mips.AMOVV,
29031 reg: regInfo{
29032 inputs: []inputInfo{
29033 {0, 4611686018695823358},
29034 },
29035 },
29036 },
29037 {
29038 name: "MOVWfpgp",
29039 argLen: 1,
29040 asm: mips.AMOVW,
29041 reg: regInfo{
29042 inputs: []inputInfo{
29043 {0, 1152921504338411520},
29044 },
29045 outputs: []outputInfo{
29046 {0, 167772158},
29047 },
29048 },
29049 },
29050 {
29051 name: "MOVWgpfp",
29052 argLen: 1,
29053 asm: mips.AMOVW,
29054 reg: regInfo{
29055 inputs: []inputInfo{
29056 {0, 167772158},
29057 },
29058 outputs: []outputInfo{
29059 {0, 1152921504338411520},
29060 },
29061 },
29062 },
29063 {
29064 name: "MOVVfpgp",
29065 argLen: 1,
29066 asm: mips.AMOVV,
29067 reg: regInfo{
29068 inputs: []inputInfo{
29069 {0, 1152921504338411520},
29070 },
29071 outputs: []outputInfo{
29072 {0, 167772158},
29073 },
29074 },
29075 },
29076 {
29077 name: "MOVVgpfp",
29078 argLen: 1,
29079 asm: mips.AMOVV,
29080 reg: regInfo{
29081 inputs: []inputInfo{
29082 {0, 167772158},
29083 },
29084 outputs: []outputInfo{
29085 {0, 1152921504338411520},
29086 },
29087 },
29088 },
29089 {
29090 name: "MOVBreg",
29091 argLen: 1,
29092 asm: mips.AMOVB,
29093 reg: regInfo{
29094 inputs: []inputInfo{
29095 {0, 234881022},
29096 },
29097 outputs: []outputInfo{
29098 {0, 167772158},
29099 },
29100 },
29101 },
29102 {
29103 name: "MOVBUreg",
29104 argLen: 1,
29105 asm: mips.AMOVBU,
29106 reg: regInfo{
29107 inputs: []inputInfo{
29108 {0, 234881022},
29109 },
29110 outputs: []outputInfo{
29111 {0, 167772158},
29112 },
29113 },
29114 },
29115 {
29116 name: "MOVHreg",
29117 argLen: 1,
29118 asm: mips.AMOVH,
29119 reg: regInfo{
29120 inputs: []inputInfo{
29121 {0, 234881022},
29122 },
29123 outputs: []outputInfo{
29124 {0, 167772158},
29125 },
29126 },
29127 },
29128 {
29129 name: "MOVHUreg",
29130 argLen: 1,
29131 asm: mips.AMOVHU,
29132 reg: regInfo{
29133 inputs: []inputInfo{
29134 {0, 234881022},
29135 },
29136 outputs: []outputInfo{
29137 {0, 167772158},
29138 },
29139 },
29140 },
29141 {
29142 name: "MOVWreg",
29143 argLen: 1,
29144 asm: mips.AMOVW,
29145 reg: regInfo{
29146 inputs: []inputInfo{
29147 {0, 234881022},
29148 },
29149 outputs: []outputInfo{
29150 {0, 167772158},
29151 },
29152 },
29153 },
29154 {
29155 name: "MOVWUreg",
29156 argLen: 1,
29157 asm: mips.AMOVWU,
29158 reg: regInfo{
29159 inputs: []inputInfo{
29160 {0, 234881022},
29161 },
29162 outputs: []outputInfo{
29163 {0, 167772158},
29164 },
29165 },
29166 },
29167 {
29168 name: "MOVVreg",
29169 argLen: 1,
29170 asm: mips.AMOVV,
29171 reg: regInfo{
29172 inputs: []inputInfo{
29173 {0, 234881022},
29174 },
29175 outputs: []outputInfo{
29176 {0, 167772158},
29177 },
29178 },
29179 },
29180 {
29181 name: "MOVVnop",
29182 argLen: 1,
29183 resultInArg0: true,
29184 reg: regInfo{
29185 inputs: []inputInfo{
29186 {0, 167772158},
29187 },
29188 outputs: []outputInfo{
29189 {0, 167772158},
29190 },
29191 },
29192 },
29193 {
29194 name: "MOVWF",
29195 argLen: 1,
29196 asm: mips.AMOVWF,
29197 reg: regInfo{
29198 inputs: []inputInfo{
29199 {0, 1152921504338411520},
29200 },
29201 outputs: []outputInfo{
29202 {0, 1152921504338411520},
29203 },
29204 },
29205 },
29206 {
29207 name: "MOVWD",
29208 argLen: 1,
29209 asm: mips.AMOVWD,
29210 reg: regInfo{
29211 inputs: []inputInfo{
29212 {0, 1152921504338411520},
29213 },
29214 outputs: []outputInfo{
29215 {0, 1152921504338411520},
29216 },
29217 },
29218 },
29219 {
29220 name: "MOVVF",
29221 argLen: 1,
29222 asm: mips.AMOVVF,
29223 reg: regInfo{
29224 inputs: []inputInfo{
29225 {0, 1152921504338411520},
29226 },
29227 outputs: []outputInfo{
29228 {0, 1152921504338411520},
29229 },
29230 },
29231 },
29232 {
29233 name: "MOVVD",
29234 argLen: 1,
29235 asm: mips.AMOVVD,
29236 reg: regInfo{
29237 inputs: []inputInfo{
29238 {0, 1152921504338411520},
29239 },
29240 outputs: []outputInfo{
29241 {0, 1152921504338411520},
29242 },
29243 },
29244 },
29245 {
29246 name: "TRUNCFW",
29247 argLen: 1,
29248 asm: mips.ATRUNCFW,
29249 reg: regInfo{
29250 inputs: []inputInfo{
29251 {0, 1152921504338411520},
29252 },
29253 outputs: []outputInfo{
29254 {0, 1152921504338411520},
29255 },
29256 },
29257 },
29258 {
29259 name: "TRUNCDW",
29260 argLen: 1,
29261 asm: mips.ATRUNCDW,
29262 reg: regInfo{
29263 inputs: []inputInfo{
29264 {0, 1152921504338411520},
29265 },
29266 outputs: []outputInfo{
29267 {0, 1152921504338411520},
29268 },
29269 },
29270 },
29271 {
29272 name: "TRUNCFV",
29273 argLen: 1,
29274 asm: mips.ATRUNCFV,
29275 reg: regInfo{
29276 inputs: []inputInfo{
29277 {0, 1152921504338411520},
29278 },
29279 outputs: []outputInfo{
29280 {0, 1152921504338411520},
29281 },
29282 },
29283 },
29284 {
29285 name: "TRUNCDV",
29286 argLen: 1,
29287 asm: mips.ATRUNCDV,
29288 reg: regInfo{
29289 inputs: []inputInfo{
29290 {0, 1152921504338411520},
29291 },
29292 outputs: []outputInfo{
29293 {0, 1152921504338411520},
29294 },
29295 },
29296 },
29297 {
29298 name: "MOVFD",
29299 argLen: 1,
29300 asm: mips.AMOVFD,
29301 reg: regInfo{
29302 inputs: []inputInfo{
29303 {0, 1152921504338411520},
29304 },
29305 outputs: []outputInfo{
29306 {0, 1152921504338411520},
29307 },
29308 },
29309 },
29310 {
29311 name: "MOVDF",
29312 argLen: 1,
29313 asm: mips.AMOVDF,
29314 reg: regInfo{
29315 inputs: []inputInfo{
29316 {0, 1152921504338411520},
29317 },
29318 outputs: []outputInfo{
29319 {0, 1152921504338411520},
29320 },
29321 },
29322 },
29323 {
29324 name: "CALLstatic",
29325 auxType: auxCallOff,
29326 argLen: 1,
29327 clobberFlags: true,
29328 call: true,
29329 reg: regInfo{
29330 clobbers: 4611686018393833470,
29331 },
29332 },
29333 {
29334 name: "CALLtail",
29335 auxType: auxCallOff,
29336 argLen: 1,
29337 clobberFlags: true,
29338 call: true,
29339 tailCall: true,
29340 reg: regInfo{
29341 clobbers: 4611686018393833470,
29342 },
29343 },
29344 {
29345 name: "CALLclosure",
29346 auxType: auxCallOff,
29347 argLen: 3,
29348 clobberFlags: true,
29349 call: true,
29350 reg: regInfo{
29351 inputs: []inputInfo{
29352 {1, 4194304},
29353 {0, 201326590},
29354 },
29355 clobbers: 4611686018393833470,
29356 },
29357 },
29358 {
29359 name: "CALLinter",
29360 auxType: auxCallOff,
29361 argLen: 2,
29362 clobberFlags: true,
29363 call: true,
29364 reg: regInfo{
29365 inputs: []inputInfo{
29366 {0, 167772158},
29367 },
29368 clobbers: 4611686018393833470,
29369 },
29370 },
29371 {
29372 name: "DUFFZERO",
29373 auxType: auxInt64,
29374 argLen: 2,
29375 faultOnNilArg0: true,
29376 reg: regInfo{
29377 inputs: []inputInfo{
29378 {0, 167772158},
29379 },
29380 clobbers: 134217730,
29381 },
29382 },
29383 {
29384 name: "DUFFCOPY",
29385 auxType: auxInt64,
29386 argLen: 3,
29387 faultOnNilArg0: true,
29388 faultOnNilArg1: true,
29389 reg: regInfo{
29390 inputs: []inputInfo{
29391 {0, 4},
29392 {1, 2},
29393 },
29394 clobbers: 134217734,
29395 },
29396 },
29397 {
29398 name: "LoweredZero",
29399 auxType: auxInt64,
29400 argLen: 3,
29401 clobberFlags: true,
29402 faultOnNilArg0: true,
29403 reg: regInfo{
29404 inputs: []inputInfo{
29405 {0, 2},
29406 {1, 167772158},
29407 },
29408 clobbers: 2,
29409 },
29410 },
29411 {
29412 name: "LoweredMove",
29413 auxType: auxInt64,
29414 argLen: 4,
29415 clobberFlags: true,
29416 faultOnNilArg0: true,
29417 faultOnNilArg1: true,
29418 reg: regInfo{
29419 inputs: []inputInfo{
29420 {0, 4},
29421 {1, 2},
29422 {2, 167772158},
29423 },
29424 clobbers: 6,
29425 },
29426 },
29427 {
29428 name: "LoweredAtomicAnd32",
29429 argLen: 3,
29430 faultOnNilArg0: true,
29431 hasSideEffects: true,
29432 unsafePoint: true,
29433 asm: mips.AAND,
29434 reg: regInfo{
29435 inputs: []inputInfo{
29436 {1, 234881022},
29437 {0, 4611686018695823358},
29438 },
29439 },
29440 },
29441 {
29442 name: "LoweredAtomicOr32",
29443 argLen: 3,
29444 faultOnNilArg0: true,
29445 hasSideEffects: true,
29446 unsafePoint: true,
29447 asm: mips.AOR,
29448 reg: regInfo{
29449 inputs: []inputInfo{
29450 {1, 234881022},
29451 {0, 4611686018695823358},
29452 },
29453 },
29454 },
29455 {
29456 name: "LoweredAtomicLoad8",
29457 argLen: 2,
29458 faultOnNilArg0: true,
29459 reg: regInfo{
29460 inputs: []inputInfo{
29461 {0, 4611686018695823358},
29462 },
29463 outputs: []outputInfo{
29464 {0, 167772158},
29465 },
29466 },
29467 },
29468 {
29469 name: "LoweredAtomicLoad32",
29470 argLen: 2,
29471 faultOnNilArg0: true,
29472 reg: regInfo{
29473 inputs: []inputInfo{
29474 {0, 4611686018695823358},
29475 },
29476 outputs: []outputInfo{
29477 {0, 167772158},
29478 },
29479 },
29480 },
29481 {
29482 name: "LoweredAtomicLoad64",
29483 argLen: 2,
29484 faultOnNilArg0: true,
29485 reg: regInfo{
29486 inputs: []inputInfo{
29487 {0, 4611686018695823358},
29488 },
29489 outputs: []outputInfo{
29490 {0, 167772158},
29491 },
29492 },
29493 },
29494 {
29495 name: "LoweredAtomicStore8",
29496 argLen: 3,
29497 faultOnNilArg0: true,
29498 hasSideEffects: true,
29499 reg: regInfo{
29500 inputs: []inputInfo{
29501 {1, 234881022},
29502 {0, 4611686018695823358},
29503 },
29504 },
29505 },
29506 {
29507 name: "LoweredAtomicStore32",
29508 argLen: 3,
29509 faultOnNilArg0: true,
29510 hasSideEffects: true,
29511 reg: regInfo{
29512 inputs: []inputInfo{
29513 {1, 234881022},
29514 {0, 4611686018695823358},
29515 },
29516 },
29517 },
29518 {
29519 name: "LoweredAtomicStore64",
29520 argLen: 3,
29521 faultOnNilArg0: true,
29522 hasSideEffects: true,
29523 reg: regInfo{
29524 inputs: []inputInfo{
29525 {1, 234881022},
29526 {0, 4611686018695823358},
29527 },
29528 },
29529 },
29530 {
29531 name: "LoweredAtomicStorezero32",
29532 argLen: 2,
29533 faultOnNilArg0: true,
29534 hasSideEffects: true,
29535 reg: regInfo{
29536 inputs: []inputInfo{
29537 {0, 4611686018695823358},
29538 },
29539 },
29540 },
29541 {
29542 name: "LoweredAtomicStorezero64",
29543 argLen: 2,
29544 faultOnNilArg0: true,
29545 hasSideEffects: true,
29546 reg: regInfo{
29547 inputs: []inputInfo{
29548 {0, 4611686018695823358},
29549 },
29550 },
29551 },
29552 {
29553 name: "LoweredAtomicExchange32",
29554 argLen: 3,
29555 resultNotInArgs: true,
29556 faultOnNilArg0: true,
29557 hasSideEffects: true,
29558 unsafePoint: true,
29559 reg: regInfo{
29560 inputs: []inputInfo{
29561 {1, 234881022},
29562 {0, 4611686018695823358},
29563 },
29564 outputs: []outputInfo{
29565 {0, 167772158},
29566 },
29567 },
29568 },
29569 {
29570 name: "LoweredAtomicExchange64",
29571 argLen: 3,
29572 resultNotInArgs: true,
29573 faultOnNilArg0: true,
29574 hasSideEffects: true,
29575 unsafePoint: true,
29576 reg: regInfo{
29577 inputs: []inputInfo{
29578 {1, 234881022},
29579 {0, 4611686018695823358},
29580 },
29581 outputs: []outputInfo{
29582 {0, 167772158},
29583 },
29584 },
29585 },
29586 {
29587 name: "LoweredAtomicAdd32",
29588 argLen: 3,
29589 resultNotInArgs: true,
29590 faultOnNilArg0: true,
29591 hasSideEffects: true,
29592 unsafePoint: true,
29593 reg: regInfo{
29594 inputs: []inputInfo{
29595 {1, 234881022},
29596 {0, 4611686018695823358},
29597 },
29598 outputs: []outputInfo{
29599 {0, 167772158},
29600 },
29601 },
29602 },
29603 {
29604 name: "LoweredAtomicAdd64",
29605 argLen: 3,
29606 resultNotInArgs: true,
29607 faultOnNilArg0: true,
29608 hasSideEffects: true,
29609 unsafePoint: true,
29610 reg: regInfo{
29611 inputs: []inputInfo{
29612 {1, 234881022},
29613 {0, 4611686018695823358},
29614 },
29615 outputs: []outputInfo{
29616 {0, 167772158},
29617 },
29618 },
29619 },
29620 {
29621 name: "LoweredAtomicAddconst32",
29622 auxType: auxInt32,
29623 argLen: 2,
29624 resultNotInArgs: true,
29625 faultOnNilArg0: true,
29626 hasSideEffects: true,
29627 unsafePoint: true,
29628 reg: regInfo{
29629 inputs: []inputInfo{
29630 {0, 4611686018695823358},
29631 },
29632 outputs: []outputInfo{
29633 {0, 167772158},
29634 },
29635 },
29636 },
29637 {
29638 name: "LoweredAtomicAddconst64",
29639 auxType: auxInt64,
29640 argLen: 2,
29641 resultNotInArgs: true,
29642 faultOnNilArg0: true,
29643 hasSideEffects: true,
29644 unsafePoint: true,
29645 reg: regInfo{
29646 inputs: []inputInfo{
29647 {0, 4611686018695823358},
29648 },
29649 outputs: []outputInfo{
29650 {0, 167772158},
29651 },
29652 },
29653 },
29654 {
29655 name: "LoweredAtomicCas32",
29656 argLen: 4,
29657 resultNotInArgs: true,
29658 faultOnNilArg0: true,
29659 hasSideEffects: true,
29660 unsafePoint: true,
29661 reg: regInfo{
29662 inputs: []inputInfo{
29663 {1, 234881022},
29664 {2, 234881022},
29665 {0, 4611686018695823358},
29666 },
29667 outputs: []outputInfo{
29668 {0, 167772158},
29669 },
29670 },
29671 },
29672 {
29673 name: "LoweredAtomicCas64",
29674 argLen: 4,
29675 resultNotInArgs: true,
29676 faultOnNilArg0: true,
29677 hasSideEffects: true,
29678 unsafePoint: true,
29679 reg: regInfo{
29680 inputs: []inputInfo{
29681 {1, 234881022},
29682 {2, 234881022},
29683 {0, 4611686018695823358},
29684 },
29685 outputs: []outputInfo{
29686 {0, 167772158},
29687 },
29688 },
29689 },
29690 {
29691 name: "LoweredNilCheck",
29692 argLen: 2,
29693 nilCheck: true,
29694 faultOnNilArg0: true,
29695 reg: regInfo{
29696 inputs: []inputInfo{
29697 {0, 234881022},
29698 },
29699 },
29700 },
29701 {
29702 name: "FPFlagTrue",
29703 argLen: 1,
29704 reg: regInfo{
29705 outputs: []outputInfo{
29706 {0, 167772158},
29707 },
29708 },
29709 },
29710 {
29711 name: "FPFlagFalse",
29712 argLen: 1,
29713 reg: regInfo{
29714 outputs: []outputInfo{
29715 {0, 167772158},
29716 },
29717 },
29718 },
29719 {
29720 name: "LoweredGetClosurePtr",
29721 argLen: 0,
29722 zeroWidth: true,
29723 reg: regInfo{
29724 outputs: []outputInfo{
29725 {0, 4194304},
29726 },
29727 },
29728 },
29729 {
29730 name: "LoweredGetCallerSP",
29731 argLen: 1,
29732 rematerializeable: true,
29733 reg: regInfo{
29734 outputs: []outputInfo{
29735 {0, 167772158},
29736 },
29737 },
29738 },
29739 {
29740 name: "LoweredGetCallerPC",
29741 argLen: 0,
29742 rematerializeable: true,
29743 reg: regInfo{
29744 outputs: []outputInfo{
29745 {0, 167772158},
29746 },
29747 },
29748 },
29749 {
29750 name: "LoweredWB",
29751 auxType: auxInt64,
29752 argLen: 1,
29753 clobberFlags: true,
29754 reg: regInfo{
29755 clobbers: 4611686018293170176,
29756 outputs: []outputInfo{
29757 {0, 16777216},
29758 },
29759 },
29760 },
29761 {
29762 name: "LoweredPubBarrier",
29763 argLen: 1,
29764 hasSideEffects: true,
29765 asm: mips.ASYNC,
29766 reg: regInfo{},
29767 },
29768 {
29769 name: "LoweredPanicBoundsA",
29770 auxType: auxInt64,
29771 argLen: 3,
29772 call: true,
29773 reg: regInfo{
29774 inputs: []inputInfo{
29775 {0, 8},
29776 {1, 16},
29777 },
29778 },
29779 },
29780 {
29781 name: "LoweredPanicBoundsB",
29782 auxType: auxInt64,
29783 argLen: 3,
29784 call: true,
29785 reg: regInfo{
29786 inputs: []inputInfo{
29787 {0, 4},
29788 {1, 8},
29789 },
29790 },
29791 },
29792 {
29793 name: "LoweredPanicBoundsC",
29794 auxType: auxInt64,
29795 argLen: 3,
29796 call: true,
29797 reg: regInfo{
29798 inputs: []inputInfo{
29799 {0, 2},
29800 {1, 4},
29801 },
29802 },
29803 },
29804
29805 {
29806 name: "ADD",
29807 argLen: 2,
29808 commutative: true,
29809 asm: ppc64.AADD,
29810 reg: regInfo{
29811 inputs: []inputInfo{
29812 {0, 1073733630},
29813 {1, 1073733630},
29814 },
29815 outputs: []outputInfo{
29816 {0, 1073733624},
29817 },
29818 },
29819 },
29820 {
29821 name: "ADDCC",
29822 argLen: 2,
29823 commutative: true,
29824 asm: ppc64.AADDCC,
29825 reg: regInfo{
29826 inputs: []inputInfo{
29827 {0, 1073733630},
29828 {1, 1073733630},
29829 },
29830 outputs: []outputInfo{
29831 {0, 1073733624},
29832 },
29833 },
29834 },
29835 {
29836 name: "ADDconst",
29837 auxType: auxInt64,
29838 argLen: 1,
29839 asm: ppc64.AADD,
29840 reg: regInfo{
29841 inputs: []inputInfo{
29842 {0, 1073733630},
29843 },
29844 outputs: []outputInfo{
29845 {0, 1073733624},
29846 },
29847 },
29848 },
29849 {
29850 name: "ADDCCconst",
29851 auxType: auxInt64,
29852 argLen: 1,
29853 asm: ppc64.AADDCCC,
29854 reg: regInfo{
29855 inputs: []inputInfo{
29856 {0, 1073733630},
29857 },
29858 clobbers: 9223372036854775808,
29859 outputs: []outputInfo{
29860 {0, 1073733624},
29861 },
29862 },
29863 },
29864 {
29865 name: "FADD",
29866 argLen: 2,
29867 commutative: true,
29868 asm: ppc64.AFADD,
29869 reg: regInfo{
29870 inputs: []inputInfo{
29871 {0, 9223372032559808512},
29872 {1, 9223372032559808512},
29873 },
29874 outputs: []outputInfo{
29875 {0, 9223372032559808512},
29876 },
29877 },
29878 },
29879 {
29880 name: "FADDS",
29881 argLen: 2,
29882 commutative: true,
29883 asm: ppc64.AFADDS,
29884 reg: regInfo{
29885 inputs: []inputInfo{
29886 {0, 9223372032559808512},
29887 {1, 9223372032559808512},
29888 },
29889 outputs: []outputInfo{
29890 {0, 9223372032559808512},
29891 },
29892 },
29893 },
29894 {
29895 name: "SUB",
29896 argLen: 2,
29897 asm: ppc64.ASUB,
29898 reg: regInfo{
29899 inputs: []inputInfo{
29900 {0, 1073733630},
29901 {1, 1073733630},
29902 },
29903 outputs: []outputInfo{
29904 {0, 1073733624},
29905 },
29906 },
29907 },
29908 {
29909 name: "SUBCC",
29910 argLen: 2,
29911 asm: ppc64.ASUBCC,
29912 reg: regInfo{
29913 inputs: []inputInfo{
29914 {0, 1073733630},
29915 {1, 1073733630},
29916 },
29917 outputs: []outputInfo{
29918 {0, 1073733624},
29919 },
29920 },
29921 },
29922 {
29923 name: "SUBFCconst",
29924 auxType: auxInt64,
29925 argLen: 1,
29926 asm: ppc64.ASUBC,
29927 reg: regInfo{
29928 inputs: []inputInfo{
29929 {0, 1073733630},
29930 },
29931 clobbers: 9223372036854775808,
29932 outputs: []outputInfo{
29933 {0, 1073733624},
29934 },
29935 },
29936 },
29937 {
29938 name: "FSUB",
29939 argLen: 2,
29940 asm: ppc64.AFSUB,
29941 reg: regInfo{
29942 inputs: []inputInfo{
29943 {0, 9223372032559808512},
29944 {1, 9223372032559808512},
29945 },
29946 outputs: []outputInfo{
29947 {0, 9223372032559808512},
29948 },
29949 },
29950 },
29951 {
29952 name: "FSUBS",
29953 argLen: 2,
29954 asm: ppc64.AFSUBS,
29955 reg: regInfo{
29956 inputs: []inputInfo{
29957 {0, 9223372032559808512},
29958 {1, 9223372032559808512},
29959 },
29960 outputs: []outputInfo{
29961 {0, 9223372032559808512},
29962 },
29963 },
29964 },
29965 {
29966 name: "XSMINJDP",
29967 argLen: 2,
29968 asm: ppc64.AXSMINJDP,
29969 reg: regInfo{
29970 inputs: []inputInfo{
29971 {0, 9223372032559808512},
29972 {1, 9223372032559808512},
29973 },
29974 outputs: []outputInfo{
29975 {0, 9223372032559808512},
29976 },
29977 },
29978 },
29979 {
29980 name: "XSMAXJDP",
29981 argLen: 2,
29982 asm: ppc64.AXSMAXJDP,
29983 reg: regInfo{
29984 inputs: []inputInfo{
29985 {0, 9223372032559808512},
29986 {1, 9223372032559808512},
29987 },
29988 outputs: []outputInfo{
29989 {0, 9223372032559808512},
29990 },
29991 },
29992 },
29993 {
29994 name: "MULLD",
29995 argLen: 2,
29996 commutative: true,
29997 asm: ppc64.AMULLD,
29998 reg: regInfo{
29999 inputs: []inputInfo{
30000 {0, 1073733630},
30001 {1, 1073733630},
30002 },
30003 outputs: []outputInfo{
30004 {0, 1073733624},
30005 },
30006 },
30007 },
30008 {
30009 name: "MULLW",
30010 argLen: 2,
30011 commutative: true,
30012 asm: ppc64.AMULLW,
30013 reg: regInfo{
30014 inputs: []inputInfo{
30015 {0, 1073733630},
30016 {1, 1073733630},
30017 },
30018 outputs: []outputInfo{
30019 {0, 1073733624},
30020 },
30021 },
30022 },
30023 {
30024 name: "MULLDconst",
30025 auxType: auxInt32,
30026 argLen: 1,
30027 asm: ppc64.AMULLD,
30028 reg: regInfo{
30029 inputs: []inputInfo{
30030 {0, 1073733630},
30031 },
30032 outputs: []outputInfo{
30033 {0, 1073733624},
30034 },
30035 },
30036 },
30037 {
30038 name: "MULLWconst",
30039 auxType: auxInt32,
30040 argLen: 1,
30041 asm: ppc64.AMULLW,
30042 reg: regInfo{
30043 inputs: []inputInfo{
30044 {0, 1073733630},
30045 },
30046 outputs: []outputInfo{
30047 {0, 1073733624},
30048 },
30049 },
30050 },
30051 {
30052 name: "MADDLD",
30053 argLen: 3,
30054 asm: ppc64.AMADDLD,
30055 reg: regInfo{
30056 inputs: []inputInfo{
30057 {0, 1073733630},
30058 {1, 1073733630},
30059 {2, 1073733630},
30060 },
30061 outputs: []outputInfo{
30062 {0, 1073733624},
30063 },
30064 },
30065 },
30066 {
30067 name: "MULHD",
30068 argLen: 2,
30069 commutative: true,
30070 asm: ppc64.AMULHD,
30071 reg: regInfo{
30072 inputs: []inputInfo{
30073 {0, 1073733630},
30074 {1, 1073733630},
30075 },
30076 outputs: []outputInfo{
30077 {0, 1073733624},
30078 },
30079 },
30080 },
30081 {
30082 name: "MULHW",
30083 argLen: 2,
30084 commutative: true,
30085 asm: ppc64.AMULHW,
30086 reg: regInfo{
30087 inputs: []inputInfo{
30088 {0, 1073733630},
30089 {1, 1073733630},
30090 },
30091 outputs: []outputInfo{
30092 {0, 1073733624},
30093 },
30094 },
30095 },
30096 {
30097 name: "MULHDU",
30098 argLen: 2,
30099 commutative: true,
30100 asm: ppc64.AMULHDU,
30101 reg: regInfo{
30102 inputs: []inputInfo{
30103 {0, 1073733630},
30104 {1, 1073733630},
30105 },
30106 outputs: []outputInfo{
30107 {0, 1073733624},
30108 },
30109 },
30110 },
30111 {
30112 name: "MULHDUCC",
30113 argLen: 2,
30114 commutative: true,
30115 asm: ppc64.AMULHDUCC,
30116 reg: regInfo{
30117 inputs: []inputInfo{
30118 {0, 1073733630},
30119 {1, 1073733630},
30120 },
30121 outputs: []outputInfo{
30122 {0, 1073733624},
30123 },
30124 },
30125 },
30126 {
30127 name: "MULHWU",
30128 argLen: 2,
30129 commutative: true,
30130 asm: ppc64.AMULHWU,
30131 reg: regInfo{
30132 inputs: []inputInfo{
30133 {0, 1073733630},
30134 {1, 1073733630},
30135 },
30136 outputs: []outputInfo{
30137 {0, 1073733624},
30138 },
30139 },
30140 },
30141 {
30142 name: "FMUL",
30143 argLen: 2,
30144 commutative: true,
30145 asm: ppc64.AFMUL,
30146 reg: regInfo{
30147 inputs: []inputInfo{
30148 {0, 9223372032559808512},
30149 {1, 9223372032559808512},
30150 },
30151 outputs: []outputInfo{
30152 {0, 9223372032559808512},
30153 },
30154 },
30155 },
30156 {
30157 name: "FMULS",
30158 argLen: 2,
30159 commutative: true,
30160 asm: ppc64.AFMULS,
30161 reg: regInfo{
30162 inputs: []inputInfo{
30163 {0, 9223372032559808512},
30164 {1, 9223372032559808512},
30165 },
30166 outputs: []outputInfo{
30167 {0, 9223372032559808512},
30168 },
30169 },
30170 },
30171 {
30172 name: "FMADD",
30173 argLen: 3,
30174 asm: ppc64.AFMADD,
30175 reg: regInfo{
30176 inputs: []inputInfo{
30177 {0, 9223372032559808512},
30178 {1, 9223372032559808512},
30179 {2, 9223372032559808512},
30180 },
30181 outputs: []outputInfo{
30182 {0, 9223372032559808512},
30183 },
30184 },
30185 },
30186 {
30187 name: "FMADDS",
30188 argLen: 3,
30189 asm: ppc64.AFMADDS,
30190 reg: regInfo{
30191 inputs: []inputInfo{
30192 {0, 9223372032559808512},
30193 {1, 9223372032559808512},
30194 {2, 9223372032559808512},
30195 },
30196 outputs: []outputInfo{
30197 {0, 9223372032559808512},
30198 },
30199 },
30200 },
30201 {
30202 name: "FMSUB",
30203 argLen: 3,
30204 asm: ppc64.AFMSUB,
30205 reg: regInfo{
30206 inputs: []inputInfo{
30207 {0, 9223372032559808512},
30208 {1, 9223372032559808512},
30209 {2, 9223372032559808512},
30210 },
30211 outputs: []outputInfo{
30212 {0, 9223372032559808512},
30213 },
30214 },
30215 },
30216 {
30217 name: "FMSUBS",
30218 argLen: 3,
30219 asm: ppc64.AFMSUBS,
30220 reg: regInfo{
30221 inputs: []inputInfo{
30222 {0, 9223372032559808512},
30223 {1, 9223372032559808512},
30224 {2, 9223372032559808512},
30225 },
30226 outputs: []outputInfo{
30227 {0, 9223372032559808512},
30228 },
30229 },
30230 },
30231 {
30232 name: "SRAD",
30233 argLen: 2,
30234 asm: ppc64.ASRAD,
30235 reg: regInfo{
30236 inputs: []inputInfo{
30237 {0, 1073733630},
30238 {1, 1073733630},
30239 },
30240 clobbers: 9223372036854775808,
30241 outputs: []outputInfo{
30242 {0, 1073733624},
30243 },
30244 },
30245 },
30246 {
30247 name: "SRAW",
30248 argLen: 2,
30249 asm: ppc64.ASRAW,
30250 reg: regInfo{
30251 inputs: []inputInfo{
30252 {0, 1073733630},
30253 {1, 1073733630},
30254 },
30255 clobbers: 9223372036854775808,
30256 outputs: []outputInfo{
30257 {0, 1073733624},
30258 },
30259 },
30260 },
30261 {
30262 name: "SRD",
30263 argLen: 2,
30264 asm: ppc64.ASRD,
30265 reg: regInfo{
30266 inputs: []inputInfo{
30267 {0, 1073733630},
30268 {1, 1073733630},
30269 },
30270 outputs: []outputInfo{
30271 {0, 1073733624},
30272 },
30273 },
30274 },
30275 {
30276 name: "SRW",
30277 argLen: 2,
30278 asm: ppc64.ASRW,
30279 reg: regInfo{
30280 inputs: []inputInfo{
30281 {0, 1073733630},
30282 {1, 1073733630},
30283 },
30284 outputs: []outputInfo{
30285 {0, 1073733624},
30286 },
30287 },
30288 },
30289 {
30290 name: "SLD",
30291 argLen: 2,
30292 asm: ppc64.ASLD,
30293 reg: regInfo{
30294 inputs: []inputInfo{
30295 {0, 1073733630},
30296 {1, 1073733630},
30297 },
30298 outputs: []outputInfo{
30299 {0, 1073733624},
30300 },
30301 },
30302 },
30303 {
30304 name: "SLW",
30305 argLen: 2,
30306 asm: ppc64.ASLW,
30307 reg: regInfo{
30308 inputs: []inputInfo{
30309 {0, 1073733630},
30310 {1, 1073733630},
30311 },
30312 outputs: []outputInfo{
30313 {0, 1073733624},
30314 },
30315 },
30316 },
30317 {
30318 name: "ROTL",
30319 argLen: 2,
30320 asm: ppc64.AROTL,
30321 reg: regInfo{
30322 inputs: []inputInfo{
30323 {0, 1073733630},
30324 {1, 1073733630},
30325 },
30326 outputs: []outputInfo{
30327 {0, 1073733624},
30328 },
30329 },
30330 },
30331 {
30332 name: "ROTLW",
30333 argLen: 2,
30334 asm: ppc64.AROTLW,
30335 reg: regInfo{
30336 inputs: []inputInfo{
30337 {0, 1073733630},
30338 {1, 1073733630},
30339 },
30340 outputs: []outputInfo{
30341 {0, 1073733624},
30342 },
30343 },
30344 },
30345 {
30346 name: "CLRLSLWI",
30347 auxType: auxInt32,
30348 argLen: 1,
30349 asm: ppc64.ACLRLSLWI,
30350 reg: regInfo{
30351 inputs: []inputInfo{
30352 {0, 1073733630},
30353 },
30354 outputs: []outputInfo{
30355 {0, 1073733624},
30356 },
30357 },
30358 },
30359 {
30360 name: "CLRLSLDI",
30361 auxType: auxInt32,
30362 argLen: 1,
30363 asm: ppc64.ACLRLSLDI,
30364 reg: regInfo{
30365 inputs: []inputInfo{
30366 {0, 1073733630},
30367 },
30368 outputs: []outputInfo{
30369 {0, 1073733624},
30370 },
30371 },
30372 },
30373 {
30374 name: "ADDC",
30375 argLen: 2,
30376 commutative: true,
30377 asm: ppc64.AADDC,
30378 reg: regInfo{
30379 inputs: []inputInfo{
30380 {0, 1073733630},
30381 {1, 1073733630},
30382 },
30383 clobbers: 9223372036854775808,
30384 outputs: []outputInfo{
30385 {1, 9223372036854775808},
30386 {0, 1073733624},
30387 },
30388 },
30389 },
30390 {
30391 name: "SUBC",
30392 argLen: 2,
30393 asm: ppc64.ASUBC,
30394 reg: regInfo{
30395 inputs: []inputInfo{
30396 {0, 1073733630},
30397 {1, 1073733630},
30398 },
30399 clobbers: 9223372036854775808,
30400 outputs: []outputInfo{
30401 {1, 9223372036854775808},
30402 {0, 1073733624},
30403 },
30404 },
30405 },
30406 {
30407 name: "ADDCconst",
30408 auxType: auxInt64,
30409 argLen: 1,
30410 asm: ppc64.AADDC,
30411 reg: regInfo{
30412 inputs: []inputInfo{
30413 {0, 1073733630},
30414 },
30415 outputs: []outputInfo{
30416 {1, 9223372036854775808},
30417 {0, 1073733624},
30418 },
30419 },
30420 },
30421 {
30422 name: "SUBCconst",
30423 auxType: auxInt64,
30424 argLen: 1,
30425 asm: ppc64.ASUBC,
30426 reg: regInfo{
30427 inputs: []inputInfo{
30428 {0, 1073733630},
30429 },
30430 outputs: []outputInfo{
30431 {1, 9223372036854775808},
30432 {0, 1073733624},
30433 },
30434 },
30435 },
30436 {
30437 name: "ADDE",
30438 argLen: 3,
30439 commutative: true,
30440 asm: ppc64.AADDE,
30441 reg: regInfo{
30442 inputs: []inputInfo{
30443 {2, 9223372036854775808},
30444 {0, 1073733630},
30445 {1, 1073733630},
30446 },
30447 clobbers: 9223372036854775808,
30448 outputs: []outputInfo{
30449 {1, 9223372036854775808},
30450 {0, 1073733624},
30451 },
30452 },
30453 },
30454 {
30455 name: "ADDZE",
30456 argLen: 2,
30457 asm: ppc64.AADDZE,
30458 reg: regInfo{
30459 inputs: []inputInfo{
30460 {1, 9223372036854775808},
30461 {0, 1073733630},
30462 },
30463 clobbers: 9223372036854775808,
30464 outputs: []outputInfo{
30465 {1, 9223372036854775808},
30466 {0, 1073733624},
30467 },
30468 },
30469 },
30470 {
30471 name: "SUBE",
30472 argLen: 3,
30473 asm: ppc64.ASUBE,
30474 reg: regInfo{
30475 inputs: []inputInfo{
30476 {2, 9223372036854775808},
30477 {0, 1073733630},
30478 {1, 1073733630},
30479 },
30480 clobbers: 9223372036854775808,
30481 outputs: []outputInfo{
30482 {1, 9223372036854775808},
30483 {0, 1073733624},
30484 },
30485 },
30486 },
30487 {
30488 name: "ADDZEzero",
30489 argLen: 1,
30490 asm: ppc64.AADDZE,
30491 reg: regInfo{
30492 inputs: []inputInfo{
30493 {0, 9223372036854775808},
30494 },
30495 clobbers: 9223372036854775808,
30496 outputs: []outputInfo{
30497 {0, 1073733624},
30498 },
30499 },
30500 },
30501 {
30502 name: "SUBZEzero",
30503 argLen: 1,
30504 asm: ppc64.ASUBZE,
30505 reg: regInfo{
30506 inputs: []inputInfo{
30507 {0, 9223372036854775808},
30508 },
30509 clobbers: 9223372036854775808,
30510 outputs: []outputInfo{
30511 {0, 1073733624},
30512 },
30513 },
30514 },
30515 {
30516 name: "SRADconst",
30517 auxType: auxInt64,
30518 argLen: 1,
30519 asm: ppc64.ASRAD,
30520 reg: regInfo{
30521 inputs: []inputInfo{
30522 {0, 1073733630},
30523 },
30524 clobbers: 9223372036854775808,
30525 outputs: []outputInfo{
30526 {0, 1073733624},
30527 },
30528 },
30529 },
30530 {
30531 name: "SRAWconst",
30532 auxType: auxInt64,
30533 argLen: 1,
30534 asm: ppc64.ASRAW,
30535 reg: regInfo{
30536 inputs: []inputInfo{
30537 {0, 1073733630},
30538 },
30539 clobbers: 9223372036854775808,
30540 outputs: []outputInfo{
30541 {0, 1073733624},
30542 },
30543 },
30544 },
30545 {
30546 name: "SRDconst",
30547 auxType: auxInt64,
30548 argLen: 1,
30549 asm: ppc64.ASRD,
30550 reg: regInfo{
30551 inputs: []inputInfo{
30552 {0, 1073733630},
30553 },
30554 outputs: []outputInfo{
30555 {0, 1073733624},
30556 },
30557 },
30558 },
30559 {
30560 name: "SRWconst",
30561 auxType: auxInt64,
30562 argLen: 1,
30563 asm: ppc64.ASRW,
30564 reg: regInfo{
30565 inputs: []inputInfo{
30566 {0, 1073733630},
30567 },
30568 outputs: []outputInfo{
30569 {0, 1073733624},
30570 },
30571 },
30572 },
30573 {
30574 name: "SLDconst",
30575 auxType: auxInt64,
30576 argLen: 1,
30577 asm: ppc64.ASLD,
30578 reg: regInfo{
30579 inputs: []inputInfo{
30580 {0, 1073733630},
30581 },
30582 outputs: []outputInfo{
30583 {0, 1073733624},
30584 },
30585 },
30586 },
30587 {
30588 name: "SLWconst",
30589 auxType: auxInt64,
30590 argLen: 1,
30591 asm: ppc64.ASLW,
30592 reg: regInfo{
30593 inputs: []inputInfo{
30594 {0, 1073733630},
30595 },
30596 outputs: []outputInfo{
30597 {0, 1073733624},
30598 },
30599 },
30600 },
30601 {
30602 name: "ROTLconst",
30603 auxType: auxInt64,
30604 argLen: 1,
30605 asm: ppc64.AROTL,
30606 reg: regInfo{
30607 inputs: []inputInfo{
30608 {0, 1073733630},
30609 },
30610 outputs: []outputInfo{
30611 {0, 1073733624},
30612 },
30613 },
30614 },
30615 {
30616 name: "ROTLWconst",
30617 auxType: auxInt64,
30618 argLen: 1,
30619 asm: ppc64.AROTLW,
30620 reg: regInfo{
30621 inputs: []inputInfo{
30622 {0, 1073733630},
30623 },
30624 outputs: []outputInfo{
30625 {0, 1073733624},
30626 },
30627 },
30628 },
30629 {
30630 name: "EXTSWSLconst",
30631 auxType: auxInt64,
30632 argLen: 1,
30633 asm: ppc64.AEXTSWSLI,
30634 reg: regInfo{
30635 inputs: []inputInfo{
30636 {0, 1073733630},
30637 },
30638 outputs: []outputInfo{
30639 {0, 1073733624},
30640 },
30641 },
30642 },
30643 {
30644 name: "RLWINM",
30645 auxType: auxInt64,
30646 argLen: 1,
30647 asm: ppc64.ARLWNM,
30648 reg: regInfo{
30649 inputs: []inputInfo{
30650 {0, 1073733630},
30651 },
30652 outputs: []outputInfo{
30653 {0, 1073733624},
30654 },
30655 },
30656 },
30657 {
30658 name: "RLWNM",
30659 auxType: auxInt64,
30660 argLen: 2,
30661 asm: ppc64.ARLWNM,
30662 reg: regInfo{
30663 inputs: []inputInfo{
30664 {0, 1073733630},
30665 {1, 1073733630},
30666 },
30667 outputs: []outputInfo{
30668 {0, 1073733624},
30669 },
30670 },
30671 },
30672 {
30673 name: "RLWMI",
30674 auxType: auxInt64,
30675 argLen: 2,
30676 resultInArg0: true,
30677 asm: ppc64.ARLWMI,
30678 reg: regInfo{
30679 inputs: []inputInfo{
30680 {0, 1073733624},
30681 {1, 1073733630},
30682 },
30683 outputs: []outputInfo{
30684 {0, 1073733624},
30685 },
30686 },
30687 },
30688 {
30689 name: "RLDICL",
30690 auxType: auxInt64,
30691 argLen: 1,
30692 asm: ppc64.ARLDICL,
30693 reg: regInfo{
30694 inputs: []inputInfo{
30695 {0, 1073733630},
30696 },
30697 outputs: []outputInfo{
30698 {0, 1073733624},
30699 },
30700 },
30701 },
30702 {
30703 name: "RLDICLCC",
30704 auxType: auxInt64,
30705 argLen: 1,
30706 asm: ppc64.ARLDICLCC,
30707 reg: regInfo{
30708 inputs: []inputInfo{
30709 {0, 1073733630},
30710 },
30711 outputs: []outputInfo{
30712 {0, 1073733624},
30713 },
30714 },
30715 },
30716 {
30717 name: "RLDICR",
30718 auxType: auxInt64,
30719 argLen: 1,
30720 asm: ppc64.ARLDICR,
30721 reg: regInfo{
30722 inputs: []inputInfo{
30723 {0, 1073733630},
30724 },
30725 outputs: []outputInfo{
30726 {0, 1073733624},
30727 },
30728 },
30729 },
30730 {
30731 name: "CNTLZD",
30732 argLen: 1,
30733 asm: ppc64.ACNTLZD,
30734 reg: regInfo{
30735 inputs: []inputInfo{
30736 {0, 1073733630},
30737 },
30738 outputs: []outputInfo{
30739 {0, 1073733624},
30740 },
30741 },
30742 },
30743 {
30744 name: "CNTLZDCC",
30745 argLen: 1,
30746 asm: ppc64.ACNTLZDCC,
30747 reg: regInfo{
30748 inputs: []inputInfo{
30749 {0, 1073733630},
30750 },
30751 outputs: []outputInfo{
30752 {0, 1073733624},
30753 },
30754 },
30755 },
30756 {
30757 name: "CNTLZW",
30758 argLen: 1,
30759 asm: ppc64.ACNTLZW,
30760 reg: regInfo{
30761 inputs: []inputInfo{
30762 {0, 1073733630},
30763 },
30764 outputs: []outputInfo{
30765 {0, 1073733624},
30766 },
30767 },
30768 },
30769 {
30770 name: "CNTTZD",
30771 argLen: 1,
30772 asm: ppc64.ACNTTZD,
30773 reg: regInfo{
30774 inputs: []inputInfo{
30775 {0, 1073733630},
30776 },
30777 outputs: []outputInfo{
30778 {0, 1073733624},
30779 },
30780 },
30781 },
30782 {
30783 name: "CNTTZW",
30784 argLen: 1,
30785 asm: ppc64.ACNTTZW,
30786 reg: regInfo{
30787 inputs: []inputInfo{
30788 {0, 1073733630},
30789 },
30790 outputs: []outputInfo{
30791 {0, 1073733624},
30792 },
30793 },
30794 },
30795 {
30796 name: "POPCNTD",
30797 argLen: 1,
30798 asm: ppc64.APOPCNTD,
30799 reg: regInfo{
30800 inputs: []inputInfo{
30801 {0, 1073733630},
30802 },
30803 outputs: []outputInfo{
30804 {0, 1073733624},
30805 },
30806 },
30807 },
30808 {
30809 name: "POPCNTW",
30810 argLen: 1,
30811 asm: ppc64.APOPCNTW,
30812 reg: regInfo{
30813 inputs: []inputInfo{
30814 {0, 1073733630},
30815 },
30816 outputs: []outputInfo{
30817 {0, 1073733624},
30818 },
30819 },
30820 },
30821 {
30822 name: "POPCNTB",
30823 argLen: 1,
30824 asm: ppc64.APOPCNTB,
30825 reg: regInfo{
30826 inputs: []inputInfo{
30827 {0, 1073733630},
30828 },
30829 outputs: []outputInfo{
30830 {0, 1073733624},
30831 },
30832 },
30833 },
30834 {
30835 name: "FDIV",
30836 argLen: 2,
30837 asm: ppc64.AFDIV,
30838 reg: regInfo{
30839 inputs: []inputInfo{
30840 {0, 9223372032559808512},
30841 {1, 9223372032559808512},
30842 },
30843 outputs: []outputInfo{
30844 {0, 9223372032559808512},
30845 },
30846 },
30847 },
30848 {
30849 name: "FDIVS",
30850 argLen: 2,
30851 asm: ppc64.AFDIVS,
30852 reg: regInfo{
30853 inputs: []inputInfo{
30854 {0, 9223372032559808512},
30855 {1, 9223372032559808512},
30856 },
30857 outputs: []outputInfo{
30858 {0, 9223372032559808512},
30859 },
30860 },
30861 },
30862 {
30863 name: "DIVD",
30864 argLen: 2,
30865 asm: ppc64.ADIVD,
30866 reg: regInfo{
30867 inputs: []inputInfo{
30868 {0, 1073733630},
30869 {1, 1073733630},
30870 },
30871 outputs: []outputInfo{
30872 {0, 1073733624},
30873 },
30874 },
30875 },
30876 {
30877 name: "DIVW",
30878 argLen: 2,
30879 asm: ppc64.ADIVW,
30880 reg: regInfo{
30881 inputs: []inputInfo{
30882 {0, 1073733630},
30883 {1, 1073733630},
30884 },
30885 outputs: []outputInfo{
30886 {0, 1073733624},
30887 },
30888 },
30889 },
30890 {
30891 name: "DIVDU",
30892 argLen: 2,
30893 asm: ppc64.ADIVDU,
30894 reg: regInfo{
30895 inputs: []inputInfo{
30896 {0, 1073733630},
30897 {1, 1073733630},
30898 },
30899 outputs: []outputInfo{
30900 {0, 1073733624},
30901 },
30902 },
30903 },
30904 {
30905 name: "DIVWU",
30906 argLen: 2,
30907 asm: ppc64.ADIVWU,
30908 reg: regInfo{
30909 inputs: []inputInfo{
30910 {0, 1073733630},
30911 {1, 1073733630},
30912 },
30913 outputs: []outputInfo{
30914 {0, 1073733624},
30915 },
30916 },
30917 },
30918 {
30919 name: "MODUD",
30920 argLen: 2,
30921 asm: ppc64.AMODUD,
30922 reg: regInfo{
30923 inputs: []inputInfo{
30924 {0, 1073733630},
30925 {1, 1073733630},
30926 },
30927 outputs: []outputInfo{
30928 {0, 1073733624},
30929 },
30930 },
30931 },
30932 {
30933 name: "MODSD",
30934 argLen: 2,
30935 asm: ppc64.AMODSD,
30936 reg: regInfo{
30937 inputs: []inputInfo{
30938 {0, 1073733630},
30939 {1, 1073733630},
30940 },
30941 outputs: []outputInfo{
30942 {0, 1073733624},
30943 },
30944 },
30945 },
30946 {
30947 name: "MODUW",
30948 argLen: 2,
30949 asm: ppc64.AMODUW,
30950 reg: regInfo{
30951 inputs: []inputInfo{
30952 {0, 1073733630},
30953 {1, 1073733630},
30954 },
30955 outputs: []outputInfo{
30956 {0, 1073733624},
30957 },
30958 },
30959 },
30960 {
30961 name: "MODSW",
30962 argLen: 2,
30963 asm: ppc64.AMODSW,
30964 reg: regInfo{
30965 inputs: []inputInfo{
30966 {0, 1073733630},
30967 {1, 1073733630},
30968 },
30969 outputs: []outputInfo{
30970 {0, 1073733624},
30971 },
30972 },
30973 },
30974 {
30975 name: "FCTIDZ",
30976 argLen: 1,
30977 asm: ppc64.AFCTIDZ,
30978 reg: regInfo{
30979 inputs: []inputInfo{
30980 {0, 9223372032559808512},
30981 },
30982 outputs: []outputInfo{
30983 {0, 9223372032559808512},
30984 },
30985 },
30986 },
30987 {
30988 name: "FCTIWZ",
30989 argLen: 1,
30990 asm: ppc64.AFCTIWZ,
30991 reg: regInfo{
30992 inputs: []inputInfo{
30993 {0, 9223372032559808512},
30994 },
30995 outputs: []outputInfo{
30996 {0, 9223372032559808512},
30997 },
30998 },
30999 },
31000 {
31001 name: "FCFID",
31002 argLen: 1,
31003 asm: ppc64.AFCFID,
31004 reg: regInfo{
31005 inputs: []inputInfo{
31006 {0, 9223372032559808512},
31007 },
31008 outputs: []outputInfo{
31009 {0, 9223372032559808512},
31010 },
31011 },
31012 },
31013 {
31014 name: "FCFIDS",
31015 argLen: 1,
31016 asm: ppc64.AFCFIDS,
31017 reg: regInfo{
31018 inputs: []inputInfo{
31019 {0, 9223372032559808512},
31020 },
31021 outputs: []outputInfo{
31022 {0, 9223372032559808512},
31023 },
31024 },
31025 },
31026 {
31027 name: "FRSP",
31028 argLen: 1,
31029 asm: ppc64.AFRSP,
31030 reg: regInfo{
31031 inputs: []inputInfo{
31032 {0, 9223372032559808512},
31033 },
31034 outputs: []outputInfo{
31035 {0, 9223372032559808512},
31036 },
31037 },
31038 },
31039 {
31040 name: "MFVSRD",
31041 argLen: 1,
31042 asm: ppc64.AMFVSRD,
31043 reg: regInfo{
31044 inputs: []inputInfo{
31045 {0, 9223372032559808512},
31046 },
31047 outputs: []outputInfo{
31048 {0, 1073733624},
31049 },
31050 },
31051 },
31052 {
31053 name: "MTVSRD",
31054 argLen: 1,
31055 asm: ppc64.AMTVSRD,
31056 reg: regInfo{
31057 inputs: []inputInfo{
31058 {0, 1073733624},
31059 },
31060 outputs: []outputInfo{
31061 {0, 9223372032559808512},
31062 },
31063 },
31064 },
31065 {
31066 name: "AND",
31067 argLen: 2,
31068 commutative: true,
31069 asm: ppc64.AAND,
31070 reg: regInfo{
31071 inputs: []inputInfo{
31072 {0, 1073733630},
31073 {1, 1073733630},
31074 },
31075 outputs: []outputInfo{
31076 {0, 1073733624},
31077 },
31078 },
31079 },
31080 {
31081 name: "ANDN",
31082 argLen: 2,
31083 asm: ppc64.AANDN,
31084 reg: regInfo{
31085 inputs: []inputInfo{
31086 {0, 1073733630},
31087 {1, 1073733630},
31088 },
31089 outputs: []outputInfo{
31090 {0, 1073733624},
31091 },
31092 },
31093 },
31094 {
31095 name: "ANDNCC",
31096 argLen: 2,
31097 asm: ppc64.AANDNCC,
31098 reg: regInfo{
31099 inputs: []inputInfo{
31100 {0, 1073733630},
31101 {1, 1073733630},
31102 },
31103 outputs: []outputInfo{
31104 {0, 1073733624},
31105 },
31106 },
31107 },
31108 {
31109 name: "ANDCC",
31110 argLen: 2,
31111 commutative: true,
31112 asm: ppc64.AANDCC,
31113 reg: regInfo{
31114 inputs: []inputInfo{
31115 {0, 1073733630},
31116 {1, 1073733630},
31117 },
31118 outputs: []outputInfo{
31119 {0, 1073733624},
31120 },
31121 },
31122 },
31123 {
31124 name: "OR",
31125 argLen: 2,
31126 commutative: true,
31127 asm: ppc64.AOR,
31128 reg: regInfo{
31129 inputs: []inputInfo{
31130 {0, 1073733630},
31131 {1, 1073733630},
31132 },
31133 outputs: []outputInfo{
31134 {0, 1073733624},
31135 },
31136 },
31137 },
31138 {
31139 name: "ORN",
31140 argLen: 2,
31141 asm: ppc64.AORN,
31142 reg: regInfo{
31143 inputs: []inputInfo{
31144 {0, 1073733630},
31145 {1, 1073733630},
31146 },
31147 outputs: []outputInfo{
31148 {0, 1073733624},
31149 },
31150 },
31151 },
31152 {
31153 name: "ORCC",
31154 argLen: 2,
31155 commutative: true,
31156 asm: ppc64.AORCC,
31157 reg: regInfo{
31158 inputs: []inputInfo{
31159 {0, 1073733630},
31160 {1, 1073733630},
31161 },
31162 outputs: []outputInfo{
31163 {0, 1073733624},
31164 },
31165 },
31166 },
31167 {
31168 name: "NOR",
31169 argLen: 2,
31170 commutative: true,
31171 asm: ppc64.ANOR,
31172 reg: regInfo{
31173 inputs: []inputInfo{
31174 {0, 1073733630},
31175 {1, 1073733630},
31176 },
31177 outputs: []outputInfo{
31178 {0, 1073733624},
31179 },
31180 },
31181 },
31182 {
31183 name: "NORCC",
31184 argLen: 2,
31185 commutative: true,
31186 asm: ppc64.ANORCC,
31187 reg: regInfo{
31188 inputs: []inputInfo{
31189 {0, 1073733630},
31190 {1, 1073733630},
31191 },
31192 outputs: []outputInfo{
31193 {0, 1073733624},
31194 },
31195 },
31196 },
31197 {
31198 name: "XOR",
31199 argLen: 2,
31200 commutative: true,
31201 asm: ppc64.AXOR,
31202 reg: regInfo{
31203 inputs: []inputInfo{
31204 {0, 1073733630},
31205 {1, 1073733630},
31206 },
31207 outputs: []outputInfo{
31208 {0, 1073733624},
31209 },
31210 },
31211 },
31212 {
31213 name: "XORCC",
31214 argLen: 2,
31215 commutative: true,
31216 asm: ppc64.AXORCC,
31217 reg: regInfo{
31218 inputs: []inputInfo{
31219 {0, 1073733630},
31220 {1, 1073733630},
31221 },
31222 outputs: []outputInfo{
31223 {0, 1073733624},
31224 },
31225 },
31226 },
31227 {
31228 name: "EQV",
31229 argLen: 2,
31230 commutative: true,
31231 asm: ppc64.AEQV,
31232 reg: regInfo{
31233 inputs: []inputInfo{
31234 {0, 1073733630},
31235 {1, 1073733630},
31236 },
31237 outputs: []outputInfo{
31238 {0, 1073733624},
31239 },
31240 },
31241 },
31242 {
31243 name: "NEG",
31244 argLen: 1,
31245 asm: ppc64.ANEG,
31246 reg: regInfo{
31247 inputs: []inputInfo{
31248 {0, 1073733630},
31249 },
31250 outputs: []outputInfo{
31251 {0, 1073733624},
31252 },
31253 },
31254 },
31255 {
31256 name: "NEGCC",
31257 argLen: 1,
31258 asm: ppc64.ANEGCC,
31259 reg: regInfo{
31260 inputs: []inputInfo{
31261 {0, 1073733630},
31262 },
31263 outputs: []outputInfo{
31264 {0, 1073733624},
31265 },
31266 },
31267 },
31268 {
31269 name: "BRD",
31270 argLen: 1,
31271 asm: ppc64.ABRD,
31272 reg: regInfo{
31273 inputs: []inputInfo{
31274 {0, 1073733630},
31275 },
31276 outputs: []outputInfo{
31277 {0, 1073733624},
31278 },
31279 },
31280 },
31281 {
31282 name: "BRW",
31283 argLen: 1,
31284 asm: ppc64.ABRW,
31285 reg: regInfo{
31286 inputs: []inputInfo{
31287 {0, 1073733630},
31288 },
31289 outputs: []outputInfo{
31290 {0, 1073733624},
31291 },
31292 },
31293 },
31294 {
31295 name: "BRH",
31296 argLen: 1,
31297 asm: ppc64.ABRH,
31298 reg: regInfo{
31299 inputs: []inputInfo{
31300 {0, 1073733630},
31301 },
31302 outputs: []outputInfo{
31303 {0, 1073733624},
31304 },
31305 },
31306 },
31307 {
31308 name: "FNEG",
31309 argLen: 1,
31310 asm: ppc64.AFNEG,
31311 reg: regInfo{
31312 inputs: []inputInfo{
31313 {0, 9223372032559808512},
31314 },
31315 outputs: []outputInfo{
31316 {0, 9223372032559808512},
31317 },
31318 },
31319 },
31320 {
31321 name: "FSQRT",
31322 argLen: 1,
31323 asm: ppc64.AFSQRT,
31324 reg: regInfo{
31325 inputs: []inputInfo{
31326 {0, 9223372032559808512},
31327 },
31328 outputs: []outputInfo{
31329 {0, 9223372032559808512},
31330 },
31331 },
31332 },
31333 {
31334 name: "FSQRTS",
31335 argLen: 1,
31336 asm: ppc64.AFSQRTS,
31337 reg: regInfo{
31338 inputs: []inputInfo{
31339 {0, 9223372032559808512},
31340 },
31341 outputs: []outputInfo{
31342 {0, 9223372032559808512},
31343 },
31344 },
31345 },
31346 {
31347 name: "FFLOOR",
31348 argLen: 1,
31349 asm: ppc64.AFRIM,
31350 reg: regInfo{
31351 inputs: []inputInfo{
31352 {0, 9223372032559808512},
31353 },
31354 outputs: []outputInfo{
31355 {0, 9223372032559808512},
31356 },
31357 },
31358 },
31359 {
31360 name: "FCEIL",
31361 argLen: 1,
31362 asm: ppc64.AFRIP,
31363 reg: regInfo{
31364 inputs: []inputInfo{
31365 {0, 9223372032559808512},
31366 },
31367 outputs: []outputInfo{
31368 {0, 9223372032559808512},
31369 },
31370 },
31371 },
31372 {
31373 name: "FTRUNC",
31374 argLen: 1,
31375 asm: ppc64.AFRIZ,
31376 reg: regInfo{
31377 inputs: []inputInfo{
31378 {0, 9223372032559808512},
31379 },
31380 outputs: []outputInfo{
31381 {0, 9223372032559808512},
31382 },
31383 },
31384 },
31385 {
31386 name: "FROUND",
31387 argLen: 1,
31388 asm: ppc64.AFRIN,
31389 reg: regInfo{
31390 inputs: []inputInfo{
31391 {0, 9223372032559808512},
31392 },
31393 outputs: []outputInfo{
31394 {0, 9223372032559808512},
31395 },
31396 },
31397 },
31398 {
31399 name: "FABS",
31400 argLen: 1,
31401 asm: ppc64.AFABS,
31402 reg: regInfo{
31403 inputs: []inputInfo{
31404 {0, 9223372032559808512},
31405 },
31406 outputs: []outputInfo{
31407 {0, 9223372032559808512},
31408 },
31409 },
31410 },
31411 {
31412 name: "FNABS",
31413 argLen: 1,
31414 asm: ppc64.AFNABS,
31415 reg: regInfo{
31416 inputs: []inputInfo{
31417 {0, 9223372032559808512},
31418 },
31419 outputs: []outputInfo{
31420 {0, 9223372032559808512},
31421 },
31422 },
31423 },
31424 {
31425 name: "FCPSGN",
31426 argLen: 2,
31427 asm: ppc64.AFCPSGN,
31428 reg: regInfo{
31429 inputs: []inputInfo{
31430 {0, 9223372032559808512},
31431 {1, 9223372032559808512},
31432 },
31433 outputs: []outputInfo{
31434 {0, 9223372032559808512},
31435 },
31436 },
31437 },
31438 {
31439 name: "ORconst",
31440 auxType: auxInt64,
31441 argLen: 1,
31442 asm: ppc64.AOR,
31443 reg: regInfo{
31444 inputs: []inputInfo{
31445 {0, 1073733630},
31446 },
31447 outputs: []outputInfo{
31448 {0, 1073733624},
31449 },
31450 },
31451 },
31452 {
31453 name: "XORconst",
31454 auxType: auxInt64,
31455 argLen: 1,
31456 asm: ppc64.AXOR,
31457 reg: regInfo{
31458 inputs: []inputInfo{
31459 {0, 1073733630},
31460 },
31461 outputs: []outputInfo{
31462 {0, 1073733624},
31463 },
31464 },
31465 },
31466 {
31467 name: "ANDCCconst",
31468 auxType: auxInt64,
31469 argLen: 1,
31470 asm: ppc64.AANDCC,
31471 reg: regInfo{
31472 inputs: []inputInfo{
31473 {0, 1073733630},
31474 },
31475 outputs: []outputInfo{
31476 {0, 1073733624},
31477 },
31478 },
31479 },
31480 {
31481 name: "ANDconst",
31482 auxType: auxInt64,
31483 argLen: 1,
31484 clobberFlags: true,
31485 asm: ppc64.AANDCC,
31486 reg: regInfo{
31487 inputs: []inputInfo{
31488 {0, 1073733630},
31489 },
31490 outputs: []outputInfo{
31491 {0, 1073733624},
31492 },
31493 },
31494 },
31495 {
31496 name: "MOVBreg",
31497 argLen: 1,
31498 asm: ppc64.AMOVB,
31499 reg: regInfo{
31500 inputs: []inputInfo{
31501 {0, 1073733630},
31502 },
31503 outputs: []outputInfo{
31504 {0, 1073733624},
31505 },
31506 },
31507 },
31508 {
31509 name: "MOVBZreg",
31510 argLen: 1,
31511 asm: ppc64.AMOVBZ,
31512 reg: regInfo{
31513 inputs: []inputInfo{
31514 {0, 1073733630},
31515 },
31516 outputs: []outputInfo{
31517 {0, 1073733624},
31518 },
31519 },
31520 },
31521 {
31522 name: "MOVHreg",
31523 argLen: 1,
31524 asm: ppc64.AMOVH,
31525 reg: regInfo{
31526 inputs: []inputInfo{
31527 {0, 1073733630},
31528 },
31529 outputs: []outputInfo{
31530 {0, 1073733624},
31531 },
31532 },
31533 },
31534 {
31535 name: "MOVHZreg",
31536 argLen: 1,
31537 asm: ppc64.AMOVHZ,
31538 reg: regInfo{
31539 inputs: []inputInfo{
31540 {0, 1073733630},
31541 },
31542 outputs: []outputInfo{
31543 {0, 1073733624},
31544 },
31545 },
31546 },
31547 {
31548 name: "MOVWreg",
31549 argLen: 1,
31550 asm: ppc64.AMOVW,
31551 reg: regInfo{
31552 inputs: []inputInfo{
31553 {0, 1073733630},
31554 },
31555 outputs: []outputInfo{
31556 {0, 1073733624},
31557 },
31558 },
31559 },
31560 {
31561 name: "MOVWZreg",
31562 argLen: 1,
31563 asm: ppc64.AMOVWZ,
31564 reg: regInfo{
31565 inputs: []inputInfo{
31566 {0, 1073733630},
31567 },
31568 outputs: []outputInfo{
31569 {0, 1073733624},
31570 },
31571 },
31572 },
31573 {
31574 name: "MOVBZload",
31575 auxType: auxSymOff,
31576 argLen: 2,
31577 faultOnNilArg0: true,
31578 symEffect: SymRead,
31579 asm: ppc64.AMOVBZ,
31580 reg: regInfo{
31581 inputs: []inputInfo{
31582 {0, 1073733630},
31583 },
31584 outputs: []outputInfo{
31585 {0, 1073733624},
31586 },
31587 },
31588 },
31589 {
31590 name: "MOVHload",
31591 auxType: auxSymOff,
31592 argLen: 2,
31593 faultOnNilArg0: true,
31594 symEffect: SymRead,
31595 asm: ppc64.AMOVH,
31596 reg: regInfo{
31597 inputs: []inputInfo{
31598 {0, 1073733630},
31599 },
31600 outputs: []outputInfo{
31601 {0, 1073733624},
31602 },
31603 },
31604 },
31605 {
31606 name: "MOVHZload",
31607 auxType: auxSymOff,
31608 argLen: 2,
31609 faultOnNilArg0: true,
31610 symEffect: SymRead,
31611 asm: ppc64.AMOVHZ,
31612 reg: regInfo{
31613 inputs: []inputInfo{
31614 {0, 1073733630},
31615 },
31616 outputs: []outputInfo{
31617 {0, 1073733624},
31618 },
31619 },
31620 },
31621 {
31622 name: "MOVWload",
31623 auxType: auxSymOff,
31624 argLen: 2,
31625 faultOnNilArg0: true,
31626 symEffect: SymRead,
31627 asm: ppc64.AMOVW,
31628 reg: regInfo{
31629 inputs: []inputInfo{
31630 {0, 1073733630},
31631 },
31632 outputs: []outputInfo{
31633 {0, 1073733624},
31634 },
31635 },
31636 },
31637 {
31638 name: "MOVWZload",
31639 auxType: auxSymOff,
31640 argLen: 2,
31641 faultOnNilArg0: true,
31642 symEffect: SymRead,
31643 asm: ppc64.AMOVWZ,
31644 reg: regInfo{
31645 inputs: []inputInfo{
31646 {0, 1073733630},
31647 },
31648 outputs: []outputInfo{
31649 {0, 1073733624},
31650 },
31651 },
31652 },
31653 {
31654 name: "MOVDload",
31655 auxType: auxSymOff,
31656 argLen: 2,
31657 faultOnNilArg0: true,
31658 symEffect: SymRead,
31659 asm: ppc64.AMOVD,
31660 reg: regInfo{
31661 inputs: []inputInfo{
31662 {0, 1073733630},
31663 },
31664 outputs: []outputInfo{
31665 {0, 1073733624},
31666 },
31667 },
31668 },
31669 {
31670 name: "MOVDBRload",
31671 argLen: 2,
31672 faultOnNilArg0: true,
31673 asm: ppc64.AMOVDBR,
31674 reg: regInfo{
31675 inputs: []inputInfo{
31676 {0, 1073733630},
31677 },
31678 outputs: []outputInfo{
31679 {0, 1073733624},
31680 },
31681 },
31682 },
31683 {
31684 name: "MOVWBRload",
31685 argLen: 2,
31686 faultOnNilArg0: true,
31687 asm: ppc64.AMOVWBR,
31688 reg: regInfo{
31689 inputs: []inputInfo{
31690 {0, 1073733630},
31691 },
31692 outputs: []outputInfo{
31693 {0, 1073733624},
31694 },
31695 },
31696 },
31697 {
31698 name: "MOVHBRload",
31699 argLen: 2,
31700 faultOnNilArg0: true,
31701 asm: ppc64.AMOVHBR,
31702 reg: regInfo{
31703 inputs: []inputInfo{
31704 {0, 1073733630},
31705 },
31706 outputs: []outputInfo{
31707 {0, 1073733624},
31708 },
31709 },
31710 },
31711 {
31712 name: "MOVBZloadidx",
31713 argLen: 3,
31714 asm: ppc64.AMOVBZ,
31715 reg: regInfo{
31716 inputs: []inputInfo{
31717 {1, 1073733624},
31718 {0, 1073733630},
31719 },
31720 outputs: []outputInfo{
31721 {0, 1073733624},
31722 },
31723 },
31724 },
31725 {
31726 name: "MOVHloadidx",
31727 argLen: 3,
31728 asm: ppc64.AMOVH,
31729 reg: regInfo{
31730 inputs: []inputInfo{
31731 {1, 1073733624},
31732 {0, 1073733630},
31733 },
31734 outputs: []outputInfo{
31735 {0, 1073733624},
31736 },
31737 },
31738 },
31739 {
31740 name: "MOVHZloadidx",
31741 argLen: 3,
31742 asm: ppc64.AMOVHZ,
31743 reg: regInfo{
31744 inputs: []inputInfo{
31745 {1, 1073733624},
31746 {0, 1073733630},
31747 },
31748 outputs: []outputInfo{
31749 {0, 1073733624},
31750 },
31751 },
31752 },
31753 {
31754 name: "MOVWloadidx",
31755 argLen: 3,
31756 asm: ppc64.AMOVW,
31757 reg: regInfo{
31758 inputs: []inputInfo{
31759 {1, 1073733624},
31760 {0, 1073733630},
31761 },
31762 outputs: []outputInfo{
31763 {0, 1073733624},
31764 },
31765 },
31766 },
31767 {
31768 name: "MOVWZloadidx",
31769 argLen: 3,
31770 asm: ppc64.AMOVWZ,
31771 reg: regInfo{
31772 inputs: []inputInfo{
31773 {1, 1073733624},
31774 {0, 1073733630},
31775 },
31776 outputs: []outputInfo{
31777 {0, 1073733624},
31778 },
31779 },
31780 },
31781 {
31782 name: "MOVDloadidx",
31783 argLen: 3,
31784 asm: ppc64.AMOVD,
31785 reg: regInfo{
31786 inputs: []inputInfo{
31787 {1, 1073733624},
31788 {0, 1073733630},
31789 },
31790 outputs: []outputInfo{
31791 {0, 1073733624},
31792 },
31793 },
31794 },
31795 {
31796 name: "MOVHBRloadidx",
31797 argLen: 3,
31798 asm: ppc64.AMOVHBR,
31799 reg: regInfo{
31800 inputs: []inputInfo{
31801 {1, 1073733624},
31802 {0, 1073733630},
31803 },
31804 outputs: []outputInfo{
31805 {0, 1073733624},
31806 },
31807 },
31808 },
31809 {
31810 name: "MOVWBRloadidx",
31811 argLen: 3,
31812 asm: ppc64.AMOVWBR,
31813 reg: regInfo{
31814 inputs: []inputInfo{
31815 {1, 1073733624},
31816 {0, 1073733630},
31817 },
31818 outputs: []outputInfo{
31819 {0, 1073733624},
31820 },
31821 },
31822 },
31823 {
31824 name: "MOVDBRloadidx",
31825 argLen: 3,
31826 asm: ppc64.AMOVDBR,
31827 reg: regInfo{
31828 inputs: []inputInfo{
31829 {1, 1073733624},
31830 {0, 1073733630},
31831 },
31832 outputs: []outputInfo{
31833 {0, 1073733624},
31834 },
31835 },
31836 },
31837 {
31838 name: "FMOVDloadidx",
31839 argLen: 3,
31840 asm: ppc64.AFMOVD,
31841 reg: regInfo{
31842 inputs: []inputInfo{
31843 {0, 1073733630},
31844 {1, 1073733630},
31845 },
31846 outputs: []outputInfo{
31847 {0, 9223372032559808512},
31848 },
31849 },
31850 },
31851 {
31852 name: "FMOVSloadidx",
31853 argLen: 3,
31854 asm: ppc64.AFMOVS,
31855 reg: regInfo{
31856 inputs: []inputInfo{
31857 {0, 1073733630},
31858 {1, 1073733630},
31859 },
31860 outputs: []outputInfo{
31861 {0, 9223372032559808512},
31862 },
31863 },
31864 },
31865 {
31866 name: "DCBT",
31867 auxType: auxInt64,
31868 argLen: 2,
31869 hasSideEffects: true,
31870 asm: ppc64.ADCBT,
31871 reg: regInfo{
31872 inputs: []inputInfo{
31873 {0, 1073733630},
31874 },
31875 },
31876 },
31877 {
31878 name: "MOVDBRstore",
31879 argLen: 3,
31880 faultOnNilArg0: true,
31881 asm: ppc64.AMOVDBR,
31882 reg: regInfo{
31883 inputs: []inputInfo{
31884 {0, 1073733630},
31885 {1, 1073733630},
31886 },
31887 },
31888 },
31889 {
31890 name: "MOVWBRstore",
31891 argLen: 3,
31892 faultOnNilArg0: true,
31893 asm: ppc64.AMOVWBR,
31894 reg: regInfo{
31895 inputs: []inputInfo{
31896 {0, 1073733630},
31897 {1, 1073733630},
31898 },
31899 },
31900 },
31901 {
31902 name: "MOVHBRstore",
31903 argLen: 3,
31904 faultOnNilArg0: true,
31905 asm: ppc64.AMOVHBR,
31906 reg: regInfo{
31907 inputs: []inputInfo{
31908 {0, 1073733630},
31909 {1, 1073733630},
31910 },
31911 },
31912 },
31913 {
31914 name: "FMOVDload",
31915 auxType: auxSymOff,
31916 argLen: 2,
31917 faultOnNilArg0: true,
31918 symEffect: SymRead,
31919 asm: ppc64.AFMOVD,
31920 reg: regInfo{
31921 inputs: []inputInfo{
31922 {0, 1073733630},
31923 },
31924 outputs: []outputInfo{
31925 {0, 9223372032559808512},
31926 },
31927 },
31928 },
31929 {
31930 name: "FMOVSload",
31931 auxType: auxSymOff,
31932 argLen: 2,
31933 faultOnNilArg0: true,
31934 symEffect: SymRead,
31935 asm: ppc64.AFMOVS,
31936 reg: regInfo{
31937 inputs: []inputInfo{
31938 {0, 1073733630},
31939 },
31940 outputs: []outputInfo{
31941 {0, 9223372032559808512},
31942 },
31943 },
31944 },
31945 {
31946 name: "MOVBstore",
31947 auxType: auxSymOff,
31948 argLen: 3,
31949 faultOnNilArg0: true,
31950 symEffect: SymWrite,
31951 asm: ppc64.AMOVB,
31952 reg: regInfo{
31953 inputs: []inputInfo{
31954 {0, 1073733630},
31955 {1, 1073733630},
31956 },
31957 },
31958 },
31959 {
31960 name: "MOVHstore",
31961 auxType: auxSymOff,
31962 argLen: 3,
31963 faultOnNilArg0: true,
31964 symEffect: SymWrite,
31965 asm: ppc64.AMOVH,
31966 reg: regInfo{
31967 inputs: []inputInfo{
31968 {0, 1073733630},
31969 {1, 1073733630},
31970 },
31971 },
31972 },
31973 {
31974 name: "MOVWstore",
31975 auxType: auxSymOff,
31976 argLen: 3,
31977 faultOnNilArg0: true,
31978 symEffect: SymWrite,
31979 asm: ppc64.AMOVW,
31980 reg: regInfo{
31981 inputs: []inputInfo{
31982 {0, 1073733630},
31983 {1, 1073733630},
31984 },
31985 },
31986 },
31987 {
31988 name: "MOVDstore",
31989 auxType: auxSymOff,
31990 argLen: 3,
31991 faultOnNilArg0: true,
31992 symEffect: SymWrite,
31993 asm: ppc64.AMOVD,
31994 reg: regInfo{
31995 inputs: []inputInfo{
31996 {0, 1073733630},
31997 {1, 1073733630},
31998 },
31999 },
32000 },
32001 {
32002 name: "FMOVDstore",
32003 auxType: auxSymOff,
32004 argLen: 3,
32005 faultOnNilArg0: true,
32006 symEffect: SymWrite,
32007 asm: ppc64.AFMOVD,
32008 reg: regInfo{
32009 inputs: []inputInfo{
32010 {0, 1073733630},
32011 {1, 9223372032559808512},
32012 },
32013 },
32014 },
32015 {
32016 name: "FMOVSstore",
32017 auxType: auxSymOff,
32018 argLen: 3,
32019 faultOnNilArg0: true,
32020 symEffect: SymWrite,
32021 asm: ppc64.AFMOVS,
32022 reg: regInfo{
32023 inputs: []inputInfo{
32024 {0, 1073733630},
32025 {1, 9223372032559808512},
32026 },
32027 },
32028 },
32029 {
32030 name: "MOVBstoreidx",
32031 argLen: 4,
32032 asm: ppc64.AMOVB,
32033 reg: regInfo{
32034 inputs: []inputInfo{
32035 {0, 1073733630},
32036 {1, 1073733630},
32037 {2, 1073733630},
32038 },
32039 },
32040 },
32041 {
32042 name: "MOVHstoreidx",
32043 argLen: 4,
32044 asm: ppc64.AMOVH,
32045 reg: regInfo{
32046 inputs: []inputInfo{
32047 {0, 1073733630},
32048 {1, 1073733630},
32049 {2, 1073733630},
32050 },
32051 },
32052 },
32053 {
32054 name: "MOVWstoreidx",
32055 argLen: 4,
32056 asm: ppc64.AMOVW,
32057 reg: regInfo{
32058 inputs: []inputInfo{
32059 {0, 1073733630},
32060 {1, 1073733630},
32061 {2, 1073733630},
32062 },
32063 },
32064 },
32065 {
32066 name: "MOVDstoreidx",
32067 argLen: 4,
32068 asm: ppc64.AMOVD,
32069 reg: regInfo{
32070 inputs: []inputInfo{
32071 {0, 1073733630},
32072 {1, 1073733630},
32073 {2, 1073733630},
32074 },
32075 },
32076 },
32077 {
32078 name: "FMOVDstoreidx",
32079 argLen: 4,
32080 asm: ppc64.AFMOVD,
32081 reg: regInfo{
32082 inputs: []inputInfo{
32083 {0, 1073733630},
32084 {1, 1073733630},
32085 {2, 9223372032559808512},
32086 },
32087 },
32088 },
32089 {
32090 name: "FMOVSstoreidx",
32091 argLen: 4,
32092 asm: ppc64.AFMOVS,
32093 reg: regInfo{
32094 inputs: []inputInfo{
32095 {0, 1073733630},
32096 {1, 1073733630},
32097 {2, 9223372032559808512},
32098 },
32099 },
32100 },
32101 {
32102 name: "MOVHBRstoreidx",
32103 argLen: 4,
32104 asm: ppc64.AMOVHBR,
32105 reg: regInfo{
32106 inputs: []inputInfo{
32107 {0, 1073733630},
32108 {1, 1073733630},
32109 {2, 1073733630},
32110 },
32111 },
32112 },
32113 {
32114 name: "MOVWBRstoreidx",
32115 argLen: 4,
32116 asm: ppc64.AMOVWBR,
32117 reg: regInfo{
32118 inputs: []inputInfo{
32119 {0, 1073733630},
32120 {1, 1073733630},
32121 {2, 1073733630},
32122 },
32123 },
32124 },
32125 {
32126 name: "MOVDBRstoreidx",
32127 argLen: 4,
32128 asm: ppc64.AMOVDBR,
32129 reg: regInfo{
32130 inputs: []inputInfo{
32131 {0, 1073733630},
32132 {1, 1073733630},
32133 {2, 1073733630},
32134 },
32135 },
32136 },
32137 {
32138 name: "MOVBstorezero",
32139 auxType: auxSymOff,
32140 argLen: 2,
32141 faultOnNilArg0: true,
32142 symEffect: SymWrite,
32143 asm: ppc64.AMOVB,
32144 reg: regInfo{
32145 inputs: []inputInfo{
32146 {0, 1073733630},
32147 },
32148 },
32149 },
32150 {
32151 name: "MOVHstorezero",
32152 auxType: auxSymOff,
32153 argLen: 2,
32154 faultOnNilArg0: true,
32155 symEffect: SymWrite,
32156 asm: ppc64.AMOVH,
32157 reg: regInfo{
32158 inputs: []inputInfo{
32159 {0, 1073733630},
32160 },
32161 },
32162 },
32163 {
32164 name: "MOVWstorezero",
32165 auxType: auxSymOff,
32166 argLen: 2,
32167 faultOnNilArg0: true,
32168 symEffect: SymWrite,
32169 asm: ppc64.AMOVW,
32170 reg: regInfo{
32171 inputs: []inputInfo{
32172 {0, 1073733630},
32173 },
32174 },
32175 },
32176 {
32177 name: "MOVDstorezero",
32178 auxType: auxSymOff,
32179 argLen: 2,
32180 faultOnNilArg0: true,
32181 symEffect: SymWrite,
32182 asm: ppc64.AMOVD,
32183 reg: regInfo{
32184 inputs: []inputInfo{
32185 {0, 1073733630},
32186 },
32187 },
32188 },
32189 {
32190 name: "MOVDaddr",
32191 auxType: auxSymOff,
32192 argLen: 1,
32193 rematerializeable: true,
32194 symEffect: SymAddr,
32195 asm: ppc64.AMOVD,
32196 reg: regInfo{
32197 inputs: []inputInfo{
32198 {0, 1073733630},
32199 },
32200 outputs: []outputInfo{
32201 {0, 1073733624},
32202 },
32203 },
32204 },
32205 {
32206 name: "MOVDconst",
32207 auxType: auxInt64,
32208 argLen: 0,
32209 rematerializeable: true,
32210 asm: ppc64.AMOVD,
32211 reg: regInfo{
32212 outputs: []outputInfo{
32213 {0, 1073733624},
32214 },
32215 },
32216 },
32217 {
32218 name: "FMOVDconst",
32219 auxType: auxFloat64,
32220 argLen: 0,
32221 rematerializeable: true,
32222 asm: ppc64.AFMOVD,
32223 reg: regInfo{
32224 outputs: []outputInfo{
32225 {0, 9223372032559808512},
32226 },
32227 },
32228 },
32229 {
32230 name: "FMOVSconst",
32231 auxType: auxFloat32,
32232 argLen: 0,
32233 rematerializeable: true,
32234 asm: ppc64.AFMOVS,
32235 reg: regInfo{
32236 outputs: []outputInfo{
32237 {0, 9223372032559808512},
32238 },
32239 },
32240 },
32241 {
32242 name: "FCMPU",
32243 argLen: 2,
32244 asm: ppc64.AFCMPU,
32245 reg: regInfo{
32246 inputs: []inputInfo{
32247 {0, 9223372032559808512},
32248 {1, 9223372032559808512},
32249 },
32250 },
32251 },
32252 {
32253 name: "CMP",
32254 argLen: 2,
32255 asm: ppc64.ACMP,
32256 reg: regInfo{
32257 inputs: []inputInfo{
32258 {0, 1073733630},
32259 {1, 1073733630},
32260 },
32261 },
32262 },
32263 {
32264 name: "CMPU",
32265 argLen: 2,
32266 asm: ppc64.ACMPU,
32267 reg: regInfo{
32268 inputs: []inputInfo{
32269 {0, 1073733630},
32270 {1, 1073733630},
32271 },
32272 },
32273 },
32274 {
32275 name: "CMPW",
32276 argLen: 2,
32277 asm: ppc64.ACMPW,
32278 reg: regInfo{
32279 inputs: []inputInfo{
32280 {0, 1073733630},
32281 {1, 1073733630},
32282 },
32283 },
32284 },
32285 {
32286 name: "CMPWU",
32287 argLen: 2,
32288 asm: ppc64.ACMPWU,
32289 reg: regInfo{
32290 inputs: []inputInfo{
32291 {0, 1073733630},
32292 {1, 1073733630},
32293 },
32294 },
32295 },
32296 {
32297 name: "CMPconst",
32298 auxType: auxInt64,
32299 argLen: 1,
32300 asm: ppc64.ACMP,
32301 reg: regInfo{
32302 inputs: []inputInfo{
32303 {0, 1073733630},
32304 },
32305 },
32306 },
32307 {
32308 name: "CMPUconst",
32309 auxType: auxInt64,
32310 argLen: 1,
32311 asm: ppc64.ACMPU,
32312 reg: regInfo{
32313 inputs: []inputInfo{
32314 {0, 1073733630},
32315 },
32316 },
32317 },
32318 {
32319 name: "CMPWconst",
32320 auxType: auxInt32,
32321 argLen: 1,
32322 asm: ppc64.ACMPW,
32323 reg: regInfo{
32324 inputs: []inputInfo{
32325 {0, 1073733630},
32326 },
32327 },
32328 },
32329 {
32330 name: "CMPWUconst",
32331 auxType: auxInt32,
32332 argLen: 1,
32333 asm: ppc64.ACMPWU,
32334 reg: regInfo{
32335 inputs: []inputInfo{
32336 {0, 1073733630},
32337 },
32338 },
32339 },
32340 {
32341 name: "ISEL",
32342 auxType: auxInt32,
32343 argLen: 3,
32344 asm: ppc64.AISEL,
32345 reg: regInfo{
32346 inputs: []inputInfo{
32347 {0, 1073733624},
32348 {1, 1073733624},
32349 },
32350 outputs: []outputInfo{
32351 {0, 1073733624},
32352 },
32353 },
32354 },
32355 {
32356 name: "ISELZ",
32357 auxType: auxInt32,
32358 argLen: 2,
32359 asm: ppc64.AISEL,
32360 reg: regInfo{
32361 inputs: []inputInfo{
32362 {0, 1073733624},
32363 },
32364 outputs: []outputInfo{
32365 {0, 1073733624},
32366 },
32367 },
32368 },
32369 {
32370 name: "SETBC",
32371 auxType: auxInt32,
32372 argLen: 1,
32373 asm: ppc64.ASETBC,
32374 reg: regInfo{
32375 outputs: []outputInfo{
32376 {0, 1073733624},
32377 },
32378 },
32379 },
32380 {
32381 name: "SETBCR",
32382 auxType: auxInt32,
32383 argLen: 1,
32384 asm: ppc64.ASETBCR,
32385 reg: regInfo{
32386 outputs: []outputInfo{
32387 {0, 1073733624},
32388 },
32389 },
32390 },
32391 {
32392 name: "Equal",
32393 argLen: 1,
32394 reg: regInfo{
32395 outputs: []outputInfo{
32396 {0, 1073733624},
32397 },
32398 },
32399 },
32400 {
32401 name: "NotEqual",
32402 argLen: 1,
32403 reg: regInfo{
32404 outputs: []outputInfo{
32405 {0, 1073733624},
32406 },
32407 },
32408 },
32409 {
32410 name: "LessThan",
32411 argLen: 1,
32412 reg: regInfo{
32413 outputs: []outputInfo{
32414 {0, 1073733624},
32415 },
32416 },
32417 },
32418 {
32419 name: "FLessThan",
32420 argLen: 1,
32421 reg: regInfo{
32422 outputs: []outputInfo{
32423 {0, 1073733624},
32424 },
32425 },
32426 },
32427 {
32428 name: "LessEqual",
32429 argLen: 1,
32430 reg: regInfo{
32431 outputs: []outputInfo{
32432 {0, 1073733624},
32433 },
32434 },
32435 },
32436 {
32437 name: "FLessEqual",
32438 argLen: 1,
32439 reg: regInfo{
32440 outputs: []outputInfo{
32441 {0, 1073733624},
32442 },
32443 },
32444 },
32445 {
32446 name: "GreaterThan",
32447 argLen: 1,
32448 reg: regInfo{
32449 outputs: []outputInfo{
32450 {0, 1073733624},
32451 },
32452 },
32453 },
32454 {
32455 name: "FGreaterThan",
32456 argLen: 1,
32457 reg: regInfo{
32458 outputs: []outputInfo{
32459 {0, 1073733624},
32460 },
32461 },
32462 },
32463 {
32464 name: "GreaterEqual",
32465 argLen: 1,
32466 reg: regInfo{
32467 outputs: []outputInfo{
32468 {0, 1073733624},
32469 },
32470 },
32471 },
32472 {
32473 name: "FGreaterEqual",
32474 argLen: 1,
32475 reg: regInfo{
32476 outputs: []outputInfo{
32477 {0, 1073733624},
32478 },
32479 },
32480 },
32481 {
32482 name: "LoweredGetClosurePtr",
32483 argLen: 0,
32484 zeroWidth: true,
32485 reg: regInfo{
32486 outputs: []outputInfo{
32487 {0, 2048},
32488 },
32489 },
32490 },
32491 {
32492 name: "LoweredGetCallerSP",
32493 argLen: 1,
32494 rematerializeable: true,
32495 reg: regInfo{
32496 outputs: []outputInfo{
32497 {0, 1073733624},
32498 },
32499 },
32500 },
32501 {
32502 name: "LoweredGetCallerPC",
32503 argLen: 0,
32504 rematerializeable: true,
32505 reg: regInfo{
32506 outputs: []outputInfo{
32507 {0, 1073733624},
32508 },
32509 },
32510 },
32511 {
32512 name: "LoweredNilCheck",
32513 argLen: 2,
32514 clobberFlags: true,
32515 nilCheck: true,
32516 faultOnNilArg0: true,
32517 reg: regInfo{
32518 inputs: []inputInfo{
32519 {0, 1073733630},
32520 },
32521 clobbers: 2147483648,
32522 },
32523 },
32524 {
32525 name: "LoweredRound32F",
32526 argLen: 1,
32527 resultInArg0: true,
32528 zeroWidth: true,
32529 reg: regInfo{
32530 inputs: []inputInfo{
32531 {0, 9223372032559808512},
32532 },
32533 outputs: []outputInfo{
32534 {0, 9223372032559808512},
32535 },
32536 },
32537 },
32538 {
32539 name: "LoweredRound64F",
32540 argLen: 1,
32541 resultInArg0: true,
32542 zeroWidth: true,
32543 reg: regInfo{
32544 inputs: []inputInfo{
32545 {0, 9223372032559808512},
32546 },
32547 outputs: []outputInfo{
32548 {0, 9223372032559808512},
32549 },
32550 },
32551 },
32552 {
32553 name: "CALLstatic",
32554 auxType: auxCallOff,
32555 argLen: -1,
32556 clobberFlags: true,
32557 call: true,
32558 reg: regInfo{
32559 clobbers: 18446744071562059768,
32560 },
32561 },
32562 {
32563 name: "CALLtail",
32564 auxType: auxCallOff,
32565 argLen: -1,
32566 clobberFlags: true,
32567 call: true,
32568 tailCall: true,
32569 reg: regInfo{
32570 clobbers: 18446744071562059768,
32571 },
32572 },
32573 {
32574 name: "CALLclosure",
32575 auxType: auxCallOff,
32576 argLen: -1,
32577 clobberFlags: true,
32578 call: true,
32579 reg: regInfo{
32580 inputs: []inputInfo{
32581 {0, 4096},
32582 {1, 2048},
32583 },
32584 clobbers: 18446744071562059768,
32585 },
32586 },
32587 {
32588 name: "CALLinter",
32589 auxType: auxCallOff,
32590 argLen: -1,
32591 clobberFlags: true,
32592 call: true,
32593 reg: regInfo{
32594 inputs: []inputInfo{
32595 {0, 4096},
32596 },
32597 clobbers: 18446744071562059768,
32598 },
32599 },
32600 {
32601 name: "LoweredZero",
32602 auxType: auxInt64,
32603 argLen: 2,
32604 clobberFlags: true,
32605 faultOnNilArg0: true,
32606 unsafePoint: true,
32607 reg: regInfo{
32608 inputs: []inputInfo{
32609 {0, 1048576},
32610 },
32611 clobbers: 1048576,
32612 },
32613 },
32614 {
32615 name: "LoweredZeroShort",
32616 auxType: auxInt64,
32617 argLen: 2,
32618 faultOnNilArg0: true,
32619 unsafePoint: true,
32620 reg: regInfo{
32621 inputs: []inputInfo{
32622 {0, 1073733624},
32623 },
32624 },
32625 },
32626 {
32627 name: "LoweredQuadZeroShort",
32628 auxType: auxInt64,
32629 argLen: 2,
32630 faultOnNilArg0: true,
32631 unsafePoint: true,
32632 reg: regInfo{
32633 inputs: []inputInfo{
32634 {0, 1073733624},
32635 },
32636 },
32637 },
32638 {
32639 name: "LoweredQuadZero",
32640 auxType: auxInt64,
32641 argLen: 2,
32642 clobberFlags: true,
32643 faultOnNilArg0: true,
32644 unsafePoint: true,
32645 reg: regInfo{
32646 inputs: []inputInfo{
32647 {0, 1048576},
32648 },
32649 clobbers: 1048576,
32650 },
32651 },
32652 {
32653 name: "LoweredMove",
32654 auxType: auxInt64,
32655 argLen: 3,
32656 clobberFlags: true,
32657 faultOnNilArg0: true,
32658 faultOnNilArg1: true,
32659 unsafePoint: true,
32660 reg: regInfo{
32661 inputs: []inputInfo{
32662 {0, 1048576},
32663 {1, 2097152},
32664 },
32665 clobbers: 3145728,
32666 },
32667 },
32668 {
32669 name: "LoweredMoveShort",
32670 auxType: auxInt64,
32671 argLen: 3,
32672 faultOnNilArg0: true,
32673 faultOnNilArg1: true,
32674 unsafePoint: true,
32675 reg: regInfo{
32676 inputs: []inputInfo{
32677 {0, 1073733624},
32678 {1, 1073733624},
32679 },
32680 },
32681 },
32682 {
32683 name: "LoweredQuadMove",
32684 auxType: auxInt64,
32685 argLen: 3,
32686 clobberFlags: true,
32687 faultOnNilArg0: true,
32688 faultOnNilArg1: true,
32689 unsafePoint: true,
32690 reg: regInfo{
32691 inputs: []inputInfo{
32692 {0, 1048576},
32693 {1, 2097152},
32694 },
32695 clobbers: 3145728,
32696 },
32697 },
32698 {
32699 name: "LoweredQuadMoveShort",
32700 auxType: auxInt64,
32701 argLen: 3,
32702 faultOnNilArg0: true,
32703 faultOnNilArg1: true,
32704 unsafePoint: true,
32705 reg: regInfo{
32706 inputs: []inputInfo{
32707 {0, 1073733624},
32708 {1, 1073733624},
32709 },
32710 },
32711 },
32712 {
32713 name: "LoweredAtomicStore8",
32714 auxType: auxInt64,
32715 argLen: 3,
32716 faultOnNilArg0: true,
32717 hasSideEffects: true,
32718 reg: regInfo{
32719 inputs: []inputInfo{
32720 {0, 1073733630},
32721 {1, 1073733630},
32722 },
32723 },
32724 },
32725 {
32726 name: "LoweredAtomicStore32",
32727 auxType: auxInt64,
32728 argLen: 3,
32729 faultOnNilArg0: true,
32730 hasSideEffects: true,
32731 reg: regInfo{
32732 inputs: []inputInfo{
32733 {0, 1073733630},
32734 {1, 1073733630},
32735 },
32736 },
32737 },
32738 {
32739 name: "LoweredAtomicStore64",
32740 auxType: auxInt64,
32741 argLen: 3,
32742 faultOnNilArg0: true,
32743 hasSideEffects: true,
32744 reg: regInfo{
32745 inputs: []inputInfo{
32746 {0, 1073733630},
32747 {1, 1073733630},
32748 },
32749 },
32750 },
32751 {
32752 name: "LoweredAtomicLoad8",
32753 auxType: auxInt64,
32754 argLen: 2,
32755 clobberFlags: true,
32756 faultOnNilArg0: true,
32757 reg: regInfo{
32758 inputs: []inputInfo{
32759 {0, 1073733630},
32760 },
32761 outputs: []outputInfo{
32762 {0, 1073733624},
32763 },
32764 },
32765 },
32766 {
32767 name: "LoweredAtomicLoad32",
32768 auxType: auxInt64,
32769 argLen: 2,
32770 clobberFlags: true,
32771 faultOnNilArg0: true,
32772 reg: regInfo{
32773 inputs: []inputInfo{
32774 {0, 1073733630},
32775 },
32776 outputs: []outputInfo{
32777 {0, 1073733624},
32778 },
32779 },
32780 },
32781 {
32782 name: "LoweredAtomicLoad64",
32783 auxType: auxInt64,
32784 argLen: 2,
32785 clobberFlags: true,
32786 faultOnNilArg0: true,
32787 reg: regInfo{
32788 inputs: []inputInfo{
32789 {0, 1073733630},
32790 },
32791 outputs: []outputInfo{
32792 {0, 1073733624},
32793 },
32794 },
32795 },
32796 {
32797 name: "LoweredAtomicLoadPtr",
32798 auxType: auxInt64,
32799 argLen: 2,
32800 clobberFlags: true,
32801 faultOnNilArg0: true,
32802 reg: regInfo{
32803 inputs: []inputInfo{
32804 {0, 1073733630},
32805 },
32806 outputs: []outputInfo{
32807 {0, 1073733624},
32808 },
32809 },
32810 },
32811 {
32812 name: "LoweredAtomicAdd32",
32813 argLen: 3,
32814 resultNotInArgs: true,
32815 clobberFlags: true,
32816 faultOnNilArg0: true,
32817 hasSideEffects: true,
32818 reg: regInfo{
32819 inputs: []inputInfo{
32820 {1, 1073733624},
32821 {0, 1073733630},
32822 },
32823 outputs: []outputInfo{
32824 {0, 1073733624},
32825 },
32826 },
32827 },
32828 {
32829 name: "LoweredAtomicAdd64",
32830 argLen: 3,
32831 resultNotInArgs: true,
32832 clobberFlags: true,
32833 faultOnNilArg0: true,
32834 hasSideEffects: true,
32835 reg: regInfo{
32836 inputs: []inputInfo{
32837 {1, 1073733624},
32838 {0, 1073733630},
32839 },
32840 outputs: []outputInfo{
32841 {0, 1073733624},
32842 },
32843 },
32844 },
32845 {
32846 name: "LoweredAtomicExchange8",
32847 argLen: 3,
32848 resultNotInArgs: true,
32849 clobberFlags: true,
32850 faultOnNilArg0: true,
32851 hasSideEffects: true,
32852 reg: regInfo{
32853 inputs: []inputInfo{
32854 {1, 1073733624},
32855 {0, 1073733630},
32856 },
32857 outputs: []outputInfo{
32858 {0, 1073733624},
32859 },
32860 },
32861 },
32862 {
32863 name: "LoweredAtomicExchange32",
32864 argLen: 3,
32865 resultNotInArgs: true,
32866 clobberFlags: true,
32867 faultOnNilArg0: true,
32868 hasSideEffects: true,
32869 reg: regInfo{
32870 inputs: []inputInfo{
32871 {1, 1073733624},
32872 {0, 1073733630},
32873 },
32874 outputs: []outputInfo{
32875 {0, 1073733624},
32876 },
32877 },
32878 },
32879 {
32880 name: "LoweredAtomicExchange64",
32881 argLen: 3,
32882 resultNotInArgs: true,
32883 clobberFlags: true,
32884 faultOnNilArg0: true,
32885 hasSideEffects: true,
32886 reg: regInfo{
32887 inputs: []inputInfo{
32888 {1, 1073733624},
32889 {0, 1073733630},
32890 },
32891 outputs: []outputInfo{
32892 {0, 1073733624},
32893 },
32894 },
32895 },
32896 {
32897 name: "LoweredAtomicCas64",
32898 auxType: auxInt64,
32899 argLen: 4,
32900 resultNotInArgs: true,
32901 clobberFlags: true,
32902 faultOnNilArg0: true,
32903 hasSideEffects: true,
32904 reg: regInfo{
32905 inputs: []inputInfo{
32906 {1, 1073733624},
32907 {2, 1073733624},
32908 {0, 1073733630},
32909 },
32910 outputs: []outputInfo{
32911 {0, 1073733624},
32912 },
32913 },
32914 },
32915 {
32916 name: "LoweredAtomicCas32",
32917 auxType: auxInt64,
32918 argLen: 4,
32919 resultNotInArgs: true,
32920 clobberFlags: true,
32921 faultOnNilArg0: true,
32922 hasSideEffects: true,
32923 reg: regInfo{
32924 inputs: []inputInfo{
32925 {1, 1073733624},
32926 {2, 1073733624},
32927 {0, 1073733630},
32928 },
32929 outputs: []outputInfo{
32930 {0, 1073733624},
32931 },
32932 },
32933 },
32934 {
32935 name: "LoweredAtomicAnd8",
32936 argLen: 3,
32937 faultOnNilArg0: true,
32938 hasSideEffects: true,
32939 asm: ppc64.AAND,
32940 reg: regInfo{
32941 inputs: []inputInfo{
32942 {0, 1073733630},
32943 {1, 1073733630},
32944 },
32945 },
32946 },
32947 {
32948 name: "LoweredAtomicAnd32",
32949 argLen: 3,
32950 faultOnNilArg0: true,
32951 hasSideEffects: true,
32952 asm: ppc64.AAND,
32953 reg: regInfo{
32954 inputs: []inputInfo{
32955 {0, 1073733630},
32956 {1, 1073733630},
32957 },
32958 },
32959 },
32960 {
32961 name: "LoweredAtomicOr8",
32962 argLen: 3,
32963 faultOnNilArg0: true,
32964 hasSideEffects: true,
32965 asm: ppc64.AOR,
32966 reg: regInfo{
32967 inputs: []inputInfo{
32968 {0, 1073733630},
32969 {1, 1073733630},
32970 },
32971 },
32972 },
32973 {
32974 name: "LoweredAtomicOr32",
32975 argLen: 3,
32976 faultOnNilArg0: true,
32977 hasSideEffects: true,
32978 asm: ppc64.AOR,
32979 reg: regInfo{
32980 inputs: []inputInfo{
32981 {0, 1073733630},
32982 {1, 1073733630},
32983 },
32984 },
32985 },
32986 {
32987 name: "LoweredWB",
32988 auxType: auxInt64,
32989 argLen: 1,
32990 clobberFlags: true,
32991 reg: regInfo{
32992 clobbers: 18446744072632408064,
32993 outputs: []outputInfo{
32994 {0, 536870912},
32995 },
32996 },
32997 },
32998 {
32999 name: "LoweredPubBarrier",
33000 argLen: 1,
33001 hasSideEffects: true,
33002 asm: ppc64.ALWSYNC,
33003 reg: regInfo{},
33004 },
33005 {
33006 name: "LoweredPanicBoundsA",
33007 auxType: auxInt64,
33008 argLen: 3,
33009 call: true,
33010 reg: regInfo{
33011 inputs: []inputInfo{
33012 {0, 32},
33013 {1, 64},
33014 },
33015 },
33016 },
33017 {
33018 name: "LoweredPanicBoundsB",
33019 auxType: auxInt64,
33020 argLen: 3,
33021 call: true,
33022 reg: regInfo{
33023 inputs: []inputInfo{
33024 {0, 16},
33025 {1, 32},
33026 },
33027 },
33028 },
33029 {
33030 name: "LoweredPanicBoundsC",
33031 auxType: auxInt64,
33032 argLen: 3,
33033 call: true,
33034 reg: regInfo{
33035 inputs: []inputInfo{
33036 {0, 8},
33037 {1, 16},
33038 },
33039 },
33040 },
33041 {
33042 name: "InvertFlags",
33043 argLen: 1,
33044 reg: regInfo{},
33045 },
33046 {
33047 name: "FlagEQ",
33048 argLen: 0,
33049 reg: regInfo{},
33050 },
33051 {
33052 name: "FlagLT",
33053 argLen: 0,
33054 reg: regInfo{},
33055 },
33056 {
33057 name: "FlagGT",
33058 argLen: 0,
33059 reg: regInfo{},
33060 },
33061
33062 {
33063 name: "ADD",
33064 argLen: 2,
33065 commutative: true,
33066 asm: riscv.AADD,
33067 reg: regInfo{
33068 inputs: []inputInfo{
33069 {0, 1006632944},
33070 {1, 1006632944},
33071 },
33072 outputs: []outputInfo{
33073 {0, 1006632944},
33074 },
33075 },
33076 },
33077 {
33078 name: "ADDI",
33079 auxType: auxInt64,
33080 argLen: 1,
33081 asm: riscv.AADDI,
33082 reg: regInfo{
33083 inputs: []inputInfo{
33084 {0, 9223372037861408754},
33085 },
33086 outputs: []outputInfo{
33087 {0, 1006632944},
33088 },
33089 },
33090 },
33091 {
33092 name: "ADDIW",
33093 auxType: auxInt64,
33094 argLen: 1,
33095 asm: riscv.AADDIW,
33096 reg: regInfo{
33097 inputs: []inputInfo{
33098 {0, 1006632944},
33099 },
33100 outputs: []outputInfo{
33101 {0, 1006632944},
33102 },
33103 },
33104 },
33105 {
33106 name: "NEG",
33107 argLen: 1,
33108 asm: riscv.ANEG,
33109 reg: regInfo{
33110 inputs: []inputInfo{
33111 {0, 1006632944},
33112 },
33113 outputs: []outputInfo{
33114 {0, 1006632944},
33115 },
33116 },
33117 },
33118 {
33119 name: "NEGW",
33120 argLen: 1,
33121 asm: riscv.ANEGW,
33122 reg: regInfo{
33123 inputs: []inputInfo{
33124 {0, 1006632944},
33125 },
33126 outputs: []outputInfo{
33127 {0, 1006632944},
33128 },
33129 },
33130 },
33131 {
33132 name: "SUB",
33133 argLen: 2,
33134 asm: riscv.ASUB,
33135 reg: regInfo{
33136 inputs: []inputInfo{
33137 {0, 1006632944},
33138 {1, 1006632944},
33139 },
33140 outputs: []outputInfo{
33141 {0, 1006632944},
33142 },
33143 },
33144 },
33145 {
33146 name: "SUBW",
33147 argLen: 2,
33148 asm: riscv.ASUBW,
33149 reg: regInfo{
33150 inputs: []inputInfo{
33151 {0, 1006632944},
33152 {1, 1006632944},
33153 },
33154 outputs: []outputInfo{
33155 {0, 1006632944},
33156 },
33157 },
33158 },
33159 {
33160 name: "MUL",
33161 argLen: 2,
33162 commutative: true,
33163 asm: riscv.AMUL,
33164 reg: regInfo{
33165 inputs: []inputInfo{
33166 {0, 1006632944},
33167 {1, 1006632944},
33168 },
33169 outputs: []outputInfo{
33170 {0, 1006632944},
33171 },
33172 },
33173 },
33174 {
33175 name: "MULW",
33176 argLen: 2,
33177 commutative: true,
33178 asm: riscv.AMULW,
33179 reg: regInfo{
33180 inputs: []inputInfo{
33181 {0, 1006632944},
33182 {1, 1006632944},
33183 },
33184 outputs: []outputInfo{
33185 {0, 1006632944},
33186 },
33187 },
33188 },
33189 {
33190 name: "MULH",
33191 argLen: 2,
33192 commutative: true,
33193 asm: riscv.AMULH,
33194 reg: regInfo{
33195 inputs: []inputInfo{
33196 {0, 1006632944},
33197 {1, 1006632944},
33198 },
33199 outputs: []outputInfo{
33200 {0, 1006632944},
33201 },
33202 },
33203 },
33204 {
33205 name: "MULHU",
33206 argLen: 2,
33207 commutative: true,
33208 asm: riscv.AMULHU,
33209 reg: regInfo{
33210 inputs: []inputInfo{
33211 {0, 1006632944},
33212 {1, 1006632944},
33213 },
33214 outputs: []outputInfo{
33215 {0, 1006632944},
33216 },
33217 },
33218 },
33219 {
33220 name: "LoweredMuluhilo",
33221 argLen: 2,
33222 resultNotInArgs: true,
33223 reg: regInfo{
33224 inputs: []inputInfo{
33225 {0, 1006632944},
33226 {1, 1006632944},
33227 },
33228 outputs: []outputInfo{
33229 {0, 1006632944},
33230 {1, 1006632944},
33231 },
33232 },
33233 },
33234 {
33235 name: "LoweredMuluover",
33236 argLen: 2,
33237 resultNotInArgs: true,
33238 reg: regInfo{
33239 inputs: []inputInfo{
33240 {0, 1006632944},
33241 {1, 1006632944},
33242 },
33243 outputs: []outputInfo{
33244 {0, 1006632944},
33245 {1, 1006632944},
33246 },
33247 },
33248 },
33249 {
33250 name: "DIV",
33251 argLen: 2,
33252 asm: riscv.ADIV,
33253 reg: regInfo{
33254 inputs: []inputInfo{
33255 {0, 1006632944},
33256 {1, 1006632944},
33257 },
33258 outputs: []outputInfo{
33259 {0, 1006632944},
33260 },
33261 },
33262 },
33263 {
33264 name: "DIVU",
33265 argLen: 2,
33266 asm: riscv.ADIVU,
33267 reg: regInfo{
33268 inputs: []inputInfo{
33269 {0, 1006632944},
33270 {1, 1006632944},
33271 },
33272 outputs: []outputInfo{
33273 {0, 1006632944},
33274 },
33275 },
33276 },
33277 {
33278 name: "DIVW",
33279 argLen: 2,
33280 asm: riscv.ADIVW,
33281 reg: regInfo{
33282 inputs: []inputInfo{
33283 {0, 1006632944},
33284 {1, 1006632944},
33285 },
33286 outputs: []outputInfo{
33287 {0, 1006632944},
33288 },
33289 },
33290 },
33291 {
33292 name: "DIVUW",
33293 argLen: 2,
33294 asm: riscv.ADIVUW,
33295 reg: regInfo{
33296 inputs: []inputInfo{
33297 {0, 1006632944},
33298 {1, 1006632944},
33299 },
33300 outputs: []outputInfo{
33301 {0, 1006632944},
33302 },
33303 },
33304 },
33305 {
33306 name: "REM",
33307 argLen: 2,
33308 asm: riscv.AREM,
33309 reg: regInfo{
33310 inputs: []inputInfo{
33311 {0, 1006632944},
33312 {1, 1006632944},
33313 },
33314 outputs: []outputInfo{
33315 {0, 1006632944},
33316 },
33317 },
33318 },
33319 {
33320 name: "REMU",
33321 argLen: 2,
33322 asm: riscv.AREMU,
33323 reg: regInfo{
33324 inputs: []inputInfo{
33325 {0, 1006632944},
33326 {1, 1006632944},
33327 },
33328 outputs: []outputInfo{
33329 {0, 1006632944},
33330 },
33331 },
33332 },
33333 {
33334 name: "REMW",
33335 argLen: 2,
33336 asm: riscv.AREMW,
33337 reg: regInfo{
33338 inputs: []inputInfo{
33339 {0, 1006632944},
33340 {1, 1006632944},
33341 },
33342 outputs: []outputInfo{
33343 {0, 1006632944},
33344 },
33345 },
33346 },
33347 {
33348 name: "REMUW",
33349 argLen: 2,
33350 asm: riscv.AREMUW,
33351 reg: regInfo{
33352 inputs: []inputInfo{
33353 {0, 1006632944},
33354 {1, 1006632944},
33355 },
33356 outputs: []outputInfo{
33357 {0, 1006632944},
33358 },
33359 },
33360 },
33361 {
33362 name: "MOVaddr",
33363 auxType: auxSymOff,
33364 argLen: 1,
33365 rematerializeable: true,
33366 symEffect: SymAddr,
33367 asm: riscv.AMOV,
33368 reg: regInfo{
33369 inputs: []inputInfo{
33370 {0, 9223372037861408754},
33371 },
33372 outputs: []outputInfo{
33373 {0, 1006632944},
33374 },
33375 },
33376 },
33377 {
33378 name: "MOVDconst",
33379 auxType: auxInt64,
33380 argLen: 0,
33381 rematerializeable: true,
33382 asm: riscv.AMOV,
33383 reg: regInfo{
33384 outputs: []outputInfo{
33385 {0, 1006632944},
33386 },
33387 },
33388 },
33389 {
33390 name: "MOVBload",
33391 auxType: auxSymOff,
33392 argLen: 2,
33393 faultOnNilArg0: true,
33394 symEffect: SymRead,
33395 asm: riscv.AMOVB,
33396 reg: regInfo{
33397 inputs: []inputInfo{
33398 {0, 9223372037861408754},
33399 },
33400 outputs: []outputInfo{
33401 {0, 1006632944},
33402 },
33403 },
33404 },
33405 {
33406 name: "MOVHload",
33407 auxType: auxSymOff,
33408 argLen: 2,
33409 faultOnNilArg0: true,
33410 symEffect: SymRead,
33411 asm: riscv.AMOVH,
33412 reg: regInfo{
33413 inputs: []inputInfo{
33414 {0, 9223372037861408754},
33415 },
33416 outputs: []outputInfo{
33417 {0, 1006632944},
33418 },
33419 },
33420 },
33421 {
33422 name: "MOVWload",
33423 auxType: auxSymOff,
33424 argLen: 2,
33425 faultOnNilArg0: true,
33426 symEffect: SymRead,
33427 asm: riscv.AMOVW,
33428 reg: regInfo{
33429 inputs: []inputInfo{
33430 {0, 9223372037861408754},
33431 },
33432 outputs: []outputInfo{
33433 {0, 1006632944},
33434 },
33435 },
33436 },
33437 {
33438 name: "MOVDload",
33439 auxType: auxSymOff,
33440 argLen: 2,
33441 faultOnNilArg0: true,
33442 symEffect: SymRead,
33443 asm: riscv.AMOV,
33444 reg: regInfo{
33445 inputs: []inputInfo{
33446 {0, 9223372037861408754},
33447 },
33448 outputs: []outputInfo{
33449 {0, 1006632944},
33450 },
33451 },
33452 },
33453 {
33454 name: "MOVBUload",
33455 auxType: auxSymOff,
33456 argLen: 2,
33457 faultOnNilArg0: true,
33458 symEffect: SymRead,
33459 asm: riscv.AMOVBU,
33460 reg: regInfo{
33461 inputs: []inputInfo{
33462 {0, 9223372037861408754},
33463 },
33464 outputs: []outputInfo{
33465 {0, 1006632944},
33466 },
33467 },
33468 },
33469 {
33470 name: "MOVHUload",
33471 auxType: auxSymOff,
33472 argLen: 2,
33473 faultOnNilArg0: true,
33474 symEffect: SymRead,
33475 asm: riscv.AMOVHU,
33476 reg: regInfo{
33477 inputs: []inputInfo{
33478 {0, 9223372037861408754},
33479 },
33480 outputs: []outputInfo{
33481 {0, 1006632944},
33482 },
33483 },
33484 },
33485 {
33486 name: "MOVWUload",
33487 auxType: auxSymOff,
33488 argLen: 2,
33489 faultOnNilArg0: true,
33490 symEffect: SymRead,
33491 asm: riscv.AMOVWU,
33492 reg: regInfo{
33493 inputs: []inputInfo{
33494 {0, 9223372037861408754},
33495 },
33496 outputs: []outputInfo{
33497 {0, 1006632944},
33498 },
33499 },
33500 },
33501 {
33502 name: "MOVBstore",
33503 auxType: auxSymOff,
33504 argLen: 3,
33505 faultOnNilArg0: true,
33506 symEffect: SymWrite,
33507 asm: riscv.AMOVB,
33508 reg: regInfo{
33509 inputs: []inputInfo{
33510 {1, 1006632946},
33511 {0, 9223372037861408754},
33512 },
33513 },
33514 },
33515 {
33516 name: "MOVHstore",
33517 auxType: auxSymOff,
33518 argLen: 3,
33519 faultOnNilArg0: true,
33520 symEffect: SymWrite,
33521 asm: riscv.AMOVH,
33522 reg: regInfo{
33523 inputs: []inputInfo{
33524 {1, 1006632946},
33525 {0, 9223372037861408754},
33526 },
33527 },
33528 },
33529 {
33530 name: "MOVWstore",
33531 auxType: auxSymOff,
33532 argLen: 3,
33533 faultOnNilArg0: true,
33534 symEffect: SymWrite,
33535 asm: riscv.AMOVW,
33536 reg: regInfo{
33537 inputs: []inputInfo{
33538 {1, 1006632946},
33539 {0, 9223372037861408754},
33540 },
33541 },
33542 },
33543 {
33544 name: "MOVDstore",
33545 auxType: auxSymOff,
33546 argLen: 3,
33547 faultOnNilArg0: true,
33548 symEffect: SymWrite,
33549 asm: riscv.AMOV,
33550 reg: regInfo{
33551 inputs: []inputInfo{
33552 {1, 1006632946},
33553 {0, 9223372037861408754},
33554 },
33555 },
33556 },
33557 {
33558 name: "MOVBstorezero",
33559 auxType: auxSymOff,
33560 argLen: 2,
33561 faultOnNilArg0: true,
33562 symEffect: SymWrite,
33563 asm: riscv.AMOVB,
33564 reg: regInfo{
33565 inputs: []inputInfo{
33566 {0, 9223372037861408754},
33567 },
33568 },
33569 },
33570 {
33571 name: "MOVHstorezero",
33572 auxType: auxSymOff,
33573 argLen: 2,
33574 faultOnNilArg0: true,
33575 symEffect: SymWrite,
33576 asm: riscv.AMOVH,
33577 reg: regInfo{
33578 inputs: []inputInfo{
33579 {0, 9223372037861408754},
33580 },
33581 },
33582 },
33583 {
33584 name: "MOVWstorezero",
33585 auxType: auxSymOff,
33586 argLen: 2,
33587 faultOnNilArg0: true,
33588 symEffect: SymWrite,
33589 asm: riscv.AMOVW,
33590 reg: regInfo{
33591 inputs: []inputInfo{
33592 {0, 9223372037861408754},
33593 },
33594 },
33595 },
33596 {
33597 name: "MOVDstorezero",
33598 auxType: auxSymOff,
33599 argLen: 2,
33600 faultOnNilArg0: true,
33601 symEffect: SymWrite,
33602 asm: riscv.AMOV,
33603 reg: regInfo{
33604 inputs: []inputInfo{
33605 {0, 9223372037861408754},
33606 },
33607 },
33608 },
33609 {
33610 name: "MOVBreg",
33611 argLen: 1,
33612 asm: riscv.AMOVB,
33613 reg: regInfo{
33614 inputs: []inputInfo{
33615 {0, 1006632944},
33616 },
33617 outputs: []outputInfo{
33618 {0, 1006632944},
33619 },
33620 },
33621 },
33622 {
33623 name: "MOVHreg",
33624 argLen: 1,
33625 asm: riscv.AMOVH,
33626 reg: regInfo{
33627 inputs: []inputInfo{
33628 {0, 1006632944},
33629 },
33630 outputs: []outputInfo{
33631 {0, 1006632944},
33632 },
33633 },
33634 },
33635 {
33636 name: "MOVWreg",
33637 argLen: 1,
33638 asm: riscv.AMOVW,
33639 reg: regInfo{
33640 inputs: []inputInfo{
33641 {0, 1006632944},
33642 },
33643 outputs: []outputInfo{
33644 {0, 1006632944},
33645 },
33646 },
33647 },
33648 {
33649 name: "MOVDreg",
33650 argLen: 1,
33651 asm: riscv.AMOV,
33652 reg: regInfo{
33653 inputs: []inputInfo{
33654 {0, 1006632944},
33655 },
33656 outputs: []outputInfo{
33657 {0, 1006632944},
33658 },
33659 },
33660 },
33661 {
33662 name: "MOVBUreg",
33663 argLen: 1,
33664 asm: riscv.AMOVBU,
33665 reg: regInfo{
33666 inputs: []inputInfo{
33667 {0, 1006632944},
33668 },
33669 outputs: []outputInfo{
33670 {0, 1006632944},
33671 },
33672 },
33673 },
33674 {
33675 name: "MOVHUreg",
33676 argLen: 1,
33677 asm: riscv.AMOVHU,
33678 reg: regInfo{
33679 inputs: []inputInfo{
33680 {0, 1006632944},
33681 },
33682 outputs: []outputInfo{
33683 {0, 1006632944},
33684 },
33685 },
33686 },
33687 {
33688 name: "MOVWUreg",
33689 argLen: 1,
33690 asm: riscv.AMOVWU,
33691 reg: regInfo{
33692 inputs: []inputInfo{
33693 {0, 1006632944},
33694 },
33695 outputs: []outputInfo{
33696 {0, 1006632944},
33697 },
33698 },
33699 },
33700 {
33701 name: "MOVDnop",
33702 argLen: 1,
33703 resultInArg0: true,
33704 reg: regInfo{
33705 inputs: []inputInfo{
33706 {0, 1006632944},
33707 },
33708 outputs: []outputInfo{
33709 {0, 1006632944},
33710 },
33711 },
33712 },
33713 {
33714 name: "SLL",
33715 argLen: 2,
33716 asm: riscv.ASLL,
33717 reg: regInfo{
33718 inputs: []inputInfo{
33719 {0, 1006632944},
33720 {1, 1006632944},
33721 },
33722 outputs: []outputInfo{
33723 {0, 1006632944},
33724 },
33725 },
33726 },
33727 {
33728 name: "SLLW",
33729 argLen: 2,
33730 asm: riscv.ASLLW,
33731 reg: regInfo{
33732 inputs: []inputInfo{
33733 {0, 1006632944},
33734 {1, 1006632944},
33735 },
33736 outputs: []outputInfo{
33737 {0, 1006632944},
33738 },
33739 },
33740 },
33741 {
33742 name: "SRA",
33743 argLen: 2,
33744 asm: riscv.ASRA,
33745 reg: regInfo{
33746 inputs: []inputInfo{
33747 {0, 1006632944},
33748 {1, 1006632944},
33749 },
33750 outputs: []outputInfo{
33751 {0, 1006632944},
33752 },
33753 },
33754 },
33755 {
33756 name: "SRAW",
33757 argLen: 2,
33758 asm: riscv.ASRAW,
33759 reg: regInfo{
33760 inputs: []inputInfo{
33761 {0, 1006632944},
33762 {1, 1006632944},
33763 },
33764 outputs: []outputInfo{
33765 {0, 1006632944},
33766 },
33767 },
33768 },
33769 {
33770 name: "SRL",
33771 argLen: 2,
33772 asm: riscv.ASRL,
33773 reg: regInfo{
33774 inputs: []inputInfo{
33775 {0, 1006632944},
33776 {1, 1006632944},
33777 },
33778 outputs: []outputInfo{
33779 {0, 1006632944},
33780 },
33781 },
33782 },
33783 {
33784 name: "SRLW",
33785 argLen: 2,
33786 asm: riscv.ASRLW,
33787 reg: regInfo{
33788 inputs: []inputInfo{
33789 {0, 1006632944},
33790 {1, 1006632944},
33791 },
33792 outputs: []outputInfo{
33793 {0, 1006632944},
33794 },
33795 },
33796 },
33797 {
33798 name: "SLLI",
33799 auxType: auxInt64,
33800 argLen: 1,
33801 asm: riscv.ASLLI,
33802 reg: regInfo{
33803 inputs: []inputInfo{
33804 {0, 1006632944},
33805 },
33806 outputs: []outputInfo{
33807 {0, 1006632944},
33808 },
33809 },
33810 },
33811 {
33812 name: "SLLIW",
33813 auxType: auxInt64,
33814 argLen: 1,
33815 asm: riscv.ASLLIW,
33816 reg: regInfo{
33817 inputs: []inputInfo{
33818 {0, 1006632944},
33819 },
33820 outputs: []outputInfo{
33821 {0, 1006632944},
33822 },
33823 },
33824 },
33825 {
33826 name: "SRAI",
33827 auxType: auxInt64,
33828 argLen: 1,
33829 asm: riscv.ASRAI,
33830 reg: regInfo{
33831 inputs: []inputInfo{
33832 {0, 1006632944},
33833 },
33834 outputs: []outputInfo{
33835 {0, 1006632944},
33836 },
33837 },
33838 },
33839 {
33840 name: "SRAIW",
33841 auxType: auxInt64,
33842 argLen: 1,
33843 asm: riscv.ASRAIW,
33844 reg: regInfo{
33845 inputs: []inputInfo{
33846 {0, 1006632944},
33847 },
33848 outputs: []outputInfo{
33849 {0, 1006632944},
33850 },
33851 },
33852 },
33853 {
33854 name: "SRLI",
33855 auxType: auxInt64,
33856 argLen: 1,
33857 asm: riscv.ASRLI,
33858 reg: regInfo{
33859 inputs: []inputInfo{
33860 {0, 1006632944},
33861 },
33862 outputs: []outputInfo{
33863 {0, 1006632944},
33864 },
33865 },
33866 },
33867 {
33868 name: "SRLIW",
33869 auxType: auxInt64,
33870 argLen: 1,
33871 asm: riscv.ASRLIW,
33872 reg: regInfo{
33873 inputs: []inputInfo{
33874 {0, 1006632944},
33875 },
33876 outputs: []outputInfo{
33877 {0, 1006632944},
33878 },
33879 },
33880 },
33881 {
33882 name: "SH1ADD",
33883 argLen: 2,
33884 asm: riscv.ASH1ADD,
33885 reg: regInfo{
33886 inputs: []inputInfo{
33887 {0, 1006632944},
33888 {1, 1006632944},
33889 },
33890 outputs: []outputInfo{
33891 {0, 1006632944},
33892 },
33893 },
33894 },
33895 {
33896 name: "SH2ADD",
33897 argLen: 2,
33898 asm: riscv.ASH2ADD,
33899 reg: regInfo{
33900 inputs: []inputInfo{
33901 {0, 1006632944},
33902 {1, 1006632944},
33903 },
33904 outputs: []outputInfo{
33905 {0, 1006632944},
33906 },
33907 },
33908 },
33909 {
33910 name: "SH3ADD",
33911 argLen: 2,
33912 asm: riscv.ASH3ADD,
33913 reg: regInfo{
33914 inputs: []inputInfo{
33915 {0, 1006632944},
33916 {1, 1006632944},
33917 },
33918 outputs: []outputInfo{
33919 {0, 1006632944},
33920 },
33921 },
33922 },
33923 {
33924 name: "AND",
33925 argLen: 2,
33926 commutative: true,
33927 asm: riscv.AAND,
33928 reg: regInfo{
33929 inputs: []inputInfo{
33930 {0, 1006632944},
33931 {1, 1006632944},
33932 },
33933 outputs: []outputInfo{
33934 {0, 1006632944},
33935 },
33936 },
33937 },
33938 {
33939 name: "ANDN",
33940 argLen: 2,
33941 asm: riscv.AANDN,
33942 reg: regInfo{
33943 inputs: []inputInfo{
33944 {0, 1006632944},
33945 {1, 1006632944},
33946 },
33947 outputs: []outputInfo{
33948 {0, 1006632944},
33949 },
33950 },
33951 },
33952 {
33953 name: "ANDI",
33954 auxType: auxInt64,
33955 argLen: 1,
33956 asm: riscv.AANDI,
33957 reg: regInfo{
33958 inputs: []inputInfo{
33959 {0, 1006632944},
33960 },
33961 outputs: []outputInfo{
33962 {0, 1006632944},
33963 },
33964 },
33965 },
33966 {
33967 name: "CLZ",
33968 argLen: 1,
33969 asm: riscv.ACLZ,
33970 reg: regInfo{
33971 inputs: []inputInfo{
33972 {0, 1006632944},
33973 },
33974 outputs: []outputInfo{
33975 {0, 1006632944},
33976 },
33977 },
33978 },
33979 {
33980 name: "CLZW",
33981 argLen: 1,
33982 asm: riscv.ACLZW,
33983 reg: regInfo{
33984 inputs: []inputInfo{
33985 {0, 1006632944},
33986 },
33987 outputs: []outputInfo{
33988 {0, 1006632944},
33989 },
33990 },
33991 },
33992 {
33993 name: "CPOP",
33994 argLen: 1,
33995 asm: riscv.ACPOP,
33996 reg: regInfo{
33997 inputs: []inputInfo{
33998 {0, 1006632944},
33999 },
34000 outputs: []outputInfo{
34001 {0, 1006632944},
34002 },
34003 },
34004 },
34005 {
34006 name: "CPOPW",
34007 argLen: 1,
34008 asm: riscv.ACPOPW,
34009 reg: regInfo{
34010 inputs: []inputInfo{
34011 {0, 1006632944},
34012 },
34013 outputs: []outputInfo{
34014 {0, 1006632944},
34015 },
34016 },
34017 },
34018 {
34019 name: "CTZ",
34020 argLen: 1,
34021 asm: riscv.ACTZ,
34022 reg: regInfo{
34023 inputs: []inputInfo{
34024 {0, 1006632944},
34025 },
34026 outputs: []outputInfo{
34027 {0, 1006632944},
34028 },
34029 },
34030 },
34031 {
34032 name: "CTZW",
34033 argLen: 1,
34034 asm: riscv.ACTZW,
34035 reg: regInfo{
34036 inputs: []inputInfo{
34037 {0, 1006632944},
34038 },
34039 outputs: []outputInfo{
34040 {0, 1006632944},
34041 },
34042 },
34043 },
34044 {
34045 name: "NOT",
34046 argLen: 1,
34047 asm: riscv.ANOT,
34048 reg: regInfo{
34049 inputs: []inputInfo{
34050 {0, 1006632944},
34051 },
34052 outputs: []outputInfo{
34053 {0, 1006632944},
34054 },
34055 },
34056 },
34057 {
34058 name: "OR",
34059 argLen: 2,
34060 commutative: true,
34061 asm: riscv.AOR,
34062 reg: regInfo{
34063 inputs: []inputInfo{
34064 {0, 1006632944},
34065 {1, 1006632944},
34066 },
34067 outputs: []outputInfo{
34068 {0, 1006632944},
34069 },
34070 },
34071 },
34072 {
34073 name: "ORN",
34074 argLen: 2,
34075 asm: riscv.AORN,
34076 reg: regInfo{
34077 inputs: []inputInfo{
34078 {0, 1006632944},
34079 {1, 1006632944},
34080 },
34081 outputs: []outputInfo{
34082 {0, 1006632944},
34083 },
34084 },
34085 },
34086 {
34087 name: "ORI",
34088 auxType: auxInt64,
34089 argLen: 1,
34090 asm: riscv.AORI,
34091 reg: regInfo{
34092 inputs: []inputInfo{
34093 {0, 1006632944},
34094 },
34095 outputs: []outputInfo{
34096 {0, 1006632944},
34097 },
34098 },
34099 },
34100 {
34101 name: "REV8",
34102 argLen: 1,
34103 asm: riscv.AREV8,
34104 reg: regInfo{
34105 inputs: []inputInfo{
34106 {0, 1006632944},
34107 },
34108 outputs: []outputInfo{
34109 {0, 1006632944},
34110 },
34111 },
34112 },
34113 {
34114 name: "ROL",
34115 argLen: 2,
34116 asm: riscv.AROL,
34117 reg: regInfo{
34118 inputs: []inputInfo{
34119 {0, 1006632944},
34120 {1, 1006632944},
34121 },
34122 outputs: []outputInfo{
34123 {0, 1006632944},
34124 },
34125 },
34126 },
34127 {
34128 name: "ROLW",
34129 argLen: 2,
34130 asm: riscv.AROLW,
34131 reg: regInfo{
34132 inputs: []inputInfo{
34133 {0, 1006632944},
34134 {1, 1006632944},
34135 },
34136 outputs: []outputInfo{
34137 {0, 1006632944},
34138 },
34139 },
34140 },
34141 {
34142 name: "ROR",
34143 argLen: 2,
34144 asm: riscv.AROR,
34145 reg: regInfo{
34146 inputs: []inputInfo{
34147 {0, 1006632944},
34148 {1, 1006632944},
34149 },
34150 outputs: []outputInfo{
34151 {0, 1006632944},
34152 },
34153 },
34154 },
34155 {
34156 name: "RORI",
34157 auxType: auxInt64,
34158 argLen: 1,
34159 asm: riscv.ARORI,
34160 reg: regInfo{
34161 inputs: []inputInfo{
34162 {0, 1006632944},
34163 },
34164 outputs: []outputInfo{
34165 {0, 1006632944},
34166 },
34167 },
34168 },
34169 {
34170 name: "RORIW",
34171 auxType: auxInt64,
34172 argLen: 1,
34173 asm: riscv.ARORIW,
34174 reg: regInfo{
34175 inputs: []inputInfo{
34176 {0, 1006632944},
34177 },
34178 outputs: []outputInfo{
34179 {0, 1006632944},
34180 },
34181 },
34182 },
34183 {
34184 name: "RORW",
34185 argLen: 2,
34186 asm: riscv.ARORW,
34187 reg: regInfo{
34188 inputs: []inputInfo{
34189 {0, 1006632944},
34190 {1, 1006632944},
34191 },
34192 outputs: []outputInfo{
34193 {0, 1006632944},
34194 },
34195 },
34196 },
34197 {
34198 name: "XNOR",
34199 argLen: 2,
34200 commutative: true,
34201 asm: riscv.AXNOR,
34202 reg: regInfo{
34203 inputs: []inputInfo{
34204 {0, 1006632944},
34205 {1, 1006632944},
34206 },
34207 outputs: []outputInfo{
34208 {0, 1006632944},
34209 },
34210 },
34211 },
34212 {
34213 name: "XOR",
34214 argLen: 2,
34215 commutative: true,
34216 asm: riscv.AXOR,
34217 reg: regInfo{
34218 inputs: []inputInfo{
34219 {0, 1006632944},
34220 {1, 1006632944},
34221 },
34222 outputs: []outputInfo{
34223 {0, 1006632944},
34224 },
34225 },
34226 },
34227 {
34228 name: "XORI",
34229 auxType: auxInt64,
34230 argLen: 1,
34231 asm: riscv.AXORI,
34232 reg: regInfo{
34233 inputs: []inputInfo{
34234 {0, 1006632944},
34235 },
34236 outputs: []outputInfo{
34237 {0, 1006632944},
34238 },
34239 },
34240 },
34241 {
34242 name: "MIN",
34243 argLen: 2,
34244 commutative: true,
34245 asm: riscv.AMIN,
34246 reg: regInfo{
34247 inputs: []inputInfo{
34248 {0, 1006632944},
34249 {1, 1006632944},
34250 },
34251 outputs: []outputInfo{
34252 {0, 1006632944},
34253 },
34254 },
34255 },
34256 {
34257 name: "MAX",
34258 argLen: 2,
34259 commutative: true,
34260 asm: riscv.AMAX,
34261 reg: regInfo{
34262 inputs: []inputInfo{
34263 {0, 1006632944},
34264 {1, 1006632944},
34265 },
34266 outputs: []outputInfo{
34267 {0, 1006632944},
34268 },
34269 },
34270 },
34271 {
34272 name: "MINU",
34273 argLen: 2,
34274 commutative: true,
34275 asm: riscv.AMINU,
34276 reg: regInfo{
34277 inputs: []inputInfo{
34278 {0, 1006632944},
34279 {1, 1006632944},
34280 },
34281 outputs: []outputInfo{
34282 {0, 1006632944},
34283 },
34284 },
34285 },
34286 {
34287 name: "MAXU",
34288 argLen: 2,
34289 commutative: true,
34290 asm: riscv.AMAXU,
34291 reg: regInfo{
34292 inputs: []inputInfo{
34293 {0, 1006632944},
34294 {1, 1006632944},
34295 },
34296 outputs: []outputInfo{
34297 {0, 1006632944},
34298 },
34299 },
34300 },
34301 {
34302 name: "SEQZ",
34303 argLen: 1,
34304 asm: riscv.ASEQZ,
34305 reg: regInfo{
34306 inputs: []inputInfo{
34307 {0, 1006632944},
34308 },
34309 outputs: []outputInfo{
34310 {0, 1006632944},
34311 },
34312 },
34313 },
34314 {
34315 name: "SNEZ",
34316 argLen: 1,
34317 asm: riscv.ASNEZ,
34318 reg: regInfo{
34319 inputs: []inputInfo{
34320 {0, 1006632944},
34321 },
34322 outputs: []outputInfo{
34323 {0, 1006632944},
34324 },
34325 },
34326 },
34327 {
34328 name: "SLT",
34329 argLen: 2,
34330 asm: riscv.ASLT,
34331 reg: regInfo{
34332 inputs: []inputInfo{
34333 {0, 1006632944},
34334 {1, 1006632944},
34335 },
34336 outputs: []outputInfo{
34337 {0, 1006632944},
34338 },
34339 },
34340 },
34341 {
34342 name: "SLTI",
34343 auxType: auxInt64,
34344 argLen: 1,
34345 asm: riscv.ASLTI,
34346 reg: regInfo{
34347 inputs: []inputInfo{
34348 {0, 1006632944},
34349 },
34350 outputs: []outputInfo{
34351 {0, 1006632944},
34352 },
34353 },
34354 },
34355 {
34356 name: "SLTU",
34357 argLen: 2,
34358 asm: riscv.ASLTU,
34359 reg: regInfo{
34360 inputs: []inputInfo{
34361 {0, 1006632944},
34362 {1, 1006632944},
34363 },
34364 outputs: []outputInfo{
34365 {0, 1006632944},
34366 },
34367 },
34368 },
34369 {
34370 name: "SLTIU",
34371 auxType: auxInt64,
34372 argLen: 1,
34373 asm: riscv.ASLTIU,
34374 reg: regInfo{
34375 inputs: []inputInfo{
34376 {0, 1006632944},
34377 },
34378 outputs: []outputInfo{
34379 {0, 1006632944},
34380 },
34381 },
34382 },
34383 {
34384 name: "LoweredRound32F",
34385 argLen: 1,
34386 resultInArg0: true,
34387 reg: regInfo{
34388 inputs: []inputInfo{
34389 {0, 9223372034707292160},
34390 },
34391 outputs: []outputInfo{
34392 {0, 9223372034707292160},
34393 },
34394 },
34395 },
34396 {
34397 name: "LoweredRound64F",
34398 argLen: 1,
34399 resultInArg0: true,
34400 reg: regInfo{
34401 inputs: []inputInfo{
34402 {0, 9223372034707292160},
34403 },
34404 outputs: []outputInfo{
34405 {0, 9223372034707292160},
34406 },
34407 },
34408 },
34409 {
34410 name: "CALLstatic",
34411 auxType: auxCallOff,
34412 argLen: -1,
34413 call: true,
34414 reg: regInfo{
34415 clobbers: 9223372035781033968,
34416 },
34417 },
34418 {
34419 name: "CALLtail",
34420 auxType: auxCallOff,
34421 argLen: -1,
34422 call: true,
34423 tailCall: true,
34424 reg: regInfo{
34425 clobbers: 9223372035781033968,
34426 },
34427 },
34428 {
34429 name: "CALLclosure",
34430 auxType: auxCallOff,
34431 argLen: -1,
34432 call: true,
34433 reg: regInfo{
34434 inputs: []inputInfo{
34435 {1, 33554432},
34436 {0, 1006632946},
34437 },
34438 clobbers: 9223372035781033968,
34439 },
34440 },
34441 {
34442 name: "CALLinter",
34443 auxType: auxCallOff,
34444 argLen: -1,
34445 call: true,
34446 reg: regInfo{
34447 inputs: []inputInfo{
34448 {0, 1006632944},
34449 },
34450 clobbers: 9223372035781033968,
34451 },
34452 },
34453 {
34454 name: "DUFFZERO",
34455 auxType: auxInt64,
34456 argLen: 2,
34457 faultOnNilArg0: true,
34458 reg: regInfo{
34459 inputs: []inputInfo{
34460 {0, 16777216},
34461 },
34462 clobbers: 16777216,
34463 },
34464 },
34465 {
34466 name: "DUFFCOPY",
34467 auxType: auxInt64,
34468 argLen: 3,
34469 faultOnNilArg0: true,
34470 faultOnNilArg1: true,
34471 reg: regInfo{
34472 inputs: []inputInfo{
34473 {0, 16777216},
34474 {1, 8388608},
34475 },
34476 clobbers: 25165824,
34477 },
34478 },
34479 {
34480 name: "LoweredZero",
34481 auxType: auxInt64,
34482 argLen: 3,
34483 faultOnNilArg0: true,
34484 reg: regInfo{
34485 inputs: []inputInfo{
34486 {0, 16},
34487 {1, 1006632944},
34488 },
34489 clobbers: 16,
34490 },
34491 },
34492 {
34493 name: "LoweredMove",
34494 auxType: auxInt64,
34495 argLen: 4,
34496 faultOnNilArg0: true,
34497 faultOnNilArg1: true,
34498 reg: regInfo{
34499 inputs: []inputInfo{
34500 {0, 16},
34501 {1, 32},
34502 {2, 1006632880},
34503 },
34504 clobbers: 112,
34505 },
34506 },
34507 {
34508 name: "LoweredAtomicLoad8",
34509 argLen: 2,
34510 faultOnNilArg0: true,
34511 reg: regInfo{
34512 inputs: []inputInfo{
34513 {0, 9223372037861408754},
34514 },
34515 outputs: []outputInfo{
34516 {0, 1006632944},
34517 },
34518 },
34519 },
34520 {
34521 name: "LoweredAtomicLoad32",
34522 argLen: 2,
34523 faultOnNilArg0: true,
34524 reg: regInfo{
34525 inputs: []inputInfo{
34526 {0, 9223372037861408754},
34527 },
34528 outputs: []outputInfo{
34529 {0, 1006632944},
34530 },
34531 },
34532 },
34533 {
34534 name: "LoweredAtomicLoad64",
34535 argLen: 2,
34536 faultOnNilArg0: true,
34537 reg: regInfo{
34538 inputs: []inputInfo{
34539 {0, 9223372037861408754},
34540 },
34541 outputs: []outputInfo{
34542 {0, 1006632944},
34543 },
34544 },
34545 },
34546 {
34547 name: "LoweredAtomicStore8",
34548 argLen: 3,
34549 faultOnNilArg0: true,
34550 hasSideEffects: true,
34551 reg: regInfo{
34552 inputs: []inputInfo{
34553 {1, 1006632946},
34554 {0, 9223372037861408754},
34555 },
34556 },
34557 },
34558 {
34559 name: "LoweredAtomicStore32",
34560 argLen: 3,
34561 faultOnNilArg0: true,
34562 hasSideEffects: true,
34563 reg: regInfo{
34564 inputs: []inputInfo{
34565 {1, 1006632946},
34566 {0, 9223372037861408754},
34567 },
34568 },
34569 },
34570 {
34571 name: "LoweredAtomicStore64",
34572 argLen: 3,
34573 faultOnNilArg0: true,
34574 hasSideEffects: true,
34575 reg: regInfo{
34576 inputs: []inputInfo{
34577 {1, 1006632946},
34578 {0, 9223372037861408754},
34579 },
34580 },
34581 },
34582 {
34583 name: "LoweredAtomicExchange32",
34584 argLen: 3,
34585 resultNotInArgs: true,
34586 faultOnNilArg0: true,
34587 hasSideEffects: true,
34588 reg: regInfo{
34589 inputs: []inputInfo{
34590 {1, 1073741808},
34591 {0, 9223372037928517618},
34592 },
34593 outputs: []outputInfo{
34594 {0, 1006632944},
34595 },
34596 },
34597 },
34598 {
34599 name: "LoweredAtomicExchange64",
34600 argLen: 3,
34601 resultNotInArgs: true,
34602 faultOnNilArg0: true,
34603 hasSideEffects: true,
34604 reg: regInfo{
34605 inputs: []inputInfo{
34606 {1, 1073741808},
34607 {0, 9223372037928517618},
34608 },
34609 outputs: []outputInfo{
34610 {0, 1006632944},
34611 },
34612 },
34613 },
34614 {
34615 name: "LoweredAtomicAdd32",
34616 argLen: 3,
34617 resultNotInArgs: true,
34618 faultOnNilArg0: true,
34619 hasSideEffects: true,
34620 unsafePoint: true,
34621 reg: regInfo{
34622 inputs: []inputInfo{
34623 {1, 1073741808},
34624 {0, 9223372037928517618},
34625 },
34626 outputs: []outputInfo{
34627 {0, 1006632944},
34628 },
34629 },
34630 },
34631 {
34632 name: "LoweredAtomicAdd64",
34633 argLen: 3,
34634 resultNotInArgs: true,
34635 faultOnNilArg0: true,
34636 hasSideEffects: true,
34637 unsafePoint: true,
34638 reg: regInfo{
34639 inputs: []inputInfo{
34640 {1, 1073741808},
34641 {0, 9223372037928517618},
34642 },
34643 outputs: []outputInfo{
34644 {0, 1006632944},
34645 },
34646 },
34647 },
34648 {
34649 name: "LoweredAtomicCas32",
34650 argLen: 4,
34651 resultNotInArgs: true,
34652 faultOnNilArg0: true,
34653 hasSideEffects: true,
34654 unsafePoint: true,
34655 reg: regInfo{
34656 inputs: []inputInfo{
34657 {1, 1073741808},
34658 {2, 1073741808},
34659 {0, 9223372037928517618},
34660 },
34661 outputs: []outputInfo{
34662 {0, 1006632944},
34663 },
34664 },
34665 },
34666 {
34667 name: "LoweredAtomicCas64",
34668 argLen: 4,
34669 resultNotInArgs: true,
34670 faultOnNilArg0: true,
34671 hasSideEffects: true,
34672 unsafePoint: true,
34673 reg: regInfo{
34674 inputs: []inputInfo{
34675 {1, 1073741808},
34676 {2, 1073741808},
34677 {0, 9223372037928517618},
34678 },
34679 outputs: []outputInfo{
34680 {0, 1006632944},
34681 },
34682 },
34683 },
34684 {
34685 name: "LoweredAtomicAnd32",
34686 argLen: 3,
34687 faultOnNilArg0: true,
34688 hasSideEffects: true,
34689 asm: riscv.AAMOANDW,
34690 reg: regInfo{
34691 inputs: []inputInfo{
34692 {1, 1073741808},
34693 {0, 9223372037928517618},
34694 },
34695 },
34696 },
34697 {
34698 name: "LoweredAtomicOr32",
34699 argLen: 3,
34700 faultOnNilArg0: true,
34701 hasSideEffects: true,
34702 asm: riscv.AAMOORW,
34703 reg: regInfo{
34704 inputs: []inputInfo{
34705 {1, 1073741808},
34706 {0, 9223372037928517618},
34707 },
34708 },
34709 },
34710 {
34711 name: "LoweredNilCheck",
34712 argLen: 2,
34713 nilCheck: true,
34714 faultOnNilArg0: true,
34715 reg: regInfo{
34716 inputs: []inputInfo{
34717 {0, 1006632946},
34718 },
34719 },
34720 },
34721 {
34722 name: "LoweredGetClosurePtr",
34723 argLen: 0,
34724 reg: regInfo{
34725 outputs: []outputInfo{
34726 {0, 33554432},
34727 },
34728 },
34729 },
34730 {
34731 name: "LoweredGetCallerSP",
34732 argLen: 1,
34733 rematerializeable: true,
34734 reg: regInfo{
34735 outputs: []outputInfo{
34736 {0, 1006632944},
34737 },
34738 },
34739 },
34740 {
34741 name: "LoweredGetCallerPC",
34742 argLen: 0,
34743 rematerializeable: true,
34744 reg: regInfo{
34745 outputs: []outputInfo{
34746 {0, 1006632944},
34747 },
34748 },
34749 },
34750 {
34751 name: "LoweredWB",
34752 auxType: auxInt64,
34753 argLen: 1,
34754 clobberFlags: true,
34755 reg: regInfo{
34756 clobbers: 9223372034707292160,
34757 outputs: []outputInfo{
34758 {0, 8388608},
34759 },
34760 },
34761 },
34762 {
34763 name: "LoweredPubBarrier",
34764 argLen: 1,
34765 hasSideEffects: true,
34766 asm: riscv.AFENCE,
34767 reg: regInfo{},
34768 },
34769 {
34770 name: "LoweredPanicBoundsA",
34771 auxType: auxInt64,
34772 argLen: 3,
34773 call: true,
34774 reg: regInfo{
34775 inputs: []inputInfo{
34776 {0, 64},
34777 {1, 134217728},
34778 },
34779 },
34780 },
34781 {
34782 name: "LoweredPanicBoundsB",
34783 auxType: auxInt64,
34784 argLen: 3,
34785 call: true,
34786 reg: regInfo{
34787 inputs: []inputInfo{
34788 {0, 32},
34789 {1, 64},
34790 },
34791 },
34792 },
34793 {
34794 name: "LoweredPanicBoundsC",
34795 auxType: auxInt64,
34796 argLen: 3,
34797 call: true,
34798 reg: regInfo{
34799 inputs: []inputInfo{
34800 {0, 16},
34801 {1, 32},
34802 },
34803 },
34804 },
34805 {
34806 name: "FADDS",
34807 argLen: 2,
34808 commutative: true,
34809 asm: riscv.AFADDS,
34810 reg: regInfo{
34811 inputs: []inputInfo{
34812 {0, 9223372034707292160},
34813 {1, 9223372034707292160},
34814 },
34815 outputs: []outputInfo{
34816 {0, 9223372034707292160},
34817 },
34818 },
34819 },
34820 {
34821 name: "FSUBS",
34822 argLen: 2,
34823 asm: riscv.AFSUBS,
34824 reg: regInfo{
34825 inputs: []inputInfo{
34826 {0, 9223372034707292160},
34827 {1, 9223372034707292160},
34828 },
34829 outputs: []outputInfo{
34830 {0, 9223372034707292160},
34831 },
34832 },
34833 },
34834 {
34835 name: "FMULS",
34836 argLen: 2,
34837 commutative: true,
34838 asm: riscv.AFMULS,
34839 reg: regInfo{
34840 inputs: []inputInfo{
34841 {0, 9223372034707292160},
34842 {1, 9223372034707292160},
34843 },
34844 outputs: []outputInfo{
34845 {0, 9223372034707292160},
34846 },
34847 },
34848 },
34849 {
34850 name: "FDIVS",
34851 argLen: 2,
34852 asm: riscv.AFDIVS,
34853 reg: regInfo{
34854 inputs: []inputInfo{
34855 {0, 9223372034707292160},
34856 {1, 9223372034707292160},
34857 },
34858 outputs: []outputInfo{
34859 {0, 9223372034707292160},
34860 },
34861 },
34862 },
34863 {
34864 name: "FMADDS",
34865 argLen: 3,
34866 commutative: true,
34867 asm: riscv.AFMADDS,
34868 reg: regInfo{
34869 inputs: []inputInfo{
34870 {0, 9223372034707292160},
34871 {1, 9223372034707292160},
34872 {2, 9223372034707292160},
34873 },
34874 outputs: []outputInfo{
34875 {0, 9223372034707292160},
34876 },
34877 },
34878 },
34879 {
34880 name: "FMSUBS",
34881 argLen: 3,
34882 commutative: true,
34883 asm: riscv.AFMSUBS,
34884 reg: regInfo{
34885 inputs: []inputInfo{
34886 {0, 9223372034707292160},
34887 {1, 9223372034707292160},
34888 {2, 9223372034707292160},
34889 },
34890 outputs: []outputInfo{
34891 {0, 9223372034707292160},
34892 },
34893 },
34894 },
34895 {
34896 name: "FNMADDS",
34897 argLen: 3,
34898 commutative: true,
34899 asm: riscv.AFNMADDS,
34900 reg: regInfo{
34901 inputs: []inputInfo{
34902 {0, 9223372034707292160},
34903 {1, 9223372034707292160},
34904 {2, 9223372034707292160},
34905 },
34906 outputs: []outputInfo{
34907 {0, 9223372034707292160},
34908 },
34909 },
34910 },
34911 {
34912 name: "FNMSUBS",
34913 argLen: 3,
34914 commutative: true,
34915 asm: riscv.AFNMSUBS,
34916 reg: regInfo{
34917 inputs: []inputInfo{
34918 {0, 9223372034707292160},
34919 {1, 9223372034707292160},
34920 {2, 9223372034707292160},
34921 },
34922 outputs: []outputInfo{
34923 {0, 9223372034707292160},
34924 },
34925 },
34926 },
34927 {
34928 name: "FSQRTS",
34929 argLen: 1,
34930 asm: riscv.AFSQRTS,
34931 reg: regInfo{
34932 inputs: []inputInfo{
34933 {0, 9223372034707292160},
34934 },
34935 outputs: []outputInfo{
34936 {0, 9223372034707292160},
34937 },
34938 },
34939 },
34940 {
34941 name: "FNEGS",
34942 argLen: 1,
34943 asm: riscv.AFNEGS,
34944 reg: regInfo{
34945 inputs: []inputInfo{
34946 {0, 9223372034707292160},
34947 },
34948 outputs: []outputInfo{
34949 {0, 9223372034707292160},
34950 },
34951 },
34952 },
34953 {
34954 name: "FMVSX",
34955 argLen: 1,
34956 asm: riscv.AFMVSX,
34957 reg: regInfo{
34958 inputs: []inputInfo{
34959 {0, 1006632944},
34960 },
34961 outputs: []outputInfo{
34962 {0, 9223372034707292160},
34963 },
34964 },
34965 },
34966 {
34967 name: "FCVTSW",
34968 argLen: 1,
34969 asm: riscv.AFCVTSW,
34970 reg: regInfo{
34971 inputs: []inputInfo{
34972 {0, 1006632944},
34973 },
34974 outputs: []outputInfo{
34975 {0, 9223372034707292160},
34976 },
34977 },
34978 },
34979 {
34980 name: "FCVTSL",
34981 argLen: 1,
34982 asm: riscv.AFCVTSL,
34983 reg: regInfo{
34984 inputs: []inputInfo{
34985 {0, 1006632944},
34986 },
34987 outputs: []outputInfo{
34988 {0, 9223372034707292160},
34989 },
34990 },
34991 },
34992 {
34993 name: "FCVTWS",
34994 argLen: 1,
34995 asm: riscv.AFCVTWS,
34996 reg: regInfo{
34997 inputs: []inputInfo{
34998 {0, 9223372034707292160},
34999 },
35000 outputs: []outputInfo{
35001 {0, 1006632944},
35002 },
35003 },
35004 },
35005 {
35006 name: "FCVTLS",
35007 argLen: 1,
35008 asm: riscv.AFCVTLS,
35009 reg: regInfo{
35010 inputs: []inputInfo{
35011 {0, 9223372034707292160},
35012 },
35013 outputs: []outputInfo{
35014 {0, 1006632944},
35015 },
35016 },
35017 },
35018 {
35019 name: "FMOVWload",
35020 auxType: auxSymOff,
35021 argLen: 2,
35022 faultOnNilArg0: true,
35023 symEffect: SymRead,
35024 asm: riscv.AMOVF,
35025 reg: regInfo{
35026 inputs: []inputInfo{
35027 {0, 9223372037861408754},
35028 },
35029 outputs: []outputInfo{
35030 {0, 9223372034707292160},
35031 },
35032 },
35033 },
35034 {
35035 name: "FMOVWstore",
35036 auxType: auxSymOff,
35037 argLen: 3,
35038 faultOnNilArg0: true,
35039 symEffect: SymWrite,
35040 asm: riscv.AMOVF,
35041 reg: regInfo{
35042 inputs: []inputInfo{
35043 {0, 9223372037861408754},
35044 {1, 9223372034707292160},
35045 },
35046 },
35047 },
35048 {
35049 name: "FEQS",
35050 argLen: 2,
35051 commutative: true,
35052 asm: riscv.AFEQS,
35053 reg: regInfo{
35054 inputs: []inputInfo{
35055 {0, 9223372034707292160},
35056 {1, 9223372034707292160},
35057 },
35058 outputs: []outputInfo{
35059 {0, 1006632944},
35060 },
35061 },
35062 },
35063 {
35064 name: "FNES",
35065 argLen: 2,
35066 commutative: true,
35067 asm: riscv.AFNES,
35068 reg: regInfo{
35069 inputs: []inputInfo{
35070 {0, 9223372034707292160},
35071 {1, 9223372034707292160},
35072 },
35073 outputs: []outputInfo{
35074 {0, 1006632944},
35075 },
35076 },
35077 },
35078 {
35079 name: "FLTS",
35080 argLen: 2,
35081 asm: riscv.AFLTS,
35082 reg: regInfo{
35083 inputs: []inputInfo{
35084 {0, 9223372034707292160},
35085 {1, 9223372034707292160},
35086 },
35087 outputs: []outputInfo{
35088 {0, 1006632944},
35089 },
35090 },
35091 },
35092 {
35093 name: "FLES",
35094 argLen: 2,
35095 asm: riscv.AFLES,
35096 reg: regInfo{
35097 inputs: []inputInfo{
35098 {0, 9223372034707292160},
35099 {1, 9223372034707292160},
35100 },
35101 outputs: []outputInfo{
35102 {0, 1006632944},
35103 },
35104 },
35105 },
35106 {
35107 name: "LoweredFMAXS",
35108 argLen: 2,
35109 commutative: true,
35110 resultNotInArgs: true,
35111 asm: riscv.AFMAXS,
35112 reg: regInfo{
35113 inputs: []inputInfo{
35114 {0, 9223372034707292160},
35115 {1, 9223372034707292160},
35116 },
35117 outputs: []outputInfo{
35118 {0, 9223372034707292160},
35119 },
35120 },
35121 },
35122 {
35123 name: "LoweredFMINS",
35124 argLen: 2,
35125 commutative: true,
35126 resultNotInArgs: true,
35127 asm: riscv.AFMINS,
35128 reg: regInfo{
35129 inputs: []inputInfo{
35130 {0, 9223372034707292160},
35131 {1, 9223372034707292160},
35132 },
35133 outputs: []outputInfo{
35134 {0, 9223372034707292160},
35135 },
35136 },
35137 },
35138 {
35139 name: "FADDD",
35140 argLen: 2,
35141 commutative: true,
35142 asm: riscv.AFADDD,
35143 reg: regInfo{
35144 inputs: []inputInfo{
35145 {0, 9223372034707292160},
35146 {1, 9223372034707292160},
35147 },
35148 outputs: []outputInfo{
35149 {0, 9223372034707292160},
35150 },
35151 },
35152 },
35153 {
35154 name: "FSUBD",
35155 argLen: 2,
35156 asm: riscv.AFSUBD,
35157 reg: regInfo{
35158 inputs: []inputInfo{
35159 {0, 9223372034707292160},
35160 {1, 9223372034707292160},
35161 },
35162 outputs: []outputInfo{
35163 {0, 9223372034707292160},
35164 },
35165 },
35166 },
35167 {
35168 name: "FMULD",
35169 argLen: 2,
35170 commutative: true,
35171 asm: riscv.AFMULD,
35172 reg: regInfo{
35173 inputs: []inputInfo{
35174 {0, 9223372034707292160},
35175 {1, 9223372034707292160},
35176 },
35177 outputs: []outputInfo{
35178 {0, 9223372034707292160},
35179 },
35180 },
35181 },
35182 {
35183 name: "FDIVD",
35184 argLen: 2,
35185 asm: riscv.AFDIVD,
35186 reg: regInfo{
35187 inputs: []inputInfo{
35188 {0, 9223372034707292160},
35189 {1, 9223372034707292160},
35190 },
35191 outputs: []outputInfo{
35192 {0, 9223372034707292160},
35193 },
35194 },
35195 },
35196 {
35197 name: "FMADDD",
35198 argLen: 3,
35199 commutative: true,
35200 asm: riscv.AFMADDD,
35201 reg: regInfo{
35202 inputs: []inputInfo{
35203 {0, 9223372034707292160},
35204 {1, 9223372034707292160},
35205 {2, 9223372034707292160},
35206 },
35207 outputs: []outputInfo{
35208 {0, 9223372034707292160},
35209 },
35210 },
35211 },
35212 {
35213 name: "FMSUBD",
35214 argLen: 3,
35215 commutative: true,
35216 asm: riscv.AFMSUBD,
35217 reg: regInfo{
35218 inputs: []inputInfo{
35219 {0, 9223372034707292160},
35220 {1, 9223372034707292160},
35221 {2, 9223372034707292160},
35222 },
35223 outputs: []outputInfo{
35224 {0, 9223372034707292160},
35225 },
35226 },
35227 },
35228 {
35229 name: "FNMADDD",
35230 argLen: 3,
35231 commutative: true,
35232 asm: riscv.AFNMADDD,
35233 reg: regInfo{
35234 inputs: []inputInfo{
35235 {0, 9223372034707292160},
35236 {1, 9223372034707292160},
35237 {2, 9223372034707292160},
35238 },
35239 outputs: []outputInfo{
35240 {0, 9223372034707292160},
35241 },
35242 },
35243 },
35244 {
35245 name: "FNMSUBD",
35246 argLen: 3,
35247 commutative: true,
35248 asm: riscv.AFNMSUBD,
35249 reg: regInfo{
35250 inputs: []inputInfo{
35251 {0, 9223372034707292160},
35252 {1, 9223372034707292160},
35253 {2, 9223372034707292160},
35254 },
35255 outputs: []outputInfo{
35256 {0, 9223372034707292160},
35257 },
35258 },
35259 },
35260 {
35261 name: "FSQRTD",
35262 argLen: 1,
35263 asm: riscv.AFSQRTD,
35264 reg: regInfo{
35265 inputs: []inputInfo{
35266 {0, 9223372034707292160},
35267 },
35268 outputs: []outputInfo{
35269 {0, 9223372034707292160},
35270 },
35271 },
35272 },
35273 {
35274 name: "FNEGD",
35275 argLen: 1,
35276 asm: riscv.AFNEGD,
35277 reg: regInfo{
35278 inputs: []inputInfo{
35279 {0, 9223372034707292160},
35280 },
35281 outputs: []outputInfo{
35282 {0, 9223372034707292160},
35283 },
35284 },
35285 },
35286 {
35287 name: "FABSD",
35288 argLen: 1,
35289 asm: riscv.AFABSD,
35290 reg: regInfo{
35291 inputs: []inputInfo{
35292 {0, 9223372034707292160},
35293 },
35294 outputs: []outputInfo{
35295 {0, 9223372034707292160},
35296 },
35297 },
35298 },
35299 {
35300 name: "FSGNJD",
35301 argLen: 2,
35302 asm: riscv.AFSGNJD,
35303 reg: regInfo{
35304 inputs: []inputInfo{
35305 {0, 9223372034707292160},
35306 {1, 9223372034707292160},
35307 },
35308 outputs: []outputInfo{
35309 {0, 9223372034707292160},
35310 },
35311 },
35312 },
35313 {
35314 name: "FMVDX",
35315 argLen: 1,
35316 asm: riscv.AFMVDX,
35317 reg: regInfo{
35318 inputs: []inputInfo{
35319 {0, 1006632944},
35320 },
35321 outputs: []outputInfo{
35322 {0, 9223372034707292160},
35323 },
35324 },
35325 },
35326 {
35327 name: "FCVTDW",
35328 argLen: 1,
35329 asm: riscv.AFCVTDW,
35330 reg: regInfo{
35331 inputs: []inputInfo{
35332 {0, 1006632944},
35333 },
35334 outputs: []outputInfo{
35335 {0, 9223372034707292160},
35336 },
35337 },
35338 },
35339 {
35340 name: "FCVTDL",
35341 argLen: 1,
35342 asm: riscv.AFCVTDL,
35343 reg: regInfo{
35344 inputs: []inputInfo{
35345 {0, 1006632944},
35346 },
35347 outputs: []outputInfo{
35348 {0, 9223372034707292160},
35349 },
35350 },
35351 },
35352 {
35353 name: "FCVTWD",
35354 argLen: 1,
35355 asm: riscv.AFCVTWD,
35356 reg: regInfo{
35357 inputs: []inputInfo{
35358 {0, 9223372034707292160},
35359 },
35360 outputs: []outputInfo{
35361 {0, 1006632944},
35362 },
35363 },
35364 },
35365 {
35366 name: "FCVTLD",
35367 argLen: 1,
35368 asm: riscv.AFCVTLD,
35369 reg: regInfo{
35370 inputs: []inputInfo{
35371 {0, 9223372034707292160},
35372 },
35373 outputs: []outputInfo{
35374 {0, 1006632944},
35375 },
35376 },
35377 },
35378 {
35379 name: "FCVTDS",
35380 argLen: 1,
35381 asm: riscv.AFCVTDS,
35382 reg: regInfo{
35383 inputs: []inputInfo{
35384 {0, 9223372034707292160},
35385 },
35386 outputs: []outputInfo{
35387 {0, 9223372034707292160},
35388 },
35389 },
35390 },
35391 {
35392 name: "FCVTSD",
35393 argLen: 1,
35394 asm: riscv.AFCVTSD,
35395 reg: regInfo{
35396 inputs: []inputInfo{
35397 {0, 9223372034707292160},
35398 },
35399 outputs: []outputInfo{
35400 {0, 9223372034707292160},
35401 },
35402 },
35403 },
35404 {
35405 name: "FMOVDload",
35406 auxType: auxSymOff,
35407 argLen: 2,
35408 faultOnNilArg0: true,
35409 symEffect: SymRead,
35410 asm: riscv.AMOVD,
35411 reg: regInfo{
35412 inputs: []inputInfo{
35413 {0, 9223372037861408754},
35414 },
35415 outputs: []outputInfo{
35416 {0, 9223372034707292160},
35417 },
35418 },
35419 },
35420 {
35421 name: "FMOVDstore",
35422 auxType: auxSymOff,
35423 argLen: 3,
35424 faultOnNilArg0: true,
35425 symEffect: SymWrite,
35426 asm: riscv.AMOVD,
35427 reg: regInfo{
35428 inputs: []inputInfo{
35429 {0, 9223372037861408754},
35430 {1, 9223372034707292160},
35431 },
35432 },
35433 },
35434 {
35435 name: "FEQD",
35436 argLen: 2,
35437 commutative: true,
35438 asm: riscv.AFEQD,
35439 reg: regInfo{
35440 inputs: []inputInfo{
35441 {0, 9223372034707292160},
35442 {1, 9223372034707292160},
35443 },
35444 outputs: []outputInfo{
35445 {0, 1006632944},
35446 },
35447 },
35448 },
35449 {
35450 name: "FNED",
35451 argLen: 2,
35452 commutative: true,
35453 asm: riscv.AFNED,
35454 reg: regInfo{
35455 inputs: []inputInfo{
35456 {0, 9223372034707292160},
35457 {1, 9223372034707292160},
35458 },
35459 outputs: []outputInfo{
35460 {0, 1006632944},
35461 },
35462 },
35463 },
35464 {
35465 name: "FLTD",
35466 argLen: 2,
35467 asm: riscv.AFLTD,
35468 reg: regInfo{
35469 inputs: []inputInfo{
35470 {0, 9223372034707292160},
35471 {1, 9223372034707292160},
35472 },
35473 outputs: []outputInfo{
35474 {0, 1006632944},
35475 },
35476 },
35477 },
35478 {
35479 name: "FLED",
35480 argLen: 2,
35481 asm: riscv.AFLED,
35482 reg: regInfo{
35483 inputs: []inputInfo{
35484 {0, 9223372034707292160},
35485 {1, 9223372034707292160},
35486 },
35487 outputs: []outputInfo{
35488 {0, 1006632944},
35489 },
35490 },
35491 },
35492 {
35493 name: "LoweredFMIND",
35494 argLen: 2,
35495 commutative: true,
35496 resultNotInArgs: true,
35497 asm: riscv.AFMIND,
35498 reg: regInfo{
35499 inputs: []inputInfo{
35500 {0, 9223372034707292160},
35501 {1, 9223372034707292160},
35502 },
35503 outputs: []outputInfo{
35504 {0, 9223372034707292160},
35505 },
35506 },
35507 },
35508 {
35509 name: "LoweredFMAXD",
35510 argLen: 2,
35511 commutative: true,
35512 resultNotInArgs: true,
35513 asm: riscv.AFMAXD,
35514 reg: regInfo{
35515 inputs: []inputInfo{
35516 {0, 9223372034707292160},
35517 {1, 9223372034707292160},
35518 },
35519 outputs: []outputInfo{
35520 {0, 9223372034707292160},
35521 },
35522 },
35523 },
35524
35525 {
35526 name: "FADDS",
35527 argLen: 2,
35528 commutative: true,
35529 resultInArg0: true,
35530 asm: s390x.AFADDS,
35531 reg: regInfo{
35532 inputs: []inputInfo{
35533 {0, 4294901760},
35534 {1, 4294901760},
35535 },
35536 outputs: []outputInfo{
35537 {0, 4294901760},
35538 },
35539 },
35540 },
35541 {
35542 name: "FADD",
35543 argLen: 2,
35544 commutative: true,
35545 resultInArg0: true,
35546 asm: s390x.AFADD,
35547 reg: regInfo{
35548 inputs: []inputInfo{
35549 {0, 4294901760},
35550 {1, 4294901760},
35551 },
35552 outputs: []outputInfo{
35553 {0, 4294901760},
35554 },
35555 },
35556 },
35557 {
35558 name: "FSUBS",
35559 argLen: 2,
35560 resultInArg0: true,
35561 asm: s390x.AFSUBS,
35562 reg: regInfo{
35563 inputs: []inputInfo{
35564 {0, 4294901760},
35565 {1, 4294901760},
35566 },
35567 outputs: []outputInfo{
35568 {0, 4294901760},
35569 },
35570 },
35571 },
35572 {
35573 name: "FSUB",
35574 argLen: 2,
35575 resultInArg0: true,
35576 asm: s390x.AFSUB,
35577 reg: regInfo{
35578 inputs: []inputInfo{
35579 {0, 4294901760},
35580 {1, 4294901760},
35581 },
35582 outputs: []outputInfo{
35583 {0, 4294901760},
35584 },
35585 },
35586 },
35587 {
35588 name: "FMULS",
35589 argLen: 2,
35590 commutative: true,
35591 resultInArg0: true,
35592 asm: s390x.AFMULS,
35593 reg: regInfo{
35594 inputs: []inputInfo{
35595 {0, 4294901760},
35596 {1, 4294901760},
35597 },
35598 outputs: []outputInfo{
35599 {0, 4294901760},
35600 },
35601 },
35602 },
35603 {
35604 name: "FMUL",
35605 argLen: 2,
35606 commutative: true,
35607 resultInArg0: true,
35608 asm: s390x.AFMUL,
35609 reg: regInfo{
35610 inputs: []inputInfo{
35611 {0, 4294901760},
35612 {1, 4294901760},
35613 },
35614 outputs: []outputInfo{
35615 {0, 4294901760},
35616 },
35617 },
35618 },
35619 {
35620 name: "FDIVS",
35621 argLen: 2,
35622 resultInArg0: true,
35623 asm: s390x.AFDIVS,
35624 reg: regInfo{
35625 inputs: []inputInfo{
35626 {0, 4294901760},
35627 {1, 4294901760},
35628 },
35629 outputs: []outputInfo{
35630 {0, 4294901760},
35631 },
35632 },
35633 },
35634 {
35635 name: "FDIV",
35636 argLen: 2,
35637 resultInArg0: true,
35638 asm: s390x.AFDIV,
35639 reg: regInfo{
35640 inputs: []inputInfo{
35641 {0, 4294901760},
35642 {1, 4294901760},
35643 },
35644 outputs: []outputInfo{
35645 {0, 4294901760},
35646 },
35647 },
35648 },
35649 {
35650 name: "FNEGS",
35651 argLen: 1,
35652 clobberFlags: true,
35653 asm: s390x.AFNEGS,
35654 reg: regInfo{
35655 inputs: []inputInfo{
35656 {0, 4294901760},
35657 },
35658 outputs: []outputInfo{
35659 {0, 4294901760},
35660 },
35661 },
35662 },
35663 {
35664 name: "FNEG",
35665 argLen: 1,
35666 clobberFlags: true,
35667 asm: s390x.AFNEG,
35668 reg: regInfo{
35669 inputs: []inputInfo{
35670 {0, 4294901760},
35671 },
35672 outputs: []outputInfo{
35673 {0, 4294901760},
35674 },
35675 },
35676 },
35677 {
35678 name: "FMADDS",
35679 argLen: 3,
35680 resultInArg0: true,
35681 asm: s390x.AFMADDS,
35682 reg: regInfo{
35683 inputs: []inputInfo{
35684 {0, 4294901760},
35685 {1, 4294901760},
35686 {2, 4294901760},
35687 },
35688 outputs: []outputInfo{
35689 {0, 4294901760},
35690 },
35691 },
35692 },
35693 {
35694 name: "FMADD",
35695 argLen: 3,
35696 resultInArg0: true,
35697 asm: s390x.AFMADD,
35698 reg: regInfo{
35699 inputs: []inputInfo{
35700 {0, 4294901760},
35701 {1, 4294901760},
35702 {2, 4294901760},
35703 },
35704 outputs: []outputInfo{
35705 {0, 4294901760},
35706 },
35707 },
35708 },
35709 {
35710 name: "FMSUBS",
35711 argLen: 3,
35712 resultInArg0: true,
35713 asm: s390x.AFMSUBS,
35714 reg: regInfo{
35715 inputs: []inputInfo{
35716 {0, 4294901760},
35717 {1, 4294901760},
35718 {2, 4294901760},
35719 },
35720 outputs: []outputInfo{
35721 {0, 4294901760},
35722 },
35723 },
35724 },
35725 {
35726 name: "FMSUB",
35727 argLen: 3,
35728 resultInArg0: true,
35729 asm: s390x.AFMSUB,
35730 reg: regInfo{
35731 inputs: []inputInfo{
35732 {0, 4294901760},
35733 {1, 4294901760},
35734 {2, 4294901760},
35735 },
35736 outputs: []outputInfo{
35737 {0, 4294901760},
35738 },
35739 },
35740 },
35741 {
35742 name: "LPDFR",
35743 argLen: 1,
35744 asm: s390x.ALPDFR,
35745 reg: regInfo{
35746 inputs: []inputInfo{
35747 {0, 4294901760},
35748 },
35749 outputs: []outputInfo{
35750 {0, 4294901760},
35751 },
35752 },
35753 },
35754 {
35755 name: "LNDFR",
35756 argLen: 1,
35757 asm: s390x.ALNDFR,
35758 reg: regInfo{
35759 inputs: []inputInfo{
35760 {0, 4294901760},
35761 },
35762 outputs: []outputInfo{
35763 {0, 4294901760},
35764 },
35765 },
35766 },
35767 {
35768 name: "CPSDR",
35769 argLen: 2,
35770 asm: s390x.ACPSDR,
35771 reg: regInfo{
35772 inputs: []inputInfo{
35773 {0, 4294901760},
35774 {1, 4294901760},
35775 },
35776 outputs: []outputInfo{
35777 {0, 4294901760},
35778 },
35779 },
35780 },
35781 {
35782 name: "FIDBR",
35783 auxType: auxInt8,
35784 argLen: 1,
35785 asm: s390x.AFIDBR,
35786 reg: regInfo{
35787 inputs: []inputInfo{
35788 {0, 4294901760},
35789 },
35790 outputs: []outputInfo{
35791 {0, 4294901760},
35792 },
35793 },
35794 },
35795 {
35796 name: "FMOVSload",
35797 auxType: auxSymOff,
35798 argLen: 2,
35799 faultOnNilArg0: true,
35800 symEffect: SymRead,
35801 asm: s390x.AFMOVS,
35802 reg: regInfo{
35803 inputs: []inputInfo{
35804 {0, 4295023614},
35805 },
35806 outputs: []outputInfo{
35807 {0, 4294901760},
35808 },
35809 },
35810 },
35811 {
35812 name: "FMOVDload",
35813 auxType: auxSymOff,
35814 argLen: 2,
35815 faultOnNilArg0: true,
35816 symEffect: SymRead,
35817 asm: s390x.AFMOVD,
35818 reg: regInfo{
35819 inputs: []inputInfo{
35820 {0, 4295023614},
35821 },
35822 outputs: []outputInfo{
35823 {0, 4294901760},
35824 },
35825 },
35826 },
35827 {
35828 name: "FMOVSconst",
35829 auxType: auxFloat32,
35830 argLen: 0,
35831 rematerializeable: true,
35832 asm: s390x.AFMOVS,
35833 reg: regInfo{
35834 outputs: []outputInfo{
35835 {0, 4294901760},
35836 },
35837 },
35838 },
35839 {
35840 name: "FMOVDconst",
35841 auxType: auxFloat64,
35842 argLen: 0,
35843 rematerializeable: true,
35844 asm: s390x.AFMOVD,
35845 reg: regInfo{
35846 outputs: []outputInfo{
35847 {0, 4294901760},
35848 },
35849 },
35850 },
35851 {
35852 name: "FMOVSloadidx",
35853 auxType: auxSymOff,
35854 argLen: 3,
35855 symEffect: SymRead,
35856 asm: s390x.AFMOVS,
35857 reg: regInfo{
35858 inputs: []inputInfo{
35859 {0, 56318},
35860 {1, 56318},
35861 },
35862 outputs: []outputInfo{
35863 {0, 4294901760},
35864 },
35865 },
35866 },
35867 {
35868 name: "FMOVDloadidx",
35869 auxType: auxSymOff,
35870 argLen: 3,
35871 symEffect: SymRead,
35872 asm: s390x.AFMOVD,
35873 reg: regInfo{
35874 inputs: []inputInfo{
35875 {0, 56318},
35876 {1, 56318},
35877 },
35878 outputs: []outputInfo{
35879 {0, 4294901760},
35880 },
35881 },
35882 },
35883 {
35884 name: "FMOVSstore",
35885 auxType: auxSymOff,
35886 argLen: 3,
35887 faultOnNilArg0: true,
35888 symEffect: SymWrite,
35889 asm: s390x.AFMOVS,
35890 reg: regInfo{
35891 inputs: []inputInfo{
35892 {0, 4295023614},
35893 {1, 4294901760},
35894 },
35895 },
35896 },
35897 {
35898 name: "FMOVDstore",
35899 auxType: auxSymOff,
35900 argLen: 3,
35901 faultOnNilArg0: true,
35902 symEffect: SymWrite,
35903 asm: s390x.AFMOVD,
35904 reg: regInfo{
35905 inputs: []inputInfo{
35906 {0, 4295023614},
35907 {1, 4294901760},
35908 },
35909 },
35910 },
35911 {
35912 name: "FMOVSstoreidx",
35913 auxType: auxSymOff,
35914 argLen: 4,
35915 symEffect: SymWrite,
35916 asm: s390x.AFMOVS,
35917 reg: regInfo{
35918 inputs: []inputInfo{
35919 {0, 56318},
35920 {1, 56318},
35921 {2, 4294901760},
35922 },
35923 },
35924 },
35925 {
35926 name: "FMOVDstoreidx",
35927 auxType: auxSymOff,
35928 argLen: 4,
35929 symEffect: SymWrite,
35930 asm: s390x.AFMOVD,
35931 reg: regInfo{
35932 inputs: []inputInfo{
35933 {0, 56318},
35934 {1, 56318},
35935 {2, 4294901760},
35936 },
35937 },
35938 },
35939 {
35940 name: "ADD",
35941 argLen: 2,
35942 commutative: true,
35943 clobberFlags: true,
35944 asm: s390x.AADD,
35945 reg: regInfo{
35946 inputs: []inputInfo{
35947 {1, 23551},
35948 {0, 56319},
35949 },
35950 outputs: []outputInfo{
35951 {0, 23551},
35952 },
35953 },
35954 },
35955 {
35956 name: "ADDW",
35957 argLen: 2,
35958 commutative: true,
35959 clobberFlags: true,
35960 asm: s390x.AADDW,
35961 reg: regInfo{
35962 inputs: []inputInfo{
35963 {1, 23551},
35964 {0, 56319},
35965 },
35966 outputs: []outputInfo{
35967 {0, 23551},
35968 },
35969 },
35970 },
35971 {
35972 name: "ADDconst",
35973 auxType: auxInt32,
35974 argLen: 1,
35975 clobberFlags: true,
35976 asm: s390x.AADD,
35977 reg: regInfo{
35978 inputs: []inputInfo{
35979 {0, 56319},
35980 },
35981 outputs: []outputInfo{
35982 {0, 23551},
35983 },
35984 },
35985 },
35986 {
35987 name: "ADDWconst",
35988 auxType: auxInt32,
35989 argLen: 1,
35990 clobberFlags: true,
35991 asm: s390x.AADDW,
35992 reg: regInfo{
35993 inputs: []inputInfo{
35994 {0, 56319},
35995 },
35996 outputs: []outputInfo{
35997 {0, 23551},
35998 },
35999 },
36000 },
36001 {
36002 name: "ADDload",
36003 auxType: auxSymOff,
36004 argLen: 3,
36005 resultInArg0: true,
36006 clobberFlags: true,
36007 faultOnNilArg1: true,
36008 symEffect: SymRead,
36009 asm: s390x.AADD,
36010 reg: regInfo{
36011 inputs: []inputInfo{
36012 {0, 23551},
36013 {1, 56318},
36014 },
36015 outputs: []outputInfo{
36016 {0, 23551},
36017 },
36018 },
36019 },
36020 {
36021 name: "ADDWload",
36022 auxType: auxSymOff,
36023 argLen: 3,
36024 resultInArg0: true,
36025 clobberFlags: true,
36026 faultOnNilArg1: true,
36027 symEffect: SymRead,
36028 asm: s390x.AADDW,
36029 reg: regInfo{
36030 inputs: []inputInfo{
36031 {0, 23551},
36032 {1, 56318},
36033 },
36034 outputs: []outputInfo{
36035 {0, 23551},
36036 },
36037 },
36038 },
36039 {
36040 name: "SUB",
36041 argLen: 2,
36042 clobberFlags: true,
36043 asm: s390x.ASUB,
36044 reg: regInfo{
36045 inputs: []inputInfo{
36046 {0, 23551},
36047 {1, 23551},
36048 },
36049 outputs: []outputInfo{
36050 {0, 23551},
36051 },
36052 },
36053 },
36054 {
36055 name: "SUBW",
36056 argLen: 2,
36057 clobberFlags: true,
36058 asm: s390x.ASUBW,
36059 reg: regInfo{
36060 inputs: []inputInfo{
36061 {0, 23551},
36062 {1, 23551},
36063 },
36064 outputs: []outputInfo{
36065 {0, 23551},
36066 },
36067 },
36068 },
36069 {
36070 name: "SUBconst",
36071 auxType: auxInt32,
36072 argLen: 1,
36073 resultInArg0: true,
36074 clobberFlags: true,
36075 asm: s390x.ASUB,
36076 reg: regInfo{
36077 inputs: []inputInfo{
36078 {0, 23551},
36079 },
36080 outputs: []outputInfo{
36081 {0, 23551},
36082 },
36083 },
36084 },
36085 {
36086 name: "SUBWconst",
36087 auxType: auxInt32,
36088 argLen: 1,
36089 resultInArg0: true,
36090 clobberFlags: true,
36091 asm: s390x.ASUBW,
36092 reg: regInfo{
36093 inputs: []inputInfo{
36094 {0, 23551},
36095 },
36096 outputs: []outputInfo{
36097 {0, 23551},
36098 },
36099 },
36100 },
36101 {
36102 name: "SUBload",
36103 auxType: auxSymOff,
36104 argLen: 3,
36105 resultInArg0: true,
36106 clobberFlags: true,
36107 faultOnNilArg1: true,
36108 symEffect: SymRead,
36109 asm: s390x.ASUB,
36110 reg: regInfo{
36111 inputs: []inputInfo{
36112 {0, 23551},
36113 {1, 56318},
36114 },
36115 outputs: []outputInfo{
36116 {0, 23551},
36117 },
36118 },
36119 },
36120 {
36121 name: "SUBWload",
36122 auxType: auxSymOff,
36123 argLen: 3,
36124 resultInArg0: true,
36125 clobberFlags: true,
36126 faultOnNilArg1: true,
36127 symEffect: SymRead,
36128 asm: s390x.ASUBW,
36129 reg: regInfo{
36130 inputs: []inputInfo{
36131 {0, 23551},
36132 {1, 56318},
36133 },
36134 outputs: []outputInfo{
36135 {0, 23551},
36136 },
36137 },
36138 },
36139 {
36140 name: "MULLD",
36141 argLen: 2,
36142 commutative: true,
36143 resultInArg0: true,
36144 clobberFlags: true,
36145 asm: s390x.AMULLD,
36146 reg: regInfo{
36147 inputs: []inputInfo{
36148 {0, 23551},
36149 {1, 23551},
36150 },
36151 outputs: []outputInfo{
36152 {0, 23551},
36153 },
36154 },
36155 },
36156 {
36157 name: "MULLW",
36158 argLen: 2,
36159 commutative: true,
36160 resultInArg0: true,
36161 clobberFlags: true,
36162 asm: s390x.AMULLW,
36163 reg: regInfo{
36164 inputs: []inputInfo{
36165 {0, 23551},
36166 {1, 23551},
36167 },
36168 outputs: []outputInfo{
36169 {0, 23551},
36170 },
36171 },
36172 },
36173 {
36174 name: "MULLDconst",
36175 auxType: auxInt32,
36176 argLen: 1,
36177 resultInArg0: true,
36178 clobberFlags: true,
36179 asm: s390x.AMULLD,
36180 reg: regInfo{
36181 inputs: []inputInfo{
36182 {0, 23551},
36183 },
36184 outputs: []outputInfo{
36185 {0, 23551},
36186 },
36187 },
36188 },
36189 {
36190 name: "MULLWconst",
36191 auxType: auxInt32,
36192 argLen: 1,
36193 resultInArg0: true,
36194 clobberFlags: true,
36195 asm: s390x.AMULLW,
36196 reg: regInfo{
36197 inputs: []inputInfo{
36198 {0, 23551},
36199 },
36200 outputs: []outputInfo{
36201 {0, 23551},
36202 },
36203 },
36204 },
36205 {
36206 name: "MULLDload",
36207 auxType: auxSymOff,
36208 argLen: 3,
36209 resultInArg0: true,
36210 clobberFlags: true,
36211 faultOnNilArg1: true,
36212 symEffect: SymRead,
36213 asm: s390x.AMULLD,
36214 reg: regInfo{
36215 inputs: []inputInfo{
36216 {0, 23551},
36217 {1, 56318},
36218 },
36219 outputs: []outputInfo{
36220 {0, 23551},
36221 },
36222 },
36223 },
36224 {
36225 name: "MULLWload",
36226 auxType: auxSymOff,
36227 argLen: 3,
36228 resultInArg0: true,
36229 clobberFlags: true,
36230 faultOnNilArg1: true,
36231 symEffect: SymRead,
36232 asm: s390x.AMULLW,
36233 reg: regInfo{
36234 inputs: []inputInfo{
36235 {0, 23551},
36236 {1, 56318},
36237 },
36238 outputs: []outputInfo{
36239 {0, 23551},
36240 },
36241 },
36242 },
36243 {
36244 name: "MULHD",
36245 argLen: 2,
36246 commutative: true,
36247 resultInArg0: true,
36248 clobberFlags: true,
36249 asm: s390x.AMULHD,
36250 reg: regInfo{
36251 inputs: []inputInfo{
36252 {0, 21503},
36253 {1, 21503},
36254 },
36255 clobbers: 2048,
36256 outputs: []outputInfo{
36257 {0, 21503},
36258 },
36259 },
36260 },
36261 {
36262 name: "MULHDU",
36263 argLen: 2,
36264 commutative: true,
36265 resultInArg0: true,
36266 clobberFlags: true,
36267 asm: s390x.AMULHDU,
36268 reg: regInfo{
36269 inputs: []inputInfo{
36270 {0, 21503},
36271 {1, 21503},
36272 },
36273 clobbers: 2048,
36274 outputs: []outputInfo{
36275 {0, 21503},
36276 },
36277 },
36278 },
36279 {
36280 name: "DIVD",
36281 argLen: 2,
36282 resultInArg0: true,
36283 clobberFlags: true,
36284 asm: s390x.ADIVD,
36285 reg: regInfo{
36286 inputs: []inputInfo{
36287 {0, 21503},
36288 {1, 21503},
36289 },
36290 clobbers: 2048,
36291 outputs: []outputInfo{
36292 {0, 21503},
36293 },
36294 },
36295 },
36296 {
36297 name: "DIVW",
36298 argLen: 2,
36299 resultInArg0: true,
36300 clobberFlags: true,
36301 asm: s390x.ADIVW,
36302 reg: regInfo{
36303 inputs: []inputInfo{
36304 {0, 21503},
36305 {1, 21503},
36306 },
36307 clobbers: 2048,
36308 outputs: []outputInfo{
36309 {0, 21503},
36310 },
36311 },
36312 },
36313 {
36314 name: "DIVDU",
36315 argLen: 2,
36316 resultInArg0: true,
36317 clobberFlags: true,
36318 asm: s390x.ADIVDU,
36319 reg: regInfo{
36320 inputs: []inputInfo{
36321 {0, 21503},
36322 {1, 21503},
36323 },
36324 clobbers: 2048,
36325 outputs: []outputInfo{
36326 {0, 21503},
36327 },
36328 },
36329 },
36330 {
36331 name: "DIVWU",
36332 argLen: 2,
36333 resultInArg0: true,
36334 clobberFlags: true,
36335 asm: s390x.ADIVWU,
36336 reg: regInfo{
36337 inputs: []inputInfo{
36338 {0, 21503},
36339 {1, 21503},
36340 },
36341 clobbers: 2048,
36342 outputs: []outputInfo{
36343 {0, 21503},
36344 },
36345 },
36346 },
36347 {
36348 name: "MODD",
36349 argLen: 2,
36350 resultInArg0: true,
36351 clobberFlags: true,
36352 asm: s390x.AMODD,
36353 reg: regInfo{
36354 inputs: []inputInfo{
36355 {0, 21503},
36356 {1, 21503},
36357 },
36358 clobbers: 2048,
36359 outputs: []outputInfo{
36360 {0, 21503},
36361 },
36362 },
36363 },
36364 {
36365 name: "MODW",
36366 argLen: 2,
36367 resultInArg0: true,
36368 clobberFlags: true,
36369 asm: s390x.AMODW,
36370 reg: regInfo{
36371 inputs: []inputInfo{
36372 {0, 21503},
36373 {1, 21503},
36374 },
36375 clobbers: 2048,
36376 outputs: []outputInfo{
36377 {0, 21503},
36378 },
36379 },
36380 },
36381 {
36382 name: "MODDU",
36383 argLen: 2,
36384 resultInArg0: true,
36385 clobberFlags: true,
36386 asm: s390x.AMODDU,
36387 reg: regInfo{
36388 inputs: []inputInfo{
36389 {0, 21503},
36390 {1, 21503},
36391 },
36392 clobbers: 2048,
36393 outputs: []outputInfo{
36394 {0, 21503},
36395 },
36396 },
36397 },
36398 {
36399 name: "MODWU",
36400 argLen: 2,
36401 resultInArg0: true,
36402 clobberFlags: true,
36403 asm: s390x.AMODWU,
36404 reg: regInfo{
36405 inputs: []inputInfo{
36406 {0, 21503},
36407 {1, 21503},
36408 },
36409 clobbers: 2048,
36410 outputs: []outputInfo{
36411 {0, 21503},
36412 },
36413 },
36414 },
36415 {
36416 name: "AND",
36417 argLen: 2,
36418 commutative: true,
36419 clobberFlags: true,
36420 asm: s390x.AAND,
36421 reg: regInfo{
36422 inputs: []inputInfo{
36423 {0, 23551},
36424 {1, 23551},
36425 },
36426 outputs: []outputInfo{
36427 {0, 23551},
36428 },
36429 },
36430 },
36431 {
36432 name: "ANDW",
36433 argLen: 2,
36434 commutative: true,
36435 clobberFlags: true,
36436 asm: s390x.AANDW,
36437 reg: regInfo{
36438 inputs: []inputInfo{
36439 {0, 23551},
36440 {1, 23551},
36441 },
36442 outputs: []outputInfo{
36443 {0, 23551},
36444 },
36445 },
36446 },
36447 {
36448 name: "ANDconst",
36449 auxType: auxInt64,
36450 argLen: 1,
36451 resultInArg0: true,
36452 clobberFlags: true,
36453 asm: s390x.AAND,
36454 reg: regInfo{
36455 inputs: []inputInfo{
36456 {0, 23551},
36457 },
36458 outputs: []outputInfo{
36459 {0, 23551},
36460 },
36461 },
36462 },
36463 {
36464 name: "ANDWconst",
36465 auxType: auxInt32,
36466 argLen: 1,
36467 resultInArg0: true,
36468 clobberFlags: true,
36469 asm: s390x.AANDW,
36470 reg: regInfo{
36471 inputs: []inputInfo{
36472 {0, 23551},
36473 },
36474 outputs: []outputInfo{
36475 {0, 23551},
36476 },
36477 },
36478 },
36479 {
36480 name: "ANDload",
36481 auxType: auxSymOff,
36482 argLen: 3,
36483 resultInArg0: true,
36484 clobberFlags: true,
36485 faultOnNilArg1: true,
36486 symEffect: SymRead,
36487 asm: s390x.AAND,
36488 reg: regInfo{
36489 inputs: []inputInfo{
36490 {0, 23551},
36491 {1, 56318},
36492 },
36493 outputs: []outputInfo{
36494 {0, 23551},
36495 },
36496 },
36497 },
36498 {
36499 name: "ANDWload",
36500 auxType: auxSymOff,
36501 argLen: 3,
36502 resultInArg0: true,
36503 clobberFlags: true,
36504 faultOnNilArg1: true,
36505 symEffect: SymRead,
36506 asm: s390x.AANDW,
36507 reg: regInfo{
36508 inputs: []inputInfo{
36509 {0, 23551},
36510 {1, 56318},
36511 },
36512 outputs: []outputInfo{
36513 {0, 23551},
36514 },
36515 },
36516 },
36517 {
36518 name: "OR",
36519 argLen: 2,
36520 commutative: true,
36521 clobberFlags: true,
36522 asm: s390x.AOR,
36523 reg: regInfo{
36524 inputs: []inputInfo{
36525 {0, 23551},
36526 {1, 23551},
36527 },
36528 outputs: []outputInfo{
36529 {0, 23551},
36530 },
36531 },
36532 },
36533 {
36534 name: "ORW",
36535 argLen: 2,
36536 commutative: true,
36537 clobberFlags: true,
36538 asm: s390x.AORW,
36539 reg: regInfo{
36540 inputs: []inputInfo{
36541 {0, 23551},
36542 {1, 23551},
36543 },
36544 outputs: []outputInfo{
36545 {0, 23551},
36546 },
36547 },
36548 },
36549 {
36550 name: "ORconst",
36551 auxType: auxInt64,
36552 argLen: 1,
36553 resultInArg0: true,
36554 clobberFlags: true,
36555 asm: s390x.AOR,
36556 reg: regInfo{
36557 inputs: []inputInfo{
36558 {0, 23551},
36559 },
36560 outputs: []outputInfo{
36561 {0, 23551},
36562 },
36563 },
36564 },
36565 {
36566 name: "ORWconst",
36567 auxType: auxInt32,
36568 argLen: 1,
36569 resultInArg0: true,
36570 clobberFlags: true,
36571 asm: s390x.AORW,
36572 reg: regInfo{
36573 inputs: []inputInfo{
36574 {0, 23551},
36575 },
36576 outputs: []outputInfo{
36577 {0, 23551},
36578 },
36579 },
36580 },
36581 {
36582 name: "ORload",
36583 auxType: auxSymOff,
36584 argLen: 3,
36585 resultInArg0: true,
36586 clobberFlags: true,
36587 faultOnNilArg1: true,
36588 symEffect: SymRead,
36589 asm: s390x.AOR,
36590 reg: regInfo{
36591 inputs: []inputInfo{
36592 {0, 23551},
36593 {1, 56318},
36594 },
36595 outputs: []outputInfo{
36596 {0, 23551},
36597 },
36598 },
36599 },
36600 {
36601 name: "ORWload",
36602 auxType: auxSymOff,
36603 argLen: 3,
36604 resultInArg0: true,
36605 clobberFlags: true,
36606 faultOnNilArg1: true,
36607 symEffect: SymRead,
36608 asm: s390x.AORW,
36609 reg: regInfo{
36610 inputs: []inputInfo{
36611 {0, 23551},
36612 {1, 56318},
36613 },
36614 outputs: []outputInfo{
36615 {0, 23551},
36616 },
36617 },
36618 },
36619 {
36620 name: "XOR",
36621 argLen: 2,
36622 commutative: true,
36623 clobberFlags: true,
36624 asm: s390x.AXOR,
36625 reg: regInfo{
36626 inputs: []inputInfo{
36627 {0, 23551},
36628 {1, 23551},
36629 },
36630 outputs: []outputInfo{
36631 {0, 23551},
36632 },
36633 },
36634 },
36635 {
36636 name: "XORW",
36637 argLen: 2,
36638 commutative: true,
36639 clobberFlags: true,
36640 asm: s390x.AXORW,
36641 reg: regInfo{
36642 inputs: []inputInfo{
36643 {0, 23551},
36644 {1, 23551},
36645 },
36646 outputs: []outputInfo{
36647 {0, 23551},
36648 },
36649 },
36650 },
36651 {
36652 name: "XORconst",
36653 auxType: auxInt64,
36654 argLen: 1,
36655 resultInArg0: true,
36656 clobberFlags: true,
36657 asm: s390x.AXOR,
36658 reg: regInfo{
36659 inputs: []inputInfo{
36660 {0, 23551},
36661 },
36662 outputs: []outputInfo{
36663 {0, 23551},
36664 },
36665 },
36666 },
36667 {
36668 name: "XORWconst",
36669 auxType: auxInt32,
36670 argLen: 1,
36671 resultInArg0: true,
36672 clobberFlags: true,
36673 asm: s390x.AXORW,
36674 reg: regInfo{
36675 inputs: []inputInfo{
36676 {0, 23551},
36677 },
36678 outputs: []outputInfo{
36679 {0, 23551},
36680 },
36681 },
36682 },
36683 {
36684 name: "XORload",
36685 auxType: auxSymOff,
36686 argLen: 3,
36687 resultInArg0: true,
36688 clobberFlags: true,
36689 faultOnNilArg1: true,
36690 symEffect: SymRead,
36691 asm: s390x.AXOR,
36692 reg: regInfo{
36693 inputs: []inputInfo{
36694 {0, 23551},
36695 {1, 56318},
36696 },
36697 outputs: []outputInfo{
36698 {0, 23551},
36699 },
36700 },
36701 },
36702 {
36703 name: "XORWload",
36704 auxType: auxSymOff,
36705 argLen: 3,
36706 resultInArg0: true,
36707 clobberFlags: true,
36708 faultOnNilArg1: true,
36709 symEffect: SymRead,
36710 asm: s390x.AXORW,
36711 reg: regInfo{
36712 inputs: []inputInfo{
36713 {0, 23551},
36714 {1, 56318},
36715 },
36716 outputs: []outputInfo{
36717 {0, 23551},
36718 },
36719 },
36720 },
36721 {
36722 name: "ADDC",
36723 argLen: 2,
36724 commutative: true,
36725 asm: s390x.AADDC,
36726 reg: regInfo{
36727 inputs: []inputInfo{
36728 {0, 23551},
36729 {1, 23551},
36730 },
36731 outputs: []outputInfo{
36732 {0, 23551},
36733 },
36734 },
36735 },
36736 {
36737 name: "ADDCconst",
36738 auxType: auxInt16,
36739 argLen: 1,
36740 asm: s390x.AADDC,
36741 reg: regInfo{
36742 inputs: []inputInfo{
36743 {0, 23551},
36744 },
36745 outputs: []outputInfo{
36746 {0, 23551},
36747 },
36748 },
36749 },
36750 {
36751 name: "ADDE",
36752 argLen: 3,
36753 commutative: true,
36754 resultInArg0: true,
36755 asm: s390x.AADDE,
36756 reg: regInfo{
36757 inputs: []inputInfo{
36758 {0, 23551},
36759 {1, 23551},
36760 },
36761 outputs: []outputInfo{
36762 {0, 23551},
36763 },
36764 },
36765 },
36766 {
36767 name: "SUBC",
36768 argLen: 2,
36769 asm: s390x.ASUBC,
36770 reg: regInfo{
36771 inputs: []inputInfo{
36772 {0, 23551},
36773 {1, 23551},
36774 },
36775 outputs: []outputInfo{
36776 {0, 23551},
36777 },
36778 },
36779 },
36780 {
36781 name: "SUBE",
36782 argLen: 3,
36783 resultInArg0: true,
36784 asm: s390x.ASUBE,
36785 reg: regInfo{
36786 inputs: []inputInfo{
36787 {0, 23551},
36788 {1, 23551},
36789 },
36790 outputs: []outputInfo{
36791 {0, 23551},
36792 },
36793 },
36794 },
36795 {
36796 name: "CMP",
36797 argLen: 2,
36798 asm: s390x.ACMP,
36799 reg: regInfo{
36800 inputs: []inputInfo{
36801 {0, 56319},
36802 {1, 56319},
36803 },
36804 },
36805 },
36806 {
36807 name: "CMPW",
36808 argLen: 2,
36809 asm: s390x.ACMPW,
36810 reg: regInfo{
36811 inputs: []inputInfo{
36812 {0, 56319},
36813 {1, 56319},
36814 },
36815 },
36816 },
36817 {
36818 name: "CMPU",
36819 argLen: 2,
36820 asm: s390x.ACMPU,
36821 reg: regInfo{
36822 inputs: []inputInfo{
36823 {0, 56319},
36824 {1, 56319},
36825 },
36826 },
36827 },
36828 {
36829 name: "CMPWU",
36830 argLen: 2,
36831 asm: s390x.ACMPWU,
36832 reg: regInfo{
36833 inputs: []inputInfo{
36834 {0, 56319},
36835 {1, 56319},
36836 },
36837 },
36838 },
36839 {
36840 name: "CMPconst",
36841 auxType: auxInt32,
36842 argLen: 1,
36843 asm: s390x.ACMP,
36844 reg: regInfo{
36845 inputs: []inputInfo{
36846 {0, 56319},
36847 },
36848 },
36849 },
36850 {
36851 name: "CMPWconst",
36852 auxType: auxInt32,
36853 argLen: 1,
36854 asm: s390x.ACMPW,
36855 reg: regInfo{
36856 inputs: []inputInfo{
36857 {0, 56319},
36858 },
36859 },
36860 },
36861 {
36862 name: "CMPUconst",
36863 auxType: auxInt32,
36864 argLen: 1,
36865 asm: s390x.ACMPU,
36866 reg: regInfo{
36867 inputs: []inputInfo{
36868 {0, 56319},
36869 },
36870 },
36871 },
36872 {
36873 name: "CMPWUconst",
36874 auxType: auxInt32,
36875 argLen: 1,
36876 asm: s390x.ACMPWU,
36877 reg: regInfo{
36878 inputs: []inputInfo{
36879 {0, 56319},
36880 },
36881 },
36882 },
36883 {
36884 name: "FCMPS",
36885 argLen: 2,
36886 asm: s390x.ACEBR,
36887 reg: regInfo{
36888 inputs: []inputInfo{
36889 {0, 4294901760},
36890 {1, 4294901760},
36891 },
36892 },
36893 },
36894 {
36895 name: "FCMP",
36896 argLen: 2,
36897 asm: s390x.AFCMPU,
36898 reg: regInfo{
36899 inputs: []inputInfo{
36900 {0, 4294901760},
36901 {1, 4294901760},
36902 },
36903 },
36904 },
36905 {
36906 name: "LTDBR",
36907 argLen: 1,
36908 asm: s390x.ALTDBR,
36909 reg: regInfo{
36910 inputs: []inputInfo{
36911 {0, 4294901760},
36912 },
36913 },
36914 },
36915 {
36916 name: "LTEBR",
36917 argLen: 1,
36918 asm: s390x.ALTEBR,
36919 reg: regInfo{
36920 inputs: []inputInfo{
36921 {0, 4294901760},
36922 },
36923 },
36924 },
36925 {
36926 name: "SLD",
36927 argLen: 2,
36928 asm: s390x.ASLD,
36929 reg: regInfo{
36930 inputs: []inputInfo{
36931 {1, 23550},
36932 {0, 23551},
36933 },
36934 outputs: []outputInfo{
36935 {0, 23551},
36936 },
36937 },
36938 },
36939 {
36940 name: "SLW",
36941 argLen: 2,
36942 asm: s390x.ASLW,
36943 reg: regInfo{
36944 inputs: []inputInfo{
36945 {1, 23550},
36946 {0, 23551},
36947 },
36948 outputs: []outputInfo{
36949 {0, 23551},
36950 },
36951 },
36952 },
36953 {
36954 name: "SLDconst",
36955 auxType: auxUInt8,
36956 argLen: 1,
36957 asm: s390x.ASLD,
36958 reg: regInfo{
36959 inputs: []inputInfo{
36960 {0, 23551},
36961 },
36962 outputs: []outputInfo{
36963 {0, 23551},
36964 },
36965 },
36966 },
36967 {
36968 name: "SLWconst",
36969 auxType: auxUInt8,
36970 argLen: 1,
36971 asm: s390x.ASLW,
36972 reg: regInfo{
36973 inputs: []inputInfo{
36974 {0, 23551},
36975 },
36976 outputs: []outputInfo{
36977 {0, 23551},
36978 },
36979 },
36980 },
36981 {
36982 name: "SRD",
36983 argLen: 2,
36984 asm: s390x.ASRD,
36985 reg: regInfo{
36986 inputs: []inputInfo{
36987 {1, 23550},
36988 {0, 23551},
36989 },
36990 outputs: []outputInfo{
36991 {0, 23551},
36992 },
36993 },
36994 },
36995 {
36996 name: "SRW",
36997 argLen: 2,
36998 asm: s390x.ASRW,
36999 reg: regInfo{
37000 inputs: []inputInfo{
37001 {1, 23550},
37002 {0, 23551},
37003 },
37004 outputs: []outputInfo{
37005 {0, 23551},
37006 },
37007 },
37008 },
37009 {
37010 name: "SRDconst",
37011 auxType: auxUInt8,
37012 argLen: 1,
37013 asm: s390x.ASRD,
37014 reg: regInfo{
37015 inputs: []inputInfo{
37016 {0, 23551},
37017 },
37018 outputs: []outputInfo{
37019 {0, 23551},
37020 },
37021 },
37022 },
37023 {
37024 name: "SRWconst",
37025 auxType: auxUInt8,
37026 argLen: 1,
37027 asm: s390x.ASRW,
37028 reg: regInfo{
37029 inputs: []inputInfo{
37030 {0, 23551},
37031 },
37032 outputs: []outputInfo{
37033 {0, 23551},
37034 },
37035 },
37036 },
37037 {
37038 name: "SRAD",
37039 argLen: 2,
37040 clobberFlags: true,
37041 asm: s390x.ASRAD,
37042 reg: regInfo{
37043 inputs: []inputInfo{
37044 {1, 23550},
37045 {0, 23551},
37046 },
37047 outputs: []outputInfo{
37048 {0, 23551},
37049 },
37050 },
37051 },
37052 {
37053 name: "SRAW",
37054 argLen: 2,
37055 clobberFlags: true,
37056 asm: s390x.ASRAW,
37057 reg: regInfo{
37058 inputs: []inputInfo{
37059 {1, 23550},
37060 {0, 23551},
37061 },
37062 outputs: []outputInfo{
37063 {0, 23551},
37064 },
37065 },
37066 },
37067 {
37068 name: "SRADconst",
37069 auxType: auxUInt8,
37070 argLen: 1,
37071 clobberFlags: true,
37072 asm: s390x.ASRAD,
37073 reg: regInfo{
37074 inputs: []inputInfo{
37075 {0, 23551},
37076 },
37077 outputs: []outputInfo{
37078 {0, 23551},
37079 },
37080 },
37081 },
37082 {
37083 name: "SRAWconst",
37084 auxType: auxUInt8,
37085 argLen: 1,
37086 clobberFlags: true,
37087 asm: s390x.ASRAW,
37088 reg: regInfo{
37089 inputs: []inputInfo{
37090 {0, 23551},
37091 },
37092 outputs: []outputInfo{
37093 {0, 23551},
37094 },
37095 },
37096 },
37097 {
37098 name: "RLLG",
37099 argLen: 2,
37100 asm: s390x.ARLLG,
37101 reg: regInfo{
37102 inputs: []inputInfo{
37103 {1, 23550},
37104 {0, 23551},
37105 },
37106 outputs: []outputInfo{
37107 {0, 23551},
37108 },
37109 },
37110 },
37111 {
37112 name: "RLL",
37113 argLen: 2,
37114 asm: s390x.ARLL,
37115 reg: regInfo{
37116 inputs: []inputInfo{
37117 {1, 23550},
37118 {0, 23551},
37119 },
37120 outputs: []outputInfo{
37121 {0, 23551},
37122 },
37123 },
37124 },
37125 {
37126 name: "RLLconst",
37127 auxType: auxUInt8,
37128 argLen: 1,
37129 asm: s390x.ARLL,
37130 reg: regInfo{
37131 inputs: []inputInfo{
37132 {0, 23551},
37133 },
37134 outputs: []outputInfo{
37135 {0, 23551},
37136 },
37137 },
37138 },
37139 {
37140 name: "RXSBG",
37141 auxType: auxS390XRotateParams,
37142 argLen: 2,
37143 resultInArg0: true,
37144 clobberFlags: true,
37145 asm: s390x.ARXSBG,
37146 reg: regInfo{
37147 inputs: []inputInfo{
37148 {0, 23551},
37149 {1, 23551},
37150 },
37151 outputs: []outputInfo{
37152 {0, 23551},
37153 },
37154 },
37155 },
37156 {
37157 name: "RISBGZ",
37158 auxType: auxS390XRotateParams,
37159 argLen: 1,
37160 clobberFlags: true,
37161 asm: s390x.ARISBGZ,
37162 reg: regInfo{
37163 inputs: []inputInfo{
37164 {0, 23551},
37165 },
37166 outputs: []outputInfo{
37167 {0, 23551},
37168 },
37169 },
37170 },
37171 {
37172 name: "NEG",
37173 argLen: 1,
37174 clobberFlags: true,
37175 asm: s390x.ANEG,
37176 reg: regInfo{
37177 inputs: []inputInfo{
37178 {0, 23551},
37179 },
37180 outputs: []outputInfo{
37181 {0, 23551},
37182 },
37183 },
37184 },
37185 {
37186 name: "NEGW",
37187 argLen: 1,
37188 clobberFlags: true,
37189 asm: s390x.ANEGW,
37190 reg: regInfo{
37191 inputs: []inputInfo{
37192 {0, 23551},
37193 },
37194 outputs: []outputInfo{
37195 {0, 23551},
37196 },
37197 },
37198 },
37199 {
37200 name: "NOT",
37201 argLen: 1,
37202 resultInArg0: true,
37203 clobberFlags: true,
37204 reg: regInfo{
37205 inputs: []inputInfo{
37206 {0, 23551},
37207 },
37208 outputs: []outputInfo{
37209 {0, 23551},
37210 },
37211 },
37212 },
37213 {
37214 name: "NOTW",
37215 argLen: 1,
37216 resultInArg0: true,
37217 clobberFlags: true,
37218 reg: regInfo{
37219 inputs: []inputInfo{
37220 {0, 23551},
37221 },
37222 outputs: []outputInfo{
37223 {0, 23551},
37224 },
37225 },
37226 },
37227 {
37228 name: "FSQRT",
37229 argLen: 1,
37230 asm: s390x.AFSQRT,
37231 reg: regInfo{
37232 inputs: []inputInfo{
37233 {0, 4294901760},
37234 },
37235 outputs: []outputInfo{
37236 {0, 4294901760},
37237 },
37238 },
37239 },
37240 {
37241 name: "FSQRTS",
37242 argLen: 1,
37243 asm: s390x.AFSQRTS,
37244 reg: regInfo{
37245 inputs: []inputInfo{
37246 {0, 4294901760},
37247 },
37248 outputs: []outputInfo{
37249 {0, 4294901760},
37250 },
37251 },
37252 },
37253 {
37254 name: "LOCGR",
37255 auxType: auxS390XCCMask,
37256 argLen: 3,
37257 resultInArg0: true,
37258 asm: s390x.ALOCGR,
37259 reg: regInfo{
37260 inputs: []inputInfo{
37261 {0, 23551},
37262 {1, 23551},
37263 },
37264 outputs: []outputInfo{
37265 {0, 23551},
37266 },
37267 },
37268 },
37269 {
37270 name: "MOVBreg",
37271 argLen: 1,
37272 asm: s390x.AMOVB,
37273 reg: regInfo{
37274 inputs: []inputInfo{
37275 {0, 56319},
37276 },
37277 outputs: []outputInfo{
37278 {0, 23551},
37279 },
37280 },
37281 },
37282 {
37283 name: "MOVBZreg",
37284 argLen: 1,
37285 asm: s390x.AMOVBZ,
37286 reg: regInfo{
37287 inputs: []inputInfo{
37288 {0, 56319},
37289 },
37290 outputs: []outputInfo{
37291 {0, 23551},
37292 },
37293 },
37294 },
37295 {
37296 name: "MOVHreg",
37297 argLen: 1,
37298 asm: s390x.AMOVH,
37299 reg: regInfo{
37300 inputs: []inputInfo{
37301 {0, 56319},
37302 },
37303 outputs: []outputInfo{
37304 {0, 23551},
37305 },
37306 },
37307 },
37308 {
37309 name: "MOVHZreg",
37310 argLen: 1,
37311 asm: s390x.AMOVHZ,
37312 reg: regInfo{
37313 inputs: []inputInfo{
37314 {0, 56319},
37315 },
37316 outputs: []outputInfo{
37317 {0, 23551},
37318 },
37319 },
37320 },
37321 {
37322 name: "MOVWreg",
37323 argLen: 1,
37324 asm: s390x.AMOVW,
37325 reg: regInfo{
37326 inputs: []inputInfo{
37327 {0, 56319},
37328 },
37329 outputs: []outputInfo{
37330 {0, 23551},
37331 },
37332 },
37333 },
37334 {
37335 name: "MOVWZreg",
37336 argLen: 1,
37337 asm: s390x.AMOVWZ,
37338 reg: regInfo{
37339 inputs: []inputInfo{
37340 {0, 56319},
37341 },
37342 outputs: []outputInfo{
37343 {0, 23551},
37344 },
37345 },
37346 },
37347 {
37348 name: "MOVDconst",
37349 auxType: auxInt64,
37350 argLen: 0,
37351 rematerializeable: true,
37352 asm: s390x.AMOVD,
37353 reg: regInfo{
37354 outputs: []outputInfo{
37355 {0, 23551},
37356 },
37357 },
37358 },
37359 {
37360 name: "LDGR",
37361 argLen: 1,
37362 asm: s390x.ALDGR,
37363 reg: regInfo{
37364 inputs: []inputInfo{
37365 {0, 23551},
37366 },
37367 outputs: []outputInfo{
37368 {0, 4294901760},
37369 },
37370 },
37371 },
37372 {
37373 name: "LGDR",
37374 argLen: 1,
37375 asm: s390x.ALGDR,
37376 reg: regInfo{
37377 inputs: []inputInfo{
37378 {0, 4294901760},
37379 },
37380 outputs: []outputInfo{
37381 {0, 23551},
37382 },
37383 },
37384 },
37385 {
37386 name: "CFDBRA",
37387 argLen: 1,
37388 clobberFlags: true,
37389 asm: s390x.ACFDBRA,
37390 reg: regInfo{
37391 inputs: []inputInfo{
37392 {0, 4294901760},
37393 },
37394 outputs: []outputInfo{
37395 {0, 23551},
37396 },
37397 },
37398 },
37399 {
37400 name: "CGDBRA",
37401 argLen: 1,
37402 clobberFlags: true,
37403 asm: s390x.ACGDBRA,
37404 reg: regInfo{
37405 inputs: []inputInfo{
37406 {0, 4294901760},
37407 },
37408 outputs: []outputInfo{
37409 {0, 23551},
37410 },
37411 },
37412 },
37413 {
37414 name: "CFEBRA",
37415 argLen: 1,
37416 clobberFlags: true,
37417 asm: s390x.ACFEBRA,
37418 reg: regInfo{
37419 inputs: []inputInfo{
37420 {0, 4294901760},
37421 },
37422 outputs: []outputInfo{
37423 {0, 23551},
37424 },
37425 },
37426 },
37427 {
37428 name: "CGEBRA",
37429 argLen: 1,
37430 clobberFlags: true,
37431 asm: s390x.ACGEBRA,
37432 reg: regInfo{
37433 inputs: []inputInfo{
37434 {0, 4294901760},
37435 },
37436 outputs: []outputInfo{
37437 {0, 23551},
37438 },
37439 },
37440 },
37441 {
37442 name: "CEFBRA",
37443 argLen: 1,
37444 clobberFlags: true,
37445 asm: s390x.ACEFBRA,
37446 reg: regInfo{
37447 inputs: []inputInfo{
37448 {0, 23551},
37449 },
37450 outputs: []outputInfo{
37451 {0, 4294901760},
37452 },
37453 },
37454 },
37455 {
37456 name: "CDFBRA",
37457 argLen: 1,
37458 clobberFlags: true,
37459 asm: s390x.ACDFBRA,
37460 reg: regInfo{
37461 inputs: []inputInfo{
37462 {0, 23551},
37463 },
37464 outputs: []outputInfo{
37465 {0, 4294901760},
37466 },
37467 },
37468 },
37469 {
37470 name: "CEGBRA",
37471 argLen: 1,
37472 clobberFlags: true,
37473 asm: s390x.ACEGBRA,
37474 reg: regInfo{
37475 inputs: []inputInfo{
37476 {0, 23551},
37477 },
37478 outputs: []outputInfo{
37479 {0, 4294901760},
37480 },
37481 },
37482 },
37483 {
37484 name: "CDGBRA",
37485 argLen: 1,
37486 clobberFlags: true,
37487 asm: s390x.ACDGBRA,
37488 reg: regInfo{
37489 inputs: []inputInfo{
37490 {0, 23551},
37491 },
37492 outputs: []outputInfo{
37493 {0, 4294901760},
37494 },
37495 },
37496 },
37497 {
37498 name: "CLFEBR",
37499 argLen: 1,
37500 clobberFlags: true,
37501 asm: s390x.ACLFEBR,
37502 reg: regInfo{
37503 inputs: []inputInfo{
37504 {0, 4294901760},
37505 },
37506 outputs: []outputInfo{
37507 {0, 23551},
37508 },
37509 },
37510 },
37511 {
37512 name: "CLFDBR",
37513 argLen: 1,
37514 clobberFlags: true,
37515 asm: s390x.ACLFDBR,
37516 reg: regInfo{
37517 inputs: []inputInfo{
37518 {0, 4294901760},
37519 },
37520 outputs: []outputInfo{
37521 {0, 23551},
37522 },
37523 },
37524 },
37525 {
37526 name: "CLGEBR",
37527 argLen: 1,
37528 clobberFlags: true,
37529 asm: s390x.ACLGEBR,
37530 reg: regInfo{
37531 inputs: []inputInfo{
37532 {0, 4294901760},
37533 },
37534 outputs: []outputInfo{
37535 {0, 23551},
37536 },
37537 },
37538 },
37539 {
37540 name: "CLGDBR",
37541 argLen: 1,
37542 clobberFlags: true,
37543 asm: s390x.ACLGDBR,
37544 reg: regInfo{
37545 inputs: []inputInfo{
37546 {0, 4294901760},
37547 },
37548 outputs: []outputInfo{
37549 {0, 23551},
37550 },
37551 },
37552 },
37553 {
37554 name: "CELFBR",
37555 argLen: 1,
37556 clobberFlags: true,
37557 asm: s390x.ACELFBR,
37558 reg: regInfo{
37559 inputs: []inputInfo{
37560 {0, 23551},
37561 },
37562 outputs: []outputInfo{
37563 {0, 4294901760},
37564 },
37565 },
37566 },
37567 {
37568 name: "CDLFBR",
37569 argLen: 1,
37570 clobberFlags: true,
37571 asm: s390x.ACDLFBR,
37572 reg: regInfo{
37573 inputs: []inputInfo{
37574 {0, 23551},
37575 },
37576 outputs: []outputInfo{
37577 {0, 4294901760},
37578 },
37579 },
37580 },
37581 {
37582 name: "CELGBR",
37583 argLen: 1,
37584 clobberFlags: true,
37585 asm: s390x.ACELGBR,
37586 reg: regInfo{
37587 inputs: []inputInfo{
37588 {0, 23551},
37589 },
37590 outputs: []outputInfo{
37591 {0, 4294901760},
37592 },
37593 },
37594 },
37595 {
37596 name: "CDLGBR",
37597 argLen: 1,
37598 clobberFlags: true,
37599 asm: s390x.ACDLGBR,
37600 reg: regInfo{
37601 inputs: []inputInfo{
37602 {0, 23551},
37603 },
37604 outputs: []outputInfo{
37605 {0, 4294901760},
37606 },
37607 },
37608 },
37609 {
37610 name: "LEDBR",
37611 argLen: 1,
37612 asm: s390x.ALEDBR,
37613 reg: regInfo{
37614 inputs: []inputInfo{
37615 {0, 4294901760},
37616 },
37617 outputs: []outputInfo{
37618 {0, 4294901760},
37619 },
37620 },
37621 },
37622 {
37623 name: "LDEBR",
37624 argLen: 1,
37625 asm: s390x.ALDEBR,
37626 reg: regInfo{
37627 inputs: []inputInfo{
37628 {0, 4294901760},
37629 },
37630 outputs: []outputInfo{
37631 {0, 4294901760},
37632 },
37633 },
37634 },
37635 {
37636 name: "MOVDaddr",
37637 auxType: auxSymOff,
37638 argLen: 1,
37639 rematerializeable: true,
37640 symEffect: SymAddr,
37641 reg: regInfo{
37642 inputs: []inputInfo{
37643 {0, 4295000064},
37644 },
37645 outputs: []outputInfo{
37646 {0, 23551},
37647 },
37648 },
37649 },
37650 {
37651 name: "MOVDaddridx",
37652 auxType: auxSymOff,
37653 argLen: 2,
37654 symEffect: SymAddr,
37655 reg: regInfo{
37656 inputs: []inputInfo{
37657 {0, 4295000064},
37658 {1, 56318},
37659 },
37660 outputs: []outputInfo{
37661 {0, 23551},
37662 },
37663 },
37664 },
37665 {
37666 name: "MOVBZload",
37667 auxType: auxSymOff,
37668 argLen: 2,
37669 faultOnNilArg0: true,
37670 symEffect: SymRead,
37671 asm: s390x.AMOVBZ,
37672 reg: regInfo{
37673 inputs: []inputInfo{
37674 {0, 4295023614},
37675 },
37676 outputs: []outputInfo{
37677 {0, 23551},
37678 },
37679 },
37680 },
37681 {
37682 name: "MOVBload",
37683 auxType: auxSymOff,
37684 argLen: 2,
37685 faultOnNilArg0: true,
37686 symEffect: SymRead,
37687 asm: s390x.AMOVB,
37688 reg: regInfo{
37689 inputs: []inputInfo{
37690 {0, 4295023614},
37691 },
37692 outputs: []outputInfo{
37693 {0, 23551},
37694 },
37695 },
37696 },
37697 {
37698 name: "MOVHZload",
37699 auxType: auxSymOff,
37700 argLen: 2,
37701 faultOnNilArg0: true,
37702 symEffect: SymRead,
37703 asm: s390x.AMOVHZ,
37704 reg: regInfo{
37705 inputs: []inputInfo{
37706 {0, 4295023614},
37707 },
37708 outputs: []outputInfo{
37709 {0, 23551},
37710 },
37711 },
37712 },
37713 {
37714 name: "MOVHload",
37715 auxType: auxSymOff,
37716 argLen: 2,
37717 faultOnNilArg0: true,
37718 symEffect: SymRead,
37719 asm: s390x.AMOVH,
37720 reg: regInfo{
37721 inputs: []inputInfo{
37722 {0, 4295023614},
37723 },
37724 outputs: []outputInfo{
37725 {0, 23551},
37726 },
37727 },
37728 },
37729 {
37730 name: "MOVWZload",
37731 auxType: auxSymOff,
37732 argLen: 2,
37733 faultOnNilArg0: true,
37734 symEffect: SymRead,
37735 asm: s390x.AMOVWZ,
37736 reg: regInfo{
37737 inputs: []inputInfo{
37738 {0, 4295023614},
37739 },
37740 outputs: []outputInfo{
37741 {0, 23551},
37742 },
37743 },
37744 },
37745 {
37746 name: "MOVWload",
37747 auxType: auxSymOff,
37748 argLen: 2,
37749 faultOnNilArg0: true,
37750 symEffect: SymRead,
37751 asm: s390x.AMOVW,
37752 reg: regInfo{
37753 inputs: []inputInfo{
37754 {0, 4295023614},
37755 },
37756 outputs: []outputInfo{
37757 {0, 23551},
37758 },
37759 },
37760 },
37761 {
37762 name: "MOVDload",
37763 auxType: auxSymOff,
37764 argLen: 2,
37765 faultOnNilArg0: true,
37766 symEffect: SymRead,
37767 asm: s390x.AMOVD,
37768 reg: regInfo{
37769 inputs: []inputInfo{
37770 {0, 4295023614},
37771 },
37772 outputs: []outputInfo{
37773 {0, 23551},
37774 },
37775 },
37776 },
37777 {
37778 name: "MOVWBR",
37779 argLen: 1,
37780 asm: s390x.AMOVWBR,
37781 reg: regInfo{
37782 inputs: []inputInfo{
37783 {0, 23551},
37784 },
37785 outputs: []outputInfo{
37786 {0, 23551},
37787 },
37788 },
37789 },
37790 {
37791 name: "MOVDBR",
37792 argLen: 1,
37793 asm: s390x.AMOVDBR,
37794 reg: regInfo{
37795 inputs: []inputInfo{
37796 {0, 23551},
37797 },
37798 outputs: []outputInfo{
37799 {0, 23551},
37800 },
37801 },
37802 },
37803 {
37804 name: "MOVHBRload",
37805 auxType: auxSymOff,
37806 argLen: 2,
37807 faultOnNilArg0: true,
37808 symEffect: SymRead,
37809 asm: s390x.AMOVHBR,
37810 reg: regInfo{
37811 inputs: []inputInfo{
37812 {0, 4295023614},
37813 },
37814 outputs: []outputInfo{
37815 {0, 23551},
37816 },
37817 },
37818 },
37819 {
37820 name: "MOVWBRload",
37821 auxType: auxSymOff,
37822 argLen: 2,
37823 faultOnNilArg0: true,
37824 symEffect: SymRead,
37825 asm: s390x.AMOVWBR,
37826 reg: regInfo{
37827 inputs: []inputInfo{
37828 {0, 4295023614},
37829 },
37830 outputs: []outputInfo{
37831 {0, 23551},
37832 },
37833 },
37834 },
37835 {
37836 name: "MOVDBRload",
37837 auxType: auxSymOff,
37838 argLen: 2,
37839 faultOnNilArg0: true,
37840 symEffect: SymRead,
37841 asm: s390x.AMOVDBR,
37842 reg: regInfo{
37843 inputs: []inputInfo{
37844 {0, 4295023614},
37845 },
37846 outputs: []outputInfo{
37847 {0, 23551},
37848 },
37849 },
37850 },
37851 {
37852 name: "MOVBstore",
37853 auxType: auxSymOff,
37854 argLen: 3,
37855 faultOnNilArg0: true,
37856 symEffect: SymWrite,
37857 asm: s390x.AMOVB,
37858 reg: regInfo{
37859 inputs: []inputInfo{
37860 {0, 4295023614},
37861 {1, 56319},
37862 },
37863 },
37864 },
37865 {
37866 name: "MOVHstore",
37867 auxType: auxSymOff,
37868 argLen: 3,
37869 faultOnNilArg0: true,
37870 symEffect: SymWrite,
37871 asm: s390x.AMOVH,
37872 reg: regInfo{
37873 inputs: []inputInfo{
37874 {0, 4295023614},
37875 {1, 56319},
37876 },
37877 },
37878 },
37879 {
37880 name: "MOVWstore",
37881 auxType: auxSymOff,
37882 argLen: 3,
37883 faultOnNilArg0: true,
37884 symEffect: SymWrite,
37885 asm: s390x.AMOVW,
37886 reg: regInfo{
37887 inputs: []inputInfo{
37888 {0, 4295023614},
37889 {1, 56319},
37890 },
37891 },
37892 },
37893 {
37894 name: "MOVDstore",
37895 auxType: auxSymOff,
37896 argLen: 3,
37897 faultOnNilArg0: true,
37898 symEffect: SymWrite,
37899 asm: s390x.AMOVD,
37900 reg: regInfo{
37901 inputs: []inputInfo{
37902 {0, 4295023614},
37903 {1, 56319},
37904 },
37905 },
37906 },
37907 {
37908 name: "MOVHBRstore",
37909 auxType: auxSymOff,
37910 argLen: 3,
37911 faultOnNilArg0: true,
37912 symEffect: SymWrite,
37913 asm: s390x.AMOVHBR,
37914 reg: regInfo{
37915 inputs: []inputInfo{
37916 {0, 56318},
37917 {1, 56319},
37918 },
37919 },
37920 },
37921 {
37922 name: "MOVWBRstore",
37923 auxType: auxSymOff,
37924 argLen: 3,
37925 faultOnNilArg0: true,
37926 symEffect: SymWrite,
37927 asm: s390x.AMOVWBR,
37928 reg: regInfo{
37929 inputs: []inputInfo{
37930 {0, 56318},
37931 {1, 56319},
37932 },
37933 },
37934 },
37935 {
37936 name: "MOVDBRstore",
37937 auxType: auxSymOff,
37938 argLen: 3,
37939 faultOnNilArg0: true,
37940 symEffect: SymWrite,
37941 asm: s390x.AMOVDBR,
37942 reg: regInfo{
37943 inputs: []inputInfo{
37944 {0, 56318},
37945 {1, 56319},
37946 },
37947 },
37948 },
37949 {
37950 name: "MVC",
37951 auxType: auxSymValAndOff,
37952 argLen: 3,
37953 clobberFlags: true,
37954 faultOnNilArg0: true,
37955 faultOnNilArg1: true,
37956 symEffect: SymNone,
37957 asm: s390x.AMVC,
37958 reg: regInfo{
37959 inputs: []inputInfo{
37960 {0, 56318},
37961 {1, 56318},
37962 },
37963 },
37964 },
37965 {
37966 name: "MOVBZloadidx",
37967 auxType: auxSymOff,
37968 argLen: 3,
37969 commutative: true,
37970 symEffect: SymRead,
37971 asm: s390x.AMOVBZ,
37972 reg: regInfo{
37973 inputs: []inputInfo{
37974 {1, 56318},
37975 {0, 4295023614},
37976 },
37977 outputs: []outputInfo{
37978 {0, 23551},
37979 },
37980 },
37981 },
37982 {
37983 name: "MOVBloadidx",
37984 auxType: auxSymOff,
37985 argLen: 3,
37986 commutative: true,
37987 symEffect: SymRead,
37988 asm: s390x.AMOVB,
37989 reg: regInfo{
37990 inputs: []inputInfo{
37991 {1, 56318},
37992 {0, 4295023614},
37993 },
37994 outputs: []outputInfo{
37995 {0, 23551},
37996 },
37997 },
37998 },
37999 {
38000 name: "MOVHZloadidx",
38001 auxType: auxSymOff,
38002 argLen: 3,
38003 commutative: true,
38004 symEffect: SymRead,
38005 asm: s390x.AMOVHZ,
38006 reg: regInfo{
38007 inputs: []inputInfo{
38008 {1, 56318},
38009 {0, 4295023614},
38010 },
38011 outputs: []outputInfo{
38012 {0, 23551},
38013 },
38014 },
38015 },
38016 {
38017 name: "MOVHloadidx",
38018 auxType: auxSymOff,
38019 argLen: 3,
38020 commutative: true,
38021 symEffect: SymRead,
38022 asm: s390x.AMOVH,
38023 reg: regInfo{
38024 inputs: []inputInfo{
38025 {1, 56318},
38026 {0, 4295023614},
38027 },
38028 outputs: []outputInfo{
38029 {0, 23551},
38030 },
38031 },
38032 },
38033 {
38034 name: "MOVWZloadidx",
38035 auxType: auxSymOff,
38036 argLen: 3,
38037 commutative: true,
38038 symEffect: SymRead,
38039 asm: s390x.AMOVWZ,
38040 reg: regInfo{
38041 inputs: []inputInfo{
38042 {1, 56318},
38043 {0, 4295023614},
38044 },
38045 outputs: []outputInfo{
38046 {0, 23551},
38047 },
38048 },
38049 },
38050 {
38051 name: "MOVWloadidx",
38052 auxType: auxSymOff,
38053 argLen: 3,
38054 commutative: true,
38055 symEffect: SymRead,
38056 asm: s390x.AMOVW,
38057 reg: regInfo{
38058 inputs: []inputInfo{
38059 {1, 56318},
38060 {0, 4295023614},
38061 },
38062 outputs: []outputInfo{
38063 {0, 23551},
38064 },
38065 },
38066 },
38067 {
38068 name: "MOVDloadidx",
38069 auxType: auxSymOff,
38070 argLen: 3,
38071 commutative: true,
38072 symEffect: SymRead,
38073 asm: s390x.AMOVD,
38074 reg: regInfo{
38075 inputs: []inputInfo{
38076 {1, 56318},
38077 {0, 4295023614},
38078 },
38079 outputs: []outputInfo{
38080 {0, 23551},
38081 },
38082 },
38083 },
38084 {
38085 name: "MOVHBRloadidx",
38086 auxType: auxSymOff,
38087 argLen: 3,
38088 commutative: true,
38089 symEffect: SymRead,
38090 asm: s390x.AMOVHBR,
38091 reg: regInfo{
38092 inputs: []inputInfo{
38093 {1, 56318},
38094 {0, 4295023614},
38095 },
38096 outputs: []outputInfo{
38097 {0, 23551},
38098 },
38099 },
38100 },
38101 {
38102 name: "MOVWBRloadidx",
38103 auxType: auxSymOff,
38104 argLen: 3,
38105 commutative: true,
38106 symEffect: SymRead,
38107 asm: s390x.AMOVWBR,
38108 reg: regInfo{
38109 inputs: []inputInfo{
38110 {1, 56318},
38111 {0, 4295023614},
38112 },
38113 outputs: []outputInfo{
38114 {0, 23551},
38115 },
38116 },
38117 },
38118 {
38119 name: "MOVDBRloadidx",
38120 auxType: auxSymOff,
38121 argLen: 3,
38122 commutative: true,
38123 symEffect: SymRead,
38124 asm: s390x.AMOVDBR,
38125 reg: regInfo{
38126 inputs: []inputInfo{
38127 {1, 56318},
38128 {0, 4295023614},
38129 },
38130 outputs: []outputInfo{
38131 {0, 23551},
38132 },
38133 },
38134 },
38135 {
38136 name: "MOVBstoreidx",
38137 auxType: auxSymOff,
38138 argLen: 4,
38139 commutative: true,
38140 symEffect: SymWrite,
38141 asm: s390x.AMOVB,
38142 reg: regInfo{
38143 inputs: []inputInfo{
38144 {0, 56318},
38145 {1, 56318},
38146 {2, 56319},
38147 },
38148 },
38149 },
38150 {
38151 name: "MOVHstoreidx",
38152 auxType: auxSymOff,
38153 argLen: 4,
38154 commutative: true,
38155 symEffect: SymWrite,
38156 asm: s390x.AMOVH,
38157 reg: regInfo{
38158 inputs: []inputInfo{
38159 {0, 56318},
38160 {1, 56318},
38161 {2, 56319},
38162 },
38163 },
38164 },
38165 {
38166 name: "MOVWstoreidx",
38167 auxType: auxSymOff,
38168 argLen: 4,
38169 commutative: true,
38170 symEffect: SymWrite,
38171 asm: s390x.AMOVW,
38172 reg: regInfo{
38173 inputs: []inputInfo{
38174 {0, 56318},
38175 {1, 56318},
38176 {2, 56319},
38177 },
38178 },
38179 },
38180 {
38181 name: "MOVDstoreidx",
38182 auxType: auxSymOff,
38183 argLen: 4,
38184 commutative: true,
38185 symEffect: SymWrite,
38186 asm: s390x.AMOVD,
38187 reg: regInfo{
38188 inputs: []inputInfo{
38189 {0, 56318},
38190 {1, 56318},
38191 {2, 56319},
38192 },
38193 },
38194 },
38195 {
38196 name: "MOVHBRstoreidx",
38197 auxType: auxSymOff,
38198 argLen: 4,
38199 commutative: true,
38200 symEffect: SymWrite,
38201 asm: s390x.AMOVHBR,
38202 reg: regInfo{
38203 inputs: []inputInfo{
38204 {0, 56318},
38205 {1, 56318},
38206 {2, 56319},
38207 },
38208 },
38209 },
38210 {
38211 name: "MOVWBRstoreidx",
38212 auxType: auxSymOff,
38213 argLen: 4,
38214 commutative: true,
38215 symEffect: SymWrite,
38216 asm: s390x.AMOVWBR,
38217 reg: regInfo{
38218 inputs: []inputInfo{
38219 {0, 56318},
38220 {1, 56318},
38221 {2, 56319},
38222 },
38223 },
38224 },
38225 {
38226 name: "MOVDBRstoreidx",
38227 auxType: auxSymOff,
38228 argLen: 4,
38229 commutative: true,
38230 symEffect: SymWrite,
38231 asm: s390x.AMOVDBR,
38232 reg: regInfo{
38233 inputs: []inputInfo{
38234 {0, 56318},
38235 {1, 56318},
38236 {2, 56319},
38237 },
38238 },
38239 },
38240 {
38241 name: "MOVBstoreconst",
38242 auxType: auxSymValAndOff,
38243 argLen: 2,
38244 faultOnNilArg0: true,
38245 symEffect: SymWrite,
38246 asm: s390x.AMOVB,
38247 reg: regInfo{
38248 inputs: []inputInfo{
38249 {0, 4295023614},
38250 },
38251 },
38252 },
38253 {
38254 name: "MOVHstoreconst",
38255 auxType: auxSymValAndOff,
38256 argLen: 2,
38257 faultOnNilArg0: true,
38258 symEffect: SymWrite,
38259 asm: s390x.AMOVH,
38260 reg: regInfo{
38261 inputs: []inputInfo{
38262 {0, 4295023614},
38263 },
38264 },
38265 },
38266 {
38267 name: "MOVWstoreconst",
38268 auxType: auxSymValAndOff,
38269 argLen: 2,
38270 faultOnNilArg0: true,
38271 symEffect: SymWrite,
38272 asm: s390x.AMOVW,
38273 reg: regInfo{
38274 inputs: []inputInfo{
38275 {0, 4295023614},
38276 },
38277 },
38278 },
38279 {
38280 name: "MOVDstoreconst",
38281 auxType: auxSymValAndOff,
38282 argLen: 2,
38283 faultOnNilArg0: true,
38284 symEffect: SymWrite,
38285 asm: s390x.AMOVD,
38286 reg: regInfo{
38287 inputs: []inputInfo{
38288 {0, 4295023614},
38289 },
38290 },
38291 },
38292 {
38293 name: "CLEAR",
38294 auxType: auxSymValAndOff,
38295 argLen: 2,
38296 clobberFlags: true,
38297 faultOnNilArg0: true,
38298 symEffect: SymWrite,
38299 asm: s390x.ACLEAR,
38300 reg: regInfo{
38301 inputs: []inputInfo{
38302 {0, 23550},
38303 },
38304 },
38305 },
38306 {
38307 name: "CALLstatic",
38308 auxType: auxCallOff,
38309 argLen: 1,
38310 clobberFlags: true,
38311 call: true,
38312 reg: regInfo{
38313 clobbers: 4294933503,
38314 },
38315 },
38316 {
38317 name: "CALLtail",
38318 auxType: auxCallOff,
38319 argLen: 1,
38320 clobberFlags: true,
38321 call: true,
38322 tailCall: true,
38323 reg: regInfo{
38324 clobbers: 4294933503,
38325 },
38326 },
38327 {
38328 name: "CALLclosure",
38329 auxType: auxCallOff,
38330 argLen: 3,
38331 clobberFlags: true,
38332 call: true,
38333 reg: regInfo{
38334 inputs: []inputInfo{
38335 {1, 4096},
38336 {0, 56318},
38337 },
38338 clobbers: 4294933503,
38339 },
38340 },
38341 {
38342 name: "CALLinter",
38343 auxType: auxCallOff,
38344 argLen: 2,
38345 clobberFlags: true,
38346 call: true,
38347 reg: regInfo{
38348 inputs: []inputInfo{
38349 {0, 23550},
38350 },
38351 clobbers: 4294933503,
38352 },
38353 },
38354 {
38355 name: "InvertFlags",
38356 argLen: 1,
38357 reg: regInfo{},
38358 },
38359 {
38360 name: "LoweredGetG",
38361 argLen: 1,
38362 reg: regInfo{
38363 outputs: []outputInfo{
38364 {0, 23551},
38365 },
38366 },
38367 },
38368 {
38369 name: "LoweredGetClosurePtr",
38370 argLen: 0,
38371 zeroWidth: true,
38372 reg: regInfo{
38373 outputs: []outputInfo{
38374 {0, 4096},
38375 },
38376 },
38377 },
38378 {
38379 name: "LoweredGetCallerSP",
38380 argLen: 1,
38381 rematerializeable: true,
38382 reg: regInfo{
38383 outputs: []outputInfo{
38384 {0, 23551},
38385 },
38386 },
38387 },
38388 {
38389 name: "LoweredGetCallerPC",
38390 argLen: 0,
38391 rematerializeable: true,
38392 reg: regInfo{
38393 outputs: []outputInfo{
38394 {0, 23551},
38395 },
38396 },
38397 },
38398 {
38399 name: "LoweredNilCheck",
38400 argLen: 2,
38401 clobberFlags: true,
38402 nilCheck: true,
38403 faultOnNilArg0: true,
38404 reg: regInfo{
38405 inputs: []inputInfo{
38406 {0, 56318},
38407 },
38408 },
38409 },
38410 {
38411 name: "LoweredRound32F",
38412 argLen: 1,
38413 resultInArg0: true,
38414 zeroWidth: true,
38415 reg: regInfo{
38416 inputs: []inputInfo{
38417 {0, 4294901760},
38418 },
38419 outputs: []outputInfo{
38420 {0, 4294901760},
38421 },
38422 },
38423 },
38424 {
38425 name: "LoweredRound64F",
38426 argLen: 1,
38427 resultInArg0: true,
38428 zeroWidth: true,
38429 reg: regInfo{
38430 inputs: []inputInfo{
38431 {0, 4294901760},
38432 },
38433 outputs: []outputInfo{
38434 {0, 4294901760},
38435 },
38436 },
38437 },
38438 {
38439 name: "LoweredWB",
38440 auxType: auxInt64,
38441 argLen: 1,
38442 clobberFlags: true,
38443 reg: regInfo{
38444 clobbers: 4294918146,
38445 outputs: []outputInfo{
38446 {0, 512},
38447 },
38448 },
38449 },
38450 {
38451 name: "LoweredPanicBoundsA",
38452 auxType: auxInt64,
38453 argLen: 3,
38454 call: true,
38455 reg: regInfo{
38456 inputs: []inputInfo{
38457 {0, 4},
38458 {1, 8},
38459 },
38460 },
38461 },
38462 {
38463 name: "LoweredPanicBoundsB",
38464 auxType: auxInt64,
38465 argLen: 3,
38466 call: true,
38467 reg: regInfo{
38468 inputs: []inputInfo{
38469 {0, 2},
38470 {1, 4},
38471 },
38472 },
38473 },
38474 {
38475 name: "LoweredPanicBoundsC",
38476 auxType: auxInt64,
38477 argLen: 3,
38478 call: true,
38479 reg: regInfo{
38480 inputs: []inputInfo{
38481 {0, 1},
38482 {1, 2},
38483 },
38484 },
38485 },
38486 {
38487 name: "FlagEQ",
38488 argLen: 0,
38489 reg: regInfo{},
38490 },
38491 {
38492 name: "FlagLT",
38493 argLen: 0,
38494 reg: regInfo{},
38495 },
38496 {
38497 name: "FlagGT",
38498 argLen: 0,
38499 reg: regInfo{},
38500 },
38501 {
38502 name: "FlagOV",
38503 argLen: 0,
38504 reg: regInfo{},
38505 },
38506 {
38507 name: "SYNC",
38508 argLen: 1,
38509 asm: s390x.ASYNC,
38510 reg: regInfo{},
38511 },
38512 {
38513 name: "MOVBZatomicload",
38514 auxType: auxSymOff,
38515 argLen: 2,
38516 faultOnNilArg0: true,
38517 symEffect: SymRead,
38518 asm: s390x.AMOVBZ,
38519 reg: regInfo{
38520 inputs: []inputInfo{
38521 {0, 4295023614},
38522 },
38523 outputs: []outputInfo{
38524 {0, 23551},
38525 },
38526 },
38527 },
38528 {
38529 name: "MOVWZatomicload",
38530 auxType: auxSymOff,
38531 argLen: 2,
38532 faultOnNilArg0: true,
38533 symEffect: SymRead,
38534 asm: s390x.AMOVWZ,
38535 reg: regInfo{
38536 inputs: []inputInfo{
38537 {0, 4295023614},
38538 },
38539 outputs: []outputInfo{
38540 {0, 23551},
38541 },
38542 },
38543 },
38544 {
38545 name: "MOVDatomicload",
38546 auxType: auxSymOff,
38547 argLen: 2,
38548 faultOnNilArg0: true,
38549 symEffect: SymRead,
38550 asm: s390x.AMOVD,
38551 reg: regInfo{
38552 inputs: []inputInfo{
38553 {0, 4295023614},
38554 },
38555 outputs: []outputInfo{
38556 {0, 23551},
38557 },
38558 },
38559 },
38560 {
38561 name: "MOVBatomicstore",
38562 auxType: auxSymOff,
38563 argLen: 3,
38564 clobberFlags: true,
38565 faultOnNilArg0: true,
38566 hasSideEffects: true,
38567 symEffect: SymWrite,
38568 asm: s390x.AMOVB,
38569 reg: regInfo{
38570 inputs: []inputInfo{
38571 {0, 4295023614},
38572 {1, 56319},
38573 },
38574 },
38575 },
38576 {
38577 name: "MOVWatomicstore",
38578 auxType: auxSymOff,
38579 argLen: 3,
38580 clobberFlags: true,
38581 faultOnNilArg0: true,
38582 hasSideEffects: true,
38583 symEffect: SymWrite,
38584 asm: s390x.AMOVW,
38585 reg: regInfo{
38586 inputs: []inputInfo{
38587 {0, 4295023614},
38588 {1, 56319},
38589 },
38590 },
38591 },
38592 {
38593 name: "MOVDatomicstore",
38594 auxType: auxSymOff,
38595 argLen: 3,
38596 clobberFlags: true,
38597 faultOnNilArg0: true,
38598 hasSideEffects: true,
38599 symEffect: SymWrite,
38600 asm: s390x.AMOVD,
38601 reg: regInfo{
38602 inputs: []inputInfo{
38603 {0, 4295023614},
38604 {1, 56319},
38605 },
38606 },
38607 },
38608 {
38609 name: "LAA",
38610 auxType: auxSymOff,
38611 argLen: 3,
38612 clobberFlags: true,
38613 faultOnNilArg0: true,
38614 hasSideEffects: true,
38615 symEffect: SymRdWr,
38616 asm: s390x.ALAA,
38617 reg: regInfo{
38618 inputs: []inputInfo{
38619 {0, 4295023614},
38620 {1, 56319},
38621 },
38622 outputs: []outputInfo{
38623 {0, 23551},
38624 },
38625 },
38626 },
38627 {
38628 name: "LAAG",
38629 auxType: auxSymOff,
38630 argLen: 3,
38631 clobberFlags: true,
38632 faultOnNilArg0: true,
38633 hasSideEffects: true,
38634 symEffect: SymRdWr,
38635 asm: s390x.ALAAG,
38636 reg: regInfo{
38637 inputs: []inputInfo{
38638 {0, 4295023614},
38639 {1, 56319},
38640 },
38641 outputs: []outputInfo{
38642 {0, 23551},
38643 },
38644 },
38645 },
38646 {
38647 name: "AddTupleFirst32",
38648 argLen: 2,
38649 reg: regInfo{},
38650 },
38651 {
38652 name: "AddTupleFirst64",
38653 argLen: 2,
38654 reg: regInfo{},
38655 },
38656 {
38657 name: "LAN",
38658 argLen: 3,
38659 clobberFlags: true,
38660 hasSideEffects: true,
38661 asm: s390x.ALAN,
38662 reg: regInfo{
38663 inputs: []inputInfo{
38664 {0, 4295023614},
38665 {1, 56319},
38666 },
38667 },
38668 },
38669 {
38670 name: "LANfloor",
38671 argLen: 3,
38672 clobberFlags: true,
38673 hasSideEffects: true,
38674 asm: s390x.ALAN,
38675 reg: regInfo{
38676 inputs: []inputInfo{
38677 {0, 2},
38678 {1, 56319},
38679 },
38680 clobbers: 2,
38681 },
38682 },
38683 {
38684 name: "LAO",
38685 argLen: 3,
38686 clobberFlags: true,
38687 hasSideEffects: true,
38688 asm: s390x.ALAO,
38689 reg: regInfo{
38690 inputs: []inputInfo{
38691 {0, 4295023614},
38692 {1, 56319},
38693 },
38694 },
38695 },
38696 {
38697 name: "LAOfloor",
38698 argLen: 3,
38699 clobberFlags: true,
38700 hasSideEffects: true,
38701 asm: s390x.ALAO,
38702 reg: regInfo{
38703 inputs: []inputInfo{
38704 {0, 2},
38705 {1, 56319},
38706 },
38707 clobbers: 2,
38708 },
38709 },
38710 {
38711 name: "LoweredAtomicCas32",
38712 auxType: auxSymOff,
38713 argLen: 4,
38714 clobberFlags: true,
38715 faultOnNilArg0: true,
38716 hasSideEffects: true,
38717 symEffect: SymRdWr,
38718 asm: s390x.ACS,
38719 reg: regInfo{
38720 inputs: []inputInfo{
38721 {1, 1},
38722 {0, 56318},
38723 {2, 56319},
38724 },
38725 clobbers: 1,
38726 outputs: []outputInfo{
38727 {1, 0},
38728 {0, 23551},
38729 },
38730 },
38731 },
38732 {
38733 name: "LoweredAtomicCas64",
38734 auxType: auxSymOff,
38735 argLen: 4,
38736 clobberFlags: true,
38737 faultOnNilArg0: true,
38738 hasSideEffects: true,
38739 symEffect: SymRdWr,
38740 asm: s390x.ACSG,
38741 reg: regInfo{
38742 inputs: []inputInfo{
38743 {1, 1},
38744 {0, 56318},
38745 {2, 56319},
38746 },
38747 clobbers: 1,
38748 outputs: []outputInfo{
38749 {1, 0},
38750 {0, 23551},
38751 },
38752 },
38753 },
38754 {
38755 name: "LoweredAtomicExchange32",
38756 auxType: auxSymOff,
38757 argLen: 3,
38758 clobberFlags: true,
38759 faultOnNilArg0: true,
38760 hasSideEffects: true,
38761 symEffect: SymRdWr,
38762 asm: s390x.ACS,
38763 reg: regInfo{
38764 inputs: []inputInfo{
38765 {0, 56318},
38766 {1, 56318},
38767 },
38768 outputs: []outputInfo{
38769 {1, 0},
38770 {0, 1},
38771 },
38772 },
38773 },
38774 {
38775 name: "LoweredAtomicExchange64",
38776 auxType: auxSymOff,
38777 argLen: 3,
38778 clobberFlags: true,
38779 faultOnNilArg0: true,
38780 hasSideEffects: true,
38781 symEffect: SymRdWr,
38782 asm: s390x.ACSG,
38783 reg: regInfo{
38784 inputs: []inputInfo{
38785 {0, 56318},
38786 {1, 56318},
38787 },
38788 outputs: []outputInfo{
38789 {1, 0},
38790 {0, 1},
38791 },
38792 },
38793 },
38794 {
38795 name: "FLOGR",
38796 argLen: 1,
38797 clobberFlags: true,
38798 asm: s390x.AFLOGR,
38799 reg: regInfo{
38800 inputs: []inputInfo{
38801 {0, 23551},
38802 },
38803 clobbers: 2,
38804 outputs: []outputInfo{
38805 {0, 1},
38806 },
38807 },
38808 },
38809 {
38810 name: "POPCNT",
38811 argLen: 1,
38812 clobberFlags: true,
38813 asm: s390x.APOPCNT,
38814 reg: regInfo{
38815 inputs: []inputInfo{
38816 {0, 23551},
38817 },
38818 outputs: []outputInfo{
38819 {0, 23551},
38820 },
38821 },
38822 },
38823 {
38824 name: "MLGR",
38825 argLen: 2,
38826 asm: s390x.AMLGR,
38827 reg: regInfo{
38828 inputs: []inputInfo{
38829 {1, 8},
38830 {0, 23551},
38831 },
38832 outputs: []outputInfo{
38833 {0, 4},
38834 {1, 8},
38835 },
38836 },
38837 },
38838 {
38839 name: "SumBytes2",
38840 argLen: 1,
38841 reg: regInfo{},
38842 },
38843 {
38844 name: "SumBytes4",
38845 argLen: 1,
38846 reg: regInfo{},
38847 },
38848 {
38849 name: "SumBytes8",
38850 argLen: 1,
38851 reg: regInfo{},
38852 },
38853 {
38854 name: "STMG2",
38855 auxType: auxSymOff,
38856 argLen: 4,
38857 clobberFlags: true,
38858 faultOnNilArg0: true,
38859 symEffect: SymWrite,
38860 asm: s390x.ASTMG,
38861 reg: regInfo{
38862 inputs: []inputInfo{
38863 {1, 2},
38864 {2, 4},
38865 {0, 56318},
38866 },
38867 },
38868 },
38869 {
38870 name: "STMG3",
38871 auxType: auxSymOff,
38872 argLen: 5,
38873 clobberFlags: true,
38874 faultOnNilArg0: true,
38875 symEffect: SymWrite,
38876 asm: s390x.ASTMG,
38877 reg: regInfo{
38878 inputs: []inputInfo{
38879 {1, 2},
38880 {2, 4},
38881 {3, 8},
38882 {0, 56318},
38883 },
38884 },
38885 },
38886 {
38887 name: "STMG4",
38888 auxType: auxSymOff,
38889 argLen: 6,
38890 clobberFlags: true,
38891 faultOnNilArg0: true,
38892 symEffect: SymWrite,
38893 asm: s390x.ASTMG,
38894 reg: regInfo{
38895 inputs: []inputInfo{
38896 {1, 2},
38897 {2, 4},
38898 {3, 8},
38899 {4, 16},
38900 {0, 56318},
38901 },
38902 },
38903 },
38904 {
38905 name: "STM2",
38906 auxType: auxSymOff,
38907 argLen: 4,
38908 clobberFlags: true,
38909 faultOnNilArg0: true,
38910 symEffect: SymWrite,
38911 asm: s390x.ASTMY,
38912 reg: regInfo{
38913 inputs: []inputInfo{
38914 {1, 2},
38915 {2, 4},
38916 {0, 56318},
38917 },
38918 },
38919 },
38920 {
38921 name: "STM3",
38922 auxType: auxSymOff,
38923 argLen: 5,
38924 clobberFlags: true,
38925 faultOnNilArg0: true,
38926 symEffect: SymWrite,
38927 asm: s390x.ASTMY,
38928 reg: regInfo{
38929 inputs: []inputInfo{
38930 {1, 2},
38931 {2, 4},
38932 {3, 8},
38933 {0, 56318},
38934 },
38935 },
38936 },
38937 {
38938 name: "STM4",
38939 auxType: auxSymOff,
38940 argLen: 6,
38941 clobberFlags: true,
38942 faultOnNilArg0: true,
38943 symEffect: SymWrite,
38944 asm: s390x.ASTMY,
38945 reg: regInfo{
38946 inputs: []inputInfo{
38947 {1, 2},
38948 {2, 4},
38949 {3, 8},
38950 {4, 16},
38951 {0, 56318},
38952 },
38953 },
38954 },
38955 {
38956 name: "LoweredMove",
38957 auxType: auxInt64,
38958 argLen: 4,
38959 clobberFlags: true,
38960 faultOnNilArg0: true,
38961 faultOnNilArg1: true,
38962 reg: regInfo{
38963 inputs: []inputInfo{
38964 {0, 2},
38965 {1, 4},
38966 {2, 56319},
38967 },
38968 clobbers: 6,
38969 },
38970 },
38971 {
38972 name: "LoweredZero",
38973 auxType: auxInt64,
38974 argLen: 3,
38975 clobberFlags: true,
38976 faultOnNilArg0: true,
38977 reg: regInfo{
38978 inputs: []inputInfo{
38979 {0, 2},
38980 {1, 56319},
38981 },
38982 clobbers: 2,
38983 },
38984 },
38985
38986 {
38987 name: "LoweredStaticCall",
38988 auxType: auxCallOff,
38989 argLen: 1,
38990 call: true,
38991 reg: regInfo{
38992 clobbers: 844424930131967,
38993 },
38994 },
38995 {
38996 name: "LoweredTailCall",
38997 auxType: auxCallOff,
38998 argLen: 1,
38999 call: true,
39000 tailCall: true,
39001 reg: regInfo{
39002 clobbers: 844424930131967,
39003 },
39004 },
39005 {
39006 name: "LoweredClosureCall",
39007 auxType: auxCallOff,
39008 argLen: 3,
39009 call: true,
39010 reg: regInfo{
39011 inputs: []inputInfo{
39012 {0, 65535},
39013 {1, 65535},
39014 },
39015 clobbers: 844424930131967,
39016 },
39017 },
39018 {
39019 name: "LoweredInterCall",
39020 auxType: auxCallOff,
39021 argLen: 2,
39022 call: true,
39023 reg: regInfo{
39024 inputs: []inputInfo{
39025 {0, 65535},
39026 },
39027 clobbers: 844424930131967,
39028 },
39029 },
39030 {
39031 name: "LoweredAddr",
39032 auxType: auxSymOff,
39033 argLen: 1,
39034 rematerializeable: true,
39035 symEffect: SymAddr,
39036 reg: regInfo{
39037 inputs: []inputInfo{
39038 {0, 281474976776191},
39039 },
39040 outputs: []outputInfo{
39041 {0, 65535},
39042 },
39043 },
39044 },
39045 {
39046 name: "LoweredMove",
39047 auxType: auxInt64,
39048 argLen: 3,
39049 reg: regInfo{
39050 inputs: []inputInfo{
39051 {0, 65535},
39052 {1, 65535},
39053 },
39054 },
39055 },
39056 {
39057 name: "LoweredZero",
39058 auxType: auxInt64,
39059 argLen: 2,
39060 reg: regInfo{
39061 inputs: []inputInfo{
39062 {0, 65535},
39063 },
39064 },
39065 },
39066 {
39067 name: "LoweredGetClosurePtr",
39068 argLen: 0,
39069 reg: regInfo{
39070 outputs: []outputInfo{
39071 {0, 65535},
39072 },
39073 },
39074 },
39075 {
39076 name: "LoweredGetCallerPC",
39077 argLen: 0,
39078 rematerializeable: true,
39079 reg: regInfo{
39080 outputs: []outputInfo{
39081 {0, 65535},
39082 },
39083 },
39084 },
39085 {
39086 name: "LoweredGetCallerSP",
39087 argLen: 1,
39088 rematerializeable: true,
39089 reg: regInfo{
39090 outputs: []outputInfo{
39091 {0, 65535},
39092 },
39093 },
39094 },
39095 {
39096 name: "LoweredNilCheck",
39097 argLen: 2,
39098 nilCheck: true,
39099 faultOnNilArg0: true,
39100 reg: regInfo{
39101 inputs: []inputInfo{
39102 {0, 65535},
39103 },
39104 },
39105 },
39106 {
39107 name: "LoweredWB",
39108 auxType: auxInt64,
39109 argLen: 1,
39110 reg: regInfo{
39111 clobbers: 844424930131967,
39112 outputs: []outputInfo{
39113 {0, 65535},
39114 },
39115 },
39116 },
39117 {
39118 name: "LoweredConvert",
39119 argLen: 2,
39120 reg: regInfo{
39121 inputs: []inputInfo{
39122 {0, 65535},
39123 },
39124 outputs: []outputInfo{
39125 {0, 65535},
39126 },
39127 },
39128 },
39129 {
39130 name: "Select",
39131 argLen: 3,
39132 asm: wasm.ASelect,
39133 reg: regInfo{
39134 inputs: []inputInfo{
39135 {0, 281474976776191},
39136 {1, 281474976776191},
39137 {2, 281474976776191},
39138 },
39139 outputs: []outputInfo{
39140 {0, 65535},
39141 },
39142 },
39143 },
39144 {
39145 name: "I64Load8U",
39146 auxType: auxInt64,
39147 argLen: 2,
39148 asm: wasm.AI64Load8U,
39149 reg: regInfo{
39150 inputs: []inputInfo{
39151 {0, 1407374883618815},
39152 },
39153 outputs: []outputInfo{
39154 {0, 65535},
39155 },
39156 },
39157 },
39158 {
39159 name: "I64Load8S",
39160 auxType: auxInt64,
39161 argLen: 2,
39162 asm: wasm.AI64Load8S,
39163 reg: regInfo{
39164 inputs: []inputInfo{
39165 {0, 1407374883618815},
39166 },
39167 outputs: []outputInfo{
39168 {0, 65535},
39169 },
39170 },
39171 },
39172 {
39173 name: "I64Load16U",
39174 auxType: auxInt64,
39175 argLen: 2,
39176 asm: wasm.AI64Load16U,
39177 reg: regInfo{
39178 inputs: []inputInfo{
39179 {0, 1407374883618815},
39180 },
39181 outputs: []outputInfo{
39182 {0, 65535},
39183 },
39184 },
39185 },
39186 {
39187 name: "I64Load16S",
39188 auxType: auxInt64,
39189 argLen: 2,
39190 asm: wasm.AI64Load16S,
39191 reg: regInfo{
39192 inputs: []inputInfo{
39193 {0, 1407374883618815},
39194 },
39195 outputs: []outputInfo{
39196 {0, 65535},
39197 },
39198 },
39199 },
39200 {
39201 name: "I64Load32U",
39202 auxType: auxInt64,
39203 argLen: 2,
39204 asm: wasm.AI64Load32U,
39205 reg: regInfo{
39206 inputs: []inputInfo{
39207 {0, 1407374883618815},
39208 },
39209 outputs: []outputInfo{
39210 {0, 65535},
39211 },
39212 },
39213 },
39214 {
39215 name: "I64Load32S",
39216 auxType: auxInt64,
39217 argLen: 2,
39218 asm: wasm.AI64Load32S,
39219 reg: regInfo{
39220 inputs: []inputInfo{
39221 {0, 1407374883618815},
39222 },
39223 outputs: []outputInfo{
39224 {0, 65535},
39225 },
39226 },
39227 },
39228 {
39229 name: "I64Load",
39230 auxType: auxInt64,
39231 argLen: 2,
39232 asm: wasm.AI64Load,
39233 reg: regInfo{
39234 inputs: []inputInfo{
39235 {0, 1407374883618815},
39236 },
39237 outputs: []outputInfo{
39238 {0, 65535},
39239 },
39240 },
39241 },
39242 {
39243 name: "I64Store8",
39244 auxType: auxInt64,
39245 argLen: 3,
39246 asm: wasm.AI64Store8,
39247 reg: regInfo{
39248 inputs: []inputInfo{
39249 {1, 281474976776191},
39250 {0, 1407374883618815},
39251 },
39252 },
39253 },
39254 {
39255 name: "I64Store16",
39256 auxType: auxInt64,
39257 argLen: 3,
39258 asm: wasm.AI64Store16,
39259 reg: regInfo{
39260 inputs: []inputInfo{
39261 {1, 281474976776191},
39262 {0, 1407374883618815},
39263 },
39264 },
39265 },
39266 {
39267 name: "I64Store32",
39268 auxType: auxInt64,
39269 argLen: 3,
39270 asm: wasm.AI64Store32,
39271 reg: regInfo{
39272 inputs: []inputInfo{
39273 {1, 281474976776191},
39274 {0, 1407374883618815},
39275 },
39276 },
39277 },
39278 {
39279 name: "I64Store",
39280 auxType: auxInt64,
39281 argLen: 3,
39282 asm: wasm.AI64Store,
39283 reg: regInfo{
39284 inputs: []inputInfo{
39285 {1, 281474976776191},
39286 {0, 1407374883618815},
39287 },
39288 },
39289 },
39290 {
39291 name: "F32Load",
39292 auxType: auxInt64,
39293 argLen: 2,
39294 asm: wasm.AF32Load,
39295 reg: regInfo{
39296 inputs: []inputInfo{
39297 {0, 1407374883618815},
39298 },
39299 outputs: []outputInfo{
39300 {0, 4294901760},
39301 },
39302 },
39303 },
39304 {
39305 name: "F64Load",
39306 auxType: auxInt64,
39307 argLen: 2,
39308 asm: wasm.AF64Load,
39309 reg: regInfo{
39310 inputs: []inputInfo{
39311 {0, 1407374883618815},
39312 },
39313 outputs: []outputInfo{
39314 {0, 281470681743360},
39315 },
39316 },
39317 },
39318 {
39319 name: "F32Store",
39320 auxType: auxInt64,
39321 argLen: 3,
39322 asm: wasm.AF32Store,
39323 reg: regInfo{
39324 inputs: []inputInfo{
39325 {1, 4294901760},
39326 {0, 1407374883618815},
39327 },
39328 },
39329 },
39330 {
39331 name: "F64Store",
39332 auxType: auxInt64,
39333 argLen: 3,
39334 asm: wasm.AF64Store,
39335 reg: regInfo{
39336 inputs: []inputInfo{
39337 {1, 281470681743360},
39338 {0, 1407374883618815},
39339 },
39340 },
39341 },
39342 {
39343 name: "I64Const",
39344 auxType: auxInt64,
39345 argLen: 0,
39346 rematerializeable: true,
39347 reg: regInfo{
39348 outputs: []outputInfo{
39349 {0, 65535},
39350 },
39351 },
39352 },
39353 {
39354 name: "F32Const",
39355 auxType: auxFloat32,
39356 argLen: 0,
39357 rematerializeable: true,
39358 reg: regInfo{
39359 outputs: []outputInfo{
39360 {0, 4294901760},
39361 },
39362 },
39363 },
39364 {
39365 name: "F64Const",
39366 auxType: auxFloat64,
39367 argLen: 0,
39368 rematerializeable: true,
39369 reg: regInfo{
39370 outputs: []outputInfo{
39371 {0, 281470681743360},
39372 },
39373 },
39374 },
39375 {
39376 name: "I64Eqz",
39377 argLen: 1,
39378 asm: wasm.AI64Eqz,
39379 reg: regInfo{
39380 inputs: []inputInfo{
39381 {0, 281474976776191},
39382 },
39383 outputs: []outputInfo{
39384 {0, 65535},
39385 },
39386 },
39387 },
39388 {
39389 name: "I64Eq",
39390 argLen: 2,
39391 asm: wasm.AI64Eq,
39392 reg: regInfo{
39393 inputs: []inputInfo{
39394 {0, 281474976776191},
39395 {1, 281474976776191},
39396 },
39397 outputs: []outputInfo{
39398 {0, 65535},
39399 },
39400 },
39401 },
39402 {
39403 name: "I64Ne",
39404 argLen: 2,
39405 asm: wasm.AI64Ne,
39406 reg: regInfo{
39407 inputs: []inputInfo{
39408 {0, 281474976776191},
39409 {1, 281474976776191},
39410 },
39411 outputs: []outputInfo{
39412 {0, 65535},
39413 },
39414 },
39415 },
39416 {
39417 name: "I64LtS",
39418 argLen: 2,
39419 asm: wasm.AI64LtS,
39420 reg: regInfo{
39421 inputs: []inputInfo{
39422 {0, 281474976776191},
39423 {1, 281474976776191},
39424 },
39425 outputs: []outputInfo{
39426 {0, 65535},
39427 },
39428 },
39429 },
39430 {
39431 name: "I64LtU",
39432 argLen: 2,
39433 asm: wasm.AI64LtU,
39434 reg: regInfo{
39435 inputs: []inputInfo{
39436 {0, 281474976776191},
39437 {1, 281474976776191},
39438 },
39439 outputs: []outputInfo{
39440 {0, 65535},
39441 },
39442 },
39443 },
39444 {
39445 name: "I64GtS",
39446 argLen: 2,
39447 asm: wasm.AI64GtS,
39448 reg: regInfo{
39449 inputs: []inputInfo{
39450 {0, 281474976776191},
39451 {1, 281474976776191},
39452 },
39453 outputs: []outputInfo{
39454 {0, 65535},
39455 },
39456 },
39457 },
39458 {
39459 name: "I64GtU",
39460 argLen: 2,
39461 asm: wasm.AI64GtU,
39462 reg: regInfo{
39463 inputs: []inputInfo{
39464 {0, 281474976776191},
39465 {1, 281474976776191},
39466 },
39467 outputs: []outputInfo{
39468 {0, 65535},
39469 },
39470 },
39471 },
39472 {
39473 name: "I64LeS",
39474 argLen: 2,
39475 asm: wasm.AI64LeS,
39476 reg: regInfo{
39477 inputs: []inputInfo{
39478 {0, 281474976776191},
39479 {1, 281474976776191},
39480 },
39481 outputs: []outputInfo{
39482 {0, 65535},
39483 },
39484 },
39485 },
39486 {
39487 name: "I64LeU",
39488 argLen: 2,
39489 asm: wasm.AI64LeU,
39490 reg: regInfo{
39491 inputs: []inputInfo{
39492 {0, 281474976776191},
39493 {1, 281474976776191},
39494 },
39495 outputs: []outputInfo{
39496 {0, 65535},
39497 },
39498 },
39499 },
39500 {
39501 name: "I64GeS",
39502 argLen: 2,
39503 asm: wasm.AI64GeS,
39504 reg: regInfo{
39505 inputs: []inputInfo{
39506 {0, 281474976776191},
39507 {1, 281474976776191},
39508 },
39509 outputs: []outputInfo{
39510 {0, 65535},
39511 },
39512 },
39513 },
39514 {
39515 name: "I64GeU",
39516 argLen: 2,
39517 asm: wasm.AI64GeU,
39518 reg: regInfo{
39519 inputs: []inputInfo{
39520 {0, 281474976776191},
39521 {1, 281474976776191},
39522 },
39523 outputs: []outputInfo{
39524 {0, 65535},
39525 },
39526 },
39527 },
39528 {
39529 name: "F32Eq",
39530 argLen: 2,
39531 asm: wasm.AF32Eq,
39532 reg: regInfo{
39533 inputs: []inputInfo{
39534 {0, 4294901760},
39535 {1, 4294901760},
39536 },
39537 outputs: []outputInfo{
39538 {0, 65535},
39539 },
39540 },
39541 },
39542 {
39543 name: "F32Ne",
39544 argLen: 2,
39545 asm: wasm.AF32Ne,
39546 reg: regInfo{
39547 inputs: []inputInfo{
39548 {0, 4294901760},
39549 {1, 4294901760},
39550 },
39551 outputs: []outputInfo{
39552 {0, 65535},
39553 },
39554 },
39555 },
39556 {
39557 name: "F32Lt",
39558 argLen: 2,
39559 asm: wasm.AF32Lt,
39560 reg: regInfo{
39561 inputs: []inputInfo{
39562 {0, 4294901760},
39563 {1, 4294901760},
39564 },
39565 outputs: []outputInfo{
39566 {0, 65535},
39567 },
39568 },
39569 },
39570 {
39571 name: "F32Gt",
39572 argLen: 2,
39573 asm: wasm.AF32Gt,
39574 reg: regInfo{
39575 inputs: []inputInfo{
39576 {0, 4294901760},
39577 {1, 4294901760},
39578 },
39579 outputs: []outputInfo{
39580 {0, 65535},
39581 },
39582 },
39583 },
39584 {
39585 name: "F32Le",
39586 argLen: 2,
39587 asm: wasm.AF32Le,
39588 reg: regInfo{
39589 inputs: []inputInfo{
39590 {0, 4294901760},
39591 {1, 4294901760},
39592 },
39593 outputs: []outputInfo{
39594 {0, 65535},
39595 },
39596 },
39597 },
39598 {
39599 name: "F32Ge",
39600 argLen: 2,
39601 asm: wasm.AF32Ge,
39602 reg: regInfo{
39603 inputs: []inputInfo{
39604 {0, 4294901760},
39605 {1, 4294901760},
39606 },
39607 outputs: []outputInfo{
39608 {0, 65535},
39609 },
39610 },
39611 },
39612 {
39613 name: "F64Eq",
39614 argLen: 2,
39615 asm: wasm.AF64Eq,
39616 reg: regInfo{
39617 inputs: []inputInfo{
39618 {0, 281470681743360},
39619 {1, 281470681743360},
39620 },
39621 outputs: []outputInfo{
39622 {0, 65535},
39623 },
39624 },
39625 },
39626 {
39627 name: "F64Ne",
39628 argLen: 2,
39629 asm: wasm.AF64Ne,
39630 reg: regInfo{
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39852 argLen: 2,
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39866 argLen: 2,
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39880 argLen: 2,
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39922 asm: wasm.AF32Sub,
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39992 reg: regInfo{
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40032 argLen: 1,
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40043 {
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40045 argLen: 1,
40046 asm: wasm.AI64TruncSatF64U,
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40056 {
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40058 argLen: 1,
40059 asm: wasm.AI64TruncSatF32S,
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40069 {
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40071 argLen: 1,
40072 asm: wasm.AI64TruncSatF32U,
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40082 {
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40084 argLen: 1,
40085 asm: wasm.AF32ConvertI64S,
40086 reg: regInfo{
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40095 {
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40097 argLen: 1,
40098 asm: wasm.AF32ConvertI64U,
40099 reg: regInfo{
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40108 {
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40110 argLen: 1,
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40112 reg: regInfo{
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40121 {
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40123 argLen: 1,
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40125 reg: regInfo{
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40134 {
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40147 {
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40160 {
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40173 {
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40186 {
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40199 {
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40212 {
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40225 {
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40229 reg: regInfo{
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40238 {
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40251 {
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40264 {
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40277 {
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40280 asm: wasm.AF32Copysign,
40281 reg: regInfo{
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40290 },
40291 {
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40294 asm: wasm.AF64Sqrt,
40295 reg: regInfo{
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40304 {
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40308 reg: regInfo{
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40317 {
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40330 {
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40334 reg: regInfo{
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40342 },
40343 {
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40347 reg: regInfo{
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40351 outputs: []outputInfo{
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40355 },
40356 {
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40359 asm: wasm.AF64Abs,
40360 reg: regInfo{
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40369 {
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40373 reg: regInfo{
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40376 {1, 281470681743360},
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40381 },
40382 },
40383 {
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40385 argLen: 1,
40386 asm: wasm.AI64Ctz,
40387 reg: regInfo{
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40391 outputs: []outputInfo{
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40395 },
40396 {
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40398 argLen: 1,
40399 asm: wasm.AI64Clz,
40400 reg: regInfo{
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40404 outputs: []outputInfo{
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40409 {
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40412 asm: wasm.AI32Rotl,
40413 reg: regInfo{
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40423 {
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40425 argLen: 2,
40426 asm: wasm.AI64Rotl,
40427 reg: regInfo{
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40430 {1, 281474976776191},
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40435 },
40436 },
40437 {
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40439 argLen: 1,
40440 asm: wasm.AI64Popcnt,
40441 reg: regInfo{
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40443 {0, 281474976776191},
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40445 outputs: []outputInfo{
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40449 },
40450
40451 {
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40454 commutative: true,
40455 generic: true,
40456 },
40457 {
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40459 argLen: 2,
40460 commutative: true,
40461 generic: true,
40462 },
40463 {
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40465 argLen: 2,
40466 commutative: true,
40467 generic: true,
40468 },
40469 {
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40471 argLen: 2,
40472 commutative: true,
40473 generic: true,
40474 },
40475 {
40476 name: "AddPtr",
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40478 generic: true,
40479 },
40480 {
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40482 argLen: 2,
40483 commutative: true,
40484 generic: true,
40485 },
40486 {
40487 name: "Add64F",
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40489 commutative: true,
40490 generic: true,
40491 },
40492 {
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40495 generic: true,
40496 },
40497 {
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40500 generic: true,
40501 },
40502 {
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40505 generic: true,
40506 },
40507 {
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40510 generic: true,
40511 },
40512 {
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40515 generic: true,
40516 },
40517 {
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40520 generic: true,
40521 },
40522 {
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40525 generic: true,
40526 },
40527 {
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40529 argLen: 2,
40530 commutative: true,
40531 generic: true,
40532 },
40533 {
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40536 commutative: true,
40537 generic: true,
40538 },
40539 {
40540 name: "Mul32",
40541 argLen: 2,
40542 commutative: true,
40543 generic: true,
40544 },
40545 {
40546 name: "Mul64",
40547 argLen: 2,
40548 commutative: true,
40549 generic: true,
40550 },
40551 {
40552 name: "Mul32F",
40553 argLen: 2,
40554 commutative: true,
40555 generic: true,
40556 },
40557 {
40558 name: "Mul64F",
40559 argLen: 2,
40560 commutative: true,
40561 generic: true,
40562 },
40563 {
40564 name: "Div32F",
40565 argLen: 2,
40566 generic: true,
40567 },
40568 {
40569 name: "Div64F",
40570 argLen: 2,
40571 generic: true,
40572 },
40573 {
40574 name: "Hmul32",
40575 argLen: 2,
40576 commutative: true,
40577 generic: true,
40578 },
40579 {
40580 name: "Hmul32u",
40581 argLen: 2,
40582 commutative: true,
40583 generic: true,
40584 },
40585 {
40586 name: "Hmul64",
40587 argLen: 2,
40588 commutative: true,
40589 generic: true,
40590 },
40591 {
40592 name: "Hmul64u",
40593 argLen: 2,
40594 commutative: true,
40595 generic: true,
40596 },
40597 {
40598 name: "Mul32uhilo",
40599 argLen: 2,
40600 commutative: true,
40601 generic: true,
40602 },
40603 {
40604 name: "Mul64uhilo",
40605 argLen: 2,
40606 commutative: true,
40607 generic: true,
40608 },
40609 {
40610 name: "Mul32uover",
40611 argLen: 2,
40612 commutative: true,
40613 generic: true,
40614 },
40615 {
40616 name: "Mul64uover",
40617 argLen: 2,
40618 commutative: true,
40619 generic: true,
40620 },
40621 {
40622 name: "Avg32u",
40623 argLen: 2,
40624 generic: true,
40625 },
40626 {
40627 name: "Avg64u",
40628 argLen: 2,
40629 generic: true,
40630 },
40631 {
40632 name: "Div8",
40633 argLen: 2,
40634 generic: true,
40635 },
40636 {
40637 name: "Div8u",
40638 argLen: 2,
40639 generic: true,
40640 },
40641 {
40642 name: "Div16",
40643 auxType: auxBool,
40644 argLen: 2,
40645 generic: true,
40646 },
40647 {
40648 name: "Div16u",
40649 argLen: 2,
40650 generic: true,
40651 },
40652 {
40653 name: "Div32",
40654 auxType: auxBool,
40655 argLen: 2,
40656 generic: true,
40657 },
40658 {
40659 name: "Div32u",
40660 argLen: 2,
40661 generic: true,
40662 },
40663 {
40664 name: "Div64",
40665 auxType: auxBool,
40666 argLen: 2,
40667 generic: true,
40668 },
40669 {
40670 name: "Div64u",
40671 argLen: 2,
40672 generic: true,
40673 },
40674 {
40675 name: "Div128u",
40676 argLen: 3,
40677 generic: true,
40678 },
40679 {
40680 name: "Mod8",
40681 argLen: 2,
40682 generic: true,
40683 },
40684 {
40685 name: "Mod8u",
40686 argLen: 2,
40687 generic: true,
40688 },
40689 {
40690 name: "Mod16",
40691 auxType: auxBool,
40692 argLen: 2,
40693 generic: true,
40694 },
40695 {
40696 name: "Mod16u",
40697 argLen: 2,
40698 generic: true,
40699 },
40700 {
40701 name: "Mod32",
40702 auxType: auxBool,
40703 argLen: 2,
40704 generic: true,
40705 },
40706 {
40707 name: "Mod32u",
40708 argLen: 2,
40709 generic: true,
40710 },
40711 {
40712 name: "Mod64",
40713 auxType: auxBool,
40714 argLen: 2,
40715 generic: true,
40716 },
40717 {
40718 name: "Mod64u",
40719 argLen: 2,
40720 generic: true,
40721 },
40722 {
40723 name: "And8",
40724 argLen: 2,
40725 commutative: true,
40726 generic: true,
40727 },
40728 {
40729 name: "And16",
40730 argLen: 2,
40731 commutative: true,
40732 generic: true,
40733 },
40734 {
40735 name: "And32",
40736 argLen: 2,
40737 commutative: true,
40738 generic: true,
40739 },
40740 {
40741 name: "And64",
40742 argLen: 2,
40743 commutative: true,
40744 generic: true,
40745 },
40746 {
40747 name: "Or8",
40748 argLen: 2,
40749 commutative: true,
40750 generic: true,
40751 },
40752 {
40753 name: "Or16",
40754 argLen: 2,
40755 commutative: true,
40756 generic: true,
40757 },
40758 {
40759 name: "Or32",
40760 argLen: 2,
40761 commutative: true,
40762 generic: true,
40763 },
40764 {
40765 name: "Or64",
40766 argLen: 2,
40767 commutative: true,
40768 generic: true,
40769 },
40770 {
40771 name: "Xor8",
40772 argLen: 2,
40773 commutative: true,
40774 generic: true,
40775 },
40776 {
40777 name: "Xor16",
40778 argLen: 2,
40779 commutative: true,
40780 generic: true,
40781 },
40782 {
40783 name: "Xor32",
40784 argLen: 2,
40785 commutative: true,
40786 generic: true,
40787 },
40788 {
40789 name: "Xor64",
40790 argLen: 2,
40791 commutative: true,
40792 generic: true,
40793 },
40794 {
40795 name: "Lsh8x8",
40796 auxType: auxBool,
40797 argLen: 2,
40798 generic: true,
40799 },
40800 {
40801 name: "Lsh8x16",
40802 auxType: auxBool,
40803 argLen: 2,
40804 generic: true,
40805 },
40806 {
40807 name: "Lsh8x32",
40808 auxType: auxBool,
40809 argLen: 2,
40810 generic: true,
40811 },
40812 {
40813 name: "Lsh8x64",
40814 auxType: auxBool,
40815 argLen: 2,
40816 generic: true,
40817 },
40818 {
40819 name: "Lsh16x8",
40820 auxType: auxBool,
40821 argLen: 2,
40822 generic: true,
40823 },
40824 {
40825 name: "Lsh16x16",
40826 auxType: auxBool,
40827 argLen: 2,
40828 generic: true,
40829 },
40830 {
40831 name: "Lsh16x32",
40832 auxType: auxBool,
40833 argLen: 2,
40834 generic: true,
40835 },
40836 {
40837 name: "Lsh16x64",
40838 auxType: auxBool,
40839 argLen: 2,
40840 generic: true,
40841 },
40842 {
40843 name: "Lsh32x8",
40844 auxType: auxBool,
40845 argLen: 2,
40846 generic: true,
40847 },
40848 {
40849 name: "Lsh32x16",
40850 auxType: auxBool,
40851 argLen: 2,
40852 generic: true,
40853 },
40854 {
40855 name: "Lsh32x32",
40856 auxType: auxBool,
40857 argLen: 2,
40858 generic: true,
40859 },
40860 {
40861 name: "Lsh32x64",
40862 auxType: auxBool,
40863 argLen: 2,
40864 generic: true,
40865 },
40866 {
40867 name: "Lsh64x8",
40868 auxType: auxBool,
40869 argLen: 2,
40870 generic: true,
40871 },
40872 {
40873 name: "Lsh64x16",
40874 auxType: auxBool,
40875 argLen: 2,
40876 generic: true,
40877 },
40878 {
40879 name: "Lsh64x32",
40880 auxType: auxBool,
40881 argLen: 2,
40882 generic: true,
40883 },
40884 {
40885 name: "Lsh64x64",
40886 auxType: auxBool,
40887 argLen: 2,
40888 generic: true,
40889 },
40890 {
40891 name: "Rsh8x8",
40892 auxType: auxBool,
40893 argLen: 2,
40894 generic: true,
40895 },
40896 {
40897 name: "Rsh8x16",
40898 auxType: auxBool,
40899 argLen: 2,
40900 generic: true,
40901 },
40902 {
40903 name: "Rsh8x32",
40904 auxType: auxBool,
40905 argLen: 2,
40906 generic: true,
40907 },
40908 {
40909 name: "Rsh8x64",
40910 auxType: auxBool,
40911 argLen: 2,
40912 generic: true,
40913 },
40914 {
40915 name: "Rsh16x8",
40916 auxType: auxBool,
40917 argLen: 2,
40918 generic: true,
40919 },
40920 {
40921 name: "Rsh16x16",
40922 auxType: auxBool,
40923 argLen: 2,
40924 generic: true,
40925 },
40926 {
40927 name: "Rsh16x32",
40928 auxType: auxBool,
40929 argLen: 2,
40930 generic: true,
40931 },
40932 {
40933 name: "Rsh16x64",
40934 auxType: auxBool,
40935 argLen: 2,
40936 generic: true,
40937 },
40938 {
40939 name: "Rsh32x8",
40940 auxType: auxBool,
40941 argLen: 2,
40942 generic: true,
40943 },
40944 {
40945 name: "Rsh32x16",
40946 auxType: auxBool,
40947 argLen: 2,
40948 generic: true,
40949 },
40950 {
40951 name: "Rsh32x32",
40952 auxType: auxBool,
40953 argLen: 2,
40954 generic: true,
40955 },
40956 {
40957 name: "Rsh32x64",
40958 auxType: auxBool,
40959 argLen: 2,
40960 generic: true,
40961 },
40962 {
40963 name: "Rsh64x8",
40964 auxType: auxBool,
40965 argLen: 2,
40966 generic: true,
40967 },
40968 {
40969 name: "Rsh64x16",
40970 auxType: auxBool,
40971 argLen: 2,
40972 generic: true,
40973 },
40974 {
40975 name: "Rsh64x32",
40976 auxType: auxBool,
40977 argLen: 2,
40978 generic: true,
40979 },
40980 {
40981 name: "Rsh64x64",
40982 auxType: auxBool,
40983 argLen: 2,
40984 generic: true,
40985 },
40986 {
40987 name: "Rsh8Ux8",
40988 auxType: auxBool,
40989 argLen: 2,
40990 generic: true,
40991 },
40992 {
40993 name: "Rsh8Ux16",
40994 auxType: auxBool,
40995 argLen: 2,
40996 generic: true,
40997 },
40998 {
40999 name: "Rsh8Ux32",
41000 auxType: auxBool,
41001 argLen: 2,
41002 generic: true,
41003 },
41004 {
41005 name: "Rsh8Ux64",
41006 auxType: auxBool,
41007 argLen: 2,
41008 generic: true,
41009 },
41010 {
41011 name: "Rsh16Ux8",
41012 auxType: auxBool,
41013 argLen: 2,
41014 generic: true,
41015 },
41016 {
41017 name: "Rsh16Ux16",
41018 auxType: auxBool,
41019 argLen: 2,
41020 generic: true,
41021 },
41022 {
41023 name: "Rsh16Ux32",
41024 auxType: auxBool,
41025 argLen: 2,
41026 generic: true,
41027 },
41028 {
41029 name: "Rsh16Ux64",
41030 auxType: auxBool,
41031 argLen: 2,
41032 generic: true,
41033 },
41034 {
41035 name: "Rsh32Ux8",
41036 auxType: auxBool,
41037 argLen: 2,
41038 generic: true,
41039 },
41040 {
41041 name: "Rsh32Ux16",
41042 auxType: auxBool,
41043 argLen: 2,
41044 generic: true,
41045 },
41046 {
41047 name: "Rsh32Ux32",
41048 auxType: auxBool,
41049 argLen: 2,
41050 generic: true,
41051 },
41052 {
41053 name: "Rsh32Ux64",
41054 auxType: auxBool,
41055 argLen: 2,
41056 generic: true,
41057 },
41058 {
41059 name: "Rsh64Ux8",
41060 auxType: auxBool,
41061 argLen: 2,
41062 generic: true,
41063 },
41064 {
41065 name: "Rsh64Ux16",
41066 auxType: auxBool,
41067 argLen: 2,
41068 generic: true,
41069 },
41070 {
41071 name: "Rsh64Ux32",
41072 auxType: auxBool,
41073 argLen: 2,
41074 generic: true,
41075 },
41076 {
41077 name: "Rsh64Ux64",
41078 auxType: auxBool,
41079 argLen: 2,
41080 generic: true,
41081 },
41082 {
41083 name: "Eq8",
41084 argLen: 2,
41085 commutative: true,
41086 generic: true,
41087 },
41088 {
41089 name: "Eq16",
41090 argLen: 2,
41091 commutative: true,
41092 generic: true,
41093 },
41094 {
41095 name: "Eq32",
41096 argLen: 2,
41097 commutative: true,
41098 generic: true,
41099 },
41100 {
41101 name: "Eq64",
41102 argLen: 2,
41103 commutative: true,
41104 generic: true,
41105 },
41106 {
41107 name: "EqPtr",
41108 argLen: 2,
41109 commutative: true,
41110 generic: true,
41111 },
41112 {
41113 name: "EqInter",
41114 argLen: 2,
41115 generic: true,
41116 },
41117 {
41118 name: "EqSlice",
41119 argLen: 2,
41120 generic: true,
41121 },
41122 {
41123 name: "Eq32F",
41124 argLen: 2,
41125 commutative: true,
41126 generic: true,
41127 },
41128 {
41129 name: "Eq64F",
41130 argLen: 2,
41131 commutative: true,
41132 generic: true,
41133 },
41134 {
41135 name: "Neq8",
41136 argLen: 2,
41137 commutative: true,
41138 generic: true,
41139 },
41140 {
41141 name: "Neq16",
41142 argLen: 2,
41143 commutative: true,
41144 generic: true,
41145 },
41146 {
41147 name: "Neq32",
41148 argLen: 2,
41149 commutative: true,
41150 generic: true,
41151 },
41152 {
41153 name: "Neq64",
41154 argLen: 2,
41155 commutative: true,
41156 generic: true,
41157 },
41158 {
41159 name: "NeqPtr",
41160 argLen: 2,
41161 commutative: true,
41162 generic: true,
41163 },
41164 {
41165 name: "NeqInter",
41166 argLen: 2,
41167 generic: true,
41168 },
41169 {
41170 name: "NeqSlice",
41171 argLen: 2,
41172 generic: true,
41173 },
41174 {
41175 name: "Neq32F",
41176 argLen: 2,
41177 commutative: true,
41178 generic: true,
41179 },
41180 {
41181 name: "Neq64F",
41182 argLen: 2,
41183 commutative: true,
41184 generic: true,
41185 },
41186 {
41187 name: "Less8",
41188 argLen: 2,
41189 generic: true,
41190 },
41191 {
41192 name: "Less8U",
41193 argLen: 2,
41194 generic: true,
41195 },
41196 {
41197 name: "Less16",
41198 argLen: 2,
41199 generic: true,
41200 },
41201 {
41202 name: "Less16U",
41203 argLen: 2,
41204 generic: true,
41205 },
41206 {
41207 name: "Less32",
41208 argLen: 2,
41209 generic: true,
41210 },
41211 {
41212 name: "Less32U",
41213 argLen: 2,
41214 generic: true,
41215 },
41216 {
41217 name: "Less64",
41218 argLen: 2,
41219 generic: true,
41220 },
41221 {
41222 name: "Less64U",
41223 argLen: 2,
41224 generic: true,
41225 },
41226 {
41227 name: "Less32F",
41228 argLen: 2,
41229 generic: true,
41230 },
41231 {
41232 name: "Less64F",
41233 argLen: 2,
41234 generic: true,
41235 },
41236 {
41237 name: "Leq8",
41238 argLen: 2,
41239 generic: true,
41240 },
41241 {
41242 name: "Leq8U",
41243 argLen: 2,
41244 generic: true,
41245 },
41246 {
41247 name: "Leq16",
41248 argLen: 2,
41249 generic: true,
41250 },
41251 {
41252 name: "Leq16U",
41253 argLen: 2,
41254 generic: true,
41255 },
41256 {
41257 name: "Leq32",
41258 argLen: 2,
41259 generic: true,
41260 },
41261 {
41262 name: "Leq32U",
41263 argLen: 2,
41264 generic: true,
41265 },
41266 {
41267 name: "Leq64",
41268 argLen: 2,
41269 generic: true,
41270 },
41271 {
41272 name: "Leq64U",
41273 argLen: 2,
41274 generic: true,
41275 },
41276 {
41277 name: "Leq32F",
41278 argLen: 2,
41279 generic: true,
41280 },
41281 {
41282 name: "Leq64F",
41283 argLen: 2,
41284 generic: true,
41285 },
41286 {
41287 name: "CondSelect",
41288 argLen: 3,
41289 generic: true,
41290 },
41291 {
41292 name: "AndB",
41293 argLen: 2,
41294 commutative: true,
41295 generic: true,
41296 },
41297 {
41298 name: "OrB",
41299 argLen: 2,
41300 commutative: true,
41301 generic: true,
41302 },
41303 {
41304 name: "EqB",
41305 argLen: 2,
41306 commutative: true,
41307 generic: true,
41308 },
41309 {
41310 name: "NeqB",
41311 argLen: 2,
41312 commutative: true,
41313 generic: true,
41314 },
41315 {
41316 name: "Not",
41317 argLen: 1,
41318 generic: true,
41319 },
41320 {
41321 name: "Neg8",
41322 argLen: 1,
41323 generic: true,
41324 },
41325 {
41326 name: "Neg16",
41327 argLen: 1,
41328 generic: true,
41329 },
41330 {
41331 name: "Neg32",
41332 argLen: 1,
41333 generic: true,
41334 },
41335 {
41336 name: "Neg64",
41337 argLen: 1,
41338 generic: true,
41339 },
41340 {
41341 name: "Neg32F",
41342 argLen: 1,
41343 generic: true,
41344 },
41345 {
41346 name: "Neg64F",
41347 argLen: 1,
41348 generic: true,
41349 },
41350 {
41351 name: "Com8",
41352 argLen: 1,
41353 generic: true,
41354 },
41355 {
41356 name: "Com16",
41357 argLen: 1,
41358 generic: true,
41359 },
41360 {
41361 name: "Com32",
41362 argLen: 1,
41363 generic: true,
41364 },
41365 {
41366 name: "Com64",
41367 argLen: 1,
41368 generic: true,
41369 },
41370 {
41371 name: "Ctz8",
41372 argLen: 1,
41373 generic: true,
41374 },
41375 {
41376 name: "Ctz16",
41377 argLen: 1,
41378 generic: true,
41379 },
41380 {
41381 name: "Ctz32",
41382 argLen: 1,
41383 generic: true,
41384 },
41385 {
41386 name: "Ctz64",
41387 argLen: 1,
41388 generic: true,
41389 },
41390 {
41391 name: "Ctz64On32",
41392 argLen: 2,
41393 generic: true,
41394 },
41395 {
41396 name: "Ctz8NonZero",
41397 argLen: 1,
41398 generic: true,
41399 },
41400 {
41401 name: "Ctz16NonZero",
41402 argLen: 1,
41403 generic: true,
41404 },
41405 {
41406 name: "Ctz32NonZero",
41407 argLen: 1,
41408 generic: true,
41409 },
41410 {
41411 name: "Ctz64NonZero",
41412 argLen: 1,
41413 generic: true,
41414 },
41415 {
41416 name: "BitLen8",
41417 argLen: 1,
41418 generic: true,
41419 },
41420 {
41421 name: "BitLen16",
41422 argLen: 1,
41423 generic: true,
41424 },
41425 {
41426 name: "BitLen32",
41427 argLen: 1,
41428 generic: true,
41429 },
41430 {
41431 name: "BitLen64",
41432 argLen: 1,
41433 generic: true,
41434 },
41435 {
41436 name: "Bswap16",
41437 argLen: 1,
41438 generic: true,
41439 },
41440 {
41441 name: "Bswap32",
41442 argLen: 1,
41443 generic: true,
41444 },
41445 {
41446 name: "Bswap64",
41447 argLen: 1,
41448 generic: true,
41449 },
41450 {
41451 name: "BitRev8",
41452 argLen: 1,
41453 generic: true,
41454 },
41455 {
41456 name: "BitRev16",
41457 argLen: 1,
41458 generic: true,
41459 },
41460 {
41461 name: "BitRev32",
41462 argLen: 1,
41463 generic: true,
41464 },
41465 {
41466 name: "BitRev64",
41467 argLen: 1,
41468 generic: true,
41469 },
41470 {
41471 name: "PopCount8",
41472 argLen: 1,
41473 generic: true,
41474 },
41475 {
41476 name: "PopCount16",
41477 argLen: 1,
41478 generic: true,
41479 },
41480 {
41481 name: "PopCount32",
41482 argLen: 1,
41483 generic: true,
41484 },
41485 {
41486 name: "PopCount64",
41487 argLen: 1,
41488 generic: true,
41489 },
41490 {
41491 name: "RotateLeft64",
41492 argLen: 2,
41493 generic: true,
41494 },
41495 {
41496 name: "RotateLeft32",
41497 argLen: 2,
41498 generic: true,
41499 },
41500 {
41501 name: "RotateLeft16",
41502 argLen: 2,
41503 generic: true,
41504 },
41505 {
41506 name: "RotateLeft8",
41507 argLen: 2,
41508 generic: true,
41509 },
41510 {
41511 name: "Sqrt",
41512 argLen: 1,
41513 generic: true,
41514 },
41515 {
41516 name: "Sqrt32",
41517 argLen: 1,
41518 generic: true,
41519 },
41520 {
41521 name: "Floor",
41522 argLen: 1,
41523 generic: true,
41524 },
41525 {
41526 name: "Ceil",
41527 argLen: 1,
41528 generic: true,
41529 },
41530 {
41531 name: "Trunc",
41532 argLen: 1,
41533 generic: true,
41534 },
41535 {
41536 name: "Round",
41537 argLen: 1,
41538 generic: true,
41539 },
41540 {
41541 name: "RoundToEven",
41542 argLen: 1,
41543 generic: true,
41544 },
41545 {
41546 name: "Abs",
41547 argLen: 1,
41548 generic: true,
41549 },
41550 {
41551 name: "Copysign",
41552 argLen: 2,
41553 generic: true,
41554 },
41555 {
41556 name: "Min64",
41557 argLen: 2,
41558 generic: true,
41559 },
41560 {
41561 name: "Max64",
41562 argLen: 2,
41563 generic: true,
41564 },
41565 {
41566 name: "Min64u",
41567 argLen: 2,
41568 generic: true,
41569 },
41570 {
41571 name: "Max64u",
41572 argLen: 2,
41573 generic: true,
41574 },
41575 {
41576 name: "Min64F",
41577 argLen: 2,
41578 generic: true,
41579 },
41580 {
41581 name: "Min32F",
41582 argLen: 2,
41583 generic: true,
41584 },
41585 {
41586 name: "Max64F",
41587 argLen: 2,
41588 generic: true,
41589 },
41590 {
41591 name: "Max32F",
41592 argLen: 2,
41593 generic: true,
41594 },
41595 {
41596 name: "FMA",
41597 argLen: 3,
41598 generic: true,
41599 },
41600 {
41601 name: "Phi",
41602 argLen: -1,
41603 zeroWidth: true,
41604 generic: true,
41605 },
41606 {
41607 name: "Copy",
41608 argLen: 1,
41609 generic: true,
41610 },
41611 {
41612 name: "Convert",
41613 argLen: 2,
41614 resultInArg0: true,
41615 zeroWidth: true,
41616 generic: true,
41617 },
41618 {
41619 name: "ConstBool",
41620 auxType: auxBool,
41621 argLen: 0,
41622 generic: true,
41623 },
41624 {
41625 name: "ConstString",
41626 auxType: auxString,
41627 argLen: 0,
41628 generic: true,
41629 },
41630 {
41631 name: "ConstNil",
41632 argLen: 0,
41633 generic: true,
41634 },
41635 {
41636 name: "Const8",
41637 auxType: auxInt8,
41638 argLen: 0,
41639 generic: true,
41640 },
41641 {
41642 name: "Const16",
41643 auxType: auxInt16,
41644 argLen: 0,
41645 generic: true,
41646 },
41647 {
41648 name: "Const32",
41649 auxType: auxInt32,
41650 argLen: 0,
41651 generic: true,
41652 },
41653 {
41654 name: "Const64",
41655 auxType: auxInt64,
41656 argLen: 0,
41657 generic: true,
41658 },
41659 {
41660 name: "Const32F",
41661 auxType: auxFloat32,
41662 argLen: 0,
41663 generic: true,
41664 },
41665 {
41666 name: "Const64F",
41667 auxType: auxFloat64,
41668 argLen: 0,
41669 generic: true,
41670 },
41671 {
41672 name: "ConstInterface",
41673 argLen: 0,
41674 generic: true,
41675 },
41676 {
41677 name: "ConstSlice",
41678 argLen: 0,
41679 generic: true,
41680 },
41681 {
41682 name: "InitMem",
41683 argLen: 0,
41684 zeroWidth: true,
41685 generic: true,
41686 },
41687 {
41688 name: "Arg",
41689 auxType: auxSymOff,
41690 argLen: 0,
41691 zeroWidth: true,
41692 symEffect: SymRead,
41693 generic: true,
41694 },
41695 {
41696 name: "ArgIntReg",
41697 auxType: auxNameOffsetInt8,
41698 argLen: 0,
41699 zeroWidth: true,
41700 generic: true,
41701 },
41702 {
41703 name: "ArgFloatReg",
41704 auxType: auxNameOffsetInt8,
41705 argLen: 0,
41706 zeroWidth: true,
41707 generic: true,
41708 },
41709 {
41710 name: "Addr",
41711 auxType: auxSym,
41712 argLen: 1,
41713 symEffect: SymAddr,
41714 generic: true,
41715 },
41716 {
41717 name: "LocalAddr",
41718 auxType: auxSym,
41719 argLen: 2,
41720 symEffect: SymAddr,
41721 generic: true,
41722 },
41723 {
41724 name: "SP",
41725 argLen: 0,
41726 zeroWidth: true,
41727 fixedReg: true,
41728 generic: true,
41729 },
41730 {
41731 name: "SB",
41732 argLen: 0,
41733 zeroWidth: true,
41734 fixedReg: true,
41735 generic: true,
41736 },
41737 {
41738 name: "SPanchored",
41739 argLen: 2,
41740 zeroWidth: true,
41741 generic: true,
41742 },
41743 {
41744 name: "Load",
41745 argLen: 2,
41746 generic: true,
41747 },
41748 {
41749 name: "Dereference",
41750 argLen: 2,
41751 generic: true,
41752 },
41753 {
41754 name: "Store",
41755 auxType: auxTyp,
41756 argLen: 3,
41757 generic: true,
41758 },
41759 {
41760 name: "Move",
41761 auxType: auxTypSize,
41762 argLen: 3,
41763 generic: true,
41764 },
41765 {
41766 name: "Zero",
41767 auxType: auxTypSize,
41768 argLen: 2,
41769 generic: true,
41770 },
41771 {
41772 name: "StoreWB",
41773 auxType: auxTyp,
41774 argLen: 3,
41775 generic: true,
41776 },
41777 {
41778 name: "MoveWB",
41779 auxType: auxTypSize,
41780 argLen: 3,
41781 generic: true,
41782 },
41783 {
41784 name: "ZeroWB",
41785 auxType: auxTypSize,
41786 argLen: 2,
41787 generic: true,
41788 },
41789 {
41790 name: "WBend",
41791 argLen: 1,
41792 generic: true,
41793 },
41794 {
41795 name: "WB",
41796 auxType: auxInt64,
41797 argLen: 1,
41798 generic: true,
41799 },
41800 {
41801 name: "HasCPUFeature",
41802 auxType: auxSym,
41803 argLen: 0,
41804 symEffect: SymNone,
41805 generic: true,
41806 },
41807 {
41808 name: "PanicBounds",
41809 auxType: auxInt64,
41810 argLen: 3,
41811 call: true,
41812 generic: true,
41813 },
41814 {
41815 name: "PanicExtend",
41816 auxType: auxInt64,
41817 argLen: 4,
41818 call: true,
41819 generic: true,
41820 },
41821 {
41822 name: "ClosureCall",
41823 auxType: auxCallOff,
41824 argLen: -1,
41825 call: true,
41826 generic: true,
41827 },
41828 {
41829 name: "StaticCall",
41830 auxType: auxCallOff,
41831 argLen: -1,
41832 call: true,
41833 generic: true,
41834 },
41835 {
41836 name: "InterCall",
41837 auxType: auxCallOff,
41838 argLen: -1,
41839 call: true,
41840 generic: true,
41841 },
41842 {
41843 name: "TailCall",
41844 auxType: auxCallOff,
41845 argLen: -1,
41846 call: true,
41847 generic: true,
41848 },
41849 {
41850 name: "ClosureLECall",
41851 auxType: auxCallOff,
41852 argLen: -1,
41853 call: true,
41854 generic: true,
41855 },
41856 {
41857 name: "StaticLECall",
41858 auxType: auxCallOff,
41859 argLen: -1,
41860 call: true,
41861 generic: true,
41862 },
41863 {
41864 name: "InterLECall",
41865 auxType: auxCallOff,
41866 argLen: -1,
41867 call: true,
41868 generic: true,
41869 },
41870 {
41871 name: "TailLECall",
41872 auxType: auxCallOff,
41873 argLen: -1,
41874 call: true,
41875 generic: true,
41876 },
41877 {
41878 name: "SignExt8to16",
41879 argLen: 1,
41880 generic: true,
41881 },
41882 {
41883 name: "SignExt8to32",
41884 argLen: 1,
41885 generic: true,
41886 },
41887 {
41888 name: "SignExt8to64",
41889 argLen: 1,
41890 generic: true,
41891 },
41892 {
41893 name: "SignExt16to32",
41894 argLen: 1,
41895 generic: true,
41896 },
41897 {
41898 name: "SignExt16to64",
41899 argLen: 1,
41900 generic: true,
41901 },
41902 {
41903 name: "SignExt32to64",
41904 argLen: 1,
41905 generic: true,
41906 },
41907 {
41908 name: "ZeroExt8to16",
41909 argLen: 1,
41910 generic: true,
41911 },
41912 {
41913 name: "ZeroExt8to32",
41914 argLen: 1,
41915 generic: true,
41916 },
41917 {
41918 name: "ZeroExt8to64",
41919 argLen: 1,
41920 generic: true,
41921 },
41922 {
41923 name: "ZeroExt16to32",
41924 argLen: 1,
41925 generic: true,
41926 },
41927 {
41928 name: "ZeroExt16to64",
41929 argLen: 1,
41930 generic: true,
41931 },
41932 {
41933 name: "ZeroExt32to64",
41934 argLen: 1,
41935 generic: true,
41936 },
41937 {
41938 name: "Trunc16to8",
41939 argLen: 1,
41940 generic: true,
41941 },
41942 {
41943 name: "Trunc32to8",
41944 argLen: 1,
41945 generic: true,
41946 },
41947 {
41948 name: "Trunc32to16",
41949 argLen: 1,
41950 generic: true,
41951 },
41952 {
41953 name: "Trunc64to8",
41954 argLen: 1,
41955 generic: true,
41956 },
41957 {
41958 name: "Trunc64to16",
41959 argLen: 1,
41960 generic: true,
41961 },
41962 {
41963 name: "Trunc64to32",
41964 argLen: 1,
41965 generic: true,
41966 },
41967 {
41968 name: "Cvt32to32F",
41969 argLen: 1,
41970 generic: true,
41971 },
41972 {
41973 name: "Cvt32to64F",
41974 argLen: 1,
41975 generic: true,
41976 },
41977 {
41978 name: "Cvt64to32F",
41979 argLen: 1,
41980 generic: true,
41981 },
41982 {
41983 name: "Cvt64to64F",
41984 argLen: 1,
41985 generic: true,
41986 },
41987 {
41988 name: "Cvt32Fto32",
41989 argLen: 1,
41990 generic: true,
41991 },
41992 {
41993 name: "Cvt32Fto64",
41994 argLen: 1,
41995 generic: true,
41996 },
41997 {
41998 name: "Cvt64Fto32",
41999 argLen: 1,
42000 generic: true,
42001 },
42002 {
42003 name: "Cvt64Fto64",
42004 argLen: 1,
42005 generic: true,
42006 },
42007 {
42008 name: "Cvt32Fto64F",
42009 argLen: 1,
42010 generic: true,
42011 },
42012 {
42013 name: "Cvt64Fto32F",
42014 argLen: 1,
42015 generic: true,
42016 },
42017 {
42018 name: "CvtBoolToUint8",
42019 argLen: 1,
42020 generic: true,
42021 },
42022 {
42023 name: "Round32F",
42024 argLen: 1,
42025 generic: true,
42026 },
42027 {
42028 name: "Round64F",
42029 argLen: 1,
42030 generic: true,
42031 },
42032 {
42033 name: "IsNonNil",
42034 argLen: 1,
42035 generic: true,
42036 },
42037 {
42038 name: "IsInBounds",
42039 argLen: 2,
42040 generic: true,
42041 },
42042 {
42043 name: "IsSliceInBounds",
42044 argLen: 2,
42045 generic: true,
42046 },
42047 {
42048 name: "NilCheck",
42049 argLen: 2,
42050 nilCheck: true,
42051 generic: true,
42052 },
42053 {
42054 name: "GetG",
42055 argLen: 1,
42056 zeroWidth: true,
42057 generic: true,
42058 },
42059 {
42060 name: "GetClosurePtr",
42061 argLen: 0,
42062 generic: true,
42063 },
42064 {
42065 name: "GetCallerPC",
42066 argLen: 0,
42067 generic: true,
42068 },
42069 {
42070 name: "GetCallerSP",
42071 argLen: 1,
42072 generic: true,
42073 },
42074 {
42075 name: "PtrIndex",
42076 argLen: 2,
42077 generic: true,
42078 },
42079 {
42080 name: "OffPtr",
42081 auxType: auxInt64,
42082 argLen: 1,
42083 generic: true,
42084 },
42085 {
42086 name: "SliceMake",
42087 argLen: 3,
42088 generic: true,
42089 },
42090 {
42091 name: "SlicePtr",
42092 argLen: 1,
42093 generic: true,
42094 },
42095 {
42096 name: "SliceLen",
42097 argLen: 1,
42098 generic: true,
42099 },
42100 {
42101 name: "SliceCap",
42102 argLen: 1,
42103 generic: true,
42104 },
42105 {
42106 name: "SlicePtrUnchecked",
42107 argLen: 1,
42108 generic: true,
42109 },
42110 {
42111 name: "ComplexMake",
42112 argLen: 2,
42113 generic: true,
42114 },
42115 {
42116 name: "ComplexReal",
42117 argLen: 1,
42118 generic: true,
42119 },
42120 {
42121 name: "ComplexImag",
42122 argLen: 1,
42123 generic: true,
42124 },
42125 {
42126 name: "StringMake",
42127 argLen: 2,
42128 generic: true,
42129 },
42130 {
42131 name: "StringPtr",
42132 argLen: 1,
42133 generic: true,
42134 },
42135 {
42136 name: "StringLen",
42137 argLen: 1,
42138 generic: true,
42139 },
42140 {
42141 name: "IMake",
42142 argLen: 2,
42143 generic: true,
42144 },
42145 {
42146 name: "ITab",
42147 argLen: 1,
42148 generic: true,
42149 },
42150 {
42151 name: "IData",
42152 argLen: 1,
42153 generic: true,
42154 },
42155 {
42156 name: "StructMake",
42157 argLen: -1,
42158 generic: true,
42159 },
42160 {
42161 name: "StructSelect",
42162 auxType: auxInt64,
42163 argLen: 1,
42164 generic: true,
42165 },
42166 {
42167 name: "ArrayMake0",
42168 argLen: 0,
42169 generic: true,
42170 },
42171 {
42172 name: "ArrayMake1",
42173 argLen: 1,
42174 generic: true,
42175 },
42176 {
42177 name: "ArraySelect",
42178 auxType: auxInt64,
42179 argLen: 1,
42180 generic: true,
42181 },
42182 {
42183 name: "StoreReg",
42184 argLen: 1,
42185 generic: true,
42186 },
42187 {
42188 name: "LoadReg",
42189 argLen: 1,
42190 generic: true,
42191 },
42192 {
42193 name: "FwdRef",
42194 auxType: auxSym,
42195 argLen: 0,
42196 symEffect: SymNone,
42197 generic: true,
42198 },
42199 {
42200 name: "Unknown",
42201 argLen: 0,
42202 generic: true,
42203 },
42204 {
42205 name: "VarDef",
42206 auxType: auxSym,
42207 argLen: 1,
42208 zeroWidth: true,
42209 symEffect: SymNone,
42210 generic: true,
42211 },
42212 {
42213 name: "VarLive",
42214 auxType: auxSym,
42215 argLen: 1,
42216 zeroWidth: true,
42217 symEffect: SymRead,
42218 generic: true,
42219 },
42220 {
42221 name: "KeepAlive",
42222 argLen: 2,
42223 zeroWidth: true,
42224 generic: true,
42225 },
42226 {
42227 name: "InlMark",
42228 auxType: auxInt32,
42229 argLen: 1,
42230 generic: true,
42231 },
42232 {
42233 name: "Int64Make",
42234 argLen: 2,
42235 generic: true,
42236 },
42237 {
42238 name: "Int64Hi",
42239 argLen: 1,
42240 generic: true,
42241 },
42242 {
42243 name: "Int64Lo",
42244 argLen: 1,
42245 generic: true,
42246 },
42247 {
42248 name: "Add32carry",
42249 argLen: 2,
42250 commutative: true,
42251 generic: true,
42252 },
42253 {
42254 name: "Add32withcarry",
42255 argLen: 3,
42256 commutative: true,
42257 generic: true,
42258 },
42259 {
42260 name: "Sub32carry",
42261 argLen: 2,
42262 generic: true,
42263 },
42264 {
42265 name: "Sub32withcarry",
42266 argLen: 3,
42267 generic: true,
42268 },
42269 {
42270 name: "Add64carry",
42271 argLen: 3,
42272 commutative: true,
42273 generic: true,
42274 },
42275 {
42276 name: "Sub64borrow",
42277 argLen: 3,
42278 generic: true,
42279 },
42280 {
42281 name: "Signmask",
42282 argLen: 1,
42283 generic: true,
42284 },
42285 {
42286 name: "Zeromask",
42287 argLen: 1,
42288 generic: true,
42289 },
42290 {
42291 name: "Slicemask",
42292 argLen: 1,
42293 generic: true,
42294 },
42295 {
42296 name: "SpectreIndex",
42297 argLen: 2,
42298 generic: true,
42299 },
42300 {
42301 name: "SpectreSliceIndex",
42302 argLen: 2,
42303 generic: true,
42304 },
42305 {
42306 name: "Cvt32Uto32F",
42307 argLen: 1,
42308 generic: true,
42309 },
42310 {
42311 name: "Cvt32Uto64F",
42312 argLen: 1,
42313 generic: true,
42314 },
42315 {
42316 name: "Cvt32Fto32U",
42317 argLen: 1,
42318 generic: true,
42319 },
42320 {
42321 name: "Cvt64Fto32U",
42322 argLen: 1,
42323 generic: true,
42324 },
42325 {
42326 name: "Cvt64Uto32F",
42327 argLen: 1,
42328 generic: true,
42329 },
42330 {
42331 name: "Cvt64Uto64F",
42332 argLen: 1,
42333 generic: true,
42334 },
42335 {
42336 name: "Cvt32Fto64U",
42337 argLen: 1,
42338 generic: true,
42339 },
42340 {
42341 name: "Cvt64Fto64U",
42342 argLen: 1,
42343 generic: true,
42344 },
42345 {
42346 name: "Select0",
42347 argLen: 1,
42348 zeroWidth: true,
42349 generic: true,
42350 },
42351 {
42352 name: "Select1",
42353 argLen: 1,
42354 zeroWidth: true,
42355 generic: true,
42356 },
42357 {
42358 name: "MakeTuple",
42359 argLen: 2,
42360 generic: true,
42361 },
42362 {
42363 name: "SelectN",
42364 auxType: auxInt64,
42365 argLen: 1,
42366 generic: true,
42367 },
42368 {
42369 name: "SelectNAddr",
42370 auxType: auxInt64,
42371 argLen: 1,
42372 generic: true,
42373 },
42374 {
42375 name: "MakeResult",
42376 argLen: -1,
42377 generic: true,
42378 },
42379 {
42380 name: "AtomicLoad8",
42381 argLen: 2,
42382 generic: true,
42383 },
42384 {
42385 name: "AtomicLoad32",
42386 argLen: 2,
42387 generic: true,
42388 },
42389 {
42390 name: "AtomicLoad64",
42391 argLen: 2,
42392 generic: true,
42393 },
42394 {
42395 name: "AtomicLoadPtr",
42396 argLen: 2,
42397 generic: true,
42398 },
42399 {
42400 name: "AtomicLoadAcq32",
42401 argLen: 2,
42402 generic: true,
42403 },
42404 {
42405 name: "AtomicLoadAcq64",
42406 argLen: 2,
42407 generic: true,
42408 },
42409 {
42410 name: "AtomicStore8",
42411 argLen: 3,
42412 hasSideEffects: true,
42413 generic: true,
42414 },
42415 {
42416 name: "AtomicStore32",
42417 argLen: 3,
42418 hasSideEffects: true,
42419 generic: true,
42420 },
42421 {
42422 name: "AtomicStore64",
42423 argLen: 3,
42424 hasSideEffects: true,
42425 generic: true,
42426 },
42427 {
42428 name: "AtomicStorePtrNoWB",
42429 argLen: 3,
42430 hasSideEffects: true,
42431 generic: true,
42432 },
42433 {
42434 name: "AtomicStoreRel32",
42435 argLen: 3,
42436 hasSideEffects: true,
42437 generic: true,
42438 },
42439 {
42440 name: "AtomicStoreRel64",
42441 argLen: 3,
42442 hasSideEffects: true,
42443 generic: true,
42444 },
42445 {
42446 name: "AtomicExchange8",
42447 argLen: 3,
42448 hasSideEffects: true,
42449 generic: true,
42450 },
42451 {
42452 name: "AtomicExchange32",
42453 argLen: 3,
42454 hasSideEffects: true,
42455 generic: true,
42456 },
42457 {
42458 name: "AtomicExchange64",
42459 argLen: 3,
42460 hasSideEffects: true,
42461 generic: true,
42462 },
42463 {
42464 name: "AtomicAdd32",
42465 argLen: 3,
42466 hasSideEffects: true,
42467 generic: true,
42468 },
42469 {
42470 name: "AtomicAdd64",
42471 argLen: 3,
42472 hasSideEffects: true,
42473 generic: true,
42474 },
42475 {
42476 name: "AtomicCompareAndSwap32",
42477 argLen: 4,
42478 hasSideEffects: true,
42479 generic: true,
42480 },
42481 {
42482 name: "AtomicCompareAndSwap64",
42483 argLen: 4,
42484 hasSideEffects: true,
42485 generic: true,
42486 },
42487 {
42488 name: "AtomicCompareAndSwapRel32",
42489 argLen: 4,
42490 hasSideEffects: true,
42491 generic: true,
42492 },
42493 {
42494 name: "AtomicAnd8",
42495 argLen: 3,
42496 hasSideEffects: true,
42497 generic: true,
42498 },
42499 {
42500 name: "AtomicOr8",
42501 argLen: 3,
42502 hasSideEffects: true,
42503 generic: true,
42504 },
42505 {
42506 name: "AtomicAnd32",
42507 argLen: 3,
42508 hasSideEffects: true,
42509 generic: true,
42510 },
42511 {
42512 name: "AtomicOr32",
42513 argLen: 3,
42514 hasSideEffects: true,
42515 generic: true,
42516 },
42517 {
42518 name: "AtomicAnd64value",
42519 argLen: 3,
42520 hasSideEffects: true,
42521 generic: true,
42522 },
42523 {
42524 name: "AtomicAnd32value",
42525 argLen: 3,
42526 hasSideEffects: true,
42527 generic: true,
42528 },
42529 {
42530 name: "AtomicAnd8value",
42531 argLen: 3,
42532 hasSideEffects: true,
42533 generic: true,
42534 },
42535 {
42536 name: "AtomicOr64value",
42537 argLen: 3,
42538 hasSideEffects: true,
42539 generic: true,
42540 },
42541 {
42542 name: "AtomicOr32value",
42543 argLen: 3,
42544 hasSideEffects: true,
42545 generic: true,
42546 },
42547 {
42548 name: "AtomicOr8value",
42549 argLen: 3,
42550 hasSideEffects: true,
42551 generic: true,
42552 },
42553 {
42554 name: "AtomicStore8Variant",
42555 argLen: 3,
42556 hasSideEffects: true,
42557 generic: true,
42558 },
42559 {
42560 name: "AtomicStore32Variant",
42561 argLen: 3,
42562 hasSideEffects: true,
42563 generic: true,
42564 },
42565 {
42566 name: "AtomicStore64Variant",
42567 argLen: 3,
42568 hasSideEffects: true,
42569 generic: true,
42570 },
42571 {
42572 name: "AtomicAdd32Variant",
42573 argLen: 3,
42574 hasSideEffects: true,
42575 generic: true,
42576 },
42577 {
42578 name: "AtomicAdd64Variant",
42579 argLen: 3,
42580 hasSideEffects: true,
42581 generic: true,
42582 },
42583 {
42584 name: "AtomicExchange8Variant",
42585 argLen: 3,
42586 hasSideEffects: true,
42587 generic: true,
42588 },
42589 {
42590 name: "AtomicExchange32Variant",
42591 argLen: 3,
42592 hasSideEffects: true,
42593 generic: true,
42594 },
42595 {
42596 name: "AtomicExchange64Variant",
42597 argLen: 3,
42598 hasSideEffects: true,
42599 generic: true,
42600 },
42601 {
42602 name: "AtomicCompareAndSwap32Variant",
42603 argLen: 4,
42604 hasSideEffects: true,
42605 generic: true,
42606 },
42607 {
42608 name: "AtomicCompareAndSwap64Variant",
42609 argLen: 4,
42610 hasSideEffects: true,
42611 generic: true,
42612 },
42613 {
42614 name: "AtomicAnd64valueVariant",
42615 argLen: 3,
42616 hasSideEffects: true,
42617 generic: true,
42618 },
42619 {
42620 name: "AtomicOr64valueVariant",
42621 argLen: 3,
42622 hasSideEffects: true,
42623 generic: true,
42624 },
42625 {
42626 name: "AtomicAnd32valueVariant",
42627 argLen: 3,
42628 hasSideEffects: true,
42629 generic: true,
42630 },
42631 {
42632 name: "AtomicOr32valueVariant",
42633 argLen: 3,
42634 hasSideEffects: true,
42635 generic: true,
42636 },
42637 {
42638 name: "AtomicAnd8valueVariant",
42639 argLen: 3,
42640 hasSideEffects: true,
42641 generic: true,
42642 },
42643 {
42644 name: "AtomicOr8valueVariant",
42645 argLen: 3,
42646 hasSideEffects: true,
42647 generic: true,
42648 },
42649 {
42650 name: "PubBarrier",
42651 argLen: 1,
42652 hasSideEffects: true,
42653 generic: true,
42654 },
42655 {
42656 name: "Clobber",
42657 auxType: auxSymOff,
42658 argLen: 0,
42659 symEffect: SymNone,
42660 generic: true,
42661 },
42662 {
42663 name: "ClobberReg",
42664 argLen: 0,
42665 generic: true,
42666 },
42667 {
42668 name: "PrefetchCache",
42669 argLen: 2,
42670 hasSideEffects: true,
42671 generic: true,
42672 },
42673 {
42674 name: "PrefetchCacheStreamed",
42675 argLen: 2,
42676 hasSideEffects: true,
42677 generic: true,
42678 },
42679 }
42680
42681 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
42682 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
42683 func (o Op) String() string { return opcodeTable[o].name }
42684 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
42685 func (o Op) IsCall() bool { return opcodeTable[o].call }
42686 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
42687 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
42688 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
42689 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
42690
42691 var registers386 = [...]Register{
42692 {0, x86.REG_AX, "AX"},
42693 {1, x86.REG_CX, "CX"},
42694 {2, x86.REG_DX, "DX"},
42695 {3, x86.REG_BX, "BX"},
42696 {4, x86.REGSP, "SP"},
42697 {5, x86.REG_BP, "BP"},
42698 {6, x86.REG_SI, "SI"},
42699 {7, x86.REG_DI, "DI"},
42700 {8, x86.REG_X0, "X0"},
42701 {9, x86.REG_X1, "X1"},
42702 {10, x86.REG_X2, "X2"},
42703 {11, x86.REG_X3, "X3"},
42704 {12, x86.REG_X4, "X4"},
42705 {13, x86.REG_X5, "X5"},
42706 {14, x86.REG_X6, "X6"},
42707 {15, x86.REG_X7, "X7"},
42708 {16, 0, "SB"},
42709 }
42710 var paramIntReg386 = []int8(nil)
42711 var paramFloatReg386 = []int8(nil)
42712 var gpRegMask386 = regMask(239)
42713 var fpRegMask386 = regMask(65280)
42714 var specialRegMask386 = regMask(0)
42715 var framepointerReg386 = int8(5)
42716 var linkReg386 = int8(-1)
42717 var registersAMD64 = [...]Register{
42718 {0, x86.REG_AX, "AX"},
42719 {1, x86.REG_CX, "CX"},
42720 {2, x86.REG_DX, "DX"},
42721 {3, x86.REG_BX, "BX"},
42722 {4, x86.REGSP, "SP"},
42723 {5, x86.REG_BP, "BP"},
42724 {6, x86.REG_SI, "SI"},
42725 {7, x86.REG_DI, "DI"},
42726 {8, x86.REG_R8, "R8"},
42727 {9, x86.REG_R9, "R9"},
42728 {10, x86.REG_R10, "R10"},
42729 {11, x86.REG_R11, "R11"},
42730 {12, x86.REG_R12, "R12"},
42731 {13, x86.REG_R13, "R13"},
42732 {14, x86.REGG, "g"},
42733 {15, x86.REG_R15, "R15"},
42734 {16, x86.REG_X0, "X0"},
42735 {17, x86.REG_X1, "X1"},
42736 {18, x86.REG_X2, "X2"},
42737 {19, x86.REG_X3, "X3"},
42738 {20, x86.REG_X4, "X4"},
42739 {21, x86.REG_X5, "X5"},
42740 {22, x86.REG_X6, "X6"},
42741 {23, x86.REG_X7, "X7"},
42742 {24, x86.REG_X8, "X8"},
42743 {25, x86.REG_X9, "X9"},
42744 {26, x86.REG_X10, "X10"},
42745 {27, x86.REG_X11, "X11"},
42746 {28, x86.REG_X12, "X12"},
42747 {29, x86.REG_X13, "X13"},
42748 {30, x86.REG_X14, "X14"},
42749 {31, x86.REG_X15, "X15"},
42750 {32, 0, "SB"},
42751 }
42752 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
42753 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
42754 var gpRegMaskAMD64 = regMask(49135)
42755 var fpRegMaskAMD64 = regMask(2147418112)
42756 var specialRegMaskAMD64 = regMask(2147483648)
42757 var framepointerRegAMD64 = int8(5)
42758 var linkRegAMD64 = int8(-1)
42759 var registersARM = [...]Register{
42760 {0, arm.REG_R0, "R0"},
42761 {1, arm.REG_R1, "R1"},
42762 {2, arm.REG_R2, "R2"},
42763 {3, arm.REG_R3, "R3"},
42764 {4, arm.REG_R4, "R4"},
42765 {5, arm.REG_R5, "R5"},
42766 {6, arm.REG_R6, "R6"},
42767 {7, arm.REG_R7, "R7"},
42768 {8, arm.REG_R8, "R8"},
42769 {9, arm.REG_R9, "R9"},
42770 {10, arm.REGG, "g"},
42771 {11, arm.REG_R11, "R11"},
42772 {12, arm.REG_R12, "R12"},
42773 {13, arm.REGSP, "SP"},
42774 {14, arm.REG_R14, "R14"},
42775 {15, arm.REG_R15, "R15"},
42776 {16, arm.REG_F0, "F0"},
42777 {17, arm.REG_F1, "F1"},
42778 {18, arm.REG_F2, "F2"},
42779 {19, arm.REG_F3, "F3"},
42780 {20, arm.REG_F4, "F4"},
42781 {21, arm.REG_F5, "F5"},
42782 {22, arm.REG_F6, "F6"},
42783 {23, arm.REG_F7, "F7"},
42784 {24, arm.REG_F8, "F8"},
42785 {25, arm.REG_F9, "F9"},
42786 {26, arm.REG_F10, "F10"},
42787 {27, arm.REG_F11, "F11"},
42788 {28, arm.REG_F12, "F12"},
42789 {29, arm.REG_F13, "F13"},
42790 {30, arm.REG_F14, "F14"},
42791 {31, arm.REG_F15, "F15"},
42792 {32, 0, "SB"},
42793 }
42794 var paramIntRegARM = []int8(nil)
42795 var paramFloatRegARM = []int8(nil)
42796 var gpRegMaskARM = regMask(21503)
42797 var fpRegMaskARM = regMask(4294901760)
42798 var specialRegMaskARM = regMask(0)
42799 var framepointerRegARM = int8(-1)
42800 var linkRegARM = int8(14)
42801 var registersARM64 = [...]Register{
42802 {0, arm64.REG_R0, "R0"},
42803 {1, arm64.REG_R1, "R1"},
42804 {2, arm64.REG_R2, "R2"},
42805 {3, arm64.REG_R3, "R3"},
42806 {4, arm64.REG_R4, "R4"},
42807 {5, arm64.REG_R5, "R5"},
42808 {6, arm64.REG_R6, "R6"},
42809 {7, arm64.REG_R7, "R7"},
42810 {8, arm64.REG_R8, "R8"},
42811 {9, arm64.REG_R9, "R9"},
42812 {10, arm64.REG_R10, "R10"},
42813 {11, arm64.REG_R11, "R11"},
42814 {12, arm64.REG_R12, "R12"},
42815 {13, arm64.REG_R13, "R13"},
42816 {14, arm64.REG_R14, "R14"},
42817 {15, arm64.REG_R15, "R15"},
42818 {16, arm64.REG_R16, "R16"},
42819 {17, arm64.REG_R17, "R17"},
42820 {18, arm64.REG_R19, "R19"},
42821 {19, arm64.REG_R20, "R20"},
42822 {20, arm64.REG_R21, "R21"},
42823 {21, arm64.REG_R22, "R22"},
42824 {22, arm64.REG_R23, "R23"},
42825 {23, arm64.REG_R24, "R24"},
42826 {24, arm64.REG_R25, "R25"},
42827 {25, arm64.REG_R26, "R26"},
42828 {26, arm64.REGG, "g"},
42829 {27, arm64.REG_R29, "R29"},
42830 {28, arm64.REG_R30, "R30"},
42831 {29, arm64.REGZERO, "ZERO"},
42832 {30, arm64.REGSP, "SP"},
42833 {31, arm64.REG_F0, "F0"},
42834 {32, arm64.REG_F1, "F1"},
42835 {33, arm64.REG_F2, "F2"},
42836 {34, arm64.REG_F3, "F3"},
42837 {35, arm64.REG_F4, "F4"},
42838 {36, arm64.REG_F5, "F5"},
42839 {37, arm64.REG_F6, "F6"},
42840 {38, arm64.REG_F7, "F7"},
42841 {39, arm64.REG_F8, "F8"},
42842 {40, arm64.REG_F9, "F9"},
42843 {41, arm64.REG_F10, "F10"},
42844 {42, arm64.REG_F11, "F11"},
42845 {43, arm64.REG_F12, "F12"},
42846 {44, arm64.REG_F13, "F13"},
42847 {45, arm64.REG_F14, "F14"},
42848 {46, arm64.REG_F15, "F15"},
42849 {47, arm64.REG_F16, "F16"},
42850 {48, arm64.REG_F17, "F17"},
42851 {49, arm64.REG_F18, "F18"},
42852 {50, arm64.REG_F19, "F19"},
42853 {51, arm64.REG_F20, "F20"},
42854 {52, arm64.REG_F21, "F21"},
42855 {53, arm64.REG_F22, "F22"},
42856 {54, arm64.REG_F23, "F23"},
42857 {55, arm64.REG_F24, "F24"},
42858 {56, arm64.REG_F25, "F25"},
42859 {57, arm64.REG_F26, "F26"},
42860 {58, arm64.REG_F27, "F27"},
42861 {59, arm64.REG_F28, "F28"},
42862 {60, arm64.REG_F29, "F29"},
42863 {61, arm64.REG_F30, "F30"},
42864 {62, arm64.REG_F31, "F31"},
42865 {63, 0, "SB"},
42866 }
42867 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
42868 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
42869 var gpRegMaskARM64 = regMask(335544319)
42870 var fpRegMaskARM64 = regMask(9223372034707292160)
42871 var specialRegMaskARM64 = regMask(0)
42872 var framepointerRegARM64 = int8(-1)
42873 var linkRegARM64 = int8(28)
42874 var registersLOONG64 = [...]Register{
42875 {0, loong64.REG_R0, "R0"},
42876 {1, loong64.REG_R1, "R1"},
42877 {2, loong64.REGSP, "SP"},
42878 {3, loong64.REG_R4, "R4"},
42879 {4, loong64.REG_R5, "R5"},
42880 {5, loong64.REG_R6, "R6"},
42881 {6, loong64.REG_R7, "R7"},
42882 {7, loong64.REG_R8, "R8"},
42883 {8, loong64.REG_R9, "R9"},
42884 {9, loong64.REG_R10, "R10"},
42885 {10, loong64.REG_R11, "R11"},
42886 {11, loong64.REG_R12, "R12"},
42887 {12, loong64.REG_R13, "R13"},
42888 {13, loong64.REG_R14, "R14"},
42889 {14, loong64.REG_R15, "R15"},
42890 {15, loong64.REG_R16, "R16"},
42891 {16, loong64.REG_R17, "R17"},
42892 {17, loong64.REG_R18, "R18"},
42893 {18, loong64.REG_R19, "R19"},
42894 {19, loong64.REG_R20, "R20"},
42895 {20, loong64.REG_R21, "R21"},
42896 {21, loong64.REGG, "g"},
42897 {22, loong64.REG_R23, "R23"},
42898 {23, loong64.REG_R24, "R24"},
42899 {24, loong64.REG_R25, "R25"},
42900 {25, loong64.REG_R26, "R26"},
42901 {26, loong64.REG_R27, "R27"},
42902 {27, loong64.REG_R28, "R28"},
42903 {28, loong64.REG_R29, "R29"},
42904 {29, loong64.REG_R31, "R31"},
42905 {30, loong64.REG_F0, "F0"},
42906 {31, loong64.REG_F1, "F1"},
42907 {32, loong64.REG_F2, "F2"},
42908 {33, loong64.REG_F3, "F3"},
42909 {34, loong64.REG_F4, "F4"},
42910 {35, loong64.REG_F5, "F5"},
42911 {36, loong64.REG_F6, "F6"},
42912 {37, loong64.REG_F7, "F7"},
42913 {38, loong64.REG_F8, "F8"},
42914 {39, loong64.REG_F9, "F9"},
42915 {40, loong64.REG_F10, "F10"},
42916 {41, loong64.REG_F11, "F11"},
42917 {42, loong64.REG_F12, "F12"},
42918 {43, loong64.REG_F13, "F13"},
42919 {44, loong64.REG_F14, "F14"},
42920 {45, loong64.REG_F15, "F15"},
42921 {46, loong64.REG_F16, "F16"},
42922 {47, loong64.REG_F17, "F17"},
42923 {48, loong64.REG_F18, "F18"},
42924 {49, loong64.REG_F19, "F19"},
42925 {50, loong64.REG_F20, "F20"},
42926 {51, loong64.REG_F21, "F21"},
42927 {52, loong64.REG_F22, "F22"},
42928 {53, loong64.REG_F23, "F23"},
42929 {54, loong64.REG_F24, "F24"},
42930 {55, loong64.REG_F25, "F25"},
42931 {56, loong64.REG_F26, "F26"},
42932 {57, loong64.REG_F27, "F27"},
42933 {58, loong64.REG_F28, "F28"},
42934 {59, loong64.REG_F29, "F29"},
42935 {60, loong64.REG_F30, "F30"},
42936 {61, loong64.REG_F31, "F31"},
42937 {62, 0, "SB"},
42938 }
42939 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
42940 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
42941 var gpRegMaskLOONG64 = regMask(1071644664)
42942 var fpRegMaskLOONG64 = regMask(4611686017353646080)
42943 var specialRegMaskLOONG64 = regMask(0)
42944 var framepointerRegLOONG64 = int8(-1)
42945 var linkRegLOONG64 = int8(1)
42946 var registersMIPS = [...]Register{
42947 {0, mips.REG_R0, "R0"},
42948 {1, mips.REG_R1, "R1"},
42949 {2, mips.REG_R2, "R2"},
42950 {3, mips.REG_R3, "R3"},
42951 {4, mips.REG_R4, "R4"},
42952 {5, mips.REG_R5, "R5"},
42953 {6, mips.REG_R6, "R6"},
42954 {7, mips.REG_R7, "R7"},
42955 {8, mips.REG_R8, "R8"},
42956 {9, mips.REG_R9, "R9"},
42957 {10, mips.REG_R10, "R10"},
42958 {11, mips.REG_R11, "R11"},
42959 {12, mips.REG_R12, "R12"},
42960 {13, mips.REG_R13, "R13"},
42961 {14, mips.REG_R14, "R14"},
42962 {15, mips.REG_R15, "R15"},
42963 {16, mips.REG_R16, "R16"},
42964 {17, mips.REG_R17, "R17"},
42965 {18, mips.REG_R18, "R18"},
42966 {19, mips.REG_R19, "R19"},
42967 {20, mips.REG_R20, "R20"},
42968 {21, mips.REG_R21, "R21"},
42969 {22, mips.REG_R22, "R22"},
42970 {23, mips.REG_R24, "R24"},
42971 {24, mips.REG_R25, "R25"},
42972 {25, mips.REG_R28, "R28"},
42973 {26, mips.REGSP, "SP"},
42974 {27, mips.REGG, "g"},
42975 {28, mips.REG_R31, "R31"},
42976 {29, mips.REG_F0, "F0"},
42977 {30, mips.REG_F2, "F2"},
42978 {31, mips.REG_F4, "F4"},
42979 {32, mips.REG_F6, "F6"},
42980 {33, mips.REG_F8, "F8"},
42981 {34, mips.REG_F10, "F10"},
42982 {35, mips.REG_F12, "F12"},
42983 {36, mips.REG_F14, "F14"},
42984 {37, mips.REG_F16, "F16"},
42985 {38, mips.REG_F18, "F18"},
42986 {39, mips.REG_F20, "F20"},
42987 {40, mips.REG_F22, "F22"},
42988 {41, mips.REG_F24, "F24"},
42989 {42, mips.REG_F26, "F26"},
42990 {43, mips.REG_F28, "F28"},
42991 {44, mips.REG_F30, "F30"},
42992 {45, mips.REG_HI, "HI"},
42993 {46, mips.REG_LO, "LO"},
42994 {47, 0, "SB"},
42995 }
42996 var paramIntRegMIPS = []int8(nil)
42997 var paramFloatRegMIPS = []int8(nil)
42998 var gpRegMaskMIPS = regMask(335544318)
42999 var fpRegMaskMIPS = regMask(35183835217920)
43000 var specialRegMaskMIPS = regMask(105553116266496)
43001 var framepointerRegMIPS = int8(-1)
43002 var linkRegMIPS = int8(28)
43003 var registersMIPS64 = [...]Register{
43004 {0, mips.REG_R0, "R0"},
43005 {1, mips.REG_R1, "R1"},
43006 {2, mips.REG_R2, "R2"},
43007 {3, mips.REG_R3, "R3"},
43008 {4, mips.REG_R4, "R4"},
43009 {5, mips.REG_R5, "R5"},
43010 {6, mips.REG_R6, "R6"},
43011 {7, mips.REG_R7, "R7"},
43012 {8, mips.REG_R8, "R8"},
43013 {9, mips.REG_R9, "R9"},
43014 {10, mips.REG_R10, "R10"},
43015 {11, mips.REG_R11, "R11"},
43016 {12, mips.REG_R12, "R12"},
43017 {13, mips.REG_R13, "R13"},
43018 {14, mips.REG_R14, "R14"},
43019 {15, mips.REG_R15, "R15"},
43020 {16, mips.REG_R16, "R16"},
43021 {17, mips.REG_R17, "R17"},
43022 {18, mips.REG_R18, "R18"},
43023 {19, mips.REG_R19, "R19"},
43024 {20, mips.REG_R20, "R20"},
43025 {21, mips.REG_R21, "R21"},
43026 {22, mips.REG_R22, "R22"},
43027 {23, mips.REG_R24, "R24"},
43028 {24, mips.REG_R25, "R25"},
43029 {25, mips.REGSP, "SP"},
43030 {26, mips.REGG, "g"},
43031 {27, mips.REG_R31, "R31"},
43032 {28, mips.REG_F0, "F0"},
43033 {29, mips.REG_F1, "F1"},
43034 {30, mips.REG_F2, "F2"},
43035 {31, mips.REG_F3, "F3"},
43036 {32, mips.REG_F4, "F4"},
43037 {33, mips.REG_F5, "F5"},
43038 {34, mips.REG_F6, "F6"},
43039 {35, mips.REG_F7, "F7"},
43040 {36, mips.REG_F8, "F8"},
43041 {37, mips.REG_F9, "F9"},
43042 {38, mips.REG_F10, "F10"},
43043 {39, mips.REG_F11, "F11"},
43044 {40, mips.REG_F12, "F12"},
43045 {41, mips.REG_F13, "F13"},
43046 {42, mips.REG_F14, "F14"},
43047 {43, mips.REG_F15, "F15"},
43048 {44, mips.REG_F16, "F16"},
43049 {45, mips.REG_F17, "F17"},
43050 {46, mips.REG_F18, "F18"},
43051 {47, mips.REG_F19, "F19"},
43052 {48, mips.REG_F20, "F20"},
43053 {49, mips.REG_F21, "F21"},
43054 {50, mips.REG_F22, "F22"},
43055 {51, mips.REG_F23, "F23"},
43056 {52, mips.REG_F24, "F24"},
43057 {53, mips.REG_F25, "F25"},
43058 {54, mips.REG_F26, "F26"},
43059 {55, mips.REG_F27, "F27"},
43060 {56, mips.REG_F28, "F28"},
43061 {57, mips.REG_F29, "F29"},
43062 {58, mips.REG_F30, "F30"},
43063 {59, mips.REG_F31, "F31"},
43064 {60, mips.REG_HI, "HI"},
43065 {61, mips.REG_LO, "LO"},
43066 {62, 0, "SB"},
43067 }
43068 var paramIntRegMIPS64 = []int8(nil)
43069 var paramFloatRegMIPS64 = []int8(nil)
43070 var gpRegMaskMIPS64 = regMask(167772158)
43071 var fpRegMaskMIPS64 = regMask(1152921504338411520)
43072 var specialRegMaskMIPS64 = regMask(3458764513820540928)
43073 var framepointerRegMIPS64 = int8(-1)
43074 var linkRegMIPS64 = int8(27)
43075 var registersPPC64 = [...]Register{
43076 {0, ppc64.REG_R0, "R0"},
43077 {1, ppc64.REGSP, "SP"},
43078 {2, 0, "SB"},
43079 {3, ppc64.REG_R3, "R3"},
43080 {4, ppc64.REG_R4, "R4"},
43081 {5, ppc64.REG_R5, "R5"},
43082 {6, ppc64.REG_R6, "R6"},
43083 {7, ppc64.REG_R7, "R7"},
43084 {8, ppc64.REG_R8, "R8"},
43085 {9, ppc64.REG_R9, "R9"},
43086 {10, ppc64.REG_R10, "R10"},
43087 {11, ppc64.REG_R11, "R11"},
43088 {12, ppc64.REG_R12, "R12"},
43089 {13, ppc64.REG_R13, "R13"},
43090 {14, ppc64.REG_R14, "R14"},
43091 {15, ppc64.REG_R15, "R15"},
43092 {16, ppc64.REG_R16, "R16"},
43093 {17, ppc64.REG_R17, "R17"},
43094 {18, ppc64.REG_R18, "R18"},
43095 {19, ppc64.REG_R19, "R19"},
43096 {20, ppc64.REG_R20, "R20"},
43097 {21, ppc64.REG_R21, "R21"},
43098 {22, ppc64.REG_R22, "R22"},
43099 {23, ppc64.REG_R23, "R23"},
43100 {24, ppc64.REG_R24, "R24"},
43101 {25, ppc64.REG_R25, "R25"},
43102 {26, ppc64.REG_R26, "R26"},
43103 {27, ppc64.REG_R27, "R27"},
43104 {28, ppc64.REG_R28, "R28"},
43105 {29, ppc64.REG_R29, "R29"},
43106 {30, ppc64.REGG, "g"},
43107 {31, ppc64.REG_R31, "R31"},
43108 {32, ppc64.REG_F0, "F0"},
43109 {33, ppc64.REG_F1, "F1"},
43110 {34, ppc64.REG_F2, "F2"},
43111 {35, ppc64.REG_F3, "F3"},
43112 {36, ppc64.REG_F4, "F4"},
43113 {37, ppc64.REG_F5, "F5"},
43114 {38, ppc64.REG_F6, "F6"},
43115 {39, ppc64.REG_F7, "F7"},
43116 {40, ppc64.REG_F8, "F8"},
43117 {41, ppc64.REG_F9, "F9"},
43118 {42, ppc64.REG_F10, "F10"},
43119 {43, ppc64.REG_F11, "F11"},
43120 {44, ppc64.REG_F12, "F12"},
43121 {45, ppc64.REG_F13, "F13"},
43122 {46, ppc64.REG_F14, "F14"},
43123 {47, ppc64.REG_F15, "F15"},
43124 {48, ppc64.REG_F16, "F16"},
43125 {49, ppc64.REG_F17, "F17"},
43126 {50, ppc64.REG_F18, "F18"},
43127 {51, ppc64.REG_F19, "F19"},
43128 {52, ppc64.REG_F20, "F20"},
43129 {53, ppc64.REG_F21, "F21"},
43130 {54, ppc64.REG_F22, "F22"},
43131 {55, ppc64.REG_F23, "F23"},
43132 {56, ppc64.REG_F24, "F24"},
43133 {57, ppc64.REG_F25, "F25"},
43134 {58, ppc64.REG_F26, "F26"},
43135 {59, ppc64.REG_F27, "F27"},
43136 {60, ppc64.REG_F28, "F28"},
43137 {61, ppc64.REG_F29, "F29"},
43138 {62, ppc64.REG_F30, "F30"},
43139 {63, ppc64.REG_XER, "XER"},
43140 }
43141 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
43142 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
43143 var gpRegMaskPPC64 = regMask(1073733624)
43144 var fpRegMaskPPC64 = regMask(9223372032559808512)
43145 var specialRegMaskPPC64 = regMask(9223372036854775808)
43146 var framepointerRegPPC64 = int8(-1)
43147 var linkRegPPC64 = int8(-1)
43148 var registersRISCV64 = [...]Register{
43149 {0, riscv.REG_X0, "X0"},
43150 {1, riscv.REGSP, "SP"},
43151 {2, riscv.REG_X3, "X3"},
43152 {3, riscv.REG_X4, "X4"},
43153 {4, riscv.REG_X5, "X5"},
43154 {5, riscv.REG_X6, "X6"},
43155 {6, riscv.REG_X7, "X7"},
43156 {7, riscv.REG_X8, "X8"},
43157 {8, riscv.REG_X9, "X9"},
43158 {9, riscv.REG_X10, "X10"},
43159 {10, riscv.REG_X11, "X11"},
43160 {11, riscv.REG_X12, "X12"},
43161 {12, riscv.REG_X13, "X13"},
43162 {13, riscv.REG_X14, "X14"},
43163 {14, riscv.REG_X15, "X15"},
43164 {15, riscv.REG_X16, "X16"},
43165 {16, riscv.REG_X17, "X17"},
43166 {17, riscv.REG_X18, "X18"},
43167 {18, riscv.REG_X19, "X19"},
43168 {19, riscv.REG_X20, "X20"},
43169 {20, riscv.REG_X21, "X21"},
43170 {21, riscv.REG_X22, "X22"},
43171 {22, riscv.REG_X23, "X23"},
43172 {23, riscv.REG_X24, "X24"},
43173 {24, riscv.REG_X25, "X25"},
43174 {25, riscv.REG_X26, "X26"},
43175 {26, riscv.REGG, "g"},
43176 {27, riscv.REG_X28, "X28"},
43177 {28, riscv.REG_X29, "X29"},
43178 {29, riscv.REG_X30, "X30"},
43179 {30, riscv.REG_X31, "X31"},
43180 {31, riscv.REG_F0, "F0"},
43181 {32, riscv.REG_F1, "F1"},
43182 {33, riscv.REG_F2, "F2"},
43183 {34, riscv.REG_F3, "F3"},
43184 {35, riscv.REG_F4, "F4"},
43185 {36, riscv.REG_F5, "F5"},
43186 {37, riscv.REG_F6, "F6"},
43187 {38, riscv.REG_F7, "F7"},
43188 {39, riscv.REG_F8, "F8"},
43189 {40, riscv.REG_F9, "F9"},
43190 {41, riscv.REG_F10, "F10"},
43191 {42, riscv.REG_F11, "F11"},
43192 {43, riscv.REG_F12, "F12"},
43193 {44, riscv.REG_F13, "F13"},
43194 {45, riscv.REG_F14, "F14"},
43195 {46, riscv.REG_F15, "F15"},
43196 {47, riscv.REG_F16, "F16"},
43197 {48, riscv.REG_F17, "F17"},
43198 {49, riscv.REG_F18, "F18"},
43199 {50, riscv.REG_F19, "F19"},
43200 {51, riscv.REG_F20, "F20"},
43201 {52, riscv.REG_F21, "F21"},
43202 {53, riscv.REG_F22, "F22"},
43203 {54, riscv.REG_F23, "F23"},
43204 {55, riscv.REG_F24, "F24"},
43205 {56, riscv.REG_F25, "F25"},
43206 {57, riscv.REG_F26, "F26"},
43207 {58, riscv.REG_F27, "F27"},
43208 {59, riscv.REG_F28, "F28"},
43209 {60, riscv.REG_F29, "F29"},
43210 {61, riscv.REG_F30, "F30"},
43211 {62, riscv.REG_F31, "F31"},
43212 {63, 0, "SB"},
43213 }
43214 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
43215 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
43216 var gpRegMaskRISCV64 = regMask(1006632944)
43217 var fpRegMaskRISCV64 = regMask(9223372034707292160)
43218 var specialRegMaskRISCV64 = regMask(0)
43219 var framepointerRegRISCV64 = int8(-1)
43220 var linkRegRISCV64 = int8(0)
43221 var registersS390X = [...]Register{
43222 {0, s390x.REG_R0, "R0"},
43223 {1, s390x.REG_R1, "R1"},
43224 {2, s390x.REG_R2, "R2"},
43225 {3, s390x.REG_R3, "R3"},
43226 {4, s390x.REG_R4, "R4"},
43227 {5, s390x.REG_R5, "R5"},
43228 {6, s390x.REG_R6, "R6"},
43229 {7, s390x.REG_R7, "R7"},
43230 {8, s390x.REG_R8, "R8"},
43231 {9, s390x.REG_R9, "R9"},
43232 {10, s390x.REG_R10, "R10"},
43233 {11, s390x.REG_R11, "R11"},
43234 {12, s390x.REG_R12, "R12"},
43235 {13, s390x.REGG, "g"},
43236 {14, s390x.REG_R14, "R14"},
43237 {15, s390x.REGSP, "SP"},
43238 {16, s390x.REG_F0, "F0"},
43239 {17, s390x.REG_F1, "F1"},
43240 {18, s390x.REG_F2, "F2"},
43241 {19, s390x.REG_F3, "F3"},
43242 {20, s390x.REG_F4, "F4"},
43243 {21, s390x.REG_F5, "F5"},
43244 {22, s390x.REG_F6, "F6"},
43245 {23, s390x.REG_F7, "F7"},
43246 {24, s390x.REG_F8, "F8"},
43247 {25, s390x.REG_F9, "F9"},
43248 {26, s390x.REG_F10, "F10"},
43249 {27, s390x.REG_F11, "F11"},
43250 {28, s390x.REG_F12, "F12"},
43251 {29, s390x.REG_F13, "F13"},
43252 {30, s390x.REG_F14, "F14"},
43253 {31, s390x.REG_F15, "F15"},
43254 {32, 0, "SB"},
43255 }
43256 var paramIntRegS390X = []int8(nil)
43257 var paramFloatRegS390X = []int8(nil)
43258 var gpRegMaskS390X = regMask(23551)
43259 var fpRegMaskS390X = regMask(4294901760)
43260 var specialRegMaskS390X = regMask(0)
43261 var framepointerRegS390X = int8(-1)
43262 var linkRegS390X = int8(14)
43263 var registersWasm = [...]Register{
43264 {0, wasm.REG_R0, "R0"},
43265 {1, wasm.REG_R1, "R1"},
43266 {2, wasm.REG_R2, "R2"},
43267 {3, wasm.REG_R3, "R3"},
43268 {4, wasm.REG_R4, "R4"},
43269 {5, wasm.REG_R5, "R5"},
43270 {6, wasm.REG_R6, "R6"},
43271 {7, wasm.REG_R7, "R7"},
43272 {8, wasm.REG_R8, "R8"},
43273 {9, wasm.REG_R9, "R9"},
43274 {10, wasm.REG_R10, "R10"},
43275 {11, wasm.REG_R11, "R11"},
43276 {12, wasm.REG_R12, "R12"},
43277 {13, wasm.REG_R13, "R13"},
43278 {14, wasm.REG_R14, "R14"},
43279 {15, wasm.REG_R15, "R15"},
43280 {16, wasm.REG_F0, "F0"},
43281 {17, wasm.REG_F1, "F1"},
43282 {18, wasm.REG_F2, "F2"},
43283 {19, wasm.REG_F3, "F3"},
43284 {20, wasm.REG_F4, "F4"},
43285 {21, wasm.REG_F5, "F5"},
43286 {22, wasm.REG_F6, "F6"},
43287 {23, wasm.REG_F7, "F7"},
43288 {24, wasm.REG_F8, "F8"},
43289 {25, wasm.REG_F9, "F9"},
43290 {26, wasm.REG_F10, "F10"},
43291 {27, wasm.REG_F11, "F11"},
43292 {28, wasm.REG_F12, "F12"},
43293 {29, wasm.REG_F13, "F13"},
43294 {30, wasm.REG_F14, "F14"},
43295 {31, wasm.REG_F15, "F15"},
43296 {32, wasm.REG_F16, "F16"},
43297 {33, wasm.REG_F17, "F17"},
43298 {34, wasm.REG_F18, "F18"},
43299 {35, wasm.REG_F19, "F19"},
43300 {36, wasm.REG_F20, "F20"},
43301 {37, wasm.REG_F21, "F21"},
43302 {38, wasm.REG_F22, "F22"},
43303 {39, wasm.REG_F23, "F23"},
43304 {40, wasm.REG_F24, "F24"},
43305 {41, wasm.REG_F25, "F25"},
43306 {42, wasm.REG_F26, "F26"},
43307 {43, wasm.REG_F27, "F27"},
43308 {44, wasm.REG_F28, "F28"},
43309 {45, wasm.REG_F29, "F29"},
43310 {46, wasm.REG_F30, "F30"},
43311 {47, wasm.REG_F31, "F31"},
43312 {48, wasm.REGSP, "SP"},
43313 {49, wasm.REGG, "g"},
43314 {50, 0, "SB"},
43315 }
43316 var paramIntRegWasm = []int8(nil)
43317 var paramFloatRegWasm = []int8(nil)
43318 var gpRegMaskWasm = regMask(65535)
43319 var fpRegMaskWasm = regMask(281474976645120)
43320 var fp32RegMaskWasm = regMask(4294901760)
43321 var fp64RegMaskWasm = regMask(281470681743360)
43322 var specialRegMaskWasm = regMask(0)
43323 var framepointerRegWasm = int8(-1)
43324 var linkRegWasm = int8(-1)
43325
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