1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105 BlockLOONG64BEQ
106 BlockLOONG64BNE
107 BlockLOONG64BGE
108 BlockLOONG64BLT
109 BlockLOONG64BGEU
110 BlockLOONG64BLTU
111
112 BlockMIPSEQ
113 BlockMIPSNE
114 BlockMIPSLTZ
115 BlockMIPSLEZ
116 BlockMIPSGTZ
117 BlockMIPSGEZ
118 BlockMIPSFPT
119 BlockMIPSFPF
120
121 BlockMIPS64EQ
122 BlockMIPS64NE
123 BlockMIPS64LTZ
124 BlockMIPS64LEZ
125 BlockMIPS64GTZ
126 BlockMIPS64GEZ
127 BlockMIPS64FPT
128 BlockMIPS64FPF
129
130 BlockPPC64EQ
131 BlockPPC64NE
132 BlockPPC64LT
133 BlockPPC64LE
134 BlockPPC64GT
135 BlockPPC64GE
136 BlockPPC64FLT
137 BlockPPC64FLE
138 BlockPPC64FGT
139 BlockPPC64FGE
140
141 BlockRISCV64BEQ
142 BlockRISCV64BNE
143 BlockRISCV64BLT
144 BlockRISCV64BGE
145 BlockRISCV64BLTU
146 BlockRISCV64BGEU
147 BlockRISCV64BEQZ
148 BlockRISCV64BNEZ
149 BlockRISCV64BLEZ
150 BlockRISCV64BGEZ
151 BlockRISCV64BLTZ
152 BlockRISCV64BGTZ
153
154 BlockS390XBRC
155 BlockS390XCRJ
156 BlockS390XCGRJ
157 BlockS390XCLRJ
158 BlockS390XCLGRJ
159 BlockS390XCIJ
160 BlockS390XCGIJ
161 BlockS390XCLIJ
162 BlockS390XCLGIJ
163
164 BlockPlain
165 BlockIf
166 BlockDefer
167 BlockRet
168 BlockRetJmp
169 BlockExit
170 BlockJumpTable
171 BlockFirst
172 )
173
174 var blockString = [...]string{
175 BlockInvalid: "BlockInvalid",
176
177 Block386EQ: "EQ",
178 Block386NE: "NE",
179 Block386LT: "LT",
180 Block386LE: "LE",
181 Block386GT: "GT",
182 Block386GE: "GE",
183 Block386OS: "OS",
184 Block386OC: "OC",
185 Block386ULT: "ULT",
186 Block386ULE: "ULE",
187 Block386UGT: "UGT",
188 Block386UGE: "UGE",
189 Block386EQF: "EQF",
190 Block386NEF: "NEF",
191 Block386ORD: "ORD",
192 Block386NAN: "NAN",
193
194 BlockAMD64EQ: "EQ",
195 BlockAMD64NE: "NE",
196 BlockAMD64LT: "LT",
197 BlockAMD64LE: "LE",
198 BlockAMD64GT: "GT",
199 BlockAMD64GE: "GE",
200 BlockAMD64OS: "OS",
201 BlockAMD64OC: "OC",
202 BlockAMD64ULT: "ULT",
203 BlockAMD64ULE: "ULE",
204 BlockAMD64UGT: "UGT",
205 BlockAMD64UGE: "UGE",
206 BlockAMD64EQF: "EQF",
207 BlockAMD64NEF: "NEF",
208 BlockAMD64ORD: "ORD",
209 BlockAMD64NAN: "NAN",
210 BlockAMD64JUMPTABLE: "JUMPTABLE",
211
212 BlockARMEQ: "EQ",
213 BlockARMNE: "NE",
214 BlockARMLT: "LT",
215 BlockARMLE: "LE",
216 BlockARMGT: "GT",
217 BlockARMGE: "GE",
218 BlockARMULT: "ULT",
219 BlockARMULE: "ULE",
220 BlockARMUGT: "UGT",
221 BlockARMUGE: "UGE",
222 BlockARMLTnoov: "LTnoov",
223 BlockARMLEnoov: "LEnoov",
224 BlockARMGTnoov: "GTnoov",
225 BlockARMGEnoov: "GEnoov",
226
227 BlockARM64EQ: "EQ",
228 BlockARM64NE: "NE",
229 BlockARM64LT: "LT",
230 BlockARM64LE: "LE",
231 BlockARM64GT: "GT",
232 BlockARM64GE: "GE",
233 BlockARM64ULT: "ULT",
234 BlockARM64ULE: "ULE",
235 BlockARM64UGT: "UGT",
236 BlockARM64UGE: "UGE",
237 BlockARM64Z: "Z",
238 BlockARM64NZ: "NZ",
239 BlockARM64ZW: "ZW",
240 BlockARM64NZW: "NZW",
241 BlockARM64TBZ: "TBZ",
242 BlockARM64TBNZ: "TBNZ",
243 BlockARM64FLT: "FLT",
244 BlockARM64FLE: "FLE",
245 BlockARM64FGT: "FGT",
246 BlockARM64FGE: "FGE",
247 BlockARM64LTnoov: "LTnoov",
248 BlockARM64LEnoov: "LEnoov",
249 BlockARM64GTnoov: "GTnoov",
250 BlockARM64GEnoov: "GEnoov",
251 BlockARM64JUMPTABLE: "JUMPTABLE",
252
253 BlockLOONG64EQ: "EQ",
254 BlockLOONG64NE: "NE",
255 BlockLOONG64LTZ: "LTZ",
256 BlockLOONG64LEZ: "LEZ",
257 BlockLOONG64GTZ: "GTZ",
258 BlockLOONG64GEZ: "GEZ",
259 BlockLOONG64FPT: "FPT",
260 BlockLOONG64FPF: "FPF",
261 BlockLOONG64BEQ: "BEQ",
262 BlockLOONG64BNE: "BNE",
263 BlockLOONG64BGE: "BGE",
264 BlockLOONG64BLT: "BLT",
265 BlockLOONG64BGEU: "BGEU",
266 BlockLOONG64BLTU: "BLTU",
267
268 BlockMIPSEQ: "EQ",
269 BlockMIPSNE: "NE",
270 BlockMIPSLTZ: "LTZ",
271 BlockMIPSLEZ: "LEZ",
272 BlockMIPSGTZ: "GTZ",
273 BlockMIPSGEZ: "GEZ",
274 BlockMIPSFPT: "FPT",
275 BlockMIPSFPF: "FPF",
276
277 BlockMIPS64EQ: "EQ",
278 BlockMIPS64NE: "NE",
279 BlockMIPS64LTZ: "LTZ",
280 BlockMIPS64LEZ: "LEZ",
281 BlockMIPS64GTZ: "GTZ",
282 BlockMIPS64GEZ: "GEZ",
283 BlockMIPS64FPT: "FPT",
284 BlockMIPS64FPF: "FPF",
285
286 BlockPPC64EQ: "EQ",
287 BlockPPC64NE: "NE",
288 BlockPPC64LT: "LT",
289 BlockPPC64LE: "LE",
290 BlockPPC64GT: "GT",
291 BlockPPC64GE: "GE",
292 BlockPPC64FLT: "FLT",
293 BlockPPC64FLE: "FLE",
294 BlockPPC64FGT: "FGT",
295 BlockPPC64FGE: "FGE",
296
297 BlockRISCV64BEQ: "BEQ",
298 BlockRISCV64BNE: "BNE",
299 BlockRISCV64BLT: "BLT",
300 BlockRISCV64BGE: "BGE",
301 BlockRISCV64BLTU: "BLTU",
302 BlockRISCV64BGEU: "BGEU",
303 BlockRISCV64BEQZ: "BEQZ",
304 BlockRISCV64BNEZ: "BNEZ",
305 BlockRISCV64BLEZ: "BLEZ",
306 BlockRISCV64BGEZ: "BGEZ",
307 BlockRISCV64BLTZ: "BLTZ",
308 BlockRISCV64BGTZ: "BGTZ",
309
310 BlockS390XBRC: "BRC",
311 BlockS390XCRJ: "CRJ",
312 BlockS390XCGRJ: "CGRJ",
313 BlockS390XCLRJ: "CLRJ",
314 BlockS390XCLGRJ: "CLGRJ",
315 BlockS390XCIJ: "CIJ",
316 BlockS390XCGIJ: "CGIJ",
317 BlockS390XCLIJ: "CLIJ",
318 BlockS390XCLGIJ: "CLGIJ",
319
320 BlockPlain: "Plain",
321 BlockIf: "If",
322 BlockDefer: "Defer",
323 BlockRet: "Ret",
324 BlockRetJmp: "RetJmp",
325 BlockExit: "Exit",
326 BlockJumpTable: "JumpTable",
327 BlockFirst: "First",
328 }
329
330 func (k BlockKind) String() string { return blockString[k] }
331 func (k BlockKind) AuxIntType() string {
332 switch k {
333 case BlockARM64TBZ:
334 return "int64"
335 case BlockARM64TBNZ:
336 return "int64"
337 case BlockS390XCIJ:
338 return "int8"
339 case BlockS390XCGIJ:
340 return "int8"
341 case BlockS390XCLIJ:
342 return "uint8"
343 case BlockS390XCLGIJ:
344 return "uint8"
345 }
346 return ""
347 }
348
349 const (
350 OpInvalid Op = iota
351
352 Op386ADDSS
353 Op386ADDSD
354 Op386SUBSS
355 Op386SUBSD
356 Op386MULSS
357 Op386MULSD
358 Op386DIVSS
359 Op386DIVSD
360 Op386MOVSSload
361 Op386MOVSDload
362 Op386MOVSSconst
363 Op386MOVSDconst
364 Op386MOVSSloadidx1
365 Op386MOVSSloadidx4
366 Op386MOVSDloadidx1
367 Op386MOVSDloadidx8
368 Op386MOVSSstore
369 Op386MOVSDstore
370 Op386MOVSSstoreidx1
371 Op386MOVSSstoreidx4
372 Op386MOVSDstoreidx1
373 Op386MOVSDstoreidx8
374 Op386ADDSSload
375 Op386ADDSDload
376 Op386SUBSSload
377 Op386SUBSDload
378 Op386MULSSload
379 Op386MULSDload
380 Op386DIVSSload
381 Op386DIVSDload
382 Op386ADDL
383 Op386ADDLconst
384 Op386ADDLcarry
385 Op386ADDLconstcarry
386 Op386ADCL
387 Op386ADCLconst
388 Op386SUBL
389 Op386SUBLconst
390 Op386SUBLcarry
391 Op386SUBLconstcarry
392 Op386SBBL
393 Op386SBBLconst
394 Op386MULL
395 Op386MULLconst
396 Op386MULLU
397 Op386HMULL
398 Op386HMULLU
399 Op386MULLQU
400 Op386AVGLU
401 Op386DIVL
402 Op386DIVW
403 Op386DIVLU
404 Op386DIVWU
405 Op386MODL
406 Op386MODW
407 Op386MODLU
408 Op386MODWU
409 Op386ANDL
410 Op386ANDLconst
411 Op386ORL
412 Op386ORLconst
413 Op386XORL
414 Op386XORLconst
415 Op386CMPL
416 Op386CMPW
417 Op386CMPB
418 Op386CMPLconst
419 Op386CMPWconst
420 Op386CMPBconst
421 Op386CMPLload
422 Op386CMPWload
423 Op386CMPBload
424 Op386CMPLconstload
425 Op386CMPWconstload
426 Op386CMPBconstload
427 Op386UCOMISS
428 Op386UCOMISD
429 Op386TESTL
430 Op386TESTW
431 Op386TESTB
432 Op386TESTLconst
433 Op386TESTWconst
434 Op386TESTBconst
435 Op386SHLL
436 Op386SHLLconst
437 Op386SHRL
438 Op386SHRW
439 Op386SHRB
440 Op386SHRLconst
441 Op386SHRWconst
442 Op386SHRBconst
443 Op386SARL
444 Op386SARW
445 Op386SARB
446 Op386SARLconst
447 Op386SARWconst
448 Op386SARBconst
449 Op386ROLL
450 Op386ROLW
451 Op386ROLB
452 Op386ROLLconst
453 Op386ROLWconst
454 Op386ROLBconst
455 Op386ADDLload
456 Op386SUBLload
457 Op386MULLload
458 Op386ANDLload
459 Op386ORLload
460 Op386XORLload
461 Op386ADDLloadidx4
462 Op386SUBLloadidx4
463 Op386MULLloadidx4
464 Op386ANDLloadidx4
465 Op386ORLloadidx4
466 Op386XORLloadidx4
467 Op386NEGL
468 Op386NOTL
469 Op386BSFL
470 Op386BSFW
471 Op386LoweredCtz32
472 Op386LoweredCtz64
473 Op386BSRL
474 Op386BSRW
475 Op386BSWAPL
476 Op386SQRTSD
477 Op386SQRTSS
478 Op386SBBLcarrymask
479 Op386SETEQ
480 Op386SETNE
481 Op386SETL
482 Op386SETLE
483 Op386SETG
484 Op386SETGE
485 Op386SETB
486 Op386SETBE
487 Op386SETA
488 Op386SETAE
489 Op386SETO
490 Op386SETEQF
491 Op386SETNEF
492 Op386SETORD
493 Op386SETNAN
494 Op386SETGF
495 Op386SETGEF
496 Op386MOVBLSX
497 Op386MOVBLZX
498 Op386MOVWLSX
499 Op386MOVWLZX
500 Op386MOVLconst
501 Op386CVTTSD2SL
502 Op386CVTTSS2SL
503 Op386CVTSL2SS
504 Op386CVTSL2SD
505 Op386CVTSD2SS
506 Op386CVTSS2SD
507 Op386PXOR
508 Op386LEAL
509 Op386LEAL1
510 Op386LEAL2
511 Op386LEAL4
512 Op386LEAL8
513 Op386MOVBload
514 Op386MOVBLSXload
515 Op386MOVWload
516 Op386MOVWLSXload
517 Op386MOVLload
518 Op386MOVBstore
519 Op386MOVWstore
520 Op386MOVLstore
521 Op386ADDLmodify
522 Op386SUBLmodify
523 Op386ANDLmodify
524 Op386ORLmodify
525 Op386XORLmodify
526 Op386ADDLmodifyidx4
527 Op386SUBLmodifyidx4
528 Op386ANDLmodifyidx4
529 Op386ORLmodifyidx4
530 Op386XORLmodifyidx4
531 Op386ADDLconstmodify
532 Op386ANDLconstmodify
533 Op386ORLconstmodify
534 Op386XORLconstmodify
535 Op386ADDLconstmodifyidx4
536 Op386ANDLconstmodifyidx4
537 Op386ORLconstmodifyidx4
538 Op386XORLconstmodifyidx4
539 Op386MOVBloadidx1
540 Op386MOVWloadidx1
541 Op386MOVWloadidx2
542 Op386MOVLloadidx1
543 Op386MOVLloadidx4
544 Op386MOVBstoreidx1
545 Op386MOVWstoreidx1
546 Op386MOVWstoreidx2
547 Op386MOVLstoreidx1
548 Op386MOVLstoreidx4
549 Op386MOVBstoreconst
550 Op386MOVWstoreconst
551 Op386MOVLstoreconst
552 Op386MOVBstoreconstidx1
553 Op386MOVWstoreconstidx1
554 Op386MOVWstoreconstidx2
555 Op386MOVLstoreconstidx1
556 Op386MOVLstoreconstidx4
557 Op386DUFFZERO
558 Op386REPSTOSL
559 Op386CALLstatic
560 Op386CALLtail
561 Op386CALLclosure
562 Op386CALLinter
563 Op386DUFFCOPY
564 Op386REPMOVSL
565 Op386InvertFlags
566 Op386LoweredGetG
567 Op386LoweredGetClosurePtr
568 Op386LoweredGetCallerPC
569 Op386LoweredGetCallerSP
570 Op386LoweredNilCheck
571 Op386LoweredWB
572 Op386LoweredPanicBoundsA
573 Op386LoweredPanicBoundsB
574 Op386LoweredPanicBoundsC
575 Op386LoweredPanicExtendA
576 Op386LoweredPanicExtendB
577 Op386LoweredPanicExtendC
578 Op386FlagEQ
579 Op386FlagLT_ULT
580 Op386FlagLT_UGT
581 Op386FlagGT_UGT
582 Op386FlagGT_ULT
583 Op386MOVSSconst1
584 Op386MOVSDconst1
585 Op386MOVSSconst2
586 Op386MOVSDconst2
587
588 OpAMD64ADDSS
589 OpAMD64ADDSD
590 OpAMD64SUBSS
591 OpAMD64SUBSD
592 OpAMD64MULSS
593 OpAMD64MULSD
594 OpAMD64DIVSS
595 OpAMD64DIVSD
596 OpAMD64MOVSSload
597 OpAMD64MOVSDload
598 OpAMD64MOVSSconst
599 OpAMD64MOVSDconst
600 OpAMD64MOVSSloadidx1
601 OpAMD64MOVSSloadidx4
602 OpAMD64MOVSDloadidx1
603 OpAMD64MOVSDloadidx8
604 OpAMD64MOVSSstore
605 OpAMD64MOVSDstore
606 OpAMD64MOVSSstoreidx1
607 OpAMD64MOVSSstoreidx4
608 OpAMD64MOVSDstoreidx1
609 OpAMD64MOVSDstoreidx8
610 OpAMD64ADDSSload
611 OpAMD64ADDSDload
612 OpAMD64SUBSSload
613 OpAMD64SUBSDload
614 OpAMD64MULSSload
615 OpAMD64MULSDload
616 OpAMD64DIVSSload
617 OpAMD64DIVSDload
618 OpAMD64ADDSSloadidx1
619 OpAMD64ADDSSloadidx4
620 OpAMD64ADDSDloadidx1
621 OpAMD64ADDSDloadidx8
622 OpAMD64SUBSSloadidx1
623 OpAMD64SUBSSloadidx4
624 OpAMD64SUBSDloadidx1
625 OpAMD64SUBSDloadidx8
626 OpAMD64MULSSloadidx1
627 OpAMD64MULSSloadidx4
628 OpAMD64MULSDloadidx1
629 OpAMD64MULSDloadidx8
630 OpAMD64DIVSSloadidx1
631 OpAMD64DIVSSloadidx4
632 OpAMD64DIVSDloadidx1
633 OpAMD64DIVSDloadidx8
634 OpAMD64ADDQ
635 OpAMD64ADDL
636 OpAMD64ADDQconst
637 OpAMD64ADDLconst
638 OpAMD64ADDQconstmodify
639 OpAMD64ADDLconstmodify
640 OpAMD64SUBQ
641 OpAMD64SUBL
642 OpAMD64SUBQconst
643 OpAMD64SUBLconst
644 OpAMD64MULQ
645 OpAMD64MULL
646 OpAMD64MULQconst
647 OpAMD64MULLconst
648 OpAMD64MULLU
649 OpAMD64MULQU
650 OpAMD64HMULQ
651 OpAMD64HMULL
652 OpAMD64HMULQU
653 OpAMD64HMULLU
654 OpAMD64AVGQU
655 OpAMD64DIVQ
656 OpAMD64DIVL
657 OpAMD64DIVW
658 OpAMD64DIVQU
659 OpAMD64DIVLU
660 OpAMD64DIVWU
661 OpAMD64NEGLflags
662 OpAMD64ADDQcarry
663 OpAMD64ADCQ
664 OpAMD64ADDQconstcarry
665 OpAMD64ADCQconst
666 OpAMD64SUBQborrow
667 OpAMD64SBBQ
668 OpAMD64SUBQconstborrow
669 OpAMD64SBBQconst
670 OpAMD64MULQU2
671 OpAMD64DIVQU2
672 OpAMD64ANDQ
673 OpAMD64ANDL
674 OpAMD64ANDQconst
675 OpAMD64ANDLconst
676 OpAMD64ANDQconstmodify
677 OpAMD64ANDLconstmodify
678 OpAMD64ORQ
679 OpAMD64ORL
680 OpAMD64ORQconst
681 OpAMD64ORLconst
682 OpAMD64ORQconstmodify
683 OpAMD64ORLconstmodify
684 OpAMD64XORQ
685 OpAMD64XORL
686 OpAMD64XORQconst
687 OpAMD64XORLconst
688 OpAMD64XORQconstmodify
689 OpAMD64XORLconstmodify
690 OpAMD64CMPQ
691 OpAMD64CMPL
692 OpAMD64CMPW
693 OpAMD64CMPB
694 OpAMD64CMPQconst
695 OpAMD64CMPLconst
696 OpAMD64CMPWconst
697 OpAMD64CMPBconst
698 OpAMD64CMPQload
699 OpAMD64CMPLload
700 OpAMD64CMPWload
701 OpAMD64CMPBload
702 OpAMD64CMPQconstload
703 OpAMD64CMPLconstload
704 OpAMD64CMPWconstload
705 OpAMD64CMPBconstload
706 OpAMD64CMPQloadidx8
707 OpAMD64CMPQloadidx1
708 OpAMD64CMPLloadidx4
709 OpAMD64CMPLloadidx1
710 OpAMD64CMPWloadidx2
711 OpAMD64CMPWloadidx1
712 OpAMD64CMPBloadidx1
713 OpAMD64CMPQconstloadidx8
714 OpAMD64CMPQconstloadidx1
715 OpAMD64CMPLconstloadidx4
716 OpAMD64CMPLconstloadidx1
717 OpAMD64CMPWconstloadidx2
718 OpAMD64CMPWconstloadidx1
719 OpAMD64CMPBconstloadidx1
720 OpAMD64UCOMISS
721 OpAMD64UCOMISD
722 OpAMD64BTL
723 OpAMD64BTQ
724 OpAMD64BTCL
725 OpAMD64BTCQ
726 OpAMD64BTRL
727 OpAMD64BTRQ
728 OpAMD64BTSL
729 OpAMD64BTSQ
730 OpAMD64BTLconst
731 OpAMD64BTQconst
732 OpAMD64BTCQconst
733 OpAMD64BTRQconst
734 OpAMD64BTSQconst
735 OpAMD64BTSQconstmodify
736 OpAMD64BTRQconstmodify
737 OpAMD64BTCQconstmodify
738 OpAMD64TESTQ
739 OpAMD64TESTL
740 OpAMD64TESTW
741 OpAMD64TESTB
742 OpAMD64TESTQconst
743 OpAMD64TESTLconst
744 OpAMD64TESTWconst
745 OpAMD64TESTBconst
746 OpAMD64SHLQ
747 OpAMD64SHLL
748 OpAMD64SHLQconst
749 OpAMD64SHLLconst
750 OpAMD64SHRQ
751 OpAMD64SHRL
752 OpAMD64SHRW
753 OpAMD64SHRB
754 OpAMD64SHRQconst
755 OpAMD64SHRLconst
756 OpAMD64SHRWconst
757 OpAMD64SHRBconst
758 OpAMD64SARQ
759 OpAMD64SARL
760 OpAMD64SARW
761 OpAMD64SARB
762 OpAMD64SARQconst
763 OpAMD64SARLconst
764 OpAMD64SARWconst
765 OpAMD64SARBconst
766 OpAMD64SHRDQ
767 OpAMD64SHLDQ
768 OpAMD64ROLQ
769 OpAMD64ROLL
770 OpAMD64ROLW
771 OpAMD64ROLB
772 OpAMD64RORQ
773 OpAMD64RORL
774 OpAMD64RORW
775 OpAMD64RORB
776 OpAMD64ROLQconst
777 OpAMD64ROLLconst
778 OpAMD64ROLWconst
779 OpAMD64ROLBconst
780 OpAMD64ADDLload
781 OpAMD64ADDQload
782 OpAMD64SUBQload
783 OpAMD64SUBLload
784 OpAMD64ANDLload
785 OpAMD64ANDQload
786 OpAMD64ORQload
787 OpAMD64ORLload
788 OpAMD64XORQload
789 OpAMD64XORLload
790 OpAMD64ADDLloadidx1
791 OpAMD64ADDLloadidx4
792 OpAMD64ADDLloadidx8
793 OpAMD64ADDQloadidx1
794 OpAMD64ADDQloadidx8
795 OpAMD64SUBLloadidx1
796 OpAMD64SUBLloadidx4
797 OpAMD64SUBLloadidx8
798 OpAMD64SUBQloadidx1
799 OpAMD64SUBQloadidx8
800 OpAMD64ANDLloadidx1
801 OpAMD64ANDLloadidx4
802 OpAMD64ANDLloadidx8
803 OpAMD64ANDQloadidx1
804 OpAMD64ANDQloadidx8
805 OpAMD64ORLloadidx1
806 OpAMD64ORLloadidx4
807 OpAMD64ORLloadidx8
808 OpAMD64ORQloadidx1
809 OpAMD64ORQloadidx8
810 OpAMD64XORLloadidx1
811 OpAMD64XORLloadidx4
812 OpAMD64XORLloadidx8
813 OpAMD64XORQloadidx1
814 OpAMD64XORQloadidx8
815 OpAMD64ADDQmodify
816 OpAMD64SUBQmodify
817 OpAMD64ANDQmodify
818 OpAMD64ORQmodify
819 OpAMD64XORQmodify
820 OpAMD64ADDLmodify
821 OpAMD64SUBLmodify
822 OpAMD64ANDLmodify
823 OpAMD64ORLmodify
824 OpAMD64XORLmodify
825 OpAMD64ADDQmodifyidx1
826 OpAMD64ADDQmodifyidx8
827 OpAMD64SUBQmodifyidx1
828 OpAMD64SUBQmodifyidx8
829 OpAMD64ANDQmodifyidx1
830 OpAMD64ANDQmodifyidx8
831 OpAMD64ORQmodifyidx1
832 OpAMD64ORQmodifyidx8
833 OpAMD64XORQmodifyidx1
834 OpAMD64XORQmodifyidx8
835 OpAMD64ADDLmodifyidx1
836 OpAMD64ADDLmodifyidx4
837 OpAMD64ADDLmodifyidx8
838 OpAMD64SUBLmodifyidx1
839 OpAMD64SUBLmodifyidx4
840 OpAMD64SUBLmodifyidx8
841 OpAMD64ANDLmodifyidx1
842 OpAMD64ANDLmodifyidx4
843 OpAMD64ANDLmodifyidx8
844 OpAMD64ORLmodifyidx1
845 OpAMD64ORLmodifyidx4
846 OpAMD64ORLmodifyidx8
847 OpAMD64XORLmodifyidx1
848 OpAMD64XORLmodifyidx4
849 OpAMD64XORLmodifyidx8
850 OpAMD64ADDQconstmodifyidx1
851 OpAMD64ADDQconstmodifyidx8
852 OpAMD64ANDQconstmodifyidx1
853 OpAMD64ANDQconstmodifyidx8
854 OpAMD64ORQconstmodifyidx1
855 OpAMD64ORQconstmodifyidx8
856 OpAMD64XORQconstmodifyidx1
857 OpAMD64XORQconstmodifyidx8
858 OpAMD64ADDLconstmodifyidx1
859 OpAMD64ADDLconstmodifyidx4
860 OpAMD64ADDLconstmodifyidx8
861 OpAMD64ANDLconstmodifyidx1
862 OpAMD64ANDLconstmodifyidx4
863 OpAMD64ANDLconstmodifyidx8
864 OpAMD64ORLconstmodifyidx1
865 OpAMD64ORLconstmodifyidx4
866 OpAMD64ORLconstmodifyidx8
867 OpAMD64XORLconstmodifyidx1
868 OpAMD64XORLconstmodifyidx4
869 OpAMD64XORLconstmodifyidx8
870 OpAMD64NEGQ
871 OpAMD64NEGL
872 OpAMD64NOTQ
873 OpAMD64NOTL
874 OpAMD64BSFQ
875 OpAMD64BSFL
876 OpAMD64BSRQ
877 OpAMD64BSRL
878 OpAMD64CMOVQEQ
879 OpAMD64CMOVQNE
880 OpAMD64CMOVQLT
881 OpAMD64CMOVQGT
882 OpAMD64CMOVQLE
883 OpAMD64CMOVQGE
884 OpAMD64CMOVQLS
885 OpAMD64CMOVQHI
886 OpAMD64CMOVQCC
887 OpAMD64CMOVQCS
888 OpAMD64CMOVLEQ
889 OpAMD64CMOVLNE
890 OpAMD64CMOVLLT
891 OpAMD64CMOVLGT
892 OpAMD64CMOVLLE
893 OpAMD64CMOVLGE
894 OpAMD64CMOVLLS
895 OpAMD64CMOVLHI
896 OpAMD64CMOVLCC
897 OpAMD64CMOVLCS
898 OpAMD64CMOVWEQ
899 OpAMD64CMOVWNE
900 OpAMD64CMOVWLT
901 OpAMD64CMOVWGT
902 OpAMD64CMOVWLE
903 OpAMD64CMOVWGE
904 OpAMD64CMOVWLS
905 OpAMD64CMOVWHI
906 OpAMD64CMOVWCC
907 OpAMD64CMOVWCS
908 OpAMD64CMOVQEQF
909 OpAMD64CMOVQNEF
910 OpAMD64CMOVQGTF
911 OpAMD64CMOVQGEF
912 OpAMD64CMOVLEQF
913 OpAMD64CMOVLNEF
914 OpAMD64CMOVLGTF
915 OpAMD64CMOVLGEF
916 OpAMD64CMOVWEQF
917 OpAMD64CMOVWNEF
918 OpAMD64CMOVWGTF
919 OpAMD64CMOVWGEF
920 OpAMD64BSWAPQ
921 OpAMD64BSWAPL
922 OpAMD64POPCNTQ
923 OpAMD64POPCNTL
924 OpAMD64SQRTSD
925 OpAMD64SQRTSS
926 OpAMD64ROUNDSD
927 OpAMD64VFMADD231SD
928 OpAMD64MINSD
929 OpAMD64MINSS
930 OpAMD64SBBQcarrymask
931 OpAMD64SBBLcarrymask
932 OpAMD64SETEQ
933 OpAMD64SETNE
934 OpAMD64SETL
935 OpAMD64SETLE
936 OpAMD64SETG
937 OpAMD64SETGE
938 OpAMD64SETB
939 OpAMD64SETBE
940 OpAMD64SETA
941 OpAMD64SETAE
942 OpAMD64SETO
943 OpAMD64SETEQstore
944 OpAMD64SETNEstore
945 OpAMD64SETLstore
946 OpAMD64SETLEstore
947 OpAMD64SETGstore
948 OpAMD64SETGEstore
949 OpAMD64SETBstore
950 OpAMD64SETBEstore
951 OpAMD64SETAstore
952 OpAMD64SETAEstore
953 OpAMD64SETEQstoreidx1
954 OpAMD64SETNEstoreidx1
955 OpAMD64SETLstoreidx1
956 OpAMD64SETLEstoreidx1
957 OpAMD64SETGstoreidx1
958 OpAMD64SETGEstoreidx1
959 OpAMD64SETBstoreidx1
960 OpAMD64SETBEstoreidx1
961 OpAMD64SETAstoreidx1
962 OpAMD64SETAEstoreidx1
963 OpAMD64SETEQF
964 OpAMD64SETNEF
965 OpAMD64SETORD
966 OpAMD64SETNAN
967 OpAMD64SETGF
968 OpAMD64SETGEF
969 OpAMD64MOVBQSX
970 OpAMD64MOVBQZX
971 OpAMD64MOVWQSX
972 OpAMD64MOVWQZX
973 OpAMD64MOVLQSX
974 OpAMD64MOVLQZX
975 OpAMD64MOVLconst
976 OpAMD64MOVQconst
977 OpAMD64CVTTSD2SL
978 OpAMD64CVTTSD2SQ
979 OpAMD64CVTTSS2SL
980 OpAMD64CVTTSS2SQ
981 OpAMD64CVTSL2SS
982 OpAMD64CVTSL2SD
983 OpAMD64CVTSQ2SS
984 OpAMD64CVTSQ2SD
985 OpAMD64CVTSD2SS
986 OpAMD64CVTSS2SD
987 OpAMD64MOVQi2f
988 OpAMD64MOVQf2i
989 OpAMD64MOVLi2f
990 OpAMD64MOVLf2i
991 OpAMD64PXOR
992 OpAMD64POR
993 OpAMD64LEAQ
994 OpAMD64LEAL
995 OpAMD64LEAW
996 OpAMD64LEAQ1
997 OpAMD64LEAL1
998 OpAMD64LEAW1
999 OpAMD64LEAQ2
1000 OpAMD64LEAL2
1001 OpAMD64LEAW2
1002 OpAMD64LEAQ4
1003 OpAMD64LEAL4
1004 OpAMD64LEAW4
1005 OpAMD64LEAQ8
1006 OpAMD64LEAL8
1007 OpAMD64LEAW8
1008 OpAMD64MOVBload
1009 OpAMD64MOVBQSXload
1010 OpAMD64MOVWload
1011 OpAMD64MOVWQSXload
1012 OpAMD64MOVLload
1013 OpAMD64MOVLQSXload
1014 OpAMD64MOVQload
1015 OpAMD64MOVBstore
1016 OpAMD64MOVWstore
1017 OpAMD64MOVLstore
1018 OpAMD64MOVQstore
1019 OpAMD64MOVOload
1020 OpAMD64MOVOstore
1021 OpAMD64MOVBloadidx1
1022 OpAMD64MOVWloadidx1
1023 OpAMD64MOVWloadidx2
1024 OpAMD64MOVLloadidx1
1025 OpAMD64MOVLloadidx4
1026 OpAMD64MOVLloadidx8
1027 OpAMD64MOVQloadidx1
1028 OpAMD64MOVQloadidx8
1029 OpAMD64MOVBstoreidx1
1030 OpAMD64MOVWstoreidx1
1031 OpAMD64MOVWstoreidx2
1032 OpAMD64MOVLstoreidx1
1033 OpAMD64MOVLstoreidx4
1034 OpAMD64MOVLstoreidx8
1035 OpAMD64MOVQstoreidx1
1036 OpAMD64MOVQstoreidx8
1037 OpAMD64MOVBstoreconst
1038 OpAMD64MOVWstoreconst
1039 OpAMD64MOVLstoreconst
1040 OpAMD64MOVQstoreconst
1041 OpAMD64MOVOstoreconst
1042 OpAMD64MOVBstoreconstidx1
1043 OpAMD64MOVWstoreconstidx1
1044 OpAMD64MOVWstoreconstidx2
1045 OpAMD64MOVLstoreconstidx1
1046 OpAMD64MOVLstoreconstidx4
1047 OpAMD64MOVQstoreconstidx1
1048 OpAMD64MOVQstoreconstidx8
1049 OpAMD64DUFFZERO
1050 OpAMD64REPSTOSQ
1051 OpAMD64CALLstatic
1052 OpAMD64CALLtail
1053 OpAMD64CALLclosure
1054 OpAMD64CALLinter
1055 OpAMD64DUFFCOPY
1056 OpAMD64REPMOVSQ
1057 OpAMD64InvertFlags
1058 OpAMD64LoweredGetG
1059 OpAMD64LoweredGetClosurePtr
1060 OpAMD64LoweredGetCallerPC
1061 OpAMD64LoweredGetCallerSP
1062 OpAMD64LoweredNilCheck
1063 OpAMD64LoweredWB
1064 OpAMD64LoweredHasCPUFeature
1065 OpAMD64LoweredPanicBoundsA
1066 OpAMD64LoweredPanicBoundsB
1067 OpAMD64LoweredPanicBoundsC
1068 OpAMD64FlagEQ
1069 OpAMD64FlagLT_ULT
1070 OpAMD64FlagLT_UGT
1071 OpAMD64FlagGT_UGT
1072 OpAMD64FlagGT_ULT
1073 OpAMD64MOVBatomicload
1074 OpAMD64MOVLatomicload
1075 OpAMD64MOVQatomicload
1076 OpAMD64XCHGB
1077 OpAMD64XCHGL
1078 OpAMD64XCHGQ
1079 OpAMD64XADDLlock
1080 OpAMD64XADDQlock
1081 OpAMD64AddTupleFirst32
1082 OpAMD64AddTupleFirst64
1083 OpAMD64CMPXCHGLlock
1084 OpAMD64CMPXCHGQlock
1085 OpAMD64ANDBlock
1086 OpAMD64ANDLlock
1087 OpAMD64ANDQlock
1088 OpAMD64ORBlock
1089 OpAMD64ORLlock
1090 OpAMD64ORQlock
1091 OpAMD64LoweredAtomicAnd64
1092 OpAMD64LoweredAtomicAnd32
1093 OpAMD64LoweredAtomicOr64
1094 OpAMD64LoweredAtomicOr32
1095 OpAMD64PrefetchT0
1096 OpAMD64PrefetchNTA
1097 OpAMD64ANDNQ
1098 OpAMD64ANDNL
1099 OpAMD64BLSIQ
1100 OpAMD64BLSIL
1101 OpAMD64BLSMSKQ
1102 OpAMD64BLSMSKL
1103 OpAMD64BLSRQ
1104 OpAMD64BLSRL
1105 OpAMD64TZCNTQ
1106 OpAMD64TZCNTL
1107 OpAMD64LZCNTQ
1108 OpAMD64LZCNTL
1109 OpAMD64MOVBEWstore
1110 OpAMD64MOVBELload
1111 OpAMD64MOVBELstore
1112 OpAMD64MOVBEQload
1113 OpAMD64MOVBEQstore
1114 OpAMD64MOVBELloadidx1
1115 OpAMD64MOVBELloadidx4
1116 OpAMD64MOVBELloadidx8
1117 OpAMD64MOVBEQloadidx1
1118 OpAMD64MOVBEQloadidx8
1119 OpAMD64MOVBEWstoreidx1
1120 OpAMD64MOVBEWstoreidx2
1121 OpAMD64MOVBELstoreidx1
1122 OpAMD64MOVBELstoreidx4
1123 OpAMD64MOVBELstoreidx8
1124 OpAMD64MOVBEQstoreidx1
1125 OpAMD64MOVBEQstoreidx8
1126 OpAMD64SARXQ
1127 OpAMD64SARXL
1128 OpAMD64SHLXQ
1129 OpAMD64SHLXL
1130 OpAMD64SHRXQ
1131 OpAMD64SHRXL
1132 OpAMD64SARXLload
1133 OpAMD64SARXQload
1134 OpAMD64SHLXLload
1135 OpAMD64SHLXQload
1136 OpAMD64SHRXLload
1137 OpAMD64SHRXQload
1138 OpAMD64SARXLloadidx1
1139 OpAMD64SARXLloadidx4
1140 OpAMD64SARXLloadidx8
1141 OpAMD64SARXQloadidx1
1142 OpAMD64SARXQloadidx8
1143 OpAMD64SHLXLloadidx1
1144 OpAMD64SHLXLloadidx4
1145 OpAMD64SHLXLloadidx8
1146 OpAMD64SHLXQloadidx1
1147 OpAMD64SHLXQloadidx8
1148 OpAMD64SHRXLloadidx1
1149 OpAMD64SHRXLloadidx4
1150 OpAMD64SHRXLloadidx8
1151 OpAMD64SHRXQloadidx1
1152 OpAMD64SHRXQloadidx8
1153 OpAMD64PUNPCKLBW
1154 OpAMD64PSHUFLW
1155 OpAMD64PSHUFBbroadcast
1156 OpAMD64VPBROADCASTB
1157 OpAMD64PSIGNB
1158 OpAMD64PCMPEQB
1159 OpAMD64PMOVMSKB
1160
1161 OpARMADD
1162 OpARMADDconst
1163 OpARMSUB
1164 OpARMSUBconst
1165 OpARMRSB
1166 OpARMRSBconst
1167 OpARMMUL
1168 OpARMHMUL
1169 OpARMHMULU
1170 OpARMCALLudiv
1171 OpARMADDS
1172 OpARMADDSconst
1173 OpARMADC
1174 OpARMADCconst
1175 OpARMSUBS
1176 OpARMSUBSconst
1177 OpARMRSBSconst
1178 OpARMSBC
1179 OpARMSBCconst
1180 OpARMRSCconst
1181 OpARMMULLU
1182 OpARMMULA
1183 OpARMMULS
1184 OpARMADDF
1185 OpARMADDD
1186 OpARMSUBF
1187 OpARMSUBD
1188 OpARMMULF
1189 OpARMMULD
1190 OpARMNMULF
1191 OpARMNMULD
1192 OpARMDIVF
1193 OpARMDIVD
1194 OpARMMULAF
1195 OpARMMULAD
1196 OpARMMULSF
1197 OpARMMULSD
1198 OpARMFMULAD
1199 OpARMAND
1200 OpARMANDconst
1201 OpARMOR
1202 OpARMORconst
1203 OpARMXOR
1204 OpARMXORconst
1205 OpARMBIC
1206 OpARMBICconst
1207 OpARMBFX
1208 OpARMBFXU
1209 OpARMMVN
1210 OpARMNEGF
1211 OpARMNEGD
1212 OpARMSQRTD
1213 OpARMSQRTF
1214 OpARMABSD
1215 OpARMCLZ
1216 OpARMREV
1217 OpARMREV16
1218 OpARMRBIT
1219 OpARMSLL
1220 OpARMSLLconst
1221 OpARMSRL
1222 OpARMSRLconst
1223 OpARMSRA
1224 OpARMSRAconst
1225 OpARMSRR
1226 OpARMSRRconst
1227 OpARMADDshiftLL
1228 OpARMADDshiftRL
1229 OpARMADDshiftRA
1230 OpARMSUBshiftLL
1231 OpARMSUBshiftRL
1232 OpARMSUBshiftRA
1233 OpARMRSBshiftLL
1234 OpARMRSBshiftRL
1235 OpARMRSBshiftRA
1236 OpARMANDshiftLL
1237 OpARMANDshiftRL
1238 OpARMANDshiftRA
1239 OpARMORshiftLL
1240 OpARMORshiftRL
1241 OpARMORshiftRA
1242 OpARMXORshiftLL
1243 OpARMXORshiftRL
1244 OpARMXORshiftRA
1245 OpARMXORshiftRR
1246 OpARMBICshiftLL
1247 OpARMBICshiftRL
1248 OpARMBICshiftRA
1249 OpARMMVNshiftLL
1250 OpARMMVNshiftRL
1251 OpARMMVNshiftRA
1252 OpARMADCshiftLL
1253 OpARMADCshiftRL
1254 OpARMADCshiftRA
1255 OpARMSBCshiftLL
1256 OpARMSBCshiftRL
1257 OpARMSBCshiftRA
1258 OpARMRSCshiftLL
1259 OpARMRSCshiftRL
1260 OpARMRSCshiftRA
1261 OpARMADDSshiftLL
1262 OpARMADDSshiftRL
1263 OpARMADDSshiftRA
1264 OpARMSUBSshiftLL
1265 OpARMSUBSshiftRL
1266 OpARMSUBSshiftRA
1267 OpARMRSBSshiftLL
1268 OpARMRSBSshiftRL
1269 OpARMRSBSshiftRA
1270 OpARMADDshiftLLreg
1271 OpARMADDshiftRLreg
1272 OpARMADDshiftRAreg
1273 OpARMSUBshiftLLreg
1274 OpARMSUBshiftRLreg
1275 OpARMSUBshiftRAreg
1276 OpARMRSBshiftLLreg
1277 OpARMRSBshiftRLreg
1278 OpARMRSBshiftRAreg
1279 OpARMANDshiftLLreg
1280 OpARMANDshiftRLreg
1281 OpARMANDshiftRAreg
1282 OpARMORshiftLLreg
1283 OpARMORshiftRLreg
1284 OpARMORshiftRAreg
1285 OpARMXORshiftLLreg
1286 OpARMXORshiftRLreg
1287 OpARMXORshiftRAreg
1288 OpARMBICshiftLLreg
1289 OpARMBICshiftRLreg
1290 OpARMBICshiftRAreg
1291 OpARMMVNshiftLLreg
1292 OpARMMVNshiftRLreg
1293 OpARMMVNshiftRAreg
1294 OpARMADCshiftLLreg
1295 OpARMADCshiftRLreg
1296 OpARMADCshiftRAreg
1297 OpARMSBCshiftLLreg
1298 OpARMSBCshiftRLreg
1299 OpARMSBCshiftRAreg
1300 OpARMRSCshiftLLreg
1301 OpARMRSCshiftRLreg
1302 OpARMRSCshiftRAreg
1303 OpARMADDSshiftLLreg
1304 OpARMADDSshiftRLreg
1305 OpARMADDSshiftRAreg
1306 OpARMSUBSshiftLLreg
1307 OpARMSUBSshiftRLreg
1308 OpARMSUBSshiftRAreg
1309 OpARMRSBSshiftLLreg
1310 OpARMRSBSshiftRLreg
1311 OpARMRSBSshiftRAreg
1312 OpARMCMP
1313 OpARMCMPconst
1314 OpARMCMN
1315 OpARMCMNconst
1316 OpARMTST
1317 OpARMTSTconst
1318 OpARMTEQ
1319 OpARMTEQconst
1320 OpARMCMPF
1321 OpARMCMPD
1322 OpARMCMPshiftLL
1323 OpARMCMPshiftRL
1324 OpARMCMPshiftRA
1325 OpARMCMNshiftLL
1326 OpARMCMNshiftRL
1327 OpARMCMNshiftRA
1328 OpARMTSTshiftLL
1329 OpARMTSTshiftRL
1330 OpARMTSTshiftRA
1331 OpARMTEQshiftLL
1332 OpARMTEQshiftRL
1333 OpARMTEQshiftRA
1334 OpARMCMPshiftLLreg
1335 OpARMCMPshiftRLreg
1336 OpARMCMPshiftRAreg
1337 OpARMCMNshiftLLreg
1338 OpARMCMNshiftRLreg
1339 OpARMCMNshiftRAreg
1340 OpARMTSTshiftLLreg
1341 OpARMTSTshiftRLreg
1342 OpARMTSTshiftRAreg
1343 OpARMTEQshiftLLreg
1344 OpARMTEQshiftRLreg
1345 OpARMTEQshiftRAreg
1346 OpARMCMPF0
1347 OpARMCMPD0
1348 OpARMMOVWconst
1349 OpARMMOVFconst
1350 OpARMMOVDconst
1351 OpARMMOVWaddr
1352 OpARMMOVBload
1353 OpARMMOVBUload
1354 OpARMMOVHload
1355 OpARMMOVHUload
1356 OpARMMOVWload
1357 OpARMMOVFload
1358 OpARMMOVDload
1359 OpARMMOVBstore
1360 OpARMMOVHstore
1361 OpARMMOVWstore
1362 OpARMMOVFstore
1363 OpARMMOVDstore
1364 OpARMMOVWloadidx
1365 OpARMMOVWloadshiftLL
1366 OpARMMOVWloadshiftRL
1367 OpARMMOVWloadshiftRA
1368 OpARMMOVBUloadidx
1369 OpARMMOVBloadidx
1370 OpARMMOVHUloadidx
1371 OpARMMOVHloadidx
1372 OpARMMOVWstoreidx
1373 OpARMMOVWstoreshiftLL
1374 OpARMMOVWstoreshiftRL
1375 OpARMMOVWstoreshiftRA
1376 OpARMMOVBstoreidx
1377 OpARMMOVHstoreidx
1378 OpARMMOVBreg
1379 OpARMMOVBUreg
1380 OpARMMOVHreg
1381 OpARMMOVHUreg
1382 OpARMMOVWreg
1383 OpARMMOVWnop
1384 OpARMMOVWF
1385 OpARMMOVWD
1386 OpARMMOVWUF
1387 OpARMMOVWUD
1388 OpARMMOVFW
1389 OpARMMOVDW
1390 OpARMMOVFWU
1391 OpARMMOVDWU
1392 OpARMMOVFD
1393 OpARMMOVDF
1394 OpARMCMOVWHSconst
1395 OpARMCMOVWLSconst
1396 OpARMSRAcond
1397 OpARMCALLstatic
1398 OpARMCALLtail
1399 OpARMCALLclosure
1400 OpARMCALLinter
1401 OpARMLoweredNilCheck
1402 OpARMEqual
1403 OpARMNotEqual
1404 OpARMLessThan
1405 OpARMLessEqual
1406 OpARMGreaterThan
1407 OpARMGreaterEqual
1408 OpARMLessThanU
1409 OpARMLessEqualU
1410 OpARMGreaterThanU
1411 OpARMGreaterEqualU
1412 OpARMDUFFZERO
1413 OpARMDUFFCOPY
1414 OpARMLoweredZero
1415 OpARMLoweredMove
1416 OpARMLoweredGetClosurePtr
1417 OpARMLoweredGetCallerSP
1418 OpARMLoweredGetCallerPC
1419 OpARMLoweredPanicBoundsA
1420 OpARMLoweredPanicBoundsB
1421 OpARMLoweredPanicBoundsC
1422 OpARMLoweredPanicExtendA
1423 OpARMLoweredPanicExtendB
1424 OpARMLoweredPanicExtendC
1425 OpARMFlagConstant
1426 OpARMInvertFlags
1427 OpARMLoweredWB
1428
1429 OpARM64ADCSflags
1430 OpARM64ADCzerocarry
1431 OpARM64ADD
1432 OpARM64ADDconst
1433 OpARM64ADDSconstflags
1434 OpARM64ADDSflags
1435 OpARM64SUB
1436 OpARM64SUBconst
1437 OpARM64SBCSflags
1438 OpARM64SUBSflags
1439 OpARM64MUL
1440 OpARM64MULW
1441 OpARM64MNEG
1442 OpARM64MNEGW
1443 OpARM64MULH
1444 OpARM64UMULH
1445 OpARM64MULL
1446 OpARM64UMULL
1447 OpARM64DIV
1448 OpARM64UDIV
1449 OpARM64DIVW
1450 OpARM64UDIVW
1451 OpARM64MOD
1452 OpARM64UMOD
1453 OpARM64MODW
1454 OpARM64UMODW
1455 OpARM64FADDS
1456 OpARM64FADDD
1457 OpARM64FSUBS
1458 OpARM64FSUBD
1459 OpARM64FMULS
1460 OpARM64FMULD
1461 OpARM64FNMULS
1462 OpARM64FNMULD
1463 OpARM64FDIVS
1464 OpARM64FDIVD
1465 OpARM64AND
1466 OpARM64ANDconst
1467 OpARM64OR
1468 OpARM64ORconst
1469 OpARM64XOR
1470 OpARM64XORconst
1471 OpARM64BIC
1472 OpARM64EON
1473 OpARM64ORN
1474 OpARM64MVN
1475 OpARM64NEG
1476 OpARM64NEGSflags
1477 OpARM64NGCzerocarry
1478 OpARM64FABSD
1479 OpARM64FNEGS
1480 OpARM64FNEGD
1481 OpARM64FSQRTD
1482 OpARM64FSQRTS
1483 OpARM64FMIND
1484 OpARM64FMINS
1485 OpARM64FMAXD
1486 OpARM64FMAXS
1487 OpARM64REV
1488 OpARM64REVW
1489 OpARM64REV16
1490 OpARM64REV16W
1491 OpARM64RBIT
1492 OpARM64RBITW
1493 OpARM64CLZ
1494 OpARM64CLZW
1495 OpARM64VCNT
1496 OpARM64VUADDLV
1497 OpARM64LoweredRound32F
1498 OpARM64LoweredRound64F
1499 OpARM64FMADDS
1500 OpARM64FMADDD
1501 OpARM64FNMADDS
1502 OpARM64FNMADDD
1503 OpARM64FMSUBS
1504 OpARM64FMSUBD
1505 OpARM64FNMSUBS
1506 OpARM64FNMSUBD
1507 OpARM64MADD
1508 OpARM64MADDW
1509 OpARM64MSUB
1510 OpARM64MSUBW
1511 OpARM64SLL
1512 OpARM64SLLconst
1513 OpARM64SRL
1514 OpARM64SRLconst
1515 OpARM64SRA
1516 OpARM64SRAconst
1517 OpARM64ROR
1518 OpARM64RORW
1519 OpARM64RORconst
1520 OpARM64RORWconst
1521 OpARM64EXTRconst
1522 OpARM64EXTRWconst
1523 OpARM64CMP
1524 OpARM64CMPconst
1525 OpARM64CMPW
1526 OpARM64CMPWconst
1527 OpARM64CMN
1528 OpARM64CMNconst
1529 OpARM64CMNW
1530 OpARM64CMNWconst
1531 OpARM64TST
1532 OpARM64TSTconst
1533 OpARM64TSTW
1534 OpARM64TSTWconst
1535 OpARM64FCMPS
1536 OpARM64FCMPD
1537 OpARM64FCMPS0
1538 OpARM64FCMPD0
1539 OpARM64MVNshiftLL
1540 OpARM64MVNshiftRL
1541 OpARM64MVNshiftRA
1542 OpARM64MVNshiftRO
1543 OpARM64NEGshiftLL
1544 OpARM64NEGshiftRL
1545 OpARM64NEGshiftRA
1546 OpARM64ADDshiftLL
1547 OpARM64ADDshiftRL
1548 OpARM64ADDshiftRA
1549 OpARM64SUBshiftLL
1550 OpARM64SUBshiftRL
1551 OpARM64SUBshiftRA
1552 OpARM64ANDshiftLL
1553 OpARM64ANDshiftRL
1554 OpARM64ANDshiftRA
1555 OpARM64ANDshiftRO
1556 OpARM64ORshiftLL
1557 OpARM64ORshiftRL
1558 OpARM64ORshiftRA
1559 OpARM64ORshiftRO
1560 OpARM64XORshiftLL
1561 OpARM64XORshiftRL
1562 OpARM64XORshiftRA
1563 OpARM64XORshiftRO
1564 OpARM64BICshiftLL
1565 OpARM64BICshiftRL
1566 OpARM64BICshiftRA
1567 OpARM64BICshiftRO
1568 OpARM64EONshiftLL
1569 OpARM64EONshiftRL
1570 OpARM64EONshiftRA
1571 OpARM64EONshiftRO
1572 OpARM64ORNshiftLL
1573 OpARM64ORNshiftRL
1574 OpARM64ORNshiftRA
1575 OpARM64ORNshiftRO
1576 OpARM64CMPshiftLL
1577 OpARM64CMPshiftRL
1578 OpARM64CMPshiftRA
1579 OpARM64CMNshiftLL
1580 OpARM64CMNshiftRL
1581 OpARM64CMNshiftRA
1582 OpARM64TSTshiftLL
1583 OpARM64TSTshiftRL
1584 OpARM64TSTshiftRA
1585 OpARM64TSTshiftRO
1586 OpARM64BFI
1587 OpARM64BFXIL
1588 OpARM64SBFIZ
1589 OpARM64SBFX
1590 OpARM64UBFIZ
1591 OpARM64UBFX
1592 OpARM64MOVDconst
1593 OpARM64FMOVSconst
1594 OpARM64FMOVDconst
1595 OpARM64MOVDaddr
1596 OpARM64MOVBload
1597 OpARM64MOVBUload
1598 OpARM64MOVHload
1599 OpARM64MOVHUload
1600 OpARM64MOVWload
1601 OpARM64MOVWUload
1602 OpARM64MOVDload
1603 OpARM64LDP
1604 OpARM64FMOVSload
1605 OpARM64FMOVDload
1606 OpARM64MOVDloadidx
1607 OpARM64MOVWloadidx
1608 OpARM64MOVWUloadidx
1609 OpARM64MOVHloadidx
1610 OpARM64MOVHUloadidx
1611 OpARM64MOVBloadidx
1612 OpARM64MOVBUloadidx
1613 OpARM64FMOVSloadidx
1614 OpARM64FMOVDloadidx
1615 OpARM64MOVHloadidx2
1616 OpARM64MOVHUloadidx2
1617 OpARM64MOVWloadidx4
1618 OpARM64MOVWUloadidx4
1619 OpARM64MOVDloadidx8
1620 OpARM64FMOVSloadidx4
1621 OpARM64FMOVDloadidx8
1622 OpARM64MOVBstore
1623 OpARM64MOVHstore
1624 OpARM64MOVWstore
1625 OpARM64MOVDstore
1626 OpARM64STP
1627 OpARM64FMOVSstore
1628 OpARM64FMOVDstore
1629 OpARM64MOVBstoreidx
1630 OpARM64MOVHstoreidx
1631 OpARM64MOVWstoreidx
1632 OpARM64MOVDstoreidx
1633 OpARM64FMOVSstoreidx
1634 OpARM64FMOVDstoreidx
1635 OpARM64MOVHstoreidx2
1636 OpARM64MOVWstoreidx4
1637 OpARM64MOVDstoreidx8
1638 OpARM64FMOVSstoreidx4
1639 OpARM64FMOVDstoreidx8
1640 OpARM64MOVBstorezero
1641 OpARM64MOVHstorezero
1642 OpARM64MOVWstorezero
1643 OpARM64MOVDstorezero
1644 OpARM64MOVQstorezero
1645 OpARM64MOVBstorezeroidx
1646 OpARM64MOVHstorezeroidx
1647 OpARM64MOVWstorezeroidx
1648 OpARM64MOVDstorezeroidx
1649 OpARM64MOVHstorezeroidx2
1650 OpARM64MOVWstorezeroidx4
1651 OpARM64MOVDstorezeroidx8
1652 OpARM64FMOVDgpfp
1653 OpARM64FMOVDfpgp
1654 OpARM64FMOVSgpfp
1655 OpARM64FMOVSfpgp
1656 OpARM64MOVBreg
1657 OpARM64MOVBUreg
1658 OpARM64MOVHreg
1659 OpARM64MOVHUreg
1660 OpARM64MOVWreg
1661 OpARM64MOVWUreg
1662 OpARM64MOVDreg
1663 OpARM64MOVDnop
1664 OpARM64SCVTFWS
1665 OpARM64SCVTFWD
1666 OpARM64UCVTFWS
1667 OpARM64UCVTFWD
1668 OpARM64SCVTFS
1669 OpARM64SCVTFD
1670 OpARM64UCVTFS
1671 OpARM64UCVTFD
1672 OpARM64FCVTZSSW
1673 OpARM64FCVTZSDW
1674 OpARM64FCVTZUSW
1675 OpARM64FCVTZUDW
1676 OpARM64FCVTZSS
1677 OpARM64FCVTZSD
1678 OpARM64FCVTZUS
1679 OpARM64FCVTZUD
1680 OpARM64FCVTSD
1681 OpARM64FCVTDS
1682 OpARM64FRINTAD
1683 OpARM64FRINTMD
1684 OpARM64FRINTND
1685 OpARM64FRINTPD
1686 OpARM64FRINTZD
1687 OpARM64CSEL
1688 OpARM64CSEL0
1689 OpARM64CSINC
1690 OpARM64CSINV
1691 OpARM64CSNEG
1692 OpARM64CSETM
1693 OpARM64CALLstatic
1694 OpARM64CALLtail
1695 OpARM64CALLclosure
1696 OpARM64CALLinter
1697 OpARM64LoweredNilCheck
1698 OpARM64Equal
1699 OpARM64NotEqual
1700 OpARM64LessThan
1701 OpARM64LessEqual
1702 OpARM64GreaterThan
1703 OpARM64GreaterEqual
1704 OpARM64LessThanU
1705 OpARM64LessEqualU
1706 OpARM64GreaterThanU
1707 OpARM64GreaterEqualU
1708 OpARM64LessThanF
1709 OpARM64LessEqualF
1710 OpARM64GreaterThanF
1711 OpARM64GreaterEqualF
1712 OpARM64NotLessThanF
1713 OpARM64NotLessEqualF
1714 OpARM64NotGreaterThanF
1715 OpARM64NotGreaterEqualF
1716 OpARM64LessThanNoov
1717 OpARM64GreaterEqualNoov
1718 OpARM64DUFFZERO
1719 OpARM64LoweredZero
1720 OpARM64DUFFCOPY
1721 OpARM64LoweredMove
1722 OpARM64LoweredGetClosurePtr
1723 OpARM64LoweredGetCallerSP
1724 OpARM64LoweredGetCallerPC
1725 OpARM64FlagConstant
1726 OpARM64InvertFlags
1727 OpARM64LDAR
1728 OpARM64LDARB
1729 OpARM64LDARW
1730 OpARM64STLRB
1731 OpARM64STLR
1732 OpARM64STLRW
1733 OpARM64LoweredAtomicExchange64
1734 OpARM64LoweredAtomicExchange32
1735 OpARM64LoweredAtomicExchange8
1736 OpARM64LoweredAtomicExchange64Variant
1737 OpARM64LoweredAtomicExchange32Variant
1738 OpARM64LoweredAtomicExchange8Variant
1739 OpARM64LoweredAtomicAdd64
1740 OpARM64LoweredAtomicAdd32
1741 OpARM64LoweredAtomicAdd64Variant
1742 OpARM64LoweredAtomicAdd32Variant
1743 OpARM64LoweredAtomicCas64
1744 OpARM64LoweredAtomicCas32
1745 OpARM64LoweredAtomicCas64Variant
1746 OpARM64LoweredAtomicCas32Variant
1747 OpARM64LoweredAtomicAnd8
1748 OpARM64LoweredAtomicOr8
1749 OpARM64LoweredAtomicAnd64
1750 OpARM64LoweredAtomicOr64
1751 OpARM64LoweredAtomicAnd32
1752 OpARM64LoweredAtomicOr32
1753 OpARM64LoweredAtomicAnd8Variant
1754 OpARM64LoweredAtomicOr8Variant
1755 OpARM64LoweredAtomicAnd64Variant
1756 OpARM64LoweredAtomicOr64Variant
1757 OpARM64LoweredAtomicAnd32Variant
1758 OpARM64LoweredAtomicOr32Variant
1759 OpARM64LoweredWB
1760 OpARM64LoweredPanicBoundsA
1761 OpARM64LoweredPanicBoundsB
1762 OpARM64LoweredPanicBoundsC
1763 OpARM64PRFM
1764 OpARM64DMB
1765
1766 OpLOONG64NEGV
1767 OpLOONG64NEGF
1768 OpLOONG64NEGD
1769 OpLOONG64SQRTD
1770 OpLOONG64SQRTF
1771 OpLOONG64ABSD
1772 OpLOONG64CLZW
1773 OpLOONG64CLZV
1774 OpLOONG64CTZW
1775 OpLOONG64CTZV
1776 OpLOONG64REVB2H
1777 OpLOONG64REVB2W
1778 OpLOONG64REVBV
1779 OpLOONG64BITREV4B
1780 OpLOONG64BITREVW
1781 OpLOONG64BITREVV
1782 OpLOONG64VPCNT64
1783 OpLOONG64VPCNT32
1784 OpLOONG64VPCNT16
1785 OpLOONG64ADDV
1786 OpLOONG64ADDVconst
1787 OpLOONG64SUBV
1788 OpLOONG64SUBVconst
1789 OpLOONG64MULV
1790 OpLOONG64MULHV
1791 OpLOONG64MULHVU
1792 OpLOONG64DIVV
1793 OpLOONG64DIVVU
1794 OpLOONG64REMV
1795 OpLOONG64REMVU
1796 OpLOONG64ADDF
1797 OpLOONG64ADDD
1798 OpLOONG64SUBF
1799 OpLOONG64SUBD
1800 OpLOONG64MULF
1801 OpLOONG64MULD
1802 OpLOONG64DIVF
1803 OpLOONG64DIVD
1804 OpLOONG64AND
1805 OpLOONG64ANDconst
1806 OpLOONG64OR
1807 OpLOONG64ORconst
1808 OpLOONG64XOR
1809 OpLOONG64XORconst
1810 OpLOONG64NOR
1811 OpLOONG64NORconst
1812 OpLOONG64FMADDF
1813 OpLOONG64FMADDD
1814 OpLOONG64FMSUBF
1815 OpLOONG64FMSUBD
1816 OpLOONG64FNMADDF
1817 OpLOONG64FNMADDD
1818 OpLOONG64FNMSUBF
1819 OpLOONG64FNMSUBD
1820 OpLOONG64FMINF
1821 OpLOONG64FMIND
1822 OpLOONG64FMAXF
1823 OpLOONG64FMAXD
1824 OpLOONG64MASKEQZ
1825 OpLOONG64MASKNEZ
1826 OpLOONG64FCOPYSGD
1827 OpLOONG64SLLV
1828 OpLOONG64SLLVconst
1829 OpLOONG64SRLV
1830 OpLOONG64SRLVconst
1831 OpLOONG64SRAV
1832 OpLOONG64SRAVconst
1833 OpLOONG64ROTR
1834 OpLOONG64ROTRV
1835 OpLOONG64ROTRconst
1836 OpLOONG64ROTRVconst
1837 OpLOONG64SGT
1838 OpLOONG64SGTconst
1839 OpLOONG64SGTU
1840 OpLOONG64SGTUconst
1841 OpLOONG64CMPEQF
1842 OpLOONG64CMPEQD
1843 OpLOONG64CMPGEF
1844 OpLOONG64CMPGED
1845 OpLOONG64CMPGTF
1846 OpLOONG64CMPGTD
1847 OpLOONG64BSTRPICKW
1848 OpLOONG64BSTRPICKV
1849 OpLOONG64MOVVconst
1850 OpLOONG64MOVFconst
1851 OpLOONG64MOVDconst
1852 OpLOONG64MOVVaddr
1853 OpLOONG64MOVBload
1854 OpLOONG64MOVBUload
1855 OpLOONG64MOVHload
1856 OpLOONG64MOVHUload
1857 OpLOONG64MOVWload
1858 OpLOONG64MOVWUload
1859 OpLOONG64MOVVload
1860 OpLOONG64MOVFload
1861 OpLOONG64MOVDload
1862 OpLOONG64MOVVloadidx
1863 OpLOONG64MOVWloadidx
1864 OpLOONG64MOVWUloadidx
1865 OpLOONG64MOVHloadidx
1866 OpLOONG64MOVHUloadidx
1867 OpLOONG64MOVBloadidx
1868 OpLOONG64MOVBUloadidx
1869 OpLOONG64MOVFloadidx
1870 OpLOONG64MOVDloadidx
1871 OpLOONG64MOVBstore
1872 OpLOONG64MOVHstore
1873 OpLOONG64MOVWstore
1874 OpLOONG64MOVVstore
1875 OpLOONG64MOVFstore
1876 OpLOONG64MOVDstore
1877 OpLOONG64MOVBstoreidx
1878 OpLOONG64MOVHstoreidx
1879 OpLOONG64MOVWstoreidx
1880 OpLOONG64MOVVstoreidx
1881 OpLOONG64MOVFstoreidx
1882 OpLOONG64MOVDstoreidx
1883 OpLOONG64MOVBstorezero
1884 OpLOONG64MOVHstorezero
1885 OpLOONG64MOVWstorezero
1886 OpLOONG64MOVVstorezero
1887 OpLOONG64MOVBstorezeroidx
1888 OpLOONG64MOVHstorezeroidx
1889 OpLOONG64MOVWstorezeroidx
1890 OpLOONG64MOVVstorezeroidx
1891 OpLOONG64MOVWfpgp
1892 OpLOONG64MOVWgpfp
1893 OpLOONG64MOVVfpgp
1894 OpLOONG64MOVVgpfp
1895 OpLOONG64MOVBreg
1896 OpLOONG64MOVBUreg
1897 OpLOONG64MOVHreg
1898 OpLOONG64MOVHUreg
1899 OpLOONG64MOVWreg
1900 OpLOONG64MOVWUreg
1901 OpLOONG64MOVVreg
1902 OpLOONG64MOVVnop
1903 OpLOONG64MOVWF
1904 OpLOONG64MOVWD
1905 OpLOONG64MOVVF
1906 OpLOONG64MOVVD
1907 OpLOONG64TRUNCFW
1908 OpLOONG64TRUNCDW
1909 OpLOONG64TRUNCFV
1910 OpLOONG64TRUNCDV
1911 OpLOONG64MOVFD
1912 OpLOONG64MOVDF
1913 OpLOONG64LoweredRound32F
1914 OpLOONG64LoweredRound64F
1915 OpLOONG64CALLstatic
1916 OpLOONG64CALLtail
1917 OpLOONG64CALLclosure
1918 OpLOONG64CALLinter
1919 OpLOONG64DUFFZERO
1920 OpLOONG64DUFFCOPY
1921 OpLOONG64LoweredZero
1922 OpLOONG64LoweredMove
1923 OpLOONG64LoweredAtomicLoad8
1924 OpLOONG64LoweredAtomicLoad32
1925 OpLOONG64LoweredAtomicLoad64
1926 OpLOONG64LoweredAtomicStore8
1927 OpLOONG64LoweredAtomicStore32
1928 OpLOONG64LoweredAtomicStore64
1929 OpLOONG64LoweredAtomicStore8Variant
1930 OpLOONG64LoweredAtomicStore32Variant
1931 OpLOONG64LoweredAtomicStore64Variant
1932 OpLOONG64LoweredAtomicExchange32
1933 OpLOONG64LoweredAtomicExchange64
1934 OpLOONG64LoweredAtomicExchange8Variant
1935 OpLOONG64LoweredAtomicAdd32
1936 OpLOONG64LoweredAtomicAdd64
1937 OpLOONG64LoweredAtomicCas32
1938 OpLOONG64LoweredAtomicCas64
1939 OpLOONG64LoweredAtomicCas64Variant
1940 OpLOONG64LoweredAtomicCas32Variant
1941 OpLOONG64LoweredAtomicAnd32
1942 OpLOONG64LoweredAtomicOr32
1943 OpLOONG64LoweredAtomicAnd32value
1944 OpLOONG64LoweredAtomicAnd64value
1945 OpLOONG64LoweredAtomicOr32value
1946 OpLOONG64LoweredAtomicOr64value
1947 OpLOONG64LoweredNilCheck
1948 OpLOONG64FPFlagTrue
1949 OpLOONG64FPFlagFalse
1950 OpLOONG64LoweredGetClosurePtr
1951 OpLOONG64LoweredGetCallerSP
1952 OpLOONG64LoweredGetCallerPC
1953 OpLOONG64LoweredWB
1954 OpLOONG64LoweredPubBarrier
1955 OpLOONG64LoweredPanicBoundsA
1956 OpLOONG64LoweredPanicBoundsB
1957 OpLOONG64LoweredPanicBoundsC
1958
1959 OpMIPSADD
1960 OpMIPSADDconst
1961 OpMIPSSUB
1962 OpMIPSSUBconst
1963 OpMIPSMUL
1964 OpMIPSMULT
1965 OpMIPSMULTU
1966 OpMIPSDIV
1967 OpMIPSDIVU
1968 OpMIPSADDF
1969 OpMIPSADDD
1970 OpMIPSSUBF
1971 OpMIPSSUBD
1972 OpMIPSMULF
1973 OpMIPSMULD
1974 OpMIPSDIVF
1975 OpMIPSDIVD
1976 OpMIPSAND
1977 OpMIPSANDconst
1978 OpMIPSOR
1979 OpMIPSORconst
1980 OpMIPSXOR
1981 OpMIPSXORconst
1982 OpMIPSNOR
1983 OpMIPSNORconst
1984 OpMIPSNEG
1985 OpMIPSNEGF
1986 OpMIPSNEGD
1987 OpMIPSABSD
1988 OpMIPSSQRTD
1989 OpMIPSSQRTF
1990 OpMIPSSLL
1991 OpMIPSSLLconst
1992 OpMIPSSRL
1993 OpMIPSSRLconst
1994 OpMIPSSRA
1995 OpMIPSSRAconst
1996 OpMIPSCLZ
1997 OpMIPSSGT
1998 OpMIPSSGTconst
1999 OpMIPSSGTzero
2000 OpMIPSSGTU
2001 OpMIPSSGTUconst
2002 OpMIPSSGTUzero
2003 OpMIPSCMPEQF
2004 OpMIPSCMPEQD
2005 OpMIPSCMPGEF
2006 OpMIPSCMPGED
2007 OpMIPSCMPGTF
2008 OpMIPSCMPGTD
2009 OpMIPSMOVWconst
2010 OpMIPSMOVFconst
2011 OpMIPSMOVDconst
2012 OpMIPSMOVWaddr
2013 OpMIPSMOVBload
2014 OpMIPSMOVBUload
2015 OpMIPSMOVHload
2016 OpMIPSMOVHUload
2017 OpMIPSMOVWload
2018 OpMIPSMOVFload
2019 OpMIPSMOVDload
2020 OpMIPSMOVBstore
2021 OpMIPSMOVHstore
2022 OpMIPSMOVWstore
2023 OpMIPSMOVFstore
2024 OpMIPSMOVDstore
2025 OpMIPSMOVBstorezero
2026 OpMIPSMOVHstorezero
2027 OpMIPSMOVWstorezero
2028 OpMIPSMOVWfpgp
2029 OpMIPSMOVWgpfp
2030 OpMIPSMOVBreg
2031 OpMIPSMOVBUreg
2032 OpMIPSMOVHreg
2033 OpMIPSMOVHUreg
2034 OpMIPSMOVWreg
2035 OpMIPSMOVWnop
2036 OpMIPSCMOVZ
2037 OpMIPSCMOVZzero
2038 OpMIPSMOVWF
2039 OpMIPSMOVWD
2040 OpMIPSTRUNCFW
2041 OpMIPSTRUNCDW
2042 OpMIPSMOVFD
2043 OpMIPSMOVDF
2044 OpMIPSCALLstatic
2045 OpMIPSCALLtail
2046 OpMIPSCALLclosure
2047 OpMIPSCALLinter
2048 OpMIPSLoweredAtomicLoad8
2049 OpMIPSLoweredAtomicLoad32
2050 OpMIPSLoweredAtomicStore8
2051 OpMIPSLoweredAtomicStore32
2052 OpMIPSLoweredAtomicStorezero
2053 OpMIPSLoweredAtomicExchange
2054 OpMIPSLoweredAtomicAdd
2055 OpMIPSLoweredAtomicAddconst
2056 OpMIPSLoweredAtomicCas
2057 OpMIPSLoweredAtomicAnd
2058 OpMIPSLoweredAtomicOr
2059 OpMIPSLoweredZero
2060 OpMIPSLoweredMove
2061 OpMIPSLoweredNilCheck
2062 OpMIPSFPFlagTrue
2063 OpMIPSFPFlagFalse
2064 OpMIPSLoweredGetClosurePtr
2065 OpMIPSLoweredGetCallerSP
2066 OpMIPSLoweredGetCallerPC
2067 OpMIPSLoweredWB
2068 OpMIPSLoweredPanicBoundsA
2069 OpMIPSLoweredPanicBoundsB
2070 OpMIPSLoweredPanicBoundsC
2071 OpMIPSLoweredPanicExtendA
2072 OpMIPSLoweredPanicExtendB
2073 OpMIPSLoweredPanicExtendC
2074
2075 OpMIPS64ADDV
2076 OpMIPS64ADDVconst
2077 OpMIPS64SUBV
2078 OpMIPS64SUBVconst
2079 OpMIPS64MULV
2080 OpMIPS64MULVU
2081 OpMIPS64DIVV
2082 OpMIPS64DIVVU
2083 OpMIPS64ADDF
2084 OpMIPS64ADDD
2085 OpMIPS64SUBF
2086 OpMIPS64SUBD
2087 OpMIPS64MULF
2088 OpMIPS64MULD
2089 OpMIPS64DIVF
2090 OpMIPS64DIVD
2091 OpMIPS64AND
2092 OpMIPS64ANDconst
2093 OpMIPS64OR
2094 OpMIPS64ORconst
2095 OpMIPS64XOR
2096 OpMIPS64XORconst
2097 OpMIPS64NOR
2098 OpMIPS64NORconst
2099 OpMIPS64NEGV
2100 OpMIPS64NEGF
2101 OpMIPS64NEGD
2102 OpMIPS64ABSD
2103 OpMIPS64SQRTD
2104 OpMIPS64SQRTF
2105 OpMIPS64SLLV
2106 OpMIPS64SLLVconst
2107 OpMIPS64SRLV
2108 OpMIPS64SRLVconst
2109 OpMIPS64SRAV
2110 OpMIPS64SRAVconst
2111 OpMIPS64SGT
2112 OpMIPS64SGTconst
2113 OpMIPS64SGTU
2114 OpMIPS64SGTUconst
2115 OpMIPS64CMPEQF
2116 OpMIPS64CMPEQD
2117 OpMIPS64CMPGEF
2118 OpMIPS64CMPGED
2119 OpMIPS64CMPGTF
2120 OpMIPS64CMPGTD
2121 OpMIPS64MOVVconst
2122 OpMIPS64MOVFconst
2123 OpMIPS64MOVDconst
2124 OpMIPS64MOVVaddr
2125 OpMIPS64MOVBload
2126 OpMIPS64MOVBUload
2127 OpMIPS64MOVHload
2128 OpMIPS64MOVHUload
2129 OpMIPS64MOVWload
2130 OpMIPS64MOVWUload
2131 OpMIPS64MOVVload
2132 OpMIPS64MOVFload
2133 OpMIPS64MOVDload
2134 OpMIPS64MOVBstore
2135 OpMIPS64MOVHstore
2136 OpMIPS64MOVWstore
2137 OpMIPS64MOVVstore
2138 OpMIPS64MOVFstore
2139 OpMIPS64MOVDstore
2140 OpMIPS64MOVBstorezero
2141 OpMIPS64MOVHstorezero
2142 OpMIPS64MOVWstorezero
2143 OpMIPS64MOVVstorezero
2144 OpMIPS64MOVWfpgp
2145 OpMIPS64MOVWgpfp
2146 OpMIPS64MOVVfpgp
2147 OpMIPS64MOVVgpfp
2148 OpMIPS64MOVBreg
2149 OpMIPS64MOVBUreg
2150 OpMIPS64MOVHreg
2151 OpMIPS64MOVHUreg
2152 OpMIPS64MOVWreg
2153 OpMIPS64MOVWUreg
2154 OpMIPS64MOVVreg
2155 OpMIPS64MOVVnop
2156 OpMIPS64MOVWF
2157 OpMIPS64MOVWD
2158 OpMIPS64MOVVF
2159 OpMIPS64MOVVD
2160 OpMIPS64TRUNCFW
2161 OpMIPS64TRUNCDW
2162 OpMIPS64TRUNCFV
2163 OpMIPS64TRUNCDV
2164 OpMIPS64MOVFD
2165 OpMIPS64MOVDF
2166 OpMIPS64CALLstatic
2167 OpMIPS64CALLtail
2168 OpMIPS64CALLclosure
2169 OpMIPS64CALLinter
2170 OpMIPS64DUFFZERO
2171 OpMIPS64DUFFCOPY
2172 OpMIPS64LoweredZero
2173 OpMIPS64LoweredMove
2174 OpMIPS64LoweredAtomicAnd32
2175 OpMIPS64LoweredAtomicOr32
2176 OpMIPS64LoweredAtomicLoad8
2177 OpMIPS64LoweredAtomicLoad32
2178 OpMIPS64LoweredAtomicLoad64
2179 OpMIPS64LoweredAtomicStore8
2180 OpMIPS64LoweredAtomicStore32
2181 OpMIPS64LoweredAtomicStore64
2182 OpMIPS64LoweredAtomicStorezero32
2183 OpMIPS64LoweredAtomicStorezero64
2184 OpMIPS64LoweredAtomicExchange32
2185 OpMIPS64LoweredAtomicExchange64
2186 OpMIPS64LoweredAtomicAdd32
2187 OpMIPS64LoweredAtomicAdd64
2188 OpMIPS64LoweredAtomicAddconst32
2189 OpMIPS64LoweredAtomicAddconst64
2190 OpMIPS64LoweredAtomicCas32
2191 OpMIPS64LoweredAtomicCas64
2192 OpMIPS64LoweredNilCheck
2193 OpMIPS64FPFlagTrue
2194 OpMIPS64FPFlagFalse
2195 OpMIPS64LoweredGetClosurePtr
2196 OpMIPS64LoweredGetCallerSP
2197 OpMIPS64LoweredGetCallerPC
2198 OpMIPS64LoweredWB
2199 OpMIPS64LoweredPanicBoundsA
2200 OpMIPS64LoweredPanicBoundsB
2201 OpMIPS64LoweredPanicBoundsC
2202
2203 OpPPC64ADD
2204 OpPPC64ADDCC
2205 OpPPC64ADDconst
2206 OpPPC64ADDCCconst
2207 OpPPC64FADD
2208 OpPPC64FADDS
2209 OpPPC64SUB
2210 OpPPC64SUBCC
2211 OpPPC64SUBFCconst
2212 OpPPC64FSUB
2213 OpPPC64FSUBS
2214 OpPPC64XSMINJDP
2215 OpPPC64XSMAXJDP
2216 OpPPC64MULLD
2217 OpPPC64MULLW
2218 OpPPC64MULLDconst
2219 OpPPC64MULLWconst
2220 OpPPC64MADDLD
2221 OpPPC64MULHD
2222 OpPPC64MULHW
2223 OpPPC64MULHDU
2224 OpPPC64MULHDUCC
2225 OpPPC64MULHWU
2226 OpPPC64FMUL
2227 OpPPC64FMULS
2228 OpPPC64FMADD
2229 OpPPC64FMADDS
2230 OpPPC64FMSUB
2231 OpPPC64FMSUBS
2232 OpPPC64SRAD
2233 OpPPC64SRAW
2234 OpPPC64SRD
2235 OpPPC64SRW
2236 OpPPC64SLD
2237 OpPPC64SLW
2238 OpPPC64ROTL
2239 OpPPC64ROTLW
2240 OpPPC64CLRLSLWI
2241 OpPPC64CLRLSLDI
2242 OpPPC64ADDC
2243 OpPPC64SUBC
2244 OpPPC64ADDCconst
2245 OpPPC64SUBCconst
2246 OpPPC64ADDE
2247 OpPPC64ADDZE
2248 OpPPC64SUBE
2249 OpPPC64ADDZEzero
2250 OpPPC64SUBZEzero
2251 OpPPC64SRADconst
2252 OpPPC64SRAWconst
2253 OpPPC64SRDconst
2254 OpPPC64SRWconst
2255 OpPPC64SLDconst
2256 OpPPC64SLWconst
2257 OpPPC64ROTLconst
2258 OpPPC64ROTLWconst
2259 OpPPC64EXTSWSLconst
2260 OpPPC64RLWINM
2261 OpPPC64RLWNM
2262 OpPPC64RLWMI
2263 OpPPC64RLDICL
2264 OpPPC64RLDICLCC
2265 OpPPC64RLDICR
2266 OpPPC64CNTLZD
2267 OpPPC64CNTLZDCC
2268 OpPPC64CNTLZW
2269 OpPPC64CNTTZD
2270 OpPPC64CNTTZW
2271 OpPPC64POPCNTD
2272 OpPPC64POPCNTW
2273 OpPPC64POPCNTB
2274 OpPPC64FDIV
2275 OpPPC64FDIVS
2276 OpPPC64DIVD
2277 OpPPC64DIVW
2278 OpPPC64DIVDU
2279 OpPPC64DIVWU
2280 OpPPC64MODUD
2281 OpPPC64MODSD
2282 OpPPC64MODUW
2283 OpPPC64MODSW
2284 OpPPC64FCTIDZ
2285 OpPPC64FCTIWZ
2286 OpPPC64FCFID
2287 OpPPC64FCFIDS
2288 OpPPC64FRSP
2289 OpPPC64MFVSRD
2290 OpPPC64MTVSRD
2291 OpPPC64AND
2292 OpPPC64ANDN
2293 OpPPC64ANDNCC
2294 OpPPC64ANDCC
2295 OpPPC64OR
2296 OpPPC64ORN
2297 OpPPC64ORCC
2298 OpPPC64NOR
2299 OpPPC64NORCC
2300 OpPPC64XOR
2301 OpPPC64XORCC
2302 OpPPC64EQV
2303 OpPPC64NEG
2304 OpPPC64NEGCC
2305 OpPPC64BRD
2306 OpPPC64BRW
2307 OpPPC64BRH
2308 OpPPC64FNEG
2309 OpPPC64FSQRT
2310 OpPPC64FSQRTS
2311 OpPPC64FFLOOR
2312 OpPPC64FCEIL
2313 OpPPC64FTRUNC
2314 OpPPC64FROUND
2315 OpPPC64FABS
2316 OpPPC64FNABS
2317 OpPPC64FCPSGN
2318 OpPPC64ORconst
2319 OpPPC64XORconst
2320 OpPPC64ANDCCconst
2321 OpPPC64ANDconst
2322 OpPPC64MOVBreg
2323 OpPPC64MOVBZreg
2324 OpPPC64MOVHreg
2325 OpPPC64MOVHZreg
2326 OpPPC64MOVWreg
2327 OpPPC64MOVWZreg
2328 OpPPC64MOVBZload
2329 OpPPC64MOVHload
2330 OpPPC64MOVHZload
2331 OpPPC64MOVWload
2332 OpPPC64MOVWZload
2333 OpPPC64MOVDload
2334 OpPPC64MOVDBRload
2335 OpPPC64MOVWBRload
2336 OpPPC64MOVHBRload
2337 OpPPC64MOVBZloadidx
2338 OpPPC64MOVHloadidx
2339 OpPPC64MOVHZloadidx
2340 OpPPC64MOVWloadidx
2341 OpPPC64MOVWZloadidx
2342 OpPPC64MOVDloadidx
2343 OpPPC64MOVHBRloadidx
2344 OpPPC64MOVWBRloadidx
2345 OpPPC64MOVDBRloadidx
2346 OpPPC64FMOVDloadidx
2347 OpPPC64FMOVSloadidx
2348 OpPPC64DCBT
2349 OpPPC64MOVDBRstore
2350 OpPPC64MOVWBRstore
2351 OpPPC64MOVHBRstore
2352 OpPPC64FMOVDload
2353 OpPPC64FMOVSload
2354 OpPPC64MOVBstore
2355 OpPPC64MOVHstore
2356 OpPPC64MOVWstore
2357 OpPPC64MOVDstore
2358 OpPPC64FMOVDstore
2359 OpPPC64FMOVSstore
2360 OpPPC64MOVBstoreidx
2361 OpPPC64MOVHstoreidx
2362 OpPPC64MOVWstoreidx
2363 OpPPC64MOVDstoreidx
2364 OpPPC64FMOVDstoreidx
2365 OpPPC64FMOVSstoreidx
2366 OpPPC64MOVHBRstoreidx
2367 OpPPC64MOVWBRstoreidx
2368 OpPPC64MOVDBRstoreidx
2369 OpPPC64MOVBstorezero
2370 OpPPC64MOVHstorezero
2371 OpPPC64MOVWstorezero
2372 OpPPC64MOVDstorezero
2373 OpPPC64MOVDaddr
2374 OpPPC64MOVDconst
2375 OpPPC64FMOVDconst
2376 OpPPC64FMOVSconst
2377 OpPPC64FCMPU
2378 OpPPC64CMP
2379 OpPPC64CMPU
2380 OpPPC64CMPW
2381 OpPPC64CMPWU
2382 OpPPC64CMPconst
2383 OpPPC64CMPUconst
2384 OpPPC64CMPWconst
2385 OpPPC64CMPWUconst
2386 OpPPC64ISEL
2387 OpPPC64ISELZ
2388 OpPPC64SETBC
2389 OpPPC64SETBCR
2390 OpPPC64Equal
2391 OpPPC64NotEqual
2392 OpPPC64LessThan
2393 OpPPC64FLessThan
2394 OpPPC64LessEqual
2395 OpPPC64FLessEqual
2396 OpPPC64GreaterThan
2397 OpPPC64FGreaterThan
2398 OpPPC64GreaterEqual
2399 OpPPC64FGreaterEqual
2400 OpPPC64LoweredGetClosurePtr
2401 OpPPC64LoweredGetCallerSP
2402 OpPPC64LoweredGetCallerPC
2403 OpPPC64LoweredNilCheck
2404 OpPPC64LoweredRound32F
2405 OpPPC64LoweredRound64F
2406 OpPPC64CALLstatic
2407 OpPPC64CALLtail
2408 OpPPC64CALLclosure
2409 OpPPC64CALLinter
2410 OpPPC64LoweredZero
2411 OpPPC64LoweredZeroShort
2412 OpPPC64LoweredQuadZeroShort
2413 OpPPC64LoweredQuadZero
2414 OpPPC64LoweredMove
2415 OpPPC64LoweredMoveShort
2416 OpPPC64LoweredQuadMove
2417 OpPPC64LoweredQuadMoveShort
2418 OpPPC64LoweredAtomicStore8
2419 OpPPC64LoweredAtomicStore32
2420 OpPPC64LoweredAtomicStore64
2421 OpPPC64LoweredAtomicLoad8
2422 OpPPC64LoweredAtomicLoad32
2423 OpPPC64LoweredAtomicLoad64
2424 OpPPC64LoweredAtomicLoadPtr
2425 OpPPC64LoweredAtomicAdd32
2426 OpPPC64LoweredAtomicAdd64
2427 OpPPC64LoweredAtomicExchange8
2428 OpPPC64LoweredAtomicExchange32
2429 OpPPC64LoweredAtomicExchange64
2430 OpPPC64LoweredAtomicCas64
2431 OpPPC64LoweredAtomicCas32
2432 OpPPC64LoweredAtomicAnd8
2433 OpPPC64LoweredAtomicAnd32
2434 OpPPC64LoweredAtomicOr8
2435 OpPPC64LoweredAtomicOr32
2436 OpPPC64LoweredWB
2437 OpPPC64LoweredPubBarrier
2438 OpPPC64LoweredPanicBoundsA
2439 OpPPC64LoweredPanicBoundsB
2440 OpPPC64LoweredPanicBoundsC
2441 OpPPC64InvertFlags
2442 OpPPC64FlagEQ
2443 OpPPC64FlagLT
2444 OpPPC64FlagGT
2445
2446 OpRISCV64ADD
2447 OpRISCV64ADDI
2448 OpRISCV64ADDIW
2449 OpRISCV64NEG
2450 OpRISCV64NEGW
2451 OpRISCV64SUB
2452 OpRISCV64SUBW
2453 OpRISCV64MUL
2454 OpRISCV64MULW
2455 OpRISCV64MULH
2456 OpRISCV64MULHU
2457 OpRISCV64LoweredMuluhilo
2458 OpRISCV64LoweredMuluover
2459 OpRISCV64DIV
2460 OpRISCV64DIVU
2461 OpRISCV64DIVW
2462 OpRISCV64DIVUW
2463 OpRISCV64REM
2464 OpRISCV64REMU
2465 OpRISCV64REMW
2466 OpRISCV64REMUW
2467 OpRISCV64MOVaddr
2468 OpRISCV64MOVDconst
2469 OpRISCV64MOVBload
2470 OpRISCV64MOVHload
2471 OpRISCV64MOVWload
2472 OpRISCV64MOVDload
2473 OpRISCV64MOVBUload
2474 OpRISCV64MOVHUload
2475 OpRISCV64MOVWUload
2476 OpRISCV64MOVBstore
2477 OpRISCV64MOVHstore
2478 OpRISCV64MOVWstore
2479 OpRISCV64MOVDstore
2480 OpRISCV64MOVBstorezero
2481 OpRISCV64MOVHstorezero
2482 OpRISCV64MOVWstorezero
2483 OpRISCV64MOVDstorezero
2484 OpRISCV64MOVBreg
2485 OpRISCV64MOVHreg
2486 OpRISCV64MOVWreg
2487 OpRISCV64MOVDreg
2488 OpRISCV64MOVBUreg
2489 OpRISCV64MOVHUreg
2490 OpRISCV64MOVWUreg
2491 OpRISCV64MOVDnop
2492 OpRISCV64SLL
2493 OpRISCV64SLLW
2494 OpRISCV64SRA
2495 OpRISCV64SRAW
2496 OpRISCV64SRL
2497 OpRISCV64SRLW
2498 OpRISCV64SLLI
2499 OpRISCV64SLLIW
2500 OpRISCV64SRAI
2501 OpRISCV64SRAIW
2502 OpRISCV64SRLI
2503 OpRISCV64SRLIW
2504 OpRISCV64SH1ADD
2505 OpRISCV64SH2ADD
2506 OpRISCV64SH3ADD
2507 OpRISCV64AND
2508 OpRISCV64ANDN
2509 OpRISCV64ANDI
2510 OpRISCV64NOT
2511 OpRISCV64OR
2512 OpRISCV64ORN
2513 OpRISCV64ORI
2514 OpRISCV64ROL
2515 OpRISCV64ROLW
2516 OpRISCV64ROR
2517 OpRISCV64RORI
2518 OpRISCV64RORIW
2519 OpRISCV64RORW
2520 OpRISCV64XNOR
2521 OpRISCV64XOR
2522 OpRISCV64XORI
2523 OpRISCV64MIN
2524 OpRISCV64MAX
2525 OpRISCV64MINU
2526 OpRISCV64MAXU
2527 OpRISCV64SEQZ
2528 OpRISCV64SNEZ
2529 OpRISCV64SLT
2530 OpRISCV64SLTI
2531 OpRISCV64SLTU
2532 OpRISCV64SLTIU
2533 OpRISCV64LoweredRound32F
2534 OpRISCV64LoweredRound64F
2535 OpRISCV64CALLstatic
2536 OpRISCV64CALLtail
2537 OpRISCV64CALLclosure
2538 OpRISCV64CALLinter
2539 OpRISCV64DUFFZERO
2540 OpRISCV64DUFFCOPY
2541 OpRISCV64LoweredZero
2542 OpRISCV64LoweredMove
2543 OpRISCV64LoweredAtomicLoad8
2544 OpRISCV64LoweredAtomicLoad32
2545 OpRISCV64LoweredAtomicLoad64
2546 OpRISCV64LoweredAtomicStore8
2547 OpRISCV64LoweredAtomicStore32
2548 OpRISCV64LoweredAtomicStore64
2549 OpRISCV64LoweredAtomicExchange32
2550 OpRISCV64LoweredAtomicExchange64
2551 OpRISCV64LoweredAtomicAdd32
2552 OpRISCV64LoweredAtomicAdd64
2553 OpRISCV64LoweredAtomicCas32
2554 OpRISCV64LoweredAtomicCas64
2555 OpRISCV64LoweredAtomicAnd32
2556 OpRISCV64LoweredAtomicOr32
2557 OpRISCV64LoweredNilCheck
2558 OpRISCV64LoweredGetClosurePtr
2559 OpRISCV64LoweredGetCallerSP
2560 OpRISCV64LoweredGetCallerPC
2561 OpRISCV64LoweredWB
2562 OpRISCV64LoweredPubBarrier
2563 OpRISCV64LoweredPanicBoundsA
2564 OpRISCV64LoweredPanicBoundsB
2565 OpRISCV64LoweredPanicBoundsC
2566 OpRISCV64FADDS
2567 OpRISCV64FSUBS
2568 OpRISCV64FMULS
2569 OpRISCV64FDIVS
2570 OpRISCV64FMADDS
2571 OpRISCV64FMSUBS
2572 OpRISCV64FNMADDS
2573 OpRISCV64FNMSUBS
2574 OpRISCV64FSQRTS
2575 OpRISCV64FNEGS
2576 OpRISCV64FMVSX
2577 OpRISCV64FCVTSW
2578 OpRISCV64FCVTSL
2579 OpRISCV64FCVTWS
2580 OpRISCV64FCVTLS
2581 OpRISCV64FMOVWload
2582 OpRISCV64FMOVWstore
2583 OpRISCV64FEQS
2584 OpRISCV64FNES
2585 OpRISCV64FLTS
2586 OpRISCV64FLES
2587 OpRISCV64LoweredFMAXS
2588 OpRISCV64LoweredFMINS
2589 OpRISCV64FADDD
2590 OpRISCV64FSUBD
2591 OpRISCV64FMULD
2592 OpRISCV64FDIVD
2593 OpRISCV64FMADDD
2594 OpRISCV64FMSUBD
2595 OpRISCV64FNMADDD
2596 OpRISCV64FNMSUBD
2597 OpRISCV64FSQRTD
2598 OpRISCV64FNEGD
2599 OpRISCV64FABSD
2600 OpRISCV64FSGNJD
2601 OpRISCV64FMVDX
2602 OpRISCV64FCVTDW
2603 OpRISCV64FCVTDL
2604 OpRISCV64FCVTWD
2605 OpRISCV64FCVTLD
2606 OpRISCV64FCVTDS
2607 OpRISCV64FCVTSD
2608 OpRISCV64FMOVDload
2609 OpRISCV64FMOVDstore
2610 OpRISCV64FEQD
2611 OpRISCV64FNED
2612 OpRISCV64FLTD
2613 OpRISCV64FLED
2614 OpRISCV64LoweredFMIND
2615 OpRISCV64LoweredFMAXD
2616
2617 OpS390XFADDS
2618 OpS390XFADD
2619 OpS390XFSUBS
2620 OpS390XFSUB
2621 OpS390XFMULS
2622 OpS390XFMUL
2623 OpS390XFDIVS
2624 OpS390XFDIV
2625 OpS390XFNEGS
2626 OpS390XFNEG
2627 OpS390XFMADDS
2628 OpS390XFMADD
2629 OpS390XFMSUBS
2630 OpS390XFMSUB
2631 OpS390XLPDFR
2632 OpS390XLNDFR
2633 OpS390XCPSDR
2634 OpS390XFIDBR
2635 OpS390XFMOVSload
2636 OpS390XFMOVDload
2637 OpS390XFMOVSconst
2638 OpS390XFMOVDconst
2639 OpS390XFMOVSloadidx
2640 OpS390XFMOVDloadidx
2641 OpS390XFMOVSstore
2642 OpS390XFMOVDstore
2643 OpS390XFMOVSstoreidx
2644 OpS390XFMOVDstoreidx
2645 OpS390XADD
2646 OpS390XADDW
2647 OpS390XADDconst
2648 OpS390XADDWconst
2649 OpS390XADDload
2650 OpS390XADDWload
2651 OpS390XSUB
2652 OpS390XSUBW
2653 OpS390XSUBconst
2654 OpS390XSUBWconst
2655 OpS390XSUBload
2656 OpS390XSUBWload
2657 OpS390XMULLD
2658 OpS390XMULLW
2659 OpS390XMULLDconst
2660 OpS390XMULLWconst
2661 OpS390XMULLDload
2662 OpS390XMULLWload
2663 OpS390XMULHD
2664 OpS390XMULHDU
2665 OpS390XDIVD
2666 OpS390XDIVW
2667 OpS390XDIVDU
2668 OpS390XDIVWU
2669 OpS390XMODD
2670 OpS390XMODW
2671 OpS390XMODDU
2672 OpS390XMODWU
2673 OpS390XAND
2674 OpS390XANDW
2675 OpS390XANDconst
2676 OpS390XANDWconst
2677 OpS390XANDload
2678 OpS390XANDWload
2679 OpS390XOR
2680 OpS390XORW
2681 OpS390XORconst
2682 OpS390XORWconst
2683 OpS390XORload
2684 OpS390XORWload
2685 OpS390XXOR
2686 OpS390XXORW
2687 OpS390XXORconst
2688 OpS390XXORWconst
2689 OpS390XXORload
2690 OpS390XXORWload
2691 OpS390XADDC
2692 OpS390XADDCconst
2693 OpS390XADDE
2694 OpS390XSUBC
2695 OpS390XSUBE
2696 OpS390XCMP
2697 OpS390XCMPW
2698 OpS390XCMPU
2699 OpS390XCMPWU
2700 OpS390XCMPconst
2701 OpS390XCMPWconst
2702 OpS390XCMPUconst
2703 OpS390XCMPWUconst
2704 OpS390XFCMPS
2705 OpS390XFCMP
2706 OpS390XLTDBR
2707 OpS390XLTEBR
2708 OpS390XSLD
2709 OpS390XSLW
2710 OpS390XSLDconst
2711 OpS390XSLWconst
2712 OpS390XSRD
2713 OpS390XSRW
2714 OpS390XSRDconst
2715 OpS390XSRWconst
2716 OpS390XSRAD
2717 OpS390XSRAW
2718 OpS390XSRADconst
2719 OpS390XSRAWconst
2720 OpS390XRLLG
2721 OpS390XRLL
2722 OpS390XRLLconst
2723 OpS390XRXSBG
2724 OpS390XRISBGZ
2725 OpS390XNEG
2726 OpS390XNEGW
2727 OpS390XNOT
2728 OpS390XNOTW
2729 OpS390XFSQRT
2730 OpS390XFSQRTS
2731 OpS390XLOCGR
2732 OpS390XMOVBreg
2733 OpS390XMOVBZreg
2734 OpS390XMOVHreg
2735 OpS390XMOVHZreg
2736 OpS390XMOVWreg
2737 OpS390XMOVWZreg
2738 OpS390XMOVDconst
2739 OpS390XLDGR
2740 OpS390XLGDR
2741 OpS390XCFDBRA
2742 OpS390XCGDBRA
2743 OpS390XCFEBRA
2744 OpS390XCGEBRA
2745 OpS390XCEFBRA
2746 OpS390XCDFBRA
2747 OpS390XCEGBRA
2748 OpS390XCDGBRA
2749 OpS390XCLFEBR
2750 OpS390XCLFDBR
2751 OpS390XCLGEBR
2752 OpS390XCLGDBR
2753 OpS390XCELFBR
2754 OpS390XCDLFBR
2755 OpS390XCELGBR
2756 OpS390XCDLGBR
2757 OpS390XLEDBR
2758 OpS390XLDEBR
2759 OpS390XMOVDaddr
2760 OpS390XMOVDaddridx
2761 OpS390XMOVBZload
2762 OpS390XMOVBload
2763 OpS390XMOVHZload
2764 OpS390XMOVHload
2765 OpS390XMOVWZload
2766 OpS390XMOVWload
2767 OpS390XMOVDload
2768 OpS390XMOVWBR
2769 OpS390XMOVDBR
2770 OpS390XMOVHBRload
2771 OpS390XMOVWBRload
2772 OpS390XMOVDBRload
2773 OpS390XMOVBstore
2774 OpS390XMOVHstore
2775 OpS390XMOVWstore
2776 OpS390XMOVDstore
2777 OpS390XMOVHBRstore
2778 OpS390XMOVWBRstore
2779 OpS390XMOVDBRstore
2780 OpS390XMVC
2781 OpS390XMOVBZloadidx
2782 OpS390XMOVBloadidx
2783 OpS390XMOVHZloadidx
2784 OpS390XMOVHloadidx
2785 OpS390XMOVWZloadidx
2786 OpS390XMOVWloadidx
2787 OpS390XMOVDloadidx
2788 OpS390XMOVHBRloadidx
2789 OpS390XMOVWBRloadidx
2790 OpS390XMOVDBRloadidx
2791 OpS390XMOVBstoreidx
2792 OpS390XMOVHstoreidx
2793 OpS390XMOVWstoreidx
2794 OpS390XMOVDstoreidx
2795 OpS390XMOVHBRstoreidx
2796 OpS390XMOVWBRstoreidx
2797 OpS390XMOVDBRstoreidx
2798 OpS390XMOVBstoreconst
2799 OpS390XMOVHstoreconst
2800 OpS390XMOVWstoreconst
2801 OpS390XMOVDstoreconst
2802 OpS390XCLEAR
2803 OpS390XCALLstatic
2804 OpS390XCALLtail
2805 OpS390XCALLclosure
2806 OpS390XCALLinter
2807 OpS390XInvertFlags
2808 OpS390XLoweredGetG
2809 OpS390XLoweredGetClosurePtr
2810 OpS390XLoweredGetCallerSP
2811 OpS390XLoweredGetCallerPC
2812 OpS390XLoweredNilCheck
2813 OpS390XLoweredRound32F
2814 OpS390XLoweredRound64F
2815 OpS390XLoweredWB
2816 OpS390XLoweredPanicBoundsA
2817 OpS390XLoweredPanicBoundsB
2818 OpS390XLoweredPanicBoundsC
2819 OpS390XFlagEQ
2820 OpS390XFlagLT
2821 OpS390XFlagGT
2822 OpS390XFlagOV
2823 OpS390XSYNC
2824 OpS390XMOVBZatomicload
2825 OpS390XMOVWZatomicload
2826 OpS390XMOVDatomicload
2827 OpS390XMOVBatomicstore
2828 OpS390XMOVWatomicstore
2829 OpS390XMOVDatomicstore
2830 OpS390XLAA
2831 OpS390XLAAG
2832 OpS390XAddTupleFirst32
2833 OpS390XAddTupleFirst64
2834 OpS390XLAN
2835 OpS390XLANfloor
2836 OpS390XLAO
2837 OpS390XLAOfloor
2838 OpS390XLoweredAtomicCas32
2839 OpS390XLoweredAtomicCas64
2840 OpS390XLoweredAtomicExchange32
2841 OpS390XLoweredAtomicExchange64
2842 OpS390XFLOGR
2843 OpS390XPOPCNT
2844 OpS390XMLGR
2845 OpS390XSumBytes2
2846 OpS390XSumBytes4
2847 OpS390XSumBytes8
2848 OpS390XSTMG2
2849 OpS390XSTMG3
2850 OpS390XSTMG4
2851 OpS390XSTM2
2852 OpS390XSTM3
2853 OpS390XSTM4
2854 OpS390XLoweredMove
2855 OpS390XLoweredZero
2856
2857 OpWasmLoweredStaticCall
2858 OpWasmLoweredTailCall
2859 OpWasmLoweredClosureCall
2860 OpWasmLoweredInterCall
2861 OpWasmLoweredAddr
2862 OpWasmLoweredMove
2863 OpWasmLoweredZero
2864 OpWasmLoweredGetClosurePtr
2865 OpWasmLoweredGetCallerPC
2866 OpWasmLoweredGetCallerSP
2867 OpWasmLoweredNilCheck
2868 OpWasmLoweredWB
2869 OpWasmLoweredConvert
2870 OpWasmSelect
2871 OpWasmI64Load8U
2872 OpWasmI64Load8S
2873 OpWasmI64Load16U
2874 OpWasmI64Load16S
2875 OpWasmI64Load32U
2876 OpWasmI64Load32S
2877 OpWasmI64Load
2878 OpWasmI64Store8
2879 OpWasmI64Store16
2880 OpWasmI64Store32
2881 OpWasmI64Store
2882 OpWasmF32Load
2883 OpWasmF64Load
2884 OpWasmF32Store
2885 OpWasmF64Store
2886 OpWasmI64Const
2887 OpWasmF32Const
2888 OpWasmF64Const
2889 OpWasmI64Eqz
2890 OpWasmI64Eq
2891 OpWasmI64Ne
2892 OpWasmI64LtS
2893 OpWasmI64LtU
2894 OpWasmI64GtS
2895 OpWasmI64GtU
2896 OpWasmI64LeS
2897 OpWasmI64LeU
2898 OpWasmI64GeS
2899 OpWasmI64GeU
2900 OpWasmF32Eq
2901 OpWasmF32Ne
2902 OpWasmF32Lt
2903 OpWasmF32Gt
2904 OpWasmF32Le
2905 OpWasmF32Ge
2906 OpWasmF64Eq
2907 OpWasmF64Ne
2908 OpWasmF64Lt
2909 OpWasmF64Gt
2910 OpWasmF64Le
2911 OpWasmF64Ge
2912 OpWasmI64Add
2913 OpWasmI64AddConst
2914 OpWasmI64Sub
2915 OpWasmI64Mul
2916 OpWasmI64DivS
2917 OpWasmI64DivU
2918 OpWasmI64RemS
2919 OpWasmI64RemU
2920 OpWasmI64And
2921 OpWasmI64Or
2922 OpWasmI64Xor
2923 OpWasmI64Shl
2924 OpWasmI64ShrS
2925 OpWasmI64ShrU
2926 OpWasmF32Neg
2927 OpWasmF32Add
2928 OpWasmF32Sub
2929 OpWasmF32Mul
2930 OpWasmF32Div
2931 OpWasmF64Neg
2932 OpWasmF64Add
2933 OpWasmF64Sub
2934 OpWasmF64Mul
2935 OpWasmF64Div
2936 OpWasmI64TruncSatF64S
2937 OpWasmI64TruncSatF64U
2938 OpWasmI64TruncSatF32S
2939 OpWasmI64TruncSatF32U
2940 OpWasmF32ConvertI64S
2941 OpWasmF32ConvertI64U
2942 OpWasmF64ConvertI64S
2943 OpWasmF64ConvertI64U
2944 OpWasmF32DemoteF64
2945 OpWasmF64PromoteF32
2946 OpWasmI64Extend8S
2947 OpWasmI64Extend16S
2948 OpWasmI64Extend32S
2949 OpWasmF32Sqrt
2950 OpWasmF32Trunc
2951 OpWasmF32Ceil
2952 OpWasmF32Floor
2953 OpWasmF32Nearest
2954 OpWasmF32Abs
2955 OpWasmF32Copysign
2956 OpWasmF64Sqrt
2957 OpWasmF64Trunc
2958 OpWasmF64Ceil
2959 OpWasmF64Floor
2960 OpWasmF64Nearest
2961 OpWasmF64Abs
2962 OpWasmF64Copysign
2963 OpWasmI64Ctz
2964 OpWasmI64Clz
2965 OpWasmI32Rotl
2966 OpWasmI64Rotl
2967 OpWasmI64Popcnt
2968
2969 OpAdd8
2970 OpAdd16
2971 OpAdd32
2972 OpAdd64
2973 OpAddPtr
2974 OpAdd32F
2975 OpAdd64F
2976 OpSub8
2977 OpSub16
2978 OpSub32
2979 OpSub64
2980 OpSubPtr
2981 OpSub32F
2982 OpSub64F
2983 OpMul8
2984 OpMul16
2985 OpMul32
2986 OpMul64
2987 OpMul32F
2988 OpMul64F
2989 OpDiv32F
2990 OpDiv64F
2991 OpHmul32
2992 OpHmul32u
2993 OpHmul64
2994 OpHmul64u
2995 OpMul32uhilo
2996 OpMul64uhilo
2997 OpMul32uover
2998 OpMul64uover
2999 OpAvg32u
3000 OpAvg64u
3001 OpDiv8
3002 OpDiv8u
3003 OpDiv16
3004 OpDiv16u
3005 OpDiv32
3006 OpDiv32u
3007 OpDiv64
3008 OpDiv64u
3009 OpDiv128u
3010 OpMod8
3011 OpMod8u
3012 OpMod16
3013 OpMod16u
3014 OpMod32
3015 OpMod32u
3016 OpMod64
3017 OpMod64u
3018 OpAnd8
3019 OpAnd16
3020 OpAnd32
3021 OpAnd64
3022 OpOr8
3023 OpOr16
3024 OpOr32
3025 OpOr64
3026 OpXor8
3027 OpXor16
3028 OpXor32
3029 OpXor64
3030 OpLsh8x8
3031 OpLsh8x16
3032 OpLsh8x32
3033 OpLsh8x64
3034 OpLsh16x8
3035 OpLsh16x16
3036 OpLsh16x32
3037 OpLsh16x64
3038 OpLsh32x8
3039 OpLsh32x16
3040 OpLsh32x32
3041 OpLsh32x64
3042 OpLsh64x8
3043 OpLsh64x16
3044 OpLsh64x32
3045 OpLsh64x64
3046 OpRsh8x8
3047 OpRsh8x16
3048 OpRsh8x32
3049 OpRsh8x64
3050 OpRsh16x8
3051 OpRsh16x16
3052 OpRsh16x32
3053 OpRsh16x64
3054 OpRsh32x8
3055 OpRsh32x16
3056 OpRsh32x32
3057 OpRsh32x64
3058 OpRsh64x8
3059 OpRsh64x16
3060 OpRsh64x32
3061 OpRsh64x64
3062 OpRsh8Ux8
3063 OpRsh8Ux16
3064 OpRsh8Ux32
3065 OpRsh8Ux64
3066 OpRsh16Ux8
3067 OpRsh16Ux16
3068 OpRsh16Ux32
3069 OpRsh16Ux64
3070 OpRsh32Ux8
3071 OpRsh32Ux16
3072 OpRsh32Ux32
3073 OpRsh32Ux64
3074 OpRsh64Ux8
3075 OpRsh64Ux16
3076 OpRsh64Ux32
3077 OpRsh64Ux64
3078 OpEq8
3079 OpEq16
3080 OpEq32
3081 OpEq64
3082 OpEqPtr
3083 OpEqInter
3084 OpEqSlice
3085 OpEq32F
3086 OpEq64F
3087 OpNeq8
3088 OpNeq16
3089 OpNeq32
3090 OpNeq64
3091 OpNeqPtr
3092 OpNeqInter
3093 OpNeqSlice
3094 OpNeq32F
3095 OpNeq64F
3096 OpLess8
3097 OpLess8U
3098 OpLess16
3099 OpLess16U
3100 OpLess32
3101 OpLess32U
3102 OpLess64
3103 OpLess64U
3104 OpLess32F
3105 OpLess64F
3106 OpLeq8
3107 OpLeq8U
3108 OpLeq16
3109 OpLeq16U
3110 OpLeq32
3111 OpLeq32U
3112 OpLeq64
3113 OpLeq64U
3114 OpLeq32F
3115 OpLeq64F
3116 OpCondSelect
3117 OpAndB
3118 OpOrB
3119 OpEqB
3120 OpNeqB
3121 OpNot
3122 OpNeg8
3123 OpNeg16
3124 OpNeg32
3125 OpNeg64
3126 OpNeg32F
3127 OpNeg64F
3128 OpCom8
3129 OpCom16
3130 OpCom32
3131 OpCom64
3132 OpCtz8
3133 OpCtz16
3134 OpCtz32
3135 OpCtz64
3136 OpCtz64On32
3137 OpCtz8NonZero
3138 OpCtz16NonZero
3139 OpCtz32NonZero
3140 OpCtz64NonZero
3141 OpBitLen8
3142 OpBitLen16
3143 OpBitLen32
3144 OpBitLen64
3145 OpBswap16
3146 OpBswap32
3147 OpBswap64
3148 OpBitRev8
3149 OpBitRev16
3150 OpBitRev32
3151 OpBitRev64
3152 OpPopCount8
3153 OpPopCount16
3154 OpPopCount32
3155 OpPopCount64
3156 OpRotateLeft64
3157 OpRotateLeft32
3158 OpRotateLeft16
3159 OpRotateLeft8
3160 OpSqrt
3161 OpSqrt32
3162 OpFloor
3163 OpCeil
3164 OpTrunc
3165 OpRound
3166 OpRoundToEven
3167 OpAbs
3168 OpCopysign
3169 OpMin64
3170 OpMax64
3171 OpMin64u
3172 OpMax64u
3173 OpMin64F
3174 OpMin32F
3175 OpMax64F
3176 OpMax32F
3177 OpFMA
3178 OpPhi
3179 OpCopy
3180 OpConvert
3181 OpConstBool
3182 OpConstString
3183 OpConstNil
3184 OpConst8
3185 OpConst16
3186 OpConst32
3187 OpConst64
3188 OpConst32F
3189 OpConst64F
3190 OpConstInterface
3191 OpConstSlice
3192 OpInitMem
3193 OpArg
3194 OpArgIntReg
3195 OpArgFloatReg
3196 OpAddr
3197 OpLocalAddr
3198 OpSP
3199 OpSB
3200 OpSPanchored
3201 OpLoad
3202 OpDereference
3203 OpStore
3204 OpMove
3205 OpZero
3206 OpStoreWB
3207 OpMoveWB
3208 OpZeroWB
3209 OpWBend
3210 OpWB
3211 OpHasCPUFeature
3212 OpPanicBounds
3213 OpPanicExtend
3214 OpClosureCall
3215 OpStaticCall
3216 OpInterCall
3217 OpTailCall
3218 OpClosureLECall
3219 OpStaticLECall
3220 OpInterLECall
3221 OpTailLECall
3222 OpSignExt8to16
3223 OpSignExt8to32
3224 OpSignExt8to64
3225 OpSignExt16to32
3226 OpSignExt16to64
3227 OpSignExt32to64
3228 OpZeroExt8to16
3229 OpZeroExt8to32
3230 OpZeroExt8to64
3231 OpZeroExt16to32
3232 OpZeroExt16to64
3233 OpZeroExt32to64
3234 OpTrunc16to8
3235 OpTrunc32to8
3236 OpTrunc32to16
3237 OpTrunc64to8
3238 OpTrunc64to16
3239 OpTrunc64to32
3240 OpCvt32to32F
3241 OpCvt32to64F
3242 OpCvt64to32F
3243 OpCvt64to64F
3244 OpCvt32Fto32
3245 OpCvt32Fto64
3246 OpCvt64Fto32
3247 OpCvt64Fto64
3248 OpCvt32Fto64F
3249 OpCvt64Fto32F
3250 OpCvtBoolToUint8
3251 OpRound32F
3252 OpRound64F
3253 OpIsNonNil
3254 OpIsInBounds
3255 OpIsSliceInBounds
3256 OpNilCheck
3257 OpGetG
3258 OpGetClosurePtr
3259 OpGetCallerPC
3260 OpGetCallerSP
3261 OpPtrIndex
3262 OpOffPtr
3263 OpSliceMake
3264 OpSlicePtr
3265 OpSliceLen
3266 OpSliceCap
3267 OpSlicePtrUnchecked
3268 OpComplexMake
3269 OpComplexReal
3270 OpComplexImag
3271 OpStringMake
3272 OpStringPtr
3273 OpStringLen
3274 OpIMake
3275 OpITab
3276 OpIData
3277 OpStructMake
3278 OpStructSelect
3279 OpArrayMake0
3280 OpArrayMake1
3281 OpArraySelect
3282 OpStoreReg
3283 OpLoadReg
3284 OpFwdRef
3285 OpUnknown
3286 OpVarDef
3287 OpVarLive
3288 OpKeepAlive
3289 OpInlMark
3290 OpInt64Make
3291 OpInt64Hi
3292 OpInt64Lo
3293 OpAdd32carry
3294 OpAdd32withcarry
3295 OpSub32carry
3296 OpSub32withcarry
3297 OpAdd64carry
3298 OpSub64borrow
3299 OpSignmask
3300 OpZeromask
3301 OpSlicemask
3302 OpSpectreIndex
3303 OpSpectreSliceIndex
3304 OpCvt32Uto32F
3305 OpCvt32Uto64F
3306 OpCvt32Fto32U
3307 OpCvt64Fto32U
3308 OpCvt64Uto32F
3309 OpCvt64Uto64F
3310 OpCvt32Fto64U
3311 OpCvt64Fto64U
3312 OpSelect0
3313 OpSelect1
3314 OpSelectN
3315 OpSelectNAddr
3316 OpMakeResult
3317 OpAtomicLoad8
3318 OpAtomicLoad32
3319 OpAtomicLoad64
3320 OpAtomicLoadPtr
3321 OpAtomicLoadAcq32
3322 OpAtomicLoadAcq64
3323 OpAtomicStore8
3324 OpAtomicStore32
3325 OpAtomicStore64
3326 OpAtomicStorePtrNoWB
3327 OpAtomicStoreRel32
3328 OpAtomicStoreRel64
3329 OpAtomicExchange8
3330 OpAtomicExchange32
3331 OpAtomicExchange64
3332 OpAtomicAdd32
3333 OpAtomicAdd64
3334 OpAtomicCompareAndSwap32
3335 OpAtomicCompareAndSwap64
3336 OpAtomicCompareAndSwapRel32
3337 OpAtomicAnd8
3338 OpAtomicOr8
3339 OpAtomicAnd32
3340 OpAtomicOr32
3341 OpAtomicAnd64value
3342 OpAtomicAnd32value
3343 OpAtomicAnd8value
3344 OpAtomicOr64value
3345 OpAtomicOr32value
3346 OpAtomicOr8value
3347 OpAtomicStore8Variant
3348 OpAtomicStore32Variant
3349 OpAtomicStore64Variant
3350 OpAtomicAdd32Variant
3351 OpAtomicAdd64Variant
3352 OpAtomicExchange8Variant
3353 OpAtomicExchange32Variant
3354 OpAtomicExchange64Variant
3355 OpAtomicCompareAndSwap32Variant
3356 OpAtomicCompareAndSwap64Variant
3357 OpAtomicAnd64valueVariant
3358 OpAtomicOr64valueVariant
3359 OpAtomicAnd32valueVariant
3360 OpAtomicOr32valueVariant
3361 OpAtomicAnd8valueVariant
3362 OpAtomicOr8valueVariant
3363 OpPubBarrier
3364 OpClobber
3365 OpClobberReg
3366 OpPrefetchCache
3367 OpPrefetchCacheStreamed
3368 )
3369
3370 var opcodeTable = [...]opInfo{
3371 {name: "OpInvalid"},
3372
3373 {
3374 name: "ADDSS",
3375 argLen: 2,
3376 commutative: true,
3377 resultInArg0: true,
3378 asm: x86.AADDSS,
3379 reg: regInfo{
3380 inputs: []inputInfo{
3381 {0, 65280},
3382 {1, 65280},
3383 },
3384 outputs: []outputInfo{
3385 {0, 65280},
3386 },
3387 },
3388 },
3389 {
3390 name: "ADDSD",
3391 argLen: 2,
3392 commutative: true,
3393 resultInArg0: true,
3394 asm: x86.AADDSD,
3395 reg: regInfo{
3396 inputs: []inputInfo{
3397 {0, 65280},
3398 {1, 65280},
3399 },
3400 outputs: []outputInfo{
3401 {0, 65280},
3402 },
3403 },
3404 },
3405 {
3406 name: "SUBSS",
3407 argLen: 2,
3408 resultInArg0: true,
3409 asm: x86.ASUBSS,
3410 reg: regInfo{
3411 inputs: []inputInfo{
3412 {0, 65280},
3413 {1, 65280},
3414 },
3415 outputs: []outputInfo{
3416 {0, 65280},
3417 },
3418 },
3419 },
3420 {
3421 name: "SUBSD",
3422 argLen: 2,
3423 resultInArg0: true,
3424 asm: x86.ASUBSD,
3425 reg: regInfo{
3426 inputs: []inputInfo{
3427 {0, 65280},
3428 {1, 65280},
3429 },
3430 outputs: []outputInfo{
3431 {0, 65280},
3432 },
3433 },
3434 },
3435 {
3436 name: "MULSS",
3437 argLen: 2,
3438 commutative: true,
3439 resultInArg0: true,
3440 asm: x86.AMULSS,
3441 reg: regInfo{
3442 inputs: []inputInfo{
3443 {0, 65280},
3444 {1, 65280},
3445 },
3446 outputs: []outputInfo{
3447 {0, 65280},
3448 },
3449 },
3450 },
3451 {
3452 name: "MULSD",
3453 argLen: 2,
3454 commutative: true,
3455 resultInArg0: true,
3456 asm: x86.AMULSD,
3457 reg: regInfo{
3458 inputs: []inputInfo{
3459 {0, 65280},
3460 {1, 65280},
3461 },
3462 outputs: []outputInfo{
3463 {0, 65280},
3464 },
3465 },
3466 },
3467 {
3468 name: "DIVSS",
3469 argLen: 2,
3470 resultInArg0: true,
3471 asm: x86.ADIVSS,
3472 reg: regInfo{
3473 inputs: []inputInfo{
3474 {0, 65280},
3475 {1, 65280},
3476 },
3477 outputs: []outputInfo{
3478 {0, 65280},
3479 },
3480 },
3481 },
3482 {
3483 name: "DIVSD",
3484 argLen: 2,
3485 resultInArg0: true,
3486 asm: x86.ADIVSD,
3487 reg: regInfo{
3488 inputs: []inputInfo{
3489 {0, 65280},
3490 {1, 65280},
3491 },
3492 outputs: []outputInfo{
3493 {0, 65280},
3494 },
3495 },
3496 },
3497 {
3498 name: "MOVSSload",
3499 auxType: auxSymOff,
3500 argLen: 2,
3501 faultOnNilArg0: true,
3502 symEffect: SymRead,
3503 asm: x86.AMOVSS,
3504 reg: regInfo{
3505 inputs: []inputInfo{
3506 {0, 65791},
3507 },
3508 outputs: []outputInfo{
3509 {0, 65280},
3510 },
3511 },
3512 },
3513 {
3514 name: "MOVSDload",
3515 auxType: auxSymOff,
3516 argLen: 2,
3517 faultOnNilArg0: true,
3518 symEffect: SymRead,
3519 asm: x86.AMOVSD,
3520 reg: regInfo{
3521 inputs: []inputInfo{
3522 {0, 65791},
3523 },
3524 outputs: []outputInfo{
3525 {0, 65280},
3526 },
3527 },
3528 },
3529 {
3530 name: "MOVSSconst",
3531 auxType: auxFloat32,
3532 argLen: 0,
3533 rematerializeable: true,
3534 asm: x86.AMOVSS,
3535 reg: regInfo{
3536 outputs: []outputInfo{
3537 {0, 65280},
3538 },
3539 },
3540 },
3541 {
3542 name: "MOVSDconst",
3543 auxType: auxFloat64,
3544 argLen: 0,
3545 rematerializeable: true,
3546 asm: x86.AMOVSD,
3547 reg: regInfo{
3548 outputs: []outputInfo{
3549 {0, 65280},
3550 },
3551 },
3552 },
3553 {
3554 name: "MOVSSloadidx1",
3555 auxType: auxSymOff,
3556 argLen: 3,
3557 symEffect: SymRead,
3558 asm: x86.AMOVSS,
3559 reg: regInfo{
3560 inputs: []inputInfo{
3561 {1, 255},
3562 {0, 65791},
3563 },
3564 outputs: []outputInfo{
3565 {0, 65280},
3566 },
3567 },
3568 },
3569 {
3570 name: "MOVSSloadidx4",
3571 auxType: auxSymOff,
3572 argLen: 3,
3573 symEffect: SymRead,
3574 asm: x86.AMOVSS,
3575 reg: regInfo{
3576 inputs: []inputInfo{
3577 {1, 255},
3578 {0, 65791},
3579 },
3580 outputs: []outputInfo{
3581 {0, 65280},
3582 },
3583 },
3584 },
3585 {
3586 name: "MOVSDloadidx1",
3587 auxType: auxSymOff,
3588 argLen: 3,
3589 symEffect: SymRead,
3590 asm: x86.AMOVSD,
3591 reg: regInfo{
3592 inputs: []inputInfo{
3593 {1, 255},
3594 {0, 65791},
3595 },
3596 outputs: []outputInfo{
3597 {0, 65280},
3598 },
3599 },
3600 },
3601 {
3602 name: "MOVSDloadidx8",
3603 auxType: auxSymOff,
3604 argLen: 3,
3605 symEffect: SymRead,
3606 asm: x86.AMOVSD,
3607 reg: regInfo{
3608 inputs: []inputInfo{
3609 {1, 255},
3610 {0, 65791},
3611 },
3612 outputs: []outputInfo{
3613 {0, 65280},
3614 },
3615 },
3616 },
3617 {
3618 name: "MOVSSstore",
3619 auxType: auxSymOff,
3620 argLen: 3,
3621 faultOnNilArg0: true,
3622 symEffect: SymWrite,
3623 asm: x86.AMOVSS,
3624 reg: regInfo{
3625 inputs: []inputInfo{
3626 {1, 65280},
3627 {0, 65791},
3628 },
3629 },
3630 },
3631 {
3632 name: "MOVSDstore",
3633 auxType: auxSymOff,
3634 argLen: 3,
3635 faultOnNilArg0: true,
3636 symEffect: SymWrite,
3637 asm: x86.AMOVSD,
3638 reg: regInfo{
3639 inputs: []inputInfo{
3640 {1, 65280},
3641 {0, 65791},
3642 },
3643 },
3644 },
3645 {
3646 name: "MOVSSstoreidx1",
3647 auxType: auxSymOff,
3648 argLen: 4,
3649 symEffect: SymWrite,
3650 asm: x86.AMOVSS,
3651 reg: regInfo{
3652 inputs: []inputInfo{
3653 {1, 255},
3654 {2, 65280},
3655 {0, 65791},
3656 },
3657 },
3658 },
3659 {
3660 name: "MOVSSstoreidx4",
3661 auxType: auxSymOff,
3662 argLen: 4,
3663 symEffect: SymWrite,
3664 asm: x86.AMOVSS,
3665 reg: regInfo{
3666 inputs: []inputInfo{
3667 {1, 255},
3668 {2, 65280},
3669 {0, 65791},
3670 },
3671 },
3672 },
3673 {
3674 name: "MOVSDstoreidx1",
3675 auxType: auxSymOff,
3676 argLen: 4,
3677 symEffect: SymWrite,
3678 asm: x86.AMOVSD,
3679 reg: regInfo{
3680 inputs: []inputInfo{
3681 {1, 255},
3682 {2, 65280},
3683 {0, 65791},
3684 },
3685 },
3686 },
3687 {
3688 name: "MOVSDstoreidx8",
3689 auxType: auxSymOff,
3690 argLen: 4,
3691 symEffect: SymWrite,
3692 asm: x86.AMOVSD,
3693 reg: regInfo{
3694 inputs: []inputInfo{
3695 {1, 255},
3696 {2, 65280},
3697 {0, 65791},
3698 },
3699 },
3700 },
3701 {
3702 name: "ADDSSload",
3703 auxType: auxSymOff,
3704 argLen: 3,
3705 resultInArg0: true,
3706 faultOnNilArg1: true,
3707 symEffect: SymRead,
3708 asm: x86.AADDSS,
3709 reg: regInfo{
3710 inputs: []inputInfo{
3711 {0, 65280},
3712 {1, 65791},
3713 },
3714 outputs: []outputInfo{
3715 {0, 65280},
3716 },
3717 },
3718 },
3719 {
3720 name: "ADDSDload",
3721 auxType: auxSymOff,
3722 argLen: 3,
3723 resultInArg0: true,
3724 faultOnNilArg1: true,
3725 symEffect: SymRead,
3726 asm: x86.AADDSD,
3727 reg: regInfo{
3728 inputs: []inputInfo{
3729 {0, 65280},
3730 {1, 65791},
3731 },
3732 outputs: []outputInfo{
3733 {0, 65280},
3734 },
3735 },
3736 },
3737 {
3738 name: "SUBSSload",
3739 auxType: auxSymOff,
3740 argLen: 3,
3741 resultInArg0: true,
3742 faultOnNilArg1: true,
3743 symEffect: SymRead,
3744 asm: x86.ASUBSS,
3745 reg: regInfo{
3746 inputs: []inputInfo{
3747 {0, 65280},
3748 {1, 65791},
3749 },
3750 outputs: []outputInfo{
3751 {0, 65280},
3752 },
3753 },
3754 },
3755 {
3756 name: "SUBSDload",
3757 auxType: auxSymOff,
3758 argLen: 3,
3759 resultInArg0: true,
3760 faultOnNilArg1: true,
3761 symEffect: SymRead,
3762 asm: x86.ASUBSD,
3763 reg: regInfo{
3764 inputs: []inputInfo{
3765 {0, 65280},
3766 {1, 65791},
3767 },
3768 outputs: []outputInfo{
3769 {0, 65280},
3770 },
3771 },
3772 },
3773 {
3774 name: "MULSSload",
3775 auxType: auxSymOff,
3776 argLen: 3,
3777 resultInArg0: true,
3778 faultOnNilArg1: true,
3779 symEffect: SymRead,
3780 asm: x86.AMULSS,
3781 reg: regInfo{
3782 inputs: []inputInfo{
3783 {0, 65280},
3784 {1, 65791},
3785 },
3786 outputs: []outputInfo{
3787 {0, 65280},
3788 },
3789 },
3790 },
3791 {
3792 name: "MULSDload",
3793 auxType: auxSymOff,
3794 argLen: 3,
3795 resultInArg0: true,
3796 faultOnNilArg1: true,
3797 symEffect: SymRead,
3798 asm: x86.AMULSD,
3799 reg: regInfo{
3800 inputs: []inputInfo{
3801 {0, 65280},
3802 {1, 65791},
3803 },
3804 outputs: []outputInfo{
3805 {0, 65280},
3806 },
3807 },
3808 },
3809 {
3810 name: "DIVSSload",
3811 auxType: auxSymOff,
3812 argLen: 3,
3813 resultInArg0: true,
3814 faultOnNilArg1: true,
3815 symEffect: SymRead,
3816 asm: x86.ADIVSS,
3817 reg: regInfo{
3818 inputs: []inputInfo{
3819 {0, 65280},
3820 {1, 65791},
3821 },
3822 outputs: []outputInfo{
3823 {0, 65280},
3824 },
3825 },
3826 },
3827 {
3828 name: "DIVSDload",
3829 auxType: auxSymOff,
3830 argLen: 3,
3831 resultInArg0: true,
3832 faultOnNilArg1: true,
3833 symEffect: SymRead,
3834 asm: x86.ADIVSD,
3835 reg: regInfo{
3836 inputs: []inputInfo{
3837 {0, 65280},
3838 {1, 65791},
3839 },
3840 outputs: []outputInfo{
3841 {0, 65280},
3842 },
3843 },
3844 },
3845 {
3846 name: "ADDL",
3847 argLen: 2,
3848 commutative: true,
3849 clobberFlags: true,
3850 asm: x86.AADDL,
3851 reg: regInfo{
3852 inputs: []inputInfo{
3853 {1, 239},
3854 {0, 255},
3855 },
3856 outputs: []outputInfo{
3857 {0, 239},
3858 },
3859 },
3860 },
3861 {
3862 name: "ADDLconst",
3863 auxType: auxInt32,
3864 argLen: 1,
3865 clobberFlags: true,
3866 asm: x86.AADDL,
3867 reg: regInfo{
3868 inputs: []inputInfo{
3869 {0, 255},
3870 },
3871 outputs: []outputInfo{
3872 {0, 239},
3873 },
3874 },
3875 },
3876 {
3877 name: "ADDLcarry",
3878 argLen: 2,
3879 commutative: true,
3880 resultInArg0: true,
3881 asm: x86.AADDL,
3882 reg: regInfo{
3883 inputs: []inputInfo{
3884 {0, 239},
3885 {1, 239},
3886 },
3887 outputs: []outputInfo{
3888 {1, 0},
3889 {0, 239},
3890 },
3891 },
3892 },
3893 {
3894 name: "ADDLconstcarry",
3895 auxType: auxInt32,
3896 argLen: 1,
3897 resultInArg0: true,
3898 asm: x86.AADDL,
3899 reg: regInfo{
3900 inputs: []inputInfo{
3901 {0, 239},
3902 },
3903 outputs: []outputInfo{
3904 {1, 0},
3905 {0, 239},
3906 },
3907 },
3908 },
3909 {
3910 name: "ADCL",
3911 argLen: 3,
3912 commutative: true,
3913 resultInArg0: true,
3914 clobberFlags: true,
3915 asm: x86.AADCL,
3916 reg: regInfo{
3917 inputs: []inputInfo{
3918 {0, 239},
3919 {1, 239},
3920 },
3921 outputs: []outputInfo{
3922 {0, 239},
3923 },
3924 },
3925 },
3926 {
3927 name: "ADCLconst",
3928 auxType: auxInt32,
3929 argLen: 2,
3930 resultInArg0: true,
3931 clobberFlags: true,
3932 asm: x86.AADCL,
3933 reg: regInfo{
3934 inputs: []inputInfo{
3935 {0, 239},
3936 },
3937 outputs: []outputInfo{
3938 {0, 239},
3939 },
3940 },
3941 },
3942 {
3943 name: "SUBL",
3944 argLen: 2,
3945 resultInArg0: true,
3946 clobberFlags: true,
3947 asm: x86.ASUBL,
3948 reg: regInfo{
3949 inputs: []inputInfo{
3950 {0, 239},
3951 {1, 239},
3952 },
3953 outputs: []outputInfo{
3954 {0, 239},
3955 },
3956 },
3957 },
3958 {
3959 name: "SUBLconst",
3960 auxType: auxInt32,
3961 argLen: 1,
3962 resultInArg0: true,
3963 clobberFlags: true,
3964 asm: x86.ASUBL,
3965 reg: regInfo{
3966 inputs: []inputInfo{
3967 {0, 239},
3968 },
3969 outputs: []outputInfo{
3970 {0, 239},
3971 },
3972 },
3973 },
3974 {
3975 name: "SUBLcarry",
3976 argLen: 2,
3977 resultInArg0: true,
3978 asm: x86.ASUBL,
3979 reg: regInfo{
3980 inputs: []inputInfo{
3981 {0, 239},
3982 {1, 239},
3983 },
3984 outputs: []outputInfo{
3985 {1, 0},
3986 {0, 239},
3987 },
3988 },
3989 },
3990 {
3991 name: "SUBLconstcarry",
3992 auxType: auxInt32,
3993 argLen: 1,
3994 resultInArg0: true,
3995 asm: x86.ASUBL,
3996 reg: regInfo{
3997 inputs: []inputInfo{
3998 {0, 239},
3999 },
4000 outputs: []outputInfo{
4001 {1, 0},
4002 {0, 239},
4003 },
4004 },
4005 },
4006 {
4007 name: "SBBL",
4008 argLen: 3,
4009 resultInArg0: true,
4010 clobberFlags: true,
4011 asm: x86.ASBBL,
4012 reg: regInfo{
4013 inputs: []inputInfo{
4014 {0, 239},
4015 {1, 239},
4016 },
4017 outputs: []outputInfo{
4018 {0, 239},
4019 },
4020 },
4021 },
4022 {
4023 name: "SBBLconst",
4024 auxType: auxInt32,
4025 argLen: 2,
4026 resultInArg0: true,
4027 clobberFlags: true,
4028 asm: x86.ASBBL,
4029 reg: regInfo{
4030 inputs: []inputInfo{
4031 {0, 239},
4032 },
4033 outputs: []outputInfo{
4034 {0, 239},
4035 },
4036 },
4037 },
4038 {
4039 name: "MULL",
4040 argLen: 2,
4041 commutative: true,
4042 resultInArg0: true,
4043 clobberFlags: true,
4044 asm: x86.AIMULL,
4045 reg: regInfo{
4046 inputs: []inputInfo{
4047 {0, 239},
4048 {1, 239},
4049 },
4050 outputs: []outputInfo{
4051 {0, 239},
4052 },
4053 },
4054 },
4055 {
4056 name: "MULLconst",
4057 auxType: auxInt32,
4058 argLen: 1,
4059 clobberFlags: true,
4060 asm: x86.AIMUL3L,
4061 reg: regInfo{
4062 inputs: []inputInfo{
4063 {0, 239},
4064 },
4065 outputs: []outputInfo{
4066 {0, 239},
4067 },
4068 },
4069 },
4070 {
4071 name: "MULLU",
4072 argLen: 2,
4073 commutative: true,
4074 clobberFlags: true,
4075 asm: x86.AMULL,
4076 reg: regInfo{
4077 inputs: []inputInfo{
4078 {0, 1},
4079 {1, 255},
4080 },
4081 clobbers: 4,
4082 outputs: []outputInfo{
4083 {1, 0},
4084 {0, 1},
4085 },
4086 },
4087 },
4088 {
4089 name: "HMULL",
4090 argLen: 2,
4091 commutative: true,
4092 clobberFlags: true,
4093 asm: x86.AIMULL,
4094 reg: regInfo{
4095 inputs: []inputInfo{
4096 {0, 1},
4097 {1, 255},
4098 },
4099 clobbers: 1,
4100 outputs: []outputInfo{
4101 {0, 4},
4102 },
4103 },
4104 },
4105 {
4106 name: "HMULLU",
4107 argLen: 2,
4108 commutative: true,
4109 clobberFlags: true,
4110 asm: x86.AMULL,
4111 reg: regInfo{
4112 inputs: []inputInfo{
4113 {0, 1},
4114 {1, 255},
4115 },
4116 clobbers: 1,
4117 outputs: []outputInfo{
4118 {0, 4},
4119 },
4120 },
4121 },
4122 {
4123 name: "MULLQU",
4124 argLen: 2,
4125 commutative: true,
4126 clobberFlags: true,
4127 asm: x86.AMULL,
4128 reg: regInfo{
4129 inputs: []inputInfo{
4130 {0, 1},
4131 {1, 255},
4132 },
4133 outputs: []outputInfo{
4134 {0, 4},
4135 {1, 1},
4136 },
4137 },
4138 },
4139 {
4140 name: "AVGLU",
4141 argLen: 2,
4142 commutative: true,
4143 resultInArg0: true,
4144 clobberFlags: true,
4145 reg: regInfo{
4146 inputs: []inputInfo{
4147 {0, 239},
4148 {1, 239},
4149 },
4150 outputs: []outputInfo{
4151 {0, 239},
4152 },
4153 },
4154 },
4155 {
4156 name: "DIVL",
4157 auxType: auxBool,
4158 argLen: 2,
4159 clobberFlags: true,
4160 asm: x86.AIDIVL,
4161 reg: regInfo{
4162 inputs: []inputInfo{
4163 {0, 1},
4164 {1, 251},
4165 },
4166 clobbers: 4,
4167 outputs: []outputInfo{
4168 {0, 1},
4169 },
4170 },
4171 },
4172 {
4173 name: "DIVW",
4174 auxType: auxBool,
4175 argLen: 2,
4176 clobberFlags: true,
4177 asm: x86.AIDIVW,
4178 reg: regInfo{
4179 inputs: []inputInfo{
4180 {0, 1},
4181 {1, 251},
4182 },
4183 clobbers: 4,
4184 outputs: []outputInfo{
4185 {0, 1},
4186 },
4187 },
4188 },
4189 {
4190 name: "DIVLU",
4191 argLen: 2,
4192 clobberFlags: true,
4193 asm: x86.ADIVL,
4194 reg: regInfo{
4195 inputs: []inputInfo{
4196 {0, 1},
4197 {1, 251},
4198 },
4199 clobbers: 4,
4200 outputs: []outputInfo{
4201 {0, 1},
4202 },
4203 },
4204 },
4205 {
4206 name: "DIVWU",
4207 argLen: 2,
4208 clobberFlags: true,
4209 asm: x86.ADIVW,
4210 reg: regInfo{
4211 inputs: []inputInfo{
4212 {0, 1},
4213 {1, 251},
4214 },
4215 clobbers: 4,
4216 outputs: []outputInfo{
4217 {0, 1},
4218 },
4219 },
4220 },
4221 {
4222 name: "MODL",
4223 auxType: auxBool,
4224 argLen: 2,
4225 clobberFlags: true,
4226 asm: x86.AIDIVL,
4227 reg: regInfo{
4228 inputs: []inputInfo{
4229 {0, 1},
4230 {1, 251},
4231 },
4232 clobbers: 1,
4233 outputs: []outputInfo{
4234 {0, 4},
4235 },
4236 },
4237 },
4238 {
4239 name: "MODW",
4240 auxType: auxBool,
4241 argLen: 2,
4242 clobberFlags: true,
4243 asm: x86.AIDIVW,
4244 reg: regInfo{
4245 inputs: []inputInfo{
4246 {0, 1},
4247 {1, 251},
4248 },
4249 clobbers: 1,
4250 outputs: []outputInfo{
4251 {0, 4},
4252 },
4253 },
4254 },
4255 {
4256 name: "MODLU",
4257 argLen: 2,
4258 clobberFlags: true,
4259 asm: x86.ADIVL,
4260 reg: regInfo{
4261 inputs: []inputInfo{
4262 {0, 1},
4263 {1, 251},
4264 },
4265 clobbers: 1,
4266 outputs: []outputInfo{
4267 {0, 4},
4268 },
4269 },
4270 },
4271 {
4272 name: "MODWU",
4273 argLen: 2,
4274 clobberFlags: true,
4275 asm: x86.ADIVW,
4276 reg: regInfo{
4277 inputs: []inputInfo{
4278 {0, 1},
4279 {1, 251},
4280 },
4281 clobbers: 1,
4282 outputs: []outputInfo{
4283 {0, 4},
4284 },
4285 },
4286 },
4287 {
4288 name: "ANDL",
4289 argLen: 2,
4290 commutative: true,
4291 resultInArg0: true,
4292 clobberFlags: true,
4293 asm: x86.AANDL,
4294 reg: regInfo{
4295 inputs: []inputInfo{
4296 {0, 239},
4297 {1, 239},
4298 },
4299 outputs: []outputInfo{
4300 {0, 239},
4301 },
4302 },
4303 },
4304 {
4305 name: "ANDLconst",
4306 auxType: auxInt32,
4307 argLen: 1,
4308 resultInArg0: true,
4309 clobberFlags: true,
4310 asm: x86.AANDL,
4311 reg: regInfo{
4312 inputs: []inputInfo{
4313 {0, 239},
4314 },
4315 outputs: []outputInfo{
4316 {0, 239},
4317 },
4318 },
4319 },
4320 {
4321 name: "ORL",
4322 argLen: 2,
4323 commutative: true,
4324 resultInArg0: true,
4325 clobberFlags: true,
4326 asm: x86.AORL,
4327 reg: regInfo{
4328 inputs: []inputInfo{
4329 {0, 239},
4330 {1, 239},
4331 },
4332 outputs: []outputInfo{
4333 {0, 239},
4334 },
4335 },
4336 },
4337 {
4338 name: "ORLconst",
4339 auxType: auxInt32,
4340 argLen: 1,
4341 resultInArg0: true,
4342 clobberFlags: true,
4343 asm: x86.AORL,
4344 reg: regInfo{
4345 inputs: []inputInfo{
4346 {0, 239},
4347 },
4348 outputs: []outputInfo{
4349 {0, 239},
4350 },
4351 },
4352 },
4353 {
4354 name: "XORL",
4355 argLen: 2,
4356 commutative: true,
4357 resultInArg0: true,
4358 clobberFlags: true,
4359 asm: x86.AXORL,
4360 reg: regInfo{
4361 inputs: []inputInfo{
4362 {0, 239},
4363 {1, 239},
4364 },
4365 outputs: []outputInfo{
4366 {0, 239},
4367 },
4368 },
4369 },
4370 {
4371 name: "XORLconst",
4372 auxType: auxInt32,
4373 argLen: 1,
4374 resultInArg0: true,
4375 clobberFlags: true,
4376 asm: x86.AXORL,
4377 reg: regInfo{
4378 inputs: []inputInfo{
4379 {0, 239},
4380 },
4381 outputs: []outputInfo{
4382 {0, 239},
4383 },
4384 },
4385 },
4386 {
4387 name: "CMPL",
4388 argLen: 2,
4389 asm: x86.ACMPL,
4390 reg: regInfo{
4391 inputs: []inputInfo{
4392 {0, 255},
4393 {1, 255},
4394 },
4395 },
4396 },
4397 {
4398 name: "CMPW",
4399 argLen: 2,
4400 asm: x86.ACMPW,
4401 reg: regInfo{
4402 inputs: []inputInfo{
4403 {0, 255},
4404 {1, 255},
4405 },
4406 },
4407 },
4408 {
4409 name: "CMPB",
4410 argLen: 2,
4411 asm: x86.ACMPB,
4412 reg: regInfo{
4413 inputs: []inputInfo{
4414 {0, 255},
4415 {1, 255},
4416 },
4417 },
4418 },
4419 {
4420 name: "CMPLconst",
4421 auxType: auxInt32,
4422 argLen: 1,
4423 asm: x86.ACMPL,
4424 reg: regInfo{
4425 inputs: []inputInfo{
4426 {0, 255},
4427 },
4428 },
4429 },
4430 {
4431 name: "CMPWconst",
4432 auxType: auxInt16,
4433 argLen: 1,
4434 asm: x86.ACMPW,
4435 reg: regInfo{
4436 inputs: []inputInfo{
4437 {0, 255},
4438 },
4439 },
4440 },
4441 {
4442 name: "CMPBconst",
4443 auxType: auxInt8,
4444 argLen: 1,
4445 asm: x86.ACMPB,
4446 reg: regInfo{
4447 inputs: []inputInfo{
4448 {0, 255},
4449 },
4450 },
4451 },
4452 {
4453 name: "CMPLload",
4454 auxType: auxSymOff,
4455 argLen: 3,
4456 faultOnNilArg0: true,
4457 symEffect: SymRead,
4458 asm: x86.ACMPL,
4459 reg: regInfo{
4460 inputs: []inputInfo{
4461 {1, 255},
4462 {0, 65791},
4463 },
4464 },
4465 },
4466 {
4467 name: "CMPWload",
4468 auxType: auxSymOff,
4469 argLen: 3,
4470 faultOnNilArg0: true,
4471 symEffect: SymRead,
4472 asm: x86.ACMPW,
4473 reg: regInfo{
4474 inputs: []inputInfo{
4475 {1, 255},
4476 {0, 65791},
4477 },
4478 },
4479 },
4480 {
4481 name: "CMPBload",
4482 auxType: auxSymOff,
4483 argLen: 3,
4484 faultOnNilArg0: true,
4485 symEffect: SymRead,
4486 asm: x86.ACMPB,
4487 reg: regInfo{
4488 inputs: []inputInfo{
4489 {1, 255},
4490 {0, 65791},
4491 },
4492 },
4493 },
4494 {
4495 name: "CMPLconstload",
4496 auxType: auxSymValAndOff,
4497 argLen: 2,
4498 faultOnNilArg0: true,
4499 symEffect: SymRead,
4500 asm: x86.ACMPL,
4501 reg: regInfo{
4502 inputs: []inputInfo{
4503 {0, 65791},
4504 },
4505 },
4506 },
4507 {
4508 name: "CMPWconstload",
4509 auxType: auxSymValAndOff,
4510 argLen: 2,
4511 faultOnNilArg0: true,
4512 symEffect: SymRead,
4513 asm: x86.ACMPW,
4514 reg: regInfo{
4515 inputs: []inputInfo{
4516 {0, 65791},
4517 },
4518 },
4519 },
4520 {
4521 name: "CMPBconstload",
4522 auxType: auxSymValAndOff,
4523 argLen: 2,
4524 faultOnNilArg0: true,
4525 symEffect: SymRead,
4526 asm: x86.ACMPB,
4527 reg: regInfo{
4528 inputs: []inputInfo{
4529 {0, 65791},
4530 },
4531 },
4532 },
4533 {
4534 name: "UCOMISS",
4535 argLen: 2,
4536 asm: x86.AUCOMISS,
4537 reg: regInfo{
4538 inputs: []inputInfo{
4539 {0, 65280},
4540 {1, 65280},
4541 },
4542 },
4543 },
4544 {
4545 name: "UCOMISD",
4546 argLen: 2,
4547 asm: x86.AUCOMISD,
4548 reg: regInfo{
4549 inputs: []inputInfo{
4550 {0, 65280},
4551 {1, 65280},
4552 },
4553 },
4554 },
4555 {
4556 name: "TESTL",
4557 argLen: 2,
4558 commutative: true,
4559 asm: x86.ATESTL,
4560 reg: regInfo{
4561 inputs: []inputInfo{
4562 {0, 255},
4563 {1, 255},
4564 },
4565 },
4566 },
4567 {
4568 name: "TESTW",
4569 argLen: 2,
4570 commutative: true,
4571 asm: x86.ATESTW,
4572 reg: regInfo{
4573 inputs: []inputInfo{
4574 {0, 255},
4575 {1, 255},
4576 },
4577 },
4578 },
4579 {
4580 name: "TESTB",
4581 argLen: 2,
4582 commutative: true,
4583 asm: x86.ATESTB,
4584 reg: regInfo{
4585 inputs: []inputInfo{
4586 {0, 255},
4587 {1, 255},
4588 },
4589 },
4590 },
4591 {
4592 name: "TESTLconst",
4593 auxType: auxInt32,
4594 argLen: 1,
4595 asm: x86.ATESTL,
4596 reg: regInfo{
4597 inputs: []inputInfo{
4598 {0, 255},
4599 },
4600 },
4601 },
4602 {
4603 name: "TESTWconst",
4604 auxType: auxInt16,
4605 argLen: 1,
4606 asm: x86.ATESTW,
4607 reg: regInfo{
4608 inputs: []inputInfo{
4609 {0, 255},
4610 },
4611 },
4612 },
4613 {
4614 name: "TESTBconst",
4615 auxType: auxInt8,
4616 argLen: 1,
4617 asm: x86.ATESTB,
4618 reg: regInfo{
4619 inputs: []inputInfo{
4620 {0, 255},
4621 },
4622 },
4623 },
4624 {
4625 name: "SHLL",
4626 argLen: 2,
4627 resultInArg0: true,
4628 clobberFlags: true,
4629 asm: x86.ASHLL,
4630 reg: regInfo{
4631 inputs: []inputInfo{
4632 {1, 2},
4633 {0, 239},
4634 },
4635 outputs: []outputInfo{
4636 {0, 239},
4637 },
4638 },
4639 },
4640 {
4641 name: "SHLLconst",
4642 auxType: auxInt32,
4643 argLen: 1,
4644 resultInArg0: true,
4645 clobberFlags: true,
4646 asm: x86.ASHLL,
4647 reg: regInfo{
4648 inputs: []inputInfo{
4649 {0, 239},
4650 },
4651 outputs: []outputInfo{
4652 {0, 239},
4653 },
4654 },
4655 },
4656 {
4657 name: "SHRL",
4658 argLen: 2,
4659 resultInArg0: true,
4660 clobberFlags: true,
4661 asm: x86.ASHRL,
4662 reg: regInfo{
4663 inputs: []inputInfo{
4664 {1, 2},
4665 {0, 239},
4666 },
4667 outputs: []outputInfo{
4668 {0, 239},
4669 },
4670 },
4671 },
4672 {
4673 name: "SHRW",
4674 argLen: 2,
4675 resultInArg0: true,
4676 clobberFlags: true,
4677 asm: x86.ASHRW,
4678 reg: regInfo{
4679 inputs: []inputInfo{
4680 {1, 2},
4681 {0, 239},
4682 },
4683 outputs: []outputInfo{
4684 {0, 239},
4685 },
4686 },
4687 },
4688 {
4689 name: "SHRB",
4690 argLen: 2,
4691 resultInArg0: true,
4692 clobberFlags: true,
4693 asm: x86.ASHRB,
4694 reg: regInfo{
4695 inputs: []inputInfo{
4696 {1, 2},
4697 {0, 239},
4698 },
4699 outputs: []outputInfo{
4700 {0, 239},
4701 },
4702 },
4703 },
4704 {
4705 name: "SHRLconst",
4706 auxType: auxInt32,
4707 argLen: 1,
4708 resultInArg0: true,
4709 clobberFlags: true,
4710 asm: x86.ASHRL,
4711 reg: regInfo{
4712 inputs: []inputInfo{
4713 {0, 239},
4714 },
4715 outputs: []outputInfo{
4716 {0, 239},
4717 },
4718 },
4719 },
4720 {
4721 name: "SHRWconst",
4722 auxType: auxInt16,
4723 argLen: 1,
4724 resultInArg0: true,
4725 clobberFlags: true,
4726 asm: x86.ASHRW,
4727 reg: regInfo{
4728 inputs: []inputInfo{
4729 {0, 239},
4730 },
4731 outputs: []outputInfo{
4732 {0, 239},
4733 },
4734 },
4735 },
4736 {
4737 name: "SHRBconst",
4738 auxType: auxInt8,
4739 argLen: 1,
4740 resultInArg0: true,
4741 clobberFlags: true,
4742 asm: x86.ASHRB,
4743 reg: regInfo{
4744 inputs: []inputInfo{
4745 {0, 239},
4746 },
4747 outputs: []outputInfo{
4748 {0, 239},
4749 },
4750 },
4751 },
4752 {
4753 name: "SARL",
4754 argLen: 2,
4755 resultInArg0: true,
4756 clobberFlags: true,
4757 asm: x86.ASARL,
4758 reg: regInfo{
4759 inputs: []inputInfo{
4760 {1, 2},
4761 {0, 239},
4762 },
4763 outputs: []outputInfo{
4764 {0, 239},
4765 },
4766 },
4767 },
4768 {
4769 name: "SARW",
4770 argLen: 2,
4771 resultInArg0: true,
4772 clobberFlags: true,
4773 asm: x86.ASARW,
4774 reg: regInfo{
4775 inputs: []inputInfo{
4776 {1, 2},
4777 {0, 239},
4778 },
4779 outputs: []outputInfo{
4780 {0, 239},
4781 },
4782 },
4783 },
4784 {
4785 name: "SARB",
4786 argLen: 2,
4787 resultInArg0: true,
4788 clobberFlags: true,
4789 asm: x86.ASARB,
4790 reg: regInfo{
4791 inputs: []inputInfo{
4792 {1, 2},
4793 {0, 239},
4794 },
4795 outputs: []outputInfo{
4796 {0, 239},
4797 },
4798 },
4799 },
4800 {
4801 name: "SARLconst",
4802 auxType: auxInt32,
4803 argLen: 1,
4804 resultInArg0: true,
4805 clobberFlags: true,
4806 asm: x86.ASARL,
4807 reg: regInfo{
4808 inputs: []inputInfo{
4809 {0, 239},
4810 },
4811 outputs: []outputInfo{
4812 {0, 239},
4813 },
4814 },
4815 },
4816 {
4817 name: "SARWconst",
4818 auxType: auxInt16,
4819 argLen: 1,
4820 resultInArg0: true,
4821 clobberFlags: true,
4822 asm: x86.ASARW,
4823 reg: regInfo{
4824 inputs: []inputInfo{
4825 {0, 239},
4826 },
4827 outputs: []outputInfo{
4828 {0, 239},
4829 },
4830 },
4831 },
4832 {
4833 name: "SARBconst",
4834 auxType: auxInt8,
4835 argLen: 1,
4836 resultInArg0: true,
4837 clobberFlags: true,
4838 asm: x86.ASARB,
4839 reg: regInfo{
4840 inputs: []inputInfo{
4841 {0, 239},
4842 },
4843 outputs: []outputInfo{
4844 {0, 239},
4845 },
4846 },
4847 },
4848 {
4849 name: "ROLL",
4850 argLen: 2,
4851 resultInArg0: true,
4852 clobberFlags: true,
4853 asm: x86.AROLL,
4854 reg: regInfo{
4855 inputs: []inputInfo{
4856 {1, 2},
4857 {0, 239},
4858 },
4859 outputs: []outputInfo{
4860 {0, 239},
4861 },
4862 },
4863 },
4864 {
4865 name: "ROLW",
4866 argLen: 2,
4867 resultInArg0: true,
4868 clobberFlags: true,
4869 asm: x86.AROLW,
4870 reg: regInfo{
4871 inputs: []inputInfo{
4872 {1, 2},
4873 {0, 239},
4874 },
4875 outputs: []outputInfo{
4876 {0, 239},
4877 },
4878 },
4879 },
4880 {
4881 name: "ROLB",
4882 argLen: 2,
4883 resultInArg0: true,
4884 clobberFlags: true,
4885 asm: x86.AROLB,
4886 reg: regInfo{
4887 inputs: []inputInfo{
4888 {1, 2},
4889 {0, 239},
4890 },
4891 outputs: []outputInfo{
4892 {0, 239},
4893 },
4894 },
4895 },
4896 {
4897 name: "ROLLconst",
4898 auxType: auxInt32,
4899 argLen: 1,
4900 resultInArg0: true,
4901 clobberFlags: true,
4902 asm: x86.AROLL,
4903 reg: regInfo{
4904 inputs: []inputInfo{
4905 {0, 239},
4906 },
4907 outputs: []outputInfo{
4908 {0, 239},
4909 },
4910 },
4911 },
4912 {
4913 name: "ROLWconst",
4914 auxType: auxInt16,
4915 argLen: 1,
4916 resultInArg0: true,
4917 clobberFlags: true,
4918 asm: x86.AROLW,
4919 reg: regInfo{
4920 inputs: []inputInfo{
4921 {0, 239},
4922 },
4923 outputs: []outputInfo{
4924 {0, 239},
4925 },
4926 },
4927 },
4928 {
4929 name: "ROLBconst",
4930 auxType: auxInt8,
4931 argLen: 1,
4932 resultInArg0: true,
4933 clobberFlags: true,
4934 asm: x86.AROLB,
4935 reg: regInfo{
4936 inputs: []inputInfo{
4937 {0, 239},
4938 },
4939 outputs: []outputInfo{
4940 {0, 239},
4941 },
4942 },
4943 },
4944 {
4945 name: "ADDLload",
4946 auxType: auxSymOff,
4947 argLen: 3,
4948 resultInArg0: true,
4949 clobberFlags: true,
4950 faultOnNilArg1: true,
4951 symEffect: SymRead,
4952 asm: x86.AADDL,
4953 reg: regInfo{
4954 inputs: []inputInfo{
4955 {0, 239},
4956 {1, 65791},
4957 },
4958 outputs: []outputInfo{
4959 {0, 239},
4960 },
4961 },
4962 },
4963 {
4964 name: "SUBLload",
4965 auxType: auxSymOff,
4966 argLen: 3,
4967 resultInArg0: true,
4968 clobberFlags: true,
4969 faultOnNilArg1: true,
4970 symEffect: SymRead,
4971 asm: x86.ASUBL,
4972 reg: regInfo{
4973 inputs: []inputInfo{
4974 {0, 239},
4975 {1, 65791},
4976 },
4977 outputs: []outputInfo{
4978 {0, 239},
4979 },
4980 },
4981 },
4982 {
4983 name: "MULLload",
4984 auxType: auxSymOff,
4985 argLen: 3,
4986 resultInArg0: true,
4987 clobberFlags: true,
4988 faultOnNilArg1: true,
4989 symEffect: SymRead,
4990 asm: x86.AIMULL,
4991 reg: regInfo{
4992 inputs: []inputInfo{
4993 {0, 239},
4994 {1, 65791},
4995 },
4996 outputs: []outputInfo{
4997 {0, 239},
4998 },
4999 },
5000 },
5001 {
5002 name: "ANDLload",
5003 auxType: auxSymOff,
5004 argLen: 3,
5005 resultInArg0: true,
5006 clobberFlags: true,
5007 faultOnNilArg1: true,
5008 symEffect: SymRead,
5009 asm: x86.AANDL,
5010 reg: regInfo{
5011 inputs: []inputInfo{
5012 {0, 239},
5013 {1, 65791},
5014 },
5015 outputs: []outputInfo{
5016 {0, 239},
5017 },
5018 },
5019 },
5020 {
5021 name: "ORLload",
5022 auxType: auxSymOff,
5023 argLen: 3,
5024 resultInArg0: true,
5025 clobberFlags: true,
5026 faultOnNilArg1: true,
5027 symEffect: SymRead,
5028 asm: x86.AORL,
5029 reg: regInfo{
5030 inputs: []inputInfo{
5031 {0, 239},
5032 {1, 65791},
5033 },
5034 outputs: []outputInfo{
5035 {0, 239},
5036 },
5037 },
5038 },
5039 {
5040 name: "XORLload",
5041 auxType: auxSymOff,
5042 argLen: 3,
5043 resultInArg0: true,
5044 clobberFlags: true,
5045 faultOnNilArg1: true,
5046 symEffect: SymRead,
5047 asm: x86.AXORL,
5048 reg: regInfo{
5049 inputs: []inputInfo{
5050 {0, 239},
5051 {1, 65791},
5052 },
5053 outputs: []outputInfo{
5054 {0, 239},
5055 },
5056 },
5057 },
5058 {
5059 name: "ADDLloadidx4",
5060 auxType: auxSymOff,
5061 argLen: 4,
5062 resultInArg0: true,
5063 clobberFlags: true,
5064 symEffect: SymRead,
5065 asm: x86.AADDL,
5066 reg: regInfo{
5067 inputs: []inputInfo{
5068 {0, 239},
5069 {2, 255},
5070 {1, 65791},
5071 },
5072 outputs: []outputInfo{
5073 {0, 239},
5074 },
5075 },
5076 },
5077 {
5078 name: "SUBLloadidx4",
5079 auxType: auxSymOff,
5080 argLen: 4,
5081 resultInArg0: true,
5082 clobberFlags: true,
5083 symEffect: SymRead,
5084 asm: x86.ASUBL,
5085 reg: regInfo{
5086 inputs: []inputInfo{
5087 {0, 239},
5088 {2, 255},
5089 {1, 65791},
5090 },
5091 outputs: []outputInfo{
5092 {0, 239},
5093 },
5094 },
5095 },
5096 {
5097 name: "MULLloadidx4",
5098 auxType: auxSymOff,
5099 argLen: 4,
5100 resultInArg0: true,
5101 clobberFlags: true,
5102 symEffect: SymRead,
5103 asm: x86.AIMULL,
5104 reg: regInfo{
5105 inputs: []inputInfo{
5106 {0, 239},
5107 {2, 255},
5108 {1, 65791},
5109 },
5110 outputs: []outputInfo{
5111 {0, 239},
5112 },
5113 },
5114 },
5115 {
5116 name: "ANDLloadidx4",
5117 auxType: auxSymOff,
5118 argLen: 4,
5119 resultInArg0: true,
5120 clobberFlags: true,
5121 symEffect: SymRead,
5122 asm: x86.AANDL,
5123 reg: regInfo{
5124 inputs: []inputInfo{
5125 {0, 239},
5126 {2, 255},
5127 {1, 65791},
5128 },
5129 outputs: []outputInfo{
5130 {0, 239},
5131 },
5132 },
5133 },
5134 {
5135 name: "ORLloadidx4",
5136 auxType: auxSymOff,
5137 argLen: 4,
5138 resultInArg0: true,
5139 clobberFlags: true,
5140 symEffect: SymRead,
5141 asm: x86.AORL,
5142 reg: regInfo{
5143 inputs: []inputInfo{
5144 {0, 239},
5145 {2, 255},
5146 {1, 65791},
5147 },
5148 outputs: []outputInfo{
5149 {0, 239},
5150 },
5151 },
5152 },
5153 {
5154 name: "XORLloadidx4",
5155 auxType: auxSymOff,
5156 argLen: 4,
5157 resultInArg0: true,
5158 clobberFlags: true,
5159 symEffect: SymRead,
5160 asm: x86.AXORL,
5161 reg: regInfo{
5162 inputs: []inputInfo{
5163 {0, 239},
5164 {2, 255},
5165 {1, 65791},
5166 },
5167 outputs: []outputInfo{
5168 {0, 239},
5169 },
5170 },
5171 },
5172 {
5173 name: "NEGL",
5174 argLen: 1,
5175 resultInArg0: true,
5176 clobberFlags: true,
5177 asm: x86.ANEGL,
5178 reg: regInfo{
5179 inputs: []inputInfo{
5180 {0, 239},
5181 },
5182 outputs: []outputInfo{
5183 {0, 239},
5184 },
5185 },
5186 },
5187 {
5188 name: "NOTL",
5189 argLen: 1,
5190 resultInArg0: true,
5191 asm: x86.ANOTL,
5192 reg: regInfo{
5193 inputs: []inputInfo{
5194 {0, 239},
5195 },
5196 outputs: []outputInfo{
5197 {0, 239},
5198 },
5199 },
5200 },
5201 {
5202 name: "BSFL",
5203 argLen: 1,
5204 clobberFlags: true,
5205 asm: x86.ABSFL,
5206 reg: regInfo{
5207 inputs: []inputInfo{
5208 {0, 239},
5209 },
5210 outputs: []outputInfo{
5211 {0, 239},
5212 },
5213 },
5214 },
5215 {
5216 name: "BSFW",
5217 argLen: 1,
5218 clobberFlags: true,
5219 asm: x86.ABSFW,
5220 reg: regInfo{
5221 inputs: []inputInfo{
5222 {0, 239},
5223 },
5224 outputs: []outputInfo{
5225 {0, 239},
5226 },
5227 },
5228 },
5229 {
5230 name: "LoweredCtz32",
5231 argLen: 1,
5232 clobberFlags: true,
5233 reg: regInfo{
5234 inputs: []inputInfo{
5235 {0, 239},
5236 },
5237 outputs: []outputInfo{
5238 {0, 239},
5239 },
5240 },
5241 },
5242 {
5243 name: "LoweredCtz64",
5244 argLen: 2,
5245 resultNotInArgs: true,
5246 clobberFlags: true,
5247 reg: regInfo{
5248 inputs: []inputInfo{
5249 {0, 239},
5250 {1, 239},
5251 },
5252 outputs: []outputInfo{
5253 {0, 239},
5254 },
5255 },
5256 },
5257 {
5258 name: "BSRL",
5259 argLen: 1,
5260 clobberFlags: true,
5261 asm: x86.ABSRL,
5262 reg: regInfo{
5263 inputs: []inputInfo{
5264 {0, 239},
5265 },
5266 outputs: []outputInfo{
5267 {0, 239},
5268 },
5269 },
5270 },
5271 {
5272 name: "BSRW",
5273 argLen: 1,
5274 clobberFlags: true,
5275 asm: x86.ABSRW,
5276 reg: regInfo{
5277 inputs: []inputInfo{
5278 {0, 239},
5279 },
5280 outputs: []outputInfo{
5281 {0, 239},
5282 },
5283 },
5284 },
5285 {
5286 name: "BSWAPL",
5287 argLen: 1,
5288 resultInArg0: true,
5289 asm: x86.ABSWAPL,
5290 reg: regInfo{
5291 inputs: []inputInfo{
5292 {0, 239},
5293 },
5294 outputs: []outputInfo{
5295 {0, 239},
5296 },
5297 },
5298 },
5299 {
5300 name: "SQRTSD",
5301 argLen: 1,
5302 asm: x86.ASQRTSD,
5303 reg: regInfo{
5304 inputs: []inputInfo{
5305 {0, 65280},
5306 },
5307 outputs: []outputInfo{
5308 {0, 65280},
5309 },
5310 },
5311 },
5312 {
5313 name: "SQRTSS",
5314 argLen: 1,
5315 asm: x86.ASQRTSS,
5316 reg: regInfo{
5317 inputs: []inputInfo{
5318 {0, 65280},
5319 },
5320 outputs: []outputInfo{
5321 {0, 65280},
5322 },
5323 },
5324 },
5325 {
5326 name: "SBBLcarrymask",
5327 argLen: 1,
5328 asm: x86.ASBBL,
5329 reg: regInfo{
5330 outputs: []outputInfo{
5331 {0, 239},
5332 },
5333 },
5334 },
5335 {
5336 name: "SETEQ",
5337 argLen: 1,
5338 asm: x86.ASETEQ,
5339 reg: regInfo{
5340 outputs: []outputInfo{
5341 {0, 239},
5342 },
5343 },
5344 },
5345 {
5346 name: "SETNE",
5347 argLen: 1,
5348 asm: x86.ASETNE,
5349 reg: regInfo{
5350 outputs: []outputInfo{
5351 {0, 239},
5352 },
5353 },
5354 },
5355 {
5356 name: "SETL",
5357 argLen: 1,
5358 asm: x86.ASETLT,
5359 reg: regInfo{
5360 outputs: []outputInfo{
5361 {0, 239},
5362 },
5363 },
5364 },
5365 {
5366 name: "SETLE",
5367 argLen: 1,
5368 asm: x86.ASETLE,
5369 reg: regInfo{
5370 outputs: []outputInfo{
5371 {0, 239},
5372 },
5373 },
5374 },
5375 {
5376 name: "SETG",
5377 argLen: 1,
5378 asm: x86.ASETGT,
5379 reg: regInfo{
5380 outputs: []outputInfo{
5381 {0, 239},
5382 },
5383 },
5384 },
5385 {
5386 name: "SETGE",
5387 argLen: 1,
5388 asm: x86.ASETGE,
5389 reg: regInfo{
5390 outputs: []outputInfo{
5391 {0, 239},
5392 },
5393 },
5394 },
5395 {
5396 name: "SETB",
5397 argLen: 1,
5398 asm: x86.ASETCS,
5399 reg: regInfo{
5400 outputs: []outputInfo{
5401 {0, 239},
5402 },
5403 },
5404 },
5405 {
5406 name: "SETBE",
5407 argLen: 1,
5408 asm: x86.ASETLS,
5409 reg: regInfo{
5410 outputs: []outputInfo{
5411 {0, 239},
5412 },
5413 },
5414 },
5415 {
5416 name: "SETA",
5417 argLen: 1,
5418 asm: x86.ASETHI,
5419 reg: regInfo{
5420 outputs: []outputInfo{
5421 {0, 239},
5422 },
5423 },
5424 },
5425 {
5426 name: "SETAE",
5427 argLen: 1,
5428 asm: x86.ASETCC,
5429 reg: regInfo{
5430 outputs: []outputInfo{
5431 {0, 239},
5432 },
5433 },
5434 },
5435 {
5436 name: "SETO",
5437 argLen: 1,
5438 asm: x86.ASETOS,
5439 reg: regInfo{
5440 outputs: []outputInfo{
5441 {0, 239},
5442 },
5443 },
5444 },
5445 {
5446 name: "SETEQF",
5447 argLen: 1,
5448 clobberFlags: true,
5449 asm: x86.ASETEQ,
5450 reg: regInfo{
5451 clobbers: 1,
5452 outputs: []outputInfo{
5453 {0, 238},
5454 },
5455 },
5456 },
5457 {
5458 name: "SETNEF",
5459 argLen: 1,
5460 clobberFlags: true,
5461 asm: x86.ASETNE,
5462 reg: regInfo{
5463 clobbers: 1,
5464 outputs: []outputInfo{
5465 {0, 238},
5466 },
5467 },
5468 },
5469 {
5470 name: "SETORD",
5471 argLen: 1,
5472 asm: x86.ASETPC,
5473 reg: regInfo{
5474 outputs: []outputInfo{
5475 {0, 239},
5476 },
5477 },
5478 },
5479 {
5480 name: "SETNAN",
5481 argLen: 1,
5482 asm: x86.ASETPS,
5483 reg: regInfo{
5484 outputs: []outputInfo{
5485 {0, 239},
5486 },
5487 },
5488 },
5489 {
5490 name: "SETGF",
5491 argLen: 1,
5492 asm: x86.ASETHI,
5493 reg: regInfo{
5494 outputs: []outputInfo{
5495 {0, 239},
5496 },
5497 },
5498 },
5499 {
5500 name: "SETGEF",
5501 argLen: 1,
5502 asm: x86.ASETCC,
5503 reg: regInfo{
5504 outputs: []outputInfo{
5505 {0, 239},
5506 },
5507 },
5508 },
5509 {
5510 name: "MOVBLSX",
5511 argLen: 1,
5512 asm: x86.AMOVBLSX,
5513 reg: regInfo{
5514 inputs: []inputInfo{
5515 {0, 239},
5516 },
5517 outputs: []outputInfo{
5518 {0, 239},
5519 },
5520 },
5521 },
5522 {
5523 name: "MOVBLZX",
5524 argLen: 1,
5525 asm: x86.AMOVBLZX,
5526 reg: regInfo{
5527 inputs: []inputInfo{
5528 {0, 239},
5529 },
5530 outputs: []outputInfo{
5531 {0, 239},
5532 },
5533 },
5534 },
5535 {
5536 name: "MOVWLSX",
5537 argLen: 1,
5538 asm: x86.AMOVWLSX,
5539 reg: regInfo{
5540 inputs: []inputInfo{
5541 {0, 239},
5542 },
5543 outputs: []outputInfo{
5544 {0, 239},
5545 },
5546 },
5547 },
5548 {
5549 name: "MOVWLZX",
5550 argLen: 1,
5551 asm: x86.AMOVWLZX,
5552 reg: regInfo{
5553 inputs: []inputInfo{
5554 {0, 239},
5555 },
5556 outputs: []outputInfo{
5557 {0, 239},
5558 },
5559 },
5560 },
5561 {
5562 name: "MOVLconst",
5563 auxType: auxInt32,
5564 argLen: 0,
5565 rematerializeable: true,
5566 asm: x86.AMOVL,
5567 reg: regInfo{
5568 outputs: []outputInfo{
5569 {0, 239},
5570 },
5571 },
5572 },
5573 {
5574 name: "CVTTSD2SL",
5575 argLen: 1,
5576 asm: x86.ACVTTSD2SL,
5577 reg: regInfo{
5578 inputs: []inputInfo{
5579 {0, 65280},
5580 },
5581 outputs: []outputInfo{
5582 {0, 239},
5583 },
5584 },
5585 },
5586 {
5587 name: "CVTTSS2SL",
5588 argLen: 1,
5589 asm: x86.ACVTTSS2SL,
5590 reg: regInfo{
5591 inputs: []inputInfo{
5592 {0, 65280},
5593 },
5594 outputs: []outputInfo{
5595 {0, 239},
5596 },
5597 },
5598 },
5599 {
5600 name: "CVTSL2SS",
5601 argLen: 1,
5602 asm: x86.ACVTSL2SS,
5603 reg: regInfo{
5604 inputs: []inputInfo{
5605 {0, 239},
5606 },
5607 outputs: []outputInfo{
5608 {0, 65280},
5609 },
5610 },
5611 },
5612 {
5613 name: "CVTSL2SD",
5614 argLen: 1,
5615 asm: x86.ACVTSL2SD,
5616 reg: regInfo{
5617 inputs: []inputInfo{
5618 {0, 239},
5619 },
5620 outputs: []outputInfo{
5621 {0, 65280},
5622 },
5623 },
5624 },
5625 {
5626 name: "CVTSD2SS",
5627 argLen: 1,
5628 asm: x86.ACVTSD2SS,
5629 reg: regInfo{
5630 inputs: []inputInfo{
5631 {0, 65280},
5632 },
5633 outputs: []outputInfo{
5634 {0, 65280},
5635 },
5636 },
5637 },
5638 {
5639 name: "CVTSS2SD",
5640 argLen: 1,
5641 asm: x86.ACVTSS2SD,
5642 reg: regInfo{
5643 inputs: []inputInfo{
5644 {0, 65280},
5645 },
5646 outputs: []outputInfo{
5647 {0, 65280},
5648 },
5649 },
5650 },
5651 {
5652 name: "PXOR",
5653 argLen: 2,
5654 commutative: true,
5655 resultInArg0: true,
5656 asm: x86.APXOR,
5657 reg: regInfo{
5658 inputs: []inputInfo{
5659 {0, 65280},
5660 {1, 65280},
5661 },
5662 outputs: []outputInfo{
5663 {0, 65280},
5664 },
5665 },
5666 },
5667 {
5668 name: "LEAL",
5669 auxType: auxSymOff,
5670 argLen: 1,
5671 rematerializeable: true,
5672 symEffect: SymAddr,
5673 reg: regInfo{
5674 inputs: []inputInfo{
5675 {0, 65791},
5676 },
5677 outputs: []outputInfo{
5678 {0, 239},
5679 },
5680 },
5681 },
5682 {
5683 name: "LEAL1",
5684 auxType: auxSymOff,
5685 argLen: 2,
5686 commutative: true,
5687 symEffect: SymAddr,
5688 reg: regInfo{
5689 inputs: []inputInfo{
5690 {1, 255},
5691 {0, 65791},
5692 },
5693 outputs: []outputInfo{
5694 {0, 239},
5695 },
5696 },
5697 },
5698 {
5699 name: "LEAL2",
5700 auxType: auxSymOff,
5701 argLen: 2,
5702 symEffect: SymAddr,
5703 reg: regInfo{
5704 inputs: []inputInfo{
5705 {1, 255},
5706 {0, 65791},
5707 },
5708 outputs: []outputInfo{
5709 {0, 239},
5710 },
5711 },
5712 },
5713 {
5714 name: "LEAL4",
5715 auxType: auxSymOff,
5716 argLen: 2,
5717 symEffect: SymAddr,
5718 reg: regInfo{
5719 inputs: []inputInfo{
5720 {1, 255},
5721 {0, 65791},
5722 },
5723 outputs: []outputInfo{
5724 {0, 239},
5725 },
5726 },
5727 },
5728 {
5729 name: "LEAL8",
5730 auxType: auxSymOff,
5731 argLen: 2,
5732 symEffect: SymAddr,
5733 reg: regInfo{
5734 inputs: []inputInfo{
5735 {1, 255},
5736 {0, 65791},
5737 },
5738 outputs: []outputInfo{
5739 {0, 239},
5740 },
5741 },
5742 },
5743 {
5744 name: "MOVBload",
5745 auxType: auxSymOff,
5746 argLen: 2,
5747 faultOnNilArg0: true,
5748 symEffect: SymRead,
5749 asm: x86.AMOVBLZX,
5750 reg: regInfo{
5751 inputs: []inputInfo{
5752 {0, 65791},
5753 },
5754 outputs: []outputInfo{
5755 {0, 239},
5756 },
5757 },
5758 },
5759 {
5760 name: "MOVBLSXload",
5761 auxType: auxSymOff,
5762 argLen: 2,
5763 faultOnNilArg0: true,
5764 symEffect: SymRead,
5765 asm: x86.AMOVBLSX,
5766 reg: regInfo{
5767 inputs: []inputInfo{
5768 {0, 65791},
5769 },
5770 outputs: []outputInfo{
5771 {0, 239},
5772 },
5773 },
5774 },
5775 {
5776 name: "MOVWload",
5777 auxType: auxSymOff,
5778 argLen: 2,
5779 faultOnNilArg0: true,
5780 symEffect: SymRead,
5781 asm: x86.AMOVWLZX,
5782 reg: regInfo{
5783 inputs: []inputInfo{
5784 {0, 65791},
5785 },
5786 outputs: []outputInfo{
5787 {0, 239},
5788 },
5789 },
5790 },
5791 {
5792 name: "MOVWLSXload",
5793 auxType: auxSymOff,
5794 argLen: 2,
5795 faultOnNilArg0: true,
5796 symEffect: SymRead,
5797 asm: x86.AMOVWLSX,
5798 reg: regInfo{
5799 inputs: []inputInfo{
5800 {0, 65791},
5801 },
5802 outputs: []outputInfo{
5803 {0, 239},
5804 },
5805 },
5806 },
5807 {
5808 name: "MOVLload",
5809 auxType: auxSymOff,
5810 argLen: 2,
5811 faultOnNilArg0: true,
5812 symEffect: SymRead,
5813 asm: x86.AMOVL,
5814 reg: regInfo{
5815 inputs: []inputInfo{
5816 {0, 65791},
5817 },
5818 outputs: []outputInfo{
5819 {0, 239},
5820 },
5821 },
5822 },
5823 {
5824 name: "MOVBstore",
5825 auxType: auxSymOff,
5826 argLen: 3,
5827 faultOnNilArg0: true,
5828 symEffect: SymWrite,
5829 asm: x86.AMOVB,
5830 reg: regInfo{
5831 inputs: []inputInfo{
5832 {1, 255},
5833 {0, 65791},
5834 },
5835 },
5836 },
5837 {
5838 name: "MOVWstore",
5839 auxType: auxSymOff,
5840 argLen: 3,
5841 faultOnNilArg0: true,
5842 symEffect: SymWrite,
5843 asm: x86.AMOVW,
5844 reg: regInfo{
5845 inputs: []inputInfo{
5846 {1, 255},
5847 {0, 65791},
5848 },
5849 },
5850 },
5851 {
5852 name: "MOVLstore",
5853 auxType: auxSymOff,
5854 argLen: 3,
5855 faultOnNilArg0: true,
5856 symEffect: SymWrite,
5857 asm: x86.AMOVL,
5858 reg: regInfo{
5859 inputs: []inputInfo{
5860 {1, 255},
5861 {0, 65791},
5862 },
5863 },
5864 },
5865 {
5866 name: "ADDLmodify",
5867 auxType: auxSymOff,
5868 argLen: 3,
5869 clobberFlags: true,
5870 faultOnNilArg0: true,
5871 symEffect: SymRead | SymWrite,
5872 asm: x86.AADDL,
5873 reg: regInfo{
5874 inputs: []inputInfo{
5875 {1, 255},
5876 {0, 65791},
5877 },
5878 },
5879 },
5880 {
5881 name: "SUBLmodify",
5882 auxType: auxSymOff,
5883 argLen: 3,
5884 clobberFlags: true,
5885 faultOnNilArg0: true,
5886 symEffect: SymRead | SymWrite,
5887 asm: x86.ASUBL,
5888 reg: regInfo{
5889 inputs: []inputInfo{
5890 {1, 255},
5891 {0, 65791},
5892 },
5893 },
5894 },
5895 {
5896 name: "ANDLmodify",
5897 auxType: auxSymOff,
5898 argLen: 3,
5899 clobberFlags: true,
5900 faultOnNilArg0: true,
5901 symEffect: SymRead | SymWrite,
5902 asm: x86.AANDL,
5903 reg: regInfo{
5904 inputs: []inputInfo{
5905 {1, 255},
5906 {0, 65791},
5907 },
5908 },
5909 },
5910 {
5911 name: "ORLmodify",
5912 auxType: auxSymOff,
5913 argLen: 3,
5914 clobberFlags: true,
5915 faultOnNilArg0: true,
5916 symEffect: SymRead | SymWrite,
5917 asm: x86.AORL,
5918 reg: regInfo{
5919 inputs: []inputInfo{
5920 {1, 255},
5921 {0, 65791},
5922 },
5923 },
5924 },
5925 {
5926 name: "XORLmodify",
5927 auxType: auxSymOff,
5928 argLen: 3,
5929 clobberFlags: true,
5930 faultOnNilArg0: true,
5931 symEffect: SymRead | SymWrite,
5932 asm: x86.AXORL,
5933 reg: regInfo{
5934 inputs: []inputInfo{
5935 {1, 255},
5936 {0, 65791},
5937 },
5938 },
5939 },
5940 {
5941 name: "ADDLmodifyidx4",
5942 auxType: auxSymOff,
5943 argLen: 4,
5944 clobberFlags: true,
5945 symEffect: SymRead | SymWrite,
5946 asm: x86.AADDL,
5947 reg: regInfo{
5948 inputs: []inputInfo{
5949 {1, 255},
5950 {2, 255},
5951 {0, 65791},
5952 },
5953 },
5954 },
5955 {
5956 name: "SUBLmodifyidx4",
5957 auxType: auxSymOff,
5958 argLen: 4,
5959 clobberFlags: true,
5960 symEffect: SymRead | SymWrite,
5961 asm: x86.ASUBL,
5962 reg: regInfo{
5963 inputs: []inputInfo{
5964 {1, 255},
5965 {2, 255},
5966 {0, 65791},
5967 },
5968 },
5969 },
5970 {
5971 name: "ANDLmodifyidx4",
5972 auxType: auxSymOff,
5973 argLen: 4,
5974 clobberFlags: true,
5975 symEffect: SymRead | SymWrite,
5976 asm: x86.AANDL,
5977 reg: regInfo{
5978 inputs: []inputInfo{
5979 {1, 255},
5980 {2, 255},
5981 {0, 65791},
5982 },
5983 },
5984 },
5985 {
5986 name: "ORLmodifyidx4",
5987 auxType: auxSymOff,
5988 argLen: 4,
5989 clobberFlags: true,
5990 symEffect: SymRead | SymWrite,
5991 asm: x86.AORL,
5992 reg: regInfo{
5993 inputs: []inputInfo{
5994 {1, 255},
5995 {2, 255},
5996 {0, 65791},
5997 },
5998 },
5999 },
6000 {
6001 name: "XORLmodifyidx4",
6002 auxType: auxSymOff,
6003 argLen: 4,
6004 clobberFlags: true,
6005 symEffect: SymRead | SymWrite,
6006 asm: x86.AXORL,
6007 reg: regInfo{
6008 inputs: []inputInfo{
6009 {1, 255},
6010 {2, 255},
6011 {0, 65791},
6012 },
6013 },
6014 },
6015 {
6016 name: "ADDLconstmodify",
6017 auxType: auxSymValAndOff,
6018 argLen: 2,
6019 clobberFlags: true,
6020 faultOnNilArg0: true,
6021 symEffect: SymRead | SymWrite,
6022 asm: x86.AADDL,
6023 reg: regInfo{
6024 inputs: []inputInfo{
6025 {0, 65791},
6026 },
6027 },
6028 },
6029 {
6030 name: "ANDLconstmodify",
6031 auxType: auxSymValAndOff,
6032 argLen: 2,
6033 clobberFlags: true,
6034 faultOnNilArg0: true,
6035 symEffect: SymRead | SymWrite,
6036 asm: x86.AANDL,
6037 reg: regInfo{
6038 inputs: []inputInfo{
6039 {0, 65791},
6040 },
6041 },
6042 },
6043 {
6044 name: "ORLconstmodify",
6045 auxType: auxSymValAndOff,
6046 argLen: 2,
6047 clobberFlags: true,
6048 faultOnNilArg0: true,
6049 symEffect: SymRead | SymWrite,
6050 asm: x86.AORL,
6051 reg: regInfo{
6052 inputs: []inputInfo{
6053 {0, 65791},
6054 },
6055 },
6056 },
6057 {
6058 name: "XORLconstmodify",
6059 auxType: auxSymValAndOff,
6060 argLen: 2,
6061 clobberFlags: true,
6062 faultOnNilArg0: true,
6063 symEffect: SymRead | SymWrite,
6064 asm: x86.AXORL,
6065 reg: regInfo{
6066 inputs: []inputInfo{
6067 {0, 65791},
6068 },
6069 },
6070 },
6071 {
6072 name: "ADDLconstmodifyidx4",
6073 auxType: auxSymValAndOff,
6074 argLen: 3,
6075 clobberFlags: true,
6076 symEffect: SymRead | SymWrite,
6077 asm: x86.AADDL,
6078 reg: regInfo{
6079 inputs: []inputInfo{
6080 {1, 255},
6081 {0, 65791},
6082 },
6083 },
6084 },
6085 {
6086 name: "ANDLconstmodifyidx4",
6087 auxType: auxSymValAndOff,
6088 argLen: 3,
6089 clobberFlags: true,
6090 symEffect: SymRead | SymWrite,
6091 asm: x86.AANDL,
6092 reg: regInfo{
6093 inputs: []inputInfo{
6094 {1, 255},
6095 {0, 65791},
6096 },
6097 },
6098 },
6099 {
6100 name: "ORLconstmodifyidx4",
6101 auxType: auxSymValAndOff,
6102 argLen: 3,
6103 clobberFlags: true,
6104 symEffect: SymRead | SymWrite,
6105 asm: x86.AORL,
6106 reg: regInfo{
6107 inputs: []inputInfo{
6108 {1, 255},
6109 {0, 65791},
6110 },
6111 },
6112 },
6113 {
6114 name: "XORLconstmodifyidx4",
6115 auxType: auxSymValAndOff,
6116 argLen: 3,
6117 clobberFlags: true,
6118 symEffect: SymRead | SymWrite,
6119 asm: x86.AXORL,
6120 reg: regInfo{
6121 inputs: []inputInfo{
6122 {1, 255},
6123 {0, 65791},
6124 },
6125 },
6126 },
6127 {
6128 name: "MOVBloadidx1",
6129 auxType: auxSymOff,
6130 argLen: 3,
6131 commutative: true,
6132 symEffect: SymRead,
6133 asm: x86.AMOVBLZX,
6134 reg: regInfo{
6135 inputs: []inputInfo{
6136 {1, 255},
6137 {0, 65791},
6138 },
6139 outputs: []outputInfo{
6140 {0, 239},
6141 },
6142 },
6143 },
6144 {
6145 name: "MOVWloadidx1",
6146 auxType: auxSymOff,
6147 argLen: 3,
6148 commutative: true,
6149 symEffect: SymRead,
6150 asm: x86.AMOVWLZX,
6151 reg: regInfo{
6152 inputs: []inputInfo{
6153 {1, 255},
6154 {0, 65791},
6155 },
6156 outputs: []outputInfo{
6157 {0, 239},
6158 },
6159 },
6160 },
6161 {
6162 name: "MOVWloadidx2",
6163 auxType: auxSymOff,
6164 argLen: 3,
6165 symEffect: SymRead,
6166 asm: x86.AMOVWLZX,
6167 reg: regInfo{
6168 inputs: []inputInfo{
6169 {1, 255},
6170 {0, 65791},
6171 },
6172 outputs: []outputInfo{
6173 {0, 239},
6174 },
6175 },
6176 },
6177 {
6178 name: "MOVLloadidx1",
6179 auxType: auxSymOff,
6180 argLen: 3,
6181 commutative: true,
6182 symEffect: SymRead,
6183 asm: x86.AMOVL,
6184 reg: regInfo{
6185 inputs: []inputInfo{
6186 {1, 255},
6187 {0, 65791},
6188 },
6189 outputs: []outputInfo{
6190 {0, 239},
6191 },
6192 },
6193 },
6194 {
6195 name: "MOVLloadidx4",
6196 auxType: auxSymOff,
6197 argLen: 3,
6198 symEffect: SymRead,
6199 asm: x86.AMOVL,
6200 reg: regInfo{
6201 inputs: []inputInfo{
6202 {1, 255},
6203 {0, 65791},
6204 },
6205 outputs: []outputInfo{
6206 {0, 239},
6207 },
6208 },
6209 },
6210 {
6211 name: "MOVBstoreidx1",
6212 auxType: auxSymOff,
6213 argLen: 4,
6214 commutative: true,
6215 symEffect: SymWrite,
6216 asm: x86.AMOVB,
6217 reg: regInfo{
6218 inputs: []inputInfo{
6219 {1, 255},
6220 {2, 255},
6221 {0, 65791},
6222 },
6223 },
6224 },
6225 {
6226 name: "MOVWstoreidx1",
6227 auxType: auxSymOff,
6228 argLen: 4,
6229 commutative: true,
6230 symEffect: SymWrite,
6231 asm: x86.AMOVW,
6232 reg: regInfo{
6233 inputs: []inputInfo{
6234 {1, 255},
6235 {2, 255},
6236 {0, 65791},
6237 },
6238 },
6239 },
6240 {
6241 name: "MOVWstoreidx2",
6242 auxType: auxSymOff,
6243 argLen: 4,
6244 symEffect: SymWrite,
6245 asm: x86.AMOVW,
6246 reg: regInfo{
6247 inputs: []inputInfo{
6248 {1, 255},
6249 {2, 255},
6250 {0, 65791},
6251 },
6252 },
6253 },
6254 {
6255 name: "MOVLstoreidx1",
6256 auxType: auxSymOff,
6257 argLen: 4,
6258 commutative: true,
6259 symEffect: SymWrite,
6260 asm: x86.AMOVL,
6261 reg: regInfo{
6262 inputs: []inputInfo{
6263 {1, 255},
6264 {2, 255},
6265 {0, 65791},
6266 },
6267 },
6268 },
6269 {
6270 name: "MOVLstoreidx4",
6271 auxType: auxSymOff,
6272 argLen: 4,
6273 symEffect: SymWrite,
6274 asm: x86.AMOVL,
6275 reg: regInfo{
6276 inputs: []inputInfo{
6277 {1, 255},
6278 {2, 255},
6279 {0, 65791},
6280 },
6281 },
6282 },
6283 {
6284 name: "MOVBstoreconst",
6285 auxType: auxSymValAndOff,
6286 argLen: 2,
6287 faultOnNilArg0: true,
6288 symEffect: SymWrite,
6289 asm: x86.AMOVB,
6290 reg: regInfo{
6291 inputs: []inputInfo{
6292 {0, 65791},
6293 },
6294 },
6295 },
6296 {
6297 name: "MOVWstoreconst",
6298 auxType: auxSymValAndOff,
6299 argLen: 2,
6300 faultOnNilArg0: true,
6301 symEffect: SymWrite,
6302 asm: x86.AMOVW,
6303 reg: regInfo{
6304 inputs: []inputInfo{
6305 {0, 65791},
6306 },
6307 },
6308 },
6309 {
6310 name: "MOVLstoreconst",
6311 auxType: auxSymValAndOff,
6312 argLen: 2,
6313 faultOnNilArg0: true,
6314 symEffect: SymWrite,
6315 asm: x86.AMOVL,
6316 reg: regInfo{
6317 inputs: []inputInfo{
6318 {0, 65791},
6319 },
6320 },
6321 },
6322 {
6323 name: "MOVBstoreconstidx1",
6324 auxType: auxSymValAndOff,
6325 argLen: 3,
6326 symEffect: SymWrite,
6327 asm: x86.AMOVB,
6328 reg: regInfo{
6329 inputs: []inputInfo{
6330 {1, 255},
6331 {0, 65791},
6332 },
6333 },
6334 },
6335 {
6336 name: "MOVWstoreconstidx1",
6337 auxType: auxSymValAndOff,
6338 argLen: 3,
6339 symEffect: SymWrite,
6340 asm: x86.AMOVW,
6341 reg: regInfo{
6342 inputs: []inputInfo{
6343 {1, 255},
6344 {0, 65791},
6345 },
6346 },
6347 },
6348 {
6349 name: "MOVWstoreconstidx2",
6350 auxType: auxSymValAndOff,
6351 argLen: 3,
6352 symEffect: SymWrite,
6353 asm: x86.AMOVW,
6354 reg: regInfo{
6355 inputs: []inputInfo{
6356 {1, 255},
6357 {0, 65791},
6358 },
6359 },
6360 },
6361 {
6362 name: "MOVLstoreconstidx1",
6363 auxType: auxSymValAndOff,
6364 argLen: 3,
6365 symEffect: SymWrite,
6366 asm: x86.AMOVL,
6367 reg: regInfo{
6368 inputs: []inputInfo{
6369 {1, 255},
6370 {0, 65791},
6371 },
6372 },
6373 },
6374 {
6375 name: "MOVLstoreconstidx4",
6376 auxType: auxSymValAndOff,
6377 argLen: 3,
6378 symEffect: SymWrite,
6379 asm: x86.AMOVL,
6380 reg: regInfo{
6381 inputs: []inputInfo{
6382 {1, 255},
6383 {0, 65791},
6384 },
6385 },
6386 },
6387 {
6388 name: "DUFFZERO",
6389 auxType: auxInt64,
6390 argLen: 3,
6391 faultOnNilArg0: true,
6392 reg: regInfo{
6393 inputs: []inputInfo{
6394 {0, 128},
6395 {1, 1},
6396 },
6397 clobbers: 130,
6398 },
6399 },
6400 {
6401 name: "REPSTOSL",
6402 argLen: 4,
6403 faultOnNilArg0: true,
6404 reg: regInfo{
6405 inputs: []inputInfo{
6406 {0, 128},
6407 {1, 2},
6408 {2, 1},
6409 },
6410 clobbers: 130,
6411 },
6412 },
6413 {
6414 name: "CALLstatic",
6415 auxType: auxCallOff,
6416 argLen: 1,
6417 clobberFlags: true,
6418 call: true,
6419 reg: regInfo{
6420 clobbers: 65519,
6421 },
6422 },
6423 {
6424 name: "CALLtail",
6425 auxType: auxCallOff,
6426 argLen: 1,
6427 clobberFlags: true,
6428 call: true,
6429 tailCall: true,
6430 reg: regInfo{
6431 clobbers: 65519,
6432 },
6433 },
6434 {
6435 name: "CALLclosure",
6436 auxType: auxCallOff,
6437 argLen: 3,
6438 clobberFlags: true,
6439 call: true,
6440 reg: regInfo{
6441 inputs: []inputInfo{
6442 {1, 4},
6443 {0, 255},
6444 },
6445 clobbers: 65519,
6446 },
6447 },
6448 {
6449 name: "CALLinter",
6450 auxType: auxCallOff,
6451 argLen: 2,
6452 clobberFlags: true,
6453 call: true,
6454 reg: regInfo{
6455 inputs: []inputInfo{
6456 {0, 239},
6457 },
6458 clobbers: 65519,
6459 },
6460 },
6461 {
6462 name: "DUFFCOPY",
6463 auxType: auxInt64,
6464 argLen: 3,
6465 clobberFlags: true,
6466 faultOnNilArg0: true,
6467 faultOnNilArg1: true,
6468 reg: regInfo{
6469 inputs: []inputInfo{
6470 {0, 128},
6471 {1, 64},
6472 },
6473 clobbers: 194,
6474 },
6475 },
6476 {
6477 name: "REPMOVSL",
6478 argLen: 4,
6479 faultOnNilArg0: true,
6480 faultOnNilArg1: true,
6481 reg: regInfo{
6482 inputs: []inputInfo{
6483 {0, 128},
6484 {1, 64},
6485 {2, 2},
6486 },
6487 clobbers: 194,
6488 },
6489 },
6490 {
6491 name: "InvertFlags",
6492 argLen: 1,
6493 reg: regInfo{},
6494 },
6495 {
6496 name: "LoweredGetG",
6497 argLen: 1,
6498 reg: regInfo{
6499 outputs: []outputInfo{
6500 {0, 239},
6501 },
6502 },
6503 },
6504 {
6505 name: "LoweredGetClosurePtr",
6506 argLen: 0,
6507 zeroWidth: true,
6508 reg: regInfo{
6509 outputs: []outputInfo{
6510 {0, 4},
6511 },
6512 },
6513 },
6514 {
6515 name: "LoweredGetCallerPC",
6516 argLen: 0,
6517 rematerializeable: true,
6518 reg: regInfo{
6519 outputs: []outputInfo{
6520 {0, 239},
6521 },
6522 },
6523 },
6524 {
6525 name: "LoweredGetCallerSP",
6526 argLen: 1,
6527 rematerializeable: true,
6528 reg: regInfo{
6529 outputs: []outputInfo{
6530 {0, 239},
6531 },
6532 },
6533 },
6534 {
6535 name: "LoweredNilCheck",
6536 argLen: 2,
6537 clobberFlags: true,
6538 nilCheck: true,
6539 faultOnNilArg0: true,
6540 reg: regInfo{
6541 inputs: []inputInfo{
6542 {0, 255},
6543 },
6544 },
6545 },
6546 {
6547 name: "LoweredWB",
6548 auxType: auxInt64,
6549 argLen: 1,
6550 clobberFlags: true,
6551 reg: regInfo{
6552 clobbers: 65280,
6553 outputs: []outputInfo{
6554 {0, 128},
6555 },
6556 },
6557 },
6558 {
6559 name: "LoweredPanicBoundsA",
6560 auxType: auxInt64,
6561 argLen: 3,
6562 call: true,
6563 reg: regInfo{
6564 inputs: []inputInfo{
6565 {0, 4},
6566 {1, 8},
6567 },
6568 },
6569 },
6570 {
6571 name: "LoweredPanicBoundsB",
6572 auxType: auxInt64,
6573 argLen: 3,
6574 call: true,
6575 reg: regInfo{
6576 inputs: []inputInfo{
6577 {0, 2},
6578 {1, 4},
6579 },
6580 },
6581 },
6582 {
6583 name: "LoweredPanicBoundsC",
6584 auxType: auxInt64,
6585 argLen: 3,
6586 call: true,
6587 reg: regInfo{
6588 inputs: []inputInfo{
6589 {0, 1},
6590 {1, 2},
6591 },
6592 },
6593 },
6594 {
6595 name: "LoweredPanicExtendA",
6596 auxType: auxInt64,
6597 argLen: 4,
6598 call: true,
6599 reg: regInfo{
6600 inputs: []inputInfo{
6601 {0, 64},
6602 {1, 4},
6603 {2, 8},
6604 },
6605 },
6606 },
6607 {
6608 name: "LoweredPanicExtendB",
6609 auxType: auxInt64,
6610 argLen: 4,
6611 call: true,
6612 reg: regInfo{
6613 inputs: []inputInfo{
6614 {0, 64},
6615 {1, 2},
6616 {2, 4},
6617 },
6618 },
6619 },
6620 {
6621 name: "LoweredPanicExtendC",
6622 auxType: auxInt64,
6623 argLen: 4,
6624 call: true,
6625 reg: regInfo{
6626 inputs: []inputInfo{
6627 {0, 64},
6628 {1, 1},
6629 {2, 2},
6630 },
6631 },
6632 },
6633 {
6634 name: "FlagEQ",
6635 argLen: 0,
6636 reg: regInfo{},
6637 },
6638 {
6639 name: "FlagLT_ULT",
6640 argLen: 0,
6641 reg: regInfo{},
6642 },
6643 {
6644 name: "FlagLT_UGT",
6645 argLen: 0,
6646 reg: regInfo{},
6647 },
6648 {
6649 name: "FlagGT_UGT",
6650 argLen: 0,
6651 reg: regInfo{},
6652 },
6653 {
6654 name: "FlagGT_ULT",
6655 argLen: 0,
6656 reg: regInfo{},
6657 },
6658 {
6659 name: "MOVSSconst1",
6660 auxType: auxFloat32,
6661 argLen: 0,
6662 reg: regInfo{
6663 outputs: []outputInfo{
6664 {0, 239},
6665 },
6666 },
6667 },
6668 {
6669 name: "MOVSDconst1",
6670 auxType: auxFloat64,
6671 argLen: 0,
6672 reg: regInfo{
6673 outputs: []outputInfo{
6674 {0, 239},
6675 },
6676 },
6677 },
6678 {
6679 name: "MOVSSconst2",
6680 argLen: 1,
6681 asm: x86.AMOVSS,
6682 reg: regInfo{
6683 inputs: []inputInfo{
6684 {0, 239},
6685 },
6686 outputs: []outputInfo{
6687 {0, 65280},
6688 },
6689 },
6690 },
6691 {
6692 name: "MOVSDconst2",
6693 argLen: 1,
6694 asm: x86.AMOVSD,
6695 reg: regInfo{
6696 inputs: []inputInfo{
6697 {0, 239},
6698 },
6699 outputs: []outputInfo{
6700 {0, 65280},
6701 },
6702 },
6703 },
6704
6705 {
6706 name: "ADDSS",
6707 argLen: 2,
6708 commutative: true,
6709 resultInArg0: true,
6710 asm: x86.AADDSS,
6711 reg: regInfo{
6712 inputs: []inputInfo{
6713 {0, 2147418112},
6714 {1, 2147418112},
6715 },
6716 outputs: []outputInfo{
6717 {0, 2147418112},
6718 },
6719 },
6720 },
6721 {
6722 name: "ADDSD",
6723 argLen: 2,
6724 commutative: true,
6725 resultInArg0: true,
6726 asm: x86.AADDSD,
6727 reg: regInfo{
6728 inputs: []inputInfo{
6729 {0, 2147418112},
6730 {1, 2147418112},
6731 },
6732 outputs: []outputInfo{
6733 {0, 2147418112},
6734 },
6735 },
6736 },
6737 {
6738 name: "SUBSS",
6739 argLen: 2,
6740 resultInArg0: true,
6741 asm: x86.ASUBSS,
6742 reg: regInfo{
6743 inputs: []inputInfo{
6744 {0, 2147418112},
6745 {1, 2147418112},
6746 },
6747 outputs: []outputInfo{
6748 {0, 2147418112},
6749 },
6750 },
6751 },
6752 {
6753 name: "SUBSD",
6754 argLen: 2,
6755 resultInArg0: true,
6756 asm: x86.ASUBSD,
6757 reg: regInfo{
6758 inputs: []inputInfo{
6759 {0, 2147418112},
6760 {1, 2147418112},
6761 },
6762 outputs: []outputInfo{
6763 {0, 2147418112},
6764 },
6765 },
6766 },
6767 {
6768 name: "MULSS",
6769 argLen: 2,
6770 commutative: true,
6771 resultInArg0: true,
6772 asm: x86.AMULSS,
6773 reg: regInfo{
6774 inputs: []inputInfo{
6775 {0, 2147418112},
6776 {1, 2147418112},
6777 },
6778 outputs: []outputInfo{
6779 {0, 2147418112},
6780 },
6781 },
6782 },
6783 {
6784 name: "MULSD",
6785 argLen: 2,
6786 commutative: true,
6787 resultInArg0: true,
6788 asm: x86.AMULSD,
6789 reg: regInfo{
6790 inputs: []inputInfo{
6791 {0, 2147418112},
6792 {1, 2147418112},
6793 },
6794 outputs: []outputInfo{
6795 {0, 2147418112},
6796 },
6797 },
6798 },
6799 {
6800 name: "DIVSS",
6801 argLen: 2,
6802 resultInArg0: true,
6803 asm: x86.ADIVSS,
6804 reg: regInfo{
6805 inputs: []inputInfo{
6806 {0, 2147418112},
6807 {1, 2147418112},
6808 },
6809 outputs: []outputInfo{
6810 {0, 2147418112},
6811 },
6812 },
6813 },
6814 {
6815 name: "DIVSD",
6816 argLen: 2,
6817 resultInArg0: true,
6818 asm: x86.ADIVSD,
6819 reg: regInfo{
6820 inputs: []inputInfo{
6821 {0, 2147418112},
6822 {1, 2147418112},
6823 },
6824 outputs: []outputInfo{
6825 {0, 2147418112},
6826 },
6827 },
6828 },
6829 {
6830 name: "MOVSSload",
6831 auxType: auxSymOff,
6832 argLen: 2,
6833 faultOnNilArg0: true,
6834 symEffect: SymRead,
6835 asm: x86.AMOVSS,
6836 reg: regInfo{
6837 inputs: []inputInfo{
6838 {0, 4295016447},
6839 },
6840 outputs: []outputInfo{
6841 {0, 2147418112},
6842 },
6843 },
6844 },
6845 {
6846 name: "MOVSDload",
6847 auxType: auxSymOff,
6848 argLen: 2,
6849 faultOnNilArg0: true,
6850 symEffect: SymRead,
6851 asm: x86.AMOVSD,
6852 reg: regInfo{
6853 inputs: []inputInfo{
6854 {0, 4295016447},
6855 },
6856 outputs: []outputInfo{
6857 {0, 2147418112},
6858 },
6859 },
6860 },
6861 {
6862 name: "MOVSSconst",
6863 auxType: auxFloat32,
6864 argLen: 0,
6865 rematerializeable: true,
6866 asm: x86.AMOVSS,
6867 reg: regInfo{
6868 outputs: []outputInfo{
6869 {0, 2147418112},
6870 },
6871 },
6872 },
6873 {
6874 name: "MOVSDconst",
6875 auxType: auxFloat64,
6876 argLen: 0,
6877 rematerializeable: true,
6878 asm: x86.AMOVSD,
6879 reg: regInfo{
6880 outputs: []outputInfo{
6881 {0, 2147418112},
6882 },
6883 },
6884 },
6885 {
6886 name: "MOVSSloadidx1",
6887 auxType: auxSymOff,
6888 argLen: 3,
6889 symEffect: SymRead,
6890 asm: x86.AMOVSS,
6891 scale: 1,
6892 reg: regInfo{
6893 inputs: []inputInfo{
6894 {1, 49151},
6895 {0, 4295016447},
6896 },
6897 outputs: []outputInfo{
6898 {0, 2147418112},
6899 },
6900 },
6901 },
6902 {
6903 name: "MOVSSloadidx4",
6904 auxType: auxSymOff,
6905 argLen: 3,
6906 symEffect: SymRead,
6907 asm: x86.AMOVSS,
6908 scale: 4,
6909 reg: regInfo{
6910 inputs: []inputInfo{
6911 {1, 49151},
6912 {0, 4295016447},
6913 },
6914 outputs: []outputInfo{
6915 {0, 2147418112},
6916 },
6917 },
6918 },
6919 {
6920 name: "MOVSDloadidx1",
6921 auxType: auxSymOff,
6922 argLen: 3,
6923 symEffect: SymRead,
6924 asm: x86.AMOVSD,
6925 scale: 1,
6926 reg: regInfo{
6927 inputs: []inputInfo{
6928 {1, 49151},
6929 {0, 4295016447},
6930 },
6931 outputs: []outputInfo{
6932 {0, 2147418112},
6933 },
6934 },
6935 },
6936 {
6937 name: "MOVSDloadidx8",
6938 auxType: auxSymOff,
6939 argLen: 3,
6940 symEffect: SymRead,
6941 asm: x86.AMOVSD,
6942 scale: 8,
6943 reg: regInfo{
6944 inputs: []inputInfo{
6945 {1, 49151},
6946 {0, 4295016447},
6947 },
6948 outputs: []outputInfo{
6949 {0, 2147418112},
6950 },
6951 },
6952 },
6953 {
6954 name: "MOVSSstore",
6955 auxType: auxSymOff,
6956 argLen: 3,
6957 faultOnNilArg0: true,
6958 symEffect: SymWrite,
6959 asm: x86.AMOVSS,
6960 reg: regInfo{
6961 inputs: []inputInfo{
6962 {1, 2147418112},
6963 {0, 4295016447},
6964 },
6965 },
6966 },
6967 {
6968 name: "MOVSDstore",
6969 auxType: auxSymOff,
6970 argLen: 3,
6971 faultOnNilArg0: true,
6972 symEffect: SymWrite,
6973 asm: x86.AMOVSD,
6974 reg: regInfo{
6975 inputs: []inputInfo{
6976 {1, 2147418112},
6977 {0, 4295016447},
6978 },
6979 },
6980 },
6981 {
6982 name: "MOVSSstoreidx1",
6983 auxType: auxSymOff,
6984 argLen: 4,
6985 symEffect: SymWrite,
6986 asm: x86.AMOVSS,
6987 scale: 1,
6988 reg: regInfo{
6989 inputs: []inputInfo{
6990 {1, 49151},
6991 {2, 2147418112},
6992 {0, 4295016447},
6993 },
6994 },
6995 },
6996 {
6997 name: "MOVSSstoreidx4",
6998 auxType: auxSymOff,
6999 argLen: 4,
7000 symEffect: SymWrite,
7001 asm: x86.AMOVSS,
7002 scale: 4,
7003 reg: regInfo{
7004 inputs: []inputInfo{
7005 {1, 49151},
7006 {2, 2147418112},
7007 {0, 4295016447},
7008 },
7009 },
7010 },
7011 {
7012 name: "MOVSDstoreidx1",
7013 auxType: auxSymOff,
7014 argLen: 4,
7015 symEffect: SymWrite,
7016 asm: x86.AMOVSD,
7017 scale: 1,
7018 reg: regInfo{
7019 inputs: []inputInfo{
7020 {1, 49151},
7021 {2, 2147418112},
7022 {0, 4295016447},
7023 },
7024 },
7025 },
7026 {
7027 name: "MOVSDstoreidx8",
7028 auxType: auxSymOff,
7029 argLen: 4,
7030 symEffect: SymWrite,
7031 asm: x86.AMOVSD,
7032 scale: 8,
7033 reg: regInfo{
7034 inputs: []inputInfo{
7035 {1, 49151},
7036 {2, 2147418112},
7037 {0, 4295016447},
7038 },
7039 },
7040 },
7041 {
7042 name: "ADDSSload",
7043 auxType: auxSymOff,
7044 argLen: 3,
7045 resultInArg0: true,
7046 faultOnNilArg1: true,
7047 symEffect: SymRead,
7048 asm: x86.AADDSS,
7049 reg: regInfo{
7050 inputs: []inputInfo{
7051 {0, 2147418112},
7052 {1, 4295032831},
7053 },
7054 outputs: []outputInfo{
7055 {0, 2147418112},
7056 },
7057 },
7058 },
7059 {
7060 name: "ADDSDload",
7061 auxType: auxSymOff,
7062 argLen: 3,
7063 resultInArg0: true,
7064 faultOnNilArg1: true,
7065 symEffect: SymRead,
7066 asm: x86.AADDSD,
7067 reg: regInfo{
7068 inputs: []inputInfo{
7069 {0, 2147418112},
7070 {1, 4295032831},
7071 },
7072 outputs: []outputInfo{
7073 {0, 2147418112},
7074 },
7075 },
7076 },
7077 {
7078 name: "SUBSSload",
7079 auxType: auxSymOff,
7080 argLen: 3,
7081 resultInArg0: true,
7082 faultOnNilArg1: true,
7083 symEffect: SymRead,
7084 asm: x86.ASUBSS,
7085 reg: regInfo{
7086 inputs: []inputInfo{
7087 {0, 2147418112},
7088 {1, 4295032831},
7089 },
7090 outputs: []outputInfo{
7091 {0, 2147418112},
7092 },
7093 },
7094 },
7095 {
7096 name: "SUBSDload",
7097 auxType: auxSymOff,
7098 argLen: 3,
7099 resultInArg0: true,
7100 faultOnNilArg1: true,
7101 symEffect: SymRead,
7102 asm: x86.ASUBSD,
7103 reg: regInfo{
7104 inputs: []inputInfo{
7105 {0, 2147418112},
7106 {1, 4295032831},
7107 },
7108 outputs: []outputInfo{
7109 {0, 2147418112},
7110 },
7111 },
7112 },
7113 {
7114 name: "MULSSload",
7115 auxType: auxSymOff,
7116 argLen: 3,
7117 resultInArg0: true,
7118 faultOnNilArg1: true,
7119 symEffect: SymRead,
7120 asm: x86.AMULSS,
7121 reg: regInfo{
7122 inputs: []inputInfo{
7123 {0, 2147418112},
7124 {1, 4295032831},
7125 },
7126 outputs: []outputInfo{
7127 {0, 2147418112},
7128 },
7129 },
7130 },
7131 {
7132 name: "MULSDload",
7133 auxType: auxSymOff,
7134 argLen: 3,
7135 resultInArg0: true,
7136 faultOnNilArg1: true,
7137 symEffect: SymRead,
7138 asm: x86.AMULSD,
7139 reg: regInfo{
7140 inputs: []inputInfo{
7141 {0, 2147418112},
7142 {1, 4295032831},
7143 },
7144 outputs: []outputInfo{
7145 {0, 2147418112},
7146 },
7147 },
7148 },
7149 {
7150 name: "DIVSSload",
7151 auxType: auxSymOff,
7152 argLen: 3,
7153 resultInArg0: true,
7154 faultOnNilArg1: true,
7155 symEffect: SymRead,
7156 asm: x86.ADIVSS,
7157 reg: regInfo{
7158 inputs: []inputInfo{
7159 {0, 2147418112},
7160 {1, 4295032831},
7161 },
7162 outputs: []outputInfo{
7163 {0, 2147418112},
7164 },
7165 },
7166 },
7167 {
7168 name: "DIVSDload",
7169 auxType: auxSymOff,
7170 argLen: 3,
7171 resultInArg0: true,
7172 faultOnNilArg1: true,
7173 symEffect: SymRead,
7174 asm: x86.ADIVSD,
7175 reg: regInfo{
7176 inputs: []inputInfo{
7177 {0, 2147418112},
7178 {1, 4295032831},
7179 },
7180 outputs: []outputInfo{
7181 {0, 2147418112},
7182 },
7183 },
7184 },
7185 {
7186 name: "ADDSSloadidx1",
7187 auxType: auxSymOff,
7188 argLen: 4,
7189 resultInArg0: true,
7190 symEffect: SymRead,
7191 asm: x86.AADDSS,
7192 scale: 1,
7193 reg: regInfo{
7194 inputs: []inputInfo{
7195 {0, 2147418112},
7196 {2, 4295016447},
7197 {1, 4295032831},
7198 },
7199 outputs: []outputInfo{
7200 {0, 2147418112},
7201 },
7202 },
7203 },
7204 {
7205 name: "ADDSSloadidx4",
7206 auxType: auxSymOff,
7207 argLen: 4,
7208 resultInArg0: true,
7209 symEffect: SymRead,
7210 asm: x86.AADDSS,
7211 scale: 4,
7212 reg: regInfo{
7213 inputs: []inputInfo{
7214 {0, 2147418112},
7215 {2, 4295016447},
7216 {1, 4295032831},
7217 },
7218 outputs: []outputInfo{
7219 {0, 2147418112},
7220 },
7221 },
7222 },
7223 {
7224 name: "ADDSDloadidx1",
7225 auxType: auxSymOff,
7226 argLen: 4,
7227 resultInArg0: true,
7228 symEffect: SymRead,
7229 asm: x86.AADDSD,
7230 scale: 1,
7231 reg: regInfo{
7232 inputs: []inputInfo{
7233 {0, 2147418112},
7234 {2, 4295016447},
7235 {1, 4295032831},
7236 },
7237 outputs: []outputInfo{
7238 {0, 2147418112},
7239 },
7240 },
7241 },
7242 {
7243 name: "ADDSDloadidx8",
7244 auxType: auxSymOff,
7245 argLen: 4,
7246 resultInArg0: true,
7247 symEffect: SymRead,
7248 asm: x86.AADDSD,
7249 scale: 8,
7250 reg: regInfo{
7251 inputs: []inputInfo{
7252 {0, 2147418112},
7253 {2, 4295016447},
7254 {1, 4295032831},
7255 },
7256 outputs: []outputInfo{
7257 {0, 2147418112},
7258 },
7259 },
7260 },
7261 {
7262 name: "SUBSSloadidx1",
7263 auxType: auxSymOff,
7264 argLen: 4,
7265 resultInArg0: true,
7266 symEffect: SymRead,
7267 asm: x86.ASUBSS,
7268 scale: 1,
7269 reg: regInfo{
7270 inputs: []inputInfo{
7271 {0, 2147418112},
7272 {2, 4295016447},
7273 {1, 4295032831},
7274 },
7275 outputs: []outputInfo{
7276 {0, 2147418112},
7277 },
7278 },
7279 },
7280 {
7281 name: "SUBSSloadidx4",
7282 auxType: auxSymOff,
7283 argLen: 4,
7284 resultInArg0: true,
7285 symEffect: SymRead,
7286 asm: x86.ASUBSS,
7287 scale: 4,
7288 reg: regInfo{
7289 inputs: []inputInfo{
7290 {0, 2147418112},
7291 {2, 4295016447},
7292 {1, 4295032831},
7293 },
7294 outputs: []outputInfo{
7295 {0, 2147418112},
7296 },
7297 },
7298 },
7299 {
7300 name: "SUBSDloadidx1",
7301 auxType: auxSymOff,
7302 argLen: 4,
7303 resultInArg0: true,
7304 symEffect: SymRead,
7305 asm: x86.ASUBSD,
7306 scale: 1,
7307 reg: regInfo{
7308 inputs: []inputInfo{
7309 {0, 2147418112},
7310 {2, 4295016447},
7311 {1, 4295032831},
7312 },
7313 outputs: []outputInfo{
7314 {0, 2147418112},
7315 },
7316 },
7317 },
7318 {
7319 name: "SUBSDloadidx8",
7320 auxType: auxSymOff,
7321 argLen: 4,
7322 resultInArg0: true,
7323 symEffect: SymRead,
7324 asm: x86.ASUBSD,
7325 scale: 8,
7326 reg: regInfo{
7327 inputs: []inputInfo{
7328 {0, 2147418112},
7329 {2, 4295016447},
7330 {1, 4295032831},
7331 },
7332 outputs: []outputInfo{
7333 {0, 2147418112},
7334 },
7335 },
7336 },
7337 {
7338 name: "MULSSloadidx1",
7339 auxType: auxSymOff,
7340 argLen: 4,
7341 resultInArg0: true,
7342 symEffect: SymRead,
7343 asm: x86.AMULSS,
7344 scale: 1,
7345 reg: regInfo{
7346 inputs: []inputInfo{
7347 {0, 2147418112},
7348 {2, 4295016447},
7349 {1, 4295032831},
7350 },
7351 outputs: []outputInfo{
7352 {0, 2147418112},
7353 },
7354 },
7355 },
7356 {
7357 name: "MULSSloadidx4",
7358 auxType: auxSymOff,
7359 argLen: 4,
7360 resultInArg0: true,
7361 symEffect: SymRead,
7362 asm: x86.AMULSS,
7363 scale: 4,
7364 reg: regInfo{
7365 inputs: []inputInfo{
7366 {0, 2147418112},
7367 {2, 4295016447},
7368 {1, 4295032831},
7369 },
7370 outputs: []outputInfo{
7371 {0, 2147418112},
7372 },
7373 },
7374 },
7375 {
7376 name: "MULSDloadidx1",
7377 auxType: auxSymOff,
7378 argLen: 4,
7379 resultInArg0: true,
7380 symEffect: SymRead,
7381 asm: x86.AMULSD,
7382 scale: 1,
7383 reg: regInfo{
7384 inputs: []inputInfo{
7385 {0, 2147418112},
7386 {2, 4295016447},
7387 {1, 4295032831},
7388 },
7389 outputs: []outputInfo{
7390 {0, 2147418112},
7391 },
7392 },
7393 },
7394 {
7395 name: "MULSDloadidx8",
7396 auxType: auxSymOff,
7397 argLen: 4,
7398 resultInArg0: true,
7399 symEffect: SymRead,
7400 asm: x86.AMULSD,
7401 scale: 8,
7402 reg: regInfo{
7403 inputs: []inputInfo{
7404 {0, 2147418112},
7405 {2, 4295016447},
7406 {1, 4295032831},
7407 },
7408 outputs: []outputInfo{
7409 {0, 2147418112},
7410 },
7411 },
7412 },
7413 {
7414 name: "DIVSSloadidx1",
7415 auxType: auxSymOff,
7416 argLen: 4,
7417 resultInArg0: true,
7418 symEffect: SymRead,
7419 asm: x86.ADIVSS,
7420 scale: 1,
7421 reg: regInfo{
7422 inputs: []inputInfo{
7423 {0, 2147418112},
7424 {2, 4295016447},
7425 {1, 4295032831},
7426 },
7427 outputs: []outputInfo{
7428 {0, 2147418112},
7429 },
7430 },
7431 },
7432 {
7433 name: "DIVSSloadidx4",
7434 auxType: auxSymOff,
7435 argLen: 4,
7436 resultInArg0: true,
7437 symEffect: SymRead,
7438 asm: x86.ADIVSS,
7439 scale: 4,
7440 reg: regInfo{
7441 inputs: []inputInfo{
7442 {0, 2147418112},
7443 {2, 4295016447},
7444 {1, 4295032831},
7445 },
7446 outputs: []outputInfo{
7447 {0, 2147418112},
7448 },
7449 },
7450 },
7451 {
7452 name: "DIVSDloadidx1",
7453 auxType: auxSymOff,
7454 argLen: 4,
7455 resultInArg0: true,
7456 symEffect: SymRead,
7457 asm: x86.ADIVSD,
7458 scale: 1,
7459 reg: regInfo{
7460 inputs: []inputInfo{
7461 {0, 2147418112},
7462 {2, 4295016447},
7463 {1, 4295032831},
7464 },
7465 outputs: []outputInfo{
7466 {0, 2147418112},
7467 },
7468 },
7469 },
7470 {
7471 name: "DIVSDloadidx8",
7472 auxType: auxSymOff,
7473 argLen: 4,
7474 resultInArg0: true,
7475 symEffect: SymRead,
7476 asm: x86.ADIVSD,
7477 scale: 8,
7478 reg: regInfo{
7479 inputs: []inputInfo{
7480 {0, 2147418112},
7481 {2, 4295016447},
7482 {1, 4295032831},
7483 },
7484 outputs: []outputInfo{
7485 {0, 2147418112},
7486 },
7487 },
7488 },
7489 {
7490 name: "ADDQ",
7491 argLen: 2,
7492 commutative: true,
7493 clobberFlags: true,
7494 asm: x86.AADDQ,
7495 reg: regInfo{
7496 inputs: []inputInfo{
7497 {1, 49135},
7498 {0, 49151},
7499 },
7500 outputs: []outputInfo{
7501 {0, 49135},
7502 },
7503 },
7504 },
7505 {
7506 name: "ADDL",
7507 argLen: 2,
7508 commutative: true,
7509 clobberFlags: true,
7510 asm: x86.AADDL,
7511 reg: regInfo{
7512 inputs: []inputInfo{
7513 {1, 49135},
7514 {0, 49151},
7515 },
7516 outputs: []outputInfo{
7517 {0, 49135},
7518 },
7519 },
7520 },
7521 {
7522 name: "ADDQconst",
7523 auxType: auxInt32,
7524 argLen: 1,
7525 clobberFlags: true,
7526 asm: x86.AADDQ,
7527 reg: regInfo{
7528 inputs: []inputInfo{
7529 {0, 49151},
7530 },
7531 outputs: []outputInfo{
7532 {0, 49135},
7533 },
7534 },
7535 },
7536 {
7537 name: "ADDLconst",
7538 auxType: auxInt32,
7539 argLen: 1,
7540 clobberFlags: true,
7541 asm: x86.AADDL,
7542 reg: regInfo{
7543 inputs: []inputInfo{
7544 {0, 49151},
7545 },
7546 outputs: []outputInfo{
7547 {0, 49135},
7548 },
7549 },
7550 },
7551 {
7552 name: "ADDQconstmodify",
7553 auxType: auxSymValAndOff,
7554 argLen: 2,
7555 clobberFlags: true,
7556 faultOnNilArg0: true,
7557 symEffect: SymRead | SymWrite,
7558 asm: x86.AADDQ,
7559 reg: regInfo{
7560 inputs: []inputInfo{
7561 {0, 4295032831},
7562 },
7563 },
7564 },
7565 {
7566 name: "ADDLconstmodify",
7567 auxType: auxSymValAndOff,
7568 argLen: 2,
7569 clobberFlags: true,
7570 faultOnNilArg0: true,
7571 symEffect: SymRead | SymWrite,
7572 asm: x86.AADDL,
7573 reg: regInfo{
7574 inputs: []inputInfo{
7575 {0, 4295032831},
7576 },
7577 },
7578 },
7579 {
7580 name: "SUBQ",
7581 argLen: 2,
7582 resultInArg0: true,
7583 clobberFlags: true,
7584 asm: x86.ASUBQ,
7585 reg: regInfo{
7586 inputs: []inputInfo{
7587 {0, 49135},
7588 {1, 49135},
7589 },
7590 outputs: []outputInfo{
7591 {0, 49135},
7592 },
7593 },
7594 },
7595 {
7596 name: "SUBL",
7597 argLen: 2,
7598 resultInArg0: true,
7599 clobberFlags: true,
7600 asm: x86.ASUBL,
7601 reg: regInfo{
7602 inputs: []inputInfo{
7603 {0, 49135},
7604 {1, 49135},
7605 },
7606 outputs: []outputInfo{
7607 {0, 49135},
7608 },
7609 },
7610 },
7611 {
7612 name: "SUBQconst",
7613 auxType: auxInt32,
7614 argLen: 1,
7615 resultInArg0: true,
7616 clobberFlags: true,
7617 asm: x86.ASUBQ,
7618 reg: regInfo{
7619 inputs: []inputInfo{
7620 {0, 49135},
7621 },
7622 outputs: []outputInfo{
7623 {0, 49135},
7624 },
7625 },
7626 },
7627 {
7628 name: "SUBLconst",
7629 auxType: auxInt32,
7630 argLen: 1,
7631 resultInArg0: true,
7632 clobberFlags: true,
7633 asm: x86.ASUBL,
7634 reg: regInfo{
7635 inputs: []inputInfo{
7636 {0, 49135},
7637 },
7638 outputs: []outputInfo{
7639 {0, 49135},
7640 },
7641 },
7642 },
7643 {
7644 name: "MULQ",
7645 argLen: 2,
7646 commutative: true,
7647 resultInArg0: true,
7648 clobberFlags: true,
7649 asm: x86.AIMULQ,
7650 reg: regInfo{
7651 inputs: []inputInfo{
7652 {0, 49135},
7653 {1, 49135},
7654 },
7655 outputs: []outputInfo{
7656 {0, 49135},
7657 },
7658 },
7659 },
7660 {
7661 name: "MULL",
7662 argLen: 2,
7663 commutative: true,
7664 resultInArg0: true,
7665 clobberFlags: true,
7666 asm: x86.AIMULL,
7667 reg: regInfo{
7668 inputs: []inputInfo{
7669 {0, 49135},
7670 {1, 49135},
7671 },
7672 outputs: []outputInfo{
7673 {0, 49135},
7674 },
7675 },
7676 },
7677 {
7678 name: "MULQconst",
7679 auxType: auxInt32,
7680 argLen: 1,
7681 clobberFlags: true,
7682 asm: x86.AIMUL3Q,
7683 reg: regInfo{
7684 inputs: []inputInfo{
7685 {0, 49135},
7686 },
7687 outputs: []outputInfo{
7688 {0, 49135},
7689 },
7690 },
7691 },
7692 {
7693 name: "MULLconst",
7694 auxType: auxInt32,
7695 argLen: 1,
7696 clobberFlags: true,
7697 asm: x86.AIMUL3L,
7698 reg: regInfo{
7699 inputs: []inputInfo{
7700 {0, 49135},
7701 },
7702 outputs: []outputInfo{
7703 {0, 49135},
7704 },
7705 },
7706 },
7707 {
7708 name: "MULLU",
7709 argLen: 2,
7710 commutative: true,
7711 clobberFlags: true,
7712 asm: x86.AMULL,
7713 reg: regInfo{
7714 inputs: []inputInfo{
7715 {0, 1},
7716 {1, 49151},
7717 },
7718 clobbers: 4,
7719 outputs: []outputInfo{
7720 {1, 0},
7721 {0, 1},
7722 },
7723 },
7724 },
7725 {
7726 name: "MULQU",
7727 argLen: 2,
7728 commutative: true,
7729 clobberFlags: true,
7730 asm: x86.AMULQ,
7731 reg: regInfo{
7732 inputs: []inputInfo{
7733 {0, 1},
7734 {1, 49151},
7735 },
7736 clobbers: 4,
7737 outputs: []outputInfo{
7738 {1, 0},
7739 {0, 1},
7740 },
7741 },
7742 },
7743 {
7744 name: "HMULQ",
7745 argLen: 2,
7746 clobberFlags: true,
7747 asm: x86.AIMULQ,
7748 reg: regInfo{
7749 inputs: []inputInfo{
7750 {0, 1},
7751 {1, 49151},
7752 },
7753 clobbers: 1,
7754 outputs: []outputInfo{
7755 {0, 4},
7756 },
7757 },
7758 },
7759 {
7760 name: "HMULL",
7761 argLen: 2,
7762 clobberFlags: true,
7763 asm: x86.AIMULL,
7764 reg: regInfo{
7765 inputs: []inputInfo{
7766 {0, 1},
7767 {1, 49151},
7768 },
7769 clobbers: 1,
7770 outputs: []outputInfo{
7771 {0, 4},
7772 },
7773 },
7774 },
7775 {
7776 name: "HMULQU",
7777 argLen: 2,
7778 clobberFlags: true,
7779 asm: x86.AMULQ,
7780 reg: regInfo{
7781 inputs: []inputInfo{
7782 {0, 1},
7783 {1, 49151},
7784 },
7785 clobbers: 1,
7786 outputs: []outputInfo{
7787 {0, 4},
7788 },
7789 },
7790 },
7791 {
7792 name: "HMULLU",
7793 argLen: 2,
7794 clobberFlags: true,
7795 asm: x86.AMULL,
7796 reg: regInfo{
7797 inputs: []inputInfo{
7798 {0, 1},
7799 {1, 49151},
7800 },
7801 clobbers: 1,
7802 outputs: []outputInfo{
7803 {0, 4},
7804 },
7805 },
7806 },
7807 {
7808 name: "AVGQU",
7809 argLen: 2,
7810 commutative: true,
7811 resultInArg0: true,
7812 clobberFlags: true,
7813 reg: regInfo{
7814 inputs: []inputInfo{
7815 {0, 49135},
7816 {1, 49135},
7817 },
7818 outputs: []outputInfo{
7819 {0, 49135},
7820 },
7821 },
7822 },
7823 {
7824 name: "DIVQ",
7825 auxType: auxBool,
7826 argLen: 2,
7827 clobberFlags: true,
7828 asm: x86.AIDIVQ,
7829 reg: regInfo{
7830 inputs: []inputInfo{
7831 {0, 1},
7832 {1, 49147},
7833 },
7834 outputs: []outputInfo{
7835 {0, 1},
7836 {1, 4},
7837 },
7838 },
7839 },
7840 {
7841 name: "DIVL",
7842 auxType: auxBool,
7843 argLen: 2,
7844 clobberFlags: true,
7845 asm: x86.AIDIVL,
7846 reg: regInfo{
7847 inputs: []inputInfo{
7848 {0, 1},
7849 {1, 49147},
7850 },
7851 outputs: []outputInfo{
7852 {0, 1},
7853 {1, 4},
7854 },
7855 },
7856 },
7857 {
7858 name: "DIVW",
7859 auxType: auxBool,
7860 argLen: 2,
7861 clobberFlags: true,
7862 asm: x86.AIDIVW,
7863 reg: regInfo{
7864 inputs: []inputInfo{
7865 {0, 1},
7866 {1, 49147},
7867 },
7868 outputs: []outputInfo{
7869 {0, 1},
7870 {1, 4},
7871 },
7872 },
7873 },
7874 {
7875 name: "DIVQU",
7876 argLen: 2,
7877 clobberFlags: true,
7878 asm: x86.ADIVQ,
7879 reg: regInfo{
7880 inputs: []inputInfo{
7881 {0, 1},
7882 {1, 49147},
7883 },
7884 outputs: []outputInfo{
7885 {0, 1},
7886 {1, 4},
7887 },
7888 },
7889 },
7890 {
7891 name: "DIVLU",
7892 argLen: 2,
7893 clobberFlags: true,
7894 asm: x86.ADIVL,
7895 reg: regInfo{
7896 inputs: []inputInfo{
7897 {0, 1},
7898 {1, 49147},
7899 },
7900 outputs: []outputInfo{
7901 {0, 1},
7902 {1, 4},
7903 },
7904 },
7905 },
7906 {
7907 name: "DIVWU",
7908 argLen: 2,
7909 clobberFlags: true,
7910 asm: x86.ADIVW,
7911 reg: regInfo{
7912 inputs: []inputInfo{
7913 {0, 1},
7914 {1, 49147},
7915 },
7916 outputs: []outputInfo{
7917 {0, 1},
7918 {1, 4},
7919 },
7920 },
7921 },
7922 {
7923 name: "NEGLflags",
7924 argLen: 1,
7925 resultInArg0: true,
7926 asm: x86.ANEGL,
7927 reg: regInfo{
7928 inputs: []inputInfo{
7929 {0, 49135},
7930 },
7931 outputs: []outputInfo{
7932 {1, 0},
7933 {0, 49135},
7934 },
7935 },
7936 },
7937 {
7938 name: "ADDQcarry",
7939 argLen: 2,
7940 commutative: true,
7941 resultInArg0: true,
7942 asm: x86.AADDQ,
7943 reg: regInfo{
7944 inputs: []inputInfo{
7945 {0, 49135},
7946 {1, 49135},
7947 },
7948 outputs: []outputInfo{
7949 {1, 0},
7950 {0, 49135},
7951 },
7952 },
7953 },
7954 {
7955 name: "ADCQ",
7956 argLen: 3,
7957 commutative: true,
7958 resultInArg0: true,
7959 asm: x86.AADCQ,
7960 reg: regInfo{
7961 inputs: []inputInfo{
7962 {0, 49135},
7963 {1, 49135},
7964 },
7965 outputs: []outputInfo{
7966 {1, 0},
7967 {0, 49135},
7968 },
7969 },
7970 },
7971 {
7972 name: "ADDQconstcarry",
7973 auxType: auxInt32,
7974 argLen: 1,
7975 resultInArg0: true,
7976 asm: x86.AADDQ,
7977 reg: regInfo{
7978 inputs: []inputInfo{
7979 {0, 49135},
7980 },
7981 outputs: []outputInfo{
7982 {1, 0},
7983 {0, 49135},
7984 },
7985 },
7986 },
7987 {
7988 name: "ADCQconst",
7989 auxType: auxInt32,
7990 argLen: 2,
7991 resultInArg0: true,
7992 asm: x86.AADCQ,
7993 reg: regInfo{
7994 inputs: []inputInfo{
7995 {0, 49135},
7996 },
7997 outputs: []outputInfo{
7998 {1, 0},
7999 {0, 49135},
8000 },
8001 },
8002 },
8003 {
8004 name: "SUBQborrow",
8005 argLen: 2,
8006 resultInArg0: true,
8007 asm: x86.ASUBQ,
8008 reg: regInfo{
8009 inputs: []inputInfo{
8010 {0, 49135},
8011 {1, 49135},
8012 },
8013 outputs: []outputInfo{
8014 {1, 0},
8015 {0, 49135},
8016 },
8017 },
8018 },
8019 {
8020 name: "SBBQ",
8021 argLen: 3,
8022 resultInArg0: true,
8023 asm: x86.ASBBQ,
8024 reg: regInfo{
8025 inputs: []inputInfo{
8026 {0, 49135},
8027 {1, 49135},
8028 },
8029 outputs: []outputInfo{
8030 {1, 0},
8031 {0, 49135},
8032 },
8033 },
8034 },
8035 {
8036 name: "SUBQconstborrow",
8037 auxType: auxInt32,
8038 argLen: 1,
8039 resultInArg0: true,
8040 asm: x86.ASUBQ,
8041 reg: regInfo{
8042 inputs: []inputInfo{
8043 {0, 49135},
8044 },
8045 outputs: []outputInfo{
8046 {1, 0},
8047 {0, 49135},
8048 },
8049 },
8050 },
8051 {
8052 name: "SBBQconst",
8053 auxType: auxInt32,
8054 argLen: 2,
8055 resultInArg0: true,
8056 asm: x86.ASBBQ,
8057 reg: regInfo{
8058 inputs: []inputInfo{
8059 {0, 49135},
8060 },
8061 outputs: []outputInfo{
8062 {1, 0},
8063 {0, 49135},
8064 },
8065 },
8066 },
8067 {
8068 name: "MULQU2",
8069 argLen: 2,
8070 commutative: true,
8071 clobberFlags: true,
8072 asm: x86.AMULQ,
8073 reg: regInfo{
8074 inputs: []inputInfo{
8075 {0, 1},
8076 {1, 49151},
8077 },
8078 outputs: []outputInfo{
8079 {0, 4},
8080 {1, 1},
8081 },
8082 },
8083 },
8084 {
8085 name: "DIVQU2",
8086 argLen: 3,
8087 clobberFlags: true,
8088 asm: x86.ADIVQ,
8089 reg: regInfo{
8090 inputs: []inputInfo{
8091 {0, 4},
8092 {1, 1},
8093 {2, 49151},
8094 },
8095 outputs: []outputInfo{
8096 {0, 1},
8097 {1, 4},
8098 },
8099 },
8100 },
8101 {
8102 name: "ANDQ",
8103 argLen: 2,
8104 commutative: true,
8105 resultInArg0: true,
8106 clobberFlags: true,
8107 asm: x86.AANDQ,
8108 reg: regInfo{
8109 inputs: []inputInfo{
8110 {0, 49135},
8111 {1, 49135},
8112 },
8113 outputs: []outputInfo{
8114 {0, 49135},
8115 },
8116 },
8117 },
8118 {
8119 name: "ANDL",
8120 argLen: 2,
8121 commutative: true,
8122 resultInArg0: true,
8123 clobberFlags: true,
8124 asm: x86.AANDL,
8125 reg: regInfo{
8126 inputs: []inputInfo{
8127 {0, 49135},
8128 {1, 49135},
8129 },
8130 outputs: []outputInfo{
8131 {0, 49135},
8132 },
8133 },
8134 },
8135 {
8136 name: "ANDQconst",
8137 auxType: auxInt32,
8138 argLen: 1,
8139 resultInArg0: true,
8140 clobberFlags: true,
8141 asm: x86.AANDQ,
8142 reg: regInfo{
8143 inputs: []inputInfo{
8144 {0, 49135},
8145 },
8146 outputs: []outputInfo{
8147 {0, 49135},
8148 },
8149 },
8150 },
8151 {
8152 name: "ANDLconst",
8153 auxType: auxInt32,
8154 argLen: 1,
8155 resultInArg0: true,
8156 clobberFlags: true,
8157 asm: x86.AANDL,
8158 reg: regInfo{
8159 inputs: []inputInfo{
8160 {0, 49135},
8161 },
8162 outputs: []outputInfo{
8163 {0, 49135},
8164 },
8165 },
8166 },
8167 {
8168 name: "ANDQconstmodify",
8169 auxType: auxSymValAndOff,
8170 argLen: 2,
8171 clobberFlags: true,
8172 faultOnNilArg0: true,
8173 symEffect: SymRead | SymWrite,
8174 asm: x86.AANDQ,
8175 reg: regInfo{
8176 inputs: []inputInfo{
8177 {0, 4295032831},
8178 },
8179 },
8180 },
8181 {
8182 name: "ANDLconstmodify",
8183 auxType: auxSymValAndOff,
8184 argLen: 2,
8185 clobberFlags: true,
8186 faultOnNilArg0: true,
8187 symEffect: SymRead | SymWrite,
8188 asm: x86.AANDL,
8189 reg: regInfo{
8190 inputs: []inputInfo{
8191 {0, 4295032831},
8192 },
8193 },
8194 },
8195 {
8196 name: "ORQ",
8197 argLen: 2,
8198 commutative: true,
8199 resultInArg0: true,
8200 clobberFlags: true,
8201 asm: x86.AORQ,
8202 reg: regInfo{
8203 inputs: []inputInfo{
8204 {0, 49135},
8205 {1, 49135},
8206 },
8207 outputs: []outputInfo{
8208 {0, 49135},
8209 },
8210 },
8211 },
8212 {
8213 name: "ORL",
8214 argLen: 2,
8215 commutative: true,
8216 resultInArg0: true,
8217 clobberFlags: true,
8218 asm: x86.AORL,
8219 reg: regInfo{
8220 inputs: []inputInfo{
8221 {0, 49135},
8222 {1, 49135},
8223 },
8224 outputs: []outputInfo{
8225 {0, 49135},
8226 },
8227 },
8228 },
8229 {
8230 name: "ORQconst",
8231 auxType: auxInt32,
8232 argLen: 1,
8233 resultInArg0: true,
8234 clobberFlags: true,
8235 asm: x86.AORQ,
8236 reg: regInfo{
8237 inputs: []inputInfo{
8238 {0, 49135},
8239 },
8240 outputs: []outputInfo{
8241 {0, 49135},
8242 },
8243 },
8244 },
8245 {
8246 name: "ORLconst",
8247 auxType: auxInt32,
8248 argLen: 1,
8249 resultInArg0: true,
8250 clobberFlags: true,
8251 asm: x86.AORL,
8252 reg: regInfo{
8253 inputs: []inputInfo{
8254 {0, 49135},
8255 },
8256 outputs: []outputInfo{
8257 {0, 49135},
8258 },
8259 },
8260 },
8261 {
8262 name: "ORQconstmodify",
8263 auxType: auxSymValAndOff,
8264 argLen: 2,
8265 clobberFlags: true,
8266 faultOnNilArg0: true,
8267 symEffect: SymRead | SymWrite,
8268 asm: x86.AORQ,
8269 reg: regInfo{
8270 inputs: []inputInfo{
8271 {0, 4295032831},
8272 },
8273 },
8274 },
8275 {
8276 name: "ORLconstmodify",
8277 auxType: auxSymValAndOff,
8278 argLen: 2,
8279 clobberFlags: true,
8280 faultOnNilArg0: true,
8281 symEffect: SymRead | SymWrite,
8282 asm: x86.AORL,
8283 reg: regInfo{
8284 inputs: []inputInfo{
8285 {0, 4295032831},
8286 },
8287 },
8288 },
8289 {
8290 name: "XORQ",
8291 argLen: 2,
8292 commutative: true,
8293 resultInArg0: true,
8294 clobberFlags: true,
8295 asm: x86.AXORQ,
8296 reg: regInfo{
8297 inputs: []inputInfo{
8298 {0, 49135},
8299 {1, 49135},
8300 },
8301 outputs: []outputInfo{
8302 {0, 49135},
8303 },
8304 },
8305 },
8306 {
8307 name: "XORL",
8308 argLen: 2,
8309 commutative: true,
8310 resultInArg0: true,
8311 clobberFlags: true,
8312 asm: x86.AXORL,
8313 reg: regInfo{
8314 inputs: []inputInfo{
8315 {0, 49135},
8316 {1, 49135},
8317 },
8318 outputs: []outputInfo{
8319 {0, 49135},
8320 },
8321 },
8322 },
8323 {
8324 name: "XORQconst",
8325 auxType: auxInt32,
8326 argLen: 1,
8327 resultInArg0: true,
8328 clobberFlags: true,
8329 asm: x86.AXORQ,
8330 reg: regInfo{
8331 inputs: []inputInfo{
8332 {0, 49135},
8333 },
8334 outputs: []outputInfo{
8335 {0, 49135},
8336 },
8337 },
8338 },
8339 {
8340 name: "XORLconst",
8341 auxType: auxInt32,
8342 argLen: 1,
8343 resultInArg0: true,
8344 clobberFlags: true,
8345 asm: x86.AXORL,
8346 reg: regInfo{
8347 inputs: []inputInfo{
8348 {0, 49135},
8349 },
8350 outputs: []outputInfo{
8351 {0, 49135},
8352 },
8353 },
8354 },
8355 {
8356 name: "XORQconstmodify",
8357 auxType: auxSymValAndOff,
8358 argLen: 2,
8359 clobberFlags: true,
8360 faultOnNilArg0: true,
8361 symEffect: SymRead | SymWrite,
8362 asm: x86.AXORQ,
8363 reg: regInfo{
8364 inputs: []inputInfo{
8365 {0, 4295032831},
8366 },
8367 },
8368 },
8369 {
8370 name: "XORLconstmodify",
8371 auxType: auxSymValAndOff,
8372 argLen: 2,
8373 clobberFlags: true,
8374 faultOnNilArg0: true,
8375 symEffect: SymRead | SymWrite,
8376 asm: x86.AXORL,
8377 reg: regInfo{
8378 inputs: []inputInfo{
8379 {0, 4295032831},
8380 },
8381 },
8382 },
8383 {
8384 name: "CMPQ",
8385 argLen: 2,
8386 asm: x86.ACMPQ,
8387 reg: regInfo{
8388 inputs: []inputInfo{
8389 {0, 49151},
8390 {1, 49151},
8391 },
8392 },
8393 },
8394 {
8395 name: "CMPL",
8396 argLen: 2,
8397 asm: x86.ACMPL,
8398 reg: regInfo{
8399 inputs: []inputInfo{
8400 {0, 49151},
8401 {1, 49151},
8402 },
8403 },
8404 },
8405 {
8406 name: "CMPW",
8407 argLen: 2,
8408 asm: x86.ACMPW,
8409 reg: regInfo{
8410 inputs: []inputInfo{
8411 {0, 49151},
8412 {1, 49151},
8413 },
8414 },
8415 },
8416 {
8417 name: "CMPB",
8418 argLen: 2,
8419 asm: x86.ACMPB,
8420 reg: regInfo{
8421 inputs: []inputInfo{
8422 {0, 49151},
8423 {1, 49151},
8424 },
8425 },
8426 },
8427 {
8428 name: "CMPQconst",
8429 auxType: auxInt32,
8430 argLen: 1,
8431 asm: x86.ACMPQ,
8432 reg: regInfo{
8433 inputs: []inputInfo{
8434 {0, 49151},
8435 },
8436 },
8437 },
8438 {
8439 name: "CMPLconst",
8440 auxType: auxInt32,
8441 argLen: 1,
8442 asm: x86.ACMPL,
8443 reg: regInfo{
8444 inputs: []inputInfo{
8445 {0, 49151},
8446 },
8447 },
8448 },
8449 {
8450 name: "CMPWconst",
8451 auxType: auxInt16,
8452 argLen: 1,
8453 asm: x86.ACMPW,
8454 reg: regInfo{
8455 inputs: []inputInfo{
8456 {0, 49151},
8457 },
8458 },
8459 },
8460 {
8461 name: "CMPBconst",
8462 auxType: auxInt8,
8463 argLen: 1,
8464 asm: x86.ACMPB,
8465 reg: regInfo{
8466 inputs: []inputInfo{
8467 {0, 49151},
8468 },
8469 },
8470 },
8471 {
8472 name: "CMPQload",
8473 auxType: auxSymOff,
8474 argLen: 3,
8475 faultOnNilArg0: true,
8476 symEffect: SymRead,
8477 asm: x86.ACMPQ,
8478 reg: regInfo{
8479 inputs: []inputInfo{
8480 {1, 49151},
8481 {0, 4295032831},
8482 },
8483 },
8484 },
8485 {
8486 name: "CMPLload",
8487 auxType: auxSymOff,
8488 argLen: 3,
8489 faultOnNilArg0: true,
8490 symEffect: SymRead,
8491 asm: x86.ACMPL,
8492 reg: regInfo{
8493 inputs: []inputInfo{
8494 {1, 49151},
8495 {0, 4295032831},
8496 },
8497 },
8498 },
8499 {
8500 name: "CMPWload",
8501 auxType: auxSymOff,
8502 argLen: 3,
8503 faultOnNilArg0: true,
8504 symEffect: SymRead,
8505 asm: x86.ACMPW,
8506 reg: regInfo{
8507 inputs: []inputInfo{
8508 {1, 49151},
8509 {0, 4295032831},
8510 },
8511 },
8512 },
8513 {
8514 name: "CMPBload",
8515 auxType: auxSymOff,
8516 argLen: 3,
8517 faultOnNilArg0: true,
8518 symEffect: SymRead,
8519 asm: x86.ACMPB,
8520 reg: regInfo{
8521 inputs: []inputInfo{
8522 {1, 49151},
8523 {0, 4295032831},
8524 },
8525 },
8526 },
8527 {
8528 name: "CMPQconstload",
8529 auxType: auxSymValAndOff,
8530 argLen: 2,
8531 faultOnNilArg0: true,
8532 symEffect: SymRead,
8533 asm: x86.ACMPQ,
8534 reg: regInfo{
8535 inputs: []inputInfo{
8536 {0, 4295032831},
8537 },
8538 },
8539 },
8540 {
8541 name: "CMPLconstload",
8542 auxType: auxSymValAndOff,
8543 argLen: 2,
8544 faultOnNilArg0: true,
8545 symEffect: SymRead,
8546 asm: x86.ACMPL,
8547 reg: regInfo{
8548 inputs: []inputInfo{
8549 {0, 4295032831},
8550 },
8551 },
8552 },
8553 {
8554 name: "CMPWconstload",
8555 auxType: auxSymValAndOff,
8556 argLen: 2,
8557 faultOnNilArg0: true,
8558 symEffect: SymRead,
8559 asm: x86.ACMPW,
8560 reg: regInfo{
8561 inputs: []inputInfo{
8562 {0, 4295032831},
8563 },
8564 },
8565 },
8566 {
8567 name: "CMPBconstload",
8568 auxType: auxSymValAndOff,
8569 argLen: 2,
8570 faultOnNilArg0: true,
8571 symEffect: SymRead,
8572 asm: x86.ACMPB,
8573 reg: regInfo{
8574 inputs: []inputInfo{
8575 {0, 4295032831},
8576 },
8577 },
8578 },
8579 {
8580 name: "CMPQloadidx8",
8581 auxType: auxSymOff,
8582 argLen: 4,
8583 symEffect: SymRead,
8584 asm: x86.ACMPQ,
8585 scale: 8,
8586 reg: regInfo{
8587 inputs: []inputInfo{
8588 {1, 49151},
8589 {2, 49151},
8590 {0, 4295032831},
8591 },
8592 },
8593 },
8594 {
8595 name: "CMPQloadidx1",
8596 auxType: auxSymOff,
8597 argLen: 4,
8598 commutative: true,
8599 symEffect: SymRead,
8600 asm: x86.ACMPQ,
8601 scale: 1,
8602 reg: regInfo{
8603 inputs: []inputInfo{
8604 {1, 49151},
8605 {2, 49151},
8606 {0, 4295032831},
8607 },
8608 },
8609 },
8610 {
8611 name: "CMPLloadidx4",
8612 auxType: auxSymOff,
8613 argLen: 4,
8614 symEffect: SymRead,
8615 asm: x86.ACMPL,
8616 scale: 4,
8617 reg: regInfo{
8618 inputs: []inputInfo{
8619 {1, 49151},
8620 {2, 49151},
8621 {0, 4295032831},
8622 },
8623 },
8624 },
8625 {
8626 name: "CMPLloadidx1",
8627 auxType: auxSymOff,
8628 argLen: 4,
8629 commutative: true,
8630 symEffect: SymRead,
8631 asm: x86.ACMPL,
8632 scale: 1,
8633 reg: regInfo{
8634 inputs: []inputInfo{
8635 {1, 49151},
8636 {2, 49151},
8637 {0, 4295032831},
8638 },
8639 },
8640 },
8641 {
8642 name: "CMPWloadidx2",
8643 auxType: auxSymOff,
8644 argLen: 4,
8645 symEffect: SymRead,
8646 asm: x86.ACMPW,
8647 scale: 2,
8648 reg: regInfo{
8649 inputs: []inputInfo{
8650 {1, 49151},
8651 {2, 49151},
8652 {0, 4295032831},
8653 },
8654 },
8655 },
8656 {
8657 name: "CMPWloadidx1",
8658 auxType: auxSymOff,
8659 argLen: 4,
8660 commutative: true,
8661 symEffect: SymRead,
8662 asm: x86.ACMPW,
8663 scale: 1,
8664 reg: regInfo{
8665 inputs: []inputInfo{
8666 {1, 49151},
8667 {2, 49151},
8668 {0, 4295032831},
8669 },
8670 },
8671 },
8672 {
8673 name: "CMPBloadidx1",
8674 auxType: auxSymOff,
8675 argLen: 4,
8676 commutative: true,
8677 symEffect: SymRead,
8678 asm: x86.ACMPB,
8679 scale: 1,
8680 reg: regInfo{
8681 inputs: []inputInfo{
8682 {1, 49151},
8683 {2, 49151},
8684 {0, 4295032831},
8685 },
8686 },
8687 },
8688 {
8689 name: "CMPQconstloadidx8",
8690 auxType: auxSymValAndOff,
8691 argLen: 3,
8692 symEffect: SymRead,
8693 asm: x86.ACMPQ,
8694 scale: 8,
8695 reg: regInfo{
8696 inputs: []inputInfo{
8697 {1, 49151},
8698 {0, 4295032831},
8699 },
8700 },
8701 },
8702 {
8703 name: "CMPQconstloadidx1",
8704 auxType: auxSymValAndOff,
8705 argLen: 3,
8706 commutative: true,
8707 symEffect: SymRead,
8708 asm: x86.ACMPQ,
8709 scale: 1,
8710 reg: regInfo{
8711 inputs: []inputInfo{
8712 {1, 49151},
8713 {0, 4295032831},
8714 },
8715 },
8716 },
8717 {
8718 name: "CMPLconstloadidx4",
8719 auxType: auxSymValAndOff,
8720 argLen: 3,
8721 symEffect: SymRead,
8722 asm: x86.ACMPL,
8723 scale: 4,
8724 reg: regInfo{
8725 inputs: []inputInfo{
8726 {1, 49151},
8727 {0, 4295032831},
8728 },
8729 },
8730 },
8731 {
8732 name: "CMPLconstloadidx1",
8733 auxType: auxSymValAndOff,
8734 argLen: 3,
8735 commutative: true,
8736 symEffect: SymRead,
8737 asm: x86.ACMPL,
8738 scale: 1,
8739 reg: regInfo{
8740 inputs: []inputInfo{
8741 {1, 49151},
8742 {0, 4295032831},
8743 },
8744 },
8745 },
8746 {
8747 name: "CMPWconstloadidx2",
8748 auxType: auxSymValAndOff,
8749 argLen: 3,
8750 symEffect: SymRead,
8751 asm: x86.ACMPW,
8752 scale: 2,
8753 reg: regInfo{
8754 inputs: []inputInfo{
8755 {1, 49151},
8756 {0, 4295032831},
8757 },
8758 },
8759 },
8760 {
8761 name: "CMPWconstloadidx1",
8762 auxType: auxSymValAndOff,
8763 argLen: 3,
8764 commutative: true,
8765 symEffect: SymRead,
8766 asm: x86.ACMPW,
8767 scale: 1,
8768 reg: regInfo{
8769 inputs: []inputInfo{
8770 {1, 49151},
8771 {0, 4295032831},
8772 },
8773 },
8774 },
8775 {
8776 name: "CMPBconstloadidx1",
8777 auxType: auxSymValAndOff,
8778 argLen: 3,
8779 commutative: true,
8780 symEffect: SymRead,
8781 asm: x86.ACMPB,
8782 scale: 1,
8783 reg: regInfo{
8784 inputs: []inputInfo{
8785 {1, 49151},
8786 {0, 4295032831},
8787 },
8788 },
8789 },
8790 {
8791 name: "UCOMISS",
8792 argLen: 2,
8793 asm: x86.AUCOMISS,
8794 reg: regInfo{
8795 inputs: []inputInfo{
8796 {0, 2147418112},
8797 {1, 2147418112},
8798 },
8799 },
8800 },
8801 {
8802 name: "UCOMISD",
8803 argLen: 2,
8804 asm: x86.AUCOMISD,
8805 reg: regInfo{
8806 inputs: []inputInfo{
8807 {0, 2147418112},
8808 {1, 2147418112},
8809 },
8810 },
8811 },
8812 {
8813 name: "BTL",
8814 argLen: 2,
8815 asm: x86.ABTL,
8816 reg: regInfo{
8817 inputs: []inputInfo{
8818 {0, 49151},
8819 {1, 49151},
8820 },
8821 },
8822 },
8823 {
8824 name: "BTQ",
8825 argLen: 2,
8826 asm: x86.ABTQ,
8827 reg: regInfo{
8828 inputs: []inputInfo{
8829 {0, 49151},
8830 {1, 49151},
8831 },
8832 },
8833 },
8834 {
8835 name: "BTCL",
8836 argLen: 2,
8837 resultInArg0: true,
8838 clobberFlags: true,
8839 asm: x86.ABTCL,
8840 reg: regInfo{
8841 inputs: []inputInfo{
8842 {0, 49135},
8843 {1, 49135},
8844 },
8845 outputs: []outputInfo{
8846 {0, 49135},
8847 },
8848 },
8849 },
8850 {
8851 name: "BTCQ",
8852 argLen: 2,
8853 resultInArg0: true,
8854 clobberFlags: true,
8855 asm: x86.ABTCQ,
8856 reg: regInfo{
8857 inputs: []inputInfo{
8858 {0, 49135},
8859 {1, 49135},
8860 },
8861 outputs: []outputInfo{
8862 {0, 49135},
8863 },
8864 },
8865 },
8866 {
8867 name: "BTRL",
8868 argLen: 2,
8869 resultInArg0: true,
8870 clobberFlags: true,
8871 asm: x86.ABTRL,
8872 reg: regInfo{
8873 inputs: []inputInfo{
8874 {0, 49135},
8875 {1, 49135},
8876 },
8877 outputs: []outputInfo{
8878 {0, 49135},
8879 },
8880 },
8881 },
8882 {
8883 name: "BTRQ",
8884 argLen: 2,
8885 resultInArg0: true,
8886 clobberFlags: true,
8887 asm: x86.ABTRQ,
8888 reg: regInfo{
8889 inputs: []inputInfo{
8890 {0, 49135},
8891 {1, 49135},
8892 },
8893 outputs: []outputInfo{
8894 {0, 49135},
8895 },
8896 },
8897 },
8898 {
8899 name: "BTSL",
8900 argLen: 2,
8901 resultInArg0: true,
8902 clobberFlags: true,
8903 asm: x86.ABTSL,
8904 reg: regInfo{
8905 inputs: []inputInfo{
8906 {0, 49135},
8907 {1, 49135},
8908 },
8909 outputs: []outputInfo{
8910 {0, 49135},
8911 },
8912 },
8913 },
8914 {
8915 name: "BTSQ",
8916 argLen: 2,
8917 resultInArg0: true,
8918 clobberFlags: true,
8919 asm: x86.ABTSQ,
8920 reg: regInfo{
8921 inputs: []inputInfo{
8922 {0, 49135},
8923 {1, 49135},
8924 },
8925 outputs: []outputInfo{
8926 {0, 49135},
8927 },
8928 },
8929 },
8930 {
8931 name: "BTLconst",
8932 auxType: auxInt8,
8933 argLen: 1,
8934 asm: x86.ABTL,
8935 reg: regInfo{
8936 inputs: []inputInfo{
8937 {0, 49151},
8938 },
8939 },
8940 },
8941 {
8942 name: "BTQconst",
8943 auxType: auxInt8,
8944 argLen: 1,
8945 asm: x86.ABTQ,
8946 reg: regInfo{
8947 inputs: []inputInfo{
8948 {0, 49151},
8949 },
8950 },
8951 },
8952 {
8953 name: "BTCQconst",
8954 auxType: auxInt8,
8955 argLen: 1,
8956 resultInArg0: true,
8957 clobberFlags: true,
8958 asm: x86.ABTCQ,
8959 reg: regInfo{
8960 inputs: []inputInfo{
8961 {0, 49135},
8962 },
8963 outputs: []outputInfo{
8964 {0, 49135},
8965 },
8966 },
8967 },
8968 {
8969 name: "BTRQconst",
8970 auxType: auxInt8,
8971 argLen: 1,
8972 resultInArg0: true,
8973 clobberFlags: true,
8974 asm: x86.ABTRQ,
8975 reg: regInfo{
8976 inputs: []inputInfo{
8977 {0, 49135},
8978 },
8979 outputs: []outputInfo{
8980 {0, 49135},
8981 },
8982 },
8983 },
8984 {
8985 name: "BTSQconst",
8986 auxType: auxInt8,
8987 argLen: 1,
8988 resultInArg0: true,
8989 clobberFlags: true,
8990 asm: x86.ABTSQ,
8991 reg: regInfo{
8992 inputs: []inputInfo{
8993 {0, 49135},
8994 },
8995 outputs: []outputInfo{
8996 {0, 49135},
8997 },
8998 },
8999 },
9000 {
9001 name: "BTSQconstmodify",
9002 auxType: auxSymValAndOff,
9003 argLen: 2,
9004 clobberFlags: true,
9005 faultOnNilArg0: true,
9006 symEffect: SymRead | SymWrite,
9007 asm: x86.ABTSQ,
9008 reg: regInfo{
9009 inputs: []inputInfo{
9010 {0, 4295032831},
9011 },
9012 },
9013 },
9014 {
9015 name: "BTRQconstmodify",
9016 auxType: auxSymValAndOff,
9017 argLen: 2,
9018 clobberFlags: true,
9019 faultOnNilArg0: true,
9020 symEffect: SymRead | SymWrite,
9021 asm: x86.ABTRQ,
9022 reg: regInfo{
9023 inputs: []inputInfo{
9024 {0, 4295032831},
9025 },
9026 },
9027 },
9028 {
9029 name: "BTCQconstmodify",
9030 auxType: auxSymValAndOff,
9031 argLen: 2,
9032 clobberFlags: true,
9033 faultOnNilArg0: true,
9034 symEffect: SymRead | SymWrite,
9035 asm: x86.ABTCQ,
9036 reg: regInfo{
9037 inputs: []inputInfo{
9038 {0, 4295032831},
9039 },
9040 },
9041 },
9042 {
9043 name: "TESTQ",
9044 argLen: 2,
9045 commutative: true,
9046 asm: x86.ATESTQ,
9047 reg: regInfo{
9048 inputs: []inputInfo{
9049 {0, 49151},
9050 {1, 49151},
9051 },
9052 },
9053 },
9054 {
9055 name: "TESTL",
9056 argLen: 2,
9057 commutative: true,
9058 asm: x86.ATESTL,
9059 reg: regInfo{
9060 inputs: []inputInfo{
9061 {0, 49151},
9062 {1, 49151},
9063 },
9064 },
9065 },
9066 {
9067 name: "TESTW",
9068 argLen: 2,
9069 commutative: true,
9070 asm: x86.ATESTW,
9071 reg: regInfo{
9072 inputs: []inputInfo{
9073 {0, 49151},
9074 {1, 49151},
9075 },
9076 },
9077 },
9078 {
9079 name: "TESTB",
9080 argLen: 2,
9081 commutative: true,
9082 asm: x86.ATESTB,
9083 reg: regInfo{
9084 inputs: []inputInfo{
9085 {0, 49151},
9086 {1, 49151},
9087 },
9088 },
9089 },
9090 {
9091 name: "TESTQconst",
9092 auxType: auxInt32,
9093 argLen: 1,
9094 asm: x86.ATESTQ,
9095 reg: regInfo{
9096 inputs: []inputInfo{
9097 {0, 49151},
9098 },
9099 },
9100 },
9101 {
9102 name: "TESTLconst",
9103 auxType: auxInt32,
9104 argLen: 1,
9105 asm: x86.ATESTL,
9106 reg: regInfo{
9107 inputs: []inputInfo{
9108 {0, 49151},
9109 },
9110 },
9111 },
9112 {
9113 name: "TESTWconst",
9114 auxType: auxInt16,
9115 argLen: 1,
9116 asm: x86.ATESTW,
9117 reg: regInfo{
9118 inputs: []inputInfo{
9119 {0, 49151},
9120 },
9121 },
9122 },
9123 {
9124 name: "TESTBconst",
9125 auxType: auxInt8,
9126 argLen: 1,
9127 asm: x86.ATESTB,
9128 reg: regInfo{
9129 inputs: []inputInfo{
9130 {0, 49151},
9131 },
9132 },
9133 },
9134 {
9135 name: "SHLQ",
9136 argLen: 2,
9137 resultInArg0: true,
9138 clobberFlags: true,
9139 asm: x86.ASHLQ,
9140 reg: regInfo{
9141 inputs: []inputInfo{
9142 {1, 2},
9143 {0, 49135},
9144 },
9145 outputs: []outputInfo{
9146 {0, 49135},
9147 },
9148 },
9149 },
9150 {
9151 name: "SHLL",
9152 argLen: 2,
9153 resultInArg0: true,
9154 clobberFlags: true,
9155 asm: x86.ASHLL,
9156 reg: regInfo{
9157 inputs: []inputInfo{
9158 {1, 2},
9159 {0, 49135},
9160 },
9161 outputs: []outputInfo{
9162 {0, 49135},
9163 },
9164 },
9165 },
9166 {
9167 name: "SHLQconst",
9168 auxType: auxInt8,
9169 argLen: 1,
9170 resultInArg0: true,
9171 clobberFlags: true,
9172 asm: x86.ASHLQ,
9173 reg: regInfo{
9174 inputs: []inputInfo{
9175 {0, 49135},
9176 },
9177 outputs: []outputInfo{
9178 {0, 49135},
9179 },
9180 },
9181 },
9182 {
9183 name: "SHLLconst",
9184 auxType: auxInt8,
9185 argLen: 1,
9186 resultInArg0: true,
9187 clobberFlags: true,
9188 asm: x86.ASHLL,
9189 reg: regInfo{
9190 inputs: []inputInfo{
9191 {0, 49135},
9192 },
9193 outputs: []outputInfo{
9194 {0, 49135},
9195 },
9196 },
9197 },
9198 {
9199 name: "SHRQ",
9200 argLen: 2,
9201 resultInArg0: true,
9202 clobberFlags: true,
9203 asm: x86.ASHRQ,
9204 reg: regInfo{
9205 inputs: []inputInfo{
9206 {1, 2},
9207 {0, 49135},
9208 },
9209 outputs: []outputInfo{
9210 {0, 49135},
9211 },
9212 },
9213 },
9214 {
9215 name: "SHRL",
9216 argLen: 2,
9217 resultInArg0: true,
9218 clobberFlags: true,
9219 asm: x86.ASHRL,
9220 reg: regInfo{
9221 inputs: []inputInfo{
9222 {1, 2},
9223 {0, 49135},
9224 },
9225 outputs: []outputInfo{
9226 {0, 49135},
9227 },
9228 },
9229 },
9230 {
9231 name: "SHRW",
9232 argLen: 2,
9233 resultInArg0: true,
9234 clobberFlags: true,
9235 asm: x86.ASHRW,
9236 reg: regInfo{
9237 inputs: []inputInfo{
9238 {1, 2},
9239 {0, 49135},
9240 },
9241 outputs: []outputInfo{
9242 {0, 49135},
9243 },
9244 },
9245 },
9246 {
9247 name: "SHRB",
9248 argLen: 2,
9249 resultInArg0: true,
9250 clobberFlags: true,
9251 asm: x86.ASHRB,
9252 reg: regInfo{
9253 inputs: []inputInfo{
9254 {1, 2},
9255 {0, 49135},
9256 },
9257 outputs: []outputInfo{
9258 {0, 49135},
9259 },
9260 },
9261 },
9262 {
9263 name: "SHRQconst",
9264 auxType: auxInt8,
9265 argLen: 1,
9266 resultInArg0: true,
9267 clobberFlags: true,
9268 asm: x86.ASHRQ,
9269 reg: regInfo{
9270 inputs: []inputInfo{
9271 {0, 49135},
9272 },
9273 outputs: []outputInfo{
9274 {0, 49135},
9275 },
9276 },
9277 },
9278 {
9279 name: "SHRLconst",
9280 auxType: auxInt8,
9281 argLen: 1,
9282 resultInArg0: true,
9283 clobberFlags: true,
9284 asm: x86.ASHRL,
9285 reg: regInfo{
9286 inputs: []inputInfo{
9287 {0, 49135},
9288 },
9289 outputs: []outputInfo{
9290 {0, 49135},
9291 },
9292 },
9293 },
9294 {
9295 name: "SHRWconst",
9296 auxType: auxInt8,
9297 argLen: 1,
9298 resultInArg0: true,
9299 clobberFlags: true,
9300 asm: x86.ASHRW,
9301 reg: regInfo{
9302 inputs: []inputInfo{
9303 {0, 49135},
9304 },
9305 outputs: []outputInfo{
9306 {0, 49135},
9307 },
9308 },
9309 },
9310 {
9311 name: "SHRBconst",
9312 auxType: auxInt8,
9313 argLen: 1,
9314 resultInArg0: true,
9315 clobberFlags: true,
9316 asm: x86.ASHRB,
9317 reg: regInfo{
9318 inputs: []inputInfo{
9319 {0, 49135},
9320 },
9321 outputs: []outputInfo{
9322 {0, 49135},
9323 },
9324 },
9325 },
9326 {
9327 name: "SARQ",
9328 argLen: 2,
9329 resultInArg0: true,
9330 clobberFlags: true,
9331 asm: x86.ASARQ,
9332 reg: regInfo{
9333 inputs: []inputInfo{
9334 {1, 2},
9335 {0, 49135},
9336 },
9337 outputs: []outputInfo{
9338 {0, 49135},
9339 },
9340 },
9341 },
9342 {
9343 name: "SARL",
9344 argLen: 2,
9345 resultInArg0: true,
9346 clobberFlags: true,
9347 asm: x86.ASARL,
9348 reg: regInfo{
9349 inputs: []inputInfo{
9350 {1, 2},
9351 {0, 49135},
9352 },
9353 outputs: []outputInfo{
9354 {0, 49135},
9355 },
9356 },
9357 },
9358 {
9359 name: "SARW",
9360 argLen: 2,
9361 resultInArg0: true,
9362 clobberFlags: true,
9363 asm: x86.ASARW,
9364 reg: regInfo{
9365 inputs: []inputInfo{
9366 {1, 2},
9367 {0, 49135},
9368 },
9369 outputs: []outputInfo{
9370 {0, 49135},
9371 },
9372 },
9373 },
9374 {
9375 name: "SARB",
9376 argLen: 2,
9377 resultInArg0: true,
9378 clobberFlags: true,
9379 asm: x86.ASARB,
9380 reg: regInfo{
9381 inputs: []inputInfo{
9382 {1, 2},
9383 {0, 49135},
9384 },
9385 outputs: []outputInfo{
9386 {0, 49135},
9387 },
9388 },
9389 },
9390 {
9391 name: "SARQconst",
9392 auxType: auxInt8,
9393 argLen: 1,
9394 resultInArg0: true,
9395 clobberFlags: true,
9396 asm: x86.ASARQ,
9397 reg: regInfo{
9398 inputs: []inputInfo{
9399 {0, 49135},
9400 },
9401 outputs: []outputInfo{
9402 {0, 49135},
9403 },
9404 },
9405 },
9406 {
9407 name: "SARLconst",
9408 auxType: auxInt8,
9409 argLen: 1,
9410 resultInArg0: true,
9411 clobberFlags: true,
9412 asm: x86.ASARL,
9413 reg: regInfo{
9414 inputs: []inputInfo{
9415 {0, 49135},
9416 },
9417 outputs: []outputInfo{
9418 {0, 49135},
9419 },
9420 },
9421 },
9422 {
9423 name: "SARWconst",
9424 auxType: auxInt8,
9425 argLen: 1,
9426 resultInArg0: true,
9427 clobberFlags: true,
9428 asm: x86.ASARW,
9429 reg: regInfo{
9430 inputs: []inputInfo{
9431 {0, 49135},
9432 },
9433 outputs: []outputInfo{
9434 {0, 49135},
9435 },
9436 },
9437 },
9438 {
9439 name: "SARBconst",
9440 auxType: auxInt8,
9441 argLen: 1,
9442 resultInArg0: true,
9443 clobberFlags: true,
9444 asm: x86.ASARB,
9445 reg: regInfo{
9446 inputs: []inputInfo{
9447 {0, 49135},
9448 },
9449 outputs: []outputInfo{
9450 {0, 49135},
9451 },
9452 },
9453 },
9454 {
9455 name: "SHRDQ",
9456 argLen: 3,
9457 resultInArg0: true,
9458 clobberFlags: true,
9459 asm: x86.ASHRQ,
9460 reg: regInfo{
9461 inputs: []inputInfo{
9462 {2, 2},
9463 {0, 49135},
9464 {1, 49135},
9465 },
9466 outputs: []outputInfo{
9467 {0, 49135},
9468 },
9469 },
9470 },
9471 {
9472 name: "SHLDQ",
9473 argLen: 3,
9474 resultInArg0: true,
9475 clobberFlags: true,
9476 asm: x86.ASHLQ,
9477 reg: regInfo{
9478 inputs: []inputInfo{
9479 {2, 2},
9480 {0, 49135},
9481 {1, 49135},
9482 },
9483 outputs: []outputInfo{
9484 {0, 49135},
9485 },
9486 },
9487 },
9488 {
9489 name: "ROLQ",
9490 argLen: 2,
9491 resultInArg0: true,
9492 clobberFlags: true,
9493 asm: x86.AROLQ,
9494 reg: regInfo{
9495 inputs: []inputInfo{
9496 {1, 2},
9497 {0, 49135},
9498 },
9499 outputs: []outputInfo{
9500 {0, 49135},
9501 },
9502 },
9503 },
9504 {
9505 name: "ROLL",
9506 argLen: 2,
9507 resultInArg0: true,
9508 clobberFlags: true,
9509 asm: x86.AROLL,
9510 reg: regInfo{
9511 inputs: []inputInfo{
9512 {1, 2},
9513 {0, 49135},
9514 },
9515 outputs: []outputInfo{
9516 {0, 49135},
9517 },
9518 },
9519 },
9520 {
9521 name: "ROLW",
9522 argLen: 2,
9523 resultInArg0: true,
9524 clobberFlags: true,
9525 asm: x86.AROLW,
9526 reg: regInfo{
9527 inputs: []inputInfo{
9528 {1, 2},
9529 {0, 49135},
9530 },
9531 outputs: []outputInfo{
9532 {0, 49135},
9533 },
9534 },
9535 },
9536 {
9537 name: "ROLB",
9538 argLen: 2,
9539 resultInArg0: true,
9540 clobberFlags: true,
9541 asm: x86.AROLB,
9542 reg: regInfo{
9543 inputs: []inputInfo{
9544 {1, 2},
9545 {0, 49135},
9546 },
9547 outputs: []outputInfo{
9548 {0, 49135},
9549 },
9550 },
9551 },
9552 {
9553 name: "RORQ",
9554 argLen: 2,
9555 resultInArg0: true,
9556 clobberFlags: true,
9557 asm: x86.ARORQ,
9558 reg: regInfo{
9559 inputs: []inputInfo{
9560 {1, 2},
9561 {0, 49135},
9562 },
9563 outputs: []outputInfo{
9564 {0, 49135},
9565 },
9566 },
9567 },
9568 {
9569 name: "RORL",
9570 argLen: 2,
9571 resultInArg0: true,
9572 clobberFlags: true,
9573 asm: x86.ARORL,
9574 reg: regInfo{
9575 inputs: []inputInfo{
9576 {1, 2},
9577 {0, 49135},
9578 },
9579 outputs: []outputInfo{
9580 {0, 49135},
9581 },
9582 },
9583 },
9584 {
9585 name: "RORW",
9586 argLen: 2,
9587 resultInArg0: true,
9588 clobberFlags: true,
9589 asm: x86.ARORW,
9590 reg: regInfo{
9591 inputs: []inputInfo{
9592 {1, 2},
9593 {0, 49135},
9594 },
9595 outputs: []outputInfo{
9596 {0, 49135},
9597 },
9598 },
9599 },
9600 {
9601 name: "RORB",
9602 argLen: 2,
9603 resultInArg0: true,
9604 clobberFlags: true,
9605 asm: x86.ARORB,
9606 reg: regInfo{
9607 inputs: []inputInfo{
9608 {1, 2},
9609 {0, 49135},
9610 },
9611 outputs: []outputInfo{
9612 {0, 49135},
9613 },
9614 },
9615 },
9616 {
9617 name: "ROLQconst",
9618 auxType: auxInt8,
9619 argLen: 1,
9620 resultInArg0: true,
9621 clobberFlags: true,
9622 asm: x86.AROLQ,
9623 reg: regInfo{
9624 inputs: []inputInfo{
9625 {0, 49135},
9626 },
9627 outputs: []outputInfo{
9628 {0, 49135},
9629 },
9630 },
9631 },
9632 {
9633 name: "ROLLconst",
9634 auxType: auxInt8,
9635 argLen: 1,
9636 resultInArg0: true,
9637 clobberFlags: true,
9638 asm: x86.AROLL,
9639 reg: regInfo{
9640 inputs: []inputInfo{
9641 {0, 49135},
9642 },
9643 outputs: []outputInfo{
9644 {0, 49135},
9645 },
9646 },
9647 },
9648 {
9649 name: "ROLWconst",
9650 auxType: auxInt8,
9651 argLen: 1,
9652 resultInArg0: true,
9653 clobberFlags: true,
9654 asm: x86.AROLW,
9655 reg: regInfo{
9656 inputs: []inputInfo{
9657 {0, 49135},
9658 },
9659 outputs: []outputInfo{
9660 {0, 49135},
9661 },
9662 },
9663 },
9664 {
9665 name: "ROLBconst",
9666 auxType: auxInt8,
9667 argLen: 1,
9668 resultInArg0: true,
9669 clobberFlags: true,
9670 asm: x86.AROLB,
9671 reg: regInfo{
9672 inputs: []inputInfo{
9673 {0, 49135},
9674 },
9675 outputs: []outputInfo{
9676 {0, 49135},
9677 },
9678 },
9679 },
9680 {
9681 name: "ADDLload",
9682 auxType: auxSymOff,
9683 argLen: 3,
9684 resultInArg0: true,
9685 clobberFlags: true,
9686 faultOnNilArg1: true,
9687 symEffect: SymRead,
9688 asm: x86.AADDL,
9689 reg: regInfo{
9690 inputs: []inputInfo{
9691 {0, 49135},
9692 {1, 4295032831},
9693 },
9694 outputs: []outputInfo{
9695 {0, 49135},
9696 },
9697 },
9698 },
9699 {
9700 name: "ADDQload",
9701 auxType: auxSymOff,
9702 argLen: 3,
9703 resultInArg0: true,
9704 clobberFlags: true,
9705 faultOnNilArg1: true,
9706 symEffect: SymRead,
9707 asm: x86.AADDQ,
9708 reg: regInfo{
9709 inputs: []inputInfo{
9710 {0, 49135},
9711 {1, 4295032831},
9712 },
9713 outputs: []outputInfo{
9714 {0, 49135},
9715 },
9716 },
9717 },
9718 {
9719 name: "SUBQload",
9720 auxType: auxSymOff,
9721 argLen: 3,
9722 resultInArg0: true,
9723 clobberFlags: true,
9724 faultOnNilArg1: true,
9725 symEffect: SymRead,
9726 asm: x86.ASUBQ,
9727 reg: regInfo{
9728 inputs: []inputInfo{
9729 {0, 49135},
9730 {1, 4295032831},
9731 },
9732 outputs: []outputInfo{
9733 {0, 49135},
9734 },
9735 },
9736 },
9737 {
9738 name: "SUBLload",
9739 auxType: auxSymOff,
9740 argLen: 3,
9741 resultInArg0: true,
9742 clobberFlags: true,
9743 faultOnNilArg1: true,
9744 symEffect: SymRead,
9745 asm: x86.ASUBL,
9746 reg: regInfo{
9747 inputs: []inputInfo{
9748 {0, 49135},
9749 {1, 4295032831},
9750 },
9751 outputs: []outputInfo{
9752 {0, 49135},
9753 },
9754 },
9755 },
9756 {
9757 name: "ANDLload",
9758 auxType: auxSymOff,
9759 argLen: 3,
9760 resultInArg0: true,
9761 clobberFlags: true,
9762 faultOnNilArg1: true,
9763 symEffect: SymRead,
9764 asm: x86.AANDL,
9765 reg: regInfo{
9766 inputs: []inputInfo{
9767 {0, 49135},
9768 {1, 4295032831},
9769 },
9770 outputs: []outputInfo{
9771 {0, 49135},
9772 },
9773 },
9774 },
9775 {
9776 name: "ANDQload",
9777 auxType: auxSymOff,
9778 argLen: 3,
9779 resultInArg0: true,
9780 clobberFlags: true,
9781 faultOnNilArg1: true,
9782 symEffect: SymRead,
9783 asm: x86.AANDQ,
9784 reg: regInfo{
9785 inputs: []inputInfo{
9786 {0, 49135},
9787 {1, 4295032831},
9788 },
9789 outputs: []outputInfo{
9790 {0, 49135},
9791 },
9792 },
9793 },
9794 {
9795 name: "ORQload",
9796 auxType: auxSymOff,
9797 argLen: 3,
9798 resultInArg0: true,
9799 clobberFlags: true,
9800 faultOnNilArg1: true,
9801 symEffect: SymRead,
9802 asm: x86.AORQ,
9803 reg: regInfo{
9804 inputs: []inputInfo{
9805 {0, 49135},
9806 {1, 4295032831},
9807 },
9808 outputs: []outputInfo{
9809 {0, 49135},
9810 },
9811 },
9812 },
9813 {
9814 name: "ORLload",
9815 auxType: auxSymOff,
9816 argLen: 3,
9817 resultInArg0: true,
9818 clobberFlags: true,
9819 faultOnNilArg1: true,
9820 symEffect: SymRead,
9821 asm: x86.AORL,
9822 reg: regInfo{
9823 inputs: []inputInfo{
9824 {0, 49135},
9825 {1, 4295032831},
9826 },
9827 outputs: []outputInfo{
9828 {0, 49135},
9829 },
9830 },
9831 },
9832 {
9833 name: "XORQload",
9834 auxType: auxSymOff,
9835 argLen: 3,
9836 resultInArg0: true,
9837 clobberFlags: true,
9838 faultOnNilArg1: true,
9839 symEffect: SymRead,
9840 asm: x86.AXORQ,
9841 reg: regInfo{
9842 inputs: []inputInfo{
9843 {0, 49135},
9844 {1, 4295032831},
9845 },
9846 outputs: []outputInfo{
9847 {0, 49135},
9848 },
9849 },
9850 },
9851 {
9852 name: "XORLload",
9853 auxType: auxSymOff,
9854 argLen: 3,
9855 resultInArg0: true,
9856 clobberFlags: true,
9857 faultOnNilArg1: true,
9858 symEffect: SymRead,
9859 asm: x86.AXORL,
9860 reg: regInfo{
9861 inputs: []inputInfo{
9862 {0, 49135},
9863 {1, 4295032831},
9864 },
9865 outputs: []outputInfo{
9866 {0, 49135},
9867 },
9868 },
9869 },
9870 {
9871 name: "ADDLloadidx1",
9872 auxType: auxSymOff,
9873 argLen: 4,
9874 resultInArg0: true,
9875 clobberFlags: true,
9876 symEffect: SymRead,
9877 asm: x86.AADDL,
9878 scale: 1,
9879 reg: regInfo{
9880 inputs: []inputInfo{
9881 {0, 49135},
9882 {2, 49151},
9883 {1, 4295032831},
9884 },
9885 outputs: []outputInfo{
9886 {0, 49135},
9887 },
9888 },
9889 },
9890 {
9891 name: "ADDLloadidx4",
9892 auxType: auxSymOff,
9893 argLen: 4,
9894 resultInArg0: true,
9895 clobberFlags: true,
9896 symEffect: SymRead,
9897 asm: x86.AADDL,
9898 scale: 4,
9899 reg: regInfo{
9900 inputs: []inputInfo{
9901 {0, 49135},
9902 {2, 49151},
9903 {1, 4295032831},
9904 },
9905 outputs: []outputInfo{
9906 {0, 49135},
9907 },
9908 },
9909 },
9910 {
9911 name: "ADDLloadidx8",
9912 auxType: auxSymOff,
9913 argLen: 4,
9914 resultInArg0: true,
9915 clobberFlags: true,
9916 symEffect: SymRead,
9917 asm: x86.AADDL,
9918 scale: 8,
9919 reg: regInfo{
9920 inputs: []inputInfo{
9921 {0, 49135},
9922 {2, 49151},
9923 {1, 4295032831},
9924 },
9925 outputs: []outputInfo{
9926 {0, 49135},
9927 },
9928 },
9929 },
9930 {
9931 name: "ADDQloadidx1",
9932 auxType: auxSymOff,
9933 argLen: 4,
9934 resultInArg0: true,
9935 clobberFlags: true,
9936 symEffect: SymRead,
9937 asm: x86.AADDQ,
9938 scale: 1,
9939 reg: regInfo{
9940 inputs: []inputInfo{
9941 {0, 49135},
9942 {2, 49151},
9943 {1, 4295032831},
9944 },
9945 outputs: []outputInfo{
9946 {0, 49135},
9947 },
9948 },
9949 },
9950 {
9951 name: "ADDQloadidx8",
9952 auxType: auxSymOff,
9953 argLen: 4,
9954 resultInArg0: true,
9955 clobberFlags: true,
9956 symEffect: SymRead,
9957 asm: x86.AADDQ,
9958 scale: 8,
9959 reg: regInfo{
9960 inputs: []inputInfo{
9961 {0, 49135},
9962 {2, 49151},
9963 {1, 4295032831},
9964 },
9965 outputs: []outputInfo{
9966 {0, 49135},
9967 },
9968 },
9969 },
9970 {
9971 name: "SUBLloadidx1",
9972 auxType: auxSymOff,
9973 argLen: 4,
9974 resultInArg0: true,
9975 clobberFlags: true,
9976 symEffect: SymRead,
9977 asm: x86.ASUBL,
9978 scale: 1,
9979 reg: regInfo{
9980 inputs: []inputInfo{
9981 {0, 49135},
9982 {2, 49151},
9983 {1, 4295032831},
9984 },
9985 outputs: []outputInfo{
9986 {0, 49135},
9987 },
9988 },
9989 },
9990 {
9991 name: "SUBLloadidx4",
9992 auxType: auxSymOff,
9993 argLen: 4,
9994 resultInArg0: true,
9995 clobberFlags: true,
9996 symEffect: SymRead,
9997 asm: x86.ASUBL,
9998 scale: 4,
9999 reg: regInfo{
10000 inputs: []inputInfo{
10001 {0, 49135},
10002 {2, 49151},
10003 {1, 4295032831},
10004 },
10005 outputs: []outputInfo{
10006 {0, 49135},
10007 },
10008 },
10009 },
10010 {
10011 name: "SUBLloadidx8",
10012 auxType: auxSymOff,
10013 argLen: 4,
10014 resultInArg0: true,
10015 clobberFlags: true,
10016 symEffect: SymRead,
10017 asm: x86.ASUBL,
10018 scale: 8,
10019 reg: regInfo{
10020 inputs: []inputInfo{
10021 {0, 49135},
10022 {2, 49151},
10023 {1, 4295032831},
10024 },
10025 outputs: []outputInfo{
10026 {0, 49135},
10027 },
10028 },
10029 },
10030 {
10031 name: "SUBQloadidx1",
10032 auxType: auxSymOff,
10033 argLen: 4,
10034 resultInArg0: true,
10035 clobberFlags: true,
10036 symEffect: SymRead,
10037 asm: x86.ASUBQ,
10038 scale: 1,
10039 reg: regInfo{
10040 inputs: []inputInfo{
10041 {0, 49135},
10042 {2, 49151},
10043 {1, 4295032831},
10044 },
10045 outputs: []outputInfo{
10046 {0, 49135},
10047 },
10048 },
10049 },
10050 {
10051 name: "SUBQloadidx8",
10052 auxType: auxSymOff,
10053 argLen: 4,
10054 resultInArg0: true,
10055 clobberFlags: true,
10056 symEffect: SymRead,
10057 asm: x86.ASUBQ,
10058 scale: 8,
10059 reg: regInfo{
10060 inputs: []inputInfo{
10061 {0, 49135},
10062 {2, 49151},
10063 {1, 4295032831},
10064 },
10065 outputs: []outputInfo{
10066 {0, 49135},
10067 },
10068 },
10069 },
10070 {
10071 name: "ANDLloadidx1",
10072 auxType: auxSymOff,
10073 argLen: 4,
10074 resultInArg0: true,
10075 clobberFlags: true,
10076 symEffect: SymRead,
10077 asm: x86.AANDL,
10078 scale: 1,
10079 reg: regInfo{
10080 inputs: []inputInfo{
10081 {0, 49135},
10082 {2, 49151},
10083 {1, 4295032831},
10084 },
10085 outputs: []outputInfo{
10086 {0, 49135},
10087 },
10088 },
10089 },
10090 {
10091 name: "ANDLloadidx4",
10092 auxType: auxSymOff,
10093 argLen: 4,
10094 resultInArg0: true,
10095 clobberFlags: true,
10096 symEffect: SymRead,
10097 asm: x86.AANDL,
10098 scale: 4,
10099 reg: regInfo{
10100 inputs: []inputInfo{
10101 {0, 49135},
10102 {2, 49151},
10103 {1, 4295032831},
10104 },
10105 outputs: []outputInfo{
10106 {0, 49135},
10107 },
10108 },
10109 },
10110 {
10111 name: "ANDLloadidx8",
10112 auxType: auxSymOff,
10113 argLen: 4,
10114 resultInArg0: true,
10115 clobberFlags: true,
10116 symEffect: SymRead,
10117 asm: x86.AANDL,
10118 scale: 8,
10119 reg: regInfo{
10120 inputs: []inputInfo{
10121 {0, 49135},
10122 {2, 49151},
10123 {1, 4295032831},
10124 },
10125 outputs: []outputInfo{
10126 {0, 49135},
10127 },
10128 },
10129 },
10130 {
10131 name: "ANDQloadidx1",
10132 auxType: auxSymOff,
10133 argLen: 4,
10134 resultInArg0: true,
10135 clobberFlags: true,
10136 symEffect: SymRead,
10137 asm: x86.AANDQ,
10138 scale: 1,
10139 reg: regInfo{
10140 inputs: []inputInfo{
10141 {0, 49135},
10142 {2, 49151},
10143 {1, 4295032831},
10144 },
10145 outputs: []outputInfo{
10146 {0, 49135},
10147 },
10148 },
10149 },
10150 {
10151 name: "ANDQloadidx8",
10152 auxType: auxSymOff,
10153 argLen: 4,
10154 resultInArg0: true,
10155 clobberFlags: true,
10156 symEffect: SymRead,
10157 asm: x86.AANDQ,
10158 scale: 8,
10159 reg: regInfo{
10160 inputs: []inputInfo{
10161 {0, 49135},
10162 {2, 49151},
10163 {1, 4295032831},
10164 },
10165 outputs: []outputInfo{
10166 {0, 49135},
10167 },
10168 },
10169 },
10170 {
10171 name: "ORLloadidx1",
10172 auxType: auxSymOff,
10173 argLen: 4,
10174 resultInArg0: true,
10175 clobberFlags: true,
10176 symEffect: SymRead,
10177 asm: x86.AORL,
10178 scale: 1,
10179 reg: regInfo{
10180 inputs: []inputInfo{
10181 {0, 49135},
10182 {2, 49151},
10183 {1, 4295032831},
10184 },
10185 outputs: []outputInfo{
10186 {0, 49135},
10187 },
10188 },
10189 },
10190 {
10191 name: "ORLloadidx4",
10192 auxType: auxSymOff,
10193 argLen: 4,
10194 resultInArg0: true,
10195 clobberFlags: true,
10196 symEffect: SymRead,
10197 asm: x86.AORL,
10198 scale: 4,
10199 reg: regInfo{
10200 inputs: []inputInfo{
10201 {0, 49135},
10202 {2, 49151},
10203 {1, 4295032831},
10204 },
10205 outputs: []outputInfo{
10206 {0, 49135},
10207 },
10208 },
10209 },
10210 {
10211 name: "ORLloadidx8",
10212 auxType: auxSymOff,
10213 argLen: 4,
10214 resultInArg0: true,
10215 clobberFlags: true,
10216 symEffect: SymRead,
10217 asm: x86.AORL,
10218 scale: 8,
10219 reg: regInfo{
10220 inputs: []inputInfo{
10221 {0, 49135},
10222 {2, 49151},
10223 {1, 4295032831},
10224 },
10225 outputs: []outputInfo{
10226 {0, 49135},
10227 },
10228 },
10229 },
10230 {
10231 name: "ORQloadidx1",
10232 auxType: auxSymOff,
10233 argLen: 4,
10234 resultInArg0: true,
10235 clobberFlags: true,
10236 symEffect: SymRead,
10237 asm: x86.AORQ,
10238 scale: 1,
10239 reg: regInfo{
10240 inputs: []inputInfo{
10241 {0, 49135},
10242 {2, 49151},
10243 {1, 4295032831},
10244 },
10245 outputs: []outputInfo{
10246 {0, 49135},
10247 },
10248 },
10249 },
10250 {
10251 name: "ORQloadidx8",
10252 auxType: auxSymOff,
10253 argLen: 4,
10254 resultInArg0: true,
10255 clobberFlags: true,
10256 symEffect: SymRead,
10257 asm: x86.AORQ,
10258 scale: 8,
10259 reg: regInfo{
10260 inputs: []inputInfo{
10261 {0, 49135},
10262 {2, 49151},
10263 {1, 4295032831},
10264 },
10265 outputs: []outputInfo{
10266 {0, 49135},
10267 },
10268 },
10269 },
10270 {
10271 name: "XORLloadidx1",
10272 auxType: auxSymOff,
10273 argLen: 4,
10274 resultInArg0: true,
10275 clobberFlags: true,
10276 symEffect: SymRead,
10277 asm: x86.AXORL,
10278 scale: 1,
10279 reg: regInfo{
10280 inputs: []inputInfo{
10281 {0, 49135},
10282 {2, 49151},
10283 {1, 4295032831},
10284 },
10285 outputs: []outputInfo{
10286 {0, 49135},
10287 },
10288 },
10289 },
10290 {
10291 name: "XORLloadidx4",
10292 auxType: auxSymOff,
10293 argLen: 4,
10294 resultInArg0: true,
10295 clobberFlags: true,
10296 symEffect: SymRead,
10297 asm: x86.AXORL,
10298 scale: 4,
10299 reg: regInfo{
10300 inputs: []inputInfo{
10301 {0, 49135},
10302 {2, 49151},
10303 {1, 4295032831},
10304 },
10305 outputs: []outputInfo{
10306 {0, 49135},
10307 },
10308 },
10309 },
10310 {
10311 name: "XORLloadidx8",
10312 auxType: auxSymOff,
10313 argLen: 4,
10314 resultInArg0: true,
10315 clobberFlags: true,
10316 symEffect: SymRead,
10317 asm: x86.AXORL,
10318 scale: 8,
10319 reg: regInfo{
10320 inputs: []inputInfo{
10321 {0, 49135},
10322 {2, 49151},
10323 {1, 4295032831},
10324 },
10325 outputs: []outputInfo{
10326 {0, 49135},
10327 },
10328 },
10329 },
10330 {
10331 name: "XORQloadidx1",
10332 auxType: auxSymOff,
10333 argLen: 4,
10334 resultInArg0: true,
10335 clobberFlags: true,
10336 symEffect: SymRead,
10337 asm: x86.AXORQ,
10338 scale: 1,
10339 reg: regInfo{
10340 inputs: []inputInfo{
10341 {0, 49135},
10342 {2, 49151},
10343 {1, 4295032831},
10344 },
10345 outputs: []outputInfo{
10346 {0, 49135},
10347 },
10348 },
10349 },
10350 {
10351 name: "XORQloadidx8",
10352 auxType: auxSymOff,
10353 argLen: 4,
10354 resultInArg0: true,
10355 clobberFlags: true,
10356 symEffect: SymRead,
10357 asm: x86.AXORQ,
10358 scale: 8,
10359 reg: regInfo{
10360 inputs: []inputInfo{
10361 {0, 49135},
10362 {2, 49151},
10363 {1, 4295032831},
10364 },
10365 outputs: []outputInfo{
10366 {0, 49135},
10367 },
10368 },
10369 },
10370 {
10371 name: "ADDQmodify",
10372 auxType: auxSymOff,
10373 argLen: 3,
10374 clobberFlags: true,
10375 faultOnNilArg0: true,
10376 symEffect: SymRead | SymWrite,
10377 asm: x86.AADDQ,
10378 reg: regInfo{
10379 inputs: []inputInfo{
10380 {1, 49151},
10381 {0, 4295032831},
10382 },
10383 },
10384 },
10385 {
10386 name: "SUBQmodify",
10387 auxType: auxSymOff,
10388 argLen: 3,
10389 clobberFlags: true,
10390 faultOnNilArg0: true,
10391 symEffect: SymRead | SymWrite,
10392 asm: x86.ASUBQ,
10393 reg: regInfo{
10394 inputs: []inputInfo{
10395 {1, 49151},
10396 {0, 4295032831},
10397 },
10398 },
10399 },
10400 {
10401 name: "ANDQmodify",
10402 auxType: auxSymOff,
10403 argLen: 3,
10404 clobberFlags: true,
10405 faultOnNilArg0: true,
10406 symEffect: SymRead | SymWrite,
10407 asm: x86.AANDQ,
10408 reg: regInfo{
10409 inputs: []inputInfo{
10410 {1, 49151},
10411 {0, 4295032831},
10412 },
10413 },
10414 },
10415 {
10416 name: "ORQmodify",
10417 auxType: auxSymOff,
10418 argLen: 3,
10419 clobberFlags: true,
10420 faultOnNilArg0: true,
10421 symEffect: SymRead | SymWrite,
10422 asm: x86.AORQ,
10423 reg: regInfo{
10424 inputs: []inputInfo{
10425 {1, 49151},
10426 {0, 4295032831},
10427 },
10428 },
10429 },
10430 {
10431 name: "XORQmodify",
10432 auxType: auxSymOff,
10433 argLen: 3,
10434 clobberFlags: true,
10435 faultOnNilArg0: true,
10436 symEffect: SymRead | SymWrite,
10437 asm: x86.AXORQ,
10438 reg: regInfo{
10439 inputs: []inputInfo{
10440 {1, 49151},
10441 {0, 4295032831},
10442 },
10443 },
10444 },
10445 {
10446 name: "ADDLmodify",
10447 auxType: auxSymOff,
10448 argLen: 3,
10449 clobberFlags: true,
10450 faultOnNilArg0: true,
10451 symEffect: SymRead | SymWrite,
10452 asm: x86.AADDL,
10453 reg: regInfo{
10454 inputs: []inputInfo{
10455 {1, 49151},
10456 {0, 4295032831},
10457 },
10458 },
10459 },
10460 {
10461 name: "SUBLmodify",
10462 auxType: auxSymOff,
10463 argLen: 3,
10464 clobberFlags: true,
10465 faultOnNilArg0: true,
10466 symEffect: SymRead | SymWrite,
10467 asm: x86.ASUBL,
10468 reg: regInfo{
10469 inputs: []inputInfo{
10470 {1, 49151},
10471 {0, 4295032831},
10472 },
10473 },
10474 },
10475 {
10476 name: "ANDLmodify",
10477 auxType: auxSymOff,
10478 argLen: 3,
10479 clobberFlags: true,
10480 faultOnNilArg0: true,
10481 symEffect: SymRead | SymWrite,
10482 asm: x86.AANDL,
10483 reg: regInfo{
10484 inputs: []inputInfo{
10485 {1, 49151},
10486 {0, 4295032831},
10487 },
10488 },
10489 },
10490 {
10491 name: "ORLmodify",
10492 auxType: auxSymOff,
10493 argLen: 3,
10494 clobberFlags: true,
10495 faultOnNilArg0: true,
10496 symEffect: SymRead | SymWrite,
10497 asm: x86.AORL,
10498 reg: regInfo{
10499 inputs: []inputInfo{
10500 {1, 49151},
10501 {0, 4295032831},
10502 },
10503 },
10504 },
10505 {
10506 name: "XORLmodify",
10507 auxType: auxSymOff,
10508 argLen: 3,
10509 clobberFlags: true,
10510 faultOnNilArg0: true,
10511 symEffect: SymRead | SymWrite,
10512 asm: x86.AXORL,
10513 reg: regInfo{
10514 inputs: []inputInfo{
10515 {1, 49151},
10516 {0, 4295032831},
10517 },
10518 },
10519 },
10520 {
10521 name: "ADDQmodifyidx1",
10522 auxType: auxSymOff,
10523 argLen: 4,
10524 clobberFlags: true,
10525 symEffect: SymRead | SymWrite,
10526 asm: x86.AADDQ,
10527 scale: 1,
10528 reg: regInfo{
10529 inputs: []inputInfo{
10530 {1, 49151},
10531 {2, 49151},
10532 {0, 4295032831},
10533 },
10534 },
10535 },
10536 {
10537 name: "ADDQmodifyidx8",
10538 auxType: auxSymOff,
10539 argLen: 4,
10540 clobberFlags: true,
10541 symEffect: SymRead | SymWrite,
10542 asm: x86.AADDQ,
10543 scale: 8,
10544 reg: regInfo{
10545 inputs: []inputInfo{
10546 {1, 49151},
10547 {2, 49151},
10548 {0, 4295032831},
10549 },
10550 },
10551 },
10552 {
10553 name: "SUBQmodifyidx1",
10554 auxType: auxSymOff,
10555 argLen: 4,
10556 clobberFlags: true,
10557 symEffect: SymRead | SymWrite,
10558 asm: x86.ASUBQ,
10559 scale: 1,
10560 reg: regInfo{
10561 inputs: []inputInfo{
10562 {1, 49151},
10563 {2, 49151},
10564 {0, 4295032831},
10565 },
10566 },
10567 },
10568 {
10569 name: "SUBQmodifyidx8",
10570 auxType: auxSymOff,
10571 argLen: 4,
10572 clobberFlags: true,
10573 symEffect: SymRead | SymWrite,
10574 asm: x86.ASUBQ,
10575 scale: 8,
10576 reg: regInfo{
10577 inputs: []inputInfo{
10578 {1, 49151},
10579 {2, 49151},
10580 {0, 4295032831},
10581 },
10582 },
10583 },
10584 {
10585 name: "ANDQmodifyidx1",
10586 auxType: auxSymOff,
10587 argLen: 4,
10588 clobberFlags: true,
10589 symEffect: SymRead | SymWrite,
10590 asm: x86.AANDQ,
10591 scale: 1,
10592 reg: regInfo{
10593 inputs: []inputInfo{
10594 {1, 49151},
10595 {2, 49151},
10596 {0, 4295032831},
10597 },
10598 },
10599 },
10600 {
10601 name: "ANDQmodifyidx8",
10602 auxType: auxSymOff,
10603 argLen: 4,
10604 clobberFlags: true,
10605 symEffect: SymRead | SymWrite,
10606 asm: x86.AANDQ,
10607 scale: 8,
10608 reg: regInfo{
10609 inputs: []inputInfo{
10610 {1, 49151},
10611 {2, 49151},
10612 {0, 4295032831},
10613 },
10614 },
10615 },
10616 {
10617 name: "ORQmodifyidx1",
10618 auxType: auxSymOff,
10619 argLen: 4,
10620 clobberFlags: true,
10621 symEffect: SymRead | SymWrite,
10622 asm: x86.AORQ,
10623 scale: 1,
10624 reg: regInfo{
10625 inputs: []inputInfo{
10626 {1, 49151},
10627 {2, 49151},
10628 {0, 4295032831},
10629 },
10630 },
10631 },
10632 {
10633 name: "ORQmodifyidx8",
10634 auxType: auxSymOff,
10635 argLen: 4,
10636 clobberFlags: true,
10637 symEffect: SymRead | SymWrite,
10638 asm: x86.AORQ,
10639 scale: 8,
10640 reg: regInfo{
10641 inputs: []inputInfo{
10642 {1, 49151},
10643 {2, 49151},
10644 {0, 4295032831},
10645 },
10646 },
10647 },
10648 {
10649 name: "XORQmodifyidx1",
10650 auxType: auxSymOff,
10651 argLen: 4,
10652 clobberFlags: true,
10653 symEffect: SymRead | SymWrite,
10654 asm: x86.AXORQ,
10655 scale: 1,
10656 reg: regInfo{
10657 inputs: []inputInfo{
10658 {1, 49151},
10659 {2, 49151},
10660 {0, 4295032831},
10661 },
10662 },
10663 },
10664 {
10665 name: "XORQmodifyidx8",
10666 auxType: auxSymOff,
10667 argLen: 4,
10668 clobberFlags: true,
10669 symEffect: SymRead | SymWrite,
10670 asm: x86.AXORQ,
10671 scale: 8,
10672 reg: regInfo{
10673 inputs: []inputInfo{
10674 {1, 49151},
10675 {2, 49151},
10676 {0, 4295032831},
10677 },
10678 },
10679 },
10680 {
10681 name: "ADDLmodifyidx1",
10682 auxType: auxSymOff,
10683 argLen: 4,
10684 clobberFlags: true,
10685 symEffect: SymRead | SymWrite,
10686 asm: x86.AADDL,
10687 scale: 1,
10688 reg: regInfo{
10689 inputs: []inputInfo{
10690 {1, 49151},
10691 {2, 49151},
10692 {0, 4295032831},
10693 },
10694 },
10695 },
10696 {
10697 name: "ADDLmodifyidx4",
10698 auxType: auxSymOff,
10699 argLen: 4,
10700 clobberFlags: true,
10701 symEffect: SymRead | SymWrite,
10702 asm: x86.AADDL,
10703 scale: 4,
10704 reg: regInfo{
10705 inputs: []inputInfo{
10706 {1, 49151},
10707 {2, 49151},
10708 {0, 4295032831},
10709 },
10710 },
10711 },
10712 {
10713 name: "ADDLmodifyidx8",
10714 auxType: auxSymOff,
10715 argLen: 4,
10716 clobberFlags: true,
10717 symEffect: SymRead | SymWrite,
10718 asm: x86.AADDL,
10719 scale: 8,
10720 reg: regInfo{
10721 inputs: []inputInfo{
10722 {1, 49151},
10723 {2, 49151},
10724 {0, 4295032831},
10725 },
10726 },
10727 },
10728 {
10729 name: "SUBLmodifyidx1",
10730 auxType: auxSymOff,
10731 argLen: 4,
10732 clobberFlags: true,
10733 symEffect: SymRead | SymWrite,
10734 asm: x86.ASUBL,
10735 scale: 1,
10736 reg: regInfo{
10737 inputs: []inputInfo{
10738 {1, 49151},
10739 {2, 49151},
10740 {0, 4295032831},
10741 },
10742 },
10743 },
10744 {
10745 name: "SUBLmodifyidx4",
10746 auxType: auxSymOff,
10747 argLen: 4,
10748 clobberFlags: true,
10749 symEffect: SymRead | SymWrite,
10750 asm: x86.ASUBL,
10751 scale: 4,
10752 reg: regInfo{
10753 inputs: []inputInfo{
10754 {1, 49151},
10755 {2, 49151},
10756 {0, 4295032831},
10757 },
10758 },
10759 },
10760 {
10761 name: "SUBLmodifyidx8",
10762 auxType: auxSymOff,
10763 argLen: 4,
10764 clobberFlags: true,
10765 symEffect: SymRead | SymWrite,
10766 asm: x86.ASUBL,
10767 scale: 8,
10768 reg: regInfo{
10769 inputs: []inputInfo{
10770 {1, 49151},
10771 {2, 49151},
10772 {0, 4295032831},
10773 },
10774 },
10775 },
10776 {
10777 name: "ANDLmodifyidx1",
10778 auxType: auxSymOff,
10779 argLen: 4,
10780 clobberFlags: true,
10781 symEffect: SymRead | SymWrite,
10782 asm: x86.AANDL,
10783 scale: 1,
10784 reg: regInfo{
10785 inputs: []inputInfo{
10786 {1, 49151},
10787 {2, 49151},
10788 {0, 4295032831},
10789 },
10790 },
10791 },
10792 {
10793 name: "ANDLmodifyidx4",
10794 auxType: auxSymOff,
10795 argLen: 4,
10796 clobberFlags: true,
10797 symEffect: SymRead | SymWrite,
10798 asm: x86.AANDL,
10799 scale: 4,
10800 reg: regInfo{
10801 inputs: []inputInfo{
10802 {1, 49151},
10803 {2, 49151},
10804 {0, 4295032831},
10805 },
10806 },
10807 },
10808 {
10809 name: "ANDLmodifyidx8",
10810 auxType: auxSymOff,
10811 argLen: 4,
10812 clobberFlags: true,
10813 symEffect: SymRead | SymWrite,
10814 asm: x86.AANDL,
10815 scale: 8,
10816 reg: regInfo{
10817 inputs: []inputInfo{
10818 {1, 49151},
10819 {2, 49151},
10820 {0, 4295032831},
10821 },
10822 },
10823 },
10824 {
10825 name: "ORLmodifyidx1",
10826 auxType: auxSymOff,
10827 argLen: 4,
10828 clobberFlags: true,
10829 symEffect: SymRead | SymWrite,
10830 asm: x86.AORL,
10831 scale: 1,
10832 reg: regInfo{
10833 inputs: []inputInfo{
10834 {1, 49151},
10835 {2, 49151},
10836 {0, 4295032831},
10837 },
10838 },
10839 },
10840 {
10841 name: "ORLmodifyidx4",
10842 auxType: auxSymOff,
10843 argLen: 4,
10844 clobberFlags: true,
10845 symEffect: SymRead | SymWrite,
10846 asm: x86.AORL,
10847 scale: 4,
10848 reg: regInfo{
10849 inputs: []inputInfo{
10850 {1, 49151},
10851 {2, 49151},
10852 {0, 4295032831},
10853 },
10854 },
10855 },
10856 {
10857 name: "ORLmodifyidx8",
10858 auxType: auxSymOff,
10859 argLen: 4,
10860 clobberFlags: true,
10861 symEffect: SymRead | SymWrite,
10862 asm: x86.AORL,
10863 scale: 8,
10864 reg: regInfo{
10865 inputs: []inputInfo{
10866 {1, 49151},
10867 {2, 49151},
10868 {0, 4295032831},
10869 },
10870 },
10871 },
10872 {
10873 name: "XORLmodifyidx1",
10874 auxType: auxSymOff,
10875 argLen: 4,
10876 clobberFlags: true,
10877 symEffect: SymRead | SymWrite,
10878 asm: x86.AXORL,
10879 scale: 1,
10880 reg: regInfo{
10881 inputs: []inputInfo{
10882 {1, 49151},
10883 {2, 49151},
10884 {0, 4295032831},
10885 },
10886 },
10887 },
10888 {
10889 name: "XORLmodifyidx4",
10890 auxType: auxSymOff,
10891 argLen: 4,
10892 clobberFlags: true,
10893 symEffect: SymRead | SymWrite,
10894 asm: x86.AXORL,
10895 scale: 4,
10896 reg: regInfo{
10897 inputs: []inputInfo{
10898 {1, 49151},
10899 {2, 49151},
10900 {0, 4295032831},
10901 },
10902 },
10903 },
10904 {
10905 name: "XORLmodifyidx8",
10906 auxType: auxSymOff,
10907 argLen: 4,
10908 clobberFlags: true,
10909 symEffect: SymRead | SymWrite,
10910 asm: x86.AXORL,
10911 scale: 8,
10912 reg: regInfo{
10913 inputs: []inputInfo{
10914 {1, 49151},
10915 {2, 49151},
10916 {0, 4295032831},
10917 },
10918 },
10919 },
10920 {
10921 name: "ADDQconstmodifyidx1",
10922 auxType: auxSymValAndOff,
10923 argLen: 3,
10924 clobberFlags: true,
10925 symEffect: SymRead | SymWrite,
10926 asm: x86.AADDQ,
10927 scale: 1,
10928 reg: regInfo{
10929 inputs: []inputInfo{
10930 {1, 49151},
10931 {0, 4295032831},
10932 },
10933 },
10934 },
10935 {
10936 name: "ADDQconstmodifyidx8",
10937 auxType: auxSymValAndOff,
10938 argLen: 3,
10939 clobberFlags: true,
10940 symEffect: SymRead | SymWrite,
10941 asm: x86.AADDQ,
10942 scale: 8,
10943 reg: regInfo{
10944 inputs: []inputInfo{
10945 {1, 49151},
10946 {0, 4295032831},
10947 },
10948 },
10949 },
10950 {
10951 name: "ANDQconstmodifyidx1",
10952 auxType: auxSymValAndOff,
10953 argLen: 3,
10954 clobberFlags: true,
10955 symEffect: SymRead | SymWrite,
10956 asm: x86.AANDQ,
10957 scale: 1,
10958 reg: regInfo{
10959 inputs: []inputInfo{
10960 {1, 49151},
10961 {0, 4295032831},
10962 },
10963 },
10964 },
10965 {
10966 name: "ANDQconstmodifyidx8",
10967 auxType: auxSymValAndOff,
10968 argLen: 3,
10969 clobberFlags: true,
10970 symEffect: SymRead | SymWrite,
10971 asm: x86.AANDQ,
10972 scale: 8,
10973 reg: regInfo{
10974 inputs: []inputInfo{
10975 {1, 49151},
10976 {0, 4295032831},
10977 },
10978 },
10979 },
10980 {
10981 name: "ORQconstmodifyidx1",
10982 auxType: auxSymValAndOff,
10983 argLen: 3,
10984 clobberFlags: true,
10985 symEffect: SymRead | SymWrite,
10986 asm: x86.AORQ,
10987 scale: 1,
10988 reg: regInfo{
10989 inputs: []inputInfo{
10990 {1, 49151},
10991 {0, 4295032831},
10992 },
10993 },
10994 },
10995 {
10996 name: "ORQconstmodifyidx8",
10997 auxType: auxSymValAndOff,
10998 argLen: 3,
10999 clobberFlags: true,
11000 symEffect: SymRead | SymWrite,
11001 asm: x86.AORQ,
11002 scale: 8,
11003 reg: regInfo{
11004 inputs: []inputInfo{
11005 {1, 49151},
11006 {0, 4295032831},
11007 },
11008 },
11009 },
11010 {
11011 name: "XORQconstmodifyidx1",
11012 auxType: auxSymValAndOff,
11013 argLen: 3,
11014 clobberFlags: true,
11015 symEffect: SymRead | SymWrite,
11016 asm: x86.AXORQ,
11017 scale: 1,
11018 reg: regInfo{
11019 inputs: []inputInfo{
11020 {1, 49151},
11021 {0, 4295032831},
11022 },
11023 },
11024 },
11025 {
11026 name: "XORQconstmodifyidx8",
11027 auxType: auxSymValAndOff,
11028 argLen: 3,
11029 clobberFlags: true,
11030 symEffect: SymRead | SymWrite,
11031 asm: x86.AXORQ,
11032 scale: 8,
11033 reg: regInfo{
11034 inputs: []inputInfo{
11035 {1, 49151},
11036 {0, 4295032831},
11037 },
11038 },
11039 },
11040 {
11041 name: "ADDLconstmodifyidx1",
11042 auxType: auxSymValAndOff,
11043 argLen: 3,
11044 clobberFlags: true,
11045 symEffect: SymRead | SymWrite,
11046 asm: x86.AADDL,
11047 scale: 1,
11048 reg: regInfo{
11049 inputs: []inputInfo{
11050 {1, 49151},
11051 {0, 4295032831},
11052 },
11053 },
11054 },
11055 {
11056 name: "ADDLconstmodifyidx4",
11057 auxType: auxSymValAndOff,
11058 argLen: 3,
11059 clobberFlags: true,
11060 symEffect: SymRead | SymWrite,
11061 asm: x86.AADDL,
11062 scale: 4,
11063 reg: regInfo{
11064 inputs: []inputInfo{
11065 {1, 49151},
11066 {0, 4295032831},
11067 },
11068 },
11069 },
11070 {
11071 name: "ADDLconstmodifyidx8",
11072 auxType: auxSymValAndOff,
11073 argLen: 3,
11074 clobberFlags: true,
11075 symEffect: SymRead | SymWrite,
11076 asm: x86.AADDL,
11077 scale: 8,
11078 reg: regInfo{
11079 inputs: []inputInfo{
11080 {1, 49151},
11081 {0, 4295032831},
11082 },
11083 },
11084 },
11085 {
11086 name: "ANDLconstmodifyidx1",
11087 auxType: auxSymValAndOff,
11088 argLen: 3,
11089 clobberFlags: true,
11090 symEffect: SymRead | SymWrite,
11091 asm: x86.AANDL,
11092 scale: 1,
11093 reg: regInfo{
11094 inputs: []inputInfo{
11095 {1, 49151},
11096 {0, 4295032831},
11097 },
11098 },
11099 },
11100 {
11101 name: "ANDLconstmodifyidx4",
11102 auxType: auxSymValAndOff,
11103 argLen: 3,
11104 clobberFlags: true,
11105 symEffect: SymRead | SymWrite,
11106 asm: x86.AANDL,
11107 scale: 4,
11108 reg: regInfo{
11109 inputs: []inputInfo{
11110 {1, 49151},
11111 {0, 4295032831},
11112 },
11113 },
11114 },
11115 {
11116 name: "ANDLconstmodifyidx8",
11117 auxType: auxSymValAndOff,
11118 argLen: 3,
11119 clobberFlags: true,
11120 symEffect: SymRead | SymWrite,
11121 asm: x86.AANDL,
11122 scale: 8,
11123 reg: regInfo{
11124 inputs: []inputInfo{
11125 {1, 49151},
11126 {0, 4295032831},
11127 },
11128 },
11129 },
11130 {
11131 name: "ORLconstmodifyidx1",
11132 auxType: auxSymValAndOff,
11133 argLen: 3,
11134 clobberFlags: true,
11135 symEffect: SymRead | SymWrite,
11136 asm: x86.AORL,
11137 scale: 1,
11138 reg: regInfo{
11139 inputs: []inputInfo{
11140 {1, 49151},
11141 {0, 4295032831},
11142 },
11143 },
11144 },
11145 {
11146 name: "ORLconstmodifyidx4",
11147 auxType: auxSymValAndOff,
11148 argLen: 3,
11149 clobberFlags: true,
11150 symEffect: SymRead | SymWrite,
11151 asm: x86.AORL,
11152 scale: 4,
11153 reg: regInfo{
11154 inputs: []inputInfo{
11155 {1, 49151},
11156 {0, 4295032831},
11157 },
11158 },
11159 },
11160 {
11161 name: "ORLconstmodifyidx8",
11162 auxType: auxSymValAndOff,
11163 argLen: 3,
11164 clobberFlags: true,
11165 symEffect: SymRead | SymWrite,
11166 asm: x86.AORL,
11167 scale: 8,
11168 reg: regInfo{
11169 inputs: []inputInfo{
11170 {1, 49151},
11171 {0, 4295032831},
11172 },
11173 },
11174 },
11175 {
11176 name: "XORLconstmodifyidx1",
11177 auxType: auxSymValAndOff,
11178 argLen: 3,
11179 clobberFlags: true,
11180 symEffect: SymRead | SymWrite,
11181 asm: x86.AXORL,
11182 scale: 1,
11183 reg: regInfo{
11184 inputs: []inputInfo{
11185 {1, 49151},
11186 {0, 4295032831},
11187 },
11188 },
11189 },
11190 {
11191 name: "XORLconstmodifyidx4",
11192 auxType: auxSymValAndOff,
11193 argLen: 3,
11194 clobberFlags: true,
11195 symEffect: SymRead | SymWrite,
11196 asm: x86.AXORL,
11197 scale: 4,
11198 reg: regInfo{
11199 inputs: []inputInfo{
11200 {1, 49151},
11201 {0, 4295032831},
11202 },
11203 },
11204 },
11205 {
11206 name: "XORLconstmodifyidx8",
11207 auxType: auxSymValAndOff,
11208 argLen: 3,
11209 clobberFlags: true,
11210 symEffect: SymRead | SymWrite,
11211 asm: x86.AXORL,
11212 scale: 8,
11213 reg: regInfo{
11214 inputs: []inputInfo{
11215 {1, 49151},
11216 {0, 4295032831},
11217 },
11218 },
11219 },
11220 {
11221 name: "NEGQ",
11222 argLen: 1,
11223 resultInArg0: true,
11224 clobberFlags: true,
11225 asm: x86.ANEGQ,
11226 reg: regInfo{
11227 inputs: []inputInfo{
11228 {0, 49135},
11229 },
11230 outputs: []outputInfo{
11231 {0, 49135},
11232 },
11233 },
11234 },
11235 {
11236 name: "NEGL",
11237 argLen: 1,
11238 resultInArg0: true,
11239 clobberFlags: true,
11240 asm: x86.ANEGL,
11241 reg: regInfo{
11242 inputs: []inputInfo{
11243 {0, 49135},
11244 },
11245 outputs: []outputInfo{
11246 {0, 49135},
11247 },
11248 },
11249 },
11250 {
11251 name: "NOTQ",
11252 argLen: 1,
11253 resultInArg0: true,
11254 asm: x86.ANOTQ,
11255 reg: regInfo{
11256 inputs: []inputInfo{
11257 {0, 49135},
11258 },
11259 outputs: []outputInfo{
11260 {0, 49135},
11261 },
11262 },
11263 },
11264 {
11265 name: "NOTL",
11266 argLen: 1,
11267 resultInArg0: true,
11268 asm: x86.ANOTL,
11269 reg: regInfo{
11270 inputs: []inputInfo{
11271 {0, 49135},
11272 },
11273 outputs: []outputInfo{
11274 {0, 49135},
11275 },
11276 },
11277 },
11278 {
11279 name: "BSFQ",
11280 argLen: 1,
11281 asm: x86.ABSFQ,
11282 reg: regInfo{
11283 inputs: []inputInfo{
11284 {0, 49135},
11285 },
11286 outputs: []outputInfo{
11287 {1, 0},
11288 {0, 49135},
11289 },
11290 },
11291 },
11292 {
11293 name: "BSFL",
11294 argLen: 1,
11295 clobberFlags: true,
11296 asm: x86.ABSFL,
11297 reg: regInfo{
11298 inputs: []inputInfo{
11299 {0, 49135},
11300 },
11301 outputs: []outputInfo{
11302 {0, 49135},
11303 },
11304 },
11305 },
11306 {
11307 name: "BSRQ",
11308 argLen: 1,
11309 asm: x86.ABSRQ,
11310 reg: regInfo{
11311 inputs: []inputInfo{
11312 {0, 49135},
11313 },
11314 outputs: []outputInfo{
11315 {1, 0},
11316 {0, 49135},
11317 },
11318 },
11319 },
11320 {
11321 name: "BSRL",
11322 argLen: 1,
11323 clobberFlags: true,
11324 asm: x86.ABSRL,
11325 reg: regInfo{
11326 inputs: []inputInfo{
11327 {0, 49135},
11328 },
11329 outputs: []outputInfo{
11330 {0, 49135},
11331 },
11332 },
11333 },
11334 {
11335 name: "CMOVQEQ",
11336 argLen: 3,
11337 resultInArg0: true,
11338 asm: x86.ACMOVQEQ,
11339 reg: regInfo{
11340 inputs: []inputInfo{
11341 {0, 49135},
11342 {1, 49135},
11343 },
11344 outputs: []outputInfo{
11345 {0, 49135},
11346 },
11347 },
11348 },
11349 {
11350 name: "CMOVQNE",
11351 argLen: 3,
11352 resultInArg0: true,
11353 asm: x86.ACMOVQNE,
11354 reg: regInfo{
11355 inputs: []inputInfo{
11356 {0, 49135},
11357 {1, 49135},
11358 },
11359 outputs: []outputInfo{
11360 {0, 49135},
11361 },
11362 },
11363 },
11364 {
11365 name: "CMOVQLT",
11366 argLen: 3,
11367 resultInArg0: true,
11368 asm: x86.ACMOVQLT,
11369 reg: regInfo{
11370 inputs: []inputInfo{
11371 {0, 49135},
11372 {1, 49135},
11373 },
11374 outputs: []outputInfo{
11375 {0, 49135},
11376 },
11377 },
11378 },
11379 {
11380 name: "CMOVQGT",
11381 argLen: 3,
11382 resultInArg0: true,
11383 asm: x86.ACMOVQGT,
11384 reg: regInfo{
11385 inputs: []inputInfo{
11386 {0, 49135},
11387 {1, 49135},
11388 },
11389 outputs: []outputInfo{
11390 {0, 49135},
11391 },
11392 },
11393 },
11394 {
11395 name: "CMOVQLE",
11396 argLen: 3,
11397 resultInArg0: true,
11398 asm: x86.ACMOVQLE,
11399 reg: regInfo{
11400 inputs: []inputInfo{
11401 {0, 49135},
11402 {1, 49135},
11403 },
11404 outputs: []outputInfo{
11405 {0, 49135},
11406 },
11407 },
11408 },
11409 {
11410 name: "CMOVQGE",
11411 argLen: 3,
11412 resultInArg0: true,
11413 asm: x86.ACMOVQGE,
11414 reg: regInfo{
11415 inputs: []inputInfo{
11416 {0, 49135},
11417 {1, 49135},
11418 },
11419 outputs: []outputInfo{
11420 {0, 49135},
11421 },
11422 },
11423 },
11424 {
11425 name: "CMOVQLS",
11426 argLen: 3,
11427 resultInArg0: true,
11428 asm: x86.ACMOVQLS,
11429 reg: regInfo{
11430 inputs: []inputInfo{
11431 {0, 49135},
11432 {1, 49135},
11433 },
11434 outputs: []outputInfo{
11435 {0, 49135},
11436 },
11437 },
11438 },
11439 {
11440 name: "CMOVQHI",
11441 argLen: 3,
11442 resultInArg0: true,
11443 asm: x86.ACMOVQHI,
11444 reg: regInfo{
11445 inputs: []inputInfo{
11446 {0, 49135},
11447 {1, 49135},
11448 },
11449 outputs: []outputInfo{
11450 {0, 49135},
11451 },
11452 },
11453 },
11454 {
11455 name: "CMOVQCC",
11456 argLen: 3,
11457 resultInArg0: true,
11458 asm: x86.ACMOVQCC,
11459 reg: regInfo{
11460 inputs: []inputInfo{
11461 {0, 49135},
11462 {1, 49135},
11463 },
11464 outputs: []outputInfo{
11465 {0, 49135},
11466 },
11467 },
11468 },
11469 {
11470 name: "CMOVQCS",
11471 argLen: 3,
11472 resultInArg0: true,
11473 asm: x86.ACMOVQCS,
11474 reg: regInfo{
11475 inputs: []inputInfo{
11476 {0, 49135},
11477 {1, 49135},
11478 },
11479 outputs: []outputInfo{
11480 {0, 49135},
11481 },
11482 },
11483 },
11484 {
11485 name: "CMOVLEQ",
11486 argLen: 3,
11487 resultInArg0: true,
11488 asm: x86.ACMOVLEQ,
11489 reg: regInfo{
11490 inputs: []inputInfo{
11491 {0, 49135},
11492 {1, 49135},
11493 },
11494 outputs: []outputInfo{
11495 {0, 49135},
11496 },
11497 },
11498 },
11499 {
11500 name: "CMOVLNE",
11501 argLen: 3,
11502 resultInArg0: true,
11503 asm: x86.ACMOVLNE,
11504 reg: regInfo{
11505 inputs: []inputInfo{
11506 {0, 49135},
11507 {1, 49135},
11508 },
11509 outputs: []outputInfo{
11510 {0, 49135},
11511 },
11512 },
11513 },
11514 {
11515 name: "CMOVLLT",
11516 argLen: 3,
11517 resultInArg0: true,
11518 asm: x86.ACMOVLLT,
11519 reg: regInfo{
11520 inputs: []inputInfo{
11521 {0, 49135},
11522 {1, 49135},
11523 },
11524 outputs: []outputInfo{
11525 {0, 49135},
11526 },
11527 },
11528 },
11529 {
11530 name: "CMOVLGT",
11531 argLen: 3,
11532 resultInArg0: true,
11533 asm: x86.ACMOVLGT,
11534 reg: regInfo{
11535 inputs: []inputInfo{
11536 {0, 49135},
11537 {1, 49135},
11538 },
11539 outputs: []outputInfo{
11540 {0, 49135},
11541 },
11542 },
11543 },
11544 {
11545 name: "CMOVLLE",
11546 argLen: 3,
11547 resultInArg0: true,
11548 asm: x86.ACMOVLLE,
11549 reg: regInfo{
11550 inputs: []inputInfo{
11551 {0, 49135},
11552 {1, 49135},
11553 },
11554 outputs: []outputInfo{
11555 {0, 49135},
11556 },
11557 },
11558 },
11559 {
11560 name: "CMOVLGE",
11561 argLen: 3,
11562 resultInArg0: true,
11563 asm: x86.ACMOVLGE,
11564 reg: regInfo{
11565 inputs: []inputInfo{
11566 {0, 49135},
11567 {1, 49135},
11568 },
11569 outputs: []outputInfo{
11570 {0, 49135},
11571 },
11572 },
11573 },
11574 {
11575 name: "CMOVLLS",
11576 argLen: 3,
11577 resultInArg0: true,
11578 asm: x86.ACMOVLLS,
11579 reg: regInfo{
11580 inputs: []inputInfo{
11581 {0, 49135},
11582 {1, 49135},
11583 },
11584 outputs: []outputInfo{
11585 {0, 49135},
11586 },
11587 },
11588 },
11589 {
11590 name: "CMOVLHI",
11591 argLen: 3,
11592 resultInArg0: true,
11593 asm: x86.ACMOVLHI,
11594 reg: regInfo{
11595 inputs: []inputInfo{
11596 {0, 49135},
11597 {1, 49135},
11598 },
11599 outputs: []outputInfo{
11600 {0, 49135},
11601 },
11602 },
11603 },
11604 {
11605 name: "CMOVLCC",
11606 argLen: 3,
11607 resultInArg0: true,
11608 asm: x86.ACMOVLCC,
11609 reg: regInfo{
11610 inputs: []inputInfo{
11611 {0, 49135},
11612 {1, 49135},
11613 },
11614 outputs: []outputInfo{
11615 {0, 49135},
11616 },
11617 },
11618 },
11619 {
11620 name: "CMOVLCS",
11621 argLen: 3,
11622 resultInArg0: true,
11623 asm: x86.ACMOVLCS,
11624 reg: regInfo{
11625 inputs: []inputInfo{
11626 {0, 49135},
11627 {1, 49135},
11628 },
11629 outputs: []outputInfo{
11630 {0, 49135},
11631 },
11632 },
11633 },
11634 {
11635 name: "CMOVWEQ",
11636 argLen: 3,
11637 resultInArg0: true,
11638 asm: x86.ACMOVWEQ,
11639 reg: regInfo{
11640 inputs: []inputInfo{
11641 {0, 49135},
11642 {1, 49135},
11643 },
11644 outputs: []outputInfo{
11645 {0, 49135},
11646 },
11647 },
11648 },
11649 {
11650 name: "CMOVWNE",
11651 argLen: 3,
11652 resultInArg0: true,
11653 asm: x86.ACMOVWNE,
11654 reg: regInfo{
11655 inputs: []inputInfo{
11656 {0, 49135},
11657 {1, 49135},
11658 },
11659 outputs: []outputInfo{
11660 {0, 49135},
11661 },
11662 },
11663 },
11664 {
11665 name: "CMOVWLT",
11666 argLen: 3,
11667 resultInArg0: true,
11668 asm: x86.ACMOVWLT,
11669 reg: regInfo{
11670 inputs: []inputInfo{
11671 {0, 49135},
11672 {1, 49135},
11673 },
11674 outputs: []outputInfo{
11675 {0, 49135},
11676 },
11677 },
11678 },
11679 {
11680 name: "CMOVWGT",
11681 argLen: 3,
11682 resultInArg0: true,
11683 asm: x86.ACMOVWGT,
11684 reg: regInfo{
11685 inputs: []inputInfo{
11686 {0, 49135},
11687 {1, 49135},
11688 },
11689 outputs: []outputInfo{
11690 {0, 49135},
11691 },
11692 },
11693 },
11694 {
11695 name: "CMOVWLE",
11696 argLen: 3,
11697 resultInArg0: true,
11698 asm: x86.ACMOVWLE,
11699 reg: regInfo{
11700 inputs: []inputInfo{
11701 {0, 49135},
11702 {1, 49135},
11703 },
11704 outputs: []outputInfo{
11705 {0, 49135},
11706 },
11707 },
11708 },
11709 {
11710 name: "CMOVWGE",
11711 argLen: 3,
11712 resultInArg0: true,
11713 asm: x86.ACMOVWGE,
11714 reg: regInfo{
11715 inputs: []inputInfo{
11716 {0, 49135},
11717 {1, 49135},
11718 },
11719 outputs: []outputInfo{
11720 {0, 49135},
11721 },
11722 },
11723 },
11724 {
11725 name: "CMOVWLS",
11726 argLen: 3,
11727 resultInArg0: true,
11728 asm: x86.ACMOVWLS,
11729 reg: regInfo{
11730 inputs: []inputInfo{
11731 {0, 49135},
11732 {1, 49135},
11733 },
11734 outputs: []outputInfo{
11735 {0, 49135},
11736 },
11737 },
11738 },
11739 {
11740 name: "CMOVWHI",
11741 argLen: 3,
11742 resultInArg0: true,
11743 asm: x86.ACMOVWHI,
11744 reg: regInfo{
11745 inputs: []inputInfo{
11746 {0, 49135},
11747 {1, 49135},
11748 },
11749 outputs: []outputInfo{
11750 {0, 49135},
11751 },
11752 },
11753 },
11754 {
11755 name: "CMOVWCC",
11756 argLen: 3,
11757 resultInArg0: true,
11758 asm: x86.ACMOVWCC,
11759 reg: regInfo{
11760 inputs: []inputInfo{
11761 {0, 49135},
11762 {1, 49135},
11763 },
11764 outputs: []outputInfo{
11765 {0, 49135},
11766 },
11767 },
11768 },
11769 {
11770 name: "CMOVWCS",
11771 argLen: 3,
11772 resultInArg0: true,
11773 asm: x86.ACMOVWCS,
11774 reg: regInfo{
11775 inputs: []inputInfo{
11776 {0, 49135},
11777 {1, 49135},
11778 },
11779 outputs: []outputInfo{
11780 {0, 49135},
11781 },
11782 },
11783 },
11784 {
11785 name: "CMOVQEQF",
11786 argLen: 3,
11787 resultInArg0: true,
11788 needIntTemp: true,
11789 asm: x86.ACMOVQNE,
11790 reg: regInfo{
11791 inputs: []inputInfo{
11792 {0, 49135},
11793 {1, 49135},
11794 },
11795 outputs: []outputInfo{
11796 {0, 49135},
11797 },
11798 },
11799 },
11800 {
11801 name: "CMOVQNEF",
11802 argLen: 3,
11803 resultInArg0: true,
11804 asm: x86.ACMOVQNE,
11805 reg: regInfo{
11806 inputs: []inputInfo{
11807 {0, 49135},
11808 {1, 49135},
11809 },
11810 outputs: []outputInfo{
11811 {0, 49135},
11812 },
11813 },
11814 },
11815 {
11816 name: "CMOVQGTF",
11817 argLen: 3,
11818 resultInArg0: true,
11819 asm: x86.ACMOVQHI,
11820 reg: regInfo{
11821 inputs: []inputInfo{
11822 {0, 49135},
11823 {1, 49135},
11824 },
11825 outputs: []outputInfo{
11826 {0, 49135},
11827 },
11828 },
11829 },
11830 {
11831 name: "CMOVQGEF",
11832 argLen: 3,
11833 resultInArg0: true,
11834 asm: x86.ACMOVQCC,
11835 reg: regInfo{
11836 inputs: []inputInfo{
11837 {0, 49135},
11838 {1, 49135},
11839 },
11840 outputs: []outputInfo{
11841 {0, 49135},
11842 },
11843 },
11844 },
11845 {
11846 name: "CMOVLEQF",
11847 argLen: 3,
11848 resultInArg0: true,
11849 needIntTemp: true,
11850 asm: x86.ACMOVLNE,
11851 reg: regInfo{
11852 inputs: []inputInfo{
11853 {0, 49135},
11854 {1, 49135},
11855 },
11856 outputs: []outputInfo{
11857 {0, 49135},
11858 },
11859 },
11860 },
11861 {
11862 name: "CMOVLNEF",
11863 argLen: 3,
11864 resultInArg0: true,
11865 asm: x86.ACMOVLNE,
11866 reg: regInfo{
11867 inputs: []inputInfo{
11868 {0, 49135},
11869 {1, 49135},
11870 },
11871 outputs: []outputInfo{
11872 {0, 49135},
11873 },
11874 },
11875 },
11876 {
11877 name: "CMOVLGTF",
11878 argLen: 3,
11879 resultInArg0: true,
11880 asm: x86.ACMOVLHI,
11881 reg: regInfo{
11882 inputs: []inputInfo{
11883 {0, 49135},
11884 {1, 49135},
11885 },
11886 outputs: []outputInfo{
11887 {0, 49135},
11888 },
11889 },
11890 },
11891 {
11892 name: "CMOVLGEF",
11893 argLen: 3,
11894 resultInArg0: true,
11895 asm: x86.ACMOVLCC,
11896 reg: regInfo{
11897 inputs: []inputInfo{
11898 {0, 49135},
11899 {1, 49135},
11900 },
11901 outputs: []outputInfo{
11902 {0, 49135},
11903 },
11904 },
11905 },
11906 {
11907 name: "CMOVWEQF",
11908 argLen: 3,
11909 resultInArg0: true,
11910 needIntTemp: true,
11911 asm: x86.ACMOVWNE,
11912 reg: regInfo{
11913 inputs: []inputInfo{
11914 {0, 49135},
11915 {1, 49135},
11916 },
11917 outputs: []outputInfo{
11918 {0, 49135},
11919 },
11920 },
11921 },
11922 {
11923 name: "CMOVWNEF",
11924 argLen: 3,
11925 resultInArg0: true,
11926 asm: x86.ACMOVWNE,
11927 reg: regInfo{
11928 inputs: []inputInfo{
11929 {0, 49135},
11930 {1, 49135},
11931 },
11932 outputs: []outputInfo{
11933 {0, 49135},
11934 },
11935 },
11936 },
11937 {
11938 name: "CMOVWGTF",
11939 argLen: 3,
11940 resultInArg0: true,
11941 asm: x86.ACMOVWHI,
11942 reg: regInfo{
11943 inputs: []inputInfo{
11944 {0, 49135},
11945 {1, 49135},
11946 },
11947 outputs: []outputInfo{
11948 {0, 49135},
11949 },
11950 },
11951 },
11952 {
11953 name: "CMOVWGEF",
11954 argLen: 3,
11955 resultInArg0: true,
11956 asm: x86.ACMOVWCC,
11957 reg: regInfo{
11958 inputs: []inputInfo{
11959 {0, 49135},
11960 {1, 49135},
11961 },
11962 outputs: []outputInfo{
11963 {0, 49135},
11964 },
11965 },
11966 },
11967 {
11968 name: "BSWAPQ",
11969 argLen: 1,
11970 resultInArg0: true,
11971 asm: x86.ABSWAPQ,
11972 reg: regInfo{
11973 inputs: []inputInfo{
11974 {0, 49135},
11975 },
11976 outputs: []outputInfo{
11977 {0, 49135},
11978 },
11979 },
11980 },
11981 {
11982 name: "BSWAPL",
11983 argLen: 1,
11984 resultInArg0: true,
11985 asm: x86.ABSWAPL,
11986 reg: regInfo{
11987 inputs: []inputInfo{
11988 {0, 49135},
11989 },
11990 outputs: []outputInfo{
11991 {0, 49135},
11992 },
11993 },
11994 },
11995 {
11996 name: "POPCNTQ",
11997 argLen: 1,
11998 clobberFlags: true,
11999 asm: x86.APOPCNTQ,
12000 reg: regInfo{
12001 inputs: []inputInfo{
12002 {0, 49135},
12003 },
12004 outputs: []outputInfo{
12005 {0, 49135},
12006 },
12007 },
12008 },
12009 {
12010 name: "POPCNTL",
12011 argLen: 1,
12012 clobberFlags: true,
12013 asm: x86.APOPCNTL,
12014 reg: regInfo{
12015 inputs: []inputInfo{
12016 {0, 49135},
12017 },
12018 outputs: []outputInfo{
12019 {0, 49135},
12020 },
12021 },
12022 },
12023 {
12024 name: "SQRTSD",
12025 argLen: 1,
12026 asm: x86.ASQRTSD,
12027 reg: regInfo{
12028 inputs: []inputInfo{
12029 {0, 2147418112},
12030 },
12031 outputs: []outputInfo{
12032 {0, 2147418112},
12033 },
12034 },
12035 },
12036 {
12037 name: "SQRTSS",
12038 argLen: 1,
12039 asm: x86.ASQRTSS,
12040 reg: regInfo{
12041 inputs: []inputInfo{
12042 {0, 2147418112},
12043 },
12044 outputs: []outputInfo{
12045 {0, 2147418112},
12046 },
12047 },
12048 },
12049 {
12050 name: "ROUNDSD",
12051 auxType: auxInt8,
12052 argLen: 1,
12053 asm: x86.AROUNDSD,
12054 reg: regInfo{
12055 inputs: []inputInfo{
12056 {0, 2147418112},
12057 },
12058 outputs: []outputInfo{
12059 {0, 2147418112},
12060 },
12061 },
12062 },
12063 {
12064 name: "VFMADD231SD",
12065 argLen: 3,
12066 resultInArg0: true,
12067 asm: x86.AVFMADD231SD,
12068 reg: regInfo{
12069 inputs: []inputInfo{
12070 {0, 2147418112},
12071 {1, 2147418112},
12072 {2, 2147418112},
12073 },
12074 outputs: []outputInfo{
12075 {0, 2147418112},
12076 },
12077 },
12078 },
12079 {
12080 name: "MINSD",
12081 argLen: 2,
12082 resultInArg0: true,
12083 asm: x86.AMINSD,
12084 reg: regInfo{
12085 inputs: []inputInfo{
12086 {0, 2147418112},
12087 {1, 2147418112},
12088 },
12089 outputs: []outputInfo{
12090 {0, 2147418112},
12091 },
12092 },
12093 },
12094 {
12095 name: "MINSS",
12096 argLen: 2,
12097 resultInArg0: true,
12098 asm: x86.AMINSS,
12099 reg: regInfo{
12100 inputs: []inputInfo{
12101 {0, 2147418112},
12102 {1, 2147418112},
12103 },
12104 outputs: []outputInfo{
12105 {0, 2147418112},
12106 },
12107 },
12108 },
12109 {
12110 name: "SBBQcarrymask",
12111 argLen: 1,
12112 asm: x86.ASBBQ,
12113 reg: regInfo{
12114 outputs: []outputInfo{
12115 {0, 49135},
12116 },
12117 },
12118 },
12119 {
12120 name: "SBBLcarrymask",
12121 argLen: 1,
12122 asm: x86.ASBBL,
12123 reg: regInfo{
12124 outputs: []outputInfo{
12125 {0, 49135},
12126 },
12127 },
12128 },
12129 {
12130 name: "SETEQ",
12131 argLen: 1,
12132 asm: x86.ASETEQ,
12133 reg: regInfo{
12134 outputs: []outputInfo{
12135 {0, 49135},
12136 },
12137 },
12138 },
12139 {
12140 name: "SETNE",
12141 argLen: 1,
12142 asm: x86.ASETNE,
12143 reg: regInfo{
12144 outputs: []outputInfo{
12145 {0, 49135},
12146 },
12147 },
12148 },
12149 {
12150 name: "SETL",
12151 argLen: 1,
12152 asm: x86.ASETLT,
12153 reg: regInfo{
12154 outputs: []outputInfo{
12155 {0, 49135},
12156 },
12157 },
12158 },
12159 {
12160 name: "SETLE",
12161 argLen: 1,
12162 asm: x86.ASETLE,
12163 reg: regInfo{
12164 outputs: []outputInfo{
12165 {0, 49135},
12166 },
12167 },
12168 },
12169 {
12170 name: "SETG",
12171 argLen: 1,
12172 asm: x86.ASETGT,
12173 reg: regInfo{
12174 outputs: []outputInfo{
12175 {0, 49135},
12176 },
12177 },
12178 },
12179 {
12180 name: "SETGE",
12181 argLen: 1,
12182 asm: x86.ASETGE,
12183 reg: regInfo{
12184 outputs: []outputInfo{
12185 {0, 49135},
12186 },
12187 },
12188 },
12189 {
12190 name: "SETB",
12191 argLen: 1,
12192 asm: x86.ASETCS,
12193 reg: regInfo{
12194 outputs: []outputInfo{
12195 {0, 49135},
12196 },
12197 },
12198 },
12199 {
12200 name: "SETBE",
12201 argLen: 1,
12202 asm: x86.ASETLS,
12203 reg: regInfo{
12204 outputs: []outputInfo{
12205 {0, 49135},
12206 },
12207 },
12208 },
12209 {
12210 name: "SETA",
12211 argLen: 1,
12212 asm: x86.ASETHI,
12213 reg: regInfo{
12214 outputs: []outputInfo{
12215 {0, 49135},
12216 },
12217 },
12218 },
12219 {
12220 name: "SETAE",
12221 argLen: 1,
12222 asm: x86.ASETCC,
12223 reg: regInfo{
12224 outputs: []outputInfo{
12225 {0, 49135},
12226 },
12227 },
12228 },
12229 {
12230 name: "SETO",
12231 argLen: 1,
12232 asm: x86.ASETOS,
12233 reg: regInfo{
12234 outputs: []outputInfo{
12235 {0, 49135},
12236 },
12237 },
12238 },
12239 {
12240 name: "SETEQstore",
12241 auxType: auxSymOff,
12242 argLen: 3,
12243 faultOnNilArg0: true,
12244 symEffect: SymWrite,
12245 asm: x86.ASETEQ,
12246 reg: regInfo{
12247 inputs: []inputInfo{
12248 {0, 4295032831},
12249 },
12250 },
12251 },
12252 {
12253 name: "SETNEstore",
12254 auxType: auxSymOff,
12255 argLen: 3,
12256 faultOnNilArg0: true,
12257 symEffect: SymWrite,
12258 asm: x86.ASETNE,
12259 reg: regInfo{
12260 inputs: []inputInfo{
12261 {0, 4295032831},
12262 },
12263 },
12264 },
12265 {
12266 name: "SETLstore",
12267 auxType: auxSymOff,
12268 argLen: 3,
12269 faultOnNilArg0: true,
12270 symEffect: SymWrite,
12271 asm: x86.ASETLT,
12272 reg: regInfo{
12273 inputs: []inputInfo{
12274 {0, 4295032831},
12275 },
12276 },
12277 },
12278 {
12279 name: "SETLEstore",
12280 auxType: auxSymOff,
12281 argLen: 3,
12282 faultOnNilArg0: true,
12283 symEffect: SymWrite,
12284 asm: x86.ASETLE,
12285 reg: regInfo{
12286 inputs: []inputInfo{
12287 {0, 4295032831},
12288 },
12289 },
12290 },
12291 {
12292 name: "SETGstore",
12293 auxType: auxSymOff,
12294 argLen: 3,
12295 faultOnNilArg0: true,
12296 symEffect: SymWrite,
12297 asm: x86.ASETGT,
12298 reg: regInfo{
12299 inputs: []inputInfo{
12300 {0, 4295032831},
12301 },
12302 },
12303 },
12304 {
12305 name: "SETGEstore",
12306 auxType: auxSymOff,
12307 argLen: 3,
12308 faultOnNilArg0: true,
12309 symEffect: SymWrite,
12310 asm: x86.ASETGE,
12311 reg: regInfo{
12312 inputs: []inputInfo{
12313 {0, 4295032831},
12314 },
12315 },
12316 },
12317 {
12318 name: "SETBstore",
12319 auxType: auxSymOff,
12320 argLen: 3,
12321 faultOnNilArg0: true,
12322 symEffect: SymWrite,
12323 asm: x86.ASETCS,
12324 reg: regInfo{
12325 inputs: []inputInfo{
12326 {0, 4295032831},
12327 },
12328 },
12329 },
12330 {
12331 name: "SETBEstore",
12332 auxType: auxSymOff,
12333 argLen: 3,
12334 faultOnNilArg0: true,
12335 symEffect: SymWrite,
12336 asm: x86.ASETLS,
12337 reg: regInfo{
12338 inputs: []inputInfo{
12339 {0, 4295032831},
12340 },
12341 },
12342 },
12343 {
12344 name: "SETAstore",
12345 auxType: auxSymOff,
12346 argLen: 3,
12347 faultOnNilArg0: true,
12348 symEffect: SymWrite,
12349 asm: x86.ASETHI,
12350 reg: regInfo{
12351 inputs: []inputInfo{
12352 {0, 4295032831},
12353 },
12354 },
12355 },
12356 {
12357 name: "SETAEstore",
12358 auxType: auxSymOff,
12359 argLen: 3,
12360 faultOnNilArg0: true,
12361 symEffect: SymWrite,
12362 asm: x86.ASETCC,
12363 reg: regInfo{
12364 inputs: []inputInfo{
12365 {0, 4295032831},
12366 },
12367 },
12368 },
12369 {
12370 name: "SETEQstoreidx1",
12371 auxType: auxSymOff,
12372 argLen: 4,
12373 commutative: true,
12374 symEffect: SymWrite,
12375 asm: x86.ASETEQ,
12376 scale: 1,
12377 reg: regInfo{
12378 inputs: []inputInfo{
12379 {1, 49151},
12380 {0, 4295032831},
12381 },
12382 },
12383 },
12384 {
12385 name: "SETNEstoreidx1",
12386 auxType: auxSymOff,
12387 argLen: 4,
12388 commutative: true,
12389 symEffect: SymWrite,
12390 asm: x86.ASETNE,
12391 scale: 1,
12392 reg: regInfo{
12393 inputs: []inputInfo{
12394 {1, 49151},
12395 {0, 4295032831},
12396 },
12397 },
12398 },
12399 {
12400 name: "SETLstoreidx1",
12401 auxType: auxSymOff,
12402 argLen: 4,
12403 commutative: true,
12404 symEffect: SymWrite,
12405 asm: x86.ASETLT,
12406 scale: 1,
12407 reg: regInfo{
12408 inputs: []inputInfo{
12409 {1, 49151},
12410 {0, 4295032831},
12411 },
12412 },
12413 },
12414 {
12415 name: "SETLEstoreidx1",
12416 auxType: auxSymOff,
12417 argLen: 4,
12418 commutative: true,
12419 symEffect: SymWrite,
12420 asm: x86.ASETLE,
12421 scale: 1,
12422 reg: regInfo{
12423 inputs: []inputInfo{
12424 {1, 49151},
12425 {0, 4295032831},
12426 },
12427 },
12428 },
12429 {
12430 name: "SETGstoreidx1",
12431 auxType: auxSymOff,
12432 argLen: 4,
12433 commutative: true,
12434 symEffect: SymWrite,
12435 asm: x86.ASETGT,
12436 scale: 1,
12437 reg: regInfo{
12438 inputs: []inputInfo{
12439 {1, 49151},
12440 {0, 4295032831},
12441 },
12442 },
12443 },
12444 {
12445 name: "SETGEstoreidx1",
12446 auxType: auxSymOff,
12447 argLen: 4,
12448 commutative: true,
12449 symEffect: SymWrite,
12450 asm: x86.ASETGE,
12451 scale: 1,
12452 reg: regInfo{
12453 inputs: []inputInfo{
12454 {1, 49151},
12455 {0, 4295032831},
12456 },
12457 },
12458 },
12459 {
12460 name: "SETBstoreidx1",
12461 auxType: auxSymOff,
12462 argLen: 4,
12463 commutative: true,
12464 symEffect: SymWrite,
12465 asm: x86.ASETCS,
12466 scale: 1,
12467 reg: regInfo{
12468 inputs: []inputInfo{
12469 {1, 49151},
12470 {0, 4295032831},
12471 },
12472 },
12473 },
12474 {
12475 name: "SETBEstoreidx1",
12476 auxType: auxSymOff,
12477 argLen: 4,
12478 commutative: true,
12479 symEffect: SymWrite,
12480 asm: x86.ASETLS,
12481 scale: 1,
12482 reg: regInfo{
12483 inputs: []inputInfo{
12484 {1, 49151},
12485 {0, 4295032831},
12486 },
12487 },
12488 },
12489 {
12490 name: "SETAstoreidx1",
12491 auxType: auxSymOff,
12492 argLen: 4,
12493 commutative: true,
12494 symEffect: SymWrite,
12495 asm: x86.ASETHI,
12496 scale: 1,
12497 reg: regInfo{
12498 inputs: []inputInfo{
12499 {1, 49151},
12500 {0, 4295032831},
12501 },
12502 },
12503 },
12504 {
12505 name: "SETAEstoreidx1",
12506 auxType: auxSymOff,
12507 argLen: 4,
12508 commutative: true,
12509 symEffect: SymWrite,
12510 asm: x86.ASETCC,
12511 scale: 1,
12512 reg: regInfo{
12513 inputs: []inputInfo{
12514 {1, 49151},
12515 {0, 4295032831},
12516 },
12517 },
12518 },
12519 {
12520 name: "SETEQF",
12521 argLen: 1,
12522 clobberFlags: true,
12523 needIntTemp: true,
12524 asm: x86.ASETEQ,
12525 reg: regInfo{
12526 outputs: []outputInfo{
12527 {0, 49135},
12528 },
12529 },
12530 },
12531 {
12532 name: "SETNEF",
12533 argLen: 1,
12534 clobberFlags: true,
12535 needIntTemp: true,
12536 asm: x86.ASETNE,
12537 reg: regInfo{
12538 outputs: []outputInfo{
12539 {0, 49135},
12540 },
12541 },
12542 },
12543 {
12544 name: "SETORD",
12545 argLen: 1,
12546 asm: x86.ASETPC,
12547 reg: regInfo{
12548 outputs: []outputInfo{
12549 {0, 49135},
12550 },
12551 },
12552 },
12553 {
12554 name: "SETNAN",
12555 argLen: 1,
12556 asm: x86.ASETPS,
12557 reg: regInfo{
12558 outputs: []outputInfo{
12559 {0, 49135},
12560 },
12561 },
12562 },
12563 {
12564 name: "SETGF",
12565 argLen: 1,
12566 asm: x86.ASETHI,
12567 reg: regInfo{
12568 outputs: []outputInfo{
12569 {0, 49135},
12570 },
12571 },
12572 },
12573 {
12574 name: "SETGEF",
12575 argLen: 1,
12576 asm: x86.ASETCC,
12577 reg: regInfo{
12578 outputs: []outputInfo{
12579 {0, 49135},
12580 },
12581 },
12582 },
12583 {
12584 name: "MOVBQSX",
12585 argLen: 1,
12586 asm: x86.AMOVBQSX,
12587 reg: regInfo{
12588 inputs: []inputInfo{
12589 {0, 49135},
12590 },
12591 outputs: []outputInfo{
12592 {0, 49135},
12593 },
12594 },
12595 },
12596 {
12597 name: "MOVBQZX",
12598 argLen: 1,
12599 asm: x86.AMOVBLZX,
12600 reg: regInfo{
12601 inputs: []inputInfo{
12602 {0, 49135},
12603 },
12604 outputs: []outputInfo{
12605 {0, 49135},
12606 },
12607 },
12608 },
12609 {
12610 name: "MOVWQSX",
12611 argLen: 1,
12612 asm: x86.AMOVWQSX,
12613 reg: regInfo{
12614 inputs: []inputInfo{
12615 {0, 49135},
12616 },
12617 outputs: []outputInfo{
12618 {0, 49135},
12619 },
12620 },
12621 },
12622 {
12623 name: "MOVWQZX",
12624 argLen: 1,
12625 asm: x86.AMOVWLZX,
12626 reg: regInfo{
12627 inputs: []inputInfo{
12628 {0, 49135},
12629 },
12630 outputs: []outputInfo{
12631 {0, 49135},
12632 },
12633 },
12634 },
12635 {
12636 name: "MOVLQSX",
12637 argLen: 1,
12638 asm: x86.AMOVLQSX,
12639 reg: regInfo{
12640 inputs: []inputInfo{
12641 {0, 49135},
12642 },
12643 outputs: []outputInfo{
12644 {0, 49135},
12645 },
12646 },
12647 },
12648 {
12649 name: "MOVLQZX",
12650 argLen: 1,
12651 asm: x86.AMOVL,
12652 reg: regInfo{
12653 inputs: []inputInfo{
12654 {0, 49135},
12655 },
12656 outputs: []outputInfo{
12657 {0, 49135},
12658 },
12659 },
12660 },
12661 {
12662 name: "MOVLconst",
12663 auxType: auxInt32,
12664 argLen: 0,
12665 rematerializeable: true,
12666 asm: x86.AMOVL,
12667 reg: regInfo{
12668 outputs: []outputInfo{
12669 {0, 49135},
12670 },
12671 },
12672 },
12673 {
12674 name: "MOVQconst",
12675 auxType: auxInt64,
12676 argLen: 0,
12677 rematerializeable: true,
12678 asm: x86.AMOVQ,
12679 reg: regInfo{
12680 outputs: []outputInfo{
12681 {0, 49135},
12682 },
12683 },
12684 },
12685 {
12686 name: "CVTTSD2SL",
12687 argLen: 1,
12688 asm: x86.ACVTTSD2SL,
12689 reg: regInfo{
12690 inputs: []inputInfo{
12691 {0, 2147418112},
12692 },
12693 outputs: []outputInfo{
12694 {0, 49135},
12695 },
12696 },
12697 },
12698 {
12699 name: "CVTTSD2SQ",
12700 argLen: 1,
12701 asm: x86.ACVTTSD2SQ,
12702 reg: regInfo{
12703 inputs: []inputInfo{
12704 {0, 2147418112},
12705 },
12706 outputs: []outputInfo{
12707 {0, 49135},
12708 },
12709 },
12710 },
12711 {
12712 name: "CVTTSS2SL",
12713 argLen: 1,
12714 asm: x86.ACVTTSS2SL,
12715 reg: regInfo{
12716 inputs: []inputInfo{
12717 {0, 2147418112},
12718 },
12719 outputs: []outputInfo{
12720 {0, 49135},
12721 },
12722 },
12723 },
12724 {
12725 name: "CVTTSS2SQ",
12726 argLen: 1,
12727 asm: x86.ACVTTSS2SQ,
12728 reg: regInfo{
12729 inputs: []inputInfo{
12730 {0, 2147418112},
12731 },
12732 outputs: []outputInfo{
12733 {0, 49135},
12734 },
12735 },
12736 },
12737 {
12738 name: "CVTSL2SS",
12739 argLen: 1,
12740 asm: x86.ACVTSL2SS,
12741 reg: regInfo{
12742 inputs: []inputInfo{
12743 {0, 49135},
12744 },
12745 outputs: []outputInfo{
12746 {0, 2147418112},
12747 },
12748 },
12749 },
12750 {
12751 name: "CVTSL2SD",
12752 argLen: 1,
12753 asm: x86.ACVTSL2SD,
12754 reg: regInfo{
12755 inputs: []inputInfo{
12756 {0, 49135},
12757 },
12758 outputs: []outputInfo{
12759 {0, 2147418112},
12760 },
12761 },
12762 },
12763 {
12764 name: "CVTSQ2SS",
12765 argLen: 1,
12766 asm: x86.ACVTSQ2SS,
12767 reg: regInfo{
12768 inputs: []inputInfo{
12769 {0, 49135},
12770 },
12771 outputs: []outputInfo{
12772 {0, 2147418112},
12773 },
12774 },
12775 },
12776 {
12777 name: "CVTSQ2SD",
12778 argLen: 1,
12779 asm: x86.ACVTSQ2SD,
12780 reg: regInfo{
12781 inputs: []inputInfo{
12782 {0, 49135},
12783 },
12784 outputs: []outputInfo{
12785 {0, 2147418112},
12786 },
12787 },
12788 },
12789 {
12790 name: "CVTSD2SS",
12791 argLen: 1,
12792 asm: x86.ACVTSD2SS,
12793 reg: regInfo{
12794 inputs: []inputInfo{
12795 {0, 2147418112},
12796 },
12797 outputs: []outputInfo{
12798 {0, 2147418112},
12799 },
12800 },
12801 },
12802 {
12803 name: "CVTSS2SD",
12804 argLen: 1,
12805 asm: x86.ACVTSS2SD,
12806 reg: regInfo{
12807 inputs: []inputInfo{
12808 {0, 2147418112},
12809 },
12810 outputs: []outputInfo{
12811 {0, 2147418112},
12812 },
12813 },
12814 },
12815 {
12816 name: "MOVQi2f",
12817 argLen: 1,
12818 reg: regInfo{
12819 inputs: []inputInfo{
12820 {0, 49135},
12821 },
12822 outputs: []outputInfo{
12823 {0, 2147418112},
12824 },
12825 },
12826 },
12827 {
12828 name: "MOVQf2i",
12829 argLen: 1,
12830 reg: regInfo{
12831 inputs: []inputInfo{
12832 {0, 2147418112},
12833 },
12834 outputs: []outputInfo{
12835 {0, 49135},
12836 },
12837 },
12838 },
12839 {
12840 name: "MOVLi2f",
12841 argLen: 1,
12842 reg: regInfo{
12843 inputs: []inputInfo{
12844 {0, 49135},
12845 },
12846 outputs: []outputInfo{
12847 {0, 2147418112},
12848 },
12849 },
12850 },
12851 {
12852 name: "MOVLf2i",
12853 argLen: 1,
12854 reg: regInfo{
12855 inputs: []inputInfo{
12856 {0, 2147418112},
12857 },
12858 outputs: []outputInfo{
12859 {0, 49135},
12860 },
12861 },
12862 },
12863 {
12864 name: "PXOR",
12865 argLen: 2,
12866 commutative: true,
12867 resultInArg0: true,
12868 asm: x86.APXOR,
12869 reg: regInfo{
12870 inputs: []inputInfo{
12871 {0, 2147418112},
12872 {1, 2147418112},
12873 },
12874 outputs: []outputInfo{
12875 {0, 2147418112},
12876 },
12877 },
12878 },
12879 {
12880 name: "POR",
12881 argLen: 2,
12882 commutative: true,
12883 resultInArg0: true,
12884 asm: x86.APOR,
12885 reg: regInfo{
12886 inputs: []inputInfo{
12887 {0, 2147418112},
12888 {1, 2147418112},
12889 },
12890 outputs: []outputInfo{
12891 {0, 2147418112},
12892 },
12893 },
12894 },
12895 {
12896 name: "LEAQ",
12897 auxType: auxSymOff,
12898 argLen: 1,
12899 rematerializeable: true,
12900 symEffect: SymAddr,
12901 asm: x86.ALEAQ,
12902 reg: regInfo{
12903 inputs: []inputInfo{
12904 {0, 4295032831},
12905 },
12906 outputs: []outputInfo{
12907 {0, 49135},
12908 },
12909 },
12910 },
12911 {
12912 name: "LEAL",
12913 auxType: auxSymOff,
12914 argLen: 1,
12915 rematerializeable: true,
12916 symEffect: SymAddr,
12917 asm: x86.ALEAL,
12918 reg: regInfo{
12919 inputs: []inputInfo{
12920 {0, 4295032831},
12921 },
12922 outputs: []outputInfo{
12923 {0, 49135},
12924 },
12925 },
12926 },
12927 {
12928 name: "LEAW",
12929 auxType: auxSymOff,
12930 argLen: 1,
12931 rematerializeable: true,
12932 symEffect: SymAddr,
12933 asm: x86.ALEAW,
12934 reg: regInfo{
12935 inputs: []inputInfo{
12936 {0, 4295032831},
12937 },
12938 outputs: []outputInfo{
12939 {0, 49135},
12940 },
12941 },
12942 },
12943 {
12944 name: "LEAQ1",
12945 auxType: auxSymOff,
12946 argLen: 2,
12947 commutative: true,
12948 symEffect: SymAddr,
12949 asm: x86.ALEAQ,
12950 scale: 1,
12951 reg: regInfo{
12952 inputs: []inputInfo{
12953 {1, 49151},
12954 {0, 4295032831},
12955 },
12956 outputs: []outputInfo{
12957 {0, 49135},
12958 },
12959 },
12960 },
12961 {
12962 name: "LEAL1",
12963 auxType: auxSymOff,
12964 argLen: 2,
12965 commutative: true,
12966 symEffect: SymAddr,
12967 asm: x86.ALEAL,
12968 scale: 1,
12969 reg: regInfo{
12970 inputs: []inputInfo{
12971 {1, 49151},
12972 {0, 4295032831},
12973 },
12974 outputs: []outputInfo{
12975 {0, 49135},
12976 },
12977 },
12978 },
12979 {
12980 name: "LEAW1",
12981 auxType: auxSymOff,
12982 argLen: 2,
12983 commutative: true,
12984 symEffect: SymAddr,
12985 asm: x86.ALEAW,
12986 scale: 1,
12987 reg: regInfo{
12988 inputs: []inputInfo{
12989 {1, 49151},
12990 {0, 4295032831},
12991 },
12992 outputs: []outputInfo{
12993 {0, 49135},
12994 },
12995 },
12996 },
12997 {
12998 name: "LEAQ2",
12999 auxType: auxSymOff,
13000 argLen: 2,
13001 symEffect: SymAddr,
13002 asm: x86.ALEAQ,
13003 scale: 2,
13004 reg: regInfo{
13005 inputs: []inputInfo{
13006 {1, 49151},
13007 {0, 4295032831},
13008 },
13009 outputs: []outputInfo{
13010 {0, 49135},
13011 },
13012 },
13013 },
13014 {
13015 name: "LEAL2",
13016 auxType: auxSymOff,
13017 argLen: 2,
13018 symEffect: SymAddr,
13019 asm: x86.ALEAL,
13020 scale: 2,
13021 reg: regInfo{
13022 inputs: []inputInfo{
13023 {1, 49151},
13024 {0, 4295032831},
13025 },
13026 outputs: []outputInfo{
13027 {0, 49135},
13028 },
13029 },
13030 },
13031 {
13032 name: "LEAW2",
13033 auxType: auxSymOff,
13034 argLen: 2,
13035 symEffect: SymAddr,
13036 asm: x86.ALEAW,
13037 scale: 2,
13038 reg: regInfo{
13039 inputs: []inputInfo{
13040 {1, 49151},
13041 {0, 4295032831},
13042 },
13043 outputs: []outputInfo{
13044 {0, 49135},
13045 },
13046 },
13047 },
13048 {
13049 name: "LEAQ4",
13050 auxType: auxSymOff,
13051 argLen: 2,
13052 symEffect: SymAddr,
13053 asm: x86.ALEAQ,
13054 scale: 4,
13055 reg: regInfo{
13056 inputs: []inputInfo{
13057 {1, 49151},
13058 {0, 4295032831},
13059 },
13060 outputs: []outputInfo{
13061 {0, 49135},
13062 },
13063 },
13064 },
13065 {
13066 name: "LEAL4",
13067 auxType: auxSymOff,
13068 argLen: 2,
13069 symEffect: SymAddr,
13070 asm: x86.ALEAL,
13071 scale: 4,
13072 reg: regInfo{
13073 inputs: []inputInfo{
13074 {1, 49151},
13075 {0, 4295032831},
13076 },
13077 outputs: []outputInfo{
13078 {0, 49135},
13079 },
13080 },
13081 },
13082 {
13083 name: "LEAW4",
13084 auxType: auxSymOff,
13085 argLen: 2,
13086 symEffect: SymAddr,
13087 asm: x86.ALEAW,
13088 scale: 4,
13089 reg: regInfo{
13090 inputs: []inputInfo{
13091 {1, 49151},
13092 {0, 4295032831},
13093 },
13094 outputs: []outputInfo{
13095 {0, 49135},
13096 },
13097 },
13098 },
13099 {
13100 name: "LEAQ8",
13101 auxType: auxSymOff,
13102 argLen: 2,
13103 symEffect: SymAddr,
13104 asm: x86.ALEAQ,
13105 scale: 8,
13106 reg: regInfo{
13107 inputs: []inputInfo{
13108 {1, 49151},
13109 {0, 4295032831},
13110 },
13111 outputs: []outputInfo{
13112 {0, 49135},
13113 },
13114 },
13115 },
13116 {
13117 name: "LEAL8",
13118 auxType: auxSymOff,
13119 argLen: 2,
13120 symEffect: SymAddr,
13121 asm: x86.ALEAL,
13122 scale: 8,
13123 reg: regInfo{
13124 inputs: []inputInfo{
13125 {1, 49151},
13126 {0, 4295032831},
13127 },
13128 outputs: []outputInfo{
13129 {0, 49135},
13130 },
13131 },
13132 },
13133 {
13134 name: "LEAW8",
13135 auxType: auxSymOff,
13136 argLen: 2,
13137 symEffect: SymAddr,
13138 asm: x86.ALEAW,
13139 scale: 8,
13140 reg: regInfo{
13141 inputs: []inputInfo{
13142 {1, 49151},
13143 {0, 4295032831},
13144 },
13145 outputs: []outputInfo{
13146 {0, 49135},
13147 },
13148 },
13149 },
13150 {
13151 name: "MOVBload",
13152 auxType: auxSymOff,
13153 argLen: 2,
13154 faultOnNilArg0: true,
13155 symEffect: SymRead,
13156 asm: x86.AMOVBLZX,
13157 reg: regInfo{
13158 inputs: []inputInfo{
13159 {0, 4295032831},
13160 },
13161 outputs: []outputInfo{
13162 {0, 49135},
13163 },
13164 },
13165 },
13166 {
13167 name: "MOVBQSXload",
13168 auxType: auxSymOff,
13169 argLen: 2,
13170 faultOnNilArg0: true,
13171 symEffect: SymRead,
13172 asm: x86.AMOVBQSX,
13173 reg: regInfo{
13174 inputs: []inputInfo{
13175 {0, 4295032831},
13176 },
13177 outputs: []outputInfo{
13178 {0, 49135},
13179 },
13180 },
13181 },
13182 {
13183 name: "MOVWload",
13184 auxType: auxSymOff,
13185 argLen: 2,
13186 faultOnNilArg0: true,
13187 symEffect: SymRead,
13188 asm: x86.AMOVWLZX,
13189 reg: regInfo{
13190 inputs: []inputInfo{
13191 {0, 4295032831},
13192 },
13193 outputs: []outputInfo{
13194 {0, 49135},
13195 },
13196 },
13197 },
13198 {
13199 name: "MOVWQSXload",
13200 auxType: auxSymOff,
13201 argLen: 2,
13202 faultOnNilArg0: true,
13203 symEffect: SymRead,
13204 asm: x86.AMOVWQSX,
13205 reg: regInfo{
13206 inputs: []inputInfo{
13207 {0, 4295032831},
13208 },
13209 outputs: []outputInfo{
13210 {0, 49135},
13211 },
13212 },
13213 },
13214 {
13215 name: "MOVLload",
13216 auxType: auxSymOff,
13217 argLen: 2,
13218 faultOnNilArg0: true,
13219 symEffect: SymRead,
13220 asm: x86.AMOVL,
13221 reg: regInfo{
13222 inputs: []inputInfo{
13223 {0, 4295032831},
13224 },
13225 outputs: []outputInfo{
13226 {0, 49135},
13227 },
13228 },
13229 },
13230 {
13231 name: "MOVLQSXload",
13232 auxType: auxSymOff,
13233 argLen: 2,
13234 faultOnNilArg0: true,
13235 symEffect: SymRead,
13236 asm: x86.AMOVLQSX,
13237 reg: regInfo{
13238 inputs: []inputInfo{
13239 {0, 4295032831},
13240 },
13241 outputs: []outputInfo{
13242 {0, 49135},
13243 },
13244 },
13245 },
13246 {
13247 name: "MOVQload",
13248 auxType: auxSymOff,
13249 argLen: 2,
13250 faultOnNilArg0: true,
13251 symEffect: SymRead,
13252 asm: x86.AMOVQ,
13253 reg: regInfo{
13254 inputs: []inputInfo{
13255 {0, 4295032831},
13256 },
13257 outputs: []outputInfo{
13258 {0, 49135},
13259 },
13260 },
13261 },
13262 {
13263 name: "MOVBstore",
13264 auxType: auxSymOff,
13265 argLen: 3,
13266 faultOnNilArg0: true,
13267 symEffect: SymWrite,
13268 asm: x86.AMOVB,
13269 reg: regInfo{
13270 inputs: []inputInfo{
13271 {1, 49151},
13272 {0, 4295032831},
13273 },
13274 },
13275 },
13276 {
13277 name: "MOVWstore",
13278 auxType: auxSymOff,
13279 argLen: 3,
13280 faultOnNilArg0: true,
13281 symEffect: SymWrite,
13282 asm: x86.AMOVW,
13283 reg: regInfo{
13284 inputs: []inputInfo{
13285 {1, 49151},
13286 {0, 4295032831},
13287 },
13288 },
13289 },
13290 {
13291 name: "MOVLstore",
13292 auxType: auxSymOff,
13293 argLen: 3,
13294 faultOnNilArg0: true,
13295 symEffect: SymWrite,
13296 asm: x86.AMOVL,
13297 reg: regInfo{
13298 inputs: []inputInfo{
13299 {1, 49151},
13300 {0, 4295032831},
13301 },
13302 },
13303 },
13304 {
13305 name: "MOVQstore",
13306 auxType: auxSymOff,
13307 argLen: 3,
13308 faultOnNilArg0: true,
13309 symEffect: SymWrite,
13310 asm: x86.AMOVQ,
13311 reg: regInfo{
13312 inputs: []inputInfo{
13313 {1, 49151},
13314 {0, 4295032831},
13315 },
13316 },
13317 },
13318 {
13319 name: "MOVOload",
13320 auxType: auxSymOff,
13321 argLen: 2,
13322 faultOnNilArg0: true,
13323 symEffect: SymRead,
13324 asm: x86.AMOVUPS,
13325 reg: regInfo{
13326 inputs: []inputInfo{
13327 {0, 4295016447},
13328 },
13329 outputs: []outputInfo{
13330 {0, 2147418112},
13331 },
13332 },
13333 },
13334 {
13335 name: "MOVOstore",
13336 auxType: auxSymOff,
13337 argLen: 3,
13338 faultOnNilArg0: true,
13339 symEffect: SymWrite,
13340 asm: x86.AMOVUPS,
13341 reg: regInfo{
13342 inputs: []inputInfo{
13343 {1, 2147418112},
13344 {0, 4295016447},
13345 },
13346 },
13347 },
13348 {
13349 name: "MOVBloadidx1",
13350 auxType: auxSymOff,
13351 argLen: 3,
13352 commutative: true,
13353 symEffect: SymRead,
13354 asm: x86.AMOVBLZX,
13355 scale: 1,
13356 reg: regInfo{
13357 inputs: []inputInfo{
13358 {1, 49151},
13359 {0, 4295032831},
13360 },
13361 outputs: []outputInfo{
13362 {0, 49135},
13363 },
13364 },
13365 },
13366 {
13367 name: "MOVWloadidx1",
13368 auxType: auxSymOff,
13369 argLen: 3,
13370 commutative: true,
13371 symEffect: SymRead,
13372 asm: x86.AMOVWLZX,
13373 scale: 1,
13374 reg: regInfo{
13375 inputs: []inputInfo{
13376 {1, 49151},
13377 {0, 4295032831},
13378 },
13379 outputs: []outputInfo{
13380 {0, 49135},
13381 },
13382 },
13383 },
13384 {
13385 name: "MOVWloadidx2",
13386 auxType: auxSymOff,
13387 argLen: 3,
13388 symEffect: SymRead,
13389 asm: x86.AMOVWLZX,
13390 scale: 2,
13391 reg: regInfo{
13392 inputs: []inputInfo{
13393 {1, 49151},
13394 {0, 4295032831},
13395 },
13396 outputs: []outputInfo{
13397 {0, 49135},
13398 },
13399 },
13400 },
13401 {
13402 name: "MOVLloadidx1",
13403 auxType: auxSymOff,
13404 argLen: 3,
13405 commutative: true,
13406 symEffect: SymRead,
13407 asm: x86.AMOVL,
13408 scale: 1,
13409 reg: regInfo{
13410 inputs: []inputInfo{
13411 {1, 49151},
13412 {0, 4295032831},
13413 },
13414 outputs: []outputInfo{
13415 {0, 49135},
13416 },
13417 },
13418 },
13419 {
13420 name: "MOVLloadidx4",
13421 auxType: auxSymOff,
13422 argLen: 3,
13423 symEffect: SymRead,
13424 asm: x86.AMOVL,
13425 scale: 4,
13426 reg: regInfo{
13427 inputs: []inputInfo{
13428 {1, 49151},
13429 {0, 4295032831},
13430 },
13431 outputs: []outputInfo{
13432 {0, 49135},
13433 },
13434 },
13435 },
13436 {
13437 name: "MOVLloadidx8",
13438 auxType: auxSymOff,
13439 argLen: 3,
13440 symEffect: SymRead,
13441 asm: x86.AMOVL,
13442 scale: 8,
13443 reg: regInfo{
13444 inputs: []inputInfo{
13445 {1, 49151},
13446 {0, 4295032831},
13447 },
13448 outputs: []outputInfo{
13449 {0, 49135},
13450 },
13451 },
13452 },
13453 {
13454 name: "MOVQloadidx1",
13455 auxType: auxSymOff,
13456 argLen: 3,
13457 commutative: true,
13458 symEffect: SymRead,
13459 asm: x86.AMOVQ,
13460 scale: 1,
13461 reg: regInfo{
13462 inputs: []inputInfo{
13463 {1, 49151},
13464 {0, 4295032831},
13465 },
13466 outputs: []outputInfo{
13467 {0, 49135},
13468 },
13469 },
13470 },
13471 {
13472 name: "MOVQloadidx8",
13473 auxType: auxSymOff,
13474 argLen: 3,
13475 symEffect: SymRead,
13476 asm: x86.AMOVQ,
13477 scale: 8,
13478 reg: regInfo{
13479 inputs: []inputInfo{
13480 {1, 49151},
13481 {0, 4295032831},
13482 },
13483 outputs: []outputInfo{
13484 {0, 49135},
13485 },
13486 },
13487 },
13488 {
13489 name: "MOVBstoreidx1",
13490 auxType: auxSymOff,
13491 argLen: 4,
13492 commutative: true,
13493 symEffect: SymWrite,
13494 asm: x86.AMOVB,
13495 scale: 1,
13496 reg: regInfo{
13497 inputs: []inputInfo{
13498 {1, 49151},
13499 {2, 49151},
13500 {0, 4295032831},
13501 },
13502 },
13503 },
13504 {
13505 name: "MOVWstoreidx1",
13506 auxType: auxSymOff,
13507 argLen: 4,
13508 commutative: true,
13509 symEffect: SymWrite,
13510 asm: x86.AMOVW,
13511 scale: 1,
13512 reg: regInfo{
13513 inputs: []inputInfo{
13514 {1, 49151},
13515 {2, 49151},
13516 {0, 4295032831},
13517 },
13518 },
13519 },
13520 {
13521 name: "MOVWstoreidx2",
13522 auxType: auxSymOff,
13523 argLen: 4,
13524 symEffect: SymWrite,
13525 asm: x86.AMOVW,
13526 scale: 2,
13527 reg: regInfo{
13528 inputs: []inputInfo{
13529 {1, 49151},
13530 {2, 49151},
13531 {0, 4295032831},
13532 },
13533 },
13534 },
13535 {
13536 name: "MOVLstoreidx1",
13537 auxType: auxSymOff,
13538 argLen: 4,
13539 commutative: true,
13540 symEffect: SymWrite,
13541 asm: x86.AMOVL,
13542 scale: 1,
13543 reg: regInfo{
13544 inputs: []inputInfo{
13545 {1, 49151},
13546 {2, 49151},
13547 {0, 4295032831},
13548 },
13549 },
13550 },
13551 {
13552 name: "MOVLstoreidx4",
13553 auxType: auxSymOff,
13554 argLen: 4,
13555 symEffect: SymWrite,
13556 asm: x86.AMOVL,
13557 scale: 4,
13558 reg: regInfo{
13559 inputs: []inputInfo{
13560 {1, 49151},
13561 {2, 49151},
13562 {0, 4295032831},
13563 },
13564 },
13565 },
13566 {
13567 name: "MOVLstoreidx8",
13568 auxType: auxSymOff,
13569 argLen: 4,
13570 symEffect: SymWrite,
13571 asm: x86.AMOVL,
13572 scale: 8,
13573 reg: regInfo{
13574 inputs: []inputInfo{
13575 {1, 49151},
13576 {2, 49151},
13577 {0, 4295032831},
13578 },
13579 },
13580 },
13581 {
13582 name: "MOVQstoreidx1",
13583 auxType: auxSymOff,
13584 argLen: 4,
13585 commutative: true,
13586 symEffect: SymWrite,
13587 asm: x86.AMOVQ,
13588 scale: 1,
13589 reg: regInfo{
13590 inputs: []inputInfo{
13591 {1, 49151},
13592 {2, 49151},
13593 {0, 4295032831},
13594 },
13595 },
13596 },
13597 {
13598 name: "MOVQstoreidx8",
13599 auxType: auxSymOff,
13600 argLen: 4,
13601 symEffect: SymWrite,
13602 asm: x86.AMOVQ,
13603 scale: 8,
13604 reg: regInfo{
13605 inputs: []inputInfo{
13606 {1, 49151},
13607 {2, 49151},
13608 {0, 4295032831},
13609 },
13610 },
13611 },
13612 {
13613 name: "MOVBstoreconst",
13614 auxType: auxSymValAndOff,
13615 argLen: 2,
13616 faultOnNilArg0: true,
13617 symEffect: SymWrite,
13618 asm: x86.AMOVB,
13619 reg: regInfo{
13620 inputs: []inputInfo{
13621 {0, 4295032831},
13622 },
13623 },
13624 },
13625 {
13626 name: "MOVWstoreconst",
13627 auxType: auxSymValAndOff,
13628 argLen: 2,
13629 faultOnNilArg0: true,
13630 symEffect: SymWrite,
13631 asm: x86.AMOVW,
13632 reg: regInfo{
13633 inputs: []inputInfo{
13634 {0, 4295032831},
13635 },
13636 },
13637 },
13638 {
13639 name: "MOVLstoreconst",
13640 auxType: auxSymValAndOff,
13641 argLen: 2,
13642 faultOnNilArg0: true,
13643 symEffect: SymWrite,
13644 asm: x86.AMOVL,
13645 reg: regInfo{
13646 inputs: []inputInfo{
13647 {0, 4295032831},
13648 },
13649 },
13650 },
13651 {
13652 name: "MOVQstoreconst",
13653 auxType: auxSymValAndOff,
13654 argLen: 2,
13655 faultOnNilArg0: true,
13656 symEffect: SymWrite,
13657 asm: x86.AMOVQ,
13658 reg: regInfo{
13659 inputs: []inputInfo{
13660 {0, 4295032831},
13661 },
13662 },
13663 },
13664 {
13665 name: "MOVOstoreconst",
13666 auxType: auxSymValAndOff,
13667 argLen: 2,
13668 faultOnNilArg0: true,
13669 symEffect: SymWrite,
13670 asm: x86.AMOVUPS,
13671 reg: regInfo{
13672 inputs: []inputInfo{
13673 {0, 4295032831},
13674 },
13675 },
13676 },
13677 {
13678 name: "MOVBstoreconstidx1",
13679 auxType: auxSymValAndOff,
13680 argLen: 3,
13681 commutative: true,
13682 symEffect: SymWrite,
13683 asm: x86.AMOVB,
13684 scale: 1,
13685 reg: regInfo{
13686 inputs: []inputInfo{
13687 {1, 49151},
13688 {0, 4295032831},
13689 },
13690 },
13691 },
13692 {
13693 name: "MOVWstoreconstidx1",
13694 auxType: auxSymValAndOff,
13695 argLen: 3,
13696 commutative: true,
13697 symEffect: SymWrite,
13698 asm: x86.AMOVW,
13699 scale: 1,
13700 reg: regInfo{
13701 inputs: []inputInfo{
13702 {1, 49151},
13703 {0, 4295032831},
13704 },
13705 },
13706 },
13707 {
13708 name: "MOVWstoreconstidx2",
13709 auxType: auxSymValAndOff,
13710 argLen: 3,
13711 symEffect: SymWrite,
13712 asm: x86.AMOVW,
13713 scale: 2,
13714 reg: regInfo{
13715 inputs: []inputInfo{
13716 {1, 49151},
13717 {0, 4295032831},
13718 },
13719 },
13720 },
13721 {
13722 name: "MOVLstoreconstidx1",
13723 auxType: auxSymValAndOff,
13724 argLen: 3,
13725 commutative: true,
13726 symEffect: SymWrite,
13727 asm: x86.AMOVL,
13728 scale: 1,
13729 reg: regInfo{
13730 inputs: []inputInfo{
13731 {1, 49151},
13732 {0, 4295032831},
13733 },
13734 },
13735 },
13736 {
13737 name: "MOVLstoreconstidx4",
13738 auxType: auxSymValAndOff,
13739 argLen: 3,
13740 symEffect: SymWrite,
13741 asm: x86.AMOVL,
13742 scale: 4,
13743 reg: regInfo{
13744 inputs: []inputInfo{
13745 {1, 49151},
13746 {0, 4295032831},
13747 },
13748 },
13749 },
13750 {
13751 name: "MOVQstoreconstidx1",
13752 auxType: auxSymValAndOff,
13753 argLen: 3,
13754 commutative: true,
13755 symEffect: SymWrite,
13756 asm: x86.AMOVQ,
13757 scale: 1,
13758 reg: regInfo{
13759 inputs: []inputInfo{
13760 {1, 49151},
13761 {0, 4295032831},
13762 },
13763 },
13764 },
13765 {
13766 name: "MOVQstoreconstidx8",
13767 auxType: auxSymValAndOff,
13768 argLen: 3,
13769 symEffect: SymWrite,
13770 asm: x86.AMOVQ,
13771 scale: 8,
13772 reg: regInfo{
13773 inputs: []inputInfo{
13774 {1, 49151},
13775 {0, 4295032831},
13776 },
13777 },
13778 },
13779 {
13780 name: "DUFFZERO",
13781 auxType: auxInt64,
13782 argLen: 2,
13783 unsafePoint: true,
13784 reg: regInfo{
13785 inputs: []inputInfo{
13786 {0, 128},
13787 },
13788 clobbers: 128,
13789 },
13790 },
13791 {
13792 name: "REPSTOSQ",
13793 argLen: 4,
13794 faultOnNilArg0: true,
13795 reg: regInfo{
13796 inputs: []inputInfo{
13797 {0, 128},
13798 {1, 2},
13799 {2, 1},
13800 },
13801 clobbers: 130,
13802 },
13803 },
13804 {
13805 name: "CALLstatic",
13806 auxType: auxCallOff,
13807 argLen: -1,
13808 clobberFlags: true,
13809 call: true,
13810 reg: regInfo{
13811 clobbers: 2147483631,
13812 },
13813 },
13814 {
13815 name: "CALLtail",
13816 auxType: auxCallOff,
13817 argLen: -1,
13818 clobberFlags: true,
13819 call: true,
13820 tailCall: true,
13821 reg: regInfo{
13822 clobbers: 2147483631,
13823 },
13824 },
13825 {
13826 name: "CALLclosure",
13827 auxType: auxCallOff,
13828 argLen: -1,
13829 clobberFlags: true,
13830 call: true,
13831 reg: regInfo{
13832 inputs: []inputInfo{
13833 {1, 4},
13834 {0, 49151},
13835 },
13836 clobbers: 2147483631,
13837 },
13838 },
13839 {
13840 name: "CALLinter",
13841 auxType: auxCallOff,
13842 argLen: -1,
13843 clobberFlags: true,
13844 call: true,
13845 reg: regInfo{
13846 inputs: []inputInfo{
13847 {0, 49135},
13848 },
13849 clobbers: 2147483631,
13850 },
13851 },
13852 {
13853 name: "DUFFCOPY",
13854 auxType: auxInt64,
13855 argLen: 3,
13856 clobberFlags: true,
13857 unsafePoint: true,
13858 reg: regInfo{
13859 inputs: []inputInfo{
13860 {0, 128},
13861 {1, 64},
13862 },
13863 clobbers: 65728,
13864 },
13865 },
13866 {
13867 name: "REPMOVSQ",
13868 argLen: 4,
13869 faultOnNilArg0: true,
13870 faultOnNilArg1: true,
13871 reg: regInfo{
13872 inputs: []inputInfo{
13873 {0, 128},
13874 {1, 64},
13875 {2, 2},
13876 },
13877 clobbers: 194,
13878 },
13879 },
13880 {
13881 name: "InvertFlags",
13882 argLen: 1,
13883 reg: regInfo{},
13884 },
13885 {
13886 name: "LoweredGetG",
13887 argLen: 1,
13888 reg: regInfo{
13889 outputs: []outputInfo{
13890 {0, 49135},
13891 },
13892 },
13893 },
13894 {
13895 name: "LoweredGetClosurePtr",
13896 argLen: 0,
13897 zeroWidth: true,
13898 reg: regInfo{
13899 outputs: []outputInfo{
13900 {0, 4},
13901 },
13902 },
13903 },
13904 {
13905 name: "LoweredGetCallerPC",
13906 argLen: 0,
13907 rematerializeable: true,
13908 reg: regInfo{
13909 outputs: []outputInfo{
13910 {0, 49135},
13911 },
13912 },
13913 },
13914 {
13915 name: "LoweredGetCallerSP",
13916 argLen: 1,
13917 rematerializeable: true,
13918 reg: regInfo{
13919 outputs: []outputInfo{
13920 {0, 49135},
13921 },
13922 },
13923 },
13924 {
13925 name: "LoweredNilCheck",
13926 argLen: 2,
13927 clobberFlags: true,
13928 nilCheck: true,
13929 faultOnNilArg0: true,
13930 reg: regInfo{
13931 inputs: []inputInfo{
13932 {0, 49151},
13933 },
13934 },
13935 },
13936 {
13937 name: "LoweredWB",
13938 auxType: auxInt64,
13939 argLen: 1,
13940 clobberFlags: true,
13941 reg: regInfo{
13942 clobbers: 2147418112,
13943 outputs: []outputInfo{
13944 {0, 2048},
13945 },
13946 },
13947 },
13948 {
13949 name: "LoweredHasCPUFeature",
13950 auxType: auxSym,
13951 argLen: 0,
13952 rematerializeable: true,
13953 symEffect: SymNone,
13954 reg: regInfo{
13955 outputs: []outputInfo{
13956 {0, 49135},
13957 },
13958 },
13959 },
13960 {
13961 name: "LoweredPanicBoundsA",
13962 auxType: auxInt64,
13963 argLen: 3,
13964 call: true,
13965 reg: regInfo{
13966 inputs: []inputInfo{
13967 {0, 4},
13968 {1, 8},
13969 },
13970 },
13971 },
13972 {
13973 name: "LoweredPanicBoundsB",
13974 auxType: auxInt64,
13975 argLen: 3,
13976 call: true,
13977 reg: regInfo{
13978 inputs: []inputInfo{
13979 {0, 2},
13980 {1, 4},
13981 },
13982 },
13983 },
13984 {
13985 name: "LoweredPanicBoundsC",
13986 auxType: auxInt64,
13987 argLen: 3,
13988 call: true,
13989 reg: regInfo{
13990 inputs: []inputInfo{
13991 {0, 1},
13992 {1, 2},
13993 },
13994 },
13995 },
13996 {
13997 name: "FlagEQ",
13998 argLen: 0,
13999 reg: regInfo{},
14000 },
14001 {
14002 name: "FlagLT_ULT",
14003 argLen: 0,
14004 reg: regInfo{},
14005 },
14006 {
14007 name: "FlagLT_UGT",
14008 argLen: 0,
14009 reg: regInfo{},
14010 },
14011 {
14012 name: "FlagGT_UGT",
14013 argLen: 0,
14014 reg: regInfo{},
14015 },
14016 {
14017 name: "FlagGT_ULT",
14018 argLen: 0,
14019 reg: regInfo{},
14020 },
14021 {
14022 name: "MOVBatomicload",
14023 auxType: auxSymOff,
14024 argLen: 2,
14025 faultOnNilArg0: true,
14026 symEffect: SymRead,
14027 asm: x86.AMOVB,
14028 reg: regInfo{
14029 inputs: []inputInfo{
14030 {0, 4295032831},
14031 },
14032 outputs: []outputInfo{
14033 {0, 49135},
14034 },
14035 },
14036 },
14037 {
14038 name: "MOVLatomicload",
14039 auxType: auxSymOff,
14040 argLen: 2,
14041 faultOnNilArg0: true,
14042 symEffect: SymRead,
14043 asm: x86.AMOVL,
14044 reg: regInfo{
14045 inputs: []inputInfo{
14046 {0, 4295032831},
14047 },
14048 outputs: []outputInfo{
14049 {0, 49135},
14050 },
14051 },
14052 },
14053 {
14054 name: "MOVQatomicload",
14055 auxType: auxSymOff,
14056 argLen: 2,
14057 faultOnNilArg0: true,
14058 symEffect: SymRead,
14059 asm: x86.AMOVQ,
14060 reg: regInfo{
14061 inputs: []inputInfo{
14062 {0, 4295032831},
14063 },
14064 outputs: []outputInfo{
14065 {0, 49135},
14066 },
14067 },
14068 },
14069 {
14070 name: "XCHGB",
14071 auxType: auxSymOff,
14072 argLen: 3,
14073 resultInArg0: true,
14074 faultOnNilArg1: true,
14075 hasSideEffects: true,
14076 symEffect: SymRdWr,
14077 asm: x86.AXCHGB,
14078 reg: regInfo{
14079 inputs: []inputInfo{
14080 {0, 49135},
14081 {1, 4295032831},
14082 },
14083 outputs: []outputInfo{
14084 {0, 49135},
14085 },
14086 },
14087 },
14088 {
14089 name: "XCHGL",
14090 auxType: auxSymOff,
14091 argLen: 3,
14092 resultInArg0: true,
14093 faultOnNilArg1: true,
14094 hasSideEffects: true,
14095 symEffect: SymRdWr,
14096 asm: x86.AXCHGL,
14097 reg: regInfo{
14098 inputs: []inputInfo{
14099 {0, 49135},
14100 {1, 4295032831},
14101 },
14102 outputs: []outputInfo{
14103 {0, 49135},
14104 },
14105 },
14106 },
14107 {
14108 name: "XCHGQ",
14109 auxType: auxSymOff,
14110 argLen: 3,
14111 resultInArg0: true,
14112 faultOnNilArg1: true,
14113 hasSideEffects: true,
14114 symEffect: SymRdWr,
14115 asm: x86.AXCHGQ,
14116 reg: regInfo{
14117 inputs: []inputInfo{
14118 {0, 49135},
14119 {1, 4295032831},
14120 },
14121 outputs: []outputInfo{
14122 {0, 49135},
14123 },
14124 },
14125 },
14126 {
14127 name: "XADDLlock",
14128 auxType: auxSymOff,
14129 argLen: 3,
14130 resultInArg0: true,
14131 clobberFlags: true,
14132 faultOnNilArg1: true,
14133 hasSideEffects: true,
14134 symEffect: SymRdWr,
14135 asm: x86.AXADDL,
14136 reg: regInfo{
14137 inputs: []inputInfo{
14138 {0, 49135},
14139 {1, 4295032831},
14140 },
14141 outputs: []outputInfo{
14142 {0, 49135},
14143 },
14144 },
14145 },
14146 {
14147 name: "XADDQlock",
14148 auxType: auxSymOff,
14149 argLen: 3,
14150 resultInArg0: true,
14151 clobberFlags: true,
14152 faultOnNilArg1: true,
14153 hasSideEffects: true,
14154 symEffect: SymRdWr,
14155 asm: x86.AXADDQ,
14156 reg: regInfo{
14157 inputs: []inputInfo{
14158 {0, 49135},
14159 {1, 4295032831},
14160 },
14161 outputs: []outputInfo{
14162 {0, 49135},
14163 },
14164 },
14165 },
14166 {
14167 name: "AddTupleFirst32",
14168 argLen: 2,
14169 reg: regInfo{},
14170 },
14171 {
14172 name: "AddTupleFirst64",
14173 argLen: 2,
14174 reg: regInfo{},
14175 },
14176 {
14177 name: "CMPXCHGLlock",
14178 auxType: auxSymOff,
14179 argLen: 4,
14180 clobberFlags: true,
14181 faultOnNilArg0: true,
14182 hasSideEffects: true,
14183 symEffect: SymRdWr,
14184 asm: x86.ACMPXCHGL,
14185 reg: regInfo{
14186 inputs: []inputInfo{
14187 {1, 1},
14188 {0, 49135},
14189 {2, 49135},
14190 },
14191 clobbers: 1,
14192 outputs: []outputInfo{
14193 {1, 0},
14194 {0, 49135},
14195 },
14196 },
14197 },
14198 {
14199 name: "CMPXCHGQlock",
14200 auxType: auxSymOff,
14201 argLen: 4,
14202 clobberFlags: true,
14203 faultOnNilArg0: true,
14204 hasSideEffects: true,
14205 symEffect: SymRdWr,
14206 asm: x86.ACMPXCHGQ,
14207 reg: regInfo{
14208 inputs: []inputInfo{
14209 {1, 1},
14210 {0, 49135},
14211 {2, 49135},
14212 },
14213 clobbers: 1,
14214 outputs: []outputInfo{
14215 {1, 0},
14216 {0, 49135},
14217 },
14218 },
14219 },
14220 {
14221 name: "ANDBlock",
14222 auxType: auxSymOff,
14223 argLen: 3,
14224 clobberFlags: true,
14225 faultOnNilArg0: true,
14226 hasSideEffects: true,
14227 symEffect: SymRdWr,
14228 asm: x86.AANDB,
14229 reg: regInfo{
14230 inputs: []inputInfo{
14231 {1, 49151},
14232 {0, 4295032831},
14233 },
14234 },
14235 },
14236 {
14237 name: "ANDLlock",
14238 auxType: auxSymOff,
14239 argLen: 3,
14240 clobberFlags: true,
14241 faultOnNilArg0: true,
14242 hasSideEffects: true,
14243 symEffect: SymRdWr,
14244 asm: x86.AANDL,
14245 reg: regInfo{
14246 inputs: []inputInfo{
14247 {1, 49151},
14248 {0, 4295032831},
14249 },
14250 },
14251 },
14252 {
14253 name: "ANDQlock",
14254 auxType: auxSymOff,
14255 argLen: 3,
14256 clobberFlags: true,
14257 faultOnNilArg0: true,
14258 hasSideEffects: true,
14259 symEffect: SymRdWr,
14260 asm: x86.AANDQ,
14261 reg: regInfo{
14262 inputs: []inputInfo{
14263 {1, 49151},
14264 {0, 4295032831},
14265 },
14266 },
14267 },
14268 {
14269 name: "ORBlock",
14270 auxType: auxSymOff,
14271 argLen: 3,
14272 clobberFlags: true,
14273 faultOnNilArg0: true,
14274 hasSideEffects: true,
14275 symEffect: SymRdWr,
14276 asm: x86.AORB,
14277 reg: regInfo{
14278 inputs: []inputInfo{
14279 {1, 49151},
14280 {0, 4295032831},
14281 },
14282 },
14283 },
14284 {
14285 name: "ORLlock",
14286 auxType: auxSymOff,
14287 argLen: 3,
14288 clobberFlags: true,
14289 faultOnNilArg0: true,
14290 hasSideEffects: true,
14291 symEffect: SymRdWr,
14292 asm: x86.AORL,
14293 reg: regInfo{
14294 inputs: []inputInfo{
14295 {1, 49151},
14296 {0, 4295032831},
14297 },
14298 },
14299 },
14300 {
14301 name: "ORQlock",
14302 auxType: auxSymOff,
14303 argLen: 3,
14304 clobberFlags: true,
14305 faultOnNilArg0: true,
14306 hasSideEffects: true,
14307 symEffect: SymRdWr,
14308 asm: x86.AORQ,
14309 reg: regInfo{
14310 inputs: []inputInfo{
14311 {1, 49151},
14312 {0, 4295032831},
14313 },
14314 },
14315 },
14316 {
14317 name: "LoweredAtomicAnd64",
14318 auxType: auxSymOff,
14319 argLen: 3,
14320 resultNotInArgs: true,
14321 clobberFlags: true,
14322 needIntTemp: true,
14323 faultOnNilArg0: true,
14324 hasSideEffects: true,
14325 unsafePoint: true,
14326 symEffect: SymRdWr,
14327 asm: x86.AANDQ,
14328 reg: regInfo{
14329 inputs: []inputInfo{
14330 {0, 49134},
14331 {1, 49134},
14332 },
14333 outputs: []outputInfo{
14334 {1, 0},
14335 {0, 1},
14336 },
14337 },
14338 },
14339 {
14340 name: "LoweredAtomicAnd32",
14341 auxType: auxSymOff,
14342 argLen: 3,
14343 resultNotInArgs: true,
14344 clobberFlags: true,
14345 needIntTemp: true,
14346 faultOnNilArg0: true,
14347 hasSideEffects: true,
14348 unsafePoint: true,
14349 symEffect: SymRdWr,
14350 asm: x86.AANDL,
14351 reg: regInfo{
14352 inputs: []inputInfo{
14353 {0, 49134},
14354 {1, 49134},
14355 },
14356 outputs: []outputInfo{
14357 {1, 0},
14358 {0, 1},
14359 },
14360 },
14361 },
14362 {
14363 name: "LoweredAtomicOr64",
14364 auxType: auxSymOff,
14365 argLen: 3,
14366 resultNotInArgs: true,
14367 clobberFlags: true,
14368 needIntTemp: true,
14369 faultOnNilArg0: true,
14370 hasSideEffects: true,
14371 unsafePoint: true,
14372 symEffect: SymRdWr,
14373 asm: x86.AORQ,
14374 reg: regInfo{
14375 inputs: []inputInfo{
14376 {0, 49134},
14377 {1, 49134},
14378 },
14379 outputs: []outputInfo{
14380 {1, 0},
14381 {0, 1},
14382 },
14383 },
14384 },
14385 {
14386 name: "LoweredAtomicOr32",
14387 auxType: auxSymOff,
14388 argLen: 3,
14389 resultNotInArgs: true,
14390 clobberFlags: true,
14391 needIntTemp: true,
14392 faultOnNilArg0: true,
14393 hasSideEffects: true,
14394 unsafePoint: true,
14395 symEffect: SymRdWr,
14396 asm: x86.AORL,
14397 reg: regInfo{
14398 inputs: []inputInfo{
14399 {0, 49134},
14400 {1, 49134},
14401 },
14402 outputs: []outputInfo{
14403 {1, 0},
14404 {0, 1},
14405 },
14406 },
14407 },
14408 {
14409 name: "PrefetchT0",
14410 argLen: 2,
14411 hasSideEffects: true,
14412 asm: x86.APREFETCHT0,
14413 reg: regInfo{
14414 inputs: []inputInfo{
14415 {0, 4295032831},
14416 },
14417 },
14418 },
14419 {
14420 name: "PrefetchNTA",
14421 argLen: 2,
14422 hasSideEffects: true,
14423 asm: x86.APREFETCHNTA,
14424 reg: regInfo{
14425 inputs: []inputInfo{
14426 {0, 4295032831},
14427 },
14428 },
14429 },
14430 {
14431 name: "ANDNQ",
14432 argLen: 2,
14433 clobberFlags: true,
14434 asm: x86.AANDNQ,
14435 reg: regInfo{
14436 inputs: []inputInfo{
14437 {0, 49135},
14438 {1, 49135},
14439 },
14440 outputs: []outputInfo{
14441 {0, 49135},
14442 },
14443 },
14444 },
14445 {
14446 name: "ANDNL",
14447 argLen: 2,
14448 clobberFlags: true,
14449 asm: x86.AANDNL,
14450 reg: regInfo{
14451 inputs: []inputInfo{
14452 {0, 49135},
14453 {1, 49135},
14454 },
14455 outputs: []outputInfo{
14456 {0, 49135},
14457 },
14458 },
14459 },
14460 {
14461 name: "BLSIQ",
14462 argLen: 1,
14463 clobberFlags: true,
14464 asm: x86.ABLSIQ,
14465 reg: regInfo{
14466 inputs: []inputInfo{
14467 {0, 49135},
14468 },
14469 outputs: []outputInfo{
14470 {0, 49135},
14471 },
14472 },
14473 },
14474 {
14475 name: "BLSIL",
14476 argLen: 1,
14477 clobberFlags: true,
14478 asm: x86.ABLSIL,
14479 reg: regInfo{
14480 inputs: []inputInfo{
14481 {0, 49135},
14482 },
14483 outputs: []outputInfo{
14484 {0, 49135},
14485 },
14486 },
14487 },
14488 {
14489 name: "BLSMSKQ",
14490 argLen: 1,
14491 clobberFlags: true,
14492 asm: x86.ABLSMSKQ,
14493 reg: regInfo{
14494 inputs: []inputInfo{
14495 {0, 49135},
14496 },
14497 outputs: []outputInfo{
14498 {0, 49135},
14499 },
14500 },
14501 },
14502 {
14503 name: "BLSMSKL",
14504 argLen: 1,
14505 clobberFlags: true,
14506 asm: x86.ABLSMSKL,
14507 reg: regInfo{
14508 inputs: []inputInfo{
14509 {0, 49135},
14510 },
14511 outputs: []outputInfo{
14512 {0, 49135},
14513 },
14514 },
14515 },
14516 {
14517 name: "BLSRQ",
14518 argLen: 1,
14519 asm: x86.ABLSRQ,
14520 reg: regInfo{
14521 inputs: []inputInfo{
14522 {0, 49135},
14523 },
14524 outputs: []outputInfo{
14525 {1, 0},
14526 {0, 49135},
14527 },
14528 },
14529 },
14530 {
14531 name: "BLSRL",
14532 argLen: 1,
14533 asm: x86.ABLSRL,
14534 reg: regInfo{
14535 inputs: []inputInfo{
14536 {0, 49135},
14537 },
14538 outputs: []outputInfo{
14539 {1, 0},
14540 {0, 49135},
14541 },
14542 },
14543 },
14544 {
14545 name: "TZCNTQ",
14546 argLen: 1,
14547 clobberFlags: true,
14548 asm: x86.ATZCNTQ,
14549 reg: regInfo{
14550 inputs: []inputInfo{
14551 {0, 49135},
14552 },
14553 outputs: []outputInfo{
14554 {0, 49135},
14555 },
14556 },
14557 },
14558 {
14559 name: "TZCNTL",
14560 argLen: 1,
14561 clobberFlags: true,
14562 asm: x86.ATZCNTL,
14563 reg: regInfo{
14564 inputs: []inputInfo{
14565 {0, 49135},
14566 },
14567 outputs: []outputInfo{
14568 {0, 49135},
14569 },
14570 },
14571 },
14572 {
14573 name: "LZCNTQ",
14574 argLen: 1,
14575 clobberFlags: true,
14576 asm: x86.ALZCNTQ,
14577 reg: regInfo{
14578 inputs: []inputInfo{
14579 {0, 49135},
14580 },
14581 outputs: []outputInfo{
14582 {0, 49135},
14583 },
14584 },
14585 },
14586 {
14587 name: "LZCNTL",
14588 argLen: 1,
14589 clobberFlags: true,
14590 asm: x86.ALZCNTL,
14591 reg: regInfo{
14592 inputs: []inputInfo{
14593 {0, 49135},
14594 },
14595 outputs: []outputInfo{
14596 {0, 49135},
14597 },
14598 },
14599 },
14600 {
14601 name: "MOVBEWstore",
14602 auxType: auxSymOff,
14603 argLen: 3,
14604 faultOnNilArg0: true,
14605 symEffect: SymWrite,
14606 asm: x86.AMOVBEW,
14607 reg: regInfo{
14608 inputs: []inputInfo{
14609 {1, 49151},
14610 {0, 4295032831},
14611 },
14612 },
14613 },
14614 {
14615 name: "MOVBELload",
14616 auxType: auxSymOff,
14617 argLen: 2,
14618 faultOnNilArg0: true,
14619 symEffect: SymRead,
14620 asm: x86.AMOVBEL,
14621 reg: regInfo{
14622 inputs: []inputInfo{
14623 {0, 4295032831},
14624 },
14625 outputs: []outputInfo{
14626 {0, 49135},
14627 },
14628 },
14629 },
14630 {
14631 name: "MOVBELstore",
14632 auxType: auxSymOff,
14633 argLen: 3,
14634 faultOnNilArg0: true,
14635 symEffect: SymWrite,
14636 asm: x86.AMOVBEL,
14637 reg: regInfo{
14638 inputs: []inputInfo{
14639 {1, 49151},
14640 {0, 4295032831},
14641 },
14642 },
14643 },
14644 {
14645 name: "MOVBEQload",
14646 auxType: auxSymOff,
14647 argLen: 2,
14648 faultOnNilArg0: true,
14649 symEffect: SymRead,
14650 asm: x86.AMOVBEQ,
14651 reg: regInfo{
14652 inputs: []inputInfo{
14653 {0, 4295032831},
14654 },
14655 outputs: []outputInfo{
14656 {0, 49135},
14657 },
14658 },
14659 },
14660 {
14661 name: "MOVBEQstore",
14662 auxType: auxSymOff,
14663 argLen: 3,
14664 faultOnNilArg0: true,
14665 symEffect: SymWrite,
14666 asm: x86.AMOVBEQ,
14667 reg: regInfo{
14668 inputs: []inputInfo{
14669 {1, 49151},
14670 {0, 4295032831},
14671 },
14672 },
14673 },
14674 {
14675 name: "MOVBELloadidx1",
14676 auxType: auxSymOff,
14677 argLen: 3,
14678 commutative: true,
14679 symEffect: SymRead,
14680 asm: x86.AMOVBEL,
14681 scale: 1,
14682 reg: regInfo{
14683 inputs: []inputInfo{
14684 {1, 49151},
14685 {0, 4295032831},
14686 },
14687 outputs: []outputInfo{
14688 {0, 49135},
14689 },
14690 },
14691 },
14692 {
14693 name: "MOVBELloadidx4",
14694 auxType: auxSymOff,
14695 argLen: 3,
14696 symEffect: SymRead,
14697 asm: x86.AMOVBEL,
14698 scale: 4,
14699 reg: regInfo{
14700 inputs: []inputInfo{
14701 {1, 49151},
14702 {0, 4295032831},
14703 },
14704 outputs: []outputInfo{
14705 {0, 49135},
14706 },
14707 },
14708 },
14709 {
14710 name: "MOVBELloadidx8",
14711 auxType: auxSymOff,
14712 argLen: 3,
14713 symEffect: SymRead,
14714 asm: x86.AMOVBEL,
14715 scale: 8,
14716 reg: regInfo{
14717 inputs: []inputInfo{
14718 {1, 49151},
14719 {0, 4295032831},
14720 },
14721 outputs: []outputInfo{
14722 {0, 49135},
14723 },
14724 },
14725 },
14726 {
14727 name: "MOVBEQloadidx1",
14728 auxType: auxSymOff,
14729 argLen: 3,
14730 commutative: true,
14731 symEffect: SymRead,
14732 asm: x86.AMOVBEQ,
14733 scale: 1,
14734 reg: regInfo{
14735 inputs: []inputInfo{
14736 {1, 49151},
14737 {0, 4295032831},
14738 },
14739 outputs: []outputInfo{
14740 {0, 49135},
14741 },
14742 },
14743 },
14744 {
14745 name: "MOVBEQloadidx8",
14746 auxType: auxSymOff,
14747 argLen: 3,
14748 symEffect: SymRead,
14749 asm: x86.AMOVBEQ,
14750 scale: 8,
14751 reg: regInfo{
14752 inputs: []inputInfo{
14753 {1, 49151},
14754 {0, 4295032831},
14755 },
14756 outputs: []outputInfo{
14757 {0, 49135},
14758 },
14759 },
14760 },
14761 {
14762 name: "MOVBEWstoreidx1",
14763 auxType: auxSymOff,
14764 argLen: 4,
14765 commutative: true,
14766 symEffect: SymWrite,
14767 asm: x86.AMOVBEW,
14768 scale: 1,
14769 reg: regInfo{
14770 inputs: []inputInfo{
14771 {1, 49151},
14772 {2, 49151},
14773 {0, 4295032831},
14774 },
14775 },
14776 },
14777 {
14778 name: "MOVBEWstoreidx2",
14779 auxType: auxSymOff,
14780 argLen: 4,
14781 symEffect: SymWrite,
14782 asm: x86.AMOVBEW,
14783 scale: 2,
14784 reg: regInfo{
14785 inputs: []inputInfo{
14786 {1, 49151},
14787 {2, 49151},
14788 {0, 4295032831},
14789 },
14790 },
14791 },
14792 {
14793 name: "MOVBELstoreidx1",
14794 auxType: auxSymOff,
14795 argLen: 4,
14796 commutative: true,
14797 symEffect: SymWrite,
14798 asm: x86.AMOVBEL,
14799 scale: 1,
14800 reg: regInfo{
14801 inputs: []inputInfo{
14802 {1, 49151},
14803 {2, 49151},
14804 {0, 4295032831},
14805 },
14806 },
14807 },
14808 {
14809 name: "MOVBELstoreidx4",
14810 auxType: auxSymOff,
14811 argLen: 4,
14812 symEffect: SymWrite,
14813 asm: x86.AMOVBEL,
14814 scale: 4,
14815 reg: regInfo{
14816 inputs: []inputInfo{
14817 {1, 49151},
14818 {2, 49151},
14819 {0, 4295032831},
14820 },
14821 },
14822 },
14823 {
14824 name: "MOVBELstoreidx8",
14825 auxType: auxSymOff,
14826 argLen: 4,
14827 symEffect: SymWrite,
14828 asm: x86.AMOVBEL,
14829 scale: 8,
14830 reg: regInfo{
14831 inputs: []inputInfo{
14832 {1, 49151},
14833 {2, 49151},
14834 {0, 4295032831},
14835 },
14836 },
14837 },
14838 {
14839 name: "MOVBEQstoreidx1",
14840 auxType: auxSymOff,
14841 argLen: 4,
14842 commutative: true,
14843 symEffect: SymWrite,
14844 asm: x86.AMOVBEQ,
14845 scale: 1,
14846 reg: regInfo{
14847 inputs: []inputInfo{
14848 {1, 49151},
14849 {2, 49151},
14850 {0, 4295032831},
14851 },
14852 },
14853 },
14854 {
14855 name: "MOVBEQstoreidx8",
14856 auxType: auxSymOff,
14857 argLen: 4,
14858 symEffect: SymWrite,
14859 asm: x86.AMOVBEQ,
14860 scale: 8,
14861 reg: regInfo{
14862 inputs: []inputInfo{
14863 {1, 49151},
14864 {2, 49151},
14865 {0, 4295032831},
14866 },
14867 },
14868 },
14869 {
14870 name: "SARXQ",
14871 argLen: 2,
14872 asm: x86.ASARXQ,
14873 reg: regInfo{
14874 inputs: []inputInfo{
14875 {0, 49135},
14876 {1, 49135},
14877 },
14878 outputs: []outputInfo{
14879 {0, 49135},
14880 },
14881 },
14882 },
14883 {
14884 name: "SARXL",
14885 argLen: 2,
14886 asm: x86.ASARXL,
14887 reg: regInfo{
14888 inputs: []inputInfo{
14889 {0, 49135},
14890 {1, 49135},
14891 },
14892 outputs: []outputInfo{
14893 {0, 49135},
14894 },
14895 },
14896 },
14897 {
14898 name: "SHLXQ",
14899 argLen: 2,
14900 asm: x86.ASHLXQ,
14901 reg: regInfo{
14902 inputs: []inputInfo{
14903 {0, 49135},
14904 {1, 49135},
14905 },
14906 outputs: []outputInfo{
14907 {0, 49135},
14908 },
14909 },
14910 },
14911 {
14912 name: "SHLXL",
14913 argLen: 2,
14914 asm: x86.ASHLXL,
14915 reg: regInfo{
14916 inputs: []inputInfo{
14917 {0, 49135},
14918 {1, 49135},
14919 },
14920 outputs: []outputInfo{
14921 {0, 49135},
14922 },
14923 },
14924 },
14925 {
14926 name: "SHRXQ",
14927 argLen: 2,
14928 asm: x86.ASHRXQ,
14929 reg: regInfo{
14930 inputs: []inputInfo{
14931 {0, 49135},
14932 {1, 49135},
14933 },
14934 outputs: []outputInfo{
14935 {0, 49135},
14936 },
14937 },
14938 },
14939 {
14940 name: "SHRXL",
14941 argLen: 2,
14942 asm: x86.ASHRXL,
14943 reg: regInfo{
14944 inputs: []inputInfo{
14945 {0, 49135},
14946 {1, 49135},
14947 },
14948 outputs: []outputInfo{
14949 {0, 49135},
14950 },
14951 },
14952 },
14953 {
14954 name: "SARXLload",
14955 auxType: auxSymOff,
14956 argLen: 3,
14957 faultOnNilArg0: true,
14958 symEffect: SymRead,
14959 asm: x86.ASARXL,
14960 reg: regInfo{
14961 inputs: []inputInfo{
14962 {1, 49135},
14963 {0, 4295032831},
14964 },
14965 outputs: []outputInfo{
14966 {0, 49135},
14967 },
14968 },
14969 },
14970 {
14971 name: "SARXQload",
14972 auxType: auxSymOff,
14973 argLen: 3,
14974 faultOnNilArg0: true,
14975 symEffect: SymRead,
14976 asm: x86.ASARXQ,
14977 reg: regInfo{
14978 inputs: []inputInfo{
14979 {1, 49135},
14980 {0, 4295032831},
14981 },
14982 outputs: []outputInfo{
14983 {0, 49135},
14984 },
14985 },
14986 },
14987 {
14988 name: "SHLXLload",
14989 auxType: auxSymOff,
14990 argLen: 3,
14991 faultOnNilArg0: true,
14992 symEffect: SymRead,
14993 asm: x86.ASHLXL,
14994 reg: regInfo{
14995 inputs: []inputInfo{
14996 {1, 49135},
14997 {0, 4295032831},
14998 },
14999 outputs: []outputInfo{
15000 {0, 49135},
15001 },
15002 },
15003 },
15004 {
15005 name: "SHLXQload",
15006 auxType: auxSymOff,
15007 argLen: 3,
15008 faultOnNilArg0: true,
15009 symEffect: SymRead,
15010 asm: x86.ASHLXQ,
15011 reg: regInfo{
15012 inputs: []inputInfo{
15013 {1, 49135},
15014 {0, 4295032831},
15015 },
15016 outputs: []outputInfo{
15017 {0, 49135},
15018 },
15019 },
15020 },
15021 {
15022 name: "SHRXLload",
15023 auxType: auxSymOff,
15024 argLen: 3,
15025 faultOnNilArg0: true,
15026 symEffect: SymRead,
15027 asm: x86.ASHRXL,
15028 reg: regInfo{
15029 inputs: []inputInfo{
15030 {1, 49135},
15031 {0, 4295032831},
15032 },
15033 outputs: []outputInfo{
15034 {0, 49135},
15035 },
15036 },
15037 },
15038 {
15039 name: "SHRXQload",
15040 auxType: auxSymOff,
15041 argLen: 3,
15042 faultOnNilArg0: true,
15043 symEffect: SymRead,
15044 asm: x86.ASHRXQ,
15045 reg: regInfo{
15046 inputs: []inputInfo{
15047 {1, 49135},
15048 {0, 4295032831},
15049 },
15050 outputs: []outputInfo{
15051 {0, 49135},
15052 },
15053 },
15054 },
15055 {
15056 name: "SARXLloadidx1",
15057 auxType: auxSymOff,
15058 argLen: 4,
15059 faultOnNilArg0: true,
15060 symEffect: SymRead,
15061 asm: x86.ASARXL,
15062 scale: 1,
15063 reg: regInfo{
15064 inputs: []inputInfo{
15065 {2, 49135},
15066 {1, 49151},
15067 {0, 4295032831},
15068 },
15069 outputs: []outputInfo{
15070 {0, 49135},
15071 },
15072 },
15073 },
15074 {
15075 name: "SARXLloadidx4",
15076 auxType: auxSymOff,
15077 argLen: 4,
15078 faultOnNilArg0: true,
15079 symEffect: SymRead,
15080 asm: x86.ASARXL,
15081 scale: 4,
15082 reg: regInfo{
15083 inputs: []inputInfo{
15084 {2, 49135},
15085 {1, 49151},
15086 {0, 4295032831},
15087 },
15088 outputs: []outputInfo{
15089 {0, 49135},
15090 },
15091 },
15092 },
15093 {
15094 name: "SARXLloadidx8",
15095 auxType: auxSymOff,
15096 argLen: 4,
15097 faultOnNilArg0: true,
15098 symEffect: SymRead,
15099 asm: x86.ASARXL,
15100 scale: 8,
15101 reg: regInfo{
15102 inputs: []inputInfo{
15103 {2, 49135},
15104 {1, 49151},
15105 {0, 4295032831},
15106 },
15107 outputs: []outputInfo{
15108 {0, 49135},
15109 },
15110 },
15111 },
15112 {
15113 name: "SARXQloadidx1",
15114 auxType: auxSymOff,
15115 argLen: 4,
15116 faultOnNilArg0: true,
15117 symEffect: SymRead,
15118 asm: x86.ASARXQ,
15119 scale: 1,
15120 reg: regInfo{
15121 inputs: []inputInfo{
15122 {2, 49135},
15123 {1, 49151},
15124 {0, 4295032831},
15125 },
15126 outputs: []outputInfo{
15127 {0, 49135},
15128 },
15129 },
15130 },
15131 {
15132 name: "SARXQloadidx8",
15133 auxType: auxSymOff,
15134 argLen: 4,
15135 faultOnNilArg0: true,
15136 symEffect: SymRead,
15137 asm: x86.ASARXQ,
15138 scale: 8,
15139 reg: regInfo{
15140 inputs: []inputInfo{
15141 {2, 49135},
15142 {1, 49151},
15143 {0, 4295032831},
15144 },
15145 outputs: []outputInfo{
15146 {0, 49135},
15147 },
15148 },
15149 },
15150 {
15151 name: "SHLXLloadidx1",
15152 auxType: auxSymOff,
15153 argLen: 4,
15154 faultOnNilArg0: true,
15155 symEffect: SymRead,
15156 asm: x86.ASHLXL,
15157 scale: 1,
15158 reg: regInfo{
15159 inputs: []inputInfo{
15160 {2, 49135},
15161 {1, 49151},
15162 {0, 4295032831},
15163 },
15164 outputs: []outputInfo{
15165 {0, 49135},
15166 },
15167 },
15168 },
15169 {
15170 name: "SHLXLloadidx4",
15171 auxType: auxSymOff,
15172 argLen: 4,
15173 faultOnNilArg0: true,
15174 symEffect: SymRead,
15175 asm: x86.ASHLXL,
15176 scale: 4,
15177 reg: regInfo{
15178 inputs: []inputInfo{
15179 {2, 49135},
15180 {1, 49151},
15181 {0, 4295032831},
15182 },
15183 outputs: []outputInfo{
15184 {0, 49135},
15185 },
15186 },
15187 },
15188 {
15189 name: "SHLXLloadidx8",
15190 auxType: auxSymOff,
15191 argLen: 4,
15192 faultOnNilArg0: true,
15193 symEffect: SymRead,
15194 asm: x86.ASHLXL,
15195 scale: 8,
15196 reg: regInfo{
15197 inputs: []inputInfo{
15198 {2, 49135},
15199 {1, 49151},
15200 {0, 4295032831},
15201 },
15202 outputs: []outputInfo{
15203 {0, 49135},
15204 },
15205 },
15206 },
15207 {
15208 name: "SHLXQloadidx1",
15209 auxType: auxSymOff,
15210 argLen: 4,
15211 faultOnNilArg0: true,
15212 symEffect: SymRead,
15213 asm: x86.ASHLXQ,
15214 scale: 1,
15215 reg: regInfo{
15216 inputs: []inputInfo{
15217 {2, 49135},
15218 {1, 49151},
15219 {0, 4295032831},
15220 },
15221 outputs: []outputInfo{
15222 {0, 49135},
15223 },
15224 },
15225 },
15226 {
15227 name: "SHLXQloadidx8",
15228 auxType: auxSymOff,
15229 argLen: 4,
15230 faultOnNilArg0: true,
15231 symEffect: SymRead,
15232 asm: x86.ASHLXQ,
15233 scale: 8,
15234 reg: regInfo{
15235 inputs: []inputInfo{
15236 {2, 49135},
15237 {1, 49151},
15238 {0, 4295032831},
15239 },
15240 outputs: []outputInfo{
15241 {0, 49135},
15242 },
15243 },
15244 },
15245 {
15246 name: "SHRXLloadidx1",
15247 auxType: auxSymOff,
15248 argLen: 4,
15249 faultOnNilArg0: true,
15250 symEffect: SymRead,
15251 asm: x86.ASHRXL,
15252 scale: 1,
15253 reg: regInfo{
15254 inputs: []inputInfo{
15255 {2, 49135},
15256 {1, 49151},
15257 {0, 4295032831},
15258 },
15259 outputs: []outputInfo{
15260 {0, 49135},
15261 },
15262 },
15263 },
15264 {
15265 name: "SHRXLloadidx4",
15266 auxType: auxSymOff,
15267 argLen: 4,
15268 faultOnNilArg0: true,
15269 symEffect: SymRead,
15270 asm: x86.ASHRXL,
15271 scale: 4,
15272 reg: regInfo{
15273 inputs: []inputInfo{
15274 {2, 49135},
15275 {1, 49151},
15276 {0, 4295032831},
15277 },
15278 outputs: []outputInfo{
15279 {0, 49135},
15280 },
15281 },
15282 },
15283 {
15284 name: "SHRXLloadidx8",
15285 auxType: auxSymOff,
15286 argLen: 4,
15287 faultOnNilArg0: true,
15288 symEffect: SymRead,
15289 asm: x86.ASHRXL,
15290 scale: 8,
15291 reg: regInfo{
15292 inputs: []inputInfo{
15293 {2, 49135},
15294 {1, 49151},
15295 {0, 4295032831},
15296 },
15297 outputs: []outputInfo{
15298 {0, 49135},
15299 },
15300 },
15301 },
15302 {
15303 name: "SHRXQloadidx1",
15304 auxType: auxSymOff,
15305 argLen: 4,
15306 faultOnNilArg0: true,
15307 symEffect: SymRead,
15308 asm: x86.ASHRXQ,
15309 scale: 1,
15310 reg: regInfo{
15311 inputs: []inputInfo{
15312 {2, 49135},
15313 {1, 49151},
15314 {0, 4295032831},
15315 },
15316 outputs: []outputInfo{
15317 {0, 49135},
15318 },
15319 },
15320 },
15321 {
15322 name: "SHRXQloadidx8",
15323 auxType: auxSymOff,
15324 argLen: 4,
15325 faultOnNilArg0: true,
15326 symEffect: SymRead,
15327 asm: x86.ASHRXQ,
15328 scale: 8,
15329 reg: regInfo{
15330 inputs: []inputInfo{
15331 {2, 49135},
15332 {1, 49151},
15333 {0, 4295032831},
15334 },
15335 outputs: []outputInfo{
15336 {0, 49135},
15337 },
15338 },
15339 },
15340 {
15341 name: "PUNPCKLBW",
15342 argLen: 2,
15343 resultInArg0: true,
15344 asm: x86.APUNPCKLBW,
15345 reg: regInfo{
15346 inputs: []inputInfo{
15347 {0, 2147418112},
15348 {1, 2147418112},
15349 },
15350 outputs: []outputInfo{
15351 {0, 2147418112},
15352 },
15353 },
15354 },
15355 {
15356 name: "PSHUFLW",
15357 auxType: auxInt8,
15358 argLen: 1,
15359 asm: x86.APSHUFLW,
15360 reg: regInfo{
15361 inputs: []inputInfo{
15362 {0, 2147418112},
15363 },
15364 outputs: []outputInfo{
15365 {0, 2147418112},
15366 },
15367 },
15368 },
15369 {
15370 name: "PSHUFBbroadcast",
15371 argLen: 1,
15372 resultInArg0: true,
15373 asm: x86.APSHUFB,
15374 reg: regInfo{
15375 inputs: []inputInfo{
15376 {0, 2147418112},
15377 },
15378 outputs: []outputInfo{
15379 {0, 2147418112},
15380 },
15381 },
15382 },
15383 {
15384 name: "VPBROADCASTB",
15385 argLen: 1,
15386 asm: x86.AVPBROADCASTB,
15387 reg: regInfo{
15388 inputs: []inputInfo{
15389 {0, 49135},
15390 },
15391 outputs: []outputInfo{
15392 {0, 2147418112},
15393 },
15394 },
15395 },
15396 {
15397 name: "PSIGNB",
15398 argLen: 2,
15399 resultInArg0: true,
15400 asm: x86.APSIGNB,
15401 reg: regInfo{
15402 inputs: []inputInfo{
15403 {0, 2147418112},
15404 {1, 2147418112},
15405 },
15406 outputs: []outputInfo{
15407 {0, 2147418112},
15408 },
15409 },
15410 },
15411 {
15412 name: "PCMPEQB",
15413 argLen: 2,
15414 resultInArg0: true,
15415 asm: x86.APCMPEQB,
15416 reg: regInfo{
15417 inputs: []inputInfo{
15418 {0, 2147418112},
15419 {1, 2147418112},
15420 },
15421 outputs: []outputInfo{
15422 {0, 2147418112},
15423 },
15424 },
15425 },
15426 {
15427 name: "PMOVMSKB",
15428 argLen: 1,
15429 asm: x86.APMOVMSKB,
15430 reg: regInfo{
15431 inputs: []inputInfo{
15432 {0, 2147418112},
15433 },
15434 outputs: []outputInfo{
15435 {0, 49135},
15436 },
15437 },
15438 },
15439
15440 {
15441 name: "ADD",
15442 argLen: 2,
15443 commutative: true,
15444 asm: arm.AADD,
15445 reg: regInfo{
15446 inputs: []inputInfo{
15447 {0, 22527},
15448 {1, 22527},
15449 },
15450 outputs: []outputInfo{
15451 {0, 21503},
15452 },
15453 },
15454 },
15455 {
15456 name: "ADDconst",
15457 auxType: auxInt32,
15458 argLen: 1,
15459 asm: arm.AADD,
15460 reg: regInfo{
15461 inputs: []inputInfo{
15462 {0, 30719},
15463 },
15464 outputs: []outputInfo{
15465 {0, 21503},
15466 },
15467 },
15468 },
15469 {
15470 name: "SUB",
15471 argLen: 2,
15472 asm: arm.ASUB,
15473 reg: regInfo{
15474 inputs: []inputInfo{
15475 {0, 22527},
15476 {1, 22527},
15477 },
15478 outputs: []outputInfo{
15479 {0, 21503},
15480 },
15481 },
15482 },
15483 {
15484 name: "SUBconst",
15485 auxType: auxInt32,
15486 argLen: 1,
15487 asm: arm.ASUB,
15488 reg: regInfo{
15489 inputs: []inputInfo{
15490 {0, 22527},
15491 },
15492 outputs: []outputInfo{
15493 {0, 21503},
15494 },
15495 },
15496 },
15497 {
15498 name: "RSB",
15499 argLen: 2,
15500 asm: arm.ARSB,
15501 reg: regInfo{
15502 inputs: []inputInfo{
15503 {0, 22527},
15504 {1, 22527},
15505 },
15506 outputs: []outputInfo{
15507 {0, 21503},
15508 },
15509 },
15510 },
15511 {
15512 name: "RSBconst",
15513 auxType: auxInt32,
15514 argLen: 1,
15515 asm: arm.ARSB,
15516 reg: regInfo{
15517 inputs: []inputInfo{
15518 {0, 22527},
15519 },
15520 outputs: []outputInfo{
15521 {0, 21503},
15522 },
15523 },
15524 },
15525 {
15526 name: "MUL",
15527 argLen: 2,
15528 commutative: true,
15529 asm: arm.AMUL,
15530 reg: regInfo{
15531 inputs: []inputInfo{
15532 {0, 22527},
15533 {1, 22527},
15534 },
15535 outputs: []outputInfo{
15536 {0, 21503},
15537 },
15538 },
15539 },
15540 {
15541 name: "HMUL",
15542 argLen: 2,
15543 commutative: true,
15544 asm: arm.AMULL,
15545 reg: regInfo{
15546 inputs: []inputInfo{
15547 {0, 22527},
15548 {1, 22527},
15549 },
15550 outputs: []outputInfo{
15551 {0, 21503},
15552 },
15553 },
15554 },
15555 {
15556 name: "HMULU",
15557 argLen: 2,
15558 commutative: true,
15559 asm: arm.AMULLU,
15560 reg: regInfo{
15561 inputs: []inputInfo{
15562 {0, 22527},
15563 {1, 22527},
15564 },
15565 outputs: []outputInfo{
15566 {0, 21503},
15567 },
15568 },
15569 },
15570 {
15571 name: "CALLudiv",
15572 argLen: 2,
15573 clobberFlags: true,
15574 reg: regInfo{
15575 inputs: []inputInfo{
15576 {0, 2},
15577 {1, 1},
15578 },
15579 clobbers: 20492,
15580 outputs: []outputInfo{
15581 {0, 1},
15582 {1, 2},
15583 },
15584 },
15585 },
15586 {
15587 name: "ADDS",
15588 argLen: 2,
15589 commutative: true,
15590 asm: arm.AADD,
15591 reg: regInfo{
15592 inputs: []inputInfo{
15593 {0, 22527},
15594 {1, 22527},
15595 },
15596 outputs: []outputInfo{
15597 {1, 0},
15598 {0, 21503},
15599 },
15600 },
15601 },
15602 {
15603 name: "ADDSconst",
15604 auxType: auxInt32,
15605 argLen: 1,
15606 asm: arm.AADD,
15607 reg: regInfo{
15608 inputs: []inputInfo{
15609 {0, 22527},
15610 },
15611 outputs: []outputInfo{
15612 {1, 0},
15613 {0, 21503},
15614 },
15615 },
15616 },
15617 {
15618 name: "ADC",
15619 argLen: 3,
15620 commutative: true,
15621 asm: arm.AADC,
15622 reg: regInfo{
15623 inputs: []inputInfo{
15624 {0, 21503},
15625 {1, 21503},
15626 },
15627 outputs: []outputInfo{
15628 {0, 21503},
15629 },
15630 },
15631 },
15632 {
15633 name: "ADCconst",
15634 auxType: auxInt32,
15635 argLen: 2,
15636 asm: arm.AADC,
15637 reg: regInfo{
15638 inputs: []inputInfo{
15639 {0, 21503},
15640 },
15641 outputs: []outputInfo{
15642 {0, 21503},
15643 },
15644 },
15645 },
15646 {
15647 name: "SUBS",
15648 argLen: 2,
15649 asm: arm.ASUB,
15650 reg: regInfo{
15651 inputs: []inputInfo{
15652 {0, 22527},
15653 {1, 22527},
15654 },
15655 outputs: []outputInfo{
15656 {1, 0},
15657 {0, 21503},
15658 },
15659 },
15660 },
15661 {
15662 name: "SUBSconst",
15663 auxType: auxInt32,
15664 argLen: 1,
15665 asm: arm.ASUB,
15666 reg: regInfo{
15667 inputs: []inputInfo{
15668 {0, 22527},
15669 },
15670 outputs: []outputInfo{
15671 {1, 0},
15672 {0, 21503},
15673 },
15674 },
15675 },
15676 {
15677 name: "RSBSconst",
15678 auxType: auxInt32,
15679 argLen: 1,
15680 asm: arm.ARSB,
15681 reg: regInfo{
15682 inputs: []inputInfo{
15683 {0, 22527},
15684 },
15685 outputs: []outputInfo{
15686 {1, 0},
15687 {0, 21503},
15688 },
15689 },
15690 },
15691 {
15692 name: "SBC",
15693 argLen: 3,
15694 asm: arm.ASBC,
15695 reg: regInfo{
15696 inputs: []inputInfo{
15697 {0, 21503},
15698 {1, 21503},
15699 },
15700 outputs: []outputInfo{
15701 {0, 21503},
15702 },
15703 },
15704 },
15705 {
15706 name: "SBCconst",
15707 auxType: auxInt32,
15708 argLen: 2,
15709 asm: arm.ASBC,
15710 reg: regInfo{
15711 inputs: []inputInfo{
15712 {0, 21503},
15713 },
15714 outputs: []outputInfo{
15715 {0, 21503},
15716 },
15717 },
15718 },
15719 {
15720 name: "RSCconst",
15721 auxType: auxInt32,
15722 argLen: 2,
15723 asm: arm.ARSC,
15724 reg: regInfo{
15725 inputs: []inputInfo{
15726 {0, 21503},
15727 },
15728 outputs: []outputInfo{
15729 {0, 21503},
15730 },
15731 },
15732 },
15733 {
15734 name: "MULLU",
15735 argLen: 2,
15736 commutative: true,
15737 asm: arm.AMULLU,
15738 reg: regInfo{
15739 inputs: []inputInfo{
15740 {0, 22527},
15741 {1, 22527},
15742 },
15743 outputs: []outputInfo{
15744 {0, 21503},
15745 {1, 21503},
15746 },
15747 },
15748 },
15749 {
15750 name: "MULA",
15751 argLen: 3,
15752 asm: arm.AMULA,
15753 reg: regInfo{
15754 inputs: []inputInfo{
15755 {0, 21503},
15756 {1, 21503},
15757 {2, 21503},
15758 },
15759 outputs: []outputInfo{
15760 {0, 21503},
15761 },
15762 },
15763 },
15764 {
15765 name: "MULS",
15766 argLen: 3,
15767 asm: arm.AMULS,
15768 reg: regInfo{
15769 inputs: []inputInfo{
15770 {0, 21503},
15771 {1, 21503},
15772 {2, 21503},
15773 },
15774 outputs: []outputInfo{
15775 {0, 21503},
15776 },
15777 },
15778 },
15779 {
15780 name: "ADDF",
15781 argLen: 2,
15782 commutative: true,
15783 asm: arm.AADDF,
15784 reg: regInfo{
15785 inputs: []inputInfo{
15786 {0, 4294901760},
15787 {1, 4294901760},
15788 },
15789 outputs: []outputInfo{
15790 {0, 4294901760},
15791 },
15792 },
15793 },
15794 {
15795 name: "ADDD",
15796 argLen: 2,
15797 commutative: true,
15798 asm: arm.AADDD,
15799 reg: regInfo{
15800 inputs: []inputInfo{
15801 {0, 4294901760},
15802 {1, 4294901760},
15803 },
15804 outputs: []outputInfo{
15805 {0, 4294901760},
15806 },
15807 },
15808 },
15809 {
15810 name: "SUBF",
15811 argLen: 2,
15812 asm: arm.ASUBF,
15813 reg: regInfo{
15814 inputs: []inputInfo{
15815 {0, 4294901760},
15816 {1, 4294901760},
15817 },
15818 outputs: []outputInfo{
15819 {0, 4294901760},
15820 },
15821 },
15822 },
15823 {
15824 name: "SUBD",
15825 argLen: 2,
15826 asm: arm.ASUBD,
15827 reg: regInfo{
15828 inputs: []inputInfo{
15829 {0, 4294901760},
15830 {1, 4294901760},
15831 },
15832 outputs: []outputInfo{
15833 {0, 4294901760},
15834 },
15835 },
15836 },
15837 {
15838 name: "MULF",
15839 argLen: 2,
15840 commutative: true,
15841 asm: arm.AMULF,
15842 reg: regInfo{
15843 inputs: []inputInfo{
15844 {0, 4294901760},
15845 {1, 4294901760},
15846 },
15847 outputs: []outputInfo{
15848 {0, 4294901760},
15849 },
15850 },
15851 },
15852 {
15853 name: "MULD",
15854 argLen: 2,
15855 commutative: true,
15856 asm: arm.AMULD,
15857 reg: regInfo{
15858 inputs: []inputInfo{
15859 {0, 4294901760},
15860 {1, 4294901760},
15861 },
15862 outputs: []outputInfo{
15863 {0, 4294901760},
15864 },
15865 },
15866 },
15867 {
15868 name: "NMULF",
15869 argLen: 2,
15870 commutative: true,
15871 asm: arm.ANMULF,
15872 reg: regInfo{
15873 inputs: []inputInfo{
15874 {0, 4294901760},
15875 {1, 4294901760},
15876 },
15877 outputs: []outputInfo{
15878 {0, 4294901760},
15879 },
15880 },
15881 },
15882 {
15883 name: "NMULD",
15884 argLen: 2,
15885 commutative: true,
15886 asm: arm.ANMULD,
15887 reg: regInfo{
15888 inputs: []inputInfo{
15889 {0, 4294901760},
15890 {1, 4294901760},
15891 },
15892 outputs: []outputInfo{
15893 {0, 4294901760},
15894 },
15895 },
15896 },
15897 {
15898 name: "DIVF",
15899 argLen: 2,
15900 asm: arm.ADIVF,
15901 reg: regInfo{
15902 inputs: []inputInfo{
15903 {0, 4294901760},
15904 {1, 4294901760},
15905 },
15906 outputs: []outputInfo{
15907 {0, 4294901760},
15908 },
15909 },
15910 },
15911 {
15912 name: "DIVD",
15913 argLen: 2,
15914 asm: arm.ADIVD,
15915 reg: regInfo{
15916 inputs: []inputInfo{
15917 {0, 4294901760},
15918 {1, 4294901760},
15919 },
15920 outputs: []outputInfo{
15921 {0, 4294901760},
15922 },
15923 },
15924 },
15925 {
15926 name: "MULAF",
15927 argLen: 3,
15928 resultInArg0: true,
15929 asm: arm.AMULAF,
15930 reg: regInfo{
15931 inputs: []inputInfo{
15932 {0, 4294901760},
15933 {1, 4294901760},
15934 {2, 4294901760},
15935 },
15936 outputs: []outputInfo{
15937 {0, 4294901760},
15938 },
15939 },
15940 },
15941 {
15942 name: "MULAD",
15943 argLen: 3,
15944 resultInArg0: true,
15945 asm: arm.AMULAD,
15946 reg: regInfo{
15947 inputs: []inputInfo{
15948 {0, 4294901760},
15949 {1, 4294901760},
15950 {2, 4294901760},
15951 },
15952 outputs: []outputInfo{
15953 {0, 4294901760},
15954 },
15955 },
15956 },
15957 {
15958 name: "MULSF",
15959 argLen: 3,
15960 resultInArg0: true,
15961 asm: arm.AMULSF,
15962 reg: regInfo{
15963 inputs: []inputInfo{
15964 {0, 4294901760},
15965 {1, 4294901760},
15966 {2, 4294901760},
15967 },
15968 outputs: []outputInfo{
15969 {0, 4294901760},
15970 },
15971 },
15972 },
15973 {
15974 name: "MULSD",
15975 argLen: 3,
15976 resultInArg0: true,
15977 asm: arm.AMULSD,
15978 reg: regInfo{
15979 inputs: []inputInfo{
15980 {0, 4294901760},
15981 {1, 4294901760},
15982 {2, 4294901760},
15983 },
15984 outputs: []outputInfo{
15985 {0, 4294901760},
15986 },
15987 },
15988 },
15989 {
15990 name: "FMULAD",
15991 argLen: 3,
15992 resultInArg0: true,
15993 asm: arm.AFMULAD,
15994 reg: regInfo{
15995 inputs: []inputInfo{
15996 {0, 4294901760},
15997 {1, 4294901760},
15998 {2, 4294901760},
15999 },
16000 outputs: []outputInfo{
16001 {0, 4294901760},
16002 },
16003 },
16004 },
16005 {
16006 name: "AND",
16007 argLen: 2,
16008 commutative: true,
16009 asm: arm.AAND,
16010 reg: regInfo{
16011 inputs: []inputInfo{
16012 {0, 22527},
16013 {1, 22527},
16014 },
16015 outputs: []outputInfo{
16016 {0, 21503},
16017 },
16018 },
16019 },
16020 {
16021 name: "ANDconst",
16022 auxType: auxInt32,
16023 argLen: 1,
16024 asm: arm.AAND,
16025 reg: regInfo{
16026 inputs: []inputInfo{
16027 {0, 22527},
16028 },
16029 outputs: []outputInfo{
16030 {0, 21503},
16031 },
16032 },
16033 },
16034 {
16035 name: "OR",
16036 argLen: 2,
16037 commutative: true,
16038 asm: arm.AORR,
16039 reg: regInfo{
16040 inputs: []inputInfo{
16041 {0, 22527},
16042 {1, 22527},
16043 },
16044 outputs: []outputInfo{
16045 {0, 21503},
16046 },
16047 },
16048 },
16049 {
16050 name: "ORconst",
16051 auxType: auxInt32,
16052 argLen: 1,
16053 asm: arm.AORR,
16054 reg: regInfo{
16055 inputs: []inputInfo{
16056 {0, 22527},
16057 },
16058 outputs: []outputInfo{
16059 {0, 21503},
16060 },
16061 },
16062 },
16063 {
16064 name: "XOR",
16065 argLen: 2,
16066 commutative: true,
16067 asm: arm.AEOR,
16068 reg: regInfo{
16069 inputs: []inputInfo{
16070 {0, 22527},
16071 {1, 22527},
16072 },
16073 outputs: []outputInfo{
16074 {0, 21503},
16075 },
16076 },
16077 },
16078 {
16079 name: "XORconst",
16080 auxType: auxInt32,
16081 argLen: 1,
16082 asm: arm.AEOR,
16083 reg: regInfo{
16084 inputs: []inputInfo{
16085 {0, 22527},
16086 },
16087 outputs: []outputInfo{
16088 {0, 21503},
16089 },
16090 },
16091 },
16092 {
16093 name: "BIC",
16094 argLen: 2,
16095 asm: arm.ABIC,
16096 reg: regInfo{
16097 inputs: []inputInfo{
16098 {0, 22527},
16099 {1, 22527},
16100 },
16101 outputs: []outputInfo{
16102 {0, 21503},
16103 },
16104 },
16105 },
16106 {
16107 name: "BICconst",
16108 auxType: auxInt32,
16109 argLen: 1,
16110 asm: arm.ABIC,
16111 reg: regInfo{
16112 inputs: []inputInfo{
16113 {0, 22527},
16114 },
16115 outputs: []outputInfo{
16116 {0, 21503},
16117 },
16118 },
16119 },
16120 {
16121 name: "BFX",
16122 auxType: auxInt32,
16123 argLen: 1,
16124 asm: arm.ABFX,
16125 reg: regInfo{
16126 inputs: []inputInfo{
16127 {0, 22527},
16128 },
16129 outputs: []outputInfo{
16130 {0, 21503},
16131 },
16132 },
16133 },
16134 {
16135 name: "BFXU",
16136 auxType: auxInt32,
16137 argLen: 1,
16138 asm: arm.ABFXU,
16139 reg: regInfo{
16140 inputs: []inputInfo{
16141 {0, 22527},
16142 },
16143 outputs: []outputInfo{
16144 {0, 21503},
16145 },
16146 },
16147 },
16148 {
16149 name: "MVN",
16150 argLen: 1,
16151 asm: arm.AMVN,
16152 reg: regInfo{
16153 inputs: []inputInfo{
16154 {0, 22527},
16155 },
16156 outputs: []outputInfo{
16157 {0, 21503},
16158 },
16159 },
16160 },
16161 {
16162 name: "NEGF",
16163 argLen: 1,
16164 asm: arm.ANEGF,
16165 reg: regInfo{
16166 inputs: []inputInfo{
16167 {0, 4294901760},
16168 },
16169 outputs: []outputInfo{
16170 {0, 4294901760},
16171 },
16172 },
16173 },
16174 {
16175 name: "NEGD",
16176 argLen: 1,
16177 asm: arm.ANEGD,
16178 reg: regInfo{
16179 inputs: []inputInfo{
16180 {0, 4294901760},
16181 },
16182 outputs: []outputInfo{
16183 {0, 4294901760},
16184 },
16185 },
16186 },
16187 {
16188 name: "SQRTD",
16189 argLen: 1,
16190 asm: arm.ASQRTD,
16191 reg: regInfo{
16192 inputs: []inputInfo{
16193 {0, 4294901760},
16194 },
16195 outputs: []outputInfo{
16196 {0, 4294901760},
16197 },
16198 },
16199 },
16200 {
16201 name: "SQRTF",
16202 argLen: 1,
16203 asm: arm.ASQRTF,
16204 reg: regInfo{
16205 inputs: []inputInfo{
16206 {0, 4294901760},
16207 },
16208 outputs: []outputInfo{
16209 {0, 4294901760},
16210 },
16211 },
16212 },
16213 {
16214 name: "ABSD",
16215 argLen: 1,
16216 asm: arm.AABSD,
16217 reg: regInfo{
16218 inputs: []inputInfo{
16219 {0, 4294901760},
16220 },
16221 outputs: []outputInfo{
16222 {0, 4294901760},
16223 },
16224 },
16225 },
16226 {
16227 name: "CLZ",
16228 argLen: 1,
16229 asm: arm.ACLZ,
16230 reg: regInfo{
16231 inputs: []inputInfo{
16232 {0, 22527},
16233 },
16234 outputs: []outputInfo{
16235 {0, 21503},
16236 },
16237 },
16238 },
16239 {
16240 name: "REV",
16241 argLen: 1,
16242 asm: arm.AREV,
16243 reg: regInfo{
16244 inputs: []inputInfo{
16245 {0, 22527},
16246 },
16247 outputs: []outputInfo{
16248 {0, 21503},
16249 },
16250 },
16251 },
16252 {
16253 name: "REV16",
16254 argLen: 1,
16255 asm: arm.AREV16,
16256 reg: regInfo{
16257 inputs: []inputInfo{
16258 {0, 22527},
16259 },
16260 outputs: []outputInfo{
16261 {0, 21503},
16262 },
16263 },
16264 },
16265 {
16266 name: "RBIT",
16267 argLen: 1,
16268 asm: arm.ARBIT,
16269 reg: regInfo{
16270 inputs: []inputInfo{
16271 {0, 22527},
16272 },
16273 outputs: []outputInfo{
16274 {0, 21503},
16275 },
16276 },
16277 },
16278 {
16279 name: "SLL",
16280 argLen: 2,
16281 asm: arm.ASLL,
16282 reg: regInfo{
16283 inputs: []inputInfo{
16284 {0, 22527},
16285 {1, 22527},
16286 },
16287 outputs: []outputInfo{
16288 {0, 21503},
16289 },
16290 },
16291 },
16292 {
16293 name: "SLLconst",
16294 auxType: auxInt32,
16295 argLen: 1,
16296 asm: arm.ASLL,
16297 reg: regInfo{
16298 inputs: []inputInfo{
16299 {0, 22527},
16300 },
16301 outputs: []outputInfo{
16302 {0, 21503},
16303 },
16304 },
16305 },
16306 {
16307 name: "SRL",
16308 argLen: 2,
16309 asm: arm.ASRL,
16310 reg: regInfo{
16311 inputs: []inputInfo{
16312 {0, 22527},
16313 {1, 22527},
16314 },
16315 outputs: []outputInfo{
16316 {0, 21503},
16317 },
16318 },
16319 },
16320 {
16321 name: "SRLconst",
16322 auxType: auxInt32,
16323 argLen: 1,
16324 asm: arm.ASRL,
16325 reg: regInfo{
16326 inputs: []inputInfo{
16327 {0, 22527},
16328 },
16329 outputs: []outputInfo{
16330 {0, 21503},
16331 },
16332 },
16333 },
16334 {
16335 name: "SRA",
16336 argLen: 2,
16337 asm: arm.ASRA,
16338 reg: regInfo{
16339 inputs: []inputInfo{
16340 {0, 22527},
16341 {1, 22527},
16342 },
16343 outputs: []outputInfo{
16344 {0, 21503},
16345 },
16346 },
16347 },
16348 {
16349 name: "SRAconst",
16350 auxType: auxInt32,
16351 argLen: 1,
16352 asm: arm.ASRA,
16353 reg: regInfo{
16354 inputs: []inputInfo{
16355 {0, 22527},
16356 },
16357 outputs: []outputInfo{
16358 {0, 21503},
16359 },
16360 },
16361 },
16362 {
16363 name: "SRR",
16364 argLen: 2,
16365 reg: regInfo{
16366 inputs: []inputInfo{
16367 {0, 22527},
16368 {1, 22527},
16369 },
16370 outputs: []outputInfo{
16371 {0, 21503},
16372 },
16373 },
16374 },
16375 {
16376 name: "SRRconst",
16377 auxType: auxInt32,
16378 argLen: 1,
16379 reg: regInfo{
16380 inputs: []inputInfo{
16381 {0, 22527},
16382 },
16383 outputs: []outputInfo{
16384 {0, 21503},
16385 },
16386 },
16387 },
16388 {
16389 name: "ADDshiftLL",
16390 auxType: auxInt32,
16391 argLen: 2,
16392 asm: arm.AADD,
16393 reg: regInfo{
16394 inputs: []inputInfo{
16395 {0, 22527},
16396 {1, 22527},
16397 },
16398 outputs: []outputInfo{
16399 {0, 21503},
16400 },
16401 },
16402 },
16403 {
16404 name: "ADDshiftRL",
16405 auxType: auxInt32,
16406 argLen: 2,
16407 asm: arm.AADD,
16408 reg: regInfo{
16409 inputs: []inputInfo{
16410 {0, 22527},
16411 {1, 22527},
16412 },
16413 outputs: []outputInfo{
16414 {0, 21503},
16415 },
16416 },
16417 },
16418 {
16419 name: "ADDshiftRA",
16420 auxType: auxInt32,
16421 argLen: 2,
16422 asm: arm.AADD,
16423 reg: regInfo{
16424 inputs: []inputInfo{
16425 {0, 22527},
16426 {1, 22527},
16427 },
16428 outputs: []outputInfo{
16429 {0, 21503},
16430 },
16431 },
16432 },
16433 {
16434 name: "SUBshiftLL",
16435 auxType: auxInt32,
16436 argLen: 2,
16437 asm: arm.ASUB,
16438 reg: regInfo{
16439 inputs: []inputInfo{
16440 {0, 22527},
16441 {1, 22527},
16442 },
16443 outputs: []outputInfo{
16444 {0, 21503},
16445 },
16446 },
16447 },
16448 {
16449 name: "SUBshiftRL",
16450 auxType: auxInt32,
16451 argLen: 2,
16452 asm: arm.ASUB,
16453 reg: regInfo{
16454 inputs: []inputInfo{
16455 {0, 22527},
16456 {1, 22527},
16457 },
16458 outputs: []outputInfo{
16459 {0, 21503},
16460 },
16461 },
16462 },
16463 {
16464 name: "SUBshiftRA",
16465 auxType: auxInt32,
16466 argLen: 2,
16467 asm: arm.ASUB,
16468 reg: regInfo{
16469 inputs: []inputInfo{
16470 {0, 22527},
16471 {1, 22527},
16472 },
16473 outputs: []outputInfo{
16474 {0, 21503},
16475 },
16476 },
16477 },
16478 {
16479 name: "RSBshiftLL",
16480 auxType: auxInt32,
16481 argLen: 2,
16482 asm: arm.ARSB,
16483 reg: regInfo{
16484 inputs: []inputInfo{
16485 {0, 22527},
16486 {1, 22527},
16487 },
16488 outputs: []outputInfo{
16489 {0, 21503},
16490 },
16491 },
16492 },
16493 {
16494 name: "RSBshiftRL",
16495 auxType: auxInt32,
16496 argLen: 2,
16497 asm: arm.ARSB,
16498 reg: regInfo{
16499 inputs: []inputInfo{
16500 {0, 22527},
16501 {1, 22527},
16502 },
16503 outputs: []outputInfo{
16504 {0, 21503},
16505 },
16506 },
16507 },
16508 {
16509 name: "RSBshiftRA",
16510 auxType: auxInt32,
16511 argLen: 2,
16512 asm: arm.ARSB,
16513 reg: regInfo{
16514 inputs: []inputInfo{
16515 {0, 22527},
16516 {1, 22527},
16517 },
16518 outputs: []outputInfo{
16519 {0, 21503},
16520 },
16521 },
16522 },
16523 {
16524 name: "ANDshiftLL",
16525 auxType: auxInt32,
16526 argLen: 2,
16527 asm: arm.AAND,
16528 reg: regInfo{
16529 inputs: []inputInfo{
16530 {0, 22527},
16531 {1, 22527},
16532 },
16533 outputs: []outputInfo{
16534 {0, 21503},
16535 },
16536 },
16537 },
16538 {
16539 name: "ANDshiftRL",
16540 auxType: auxInt32,
16541 argLen: 2,
16542 asm: arm.AAND,
16543 reg: regInfo{
16544 inputs: []inputInfo{
16545 {0, 22527},
16546 {1, 22527},
16547 },
16548 outputs: []outputInfo{
16549 {0, 21503},
16550 },
16551 },
16552 },
16553 {
16554 name: "ANDshiftRA",
16555 auxType: auxInt32,
16556 argLen: 2,
16557 asm: arm.AAND,
16558 reg: regInfo{
16559 inputs: []inputInfo{
16560 {0, 22527},
16561 {1, 22527},
16562 },
16563 outputs: []outputInfo{
16564 {0, 21503},
16565 },
16566 },
16567 },
16568 {
16569 name: "ORshiftLL",
16570 auxType: auxInt32,
16571 argLen: 2,
16572 asm: arm.AORR,
16573 reg: regInfo{
16574 inputs: []inputInfo{
16575 {0, 22527},
16576 {1, 22527},
16577 },
16578 outputs: []outputInfo{
16579 {0, 21503},
16580 },
16581 },
16582 },
16583 {
16584 name: "ORshiftRL",
16585 auxType: auxInt32,
16586 argLen: 2,
16587 asm: arm.AORR,
16588 reg: regInfo{
16589 inputs: []inputInfo{
16590 {0, 22527},
16591 {1, 22527},
16592 },
16593 outputs: []outputInfo{
16594 {0, 21503},
16595 },
16596 },
16597 },
16598 {
16599 name: "ORshiftRA",
16600 auxType: auxInt32,
16601 argLen: 2,
16602 asm: arm.AORR,
16603 reg: regInfo{
16604 inputs: []inputInfo{
16605 {0, 22527},
16606 {1, 22527},
16607 },
16608 outputs: []outputInfo{
16609 {0, 21503},
16610 },
16611 },
16612 },
16613 {
16614 name: "XORshiftLL",
16615 auxType: auxInt32,
16616 argLen: 2,
16617 asm: arm.AEOR,
16618 reg: regInfo{
16619 inputs: []inputInfo{
16620 {0, 22527},
16621 {1, 22527},
16622 },
16623 outputs: []outputInfo{
16624 {0, 21503},
16625 },
16626 },
16627 },
16628 {
16629 name: "XORshiftRL",
16630 auxType: auxInt32,
16631 argLen: 2,
16632 asm: arm.AEOR,
16633 reg: regInfo{
16634 inputs: []inputInfo{
16635 {0, 22527},
16636 {1, 22527},
16637 },
16638 outputs: []outputInfo{
16639 {0, 21503},
16640 },
16641 },
16642 },
16643 {
16644 name: "XORshiftRA",
16645 auxType: auxInt32,
16646 argLen: 2,
16647 asm: arm.AEOR,
16648 reg: regInfo{
16649 inputs: []inputInfo{
16650 {0, 22527},
16651 {1, 22527},
16652 },
16653 outputs: []outputInfo{
16654 {0, 21503},
16655 },
16656 },
16657 },
16658 {
16659 name: "XORshiftRR",
16660 auxType: auxInt32,
16661 argLen: 2,
16662 asm: arm.AEOR,
16663 reg: regInfo{
16664 inputs: []inputInfo{
16665 {0, 22527},
16666 {1, 22527},
16667 },
16668 outputs: []outputInfo{
16669 {0, 21503},
16670 },
16671 },
16672 },
16673 {
16674 name: "BICshiftLL",
16675 auxType: auxInt32,
16676 argLen: 2,
16677 asm: arm.ABIC,
16678 reg: regInfo{
16679 inputs: []inputInfo{
16680 {0, 22527},
16681 {1, 22527},
16682 },
16683 outputs: []outputInfo{
16684 {0, 21503},
16685 },
16686 },
16687 },
16688 {
16689 name: "BICshiftRL",
16690 auxType: auxInt32,
16691 argLen: 2,
16692 asm: arm.ABIC,
16693 reg: regInfo{
16694 inputs: []inputInfo{
16695 {0, 22527},
16696 {1, 22527},
16697 },
16698 outputs: []outputInfo{
16699 {0, 21503},
16700 },
16701 },
16702 },
16703 {
16704 name: "BICshiftRA",
16705 auxType: auxInt32,
16706 argLen: 2,
16707 asm: arm.ABIC,
16708 reg: regInfo{
16709 inputs: []inputInfo{
16710 {0, 22527},
16711 {1, 22527},
16712 },
16713 outputs: []outputInfo{
16714 {0, 21503},
16715 },
16716 },
16717 },
16718 {
16719 name: "MVNshiftLL",
16720 auxType: auxInt32,
16721 argLen: 1,
16722 asm: arm.AMVN,
16723 reg: regInfo{
16724 inputs: []inputInfo{
16725 {0, 22527},
16726 },
16727 outputs: []outputInfo{
16728 {0, 21503},
16729 },
16730 },
16731 },
16732 {
16733 name: "MVNshiftRL",
16734 auxType: auxInt32,
16735 argLen: 1,
16736 asm: arm.AMVN,
16737 reg: regInfo{
16738 inputs: []inputInfo{
16739 {0, 22527},
16740 },
16741 outputs: []outputInfo{
16742 {0, 21503},
16743 },
16744 },
16745 },
16746 {
16747 name: "MVNshiftRA",
16748 auxType: auxInt32,
16749 argLen: 1,
16750 asm: arm.AMVN,
16751 reg: regInfo{
16752 inputs: []inputInfo{
16753 {0, 22527},
16754 },
16755 outputs: []outputInfo{
16756 {0, 21503},
16757 },
16758 },
16759 },
16760 {
16761 name: "ADCshiftLL",
16762 auxType: auxInt32,
16763 argLen: 3,
16764 asm: arm.AADC,
16765 reg: regInfo{
16766 inputs: []inputInfo{
16767 {0, 21503},
16768 {1, 21503},
16769 },
16770 outputs: []outputInfo{
16771 {0, 21503},
16772 },
16773 },
16774 },
16775 {
16776 name: "ADCshiftRL",
16777 auxType: auxInt32,
16778 argLen: 3,
16779 asm: arm.AADC,
16780 reg: regInfo{
16781 inputs: []inputInfo{
16782 {0, 21503},
16783 {1, 21503},
16784 },
16785 outputs: []outputInfo{
16786 {0, 21503},
16787 },
16788 },
16789 },
16790 {
16791 name: "ADCshiftRA",
16792 auxType: auxInt32,
16793 argLen: 3,
16794 asm: arm.AADC,
16795 reg: regInfo{
16796 inputs: []inputInfo{
16797 {0, 21503},
16798 {1, 21503},
16799 },
16800 outputs: []outputInfo{
16801 {0, 21503},
16802 },
16803 },
16804 },
16805 {
16806 name: "SBCshiftLL",
16807 auxType: auxInt32,
16808 argLen: 3,
16809 asm: arm.ASBC,
16810 reg: regInfo{
16811 inputs: []inputInfo{
16812 {0, 21503},
16813 {1, 21503},
16814 },
16815 outputs: []outputInfo{
16816 {0, 21503},
16817 },
16818 },
16819 },
16820 {
16821 name: "SBCshiftRL",
16822 auxType: auxInt32,
16823 argLen: 3,
16824 asm: arm.ASBC,
16825 reg: regInfo{
16826 inputs: []inputInfo{
16827 {0, 21503},
16828 {1, 21503},
16829 },
16830 outputs: []outputInfo{
16831 {0, 21503},
16832 },
16833 },
16834 },
16835 {
16836 name: "SBCshiftRA",
16837 auxType: auxInt32,
16838 argLen: 3,
16839 asm: arm.ASBC,
16840 reg: regInfo{
16841 inputs: []inputInfo{
16842 {0, 21503},
16843 {1, 21503},
16844 },
16845 outputs: []outputInfo{
16846 {0, 21503},
16847 },
16848 },
16849 },
16850 {
16851 name: "RSCshiftLL",
16852 auxType: auxInt32,
16853 argLen: 3,
16854 asm: arm.ARSC,
16855 reg: regInfo{
16856 inputs: []inputInfo{
16857 {0, 21503},
16858 {1, 21503},
16859 },
16860 outputs: []outputInfo{
16861 {0, 21503},
16862 },
16863 },
16864 },
16865 {
16866 name: "RSCshiftRL",
16867 auxType: auxInt32,
16868 argLen: 3,
16869 asm: arm.ARSC,
16870 reg: regInfo{
16871 inputs: []inputInfo{
16872 {0, 21503},
16873 {1, 21503},
16874 },
16875 outputs: []outputInfo{
16876 {0, 21503},
16877 },
16878 },
16879 },
16880 {
16881 name: "RSCshiftRA",
16882 auxType: auxInt32,
16883 argLen: 3,
16884 asm: arm.ARSC,
16885 reg: regInfo{
16886 inputs: []inputInfo{
16887 {0, 21503},
16888 {1, 21503},
16889 },
16890 outputs: []outputInfo{
16891 {0, 21503},
16892 },
16893 },
16894 },
16895 {
16896 name: "ADDSshiftLL",
16897 auxType: auxInt32,
16898 argLen: 2,
16899 asm: arm.AADD,
16900 reg: regInfo{
16901 inputs: []inputInfo{
16902 {0, 22527},
16903 {1, 22527},
16904 },
16905 outputs: []outputInfo{
16906 {1, 0},
16907 {0, 21503},
16908 },
16909 },
16910 },
16911 {
16912 name: "ADDSshiftRL",
16913 auxType: auxInt32,
16914 argLen: 2,
16915 asm: arm.AADD,
16916 reg: regInfo{
16917 inputs: []inputInfo{
16918 {0, 22527},
16919 {1, 22527},
16920 },
16921 outputs: []outputInfo{
16922 {1, 0},
16923 {0, 21503},
16924 },
16925 },
16926 },
16927 {
16928 name: "ADDSshiftRA",
16929 auxType: auxInt32,
16930 argLen: 2,
16931 asm: arm.AADD,
16932 reg: regInfo{
16933 inputs: []inputInfo{
16934 {0, 22527},
16935 {1, 22527},
16936 },
16937 outputs: []outputInfo{
16938 {1, 0},
16939 {0, 21503},
16940 },
16941 },
16942 },
16943 {
16944 name: "SUBSshiftLL",
16945 auxType: auxInt32,
16946 argLen: 2,
16947 asm: arm.ASUB,
16948 reg: regInfo{
16949 inputs: []inputInfo{
16950 {0, 22527},
16951 {1, 22527},
16952 },
16953 outputs: []outputInfo{
16954 {1, 0},
16955 {0, 21503},
16956 },
16957 },
16958 },
16959 {
16960 name: "SUBSshiftRL",
16961 auxType: auxInt32,
16962 argLen: 2,
16963 asm: arm.ASUB,
16964 reg: regInfo{
16965 inputs: []inputInfo{
16966 {0, 22527},
16967 {1, 22527},
16968 },
16969 outputs: []outputInfo{
16970 {1, 0},
16971 {0, 21503},
16972 },
16973 },
16974 },
16975 {
16976 name: "SUBSshiftRA",
16977 auxType: auxInt32,
16978 argLen: 2,
16979 asm: arm.ASUB,
16980 reg: regInfo{
16981 inputs: []inputInfo{
16982 {0, 22527},
16983 {1, 22527},
16984 },
16985 outputs: []outputInfo{
16986 {1, 0},
16987 {0, 21503},
16988 },
16989 },
16990 },
16991 {
16992 name: "RSBSshiftLL",
16993 auxType: auxInt32,
16994 argLen: 2,
16995 asm: arm.ARSB,
16996 reg: regInfo{
16997 inputs: []inputInfo{
16998 {0, 22527},
16999 {1, 22527},
17000 },
17001 outputs: []outputInfo{
17002 {1, 0},
17003 {0, 21503},
17004 },
17005 },
17006 },
17007 {
17008 name: "RSBSshiftRL",
17009 auxType: auxInt32,
17010 argLen: 2,
17011 asm: arm.ARSB,
17012 reg: regInfo{
17013 inputs: []inputInfo{
17014 {0, 22527},
17015 {1, 22527},
17016 },
17017 outputs: []outputInfo{
17018 {1, 0},
17019 {0, 21503},
17020 },
17021 },
17022 },
17023 {
17024 name: "RSBSshiftRA",
17025 auxType: auxInt32,
17026 argLen: 2,
17027 asm: arm.ARSB,
17028 reg: regInfo{
17029 inputs: []inputInfo{
17030 {0, 22527},
17031 {1, 22527},
17032 },
17033 outputs: []outputInfo{
17034 {1, 0},
17035 {0, 21503},
17036 },
17037 },
17038 },
17039 {
17040 name: "ADDshiftLLreg",
17041 argLen: 3,
17042 asm: arm.AADD,
17043 reg: regInfo{
17044 inputs: []inputInfo{
17045 {0, 21503},
17046 {1, 21503},
17047 {2, 21503},
17048 },
17049 outputs: []outputInfo{
17050 {0, 21503},
17051 },
17052 },
17053 },
17054 {
17055 name: "ADDshiftRLreg",
17056 argLen: 3,
17057 asm: arm.AADD,
17058 reg: regInfo{
17059 inputs: []inputInfo{
17060 {0, 21503},
17061 {1, 21503},
17062 {2, 21503},
17063 },
17064 outputs: []outputInfo{
17065 {0, 21503},
17066 },
17067 },
17068 },
17069 {
17070 name: "ADDshiftRAreg",
17071 argLen: 3,
17072 asm: arm.AADD,
17073 reg: regInfo{
17074 inputs: []inputInfo{
17075 {0, 21503},
17076 {1, 21503},
17077 {2, 21503},
17078 },
17079 outputs: []outputInfo{
17080 {0, 21503},
17081 },
17082 },
17083 },
17084 {
17085 name: "SUBshiftLLreg",
17086 argLen: 3,
17087 asm: arm.ASUB,
17088 reg: regInfo{
17089 inputs: []inputInfo{
17090 {0, 21503},
17091 {1, 21503},
17092 {2, 21503},
17093 },
17094 outputs: []outputInfo{
17095 {0, 21503},
17096 },
17097 },
17098 },
17099 {
17100 name: "SUBshiftRLreg",
17101 argLen: 3,
17102 asm: arm.ASUB,
17103 reg: regInfo{
17104 inputs: []inputInfo{
17105 {0, 21503},
17106 {1, 21503},
17107 {2, 21503},
17108 },
17109 outputs: []outputInfo{
17110 {0, 21503},
17111 },
17112 },
17113 },
17114 {
17115 name: "SUBshiftRAreg",
17116 argLen: 3,
17117 asm: arm.ASUB,
17118 reg: regInfo{
17119 inputs: []inputInfo{
17120 {0, 21503},
17121 {1, 21503},
17122 {2, 21503},
17123 },
17124 outputs: []outputInfo{
17125 {0, 21503},
17126 },
17127 },
17128 },
17129 {
17130 name: "RSBshiftLLreg",
17131 argLen: 3,
17132 asm: arm.ARSB,
17133 reg: regInfo{
17134 inputs: []inputInfo{
17135 {0, 21503},
17136 {1, 21503},
17137 {2, 21503},
17138 },
17139 outputs: []outputInfo{
17140 {0, 21503},
17141 },
17142 },
17143 },
17144 {
17145 name: "RSBshiftRLreg",
17146 argLen: 3,
17147 asm: arm.ARSB,
17148 reg: regInfo{
17149 inputs: []inputInfo{
17150 {0, 21503},
17151 {1, 21503},
17152 {2, 21503},
17153 },
17154 outputs: []outputInfo{
17155 {0, 21503},
17156 },
17157 },
17158 },
17159 {
17160 name: "RSBshiftRAreg",
17161 argLen: 3,
17162 asm: arm.ARSB,
17163 reg: regInfo{
17164 inputs: []inputInfo{
17165 {0, 21503},
17166 {1, 21503},
17167 {2, 21503},
17168 },
17169 outputs: []outputInfo{
17170 {0, 21503},
17171 },
17172 },
17173 },
17174 {
17175 name: "ANDshiftLLreg",
17176 argLen: 3,
17177 asm: arm.AAND,
17178 reg: regInfo{
17179 inputs: []inputInfo{
17180 {0, 21503},
17181 {1, 21503},
17182 {2, 21503},
17183 },
17184 outputs: []outputInfo{
17185 {0, 21503},
17186 },
17187 },
17188 },
17189 {
17190 name: "ANDshiftRLreg",
17191 argLen: 3,
17192 asm: arm.AAND,
17193 reg: regInfo{
17194 inputs: []inputInfo{
17195 {0, 21503},
17196 {1, 21503},
17197 {2, 21503},
17198 },
17199 outputs: []outputInfo{
17200 {0, 21503},
17201 },
17202 },
17203 },
17204 {
17205 name: "ANDshiftRAreg",
17206 argLen: 3,
17207 asm: arm.AAND,
17208 reg: regInfo{
17209 inputs: []inputInfo{
17210 {0, 21503},
17211 {1, 21503},
17212 {2, 21503},
17213 },
17214 outputs: []outputInfo{
17215 {0, 21503},
17216 },
17217 },
17218 },
17219 {
17220 name: "ORshiftLLreg",
17221 argLen: 3,
17222 asm: arm.AORR,
17223 reg: regInfo{
17224 inputs: []inputInfo{
17225 {0, 21503},
17226 {1, 21503},
17227 {2, 21503},
17228 },
17229 outputs: []outputInfo{
17230 {0, 21503},
17231 },
17232 },
17233 },
17234 {
17235 name: "ORshiftRLreg",
17236 argLen: 3,
17237 asm: arm.AORR,
17238 reg: regInfo{
17239 inputs: []inputInfo{
17240 {0, 21503},
17241 {1, 21503},
17242 {2, 21503},
17243 },
17244 outputs: []outputInfo{
17245 {0, 21503},
17246 },
17247 },
17248 },
17249 {
17250 name: "ORshiftRAreg",
17251 argLen: 3,
17252 asm: arm.AORR,
17253 reg: regInfo{
17254 inputs: []inputInfo{
17255 {0, 21503},
17256 {1, 21503},
17257 {2, 21503},
17258 },
17259 outputs: []outputInfo{
17260 {0, 21503},
17261 },
17262 },
17263 },
17264 {
17265 name: "XORshiftLLreg",
17266 argLen: 3,
17267 asm: arm.AEOR,
17268 reg: regInfo{
17269 inputs: []inputInfo{
17270 {0, 21503},
17271 {1, 21503},
17272 {2, 21503},
17273 },
17274 outputs: []outputInfo{
17275 {0, 21503},
17276 },
17277 },
17278 },
17279 {
17280 name: "XORshiftRLreg",
17281 argLen: 3,
17282 asm: arm.AEOR,
17283 reg: regInfo{
17284 inputs: []inputInfo{
17285 {0, 21503},
17286 {1, 21503},
17287 {2, 21503},
17288 },
17289 outputs: []outputInfo{
17290 {0, 21503},
17291 },
17292 },
17293 },
17294 {
17295 name: "XORshiftRAreg",
17296 argLen: 3,
17297 asm: arm.AEOR,
17298 reg: regInfo{
17299 inputs: []inputInfo{
17300 {0, 21503},
17301 {1, 21503},
17302 {2, 21503},
17303 },
17304 outputs: []outputInfo{
17305 {0, 21503},
17306 },
17307 },
17308 },
17309 {
17310 name: "BICshiftLLreg",
17311 argLen: 3,
17312 asm: arm.ABIC,
17313 reg: regInfo{
17314 inputs: []inputInfo{
17315 {0, 21503},
17316 {1, 21503},
17317 {2, 21503},
17318 },
17319 outputs: []outputInfo{
17320 {0, 21503},
17321 },
17322 },
17323 },
17324 {
17325 name: "BICshiftRLreg",
17326 argLen: 3,
17327 asm: arm.ABIC,
17328 reg: regInfo{
17329 inputs: []inputInfo{
17330 {0, 21503},
17331 {1, 21503},
17332 {2, 21503},
17333 },
17334 outputs: []outputInfo{
17335 {0, 21503},
17336 },
17337 },
17338 },
17339 {
17340 name: "BICshiftRAreg",
17341 argLen: 3,
17342 asm: arm.ABIC,
17343 reg: regInfo{
17344 inputs: []inputInfo{
17345 {0, 21503},
17346 {1, 21503},
17347 {2, 21503},
17348 },
17349 outputs: []outputInfo{
17350 {0, 21503},
17351 },
17352 },
17353 },
17354 {
17355 name: "MVNshiftLLreg",
17356 argLen: 2,
17357 asm: arm.AMVN,
17358 reg: regInfo{
17359 inputs: []inputInfo{
17360 {0, 22527},
17361 {1, 22527},
17362 },
17363 outputs: []outputInfo{
17364 {0, 21503},
17365 },
17366 },
17367 },
17368 {
17369 name: "MVNshiftRLreg",
17370 argLen: 2,
17371 asm: arm.AMVN,
17372 reg: regInfo{
17373 inputs: []inputInfo{
17374 {0, 22527},
17375 {1, 22527},
17376 },
17377 outputs: []outputInfo{
17378 {0, 21503},
17379 },
17380 },
17381 },
17382 {
17383 name: "MVNshiftRAreg",
17384 argLen: 2,
17385 asm: arm.AMVN,
17386 reg: regInfo{
17387 inputs: []inputInfo{
17388 {0, 22527},
17389 {1, 22527},
17390 },
17391 outputs: []outputInfo{
17392 {0, 21503},
17393 },
17394 },
17395 },
17396 {
17397 name: "ADCshiftLLreg",
17398 argLen: 4,
17399 asm: arm.AADC,
17400 reg: regInfo{
17401 inputs: []inputInfo{
17402 {0, 21503},
17403 {1, 21503},
17404 {2, 21503},
17405 },
17406 outputs: []outputInfo{
17407 {0, 21503},
17408 },
17409 },
17410 },
17411 {
17412 name: "ADCshiftRLreg",
17413 argLen: 4,
17414 asm: arm.AADC,
17415 reg: regInfo{
17416 inputs: []inputInfo{
17417 {0, 21503},
17418 {1, 21503},
17419 {2, 21503},
17420 },
17421 outputs: []outputInfo{
17422 {0, 21503},
17423 },
17424 },
17425 },
17426 {
17427 name: "ADCshiftRAreg",
17428 argLen: 4,
17429 asm: arm.AADC,
17430 reg: regInfo{
17431 inputs: []inputInfo{
17432 {0, 21503},
17433 {1, 21503},
17434 {2, 21503},
17435 },
17436 outputs: []outputInfo{
17437 {0, 21503},
17438 },
17439 },
17440 },
17441 {
17442 name: "SBCshiftLLreg",
17443 argLen: 4,
17444 asm: arm.ASBC,
17445 reg: regInfo{
17446 inputs: []inputInfo{
17447 {0, 21503},
17448 {1, 21503},
17449 {2, 21503},
17450 },
17451 outputs: []outputInfo{
17452 {0, 21503},
17453 },
17454 },
17455 },
17456 {
17457 name: "SBCshiftRLreg",
17458 argLen: 4,
17459 asm: arm.ASBC,
17460 reg: regInfo{
17461 inputs: []inputInfo{
17462 {0, 21503},
17463 {1, 21503},
17464 {2, 21503},
17465 },
17466 outputs: []outputInfo{
17467 {0, 21503},
17468 },
17469 },
17470 },
17471 {
17472 name: "SBCshiftRAreg",
17473 argLen: 4,
17474 asm: arm.ASBC,
17475 reg: regInfo{
17476 inputs: []inputInfo{
17477 {0, 21503},
17478 {1, 21503},
17479 {2, 21503},
17480 },
17481 outputs: []outputInfo{
17482 {0, 21503},
17483 },
17484 },
17485 },
17486 {
17487 name: "RSCshiftLLreg",
17488 argLen: 4,
17489 asm: arm.ARSC,
17490 reg: regInfo{
17491 inputs: []inputInfo{
17492 {0, 21503},
17493 {1, 21503},
17494 {2, 21503},
17495 },
17496 outputs: []outputInfo{
17497 {0, 21503},
17498 },
17499 },
17500 },
17501 {
17502 name: "RSCshiftRLreg",
17503 argLen: 4,
17504 asm: arm.ARSC,
17505 reg: regInfo{
17506 inputs: []inputInfo{
17507 {0, 21503},
17508 {1, 21503},
17509 {2, 21503},
17510 },
17511 outputs: []outputInfo{
17512 {0, 21503},
17513 },
17514 },
17515 },
17516 {
17517 name: "RSCshiftRAreg",
17518 argLen: 4,
17519 asm: arm.ARSC,
17520 reg: regInfo{
17521 inputs: []inputInfo{
17522 {0, 21503},
17523 {1, 21503},
17524 {2, 21503},
17525 },
17526 outputs: []outputInfo{
17527 {0, 21503},
17528 },
17529 },
17530 },
17531 {
17532 name: "ADDSshiftLLreg",
17533 argLen: 3,
17534 asm: arm.AADD,
17535 reg: regInfo{
17536 inputs: []inputInfo{
17537 {0, 21503},
17538 {1, 21503},
17539 {2, 21503},
17540 },
17541 outputs: []outputInfo{
17542 {1, 0},
17543 {0, 21503},
17544 },
17545 },
17546 },
17547 {
17548 name: "ADDSshiftRLreg",
17549 argLen: 3,
17550 asm: arm.AADD,
17551 reg: regInfo{
17552 inputs: []inputInfo{
17553 {0, 21503},
17554 {1, 21503},
17555 {2, 21503},
17556 },
17557 outputs: []outputInfo{
17558 {1, 0},
17559 {0, 21503},
17560 },
17561 },
17562 },
17563 {
17564 name: "ADDSshiftRAreg",
17565 argLen: 3,
17566 asm: arm.AADD,
17567 reg: regInfo{
17568 inputs: []inputInfo{
17569 {0, 21503},
17570 {1, 21503},
17571 {2, 21503},
17572 },
17573 outputs: []outputInfo{
17574 {1, 0},
17575 {0, 21503},
17576 },
17577 },
17578 },
17579 {
17580 name: "SUBSshiftLLreg",
17581 argLen: 3,
17582 asm: arm.ASUB,
17583 reg: regInfo{
17584 inputs: []inputInfo{
17585 {0, 21503},
17586 {1, 21503},
17587 {2, 21503},
17588 },
17589 outputs: []outputInfo{
17590 {1, 0},
17591 {0, 21503},
17592 },
17593 },
17594 },
17595 {
17596 name: "SUBSshiftRLreg",
17597 argLen: 3,
17598 asm: arm.ASUB,
17599 reg: regInfo{
17600 inputs: []inputInfo{
17601 {0, 21503},
17602 {1, 21503},
17603 {2, 21503},
17604 },
17605 outputs: []outputInfo{
17606 {1, 0},
17607 {0, 21503},
17608 },
17609 },
17610 },
17611 {
17612 name: "SUBSshiftRAreg",
17613 argLen: 3,
17614 asm: arm.ASUB,
17615 reg: regInfo{
17616 inputs: []inputInfo{
17617 {0, 21503},
17618 {1, 21503},
17619 {2, 21503},
17620 },
17621 outputs: []outputInfo{
17622 {1, 0},
17623 {0, 21503},
17624 },
17625 },
17626 },
17627 {
17628 name: "RSBSshiftLLreg",
17629 argLen: 3,
17630 asm: arm.ARSB,
17631 reg: regInfo{
17632 inputs: []inputInfo{
17633 {0, 21503},
17634 {1, 21503},
17635 {2, 21503},
17636 },
17637 outputs: []outputInfo{
17638 {1, 0},
17639 {0, 21503},
17640 },
17641 },
17642 },
17643 {
17644 name: "RSBSshiftRLreg",
17645 argLen: 3,
17646 asm: arm.ARSB,
17647 reg: regInfo{
17648 inputs: []inputInfo{
17649 {0, 21503},
17650 {1, 21503},
17651 {2, 21503},
17652 },
17653 outputs: []outputInfo{
17654 {1, 0},
17655 {0, 21503},
17656 },
17657 },
17658 },
17659 {
17660 name: "RSBSshiftRAreg",
17661 argLen: 3,
17662 asm: arm.ARSB,
17663 reg: regInfo{
17664 inputs: []inputInfo{
17665 {0, 21503},
17666 {1, 21503},
17667 {2, 21503},
17668 },
17669 outputs: []outputInfo{
17670 {1, 0},
17671 {0, 21503},
17672 },
17673 },
17674 },
17675 {
17676 name: "CMP",
17677 argLen: 2,
17678 asm: arm.ACMP,
17679 reg: regInfo{
17680 inputs: []inputInfo{
17681 {0, 22527},
17682 {1, 22527},
17683 },
17684 },
17685 },
17686 {
17687 name: "CMPconst",
17688 auxType: auxInt32,
17689 argLen: 1,
17690 asm: arm.ACMP,
17691 reg: regInfo{
17692 inputs: []inputInfo{
17693 {0, 22527},
17694 },
17695 },
17696 },
17697 {
17698 name: "CMN",
17699 argLen: 2,
17700 commutative: true,
17701 asm: arm.ACMN,
17702 reg: regInfo{
17703 inputs: []inputInfo{
17704 {0, 22527},
17705 {1, 22527},
17706 },
17707 },
17708 },
17709 {
17710 name: "CMNconst",
17711 auxType: auxInt32,
17712 argLen: 1,
17713 asm: arm.ACMN,
17714 reg: regInfo{
17715 inputs: []inputInfo{
17716 {0, 22527},
17717 },
17718 },
17719 },
17720 {
17721 name: "TST",
17722 argLen: 2,
17723 commutative: true,
17724 asm: arm.ATST,
17725 reg: regInfo{
17726 inputs: []inputInfo{
17727 {0, 22527},
17728 {1, 22527},
17729 },
17730 },
17731 },
17732 {
17733 name: "TSTconst",
17734 auxType: auxInt32,
17735 argLen: 1,
17736 asm: arm.ATST,
17737 reg: regInfo{
17738 inputs: []inputInfo{
17739 {0, 22527},
17740 },
17741 },
17742 },
17743 {
17744 name: "TEQ",
17745 argLen: 2,
17746 commutative: true,
17747 asm: arm.ATEQ,
17748 reg: regInfo{
17749 inputs: []inputInfo{
17750 {0, 22527},
17751 {1, 22527},
17752 },
17753 },
17754 },
17755 {
17756 name: "TEQconst",
17757 auxType: auxInt32,
17758 argLen: 1,
17759 asm: arm.ATEQ,
17760 reg: regInfo{
17761 inputs: []inputInfo{
17762 {0, 22527},
17763 },
17764 },
17765 },
17766 {
17767 name: "CMPF",
17768 argLen: 2,
17769 asm: arm.ACMPF,
17770 reg: regInfo{
17771 inputs: []inputInfo{
17772 {0, 4294901760},
17773 {1, 4294901760},
17774 },
17775 },
17776 },
17777 {
17778 name: "CMPD",
17779 argLen: 2,
17780 asm: arm.ACMPD,
17781 reg: regInfo{
17782 inputs: []inputInfo{
17783 {0, 4294901760},
17784 {1, 4294901760},
17785 },
17786 },
17787 },
17788 {
17789 name: "CMPshiftLL",
17790 auxType: auxInt32,
17791 argLen: 2,
17792 asm: arm.ACMP,
17793 reg: regInfo{
17794 inputs: []inputInfo{
17795 {0, 22527},
17796 {1, 22527},
17797 },
17798 },
17799 },
17800 {
17801 name: "CMPshiftRL",
17802 auxType: auxInt32,
17803 argLen: 2,
17804 asm: arm.ACMP,
17805 reg: regInfo{
17806 inputs: []inputInfo{
17807 {0, 22527},
17808 {1, 22527},
17809 },
17810 },
17811 },
17812 {
17813 name: "CMPshiftRA",
17814 auxType: auxInt32,
17815 argLen: 2,
17816 asm: arm.ACMP,
17817 reg: regInfo{
17818 inputs: []inputInfo{
17819 {0, 22527},
17820 {1, 22527},
17821 },
17822 },
17823 },
17824 {
17825 name: "CMNshiftLL",
17826 auxType: auxInt32,
17827 argLen: 2,
17828 asm: arm.ACMN,
17829 reg: regInfo{
17830 inputs: []inputInfo{
17831 {0, 22527},
17832 {1, 22527},
17833 },
17834 },
17835 },
17836 {
17837 name: "CMNshiftRL",
17838 auxType: auxInt32,
17839 argLen: 2,
17840 asm: arm.ACMN,
17841 reg: regInfo{
17842 inputs: []inputInfo{
17843 {0, 22527},
17844 {1, 22527},
17845 },
17846 },
17847 },
17848 {
17849 name: "CMNshiftRA",
17850 auxType: auxInt32,
17851 argLen: 2,
17852 asm: arm.ACMN,
17853 reg: regInfo{
17854 inputs: []inputInfo{
17855 {0, 22527},
17856 {1, 22527},
17857 },
17858 },
17859 },
17860 {
17861 name: "TSTshiftLL",
17862 auxType: auxInt32,
17863 argLen: 2,
17864 asm: arm.ATST,
17865 reg: regInfo{
17866 inputs: []inputInfo{
17867 {0, 22527},
17868 {1, 22527},
17869 },
17870 },
17871 },
17872 {
17873 name: "TSTshiftRL",
17874 auxType: auxInt32,
17875 argLen: 2,
17876 asm: arm.ATST,
17877 reg: regInfo{
17878 inputs: []inputInfo{
17879 {0, 22527},
17880 {1, 22527},
17881 },
17882 },
17883 },
17884 {
17885 name: "TSTshiftRA",
17886 auxType: auxInt32,
17887 argLen: 2,
17888 asm: arm.ATST,
17889 reg: regInfo{
17890 inputs: []inputInfo{
17891 {0, 22527},
17892 {1, 22527},
17893 },
17894 },
17895 },
17896 {
17897 name: "TEQshiftLL",
17898 auxType: auxInt32,
17899 argLen: 2,
17900 asm: arm.ATEQ,
17901 reg: regInfo{
17902 inputs: []inputInfo{
17903 {0, 22527},
17904 {1, 22527},
17905 },
17906 },
17907 },
17908 {
17909 name: "TEQshiftRL",
17910 auxType: auxInt32,
17911 argLen: 2,
17912 asm: arm.ATEQ,
17913 reg: regInfo{
17914 inputs: []inputInfo{
17915 {0, 22527},
17916 {1, 22527},
17917 },
17918 },
17919 },
17920 {
17921 name: "TEQshiftRA",
17922 auxType: auxInt32,
17923 argLen: 2,
17924 asm: arm.ATEQ,
17925 reg: regInfo{
17926 inputs: []inputInfo{
17927 {0, 22527},
17928 {1, 22527},
17929 },
17930 },
17931 },
17932 {
17933 name: "CMPshiftLLreg",
17934 argLen: 3,
17935 asm: arm.ACMP,
17936 reg: regInfo{
17937 inputs: []inputInfo{
17938 {0, 21503},
17939 {1, 21503},
17940 {2, 21503},
17941 },
17942 },
17943 },
17944 {
17945 name: "CMPshiftRLreg",
17946 argLen: 3,
17947 asm: arm.ACMP,
17948 reg: regInfo{
17949 inputs: []inputInfo{
17950 {0, 21503},
17951 {1, 21503},
17952 {2, 21503},
17953 },
17954 },
17955 },
17956 {
17957 name: "CMPshiftRAreg",
17958 argLen: 3,
17959 asm: arm.ACMP,
17960 reg: regInfo{
17961 inputs: []inputInfo{
17962 {0, 21503},
17963 {1, 21503},
17964 {2, 21503},
17965 },
17966 },
17967 },
17968 {
17969 name: "CMNshiftLLreg",
17970 argLen: 3,
17971 asm: arm.ACMN,
17972 reg: regInfo{
17973 inputs: []inputInfo{
17974 {0, 21503},
17975 {1, 21503},
17976 {2, 21503},
17977 },
17978 },
17979 },
17980 {
17981 name: "CMNshiftRLreg",
17982 argLen: 3,
17983 asm: arm.ACMN,
17984 reg: regInfo{
17985 inputs: []inputInfo{
17986 {0, 21503},
17987 {1, 21503},
17988 {2, 21503},
17989 },
17990 },
17991 },
17992 {
17993 name: "CMNshiftRAreg",
17994 argLen: 3,
17995 asm: arm.ACMN,
17996 reg: regInfo{
17997 inputs: []inputInfo{
17998 {0, 21503},
17999 {1, 21503},
18000 {2, 21503},
18001 },
18002 },
18003 },
18004 {
18005 name: "TSTshiftLLreg",
18006 argLen: 3,
18007 asm: arm.ATST,
18008 reg: regInfo{
18009 inputs: []inputInfo{
18010 {0, 21503},
18011 {1, 21503},
18012 {2, 21503},
18013 },
18014 },
18015 },
18016 {
18017 name: "TSTshiftRLreg",
18018 argLen: 3,
18019 asm: arm.ATST,
18020 reg: regInfo{
18021 inputs: []inputInfo{
18022 {0, 21503},
18023 {1, 21503},
18024 {2, 21503},
18025 },
18026 },
18027 },
18028 {
18029 name: "TSTshiftRAreg",
18030 argLen: 3,
18031 asm: arm.ATST,
18032 reg: regInfo{
18033 inputs: []inputInfo{
18034 {0, 21503},
18035 {1, 21503},
18036 {2, 21503},
18037 },
18038 },
18039 },
18040 {
18041 name: "TEQshiftLLreg",
18042 argLen: 3,
18043 asm: arm.ATEQ,
18044 reg: regInfo{
18045 inputs: []inputInfo{
18046 {0, 21503},
18047 {1, 21503},
18048 {2, 21503},
18049 },
18050 },
18051 },
18052 {
18053 name: "TEQshiftRLreg",
18054 argLen: 3,
18055 asm: arm.ATEQ,
18056 reg: regInfo{
18057 inputs: []inputInfo{
18058 {0, 21503},
18059 {1, 21503},
18060 {2, 21503},
18061 },
18062 },
18063 },
18064 {
18065 name: "TEQshiftRAreg",
18066 argLen: 3,
18067 asm: arm.ATEQ,
18068 reg: regInfo{
18069 inputs: []inputInfo{
18070 {0, 21503},
18071 {1, 21503},
18072 {2, 21503},
18073 },
18074 },
18075 },
18076 {
18077 name: "CMPF0",
18078 argLen: 1,
18079 asm: arm.ACMPF,
18080 reg: regInfo{
18081 inputs: []inputInfo{
18082 {0, 4294901760},
18083 },
18084 },
18085 },
18086 {
18087 name: "CMPD0",
18088 argLen: 1,
18089 asm: arm.ACMPD,
18090 reg: regInfo{
18091 inputs: []inputInfo{
18092 {0, 4294901760},
18093 },
18094 },
18095 },
18096 {
18097 name: "MOVWconst",
18098 auxType: auxInt32,
18099 argLen: 0,
18100 rematerializeable: true,
18101 asm: arm.AMOVW,
18102 reg: regInfo{
18103 outputs: []outputInfo{
18104 {0, 21503},
18105 },
18106 },
18107 },
18108 {
18109 name: "MOVFconst",
18110 auxType: auxFloat64,
18111 argLen: 0,
18112 rematerializeable: true,
18113 asm: arm.AMOVF,
18114 reg: regInfo{
18115 outputs: []outputInfo{
18116 {0, 4294901760},
18117 },
18118 },
18119 },
18120 {
18121 name: "MOVDconst",
18122 auxType: auxFloat64,
18123 argLen: 0,
18124 rematerializeable: true,
18125 asm: arm.AMOVD,
18126 reg: regInfo{
18127 outputs: []outputInfo{
18128 {0, 4294901760},
18129 },
18130 },
18131 },
18132 {
18133 name: "MOVWaddr",
18134 auxType: auxSymOff,
18135 argLen: 1,
18136 rematerializeable: true,
18137 symEffect: SymAddr,
18138 asm: arm.AMOVW,
18139 reg: regInfo{
18140 inputs: []inputInfo{
18141 {0, 4294975488},
18142 },
18143 outputs: []outputInfo{
18144 {0, 21503},
18145 },
18146 },
18147 },
18148 {
18149 name: "MOVBload",
18150 auxType: auxSymOff,
18151 argLen: 2,
18152 faultOnNilArg0: true,
18153 symEffect: SymRead,
18154 asm: arm.AMOVB,
18155 reg: regInfo{
18156 inputs: []inputInfo{
18157 {0, 4294998015},
18158 },
18159 outputs: []outputInfo{
18160 {0, 21503},
18161 },
18162 },
18163 },
18164 {
18165 name: "MOVBUload",
18166 auxType: auxSymOff,
18167 argLen: 2,
18168 faultOnNilArg0: true,
18169 symEffect: SymRead,
18170 asm: arm.AMOVBU,
18171 reg: regInfo{
18172 inputs: []inputInfo{
18173 {0, 4294998015},
18174 },
18175 outputs: []outputInfo{
18176 {0, 21503},
18177 },
18178 },
18179 },
18180 {
18181 name: "MOVHload",
18182 auxType: auxSymOff,
18183 argLen: 2,
18184 faultOnNilArg0: true,
18185 symEffect: SymRead,
18186 asm: arm.AMOVH,
18187 reg: regInfo{
18188 inputs: []inputInfo{
18189 {0, 4294998015},
18190 },
18191 outputs: []outputInfo{
18192 {0, 21503},
18193 },
18194 },
18195 },
18196 {
18197 name: "MOVHUload",
18198 auxType: auxSymOff,
18199 argLen: 2,
18200 faultOnNilArg0: true,
18201 symEffect: SymRead,
18202 asm: arm.AMOVHU,
18203 reg: regInfo{
18204 inputs: []inputInfo{
18205 {0, 4294998015},
18206 },
18207 outputs: []outputInfo{
18208 {0, 21503},
18209 },
18210 },
18211 },
18212 {
18213 name: "MOVWload",
18214 auxType: auxSymOff,
18215 argLen: 2,
18216 faultOnNilArg0: true,
18217 symEffect: SymRead,
18218 asm: arm.AMOVW,
18219 reg: regInfo{
18220 inputs: []inputInfo{
18221 {0, 4294998015},
18222 },
18223 outputs: []outputInfo{
18224 {0, 21503},
18225 },
18226 },
18227 },
18228 {
18229 name: "MOVFload",
18230 auxType: auxSymOff,
18231 argLen: 2,
18232 faultOnNilArg0: true,
18233 symEffect: SymRead,
18234 asm: arm.AMOVF,
18235 reg: regInfo{
18236 inputs: []inputInfo{
18237 {0, 4294998015},
18238 },
18239 outputs: []outputInfo{
18240 {0, 4294901760},
18241 },
18242 },
18243 },
18244 {
18245 name: "MOVDload",
18246 auxType: auxSymOff,
18247 argLen: 2,
18248 faultOnNilArg0: true,
18249 symEffect: SymRead,
18250 asm: arm.AMOVD,
18251 reg: regInfo{
18252 inputs: []inputInfo{
18253 {0, 4294998015},
18254 },
18255 outputs: []outputInfo{
18256 {0, 4294901760},
18257 },
18258 },
18259 },
18260 {
18261 name: "MOVBstore",
18262 auxType: auxSymOff,
18263 argLen: 3,
18264 faultOnNilArg0: true,
18265 symEffect: SymWrite,
18266 asm: arm.AMOVB,
18267 reg: regInfo{
18268 inputs: []inputInfo{
18269 {1, 22527},
18270 {0, 4294998015},
18271 },
18272 },
18273 },
18274 {
18275 name: "MOVHstore",
18276 auxType: auxSymOff,
18277 argLen: 3,
18278 faultOnNilArg0: true,
18279 symEffect: SymWrite,
18280 asm: arm.AMOVH,
18281 reg: regInfo{
18282 inputs: []inputInfo{
18283 {1, 22527},
18284 {0, 4294998015},
18285 },
18286 },
18287 },
18288 {
18289 name: "MOVWstore",
18290 auxType: auxSymOff,
18291 argLen: 3,
18292 faultOnNilArg0: true,
18293 symEffect: SymWrite,
18294 asm: arm.AMOVW,
18295 reg: regInfo{
18296 inputs: []inputInfo{
18297 {1, 22527},
18298 {0, 4294998015},
18299 },
18300 },
18301 },
18302 {
18303 name: "MOVFstore",
18304 auxType: auxSymOff,
18305 argLen: 3,
18306 faultOnNilArg0: true,
18307 symEffect: SymWrite,
18308 asm: arm.AMOVF,
18309 reg: regInfo{
18310 inputs: []inputInfo{
18311 {0, 4294998015},
18312 {1, 4294901760},
18313 },
18314 },
18315 },
18316 {
18317 name: "MOVDstore",
18318 auxType: auxSymOff,
18319 argLen: 3,
18320 faultOnNilArg0: true,
18321 symEffect: SymWrite,
18322 asm: arm.AMOVD,
18323 reg: regInfo{
18324 inputs: []inputInfo{
18325 {0, 4294998015},
18326 {1, 4294901760},
18327 },
18328 },
18329 },
18330 {
18331 name: "MOVWloadidx",
18332 argLen: 3,
18333 asm: arm.AMOVW,
18334 reg: regInfo{
18335 inputs: []inputInfo{
18336 {1, 22527},
18337 {0, 4294998015},
18338 },
18339 outputs: []outputInfo{
18340 {0, 21503},
18341 },
18342 },
18343 },
18344 {
18345 name: "MOVWloadshiftLL",
18346 auxType: auxInt32,
18347 argLen: 3,
18348 asm: arm.AMOVW,
18349 reg: regInfo{
18350 inputs: []inputInfo{
18351 {1, 22527},
18352 {0, 4294998015},
18353 },
18354 outputs: []outputInfo{
18355 {0, 21503},
18356 },
18357 },
18358 },
18359 {
18360 name: "MOVWloadshiftRL",
18361 auxType: auxInt32,
18362 argLen: 3,
18363 asm: arm.AMOVW,
18364 reg: regInfo{
18365 inputs: []inputInfo{
18366 {1, 22527},
18367 {0, 4294998015},
18368 },
18369 outputs: []outputInfo{
18370 {0, 21503},
18371 },
18372 },
18373 },
18374 {
18375 name: "MOVWloadshiftRA",
18376 auxType: auxInt32,
18377 argLen: 3,
18378 asm: arm.AMOVW,
18379 reg: regInfo{
18380 inputs: []inputInfo{
18381 {1, 22527},
18382 {0, 4294998015},
18383 },
18384 outputs: []outputInfo{
18385 {0, 21503},
18386 },
18387 },
18388 },
18389 {
18390 name: "MOVBUloadidx",
18391 argLen: 3,
18392 asm: arm.AMOVBU,
18393 reg: regInfo{
18394 inputs: []inputInfo{
18395 {1, 22527},
18396 {0, 4294998015},
18397 },
18398 outputs: []outputInfo{
18399 {0, 21503},
18400 },
18401 },
18402 },
18403 {
18404 name: "MOVBloadidx",
18405 argLen: 3,
18406 asm: arm.AMOVB,
18407 reg: regInfo{
18408 inputs: []inputInfo{
18409 {1, 22527},
18410 {0, 4294998015},
18411 },
18412 outputs: []outputInfo{
18413 {0, 21503},
18414 },
18415 },
18416 },
18417 {
18418 name: "MOVHUloadidx",
18419 argLen: 3,
18420 asm: arm.AMOVHU,
18421 reg: regInfo{
18422 inputs: []inputInfo{
18423 {1, 22527},
18424 {0, 4294998015},
18425 },
18426 outputs: []outputInfo{
18427 {0, 21503},
18428 },
18429 },
18430 },
18431 {
18432 name: "MOVHloadidx",
18433 argLen: 3,
18434 asm: arm.AMOVH,
18435 reg: regInfo{
18436 inputs: []inputInfo{
18437 {1, 22527},
18438 {0, 4294998015},
18439 },
18440 outputs: []outputInfo{
18441 {0, 21503},
18442 },
18443 },
18444 },
18445 {
18446 name: "MOVWstoreidx",
18447 argLen: 4,
18448 asm: arm.AMOVW,
18449 reg: regInfo{
18450 inputs: []inputInfo{
18451 {1, 22527},
18452 {2, 22527},
18453 {0, 4294998015},
18454 },
18455 },
18456 },
18457 {
18458 name: "MOVWstoreshiftLL",
18459 auxType: auxInt32,
18460 argLen: 4,
18461 asm: arm.AMOVW,
18462 reg: regInfo{
18463 inputs: []inputInfo{
18464 {1, 22527},
18465 {2, 22527},
18466 {0, 4294998015},
18467 },
18468 },
18469 },
18470 {
18471 name: "MOVWstoreshiftRL",
18472 auxType: auxInt32,
18473 argLen: 4,
18474 asm: arm.AMOVW,
18475 reg: regInfo{
18476 inputs: []inputInfo{
18477 {1, 22527},
18478 {2, 22527},
18479 {0, 4294998015},
18480 },
18481 },
18482 },
18483 {
18484 name: "MOVWstoreshiftRA",
18485 auxType: auxInt32,
18486 argLen: 4,
18487 asm: arm.AMOVW,
18488 reg: regInfo{
18489 inputs: []inputInfo{
18490 {1, 22527},
18491 {2, 22527},
18492 {0, 4294998015},
18493 },
18494 },
18495 },
18496 {
18497 name: "MOVBstoreidx",
18498 argLen: 4,
18499 asm: arm.AMOVB,
18500 reg: regInfo{
18501 inputs: []inputInfo{
18502 {1, 22527},
18503 {2, 22527},
18504 {0, 4294998015},
18505 },
18506 },
18507 },
18508 {
18509 name: "MOVHstoreidx",
18510 argLen: 4,
18511 asm: arm.AMOVH,
18512 reg: regInfo{
18513 inputs: []inputInfo{
18514 {1, 22527},
18515 {2, 22527},
18516 {0, 4294998015},
18517 },
18518 },
18519 },
18520 {
18521 name: "MOVBreg",
18522 argLen: 1,
18523 asm: arm.AMOVBS,
18524 reg: regInfo{
18525 inputs: []inputInfo{
18526 {0, 22527},
18527 },
18528 outputs: []outputInfo{
18529 {0, 21503},
18530 },
18531 },
18532 },
18533 {
18534 name: "MOVBUreg",
18535 argLen: 1,
18536 asm: arm.AMOVBU,
18537 reg: regInfo{
18538 inputs: []inputInfo{
18539 {0, 22527},
18540 },
18541 outputs: []outputInfo{
18542 {0, 21503},
18543 },
18544 },
18545 },
18546 {
18547 name: "MOVHreg",
18548 argLen: 1,
18549 asm: arm.AMOVHS,
18550 reg: regInfo{
18551 inputs: []inputInfo{
18552 {0, 22527},
18553 },
18554 outputs: []outputInfo{
18555 {0, 21503},
18556 },
18557 },
18558 },
18559 {
18560 name: "MOVHUreg",
18561 argLen: 1,
18562 asm: arm.AMOVHU,
18563 reg: regInfo{
18564 inputs: []inputInfo{
18565 {0, 22527},
18566 },
18567 outputs: []outputInfo{
18568 {0, 21503},
18569 },
18570 },
18571 },
18572 {
18573 name: "MOVWreg",
18574 argLen: 1,
18575 asm: arm.AMOVW,
18576 reg: regInfo{
18577 inputs: []inputInfo{
18578 {0, 22527},
18579 },
18580 outputs: []outputInfo{
18581 {0, 21503},
18582 },
18583 },
18584 },
18585 {
18586 name: "MOVWnop",
18587 argLen: 1,
18588 resultInArg0: true,
18589 reg: regInfo{
18590 inputs: []inputInfo{
18591 {0, 21503},
18592 },
18593 outputs: []outputInfo{
18594 {0, 21503},
18595 },
18596 },
18597 },
18598 {
18599 name: "MOVWF",
18600 argLen: 1,
18601 asm: arm.AMOVWF,
18602 reg: regInfo{
18603 inputs: []inputInfo{
18604 {0, 21503},
18605 },
18606 clobbers: 2147483648,
18607 outputs: []outputInfo{
18608 {0, 4294901760},
18609 },
18610 },
18611 },
18612 {
18613 name: "MOVWD",
18614 argLen: 1,
18615 asm: arm.AMOVWD,
18616 reg: regInfo{
18617 inputs: []inputInfo{
18618 {0, 21503},
18619 },
18620 clobbers: 2147483648,
18621 outputs: []outputInfo{
18622 {0, 4294901760},
18623 },
18624 },
18625 },
18626 {
18627 name: "MOVWUF",
18628 argLen: 1,
18629 asm: arm.AMOVWF,
18630 reg: regInfo{
18631 inputs: []inputInfo{
18632 {0, 21503},
18633 },
18634 clobbers: 2147483648,
18635 outputs: []outputInfo{
18636 {0, 4294901760},
18637 },
18638 },
18639 },
18640 {
18641 name: "MOVWUD",
18642 argLen: 1,
18643 asm: arm.AMOVWD,
18644 reg: regInfo{
18645 inputs: []inputInfo{
18646 {0, 21503},
18647 },
18648 clobbers: 2147483648,
18649 outputs: []outputInfo{
18650 {0, 4294901760},
18651 },
18652 },
18653 },
18654 {
18655 name: "MOVFW",
18656 argLen: 1,
18657 asm: arm.AMOVFW,
18658 reg: regInfo{
18659 inputs: []inputInfo{
18660 {0, 4294901760},
18661 },
18662 clobbers: 2147483648,
18663 outputs: []outputInfo{
18664 {0, 21503},
18665 },
18666 },
18667 },
18668 {
18669 name: "MOVDW",
18670 argLen: 1,
18671 asm: arm.AMOVDW,
18672 reg: regInfo{
18673 inputs: []inputInfo{
18674 {0, 4294901760},
18675 },
18676 clobbers: 2147483648,
18677 outputs: []outputInfo{
18678 {0, 21503},
18679 },
18680 },
18681 },
18682 {
18683 name: "MOVFWU",
18684 argLen: 1,
18685 asm: arm.AMOVFW,
18686 reg: regInfo{
18687 inputs: []inputInfo{
18688 {0, 4294901760},
18689 },
18690 clobbers: 2147483648,
18691 outputs: []outputInfo{
18692 {0, 21503},
18693 },
18694 },
18695 },
18696 {
18697 name: "MOVDWU",
18698 argLen: 1,
18699 asm: arm.AMOVDW,
18700 reg: regInfo{
18701 inputs: []inputInfo{
18702 {0, 4294901760},
18703 },
18704 clobbers: 2147483648,
18705 outputs: []outputInfo{
18706 {0, 21503},
18707 },
18708 },
18709 },
18710 {
18711 name: "MOVFD",
18712 argLen: 1,
18713 asm: arm.AMOVFD,
18714 reg: regInfo{
18715 inputs: []inputInfo{
18716 {0, 4294901760},
18717 },
18718 outputs: []outputInfo{
18719 {0, 4294901760},
18720 },
18721 },
18722 },
18723 {
18724 name: "MOVDF",
18725 argLen: 1,
18726 asm: arm.AMOVDF,
18727 reg: regInfo{
18728 inputs: []inputInfo{
18729 {0, 4294901760},
18730 },
18731 outputs: []outputInfo{
18732 {0, 4294901760},
18733 },
18734 },
18735 },
18736 {
18737 name: "CMOVWHSconst",
18738 auxType: auxInt32,
18739 argLen: 2,
18740 resultInArg0: true,
18741 asm: arm.AMOVW,
18742 reg: regInfo{
18743 inputs: []inputInfo{
18744 {0, 21503},
18745 },
18746 outputs: []outputInfo{
18747 {0, 21503},
18748 },
18749 },
18750 },
18751 {
18752 name: "CMOVWLSconst",
18753 auxType: auxInt32,
18754 argLen: 2,
18755 resultInArg0: true,
18756 asm: arm.AMOVW,
18757 reg: regInfo{
18758 inputs: []inputInfo{
18759 {0, 21503},
18760 },
18761 outputs: []outputInfo{
18762 {0, 21503},
18763 },
18764 },
18765 },
18766 {
18767 name: "SRAcond",
18768 argLen: 3,
18769 asm: arm.ASRA,
18770 reg: regInfo{
18771 inputs: []inputInfo{
18772 {0, 21503},
18773 {1, 21503},
18774 },
18775 outputs: []outputInfo{
18776 {0, 21503},
18777 },
18778 },
18779 },
18780 {
18781 name: "CALLstatic",
18782 auxType: auxCallOff,
18783 argLen: 1,
18784 clobberFlags: true,
18785 call: true,
18786 reg: regInfo{
18787 clobbers: 4294924287,
18788 },
18789 },
18790 {
18791 name: "CALLtail",
18792 auxType: auxCallOff,
18793 argLen: 1,
18794 clobberFlags: true,
18795 call: true,
18796 tailCall: true,
18797 reg: regInfo{
18798 clobbers: 4294924287,
18799 },
18800 },
18801 {
18802 name: "CALLclosure",
18803 auxType: auxCallOff,
18804 argLen: 3,
18805 clobberFlags: true,
18806 call: true,
18807 reg: regInfo{
18808 inputs: []inputInfo{
18809 {1, 128},
18810 {0, 29695},
18811 },
18812 clobbers: 4294924287,
18813 },
18814 },
18815 {
18816 name: "CALLinter",
18817 auxType: auxCallOff,
18818 argLen: 2,
18819 clobberFlags: true,
18820 call: true,
18821 reg: regInfo{
18822 inputs: []inputInfo{
18823 {0, 21503},
18824 },
18825 clobbers: 4294924287,
18826 },
18827 },
18828 {
18829 name: "LoweredNilCheck",
18830 argLen: 2,
18831 nilCheck: true,
18832 faultOnNilArg0: true,
18833 reg: regInfo{
18834 inputs: []inputInfo{
18835 {0, 22527},
18836 },
18837 },
18838 },
18839 {
18840 name: "Equal",
18841 argLen: 1,
18842 reg: regInfo{
18843 outputs: []outputInfo{
18844 {0, 21503},
18845 },
18846 },
18847 },
18848 {
18849 name: "NotEqual",
18850 argLen: 1,
18851 reg: regInfo{
18852 outputs: []outputInfo{
18853 {0, 21503},
18854 },
18855 },
18856 },
18857 {
18858 name: "LessThan",
18859 argLen: 1,
18860 reg: regInfo{
18861 outputs: []outputInfo{
18862 {0, 21503},
18863 },
18864 },
18865 },
18866 {
18867 name: "LessEqual",
18868 argLen: 1,
18869 reg: regInfo{
18870 outputs: []outputInfo{
18871 {0, 21503},
18872 },
18873 },
18874 },
18875 {
18876 name: "GreaterThan",
18877 argLen: 1,
18878 reg: regInfo{
18879 outputs: []outputInfo{
18880 {0, 21503},
18881 },
18882 },
18883 },
18884 {
18885 name: "GreaterEqual",
18886 argLen: 1,
18887 reg: regInfo{
18888 outputs: []outputInfo{
18889 {0, 21503},
18890 },
18891 },
18892 },
18893 {
18894 name: "LessThanU",
18895 argLen: 1,
18896 reg: regInfo{
18897 outputs: []outputInfo{
18898 {0, 21503},
18899 },
18900 },
18901 },
18902 {
18903 name: "LessEqualU",
18904 argLen: 1,
18905 reg: regInfo{
18906 outputs: []outputInfo{
18907 {0, 21503},
18908 },
18909 },
18910 },
18911 {
18912 name: "GreaterThanU",
18913 argLen: 1,
18914 reg: regInfo{
18915 outputs: []outputInfo{
18916 {0, 21503},
18917 },
18918 },
18919 },
18920 {
18921 name: "GreaterEqualU",
18922 argLen: 1,
18923 reg: regInfo{
18924 outputs: []outputInfo{
18925 {0, 21503},
18926 },
18927 },
18928 },
18929 {
18930 name: "DUFFZERO",
18931 auxType: auxInt64,
18932 argLen: 3,
18933 faultOnNilArg0: true,
18934 reg: regInfo{
18935 inputs: []inputInfo{
18936 {0, 2},
18937 {1, 1},
18938 },
18939 clobbers: 20482,
18940 },
18941 },
18942 {
18943 name: "DUFFCOPY",
18944 auxType: auxInt64,
18945 argLen: 3,
18946 faultOnNilArg0: true,
18947 faultOnNilArg1: true,
18948 reg: regInfo{
18949 inputs: []inputInfo{
18950 {0, 4},
18951 {1, 2},
18952 },
18953 clobbers: 20487,
18954 },
18955 },
18956 {
18957 name: "LoweredZero",
18958 auxType: auxInt64,
18959 argLen: 4,
18960 clobberFlags: true,
18961 faultOnNilArg0: true,
18962 reg: regInfo{
18963 inputs: []inputInfo{
18964 {0, 2},
18965 {1, 21503},
18966 {2, 21503},
18967 },
18968 clobbers: 2,
18969 },
18970 },
18971 {
18972 name: "LoweredMove",
18973 auxType: auxInt64,
18974 argLen: 4,
18975 clobberFlags: true,
18976 faultOnNilArg0: true,
18977 faultOnNilArg1: true,
18978 reg: regInfo{
18979 inputs: []inputInfo{
18980 {0, 4},
18981 {1, 2},
18982 {2, 21503},
18983 },
18984 clobbers: 6,
18985 },
18986 },
18987 {
18988 name: "LoweredGetClosurePtr",
18989 argLen: 0,
18990 zeroWidth: true,
18991 reg: regInfo{
18992 outputs: []outputInfo{
18993 {0, 128},
18994 },
18995 },
18996 },
18997 {
18998 name: "LoweredGetCallerSP",
18999 argLen: 1,
19000 rematerializeable: true,
19001 reg: regInfo{
19002 outputs: []outputInfo{
19003 {0, 21503},
19004 },
19005 },
19006 },
19007 {
19008 name: "LoweredGetCallerPC",
19009 argLen: 0,
19010 rematerializeable: true,
19011 reg: regInfo{
19012 outputs: []outputInfo{
19013 {0, 21503},
19014 },
19015 },
19016 },
19017 {
19018 name: "LoweredPanicBoundsA",
19019 auxType: auxInt64,
19020 argLen: 3,
19021 call: true,
19022 reg: regInfo{
19023 inputs: []inputInfo{
19024 {0, 4},
19025 {1, 8},
19026 },
19027 },
19028 },
19029 {
19030 name: "LoweredPanicBoundsB",
19031 auxType: auxInt64,
19032 argLen: 3,
19033 call: true,
19034 reg: regInfo{
19035 inputs: []inputInfo{
19036 {0, 2},
19037 {1, 4},
19038 },
19039 },
19040 },
19041 {
19042 name: "LoweredPanicBoundsC",
19043 auxType: auxInt64,
19044 argLen: 3,
19045 call: true,
19046 reg: regInfo{
19047 inputs: []inputInfo{
19048 {0, 1},
19049 {1, 2},
19050 },
19051 },
19052 },
19053 {
19054 name: "LoweredPanicExtendA",
19055 auxType: auxInt64,
19056 argLen: 4,
19057 call: true,
19058 reg: regInfo{
19059 inputs: []inputInfo{
19060 {0, 16},
19061 {1, 4},
19062 {2, 8},
19063 },
19064 },
19065 },
19066 {
19067 name: "LoweredPanicExtendB",
19068 auxType: auxInt64,
19069 argLen: 4,
19070 call: true,
19071 reg: regInfo{
19072 inputs: []inputInfo{
19073 {0, 16},
19074 {1, 2},
19075 {2, 4},
19076 },
19077 },
19078 },
19079 {
19080 name: "LoweredPanicExtendC",
19081 auxType: auxInt64,
19082 argLen: 4,
19083 call: true,
19084 reg: regInfo{
19085 inputs: []inputInfo{
19086 {0, 16},
19087 {1, 1},
19088 {2, 2},
19089 },
19090 },
19091 },
19092 {
19093 name: "FlagConstant",
19094 auxType: auxFlagConstant,
19095 argLen: 0,
19096 reg: regInfo{},
19097 },
19098 {
19099 name: "InvertFlags",
19100 argLen: 1,
19101 reg: regInfo{},
19102 },
19103 {
19104 name: "LoweredWB",
19105 auxType: auxInt64,
19106 argLen: 1,
19107 clobberFlags: true,
19108 reg: regInfo{
19109 clobbers: 4294922240,
19110 outputs: []outputInfo{
19111 {0, 256},
19112 },
19113 },
19114 },
19115
19116 {
19117 name: "ADCSflags",
19118 argLen: 3,
19119 commutative: true,
19120 asm: arm64.AADCS,
19121 reg: regInfo{
19122 inputs: []inputInfo{
19123 {0, 670826495},
19124 {1, 670826495},
19125 },
19126 outputs: []outputInfo{
19127 {1, 0},
19128 {0, 670826495},
19129 },
19130 },
19131 },
19132 {
19133 name: "ADCzerocarry",
19134 argLen: 1,
19135 asm: arm64.AADC,
19136 reg: regInfo{
19137 outputs: []outputInfo{
19138 {0, 670826495},
19139 },
19140 },
19141 },
19142 {
19143 name: "ADD",
19144 argLen: 2,
19145 commutative: true,
19146 asm: arm64.AADD,
19147 reg: regInfo{
19148 inputs: []inputInfo{
19149 {0, 805044223},
19150 {1, 805044223},
19151 },
19152 outputs: []outputInfo{
19153 {0, 670826495},
19154 },
19155 },
19156 },
19157 {
19158 name: "ADDconst",
19159 auxType: auxInt64,
19160 argLen: 1,
19161 asm: arm64.AADD,
19162 reg: regInfo{
19163 inputs: []inputInfo{
19164 {0, 1878786047},
19165 },
19166 outputs: []outputInfo{
19167 {0, 670826495},
19168 },
19169 },
19170 },
19171 {
19172 name: "ADDSconstflags",
19173 auxType: auxInt64,
19174 argLen: 1,
19175 asm: arm64.AADDS,
19176 reg: regInfo{
19177 inputs: []inputInfo{
19178 {0, 805044223},
19179 },
19180 outputs: []outputInfo{
19181 {1, 0},
19182 {0, 670826495},
19183 },
19184 },
19185 },
19186 {
19187 name: "ADDSflags",
19188 argLen: 2,
19189 commutative: true,
19190 asm: arm64.AADDS,
19191 reg: regInfo{
19192 inputs: []inputInfo{
19193 {0, 670826495},
19194 {1, 670826495},
19195 },
19196 outputs: []outputInfo{
19197 {1, 0},
19198 {0, 670826495},
19199 },
19200 },
19201 },
19202 {
19203 name: "SUB",
19204 argLen: 2,
19205 asm: arm64.ASUB,
19206 reg: regInfo{
19207 inputs: []inputInfo{
19208 {0, 805044223},
19209 {1, 805044223},
19210 },
19211 outputs: []outputInfo{
19212 {0, 670826495},
19213 },
19214 },
19215 },
19216 {
19217 name: "SUBconst",
19218 auxType: auxInt64,
19219 argLen: 1,
19220 asm: arm64.ASUB,
19221 reg: regInfo{
19222 inputs: []inputInfo{
19223 {0, 805044223},
19224 },
19225 outputs: []outputInfo{
19226 {0, 670826495},
19227 },
19228 },
19229 },
19230 {
19231 name: "SBCSflags",
19232 argLen: 3,
19233 asm: arm64.ASBCS,
19234 reg: regInfo{
19235 inputs: []inputInfo{
19236 {0, 670826495},
19237 {1, 670826495},
19238 },
19239 outputs: []outputInfo{
19240 {1, 0},
19241 {0, 670826495},
19242 },
19243 },
19244 },
19245 {
19246 name: "SUBSflags",
19247 argLen: 2,
19248 asm: arm64.ASUBS,
19249 reg: regInfo{
19250 inputs: []inputInfo{
19251 {0, 670826495},
19252 {1, 670826495},
19253 },
19254 outputs: []outputInfo{
19255 {1, 0},
19256 {0, 670826495},
19257 },
19258 },
19259 },
19260 {
19261 name: "MUL",
19262 argLen: 2,
19263 commutative: true,
19264 asm: arm64.AMUL,
19265 reg: regInfo{
19266 inputs: []inputInfo{
19267 {0, 805044223},
19268 {1, 805044223},
19269 },
19270 outputs: []outputInfo{
19271 {0, 670826495},
19272 },
19273 },
19274 },
19275 {
19276 name: "MULW",
19277 argLen: 2,
19278 commutative: true,
19279 asm: arm64.AMULW,
19280 reg: regInfo{
19281 inputs: []inputInfo{
19282 {0, 805044223},
19283 {1, 805044223},
19284 },
19285 outputs: []outputInfo{
19286 {0, 670826495},
19287 },
19288 },
19289 },
19290 {
19291 name: "MNEG",
19292 argLen: 2,
19293 commutative: true,
19294 asm: arm64.AMNEG,
19295 reg: regInfo{
19296 inputs: []inputInfo{
19297 {0, 805044223},
19298 {1, 805044223},
19299 },
19300 outputs: []outputInfo{
19301 {0, 670826495},
19302 },
19303 },
19304 },
19305 {
19306 name: "MNEGW",
19307 argLen: 2,
19308 commutative: true,
19309 asm: arm64.AMNEGW,
19310 reg: regInfo{
19311 inputs: []inputInfo{
19312 {0, 805044223},
19313 {1, 805044223},
19314 },
19315 outputs: []outputInfo{
19316 {0, 670826495},
19317 },
19318 },
19319 },
19320 {
19321 name: "MULH",
19322 argLen: 2,
19323 commutative: true,
19324 asm: arm64.ASMULH,
19325 reg: regInfo{
19326 inputs: []inputInfo{
19327 {0, 805044223},
19328 {1, 805044223},
19329 },
19330 outputs: []outputInfo{
19331 {0, 670826495},
19332 },
19333 },
19334 },
19335 {
19336 name: "UMULH",
19337 argLen: 2,
19338 commutative: true,
19339 asm: arm64.AUMULH,
19340 reg: regInfo{
19341 inputs: []inputInfo{
19342 {0, 805044223},
19343 {1, 805044223},
19344 },
19345 outputs: []outputInfo{
19346 {0, 670826495},
19347 },
19348 },
19349 },
19350 {
19351 name: "MULL",
19352 argLen: 2,
19353 commutative: true,
19354 asm: arm64.ASMULL,
19355 reg: regInfo{
19356 inputs: []inputInfo{
19357 {0, 805044223},
19358 {1, 805044223},
19359 },
19360 outputs: []outputInfo{
19361 {0, 670826495},
19362 },
19363 },
19364 },
19365 {
19366 name: "UMULL",
19367 argLen: 2,
19368 commutative: true,
19369 asm: arm64.AUMULL,
19370 reg: regInfo{
19371 inputs: []inputInfo{
19372 {0, 805044223},
19373 {1, 805044223},
19374 },
19375 outputs: []outputInfo{
19376 {0, 670826495},
19377 },
19378 },
19379 },
19380 {
19381 name: "DIV",
19382 argLen: 2,
19383 asm: arm64.ASDIV,
19384 reg: regInfo{
19385 inputs: []inputInfo{
19386 {0, 805044223},
19387 {1, 805044223},
19388 },
19389 outputs: []outputInfo{
19390 {0, 670826495},
19391 },
19392 },
19393 },
19394 {
19395 name: "UDIV",
19396 argLen: 2,
19397 asm: arm64.AUDIV,
19398 reg: regInfo{
19399 inputs: []inputInfo{
19400 {0, 805044223},
19401 {1, 805044223},
19402 },
19403 outputs: []outputInfo{
19404 {0, 670826495},
19405 },
19406 },
19407 },
19408 {
19409 name: "DIVW",
19410 argLen: 2,
19411 asm: arm64.ASDIVW,
19412 reg: regInfo{
19413 inputs: []inputInfo{
19414 {0, 805044223},
19415 {1, 805044223},
19416 },
19417 outputs: []outputInfo{
19418 {0, 670826495},
19419 },
19420 },
19421 },
19422 {
19423 name: "UDIVW",
19424 argLen: 2,
19425 asm: arm64.AUDIVW,
19426 reg: regInfo{
19427 inputs: []inputInfo{
19428 {0, 805044223},
19429 {1, 805044223},
19430 },
19431 outputs: []outputInfo{
19432 {0, 670826495},
19433 },
19434 },
19435 },
19436 {
19437 name: "MOD",
19438 argLen: 2,
19439 asm: arm64.AREM,
19440 reg: regInfo{
19441 inputs: []inputInfo{
19442 {0, 805044223},
19443 {1, 805044223},
19444 },
19445 outputs: []outputInfo{
19446 {0, 670826495},
19447 },
19448 },
19449 },
19450 {
19451 name: "UMOD",
19452 argLen: 2,
19453 asm: arm64.AUREM,
19454 reg: regInfo{
19455 inputs: []inputInfo{
19456 {0, 805044223},
19457 {1, 805044223},
19458 },
19459 outputs: []outputInfo{
19460 {0, 670826495},
19461 },
19462 },
19463 },
19464 {
19465 name: "MODW",
19466 argLen: 2,
19467 asm: arm64.AREMW,
19468 reg: regInfo{
19469 inputs: []inputInfo{
19470 {0, 805044223},
19471 {1, 805044223},
19472 },
19473 outputs: []outputInfo{
19474 {0, 670826495},
19475 },
19476 },
19477 },
19478 {
19479 name: "UMODW",
19480 argLen: 2,
19481 asm: arm64.AUREMW,
19482 reg: regInfo{
19483 inputs: []inputInfo{
19484 {0, 805044223},
19485 {1, 805044223},
19486 },
19487 outputs: []outputInfo{
19488 {0, 670826495},
19489 },
19490 },
19491 },
19492 {
19493 name: "FADDS",
19494 argLen: 2,
19495 commutative: true,
19496 asm: arm64.AFADDS,
19497 reg: regInfo{
19498 inputs: []inputInfo{
19499 {0, 9223372034707292160},
19500 {1, 9223372034707292160},
19501 },
19502 outputs: []outputInfo{
19503 {0, 9223372034707292160},
19504 },
19505 },
19506 },
19507 {
19508 name: "FADDD",
19509 argLen: 2,
19510 commutative: true,
19511 asm: arm64.AFADDD,
19512 reg: regInfo{
19513 inputs: []inputInfo{
19514 {0, 9223372034707292160},
19515 {1, 9223372034707292160},
19516 },
19517 outputs: []outputInfo{
19518 {0, 9223372034707292160},
19519 },
19520 },
19521 },
19522 {
19523 name: "FSUBS",
19524 argLen: 2,
19525 asm: arm64.AFSUBS,
19526 reg: regInfo{
19527 inputs: []inputInfo{
19528 {0, 9223372034707292160},
19529 {1, 9223372034707292160},
19530 },
19531 outputs: []outputInfo{
19532 {0, 9223372034707292160},
19533 },
19534 },
19535 },
19536 {
19537 name: "FSUBD",
19538 argLen: 2,
19539 asm: arm64.AFSUBD,
19540 reg: regInfo{
19541 inputs: []inputInfo{
19542 {0, 9223372034707292160},
19543 {1, 9223372034707292160},
19544 },
19545 outputs: []outputInfo{
19546 {0, 9223372034707292160},
19547 },
19548 },
19549 },
19550 {
19551 name: "FMULS",
19552 argLen: 2,
19553 commutative: true,
19554 asm: arm64.AFMULS,
19555 reg: regInfo{
19556 inputs: []inputInfo{
19557 {0, 9223372034707292160},
19558 {1, 9223372034707292160},
19559 },
19560 outputs: []outputInfo{
19561 {0, 9223372034707292160},
19562 },
19563 },
19564 },
19565 {
19566 name: "FMULD",
19567 argLen: 2,
19568 commutative: true,
19569 asm: arm64.AFMULD,
19570 reg: regInfo{
19571 inputs: []inputInfo{
19572 {0, 9223372034707292160},
19573 {1, 9223372034707292160},
19574 },
19575 outputs: []outputInfo{
19576 {0, 9223372034707292160},
19577 },
19578 },
19579 },
19580 {
19581 name: "FNMULS",
19582 argLen: 2,
19583 commutative: true,
19584 asm: arm64.AFNMULS,
19585 reg: regInfo{
19586 inputs: []inputInfo{
19587 {0, 9223372034707292160},
19588 {1, 9223372034707292160},
19589 },
19590 outputs: []outputInfo{
19591 {0, 9223372034707292160},
19592 },
19593 },
19594 },
19595 {
19596 name: "FNMULD",
19597 argLen: 2,
19598 commutative: true,
19599 asm: arm64.AFNMULD,
19600 reg: regInfo{
19601 inputs: []inputInfo{
19602 {0, 9223372034707292160},
19603 {1, 9223372034707292160},
19604 },
19605 outputs: []outputInfo{
19606 {0, 9223372034707292160},
19607 },
19608 },
19609 },
19610 {
19611 name: "FDIVS",
19612 argLen: 2,
19613 asm: arm64.AFDIVS,
19614 reg: regInfo{
19615 inputs: []inputInfo{
19616 {0, 9223372034707292160},
19617 {1, 9223372034707292160},
19618 },
19619 outputs: []outputInfo{
19620 {0, 9223372034707292160},
19621 },
19622 },
19623 },
19624 {
19625 name: "FDIVD",
19626 argLen: 2,
19627 asm: arm64.AFDIVD,
19628 reg: regInfo{
19629 inputs: []inputInfo{
19630 {0, 9223372034707292160},
19631 {1, 9223372034707292160},
19632 },
19633 outputs: []outputInfo{
19634 {0, 9223372034707292160},
19635 },
19636 },
19637 },
19638 {
19639 name: "AND",
19640 argLen: 2,
19641 commutative: true,
19642 asm: arm64.AAND,
19643 reg: regInfo{
19644 inputs: []inputInfo{
19645 {0, 805044223},
19646 {1, 805044223},
19647 },
19648 outputs: []outputInfo{
19649 {0, 670826495},
19650 },
19651 },
19652 },
19653 {
19654 name: "ANDconst",
19655 auxType: auxInt64,
19656 argLen: 1,
19657 asm: arm64.AAND,
19658 reg: regInfo{
19659 inputs: []inputInfo{
19660 {0, 805044223},
19661 },
19662 outputs: []outputInfo{
19663 {0, 670826495},
19664 },
19665 },
19666 },
19667 {
19668 name: "OR",
19669 argLen: 2,
19670 commutative: true,
19671 asm: arm64.AORR,
19672 reg: regInfo{
19673 inputs: []inputInfo{
19674 {0, 805044223},
19675 {1, 805044223},
19676 },
19677 outputs: []outputInfo{
19678 {0, 670826495},
19679 },
19680 },
19681 },
19682 {
19683 name: "ORconst",
19684 auxType: auxInt64,
19685 argLen: 1,
19686 asm: arm64.AORR,
19687 reg: regInfo{
19688 inputs: []inputInfo{
19689 {0, 805044223},
19690 },
19691 outputs: []outputInfo{
19692 {0, 670826495},
19693 },
19694 },
19695 },
19696 {
19697 name: "XOR",
19698 argLen: 2,
19699 commutative: true,
19700 asm: arm64.AEOR,
19701 reg: regInfo{
19702 inputs: []inputInfo{
19703 {0, 805044223},
19704 {1, 805044223},
19705 },
19706 outputs: []outputInfo{
19707 {0, 670826495},
19708 },
19709 },
19710 },
19711 {
19712 name: "XORconst",
19713 auxType: auxInt64,
19714 argLen: 1,
19715 asm: arm64.AEOR,
19716 reg: regInfo{
19717 inputs: []inputInfo{
19718 {0, 805044223},
19719 },
19720 outputs: []outputInfo{
19721 {0, 670826495},
19722 },
19723 },
19724 },
19725 {
19726 name: "BIC",
19727 argLen: 2,
19728 asm: arm64.ABIC,
19729 reg: regInfo{
19730 inputs: []inputInfo{
19731 {0, 805044223},
19732 {1, 805044223},
19733 },
19734 outputs: []outputInfo{
19735 {0, 670826495},
19736 },
19737 },
19738 },
19739 {
19740 name: "EON",
19741 argLen: 2,
19742 asm: arm64.AEON,
19743 reg: regInfo{
19744 inputs: []inputInfo{
19745 {0, 805044223},
19746 {1, 805044223},
19747 },
19748 outputs: []outputInfo{
19749 {0, 670826495},
19750 },
19751 },
19752 },
19753 {
19754 name: "ORN",
19755 argLen: 2,
19756 asm: arm64.AORN,
19757 reg: regInfo{
19758 inputs: []inputInfo{
19759 {0, 805044223},
19760 {1, 805044223},
19761 },
19762 outputs: []outputInfo{
19763 {0, 670826495},
19764 },
19765 },
19766 },
19767 {
19768 name: "MVN",
19769 argLen: 1,
19770 asm: arm64.AMVN,
19771 reg: regInfo{
19772 inputs: []inputInfo{
19773 {0, 805044223},
19774 },
19775 outputs: []outputInfo{
19776 {0, 670826495},
19777 },
19778 },
19779 },
19780 {
19781 name: "NEG",
19782 argLen: 1,
19783 asm: arm64.ANEG,
19784 reg: regInfo{
19785 inputs: []inputInfo{
19786 {0, 805044223},
19787 },
19788 outputs: []outputInfo{
19789 {0, 670826495},
19790 },
19791 },
19792 },
19793 {
19794 name: "NEGSflags",
19795 argLen: 1,
19796 asm: arm64.ANEGS,
19797 reg: regInfo{
19798 inputs: []inputInfo{
19799 {0, 805044223},
19800 },
19801 outputs: []outputInfo{
19802 {1, 0},
19803 {0, 670826495},
19804 },
19805 },
19806 },
19807 {
19808 name: "NGCzerocarry",
19809 argLen: 1,
19810 asm: arm64.ANGC,
19811 reg: regInfo{
19812 outputs: []outputInfo{
19813 {0, 670826495},
19814 },
19815 },
19816 },
19817 {
19818 name: "FABSD",
19819 argLen: 1,
19820 asm: arm64.AFABSD,
19821 reg: regInfo{
19822 inputs: []inputInfo{
19823 {0, 9223372034707292160},
19824 },
19825 outputs: []outputInfo{
19826 {0, 9223372034707292160},
19827 },
19828 },
19829 },
19830 {
19831 name: "FNEGS",
19832 argLen: 1,
19833 asm: arm64.AFNEGS,
19834 reg: regInfo{
19835 inputs: []inputInfo{
19836 {0, 9223372034707292160},
19837 },
19838 outputs: []outputInfo{
19839 {0, 9223372034707292160},
19840 },
19841 },
19842 },
19843 {
19844 name: "FNEGD",
19845 argLen: 1,
19846 asm: arm64.AFNEGD,
19847 reg: regInfo{
19848 inputs: []inputInfo{
19849 {0, 9223372034707292160},
19850 },
19851 outputs: []outputInfo{
19852 {0, 9223372034707292160},
19853 },
19854 },
19855 },
19856 {
19857 name: "FSQRTD",
19858 argLen: 1,
19859 asm: arm64.AFSQRTD,
19860 reg: regInfo{
19861 inputs: []inputInfo{
19862 {0, 9223372034707292160},
19863 },
19864 outputs: []outputInfo{
19865 {0, 9223372034707292160},
19866 },
19867 },
19868 },
19869 {
19870 name: "FSQRTS",
19871 argLen: 1,
19872 asm: arm64.AFSQRTS,
19873 reg: regInfo{
19874 inputs: []inputInfo{
19875 {0, 9223372034707292160},
19876 },
19877 outputs: []outputInfo{
19878 {0, 9223372034707292160},
19879 },
19880 },
19881 },
19882 {
19883 name: "FMIND",
19884 argLen: 2,
19885 asm: arm64.AFMIND,
19886 reg: regInfo{
19887 inputs: []inputInfo{
19888 {0, 9223372034707292160},
19889 {1, 9223372034707292160},
19890 },
19891 outputs: []outputInfo{
19892 {0, 9223372034707292160},
19893 },
19894 },
19895 },
19896 {
19897 name: "FMINS",
19898 argLen: 2,
19899 asm: arm64.AFMINS,
19900 reg: regInfo{
19901 inputs: []inputInfo{
19902 {0, 9223372034707292160},
19903 {1, 9223372034707292160},
19904 },
19905 outputs: []outputInfo{
19906 {0, 9223372034707292160},
19907 },
19908 },
19909 },
19910 {
19911 name: "FMAXD",
19912 argLen: 2,
19913 asm: arm64.AFMAXD,
19914 reg: regInfo{
19915 inputs: []inputInfo{
19916 {0, 9223372034707292160},
19917 {1, 9223372034707292160},
19918 },
19919 outputs: []outputInfo{
19920 {0, 9223372034707292160},
19921 },
19922 },
19923 },
19924 {
19925 name: "FMAXS",
19926 argLen: 2,
19927 asm: arm64.AFMAXS,
19928 reg: regInfo{
19929 inputs: []inputInfo{
19930 {0, 9223372034707292160},
19931 {1, 9223372034707292160},
19932 },
19933 outputs: []outputInfo{
19934 {0, 9223372034707292160},
19935 },
19936 },
19937 },
19938 {
19939 name: "REV",
19940 argLen: 1,
19941 asm: arm64.AREV,
19942 reg: regInfo{
19943 inputs: []inputInfo{
19944 {0, 805044223},
19945 },
19946 outputs: []outputInfo{
19947 {0, 670826495},
19948 },
19949 },
19950 },
19951 {
19952 name: "REVW",
19953 argLen: 1,
19954 asm: arm64.AREVW,
19955 reg: regInfo{
19956 inputs: []inputInfo{
19957 {0, 805044223},
19958 },
19959 outputs: []outputInfo{
19960 {0, 670826495},
19961 },
19962 },
19963 },
19964 {
19965 name: "REV16",
19966 argLen: 1,
19967 asm: arm64.AREV16,
19968 reg: regInfo{
19969 inputs: []inputInfo{
19970 {0, 805044223},
19971 },
19972 outputs: []outputInfo{
19973 {0, 670826495},
19974 },
19975 },
19976 },
19977 {
19978 name: "REV16W",
19979 argLen: 1,
19980 asm: arm64.AREV16W,
19981 reg: regInfo{
19982 inputs: []inputInfo{
19983 {0, 805044223},
19984 },
19985 outputs: []outputInfo{
19986 {0, 670826495},
19987 },
19988 },
19989 },
19990 {
19991 name: "RBIT",
19992 argLen: 1,
19993 asm: arm64.ARBIT,
19994 reg: regInfo{
19995 inputs: []inputInfo{
19996 {0, 805044223},
19997 },
19998 outputs: []outputInfo{
19999 {0, 670826495},
20000 },
20001 },
20002 },
20003 {
20004 name: "RBITW",
20005 argLen: 1,
20006 asm: arm64.ARBITW,
20007 reg: regInfo{
20008 inputs: []inputInfo{
20009 {0, 805044223},
20010 },
20011 outputs: []outputInfo{
20012 {0, 670826495},
20013 },
20014 },
20015 },
20016 {
20017 name: "CLZ",
20018 argLen: 1,
20019 asm: arm64.ACLZ,
20020 reg: regInfo{
20021 inputs: []inputInfo{
20022 {0, 805044223},
20023 },
20024 outputs: []outputInfo{
20025 {0, 670826495},
20026 },
20027 },
20028 },
20029 {
20030 name: "CLZW",
20031 argLen: 1,
20032 asm: arm64.ACLZW,
20033 reg: regInfo{
20034 inputs: []inputInfo{
20035 {0, 805044223},
20036 },
20037 outputs: []outputInfo{
20038 {0, 670826495},
20039 },
20040 },
20041 },
20042 {
20043 name: "VCNT",
20044 argLen: 1,
20045 asm: arm64.AVCNT,
20046 reg: regInfo{
20047 inputs: []inputInfo{
20048 {0, 9223372034707292160},
20049 },
20050 outputs: []outputInfo{
20051 {0, 9223372034707292160},
20052 },
20053 },
20054 },
20055 {
20056 name: "VUADDLV",
20057 argLen: 1,
20058 asm: arm64.AVUADDLV,
20059 reg: regInfo{
20060 inputs: []inputInfo{
20061 {0, 9223372034707292160},
20062 },
20063 outputs: []outputInfo{
20064 {0, 9223372034707292160},
20065 },
20066 },
20067 },
20068 {
20069 name: "LoweredRound32F",
20070 argLen: 1,
20071 resultInArg0: true,
20072 zeroWidth: true,
20073 reg: regInfo{
20074 inputs: []inputInfo{
20075 {0, 9223372034707292160},
20076 },
20077 outputs: []outputInfo{
20078 {0, 9223372034707292160},
20079 },
20080 },
20081 },
20082 {
20083 name: "LoweredRound64F",
20084 argLen: 1,
20085 resultInArg0: true,
20086 zeroWidth: true,
20087 reg: regInfo{
20088 inputs: []inputInfo{
20089 {0, 9223372034707292160},
20090 },
20091 outputs: []outputInfo{
20092 {0, 9223372034707292160},
20093 },
20094 },
20095 },
20096 {
20097 name: "FMADDS",
20098 argLen: 3,
20099 asm: arm64.AFMADDS,
20100 reg: regInfo{
20101 inputs: []inputInfo{
20102 {0, 9223372034707292160},
20103 {1, 9223372034707292160},
20104 {2, 9223372034707292160},
20105 },
20106 outputs: []outputInfo{
20107 {0, 9223372034707292160},
20108 },
20109 },
20110 },
20111 {
20112 name: "FMADDD",
20113 argLen: 3,
20114 asm: arm64.AFMADDD,
20115 reg: regInfo{
20116 inputs: []inputInfo{
20117 {0, 9223372034707292160},
20118 {1, 9223372034707292160},
20119 {2, 9223372034707292160},
20120 },
20121 outputs: []outputInfo{
20122 {0, 9223372034707292160},
20123 },
20124 },
20125 },
20126 {
20127 name: "FNMADDS",
20128 argLen: 3,
20129 asm: arm64.AFNMADDS,
20130 reg: regInfo{
20131 inputs: []inputInfo{
20132 {0, 9223372034707292160},
20133 {1, 9223372034707292160},
20134 {2, 9223372034707292160},
20135 },
20136 outputs: []outputInfo{
20137 {0, 9223372034707292160},
20138 },
20139 },
20140 },
20141 {
20142 name: "FNMADDD",
20143 argLen: 3,
20144 asm: arm64.AFNMADDD,
20145 reg: regInfo{
20146 inputs: []inputInfo{
20147 {0, 9223372034707292160},
20148 {1, 9223372034707292160},
20149 {2, 9223372034707292160},
20150 },
20151 outputs: []outputInfo{
20152 {0, 9223372034707292160},
20153 },
20154 },
20155 },
20156 {
20157 name: "FMSUBS",
20158 argLen: 3,
20159 asm: arm64.AFMSUBS,
20160 reg: regInfo{
20161 inputs: []inputInfo{
20162 {0, 9223372034707292160},
20163 {1, 9223372034707292160},
20164 {2, 9223372034707292160},
20165 },
20166 outputs: []outputInfo{
20167 {0, 9223372034707292160},
20168 },
20169 },
20170 },
20171 {
20172 name: "FMSUBD",
20173 argLen: 3,
20174 asm: arm64.AFMSUBD,
20175 reg: regInfo{
20176 inputs: []inputInfo{
20177 {0, 9223372034707292160},
20178 {1, 9223372034707292160},
20179 {2, 9223372034707292160},
20180 },
20181 outputs: []outputInfo{
20182 {0, 9223372034707292160},
20183 },
20184 },
20185 },
20186 {
20187 name: "FNMSUBS",
20188 argLen: 3,
20189 asm: arm64.AFNMSUBS,
20190 reg: regInfo{
20191 inputs: []inputInfo{
20192 {0, 9223372034707292160},
20193 {1, 9223372034707292160},
20194 {2, 9223372034707292160},
20195 },
20196 outputs: []outputInfo{
20197 {0, 9223372034707292160},
20198 },
20199 },
20200 },
20201 {
20202 name: "FNMSUBD",
20203 argLen: 3,
20204 asm: arm64.AFNMSUBD,
20205 reg: regInfo{
20206 inputs: []inputInfo{
20207 {0, 9223372034707292160},
20208 {1, 9223372034707292160},
20209 {2, 9223372034707292160},
20210 },
20211 outputs: []outputInfo{
20212 {0, 9223372034707292160},
20213 },
20214 },
20215 },
20216 {
20217 name: "MADD",
20218 argLen: 3,
20219 asm: arm64.AMADD,
20220 reg: regInfo{
20221 inputs: []inputInfo{
20222 {0, 805044223},
20223 {1, 805044223},
20224 {2, 805044223},
20225 },
20226 outputs: []outputInfo{
20227 {0, 670826495},
20228 },
20229 },
20230 },
20231 {
20232 name: "MADDW",
20233 argLen: 3,
20234 asm: arm64.AMADDW,
20235 reg: regInfo{
20236 inputs: []inputInfo{
20237 {0, 805044223},
20238 {1, 805044223},
20239 {2, 805044223},
20240 },
20241 outputs: []outputInfo{
20242 {0, 670826495},
20243 },
20244 },
20245 },
20246 {
20247 name: "MSUB",
20248 argLen: 3,
20249 asm: arm64.AMSUB,
20250 reg: regInfo{
20251 inputs: []inputInfo{
20252 {0, 805044223},
20253 {1, 805044223},
20254 {2, 805044223},
20255 },
20256 outputs: []outputInfo{
20257 {0, 670826495},
20258 },
20259 },
20260 },
20261 {
20262 name: "MSUBW",
20263 argLen: 3,
20264 asm: arm64.AMSUBW,
20265 reg: regInfo{
20266 inputs: []inputInfo{
20267 {0, 805044223},
20268 {1, 805044223},
20269 {2, 805044223},
20270 },
20271 outputs: []outputInfo{
20272 {0, 670826495},
20273 },
20274 },
20275 },
20276 {
20277 name: "SLL",
20278 argLen: 2,
20279 asm: arm64.ALSL,
20280 reg: regInfo{
20281 inputs: []inputInfo{
20282 {0, 805044223},
20283 {1, 805044223},
20284 },
20285 outputs: []outputInfo{
20286 {0, 670826495},
20287 },
20288 },
20289 },
20290 {
20291 name: "SLLconst",
20292 auxType: auxInt64,
20293 argLen: 1,
20294 asm: arm64.ALSL,
20295 reg: regInfo{
20296 inputs: []inputInfo{
20297 {0, 805044223},
20298 },
20299 outputs: []outputInfo{
20300 {0, 670826495},
20301 },
20302 },
20303 },
20304 {
20305 name: "SRL",
20306 argLen: 2,
20307 asm: arm64.ALSR,
20308 reg: regInfo{
20309 inputs: []inputInfo{
20310 {0, 805044223},
20311 {1, 805044223},
20312 },
20313 outputs: []outputInfo{
20314 {0, 670826495},
20315 },
20316 },
20317 },
20318 {
20319 name: "SRLconst",
20320 auxType: auxInt64,
20321 argLen: 1,
20322 asm: arm64.ALSR,
20323 reg: regInfo{
20324 inputs: []inputInfo{
20325 {0, 805044223},
20326 },
20327 outputs: []outputInfo{
20328 {0, 670826495},
20329 },
20330 },
20331 },
20332 {
20333 name: "SRA",
20334 argLen: 2,
20335 asm: arm64.AASR,
20336 reg: regInfo{
20337 inputs: []inputInfo{
20338 {0, 805044223},
20339 {1, 805044223},
20340 },
20341 outputs: []outputInfo{
20342 {0, 670826495},
20343 },
20344 },
20345 },
20346 {
20347 name: "SRAconst",
20348 auxType: auxInt64,
20349 argLen: 1,
20350 asm: arm64.AASR,
20351 reg: regInfo{
20352 inputs: []inputInfo{
20353 {0, 805044223},
20354 },
20355 outputs: []outputInfo{
20356 {0, 670826495},
20357 },
20358 },
20359 },
20360 {
20361 name: "ROR",
20362 argLen: 2,
20363 asm: arm64.AROR,
20364 reg: regInfo{
20365 inputs: []inputInfo{
20366 {0, 805044223},
20367 {1, 805044223},
20368 },
20369 outputs: []outputInfo{
20370 {0, 670826495},
20371 },
20372 },
20373 },
20374 {
20375 name: "RORW",
20376 argLen: 2,
20377 asm: arm64.ARORW,
20378 reg: regInfo{
20379 inputs: []inputInfo{
20380 {0, 805044223},
20381 {1, 805044223},
20382 },
20383 outputs: []outputInfo{
20384 {0, 670826495},
20385 },
20386 },
20387 },
20388 {
20389 name: "RORconst",
20390 auxType: auxInt64,
20391 argLen: 1,
20392 asm: arm64.AROR,
20393 reg: regInfo{
20394 inputs: []inputInfo{
20395 {0, 805044223},
20396 },
20397 outputs: []outputInfo{
20398 {0, 670826495},
20399 },
20400 },
20401 },
20402 {
20403 name: "RORWconst",
20404 auxType: auxInt64,
20405 argLen: 1,
20406 asm: arm64.ARORW,
20407 reg: regInfo{
20408 inputs: []inputInfo{
20409 {0, 805044223},
20410 },
20411 outputs: []outputInfo{
20412 {0, 670826495},
20413 },
20414 },
20415 },
20416 {
20417 name: "EXTRconst",
20418 auxType: auxInt64,
20419 argLen: 2,
20420 asm: arm64.AEXTR,
20421 reg: regInfo{
20422 inputs: []inputInfo{
20423 {0, 805044223},
20424 {1, 805044223},
20425 },
20426 outputs: []outputInfo{
20427 {0, 670826495},
20428 },
20429 },
20430 },
20431 {
20432 name: "EXTRWconst",
20433 auxType: auxInt64,
20434 argLen: 2,
20435 asm: arm64.AEXTRW,
20436 reg: regInfo{
20437 inputs: []inputInfo{
20438 {0, 805044223},
20439 {1, 805044223},
20440 },
20441 outputs: []outputInfo{
20442 {0, 670826495},
20443 },
20444 },
20445 },
20446 {
20447 name: "CMP",
20448 argLen: 2,
20449 asm: arm64.ACMP,
20450 reg: regInfo{
20451 inputs: []inputInfo{
20452 {0, 805044223},
20453 {1, 805044223},
20454 },
20455 },
20456 },
20457 {
20458 name: "CMPconst",
20459 auxType: auxInt64,
20460 argLen: 1,
20461 asm: arm64.ACMP,
20462 reg: regInfo{
20463 inputs: []inputInfo{
20464 {0, 805044223},
20465 },
20466 },
20467 },
20468 {
20469 name: "CMPW",
20470 argLen: 2,
20471 asm: arm64.ACMPW,
20472 reg: regInfo{
20473 inputs: []inputInfo{
20474 {0, 805044223},
20475 {1, 805044223},
20476 },
20477 },
20478 },
20479 {
20480 name: "CMPWconst",
20481 auxType: auxInt32,
20482 argLen: 1,
20483 asm: arm64.ACMPW,
20484 reg: regInfo{
20485 inputs: []inputInfo{
20486 {0, 805044223},
20487 },
20488 },
20489 },
20490 {
20491 name: "CMN",
20492 argLen: 2,
20493 commutative: true,
20494 asm: arm64.ACMN,
20495 reg: regInfo{
20496 inputs: []inputInfo{
20497 {0, 805044223},
20498 {1, 805044223},
20499 },
20500 },
20501 },
20502 {
20503 name: "CMNconst",
20504 auxType: auxInt64,
20505 argLen: 1,
20506 asm: arm64.ACMN,
20507 reg: regInfo{
20508 inputs: []inputInfo{
20509 {0, 805044223},
20510 },
20511 },
20512 },
20513 {
20514 name: "CMNW",
20515 argLen: 2,
20516 commutative: true,
20517 asm: arm64.ACMNW,
20518 reg: regInfo{
20519 inputs: []inputInfo{
20520 {0, 805044223},
20521 {1, 805044223},
20522 },
20523 },
20524 },
20525 {
20526 name: "CMNWconst",
20527 auxType: auxInt32,
20528 argLen: 1,
20529 asm: arm64.ACMNW,
20530 reg: regInfo{
20531 inputs: []inputInfo{
20532 {0, 805044223},
20533 },
20534 },
20535 },
20536 {
20537 name: "TST",
20538 argLen: 2,
20539 commutative: true,
20540 asm: arm64.ATST,
20541 reg: regInfo{
20542 inputs: []inputInfo{
20543 {0, 805044223},
20544 {1, 805044223},
20545 },
20546 },
20547 },
20548 {
20549 name: "TSTconst",
20550 auxType: auxInt64,
20551 argLen: 1,
20552 asm: arm64.ATST,
20553 reg: regInfo{
20554 inputs: []inputInfo{
20555 {0, 805044223},
20556 },
20557 },
20558 },
20559 {
20560 name: "TSTW",
20561 argLen: 2,
20562 commutative: true,
20563 asm: arm64.ATSTW,
20564 reg: regInfo{
20565 inputs: []inputInfo{
20566 {0, 805044223},
20567 {1, 805044223},
20568 },
20569 },
20570 },
20571 {
20572 name: "TSTWconst",
20573 auxType: auxInt32,
20574 argLen: 1,
20575 asm: arm64.ATSTW,
20576 reg: regInfo{
20577 inputs: []inputInfo{
20578 {0, 805044223},
20579 },
20580 },
20581 },
20582 {
20583 name: "FCMPS",
20584 argLen: 2,
20585 asm: arm64.AFCMPS,
20586 reg: regInfo{
20587 inputs: []inputInfo{
20588 {0, 9223372034707292160},
20589 {1, 9223372034707292160},
20590 },
20591 },
20592 },
20593 {
20594 name: "FCMPD",
20595 argLen: 2,
20596 asm: arm64.AFCMPD,
20597 reg: regInfo{
20598 inputs: []inputInfo{
20599 {0, 9223372034707292160},
20600 {1, 9223372034707292160},
20601 },
20602 },
20603 },
20604 {
20605 name: "FCMPS0",
20606 argLen: 1,
20607 asm: arm64.AFCMPS,
20608 reg: regInfo{
20609 inputs: []inputInfo{
20610 {0, 9223372034707292160},
20611 },
20612 },
20613 },
20614 {
20615 name: "FCMPD0",
20616 argLen: 1,
20617 asm: arm64.AFCMPD,
20618 reg: regInfo{
20619 inputs: []inputInfo{
20620 {0, 9223372034707292160},
20621 },
20622 },
20623 },
20624 {
20625 name: "MVNshiftLL",
20626 auxType: auxInt64,
20627 argLen: 1,
20628 asm: arm64.AMVN,
20629 reg: regInfo{
20630 inputs: []inputInfo{
20631 {0, 805044223},
20632 },
20633 outputs: []outputInfo{
20634 {0, 670826495},
20635 },
20636 },
20637 },
20638 {
20639 name: "MVNshiftRL",
20640 auxType: auxInt64,
20641 argLen: 1,
20642 asm: arm64.AMVN,
20643 reg: regInfo{
20644 inputs: []inputInfo{
20645 {0, 805044223},
20646 },
20647 outputs: []outputInfo{
20648 {0, 670826495},
20649 },
20650 },
20651 },
20652 {
20653 name: "MVNshiftRA",
20654 auxType: auxInt64,
20655 argLen: 1,
20656 asm: arm64.AMVN,
20657 reg: regInfo{
20658 inputs: []inputInfo{
20659 {0, 805044223},
20660 },
20661 outputs: []outputInfo{
20662 {0, 670826495},
20663 },
20664 },
20665 },
20666 {
20667 name: "MVNshiftRO",
20668 auxType: auxInt64,
20669 argLen: 1,
20670 asm: arm64.AMVN,
20671 reg: regInfo{
20672 inputs: []inputInfo{
20673 {0, 805044223},
20674 },
20675 outputs: []outputInfo{
20676 {0, 670826495},
20677 },
20678 },
20679 },
20680 {
20681 name: "NEGshiftLL",
20682 auxType: auxInt64,
20683 argLen: 1,
20684 asm: arm64.ANEG,
20685 reg: regInfo{
20686 inputs: []inputInfo{
20687 {0, 805044223},
20688 },
20689 outputs: []outputInfo{
20690 {0, 670826495},
20691 },
20692 },
20693 },
20694 {
20695 name: "NEGshiftRL",
20696 auxType: auxInt64,
20697 argLen: 1,
20698 asm: arm64.ANEG,
20699 reg: regInfo{
20700 inputs: []inputInfo{
20701 {0, 805044223},
20702 },
20703 outputs: []outputInfo{
20704 {0, 670826495},
20705 },
20706 },
20707 },
20708 {
20709 name: "NEGshiftRA",
20710 auxType: auxInt64,
20711 argLen: 1,
20712 asm: arm64.ANEG,
20713 reg: regInfo{
20714 inputs: []inputInfo{
20715 {0, 805044223},
20716 },
20717 outputs: []outputInfo{
20718 {0, 670826495},
20719 },
20720 },
20721 },
20722 {
20723 name: "ADDshiftLL",
20724 auxType: auxInt64,
20725 argLen: 2,
20726 asm: arm64.AADD,
20727 reg: regInfo{
20728 inputs: []inputInfo{
20729 {0, 805044223},
20730 {1, 805044223},
20731 },
20732 outputs: []outputInfo{
20733 {0, 670826495},
20734 },
20735 },
20736 },
20737 {
20738 name: "ADDshiftRL",
20739 auxType: auxInt64,
20740 argLen: 2,
20741 asm: arm64.AADD,
20742 reg: regInfo{
20743 inputs: []inputInfo{
20744 {0, 805044223},
20745 {1, 805044223},
20746 },
20747 outputs: []outputInfo{
20748 {0, 670826495},
20749 },
20750 },
20751 },
20752 {
20753 name: "ADDshiftRA",
20754 auxType: auxInt64,
20755 argLen: 2,
20756 asm: arm64.AADD,
20757 reg: regInfo{
20758 inputs: []inputInfo{
20759 {0, 805044223},
20760 {1, 805044223},
20761 },
20762 outputs: []outputInfo{
20763 {0, 670826495},
20764 },
20765 },
20766 },
20767 {
20768 name: "SUBshiftLL",
20769 auxType: auxInt64,
20770 argLen: 2,
20771 asm: arm64.ASUB,
20772 reg: regInfo{
20773 inputs: []inputInfo{
20774 {0, 805044223},
20775 {1, 805044223},
20776 },
20777 outputs: []outputInfo{
20778 {0, 670826495},
20779 },
20780 },
20781 },
20782 {
20783 name: "SUBshiftRL",
20784 auxType: auxInt64,
20785 argLen: 2,
20786 asm: arm64.ASUB,
20787 reg: regInfo{
20788 inputs: []inputInfo{
20789 {0, 805044223},
20790 {1, 805044223},
20791 },
20792 outputs: []outputInfo{
20793 {0, 670826495},
20794 },
20795 },
20796 },
20797 {
20798 name: "SUBshiftRA",
20799 auxType: auxInt64,
20800 argLen: 2,
20801 asm: arm64.ASUB,
20802 reg: regInfo{
20803 inputs: []inputInfo{
20804 {0, 805044223},
20805 {1, 805044223},
20806 },
20807 outputs: []outputInfo{
20808 {0, 670826495},
20809 },
20810 },
20811 },
20812 {
20813 name: "ANDshiftLL",
20814 auxType: auxInt64,
20815 argLen: 2,
20816 asm: arm64.AAND,
20817 reg: regInfo{
20818 inputs: []inputInfo{
20819 {0, 805044223},
20820 {1, 805044223},
20821 },
20822 outputs: []outputInfo{
20823 {0, 670826495},
20824 },
20825 },
20826 },
20827 {
20828 name: "ANDshiftRL",
20829 auxType: auxInt64,
20830 argLen: 2,
20831 asm: arm64.AAND,
20832 reg: regInfo{
20833 inputs: []inputInfo{
20834 {0, 805044223},
20835 {1, 805044223},
20836 },
20837 outputs: []outputInfo{
20838 {0, 670826495},
20839 },
20840 },
20841 },
20842 {
20843 name: "ANDshiftRA",
20844 auxType: auxInt64,
20845 argLen: 2,
20846 asm: arm64.AAND,
20847 reg: regInfo{
20848 inputs: []inputInfo{
20849 {0, 805044223},
20850 {1, 805044223},
20851 },
20852 outputs: []outputInfo{
20853 {0, 670826495},
20854 },
20855 },
20856 },
20857 {
20858 name: "ANDshiftRO",
20859 auxType: auxInt64,
20860 argLen: 2,
20861 asm: arm64.AAND,
20862 reg: regInfo{
20863 inputs: []inputInfo{
20864 {0, 805044223},
20865 {1, 805044223},
20866 },
20867 outputs: []outputInfo{
20868 {0, 670826495},
20869 },
20870 },
20871 },
20872 {
20873 name: "ORshiftLL",
20874 auxType: auxInt64,
20875 argLen: 2,
20876 asm: arm64.AORR,
20877 reg: regInfo{
20878 inputs: []inputInfo{
20879 {0, 805044223},
20880 {1, 805044223},
20881 },
20882 outputs: []outputInfo{
20883 {0, 670826495},
20884 },
20885 },
20886 },
20887 {
20888 name: "ORshiftRL",
20889 auxType: auxInt64,
20890 argLen: 2,
20891 asm: arm64.AORR,
20892 reg: regInfo{
20893 inputs: []inputInfo{
20894 {0, 805044223},
20895 {1, 805044223},
20896 },
20897 outputs: []outputInfo{
20898 {0, 670826495},
20899 },
20900 },
20901 },
20902 {
20903 name: "ORshiftRA",
20904 auxType: auxInt64,
20905 argLen: 2,
20906 asm: arm64.AORR,
20907 reg: regInfo{
20908 inputs: []inputInfo{
20909 {0, 805044223},
20910 {1, 805044223},
20911 },
20912 outputs: []outputInfo{
20913 {0, 670826495},
20914 },
20915 },
20916 },
20917 {
20918 name: "ORshiftRO",
20919 auxType: auxInt64,
20920 argLen: 2,
20921 asm: arm64.AORR,
20922 reg: regInfo{
20923 inputs: []inputInfo{
20924 {0, 805044223},
20925 {1, 805044223},
20926 },
20927 outputs: []outputInfo{
20928 {0, 670826495},
20929 },
20930 },
20931 },
20932 {
20933 name: "XORshiftLL",
20934 auxType: auxInt64,
20935 argLen: 2,
20936 asm: arm64.AEOR,
20937 reg: regInfo{
20938 inputs: []inputInfo{
20939 {0, 805044223},
20940 {1, 805044223},
20941 },
20942 outputs: []outputInfo{
20943 {0, 670826495},
20944 },
20945 },
20946 },
20947 {
20948 name: "XORshiftRL",
20949 auxType: auxInt64,
20950 argLen: 2,
20951 asm: arm64.AEOR,
20952 reg: regInfo{
20953 inputs: []inputInfo{
20954 {0, 805044223},
20955 {1, 805044223},
20956 },
20957 outputs: []outputInfo{
20958 {0, 670826495},
20959 },
20960 },
20961 },
20962 {
20963 name: "XORshiftRA",
20964 auxType: auxInt64,
20965 argLen: 2,
20966 asm: arm64.AEOR,
20967 reg: regInfo{
20968 inputs: []inputInfo{
20969 {0, 805044223},
20970 {1, 805044223},
20971 },
20972 outputs: []outputInfo{
20973 {0, 670826495},
20974 },
20975 },
20976 },
20977 {
20978 name: "XORshiftRO",
20979 auxType: auxInt64,
20980 argLen: 2,
20981 asm: arm64.AEOR,
20982 reg: regInfo{
20983 inputs: []inputInfo{
20984 {0, 805044223},
20985 {1, 805044223},
20986 },
20987 outputs: []outputInfo{
20988 {0, 670826495},
20989 },
20990 },
20991 },
20992 {
20993 name: "BICshiftLL",
20994 auxType: auxInt64,
20995 argLen: 2,
20996 asm: arm64.ABIC,
20997 reg: regInfo{
20998 inputs: []inputInfo{
20999 {0, 805044223},
21000 {1, 805044223},
21001 },
21002 outputs: []outputInfo{
21003 {0, 670826495},
21004 },
21005 },
21006 },
21007 {
21008 name: "BICshiftRL",
21009 auxType: auxInt64,
21010 argLen: 2,
21011 asm: arm64.ABIC,
21012 reg: regInfo{
21013 inputs: []inputInfo{
21014 {0, 805044223},
21015 {1, 805044223},
21016 },
21017 outputs: []outputInfo{
21018 {0, 670826495},
21019 },
21020 },
21021 },
21022 {
21023 name: "BICshiftRA",
21024 auxType: auxInt64,
21025 argLen: 2,
21026 asm: arm64.ABIC,
21027 reg: regInfo{
21028 inputs: []inputInfo{
21029 {0, 805044223},
21030 {1, 805044223},
21031 },
21032 outputs: []outputInfo{
21033 {0, 670826495},
21034 },
21035 },
21036 },
21037 {
21038 name: "BICshiftRO",
21039 auxType: auxInt64,
21040 argLen: 2,
21041 asm: arm64.ABIC,
21042 reg: regInfo{
21043 inputs: []inputInfo{
21044 {0, 805044223},
21045 {1, 805044223},
21046 },
21047 outputs: []outputInfo{
21048 {0, 670826495},
21049 },
21050 },
21051 },
21052 {
21053 name: "EONshiftLL",
21054 auxType: auxInt64,
21055 argLen: 2,
21056 asm: arm64.AEON,
21057 reg: regInfo{
21058 inputs: []inputInfo{
21059 {0, 805044223},
21060 {1, 805044223},
21061 },
21062 outputs: []outputInfo{
21063 {0, 670826495},
21064 },
21065 },
21066 },
21067 {
21068 name: "EONshiftRL",
21069 auxType: auxInt64,
21070 argLen: 2,
21071 asm: arm64.AEON,
21072 reg: regInfo{
21073 inputs: []inputInfo{
21074 {0, 805044223},
21075 {1, 805044223},
21076 },
21077 outputs: []outputInfo{
21078 {0, 670826495},
21079 },
21080 },
21081 },
21082 {
21083 name: "EONshiftRA",
21084 auxType: auxInt64,
21085 argLen: 2,
21086 asm: arm64.AEON,
21087 reg: regInfo{
21088 inputs: []inputInfo{
21089 {0, 805044223},
21090 {1, 805044223},
21091 },
21092 outputs: []outputInfo{
21093 {0, 670826495},
21094 },
21095 },
21096 },
21097 {
21098 name: "EONshiftRO",
21099 auxType: auxInt64,
21100 argLen: 2,
21101 asm: arm64.AEON,
21102 reg: regInfo{
21103 inputs: []inputInfo{
21104 {0, 805044223},
21105 {1, 805044223},
21106 },
21107 outputs: []outputInfo{
21108 {0, 670826495},
21109 },
21110 },
21111 },
21112 {
21113 name: "ORNshiftLL",
21114 auxType: auxInt64,
21115 argLen: 2,
21116 asm: arm64.AORN,
21117 reg: regInfo{
21118 inputs: []inputInfo{
21119 {0, 805044223},
21120 {1, 805044223},
21121 },
21122 outputs: []outputInfo{
21123 {0, 670826495},
21124 },
21125 },
21126 },
21127 {
21128 name: "ORNshiftRL",
21129 auxType: auxInt64,
21130 argLen: 2,
21131 asm: arm64.AORN,
21132 reg: regInfo{
21133 inputs: []inputInfo{
21134 {0, 805044223},
21135 {1, 805044223},
21136 },
21137 outputs: []outputInfo{
21138 {0, 670826495},
21139 },
21140 },
21141 },
21142 {
21143 name: "ORNshiftRA",
21144 auxType: auxInt64,
21145 argLen: 2,
21146 asm: arm64.AORN,
21147 reg: regInfo{
21148 inputs: []inputInfo{
21149 {0, 805044223},
21150 {1, 805044223},
21151 },
21152 outputs: []outputInfo{
21153 {0, 670826495},
21154 },
21155 },
21156 },
21157 {
21158 name: "ORNshiftRO",
21159 auxType: auxInt64,
21160 argLen: 2,
21161 asm: arm64.AORN,
21162 reg: regInfo{
21163 inputs: []inputInfo{
21164 {0, 805044223},
21165 {1, 805044223},
21166 },
21167 outputs: []outputInfo{
21168 {0, 670826495},
21169 },
21170 },
21171 },
21172 {
21173 name: "CMPshiftLL",
21174 auxType: auxInt64,
21175 argLen: 2,
21176 asm: arm64.ACMP,
21177 reg: regInfo{
21178 inputs: []inputInfo{
21179 {0, 805044223},
21180 {1, 805044223},
21181 },
21182 },
21183 },
21184 {
21185 name: "CMPshiftRL",
21186 auxType: auxInt64,
21187 argLen: 2,
21188 asm: arm64.ACMP,
21189 reg: regInfo{
21190 inputs: []inputInfo{
21191 {0, 805044223},
21192 {1, 805044223},
21193 },
21194 },
21195 },
21196 {
21197 name: "CMPshiftRA",
21198 auxType: auxInt64,
21199 argLen: 2,
21200 asm: arm64.ACMP,
21201 reg: regInfo{
21202 inputs: []inputInfo{
21203 {0, 805044223},
21204 {1, 805044223},
21205 },
21206 },
21207 },
21208 {
21209 name: "CMNshiftLL",
21210 auxType: auxInt64,
21211 argLen: 2,
21212 asm: arm64.ACMN,
21213 reg: regInfo{
21214 inputs: []inputInfo{
21215 {0, 805044223},
21216 {1, 805044223},
21217 },
21218 },
21219 },
21220 {
21221 name: "CMNshiftRL",
21222 auxType: auxInt64,
21223 argLen: 2,
21224 asm: arm64.ACMN,
21225 reg: regInfo{
21226 inputs: []inputInfo{
21227 {0, 805044223},
21228 {1, 805044223},
21229 },
21230 },
21231 },
21232 {
21233 name: "CMNshiftRA",
21234 auxType: auxInt64,
21235 argLen: 2,
21236 asm: arm64.ACMN,
21237 reg: regInfo{
21238 inputs: []inputInfo{
21239 {0, 805044223},
21240 {1, 805044223},
21241 },
21242 },
21243 },
21244 {
21245 name: "TSTshiftLL",
21246 auxType: auxInt64,
21247 argLen: 2,
21248 asm: arm64.ATST,
21249 reg: regInfo{
21250 inputs: []inputInfo{
21251 {0, 805044223},
21252 {1, 805044223},
21253 },
21254 },
21255 },
21256 {
21257 name: "TSTshiftRL",
21258 auxType: auxInt64,
21259 argLen: 2,
21260 asm: arm64.ATST,
21261 reg: regInfo{
21262 inputs: []inputInfo{
21263 {0, 805044223},
21264 {1, 805044223},
21265 },
21266 },
21267 },
21268 {
21269 name: "TSTshiftRA",
21270 auxType: auxInt64,
21271 argLen: 2,
21272 asm: arm64.ATST,
21273 reg: regInfo{
21274 inputs: []inputInfo{
21275 {0, 805044223},
21276 {1, 805044223},
21277 },
21278 },
21279 },
21280 {
21281 name: "TSTshiftRO",
21282 auxType: auxInt64,
21283 argLen: 2,
21284 asm: arm64.ATST,
21285 reg: regInfo{
21286 inputs: []inputInfo{
21287 {0, 805044223},
21288 {1, 805044223},
21289 },
21290 },
21291 },
21292 {
21293 name: "BFI",
21294 auxType: auxARM64BitField,
21295 argLen: 2,
21296 resultInArg0: true,
21297 asm: arm64.ABFI,
21298 reg: regInfo{
21299 inputs: []inputInfo{
21300 {0, 670826495},
21301 {1, 670826495},
21302 },
21303 outputs: []outputInfo{
21304 {0, 670826495},
21305 },
21306 },
21307 },
21308 {
21309 name: "BFXIL",
21310 auxType: auxARM64BitField,
21311 argLen: 2,
21312 resultInArg0: true,
21313 asm: arm64.ABFXIL,
21314 reg: regInfo{
21315 inputs: []inputInfo{
21316 {0, 670826495},
21317 {1, 670826495},
21318 },
21319 outputs: []outputInfo{
21320 {0, 670826495},
21321 },
21322 },
21323 },
21324 {
21325 name: "SBFIZ",
21326 auxType: auxARM64BitField,
21327 argLen: 1,
21328 asm: arm64.ASBFIZ,
21329 reg: regInfo{
21330 inputs: []inputInfo{
21331 {0, 805044223},
21332 },
21333 outputs: []outputInfo{
21334 {0, 670826495},
21335 },
21336 },
21337 },
21338 {
21339 name: "SBFX",
21340 auxType: auxARM64BitField,
21341 argLen: 1,
21342 asm: arm64.ASBFX,
21343 reg: regInfo{
21344 inputs: []inputInfo{
21345 {0, 805044223},
21346 },
21347 outputs: []outputInfo{
21348 {0, 670826495},
21349 },
21350 },
21351 },
21352 {
21353 name: "UBFIZ",
21354 auxType: auxARM64BitField,
21355 argLen: 1,
21356 asm: arm64.AUBFIZ,
21357 reg: regInfo{
21358 inputs: []inputInfo{
21359 {0, 805044223},
21360 },
21361 outputs: []outputInfo{
21362 {0, 670826495},
21363 },
21364 },
21365 },
21366 {
21367 name: "UBFX",
21368 auxType: auxARM64BitField,
21369 argLen: 1,
21370 asm: arm64.AUBFX,
21371 reg: regInfo{
21372 inputs: []inputInfo{
21373 {0, 805044223},
21374 },
21375 outputs: []outputInfo{
21376 {0, 670826495},
21377 },
21378 },
21379 },
21380 {
21381 name: "MOVDconst",
21382 auxType: auxInt64,
21383 argLen: 0,
21384 rematerializeable: true,
21385 asm: arm64.AMOVD,
21386 reg: regInfo{
21387 outputs: []outputInfo{
21388 {0, 670826495},
21389 },
21390 },
21391 },
21392 {
21393 name: "FMOVSconst",
21394 auxType: auxFloat64,
21395 argLen: 0,
21396 rematerializeable: true,
21397 asm: arm64.AFMOVS,
21398 reg: regInfo{
21399 outputs: []outputInfo{
21400 {0, 9223372034707292160},
21401 },
21402 },
21403 },
21404 {
21405 name: "FMOVDconst",
21406 auxType: auxFloat64,
21407 argLen: 0,
21408 rematerializeable: true,
21409 asm: arm64.AFMOVD,
21410 reg: regInfo{
21411 outputs: []outputInfo{
21412 {0, 9223372034707292160},
21413 },
21414 },
21415 },
21416 {
21417 name: "MOVDaddr",
21418 auxType: auxSymOff,
21419 argLen: 1,
21420 rematerializeable: true,
21421 symEffect: SymAddr,
21422 asm: arm64.AMOVD,
21423 reg: regInfo{
21424 inputs: []inputInfo{
21425 {0, 9223372037928517632},
21426 },
21427 outputs: []outputInfo{
21428 {0, 670826495},
21429 },
21430 },
21431 },
21432 {
21433 name: "MOVBload",
21434 auxType: auxSymOff,
21435 argLen: 2,
21436 faultOnNilArg0: true,
21437 symEffect: SymRead,
21438 asm: arm64.AMOVB,
21439 reg: regInfo{
21440 inputs: []inputInfo{
21441 {0, 9223372038733561855},
21442 },
21443 outputs: []outputInfo{
21444 {0, 670826495},
21445 },
21446 },
21447 },
21448 {
21449 name: "MOVBUload",
21450 auxType: auxSymOff,
21451 argLen: 2,
21452 faultOnNilArg0: true,
21453 symEffect: SymRead,
21454 asm: arm64.AMOVBU,
21455 reg: regInfo{
21456 inputs: []inputInfo{
21457 {0, 9223372038733561855},
21458 },
21459 outputs: []outputInfo{
21460 {0, 670826495},
21461 },
21462 },
21463 },
21464 {
21465 name: "MOVHload",
21466 auxType: auxSymOff,
21467 argLen: 2,
21468 faultOnNilArg0: true,
21469 symEffect: SymRead,
21470 asm: arm64.AMOVH,
21471 reg: regInfo{
21472 inputs: []inputInfo{
21473 {0, 9223372038733561855},
21474 },
21475 outputs: []outputInfo{
21476 {0, 670826495},
21477 },
21478 },
21479 },
21480 {
21481 name: "MOVHUload",
21482 auxType: auxSymOff,
21483 argLen: 2,
21484 faultOnNilArg0: true,
21485 symEffect: SymRead,
21486 asm: arm64.AMOVHU,
21487 reg: regInfo{
21488 inputs: []inputInfo{
21489 {0, 9223372038733561855},
21490 },
21491 outputs: []outputInfo{
21492 {0, 670826495},
21493 },
21494 },
21495 },
21496 {
21497 name: "MOVWload",
21498 auxType: auxSymOff,
21499 argLen: 2,
21500 faultOnNilArg0: true,
21501 symEffect: SymRead,
21502 asm: arm64.AMOVW,
21503 reg: regInfo{
21504 inputs: []inputInfo{
21505 {0, 9223372038733561855},
21506 },
21507 outputs: []outputInfo{
21508 {0, 670826495},
21509 },
21510 },
21511 },
21512 {
21513 name: "MOVWUload",
21514 auxType: auxSymOff,
21515 argLen: 2,
21516 faultOnNilArg0: true,
21517 symEffect: SymRead,
21518 asm: arm64.AMOVWU,
21519 reg: regInfo{
21520 inputs: []inputInfo{
21521 {0, 9223372038733561855},
21522 },
21523 outputs: []outputInfo{
21524 {0, 670826495},
21525 },
21526 },
21527 },
21528 {
21529 name: "MOVDload",
21530 auxType: auxSymOff,
21531 argLen: 2,
21532 faultOnNilArg0: true,
21533 symEffect: SymRead,
21534 asm: arm64.AMOVD,
21535 reg: regInfo{
21536 inputs: []inputInfo{
21537 {0, 9223372038733561855},
21538 },
21539 outputs: []outputInfo{
21540 {0, 670826495},
21541 },
21542 },
21543 },
21544 {
21545 name: "LDP",
21546 auxType: auxSymOff,
21547 argLen: 2,
21548 faultOnNilArg0: true,
21549 symEffect: SymRead,
21550 asm: arm64.ALDP,
21551 reg: regInfo{
21552 inputs: []inputInfo{
21553 {0, 9223372038733561855},
21554 },
21555 outputs: []outputInfo{
21556 {0, 805044223},
21557 {1, 805044223},
21558 },
21559 },
21560 },
21561 {
21562 name: "FMOVSload",
21563 auxType: auxSymOff,
21564 argLen: 2,
21565 faultOnNilArg0: true,
21566 symEffect: SymRead,
21567 asm: arm64.AFMOVS,
21568 reg: regInfo{
21569 inputs: []inputInfo{
21570 {0, 9223372038733561855},
21571 },
21572 outputs: []outputInfo{
21573 {0, 9223372034707292160},
21574 },
21575 },
21576 },
21577 {
21578 name: "FMOVDload",
21579 auxType: auxSymOff,
21580 argLen: 2,
21581 faultOnNilArg0: true,
21582 symEffect: SymRead,
21583 asm: arm64.AFMOVD,
21584 reg: regInfo{
21585 inputs: []inputInfo{
21586 {0, 9223372038733561855},
21587 },
21588 outputs: []outputInfo{
21589 {0, 9223372034707292160},
21590 },
21591 },
21592 },
21593 {
21594 name: "MOVDloadidx",
21595 argLen: 3,
21596 asm: arm64.AMOVD,
21597 reg: regInfo{
21598 inputs: []inputInfo{
21599 {1, 805044223},
21600 {0, 9223372038733561855},
21601 },
21602 outputs: []outputInfo{
21603 {0, 670826495},
21604 },
21605 },
21606 },
21607 {
21608 name: "MOVWloadidx",
21609 argLen: 3,
21610 asm: arm64.AMOVW,
21611 reg: regInfo{
21612 inputs: []inputInfo{
21613 {1, 805044223},
21614 {0, 9223372038733561855},
21615 },
21616 outputs: []outputInfo{
21617 {0, 670826495},
21618 },
21619 },
21620 },
21621 {
21622 name: "MOVWUloadidx",
21623 argLen: 3,
21624 asm: arm64.AMOVWU,
21625 reg: regInfo{
21626 inputs: []inputInfo{
21627 {1, 805044223},
21628 {0, 9223372038733561855},
21629 },
21630 outputs: []outputInfo{
21631 {0, 670826495},
21632 },
21633 },
21634 },
21635 {
21636 name: "MOVHloadidx",
21637 argLen: 3,
21638 asm: arm64.AMOVH,
21639 reg: regInfo{
21640 inputs: []inputInfo{
21641 {1, 805044223},
21642 {0, 9223372038733561855},
21643 },
21644 outputs: []outputInfo{
21645 {0, 670826495},
21646 },
21647 },
21648 },
21649 {
21650 name: "MOVHUloadidx",
21651 argLen: 3,
21652 asm: arm64.AMOVHU,
21653 reg: regInfo{
21654 inputs: []inputInfo{
21655 {1, 805044223},
21656 {0, 9223372038733561855},
21657 },
21658 outputs: []outputInfo{
21659 {0, 670826495},
21660 },
21661 },
21662 },
21663 {
21664 name: "MOVBloadidx",
21665 argLen: 3,
21666 asm: arm64.AMOVB,
21667 reg: regInfo{
21668 inputs: []inputInfo{
21669 {1, 805044223},
21670 {0, 9223372038733561855},
21671 },
21672 outputs: []outputInfo{
21673 {0, 670826495},
21674 },
21675 },
21676 },
21677 {
21678 name: "MOVBUloadidx",
21679 argLen: 3,
21680 asm: arm64.AMOVBU,
21681 reg: regInfo{
21682 inputs: []inputInfo{
21683 {1, 805044223},
21684 {0, 9223372038733561855},
21685 },
21686 outputs: []outputInfo{
21687 {0, 670826495},
21688 },
21689 },
21690 },
21691 {
21692 name: "FMOVSloadidx",
21693 argLen: 3,
21694 asm: arm64.AFMOVS,
21695 reg: regInfo{
21696 inputs: []inputInfo{
21697 {1, 805044223},
21698 {0, 9223372038733561855},
21699 },
21700 outputs: []outputInfo{
21701 {0, 9223372034707292160},
21702 },
21703 },
21704 },
21705 {
21706 name: "FMOVDloadidx",
21707 argLen: 3,
21708 asm: arm64.AFMOVD,
21709 reg: regInfo{
21710 inputs: []inputInfo{
21711 {1, 805044223},
21712 {0, 9223372038733561855},
21713 },
21714 outputs: []outputInfo{
21715 {0, 9223372034707292160},
21716 },
21717 },
21718 },
21719 {
21720 name: "MOVHloadidx2",
21721 argLen: 3,
21722 asm: arm64.AMOVH,
21723 reg: regInfo{
21724 inputs: []inputInfo{
21725 {1, 805044223},
21726 {0, 9223372038733561855},
21727 },
21728 outputs: []outputInfo{
21729 {0, 670826495},
21730 },
21731 },
21732 },
21733 {
21734 name: "MOVHUloadidx2",
21735 argLen: 3,
21736 asm: arm64.AMOVHU,
21737 reg: regInfo{
21738 inputs: []inputInfo{
21739 {1, 805044223},
21740 {0, 9223372038733561855},
21741 },
21742 outputs: []outputInfo{
21743 {0, 670826495},
21744 },
21745 },
21746 },
21747 {
21748 name: "MOVWloadidx4",
21749 argLen: 3,
21750 asm: arm64.AMOVW,
21751 reg: regInfo{
21752 inputs: []inputInfo{
21753 {1, 805044223},
21754 {0, 9223372038733561855},
21755 },
21756 outputs: []outputInfo{
21757 {0, 670826495},
21758 },
21759 },
21760 },
21761 {
21762 name: "MOVWUloadidx4",
21763 argLen: 3,
21764 asm: arm64.AMOVWU,
21765 reg: regInfo{
21766 inputs: []inputInfo{
21767 {1, 805044223},
21768 {0, 9223372038733561855},
21769 },
21770 outputs: []outputInfo{
21771 {0, 670826495},
21772 },
21773 },
21774 },
21775 {
21776 name: "MOVDloadidx8",
21777 argLen: 3,
21778 asm: arm64.AMOVD,
21779 reg: regInfo{
21780 inputs: []inputInfo{
21781 {1, 805044223},
21782 {0, 9223372038733561855},
21783 },
21784 outputs: []outputInfo{
21785 {0, 670826495},
21786 },
21787 },
21788 },
21789 {
21790 name: "FMOVSloadidx4",
21791 argLen: 3,
21792 asm: arm64.AFMOVS,
21793 reg: regInfo{
21794 inputs: []inputInfo{
21795 {1, 805044223},
21796 {0, 9223372038733561855},
21797 },
21798 outputs: []outputInfo{
21799 {0, 9223372034707292160},
21800 },
21801 },
21802 },
21803 {
21804 name: "FMOVDloadidx8",
21805 argLen: 3,
21806 asm: arm64.AFMOVD,
21807 reg: regInfo{
21808 inputs: []inputInfo{
21809 {1, 805044223},
21810 {0, 9223372038733561855},
21811 },
21812 outputs: []outputInfo{
21813 {0, 9223372034707292160},
21814 },
21815 },
21816 },
21817 {
21818 name: "MOVBstore",
21819 auxType: auxSymOff,
21820 argLen: 3,
21821 faultOnNilArg0: true,
21822 symEffect: SymWrite,
21823 asm: arm64.AMOVB,
21824 reg: regInfo{
21825 inputs: []inputInfo{
21826 {1, 805044223},
21827 {0, 9223372038733561855},
21828 },
21829 },
21830 },
21831 {
21832 name: "MOVHstore",
21833 auxType: auxSymOff,
21834 argLen: 3,
21835 faultOnNilArg0: true,
21836 symEffect: SymWrite,
21837 asm: arm64.AMOVH,
21838 reg: regInfo{
21839 inputs: []inputInfo{
21840 {1, 805044223},
21841 {0, 9223372038733561855},
21842 },
21843 },
21844 },
21845 {
21846 name: "MOVWstore",
21847 auxType: auxSymOff,
21848 argLen: 3,
21849 faultOnNilArg0: true,
21850 symEffect: SymWrite,
21851 asm: arm64.AMOVW,
21852 reg: regInfo{
21853 inputs: []inputInfo{
21854 {1, 805044223},
21855 {0, 9223372038733561855},
21856 },
21857 },
21858 },
21859 {
21860 name: "MOVDstore",
21861 auxType: auxSymOff,
21862 argLen: 3,
21863 faultOnNilArg0: true,
21864 symEffect: SymWrite,
21865 asm: arm64.AMOVD,
21866 reg: regInfo{
21867 inputs: []inputInfo{
21868 {1, 805044223},
21869 {0, 9223372038733561855},
21870 },
21871 },
21872 },
21873 {
21874 name: "STP",
21875 auxType: auxSymOff,
21876 argLen: 4,
21877 faultOnNilArg0: true,
21878 symEffect: SymWrite,
21879 asm: arm64.ASTP,
21880 reg: regInfo{
21881 inputs: []inputInfo{
21882 {1, 805044223},
21883 {2, 805044223},
21884 {0, 9223372038733561855},
21885 },
21886 },
21887 },
21888 {
21889 name: "FMOVSstore",
21890 auxType: auxSymOff,
21891 argLen: 3,
21892 faultOnNilArg0: true,
21893 symEffect: SymWrite,
21894 asm: arm64.AFMOVS,
21895 reg: regInfo{
21896 inputs: []inputInfo{
21897 {0, 9223372038733561855},
21898 {1, 9223372034707292160},
21899 },
21900 },
21901 },
21902 {
21903 name: "FMOVDstore",
21904 auxType: auxSymOff,
21905 argLen: 3,
21906 faultOnNilArg0: true,
21907 symEffect: SymWrite,
21908 asm: arm64.AFMOVD,
21909 reg: regInfo{
21910 inputs: []inputInfo{
21911 {0, 9223372038733561855},
21912 {1, 9223372034707292160},
21913 },
21914 },
21915 },
21916 {
21917 name: "MOVBstoreidx",
21918 argLen: 4,
21919 asm: arm64.AMOVB,
21920 reg: regInfo{
21921 inputs: []inputInfo{
21922 {1, 805044223},
21923 {2, 805044223},
21924 {0, 9223372038733561855},
21925 },
21926 },
21927 },
21928 {
21929 name: "MOVHstoreidx",
21930 argLen: 4,
21931 asm: arm64.AMOVH,
21932 reg: regInfo{
21933 inputs: []inputInfo{
21934 {1, 805044223},
21935 {2, 805044223},
21936 {0, 9223372038733561855},
21937 },
21938 },
21939 },
21940 {
21941 name: "MOVWstoreidx",
21942 argLen: 4,
21943 asm: arm64.AMOVW,
21944 reg: regInfo{
21945 inputs: []inputInfo{
21946 {1, 805044223},
21947 {2, 805044223},
21948 {0, 9223372038733561855},
21949 },
21950 },
21951 },
21952 {
21953 name: "MOVDstoreidx",
21954 argLen: 4,
21955 asm: arm64.AMOVD,
21956 reg: regInfo{
21957 inputs: []inputInfo{
21958 {1, 805044223},
21959 {2, 805044223},
21960 {0, 9223372038733561855},
21961 },
21962 },
21963 },
21964 {
21965 name: "FMOVSstoreidx",
21966 argLen: 4,
21967 asm: arm64.AFMOVS,
21968 reg: regInfo{
21969 inputs: []inputInfo{
21970 {1, 805044223},
21971 {0, 9223372038733561855},
21972 {2, 9223372034707292160},
21973 },
21974 },
21975 },
21976 {
21977 name: "FMOVDstoreidx",
21978 argLen: 4,
21979 asm: arm64.AFMOVD,
21980 reg: regInfo{
21981 inputs: []inputInfo{
21982 {1, 805044223},
21983 {0, 9223372038733561855},
21984 {2, 9223372034707292160},
21985 },
21986 },
21987 },
21988 {
21989 name: "MOVHstoreidx2",
21990 argLen: 4,
21991 asm: arm64.AMOVH,
21992 reg: regInfo{
21993 inputs: []inputInfo{
21994 {1, 805044223},
21995 {2, 805044223},
21996 {0, 9223372038733561855},
21997 },
21998 },
21999 },
22000 {
22001 name: "MOVWstoreidx4",
22002 argLen: 4,
22003 asm: arm64.AMOVW,
22004 reg: regInfo{
22005 inputs: []inputInfo{
22006 {1, 805044223},
22007 {2, 805044223},
22008 {0, 9223372038733561855},
22009 },
22010 },
22011 },
22012 {
22013 name: "MOVDstoreidx8",
22014 argLen: 4,
22015 asm: arm64.AMOVD,
22016 reg: regInfo{
22017 inputs: []inputInfo{
22018 {1, 805044223},
22019 {2, 805044223},
22020 {0, 9223372038733561855},
22021 },
22022 },
22023 },
22024 {
22025 name: "FMOVSstoreidx4",
22026 argLen: 4,
22027 asm: arm64.AFMOVS,
22028 reg: regInfo{
22029 inputs: []inputInfo{
22030 {1, 805044223},
22031 {0, 9223372038733561855},
22032 {2, 9223372034707292160},
22033 },
22034 },
22035 },
22036 {
22037 name: "FMOVDstoreidx8",
22038 argLen: 4,
22039 asm: arm64.AFMOVD,
22040 reg: regInfo{
22041 inputs: []inputInfo{
22042 {1, 805044223},
22043 {0, 9223372038733561855},
22044 {2, 9223372034707292160},
22045 },
22046 },
22047 },
22048 {
22049 name: "MOVBstorezero",
22050 auxType: auxSymOff,
22051 argLen: 2,
22052 faultOnNilArg0: true,
22053 symEffect: SymWrite,
22054 asm: arm64.AMOVB,
22055 reg: regInfo{
22056 inputs: []inputInfo{
22057 {0, 9223372038733561855},
22058 },
22059 },
22060 },
22061 {
22062 name: "MOVHstorezero",
22063 auxType: auxSymOff,
22064 argLen: 2,
22065 faultOnNilArg0: true,
22066 symEffect: SymWrite,
22067 asm: arm64.AMOVH,
22068 reg: regInfo{
22069 inputs: []inputInfo{
22070 {0, 9223372038733561855},
22071 },
22072 },
22073 },
22074 {
22075 name: "MOVWstorezero",
22076 auxType: auxSymOff,
22077 argLen: 2,
22078 faultOnNilArg0: true,
22079 symEffect: SymWrite,
22080 asm: arm64.AMOVW,
22081 reg: regInfo{
22082 inputs: []inputInfo{
22083 {0, 9223372038733561855},
22084 },
22085 },
22086 },
22087 {
22088 name: "MOVDstorezero",
22089 auxType: auxSymOff,
22090 argLen: 2,
22091 faultOnNilArg0: true,
22092 symEffect: SymWrite,
22093 asm: arm64.AMOVD,
22094 reg: regInfo{
22095 inputs: []inputInfo{
22096 {0, 9223372038733561855},
22097 },
22098 },
22099 },
22100 {
22101 name: "MOVQstorezero",
22102 auxType: auxSymOff,
22103 argLen: 2,
22104 faultOnNilArg0: true,
22105 symEffect: SymWrite,
22106 asm: arm64.ASTP,
22107 reg: regInfo{
22108 inputs: []inputInfo{
22109 {0, 9223372038733561855},
22110 },
22111 },
22112 },
22113 {
22114 name: "MOVBstorezeroidx",
22115 argLen: 3,
22116 asm: arm64.AMOVB,
22117 reg: regInfo{
22118 inputs: []inputInfo{
22119 {1, 805044223},
22120 {0, 9223372038733561855},
22121 },
22122 },
22123 },
22124 {
22125 name: "MOVHstorezeroidx",
22126 argLen: 3,
22127 asm: arm64.AMOVH,
22128 reg: regInfo{
22129 inputs: []inputInfo{
22130 {1, 805044223},
22131 {0, 9223372038733561855},
22132 },
22133 },
22134 },
22135 {
22136 name: "MOVWstorezeroidx",
22137 argLen: 3,
22138 asm: arm64.AMOVW,
22139 reg: regInfo{
22140 inputs: []inputInfo{
22141 {1, 805044223},
22142 {0, 9223372038733561855},
22143 },
22144 },
22145 },
22146 {
22147 name: "MOVDstorezeroidx",
22148 argLen: 3,
22149 asm: arm64.AMOVD,
22150 reg: regInfo{
22151 inputs: []inputInfo{
22152 {1, 805044223},
22153 {0, 9223372038733561855},
22154 },
22155 },
22156 },
22157 {
22158 name: "MOVHstorezeroidx2",
22159 argLen: 3,
22160 asm: arm64.AMOVH,
22161 reg: regInfo{
22162 inputs: []inputInfo{
22163 {1, 805044223},
22164 {0, 9223372038733561855},
22165 },
22166 },
22167 },
22168 {
22169 name: "MOVWstorezeroidx4",
22170 argLen: 3,
22171 asm: arm64.AMOVW,
22172 reg: regInfo{
22173 inputs: []inputInfo{
22174 {1, 805044223},
22175 {0, 9223372038733561855},
22176 },
22177 },
22178 },
22179 {
22180 name: "MOVDstorezeroidx8",
22181 argLen: 3,
22182 asm: arm64.AMOVD,
22183 reg: regInfo{
22184 inputs: []inputInfo{
22185 {1, 805044223},
22186 {0, 9223372038733561855},
22187 },
22188 },
22189 },
22190 {
22191 name: "FMOVDgpfp",
22192 argLen: 1,
22193 asm: arm64.AFMOVD,
22194 reg: regInfo{
22195 inputs: []inputInfo{
22196 {0, 670826495},
22197 },
22198 outputs: []outputInfo{
22199 {0, 9223372034707292160},
22200 },
22201 },
22202 },
22203 {
22204 name: "FMOVDfpgp",
22205 argLen: 1,
22206 asm: arm64.AFMOVD,
22207 reg: regInfo{
22208 inputs: []inputInfo{
22209 {0, 9223372034707292160},
22210 },
22211 outputs: []outputInfo{
22212 {0, 670826495},
22213 },
22214 },
22215 },
22216 {
22217 name: "FMOVSgpfp",
22218 argLen: 1,
22219 asm: arm64.AFMOVS,
22220 reg: regInfo{
22221 inputs: []inputInfo{
22222 {0, 670826495},
22223 },
22224 outputs: []outputInfo{
22225 {0, 9223372034707292160},
22226 },
22227 },
22228 },
22229 {
22230 name: "FMOVSfpgp",
22231 argLen: 1,
22232 asm: arm64.AFMOVS,
22233 reg: regInfo{
22234 inputs: []inputInfo{
22235 {0, 9223372034707292160},
22236 },
22237 outputs: []outputInfo{
22238 {0, 670826495},
22239 },
22240 },
22241 },
22242 {
22243 name: "MOVBreg",
22244 argLen: 1,
22245 asm: arm64.AMOVB,
22246 reg: regInfo{
22247 inputs: []inputInfo{
22248 {0, 805044223},
22249 },
22250 outputs: []outputInfo{
22251 {0, 670826495},
22252 },
22253 },
22254 },
22255 {
22256 name: "MOVBUreg",
22257 argLen: 1,
22258 asm: arm64.AMOVBU,
22259 reg: regInfo{
22260 inputs: []inputInfo{
22261 {0, 805044223},
22262 },
22263 outputs: []outputInfo{
22264 {0, 670826495},
22265 },
22266 },
22267 },
22268 {
22269 name: "MOVHreg",
22270 argLen: 1,
22271 asm: arm64.AMOVH,
22272 reg: regInfo{
22273 inputs: []inputInfo{
22274 {0, 805044223},
22275 },
22276 outputs: []outputInfo{
22277 {0, 670826495},
22278 },
22279 },
22280 },
22281 {
22282 name: "MOVHUreg",
22283 argLen: 1,
22284 asm: arm64.AMOVHU,
22285 reg: regInfo{
22286 inputs: []inputInfo{
22287 {0, 805044223},
22288 },
22289 outputs: []outputInfo{
22290 {0, 670826495},
22291 },
22292 },
22293 },
22294 {
22295 name: "MOVWreg",
22296 argLen: 1,
22297 asm: arm64.AMOVW,
22298 reg: regInfo{
22299 inputs: []inputInfo{
22300 {0, 805044223},
22301 },
22302 outputs: []outputInfo{
22303 {0, 670826495},
22304 },
22305 },
22306 },
22307 {
22308 name: "MOVWUreg",
22309 argLen: 1,
22310 asm: arm64.AMOVWU,
22311 reg: regInfo{
22312 inputs: []inputInfo{
22313 {0, 805044223},
22314 },
22315 outputs: []outputInfo{
22316 {0, 670826495},
22317 },
22318 },
22319 },
22320 {
22321 name: "MOVDreg",
22322 argLen: 1,
22323 asm: arm64.AMOVD,
22324 reg: regInfo{
22325 inputs: []inputInfo{
22326 {0, 805044223},
22327 },
22328 outputs: []outputInfo{
22329 {0, 670826495},
22330 },
22331 },
22332 },
22333 {
22334 name: "MOVDnop",
22335 argLen: 1,
22336 resultInArg0: true,
22337 reg: regInfo{
22338 inputs: []inputInfo{
22339 {0, 670826495},
22340 },
22341 outputs: []outputInfo{
22342 {0, 670826495},
22343 },
22344 },
22345 },
22346 {
22347 name: "SCVTFWS",
22348 argLen: 1,
22349 asm: arm64.ASCVTFWS,
22350 reg: regInfo{
22351 inputs: []inputInfo{
22352 {0, 670826495},
22353 },
22354 outputs: []outputInfo{
22355 {0, 9223372034707292160},
22356 },
22357 },
22358 },
22359 {
22360 name: "SCVTFWD",
22361 argLen: 1,
22362 asm: arm64.ASCVTFWD,
22363 reg: regInfo{
22364 inputs: []inputInfo{
22365 {0, 670826495},
22366 },
22367 outputs: []outputInfo{
22368 {0, 9223372034707292160},
22369 },
22370 },
22371 },
22372 {
22373 name: "UCVTFWS",
22374 argLen: 1,
22375 asm: arm64.AUCVTFWS,
22376 reg: regInfo{
22377 inputs: []inputInfo{
22378 {0, 670826495},
22379 },
22380 outputs: []outputInfo{
22381 {0, 9223372034707292160},
22382 },
22383 },
22384 },
22385 {
22386 name: "UCVTFWD",
22387 argLen: 1,
22388 asm: arm64.AUCVTFWD,
22389 reg: regInfo{
22390 inputs: []inputInfo{
22391 {0, 670826495},
22392 },
22393 outputs: []outputInfo{
22394 {0, 9223372034707292160},
22395 },
22396 },
22397 },
22398 {
22399 name: "SCVTFS",
22400 argLen: 1,
22401 asm: arm64.ASCVTFS,
22402 reg: regInfo{
22403 inputs: []inputInfo{
22404 {0, 670826495},
22405 },
22406 outputs: []outputInfo{
22407 {0, 9223372034707292160},
22408 },
22409 },
22410 },
22411 {
22412 name: "SCVTFD",
22413 argLen: 1,
22414 asm: arm64.ASCVTFD,
22415 reg: regInfo{
22416 inputs: []inputInfo{
22417 {0, 670826495},
22418 },
22419 outputs: []outputInfo{
22420 {0, 9223372034707292160},
22421 },
22422 },
22423 },
22424 {
22425 name: "UCVTFS",
22426 argLen: 1,
22427 asm: arm64.AUCVTFS,
22428 reg: regInfo{
22429 inputs: []inputInfo{
22430 {0, 670826495},
22431 },
22432 outputs: []outputInfo{
22433 {0, 9223372034707292160},
22434 },
22435 },
22436 },
22437 {
22438 name: "UCVTFD",
22439 argLen: 1,
22440 asm: arm64.AUCVTFD,
22441 reg: regInfo{
22442 inputs: []inputInfo{
22443 {0, 670826495},
22444 },
22445 outputs: []outputInfo{
22446 {0, 9223372034707292160},
22447 },
22448 },
22449 },
22450 {
22451 name: "FCVTZSSW",
22452 argLen: 1,
22453 asm: arm64.AFCVTZSSW,
22454 reg: regInfo{
22455 inputs: []inputInfo{
22456 {0, 9223372034707292160},
22457 },
22458 outputs: []outputInfo{
22459 {0, 670826495},
22460 },
22461 },
22462 },
22463 {
22464 name: "FCVTZSDW",
22465 argLen: 1,
22466 asm: arm64.AFCVTZSDW,
22467 reg: regInfo{
22468 inputs: []inputInfo{
22469 {0, 9223372034707292160},
22470 },
22471 outputs: []outputInfo{
22472 {0, 670826495},
22473 },
22474 },
22475 },
22476 {
22477 name: "FCVTZUSW",
22478 argLen: 1,
22479 asm: arm64.AFCVTZUSW,
22480 reg: regInfo{
22481 inputs: []inputInfo{
22482 {0, 9223372034707292160},
22483 },
22484 outputs: []outputInfo{
22485 {0, 670826495},
22486 },
22487 },
22488 },
22489 {
22490 name: "FCVTZUDW",
22491 argLen: 1,
22492 asm: arm64.AFCVTZUDW,
22493 reg: regInfo{
22494 inputs: []inputInfo{
22495 {0, 9223372034707292160},
22496 },
22497 outputs: []outputInfo{
22498 {0, 670826495},
22499 },
22500 },
22501 },
22502 {
22503 name: "FCVTZSS",
22504 argLen: 1,
22505 asm: arm64.AFCVTZSS,
22506 reg: regInfo{
22507 inputs: []inputInfo{
22508 {0, 9223372034707292160},
22509 },
22510 outputs: []outputInfo{
22511 {0, 670826495},
22512 },
22513 },
22514 },
22515 {
22516 name: "FCVTZSD",
22517 argLen: 1,
22518 asm: arm64.AFCVTZSD,
22519 reg: regInfo{
22520 inputs: []inputInfo{
22521 {0, 9223372034707292160},
22522 },
22523 outputs: []outputInfo{
22524 {0, 670826495},
22525 },
22526 },
22527 },
22528 {
22529 name: "FCVTZUS",
22530 argLen: 1,
22531 asm: arm64.AFCVTZUS,
22532 reg: regInfo{
22533 inputs: []inputInfo{
22534 {0, 9223372034707292160},
22535 },
22536 outputs: []outputInfo{
22537 {0, 670826495},
22538 },
22539 },
22540 },
22541 {
22542 name: "FCVTZUD",
22543 argLen: 1,
22544 asm: arm64.AFCVTZUD,
22545 reg: regInfo{
22546 inputs: []inputInfo{
22547 {0, 9223372034707292160},
22548 },
22549 outputs: []outputInfo{
22550 {0, 670826495},
22551 },
22552 },
22553 },
22554 {
22555 name: "FCVTSD",
22556 argLen: 1,
22557 asm: arm64.AFCVTSD,
22558 reg: regInfo{
22559 inputs: []inputInfo{
22560 {0, 9223372034707292160},
22561 },
22562 outputs: []outputInfo{
22563 {0, 9223372034707292160},
22564 },
22565 },
22566 },
22567 {
22568 name: "FCVTDS",
22569 argLen: 1,
22570 asm: arm64.AFCVTDS,
22571 reg: regInfo{
22572 inputs: []inputInfo{
22573 {0, 9223372034707292160},
22574 },
22575 outputs: []outputInfo{
22576 {0, 9223372034707292160},
22577 },
22578 },
22579 },
22580 {
22581 name: "FRINTAD",
22582 argLen: 1,
22583 asm: arm64.AFRINTAD,
22584 reg: regInfo{
22585 inputs: []inputInfo{
22586 {0, 9223372034707292160},
22587 },
22588 outputs: []outputInfo{
22589 {0, 9223372034707292160},
22590 },
22591 },
22592 },
22593 {
22594 name: "FRINTMD",
22595 argLen: 1,
22596 asm: arm64.AFRINTMD,
22597 reg: regInfo{
22598 inputs: []inputInfo{
22599 {0, 9223372034707292160},
22600 },
22601 outputs: []outputInfo{
22602 {0, 9223372034707292160},
22603 },
22604 },
22605 },
22606 {
22607 name: "FRINTND",
22608 argLen: 1,
22609 asm: arm64.AFRINTND,
22610 reg: regInfo{
22611 inputs: []inputInfo{
22612 {0, 9223372034707292160},
22613 },
22614 outputs: []outputInfo{
22615 {0, 9223372034707292160},
22616 },
22617 },
22618 },
22619 {
22620 name: "FRINTPD",
22621 argLen: 1,
22622 asm: arm64.AFRINTPD,
22623 reg: regInfo{
22624 inputs: []inputInfo{
22625 {0, 9223372034707292160},
22626 },
22627 outputs: []outputInfo{
22628 {0, 9223372034707292160},
22629 },
22630 },
22631 },
22632 {
22633 name: "FRINTZD",
22634 argLen: 1,
22635 asm: arm64.AFRINTZD,
22636 reg: regInfo{
22637 inputs: []inputInfo{
22638 {0, 9223372034707292160},
22639 },
22640 outputs: []outputInfo{
22641 {0, 9223372034707292160},
22642 },
22643 },
22644 },
22645 {
22646 name: "CSEL",
22647 auxType: auxCCop,
22648 argLen: 3,
22649 asm: arm64.ACSEL,
22650 reg: regInfo{
22651 inputs: []inputInfo{
22652 {0, 670826495},
22653 {1, 670826495},
22654 },
22655 outputs: []outputInfo{
22656 {0, 670826495},
22657 },
22658 },
22659 },
22660 {
22661 name: "CSEL0",
22662 auxType: auxCCop,
22663 argLen: 2,
22664 asm: arm64.ACSEL,
22665 reg: regInfo{
22666 inputs: []inputInfo{
22667 {0, 805044223},
22668 },
22669 outputs: []outputInfo{
22670 {0, 670826495},
22671 },
22672 },
22673 },
22674 {
22675 name: "CSINC",
22676 auxType: auxCCop,
22677 argLen: 3,
22678 asm: arm64.ACSINC,
22679 reg: regInfo{
22680 inputs: []inputInfo{
22681 {0, 670826495},
22682 {1, 670826495},
22683 },
22684 outputs: []outputInfo{
22685 {0, 670826495},
22686 },
22687 },
22688 },
22689 {
22690 name: "CSINV",
22691 auxType: auxCCop,
22692 argLen: 3,
22693 asm: arm64.ACSINV,
22694 reg: regInfo{
22695 inputs: []inputInfo{
22696 {0, 670826495},
22697 {1, 670826495},
22698 },
22699 outputs: []outputInfo{
22700 {0, 670826495},
22701 },
22702 },
22703 },
22704 {
22705 name: "CSNEG",
22706 auxType: auxCCop,
22707 argLen: 3,
22708 asm: arm64.ACSNEG,
22709 reg: regInfo{
22710 inputs: []inputInfo{
22711 {0, 670826495},
22712 {1, 670826495},
22713 },
22714 outputs: []outputInfo{
22715 {0, 670826495},
22716 },
22717 },
22718 },
22719 {
22720 name: "CSETM",
22721 auxType: auxCCop,
22722 argLen: 1,
22723 asm: arm64.ACSETM,
22724 reg: regInfo{
22725 outputs: []outputInfo{
22726 {0, 670826495},
22727 },
22728 },
22729 },
22730 {
22731 name: "CALLstatic",
22732 auxType: auxCallOff,
22733 argLen: -1,
22734 clobberFlags: true,
22735 call: true,
22736 reg: regInfo{
22737 clobbers: 9223372035512336383,
22738 },
22739 },
22740 {
22741 name: "CALLtail",
22742 auxType: auxCallOff,
22743 argLen: -1,
22744 clobberFlags: true,
22745 call: true,
22746 tailCall: true,
22747 reg: regInfo{
22748 clobbers: 9223372035512336383,
22749 },
22750 },
22751 {
22752 name: "CALLclosure",
22753 auxType: auxCallOff,
22754 argLen: -1,
22755 clobberFlags: true,
22756 call: true,
22757 reg: regInfo{
22758 inputs: []inputInfo{
22759 {1, 67108864},
22760 {0, 1744568319},
22761 },
22762 clobbers: 9223372035512336383,
22763 },
22764 },
22765 {
22766 name: "CALLinter",
22767 auxType: auxCallOff,
22768 argLen: -1,
22769 clobberFlags: true,
22770 call: true,
22771 reg: regInfo{
22772 inputs: []inputInfo{
22773 {0, 670826495},
22774 },
22775 clobbers: 9223372035512336383,
22776 },
22777 },
22778 {
22779 name: "LoweredNilCheck",
22780 argLen: 2,
22781 nilCheck: true,
22782 faultOnNilArg0: true,
22783 reg: regInfo{
22784 inputs: []inputInfo{
22785 {0, 805044223},
22786 },
22787 },
22788 },
22789 {
22790 name: "Equal",
22791 argLen: 1,
22792 reg: regInfo{
22793 outputs: []outputInfo{
22794 {0, 670826495},
22795 },
22796 },
22797 },
22798 {
22799 name: "NotEqual",
22800 argLen: 1,
22801 reg: regInfo{
22802 outputs: []outputInfo{
22803 {0, 670826495},
22804 },
22805 },
22806 },
22807 {
22808 name: "LessThan",
22809 argLen: 1,
22810 reg: regInfo{
22811 outputs: []outputInfo{
22812 {0, 670826495},
22813 },
22814 },
22815 },
22816 {
22817 name: "LessEqual",
22818 argLen: 1,
22819 reg: regInfo{
22820 outputs: []outputInfo{
22821 {0, 670826495},
22822 },
22823 },
22824 },
22825 {
22826 name: "GreaterThan",
22827 argLen: 1,
22828 reg: regInfo{
22829 outputs: []outputInfo{
22830 {0, 670826495},
22831 },
22832 },
22833 },
22834 {
22835 name: "GreaterEqual",
22836 argLen: 1,
22837 reg: regInfo{
22838 outputs: []outputInfo{
22839 {0, 670826495},
22840 },
22841 },
22842 },
22843 {
22844 name: "LessThanU",
22845 argLen: 1,
22846 reg: regInfo{
22847 outputs: []outputInfo{
22848 {0, 670826495},
22849 },
22850 },
22851 },
22852 {
22853 name: "LessEqualU",
22854 argLen: 1,
22855 reg: regInfo{
22856 outputs: []outputInfo{
22857 {0, 670826495},
22858 },
22859 },
22860 },
22861 {
22862 name: "GreaterThanU",
22863 argLen: 1,
22864 reg: regInfo{
22865 outputs: []outputInfo{
22866 {0, 670826495},
22867 },
22868 },
22869 },
22870 {
22871 name: "GreaterEqualU",
22872 argLen: 1,
22873 reg: regInfo{
22874 outputs: []outputInfo{
22875 {0, 670826495},
22876 },
22877 },
22878 },
22879 {
22880 name: "LessThanF",
22881 argLen: 1,
22882 reg: regInfo{
22883 outputs: []outputInfo{
22884 {0, 670826495},
22885 },
22886 },
22887 },
22888 {
22889 name: "LessEqualF",
22890 argLen: 1,
22891 reg: regInfo{
22892 outputs: []outputInfo{
22893 {0, 670826495},
22894 },
22895 },
22896 },
22897 {
22898 name: "GreaterThanF",
22899 argLen: 1,
22900 reg: regInfo{
22901 outputs: []outputInfo{
22902 {0, 670826495},
22903 },
22904 },
22905 },
22906 {
22907 name: "GreaterEqualF",
22908 argLen: 1,
22909 reg: regInfo{
22910 outputs: []outputInfo{
22911 {0, 670826495},
22912 },
22913 },
22914 },
22915 {
22916 name: "NotLessThanF",
22917 argLen: 1,
22918 reg: regInfo{
22919 outputs: []outputInfo{
22920 {0, 670826495},
22921 },
22922 },
22923 },
22924 {
22925 name: "NotLessEqualF",
22926 argLen: 1,
22927 reg: regInfo{
22928 outputs: []outputInfo{
22929 {0, 670826495},
22930 },
22931 },
22932 },
22933 {
22934 name: "NotGreaterThanF",
22935 argLen: 1,
22936 reg: regInfo{
22937 outputs: []outputInfo{
22938 {0, 670826495},
22939 },
22940 },
22941 },
22942 {
22943 name: "NotGreaterEqualF",
22944 argLen: 1,
22945 reg: regInfo{
22946 outputs: []outputInfo{
22947 {0, 670826495},
22948 },
22949 },
22950 },
22951 {
22952 name: "LessThanNoov",
22953 argLen: 1,
22954 reg: regInfo{
22955 outputs: []outputInfo{
22956 {0, 670826495},
22957 },
22958 },
22959 },
22960 {
22961 name: "GreaterEqualNoov",
22962 argLen: 1,
22963 reg: regInfo{
22964 outputs: []outputInfo{
22965 {0, 670826495},
22966 },
22967 },
22968 },
22969 {
22970 name: "DUFFZERO",
22971 auxType: auxInt64,
22972 argLen: 2,
22973 unsafePoint: true,
22974 reg: regInfo{
22975 inputs: []inputInfo{
22976 {0, 1048576},
22977 },
22978 clobbers: 538116096,
22979 },
22980 },
22981 {
22982 name: "LoweredZero",
22983 argLen: 3,
22984 clobberFlags: true,
22985 faultOnNilArg0: true,
22986 reg: regInfo{
22987 inputs: []inputInfo{
22988 {0, 65536},
22989 {1, 670826495},
22990 },
22991 clobbers: 65536,
22992 },
22993 },
22994 {
22995 name: "DUFFCOPY",
22996 auxType: auxInt64,
22997 argLen: 3,
22998 unsafePoint: true,
22999 reg: regInfo{
23000 inputs: []inputInfo{
23001 {0, 2097152},
23002 {1, 1048576},
23003 },
23004 clobbers: 607322112,
23005 },
23006 },
23007 {
23008 name: "LoweredMove",
23009 argLen: 4,
23010 clobberFlags: true,
23011 faultOnNilArg0: true,
23012 faultOnNilArg1: true,
23013 reg: regInfo{
23014 inputs: []inputInfo{
23015 {0, 131072},
23016 {1, 65536},
23017 {2, 637272063},
23018 },
23019 clobbers: 33751040,
23020 },
23021 },
23022 {
23023 name: "LoweredGetClosurePtr",
23024 argLen: 0,
23025 zeroWidth: true,
23026 reg: regInfo{
23027 outputs: []outputInfo{
23028 {0, 67108864},
23029 },
23030 },
23031 },
23032 {
23033 name: "LoweredGetCallerSP",
23034 argLen: 1,
23035 rematerializeable: true,
23036 reg: regInfo{
23037 outputs: []outputInfo{
23038 {0, 670826495},
23039 },
23040 },
23041 },
23042 {
23043 name: "LoweredGetCallerPC",
23044 argLen: 0,
23045 rematerializeable: true,
23046 reg: regInfo{
23047 outputs: []outputInfo{
23048 {0, 670826495},
23049 },
23050 },
23051 },
23052 {
23053 name: "FlagConstant",
23054 auxType: auxFlagConstant,
23055 argLen: 0,
23056 reg: regInfo{},
23057 },
23058 {
23059 name: "InvertFlags",
23060 argLen: 1,
23061 reg: regInfo{},
23062 },
23063 {
23064 name: "LDAR",
23065 argLen: 2,
23066 faultOnNilArg0: true,
23067 asm: arm64.ALDAR,
23068 reg: regInfo{
23069 inputs: []inputInfo{
23070 {0, 9223372038733561855},
23071 },
23072 outputs: []outputInfo{
23073 {0, 670826495},
23074 },
23075 },
23076 },
23077 {
23078 name: "LDARB",
23079 argLen: 2,
23080 faultOnNilArg0: true,
23081 asm: arm64.ALDARB,
23082 reg: regInfo{
23083 inputs: []inputInfo{
23084 {0, 9223372038733561855},
23085 },
23086 outputs: []outputInfo{
23087 {0, 670826495},
23088 },
23089 },
23090 },
23091 {
23092 name: "LDARW",
23093 argLen: 2,
23094 faultOnNilArg0: true,
23095 asm: arm64.ALDARW,
23096 reg: regInfo{
23097 inputs: []inputInfo{
23098 {0, 9223372038733561855},
23099 },
23100 outputs: []outputInfo{
23101 {0, 670826495},
23102 },
23103 },
23104 },
23105 {
23106 name: "STLRB",
23107 argLen: 3,
23108 faultOnNilArg0: true,
23109 hasSideEffects: true,
23110 asm: arm64.ASTLRB,
23111 reg: regInfo{
23112 inputs: []inputInfo{
23113 {1, 805044223},
23114 {0, 9223372038733561855},
23115 },
23116 },
23117 },
23118 {
23119 name: "STLR",
23120 argLen: 3,
23121 faultOnNilArg0: true,
23122 hasSideEffects: true,
23123 asm: arm64.ASTLR,
23124 reg: regInfo{
23125 inputs: []inputInfo{
23126 {1, 805044223},
23127 {0, 9223372038733561855},
23128 },
23129 },
23130 },
23131 {
23132 name: "STLRW",
23133 argLen: 3,
23134 faultOnNilArg0: true,
23135 hasSideEffects: true,
23136 asm: arm64.ASTLRW,
23137 reg: regInfo{
23138 inputs: []inputInfo{
23139 {1, 805044223},
23140 {0, 9223372038733561855},
23141 },
23142 },
23143 },
23144 {
23145 name: "LoweredAtomicExchange64",
23146 argLen: 3,
23147 resultNotInArgs: true,
23148 faultOnNilArg0: true,
23149 hasSideEffects: true,
23150 unsafePoint: true,
23151 reg: regInfo{
23152 inputs: []inputInfo{
23153 {1, 805044223},
23154 {0, 9223372038733561855},
23155 },
23156 outputs: []outputInfo{
23157 {0, 670826495},
23158 },
23159 },
23160 },
23161 {
23162 name: "LoweredAtomicExchange32",
23163 argLen: 3,
23164 resultNotInArgs: true,
23165 faultOnNilArg0: true,
23166 hasSideEffects: true,
23167 unsafePoint: true,
23168 reg: regInfo{
23169 inputs: []inputInfo{
23170 {1, 805044223},
23171 {0, 9223372038733561855},
23172 },
23173 outputs: []outputInfo{
23174 {0, 670826495},
23175 },
23176 },
23177 },
23178 {
23179 name: "LoweredAtomicExchange8",
23180 argLen: 3,
23181 resultNotInArgs: true,
23182 faultOnNilArg0: true,
23183 hasSideEffects: true,
23184 unsafePoint: true,
23185 reg: regInfo{
23186 inputs: []inputInfo{
23187 {1, 805044223},
23188 {0, 9223372038733561855},
23189 },
23190 outputs: []outputInfo{
23191 {0, 670826495},
23192 },
23193 },
23194 },
23195 {
23196 name: "LoweredAtomicExchange64Variant",
23197 argLen: 3,
23198 resultNotInArgs: true,
23199 faultOnNilArg0: true,
23200 hasSideEffects: true,
23201 reg: regInfo{
23202 inputs: []inputInfo{
23203 {1, 805044223},
23204 {0, 9223372038733561855},
23205 },
23206 outputs: []outputInfo{
23207 {0, 670826495},
23208 },
23209 },
23210 },
23211 {
23212 name: "LoweredAtomicExchange32Variant",
23213 argLen: 3,
23214 resultNotInArgs: true,
23215 faultOnNilArg0: true,
23216 hasSideEffects: true,
23217 reg: regInfo{
23218 inputs: []inputInfo{
23219 {1, 805044223},
23220 {0, 9223372038733561855},
23221 },
23222 outputs: []outputInfo{
23223 {0, 670826495},
23224 },
23225 },
23226 },
23227 {
23228 name: "LoweredAtomicExchange8Variant",
23229 argLen: 3,
23230 resultNotInArgs: true,
23231 faultOnNilArg0: true,
23232 hasSideEffects: true,
23233 unsafePoint: true,
23234 reg: regInfo{
23235 inputs: []inputInfo{
23236 {1, 805044223},
23237 {0, 9223372038733561855},
23238 },
23239 outputs: []outputInfo{
23240 {0, 670826495},
23241 },
23242 },
23243 },
23244 {
23245 name: "LoweredAtomicAdd64",
23246 argLen: 3,
23247 resultNotInArgs: true,
23248 faultOnNilArg0: true,
23249 hasSideEffects: true,
23250 unsafePoint: true,
23251 reg: regInfo{
23252 inputs: []inputInfo{
23253 {1, 805044223},
23254 {0, 9223372038733561855},
23255 },
23256 outputs: []outputInfo{
23257 {0, 670826495},
23258 },
23259 },
23260 },
23261 {
23262 name: "LoweredAtomicAdd32",
23263 argLen: 3,
23264 resultNotInArgs: true,
23265 faultOnNilArg0: true,
23266 hasSideEffects: true,
23267 unsafePoint: true,
23268 reg: regInfo{
23269 inputs: []inputInfo{
23270 {1, 805044223},
23271 {0, 9223372038733561855},
23272 },
23273 outputs: []outputInfo{
23274 {0, 670826495},
23275 },
23276 },
23277 },
23278 {
23279 name: "LoweredAtomicAdd64Variant",
23280 argLen: 3,
23281 resultNotInArgs: true,
23282 faultOnNilArg0: true,
23283 hasSideEffects: true,
23284 reg: regInfo{
23285 inputs: []inputInfo{
23286 {1, 805044223},
23287 {0, 9223372038733561855},
23288 },
23289 outputs: []outputInfo{
23290 {0, 670826495},
23291 },
23292 },
23293 },
23294 {
23295 name: "LoweredAtomicAdd32Variant",
23296 argLen: 3,
23297 resultNotInArgs: true,
23298 faultOnNilArg0: true,
23299 hasSideEffects: true,
23300 reg: regInfo{
23301 inputs: []inputInfo{
23302 {1, 805044223},
23303 {0, 9223372038733561855},
23304 },
23305 outputs: []outputInfo{
23306 {0, 670826495},
23307 },
23308 },
23309 },
23310 {
23311 name: "LoweredAtomicCas64",
23312 argLen: 4,
23313 resultNotInArgs: true,
23314 clobberFlags: true,
23315 faultOnNilArg0: true,
23316 hasSideEffects: true,
23317 unsafePoint: true,
23318 reg: regInfo{
23319 inputs: []inputInfo{
23320 {1, 805044223},
23321 {2, 805044223},
23322 {0, 9223372038733561855},
23323 },
23324 outputs: []outputInfo{
23325 {0, 670826495},
23326 },
23327 },
23328 },
23329 {
23330 name: "LoweredAtomicCas32",
23331 argLen: 4,
23332 resultNotInArgs: true,
23333 clobberFlags: true,
23334 faultOnNilArg0: true,
23335 hasSideEffects: true,
23336 unsafePoint: true,
23337 reg: regInfo{
23338 inputs: []inputInfo{
23339 {1, 805044223},
23340 {2, 805044223},
23341 {0, 9223372038733561855},
23342 },
23343 outputs: []outputInfo{
23344 {0, 670826495},
23345 },
23346 },
23347 },
23348 {
23349 name: "LoweredAtomicCas64Variant",
23350 argLen: 4,
23351 resultNotInArgs: true,
23352 clobberFlags: true,
23353 faultOnNilArg0: true,
23354 hasSideEffects: true,
23355 unsafePoint: true,
23356 reg: regInfo{
23357 inputs: []inputInfo{
23358 {1, 805044223},
23359 {2, 805044223},
23360 {0, 9223372038733561855},
23361 },
23362 outputs: []outputInfo{
23363 {0, 670826495},
23364 },
23365 },
23366 },
23367 {
23368 name: "LoweredAtomicCas32Variant",
23369 argLen: 4,
23370 resultNotInArgs: true,
23371 clobberFlags: true,
23372 faultOnNilArg0: true,
23373 hasSideEffects: true,
23374 unsafePoint: true,
23375 reg: regInfo{
23376 inputs: []inputInfo{
23377 {1, 805044223},
23378 {2, 805044223},
23379 {0, 9223372038733561855},
23380 },
23381 outputs: []outputInfo{
23382 {0, 670826495},
23383 },
23384 },
23385 },
23386 {
23387 name: "LoweredAtomicAnd8",
23388 argLen: 3,
23389 resultNotInArgs: true,
23390 needIntTemp: true,
23391 faultOnNilArg0: true,
23392 hasSideEffects: true,
23393 unsafePoint: true,
23394 asm: arm64.AAND,
23395 reg: regInfo{
23396 inputs: []inputInfo{
23397 {1, 805044223},
23398 {0, 9223372038733561855},
23399 },
23400 outputs: []outputInfo{
23401 {0, 670826495},
23402 },
23403 },
23404 },
23405 {
23406 name: "LoweredAtomicOr8",
23407 argLen: 3,
23408 resultNotInArgs: true,
23409 needIntTemp: true,
23410 faultOnNilArg0: true,
23411 hasSideEffects: true,
23412 unsafePoint: true,
23413 asm: arm64.AORR,
23414 reg: regInfo{
23415 inputs: []inputInfo{
23416 {1, 805044223},
23417 {0, 9223372038733561855},
23418 },
23419 outputs: []outputInfo{
23420 {0, 670826495},
23421 },
23422 },
23423 },
23424 {
23425 name: "LoweredAtomicAnd64",
23426 argLen: 3,
23427 resultNotInArgs: true,
23428 needIntTemp: true,
23429 faultOnNilArg0: true,
23430 hasSideEffects: true,
23431 unsafePoint: true,
23432 asm: arm64.AAND,
23433 reg: regInfo{
23434 inputs: []inputInfo{
23435 {1, 805044223},
23436 {0, 9223372038733561855},
23437 },
23438 outputs: []outputInfo{
23439 {0, 670826495},
23440 },
23441 },
23442 },
23443 {
23444 name: "LoweredAtomicOr64",
23445 argLen: 3,
23446 resultNotInArgs: true,
23447 needIntTemp: true,
23448 faultOnNilArg0: true,
23449 hasSideEffects: true,
23450 unsafePoint: true,
23451 asm: arm64.AORR,
23452 reg: regInfo{
23453 inputs: []inputInfo{
23454 {1, 805044223},
23455 {0, 9223372038733561855},
23456 },
23457 outputs: []outputInfo{
23458 {0, 670826495},
23459 },
23460 },
23461 },
23462 {
23463 name: "LoweredAtomicAnd32",
23464 argLen: 3,
23465 resultNotInArgs: true,
23466 needIntTemp: true,
23467 faultOnNilArg0: true,
23468 hasSideEffects: true,
23469 unsafePoint: true,
23470 asm: arm64.AAND,
23471 reg: regInfo{
23472 inputs: []inputInfo{
23473 {1, 805044223},
23474 {0, 9223372038733561855},
23475 },
23476 outputs: []outputInfo{
23477 {0, 670826495},
23478 },
23479 },
23480 },
23481 {
23482 name: "LoweredAtomicOr32",
23483 argLen: 3,
23484 resultNotInArgs: true,
23485 needIntTemp: true,
23486 faultOnNilArg0: true,
23487 hasSideEffects: true,
23488 unsafePoint: true,
23489 asm: arm64.AORR,
23490 reg: regInfo{
23491 inputs: []inputInfo{
23492 {1, 805044223},
23493 {0, 9223372038733561855},
23494 },
23495 outputs: []outputInfo{
23496 {0, 670826495},
23497 },
23498 },
23499 },
23500 {
23501 name: "LoweredAtomicAnd8Variant",
23502 argLen: 3,
23503 resultNotInArgs: true,
23504 faultOnNilArg0: true,
23505 hasSideEffects: true,
23506 unsafePoint: true,
23507 reg: regInfo{
23508 inputs: []inputInfo{
23509 {1, 805044223},
23510 {0, 9223372038733561855},
23511 },
23512 outputs: []outputInfo{
23513 {0, 670826495},
23514 },
23515 },
23516 },
23517 {
23518 name: "LoweredAtomicOr8Variant",
23519 argLen: 3,
23520 resultNotInArgs: true,
23521 faultOnNilArg0: true,
23522 hasSideEffects: true,
23523 reg: regInfo{
23524 inputs: []inputInfo{
23525 {1, 805044223},
23526 {0, 9223372038733561855},
23527 },
23528 outputs: []outputInfo{
23529 {0, 670826495},
23530 },
23531 },
23532 },
23533 {
23534 name: "LoweredAtomicAnd64Variant",
23535 argLen: 3,
23536 resultNotInArgs: true,
23537 faultOnNilArg0: true,
23538 hasSideEffects: true,
23539 unsafePoint: true,
23540 reg: regInfo{
23541 inputs: []inputInfo{
23542 {1, 805044223},
23543 {0, 9223372038733561855},
23544 },
23545 outputs: []outputInfo{
23546 {0, 670826495},
23547 },
23548 },
23549 },
23550 {
23551 name: "LoweredAtomicOr64Variant",
23552 argLen: 3,
23553 resultNotInArgs: true,
23554 faultOnNilArg0: true,
23555 hasSideEffects: true,
23556 reg: regInfo{
23557 inputs: []inputInfo{
23558 {1, 805044223},
23559 {0, 9223372038733561855},
23560 },
23561 outputs: []outputInfo{
23562 {0, 670826495},
23563 },
23564 },
23565 },
23566 {
23567 name: "LoweredAtomicAnd32Variant",
23568 argLen: 3,
23569 resultNotInArgs: true,
23570 faultOnNilArg0: true,
23571 hasSideEffects: true,
23572 unsafePoint: true,
23573 reg: regInfo{
23574 inputs: []inputInfo{
23575 {1, 805044223},
23576 {0, 9223372038733561855},
23577 },
23578 outputs: []outputInfo{
23579 {0, 670826495},
23580 },
23581 },
23582 },
23583 {
23584 name: "LoweredAtomicOr32Variant",
23585 argLen: 3,
23586 resultNotInArgs: true,
23587 faultOnNilArg0: true,
23588 hasSideEffects: true,
23589 reg: regInfo{
23590 inputs: []inputInfo{
23591 {1, 805044223},
23592 {0, 9223372038733561855},
23593 },
23594 outputs: []outputInfo{
23595 {0, 670826495},
23596 },
23597 },
23598 },
23599 {
23600 name: "LoweredWB",
23601 auxType: auxInt64,
23602 argLen: 1,
23603 clobberFlags: true,
23604 reg: regInfo{
23605 clobbers: 9223372035244359680,
23606 outputs: []outputInfo{
23607 {0, 33554432},
23608 },
23609 },
23610 },
23611 {
23612 name: "LoweredPanicBoundsA",
23613 auxType: auxInt64,
23614 argLen: 3,
23615 call: true,
23616 reg: regInfo{
23617 inputs: []inputInfo{
23618 {0, 4},
23619 {1, 8},
23620 },
23621 },
23622 },
23623 {
23624 name: "LoweredPanicBoundsB",
23625 auxType: auxInt64,
23626 argLen: 3,
23627 call: true,
23628 reg: regInfo{
23629 inputs: []inputInfo{
23630 {0, 2},
23631 {1, 4},
23632 },
23633 },
23634 },
23635 {
23636 name: "LoweredPanicBoundsC",
23637 auxType: auxInt64,
23638 argLen: 3,
23639 call: true,
23640 reg: regInfo{
23641 inputs: []inputInfo{
23642 {0, 1},
23643 {1, 2},
23644 },
23645 },
23646 },
23647 {
23648 name: "PRFM",
23649 auxType: auxInt64,
23650 argLen: 2,
23651 hasSideEffects: true,
23652 asm: arm64.APRFM,
23653 reg: regInfo{
23654 inputs: []inputInfo{
23655 {0, 9223372038733561855},
23656 },
23657 },
23658 },
23659 {
23660 name: "DMB",
23661 auxType: auxInt64,
23662 argLen: 1,
23663 hasSideEffects: true,
23664 asm: arm64.ADMB,
23665 reg: regInfo{},
23666 },
23667
23668 {
23669 name: "NEGV",
23670 argLen: 1,
23671 reg: regInfo{
23672 inputs: []inputInfo{
23673 {0, 1073741816},
23674 },
23675 outputs: []outputInfo{
23676 {0, 1071644664},
23677 },
23678 },
23679 },
23680 {
23681 name: "NEGF",
23682 argLen: 1,
23683 asm: loong64.ANEGF,
23684 reg: regInfo{
23685 inputs: []inputInfo{
23686 {0, 4611686017353646080},
23687 },
23688 outputs: []outputInfo{
23689 {0, 4611686017353646080},
23690 },
23691 },
23692 },
23693 {
23694 name: "NEGD",
23695 argLen: 1,
23696 asm: loong64.ANEGD,
23697 reg: regInfo{
23698 inputs: []inputInfo{
23699 {0, 4611686017353646080},
23700 },
23701 outputs: []outputInfo{
23702 {0, 4611686017353646080},
23703 },
23704 },
23705 },
23706 {
23707 name: "SQRTD",
23708 argLen: 1,
23709 asm: loong64.ASQRTD,
23710 reg: regInfo{
23711 inputs: []inputInfo{
23712 {0, 4611686017353646080},
23713 },
23714 outputs: []outputInfo{
23715 {0, 4611686017353646080},
23716 },
23717 },
23718 },
23719 {
23720 name: "SQRTF",
23721 argLen: 1,
23722 asm: loong64.ASQRTF,
23723 reg: regInfo{
23724 inputs: []inputInfo{
23725 {0, 4611686017353646080},
23726 },
23727 outputs: []outputInfo{
23728 {0, 4611686017353646080},
23729 },
23730 },
23731 },
23732 {
23733 name: "ABSD",
23734 argLen: 1,
23735 asm: loong64.AABSD,
23736 reg: regInfo{
23737 inputs: []inputInfo{
23738 {0, 4611686017353646080},
23739 },
23740 outputs: []outputInfo{
23741 {0, 4611686017353646080},
23742 },
23743 },
23744 },
23745 {
23746 name: "CLZW",
23747 argLen: 1,
23748 asm: loong64.ACLZW,
23749 reg: regInfo{
23750 inputs: []inputInfo{
23751 {0, 1073741816},
23752 },
23753 outputs: []outputInfo{
23754 {0, 1071644664},
23755 },
23756 },
23757 },
23758 {
23759 name: "CLZV",
23760 argLen: 1,
23761 asm: loong64.ACLZV,
23762 reg: regInfo{
23763 inputs: []inputInfo{
23764 {0, 1073741816},
23765 },
23766 outputs: []outputInfo{
23767 {0, 1071644664},
23768 },
23769 },
23770 },
23771 {
23772 name: "CTZW",
23773 argLen: 1,
23774 asm: loong64.ACTZW,
23775 reg: regInfo{
23776 inputs: []inputInfo{
23777 {0, 1073741816},
23778 },
23779 outputs: []outputInfo{
23780 {0, 1071644664},
23781 },
23782 },
23783 },
23784 {
23785 name: "CTZV",
23786 argLen: 1,
23787 asm: loong64.ACTZV,
23788 reg: regInfo{
23789 inputs: []inputInfo{
23790 {0, 1073741816},
23791 },
23792 outputs: []outputInfo{
23793 {0, 1071644664},
23794 },
23795 },
23796 },
23797 {
23798 name: "REVB2H",
23799 argLen: 1,
23800 asm: loong64.AREVB2H,
23801 reg: regInfo{
23802 inputs: []inputInfo{
23803 {0, 1073741816},
23804 },
23805 outputs: []outputInfo{
23806 {0, 1071644664},
23807 },
23808 },
23809 },
23810 {
23811 name: "REVB2W",
23812 argLen: 1,
23813 asm: loong64.AREVB2W,
23814 reg: regInfo{
23815 inputs: []inputInfo{
23816 {0, 1073741816},
23817 },
23818 outputs: []outputInfo{
23819 {0, 1071644664},
23820 },
23821 },
23822 },
23823 {
23824 name: "REVBV",
23825 argLen: 1,
23826 asm: loong64.AREVBV,
23827 reg: regInfo{
23828 inputs: []inputInfo{
23829 {0, 1073741816},
23830 },
23831 outputs: []outputInfo{
23832 {0, 1071644664},
23833 },
23834 },
23835 },
23836 {
23837 name: "BITREV4B",
23838 argLen: 1,
23839 asm: loong64.ABITREV4B,
23840 reg: regInfo{
23841 inputs: []inputInfo{
23842 {0, 1073741816},
23843 },
23844 outputs: []outputInfo{
23845 {0, 1071644664},
23846 },
23847 },
23848 },
23849 {
23850 name: "BITREVW",
23851 argLen: 1,
23852 asm: loong64.ABITREVW,
23853 reg: regInfo{
23854 inputs: []inputInfo{
23855 {0, 1073741816},
23856 },
23857 outputs: []outputInfo{
23858 {0, 1071644664},
23859 },
23860 },
23861 },
23862 {
23863 name: "BITREVV",
23864 argLen: 1,
23865 asm: loong64.ABITREVV,
23866 reg: regInfo{
23867 inputs: []inputInfo{
23868 {0, 1073741816},
23869 },
23870 outputs: []outputInfo{
23871 {0, 1071644664},
23872 },
23873 },
23874 },
23875 {
23876 name: "VPCNT64",
23877 argLen: 1,
23878 asm: loong64.AVPCNTV,
23879 reg: regInfo{
23880 inputs: []inputInfo{
23881 {0, 4611686017353646080},
23882 },
23883 outputs: []outputInfo{
23884 {0, 4611686017353646080},
23885 },
23886 },
23887 },
23888 {
23889 name: "VPCNT32",
23890 argLen: 1,
23891 asm: loong64.AVPCNTW,
23892 reg: regInfo{
23893 inputs: []inputInfo{
23894 {0, 4611686017353646080},
23895 },
23896 outputs: []outputInfo{
23897 {0, 4611686017353646080},
23898 },
23899 },
23900 },
23901 {
23902 name: "VPCNT16",
23903 argLen: 1,
23904 asm: loong64.AVPCNTH,
23905 reg: regInfo{
23906 inputs: []inputInfo{
23907 {0, 4611686017353646080},
23908 },
23909 outputs: []outputInfo{
23910 {0, 4611686017353646080},
23911 },
23912 },
23913 },
23914 {
23915 name: "ADDV",
23916 argLen: 2,
23917 commutative: true,
23918 asm: loong64.AADDVU,
23919 reg: regInfo{
23920 inputs: []inputInfo{
23921 {0, 1073741816},
23922 {1, 1073741816},
23923 },
23924 outputs: []outputInfo{
23925 {0, 1071644664},
23926 },
23927 },
23928 },
23929 {
23930 name: "ADDVconst",
23931 auxType: auxInt64,
23932 argLen: 1,
23933 asm: loong64.AADDVU,
23934 reg: regInfo{
23935 inputs: []inputInfo{
23936 {0, 1073741820},
23937 },
23938 outputs: []outputInfo{
23939 {0, 1071644664},
23940 },
23941 },
23942 },
23943 {
23944 name: "SUBV",
23945 argLen: 2,
23946 asm: loong64.ASUBVU,
23947 reg: regInfo{
23948 inputs: []inputInfo{
23949 {0, 1073741816},
23950 {1, 1073741816},
23951 },
23952 outputs: []outputInfo{
23953 {0, 1071644664},
23954 },
23955 },
23956 },
23957 {
23958 name: "SUBVconst",
23959 auxType: auxInt64,
23960 argLen: 1,
23961 asm: loong64.ASUBVU,
23962 reg: regInfo{
23963 inputs: []inputInfo{
23964 {0, 1073741816},
23965 },
23966 outputs: []outputInfo{
23967 {0, 1071644664},
23968 },
23969 },
23970 },
23971 {
23972 name: "MULV",
23973 argLen: 2,
23974 commutative: true,
23975 asm: loong64.AMULV,
23976 reg: regInfo{
23977 inputs: []inputInfo{
23978 {0, 1073741816},
23979 {1, 1073741816},
23980 },
23981 outputs: []outputInfo{
23982 {0, 1071644664},
23983 },
23984 },
23985 },
23986 {
23987 name: "MULHV",
23988 argLen: 2,
23989 commutative: true,
23990 asm: loong64.AMULHV,
23991 reg: regInfo{
23992 inputs: []inputInfo{
23993 {0, 1073741816},
23994 {1, 1073741816},
23995 },
23996 outputs: []outputInfo{
23997 {0, 1071644664},
23998 },
23999 },
24000 },
24001 {
24002 name: "MULHVU",
24003 argLen: 2,
24004 commutative: true,
24005 asm: loong64.AMULHVU,
24006 reg: regInfo{
24007 inputs: []inputInfo{
24008 {0, 1073741816},
24009 {1, 1073741816},
24010 },
24011 outputs: []outputInfo{
24012 {0, 1071644664},
24013 },
24014 },
24015 },
24016 {
24017 name: "DIVV",
24018 argLen: 2,
24019 asm: loong64.ADIVV,
24020 reg: regInfo{
24021 inputs: []inputInfo{
24022 {0, 1073741816},
24023 {1, 1073741816},
24024 },
24025 outputs: []outputInfo{
24026 {0, 1071644664},
24027 },
24028 },
24029 },
24030 {
24031 name: "DIVVU",
24032 argLen: 2,
24033 asm: loong64.ADIVVU,
24034 reg: regInfo{
24035 inputs: []inputInfo{
24036 {0, 1073741816},
24037 {1, 1073741816},
24038 },
24039 outputs: []outputInfo{
24040 {0, 1071644664},
24041 },
24042 },
24043 },
24044 {
24045 name: "REMV",
24046 argLen: 2,
24047 asm: loong64.AREMV,
24048 reg: regInfo{
24049 inputs: []inputInfo{
24050 {0, 1073741816},
24051 {1, 1073741816},
24052 },
24053 outputs: []outputInfo{
24054 {0, 1071644664},
24055 },
24056 },
24057 },
24058 {
24059 name: "REMVU",
24060 argLen: 2,
24061 asm: loong64.AREMVU,
24062 reg: regInfo{
24063 inputs: []inputInfo{
24064 {0, 1073741816},
24065 {1, 1073741816},
24066 },
24067 outputs: []outputInfo{
24068 {0, 1071644664},
24069 },
24070 },
24071 },
24072 {
24073 name: "ADDF",
24074 argLen: 2,
24075 commutative: true,
24076 asm: loong64.AADDF,
24077 reg: regInfo{
24078 inputs: []inputInfo{
24079 {0, 4611686017353646080},
24080 {1, 4611686017353646080},
24081 },
24082 outputs: []outputInfo{
24083 {0, 4611686017353646080},
24084 },
24085 },
24086 },
24087 {
24088 name: "ADDD",
24089 argLen: 2,
24090 commutative: true,
24091 asm: loong64.AADDD,
24092 reg: regInfo{
24093 inputs: []inputInfo{
24094 {0, 4611686017353646080},
24095 {1, 4611686017353646080},
24096 },
24097 outputs: []outputInfo{
24098 {0, 4611686017353646080},
24099 },
24100 },
24101 },
24102 {
24103 name: "SUBF",
24104 argLen: 2,
24105 asm: loong64.ASUBF,
24106 reg: regInfo{
24107 inputs: []inputInfo{
24108 {0, 4611686017353646080},
24109 {1, 4611686017353646080},
24110 },
24111 outputs: []outputInfo{
24112 {0, 4611686017353646080},
24113 },
24114 },
24115 },
24116 {
24117 name: "SUBD",
24118 argLen: 2,
24119 asm: loong64.ASUBD,
24120 reg: regInfo{
24121 inputs: []inputInfo{
24122 {0, 4611686017353646080},
24123 {1, 4611686017353646080},
24124 },
24125 outputs: []outputInfo{
24126 {0, 4611686017353646080},
24127 },
24128 },
24129 },
24130 {
24131 name: "MULF",
24132 argLen: 2,
24133 commutative: true,
24134 asm: loong64.AMULF,
24135 reg: regInfo{
24136 inputs: []inputInfo{
24137 {0, 4611686017353646080},
24138 {1, 4611686017353646080},
24139 },
24140 outputs: []outputInfo{
24141 {0, 4611686017353646080},
24142 },
24143 },
24144 },
24145 {
24146 name: "MULD",
24147 argLen: 2,
24148 commutative: true,
24149 asm: loong64.AMULD,
24150 reg: regInfo{
24151 inputs: []inputInfo{
24152 {0, 4611686017353646080},
24153 {1, 4611686017353646080},
24154 },
24155 outputs: []outputInfo{
24156 {0, 4611686017353646080},
24157 },
24158 },
24159 },
24160 {
24161 name: "DIVF",
24162 argLen: 2,
24163 asm: loong64.ADIVF,
24164 reg: regInfo{
24165 inputs: []inputInfo{
24166 {0, 4611686017353646080},
24167 {1, 4611686017353646080},
24168 },
24169 outputs: []outputInfo{
24170 {0, 4611686017353646080},
24171 },
24172 },
24173 },
24174 {
24175 name: "DIVD",
24176 argLen: 2,
24177 asm: loong64.ADIVD,
24178 reg: regInfo{
24179 inputs: []inputInfo{
24180 {0, 4611686017353646080},
24181 {1, 4611686017353646080},
24182 },
24183 outputs: []outputInfo{
24184 {0, 4611686017353646080},
24185 },
24186 },
24187 },
24188 {
24189 name: "AND",
24190 argLen: 2,
24191 commutative: true,
24192 asm: loong64.AAND,
24193 reg: regInfo{
24194 inputs: []inputInfo{
24195 {0, 1073741816},
24196 {1, 1073741816},
24197 },
24198 outputs: []outputInfo{
24199 {0, 1071644664},
24200 },
24201 },
24202 },
24203 {
24204 name: "ANDconst",
24205 auxType: auxInt64,
24206 argLen: 1,
24207 asm: loong64.AAND,
24208 reg: regInfo{
24209 inputs: []inputInfo{
24210 {0, 1073741816},
24211 },
24212 outputs: []outputInfo{
24213 {0, 1071644664},
24214 },
24215 },
24216 },
24217 {
24218 name: "OR",
24219 argLen: 2,
24220 commutative: true,
24221 asm: loong64.AOR,
24222 reg: regInfo{
24223 inputs: []inputInfo{
24224 {0, 1073741816},
24225 {1, 1073741816},
24226 },
24227 outputs: []outputInfo{
24228 {0, 1071644664},
24229 },
24230 },
24231 },
24232 {
24233 name: "ORconst",
24234 auxType: auxInt64,
24235 argLen: 1,
24236 asm: loong64.AOR,
24237 reg: regInfo{
24238 inputs: []inputInfo{
24239 {0, 1073741816},
24240 },
24241 outputs: []outputInfo{
24242 {0, 1071644664},
24243 },
24244 },
24245 },
24246 {
24247 name: "XOR",
24248 argLen: 2,
24249 commutative: true,
24250 asm: loong64.AXOR,
24251 reg: regInfo{
24252 inputs: []inputInfo{
24253 {0, 1073741816},
24254 {1, 1073741816},
24255 },
24256 outputs: []outputInfo{
24257 {0, 1071644664},
24258 },
24259 },
24260 },
24261 {
24262 name: "XORconst",
24263 auxType: auxInt64,
24264 argLen: 1,
24265 asm: loong64.AXOR,
24266 reg: regInfo{
24267 inputs: []inputInfo{
24268 {0, 1073741816},
24269 },
24270 outputs: []outputInfo{
24271 {0, 1071644664},
24272 },
24273 },
24274 },
24275 {
24276 name: "NOR",
24277 argLen: 2,
24278 commutative: true,
24279 asm: loong64.ANOR,
24280 reg: regInfo{
24281 inputs: []inputInfo{
24282 {0, 1073741816},
24283 {1, 1073741816},
24284 },
24285 outputs: []outputInfo{
24286 {0, 1071644664},
24287 },
24288 },
24289 },
24290 {
24291 name: "NORconst",
24292 auxType: auxInt64,
24293 argLen: 1,
24294 asm: loong64.ANOR,
24295 reg: regInfo{
24296 inputs: []inputInfo{
24297 {0, 1073741816},
24298 },
24299 outputs: []outputInfo{
24300 {0, 1071644664},
24301 },
24302 },
24303 },
24304 {
24305 name: "FMADDF",
24306 argLen: 3,
24307 commutative: true,
24308 asm: loong64.AFMADDF,
24309 reg: regInfo{
24310 inputs: []inputInfo{
24311 {0, 4611686017353646080},
24312 {1, 4611686017353646080},
24313 {2, 4611686017353646080},
24314 },
24315 outputs: []outputInfo{
24316 {0, 4611686017353646080},
24317 },
24318 },
24319 },
24320 {
24321 name: "FMADDD",
24322 argLen: 3,
24323 commutative: true,
24324 asm: loong64.AFMADDD,
24325 reg: regInfo{
24326 inputs: []inputInfo{
24327 {0, 4611686017353646080},
24328 {1, 4611686017353646080},
24329 {2, 4611686017353646080},
24330 },
24331 outputs: []outputInfo{
24332 {0, 4611686017353646080},
24333 },
24334 },
24335 },
24336 {
24337 name: "FMSUBF",
24338 argLen: 3,
24339 commutative: true,
24340 asm: loong64.AFMSUBF,
24341 reg: regInfo{
24342 inputs: []inputInfo{
24343 {0, 4611686017353646080},
24344 {1, 4611686017353646080},
24345 {2, 4611686017353646080},
24346 },
24347 outputs: []outputInfo{
24348 {0, 4611686017353646080},
24349 },
24350 },
24351 },
24352 {
24353 name: "FMSUBD",
24354 argLen: 3,
24355 commutative: true,
24356 asm: loong64.AFMSUBD,
24357 reg: regInfo{
24358 inputs: []inputInfo{
24359 {0, 4611686017353646080},
24360 {1, 4611686017353646080},
24361 {2, 4611686017353646080},
24362 },
24363 outputs: []outputInfo{
24364 {0, 4611686017353646080},
24365 },
24366 },
24367 },
24368 {
24369 name: "FNMADDF",
24370 argLen: 3,
24371 commutative: true,
24372 asm: loong64.AFNMADDF,
24373 reg: regInfo{
24374 inputs: []inputInfo{
24375 {0, 4611686017353646080},
24376 {1, 4611686017353646080},
24377 {2, 4611686017353646080},
24378 },
24379 outputs: []outputInfo{
24380 {0, 4611686017353646080},
24381 },
24382 },
24383 },
24384 {
24385 name: "FNMADDD",
24386 argLen: 3,
24387 commutative: true,
24388 asm: loong64.AFNMADDD,
24389 reg: regInfo{
24390 inputs: []inputInfo{
24391 {0, 4611686017353646080},
24392 {1, 4611686017353646080},
24393 {2, 4611686017353646080},
24394 },
24395 outputs: []outputInfo{
24396 {0, 4611686017353646080},
24397 },
24398 },
24399 },
24400 {
24401 name: "FNMSUBF",
24402 argLen: 3,
24403 commutative: true,
24404 asm: loong64.AFNMSUBF,
24405 reg: regInfo{
24406 inputs: []inputInfo{
24407 {0, 4611686017353646080},
24408 {1, 4611686017353646080},
24409 {2, 4611686017353646080},
24410 },
24411 outputs: []outputInfo{
24412 {0, 4611686017353646080},
24413 },
24414 },
24415 },
24416 {
24417 name: "FNMSUBD",
24418 argLen: 3,
24419 commutative: true,
24420 asm: loong64.AFNMSUBD,
24421 reg: regInfo{
24422 inputs: []inputInfo{
24423 {0, 4611686017353646080},
24424 {1, 4611686017353646080},
24425 {2, 4611686017353646080},
24426 },
24427 outputs: []outputInfo{
24428 {0, 4611686017353646080},
24429 },
24430 },
24431 },
24432 {
24433 name: "FMINF",
24434 argLen: 2,
24435 commutative: true,
24436 resultNotInArgs: true,
24437 asm: loong64.AFMINF,
24438 reg: regInfo{
24439 inputs: []inputInfo{
24440 {0, 4611686017353646080},
24441 {1, 4611686017353646080},
24442 },
24443 outputs: []outputInfo{
24444 {0, 4611686017353646080},
24445 },
24446 },
24447 },
24448 {
24449 name: "FMIND",
24450 argLen: 2,
24451 commutative: true,
24452 resultNotInArgs: true,
24453 asm: loong64.AFMIND,
24454 reg: regInfo{
24455 inputs: []inputInfo{
24456 {0, 4611686017353646080},
24457 {1, 4611686017353646080},
24458 },
24459 outputs: []outputInfo{
24460 {0, 4611686017353646080},
24461 },
24462 },
24463 },
24464 {
24465 name: "FMAXF",
24466 argLen: 2,
24467 commutative: true,
24468 resultNotInArgs: true,
24469 asm: loong64.AFMAXF,
24470 reg: regInfo{
24471 inputs: []inputInfo{
24472 {0, 4611686017353646080},
24473 {1, 4611686017353646080},
24474 },
24475 outputs: []outputInfo{
24476 {0, 4611686017353646080},
24477 },
24478 },
24479 },
24480 {
24481 name: "FMAXD",
24482 argLen: 2,
24483 commutative: true,
24484 resultNotInArgs: true,
24485 asm: loong64.AFMAXD,
24486 reg: regInfo{
24487 inputs: []inputInfo{
24488 {0, 4611686017353646080},
24489 {1, 4611686017353646080},
24490 },
24491 outputs: []outputInfo{
24492 {0, 4611686017353646080},
24493 },
24494 },
24495 },
24496 {
24497 name: "MASKEQZ",
24498 argLen: 2,
24499 asm: loong64.AMASKEQZ,
24500 reg: regInfo{
24501 inputs: []inputInfo{
24502 {0, 1073741816},
24503 {1, 1073741816},
24504 },
24505 outputs: []outputInfo{
24506 {0, 1071644664},
24507 },
24508 },
24509 },
24510 {
24511 name: "MASKNEZ",
24512 argLen: 2,
24513 asm: loong64.AMASKNEZ,
24514 reg: regInfo{
24515 inputs: []inputInfo{
24516 {0, 1073741816},
24517 {1, 1073741816},
24518 },
24519 outputs: []outputInfo{
24520 {0, 1071644664},
24521 },
24522 },
24523 },
24524 {
24525 name: "FCOPYSGD",
24526 argLen: 2,
24527 asm: loong64.AFCOPYSGD,
24528 reg: regInfo{
24529 inputs: []inputInfo{
24530 {0, 4611686017353646080},
24531 {1, 4611686017353646080},
24532 },
24533 outputs: []outputInfo{
24534 {0, 4611686017353646080},
24535 },
24536 },
24537 },
24538 {
24539 name: "SLLV",
24540 argLen: 2,
24541 asm: loong64.ASLLV,
24542 reg: regInfo{
24543 inputs: []inputInfo{
24544 {0, 1073741816},
24545 {1, 1073741816},
24546 },
24547 outputs: []outputInfo{
24548 {0, 1071644664},
24549 },
24550 },
24551 },
24552 {
24553 name: "SLLVconst",
24554 auxType: auxInt64,
24555 argLen: 1,
24556 asm: loong64.ASLLV,
24557 reg: regInfo{
24558 inputs: []inputInfo{
24559 {0, 1073741816},
24560 },
24561 outputs: []outputInfo{
24562 {0, 1071644664},
24563 },
24564 },
24565 },
24566 {
24567 name: "SRLV",
24568 argLen: 2,
24569 asm: loong64.ASRLV,
24570 reg: regInfo{
24571 inputs: []inputInfo{
24572 {0, 1073741816},
24573 {1, 1073741816},
24574 },
24575 outputs: []outputInfo{
24576 {0, 1071644664},
24577 },
24578 },
24579 },
24580 {
24581 name: "SRLVconst",
24582 auxType: auxInt64,
24583 argLen: 1,
24584 asm: loong64.ASRLV,
24585 reg: regInfo{
24586 inputs: []inputInfo{
24587 {0, 1073741816},
24588 },
24589 outputs: []outputInfo{
24590 {0, 1071644664},
24591 },
24592 },
24593 },
24594 {
24595 name: "SRAV",
24596 argLen: 2,
24597 asm: loong64.ASRAV,
24598 reg: regInfo{
24599 inputs: []inputInfo{
24600 {0, 1073741816},
24601 {1, 1073741816},
24602 },
24603 outputs: []outputInfo{
24604 {0, 1071644664},
24605 },
24606 },
24607 },
24608 {
24609 name: "SRAVconst",
24610 auxType: auxInt64,
24611 argLen: 1,
24612 asm: loong64.ASRAV,
24613 reg: regInfo{
24614 inputs: []inputInfo{
24615 {0, 1073741816},
24616 },
24617 outputs: []outputInfo{
24618 {0, 1071644664},
24619 },
24620 },
24621 },
24622 {
24623 name: "ROTR",
24624 argLen: 2,
24625 asm: loong64.AROTR,
24626 reg: regInfo{
24627 inputs: []inputInfo{
24628 {0, 1073741816},
24629 {1, 1073741816},
24630 },
24631 outputs: []outputInfo{
24632 {0, 1071644664},
24633 },
24634 },
24635 },
24636 {
24637 name: "ROTRV",
24638 argLen: 2,
24639 asm: loong64.AROTRV,
24640 reg: regInfo{
24641 inputs: []inputInfo{
24642 {0, 1073741816},
24643 {1, 1073741816},
24644 },
24645 outputs: []outputInfo{
24646 {0, 1071644664},
24647 },
24648 },
24649 },
24650 {
24651 name: "ROTRconst",
24652 auxType: auxInt64,
24653 argLen: 1,
24654 asm: loong64.AROTR,
24655 reg: regInfo{
24656 inputs: []inputInfo{
24657 {0, 1073741816},
24658 },
24659 outputs: []outputInfo{
24660 {0, 1071644664},
24661 },
24662 },
24663 },
24664 {
24665 name: "ROTRVconst",
24666 auxType: auxInt64,
24667 argLen: 1,
24668 asm: loong64.AROTRV,
24669 reg: regInfo{
24670 inputs: []inputInfo{
24671 {0, 1073741816},
24672 },
24673 outputs: []outputInfo{
24674 {0, 1071644664},
24675 },
24676 },
24677 },
24678 {
24679 name: "SGT",
24680 argLen: 2,
24681 asm: loong64.ASGT,
24682 reg: regInfo{
24683 inputs: []inputInfo{
24684 {0, 1073741816},
24685 {1, 1073741816},
24686 },
24687 outputs: []outputInfo{
24688 {0, 1071644664},
24689 },
24690 },
24691 },
24692 {
24693 name: "SGTconst",
24694 auxType: auxInt64,
24695 argLen: 1,
24696 asm: loong64.ASGT,
24697 reg: regInfo{
24698 inputs: []inputInfo{
24699 {0, 1073741816},
24700 },
24701 outputs: []outputInfo{
24702 {0, 1071644664},
24703 },
24704 },
24705 },
24706 {
24707 name: "SGTU",
24708 argLen: 2,
24709 asm: loong64.ASGTU,
24710 reg: regInfo{
24711 inputs: []inputInfo{
24712 {0, 1073741816},
24713 {1, 1073741816},
24714 },
24715 outputs: []outputInfo{
24716 {0, 1071644664},
24717 },
24718 },
24719 },
24720 {
24721 name: "SGTUconst",
24722 auxType: auxInt64,
24723 argLen: 1,
24724 asm: loong64.ASGTU,
24725 reg: regInfo{
24726 inputs: []inputInfo{
24727 {0, 1073741816},
24728 },
24729 outputs: []outputInfo{
24730 {0, 1071644664},
24731 },
24732 },
24733 },
24734 {
24735 name: "CMPEQF",
24736 argLen: 2,
24737 asm: loong64.ACMPEQF,
24738 reg: regInfo{
24739 inputs: []inputInfo{
24740 {0, 4611686017353646080},
24741 {1, 4611686017353646080},
24742 },
24743 },
24744 },
24745 {
24746 name: "CMPEQD",
24747 argLen: 2,
24748 asm: loong64.ACMPEQD,
24749 reg: regInfo{
24750 inputs: []inputInfo{
24751 {0, 4611686017353646080},
24752 {1, 4611686017353646080},
24753 },
24754 },
24755 },
24756 {
24757 name: "CMPGEF",
24758 argLen: 2,
24759 asm: loong64.ACMPGEF,
24760 reg: regInfo{
24761 inputs: []inputInfo{
24762 {0, 4611686017353646080},
24763 {1, 4611686017353646080},
24764 },
24765 },
24766 },
24767 {
24768 name: "CMPGED",
24769 argLen: 2,
24770 asm: loong64.ACMPGED,
24771 reg: regInfo{
24772 inputs: []inputInfo{
24773 {0, 4611686017353646080},
24774 {1, 4611686017353646080},
24775 },
24776 },
24777 },
24778 {
24779 name: "CMPGTF",
24780 argLen: 2,
24781 asm: loong64.ACMPGTF,
24782 reg: regInfo{
24783 inputs: []inputInfo{
24784 {0, 4611686017353646080},
24785 {1, 4611686017353646080},
24786 },
24787 },
24788 },
24789 {
24790 name: "CMPGTD",
24791 argLen: 2,
24792 asm: loong64.ACMPGTD,
24793 reg: regInfo{
24794 inputs: []inputInfo{
24795 {0, 4611686017353646080},
24796 {1, 4611686017353646080},
24797 },
24798 },
24799 },
24800 {
24801 name: "BSTRPICKW",
24802 auxType: auxInt64,
24803 argLen: 1,
24804 asm: loong64.ABSTRPICKW,
24805 reg: regInfo{
24806 inputs: []inputInfo{
24807 {0, 1073741816},
24808 },
24809 outputs: []outputInfo{
24810 {0, 1071644664},
24811 },
24812 },
24813 },
24814 {
24815 name: "BSTRPICKV",
24816 auxType: auxInt64,
24817 argLen: 1,
24818 asm: loong64.ABSTRPICKV,
24819 reg: regInfo{
24820 inputs: []inputInfo{
24821 {0, 1073741816},
24822 },
24823 outputs: []outputInfo{
24824 {0, 1071644664},
24825 },
24826 },
24827 },
24828 {
24829 name: "MOVVconst",
24830 auxType: auxInt64,
24831 argLen: 0,
24832 rematerializeable: true,
24833 asm: loong64.AMOVV,
24834 reg: regInfo{
24835 outputs: []outputInfo{
24836 {0, 1071644664},
24837 },
24838 },
24839 },
24840 {
24841 name: "MOVFconst",
24842 auxType: auxFloat64,
24843 argLen: 0,
24844 rematerializeable: true,
24845 asm: loong64.AMOVF,
24846 reg: regInfo{
24847 outputs: []outputInfo{
24848 {0, 4611686017353646080},
24849 },
24850 },
24851 },
24852 {
24853 name: "MOVDconst",
24854 auxType: auxFloat64,
24855 argLen: 0,
24856 rematerializeable: true,
24857 asm: loong64.AMOVD,
24858 reg: regInfo{
24859 outputs: []outputInfo{
24860 {0, 4611686017353646080},
24861 },
24862 },
24863 },
24864 {
24865 name: "MOVVaddr",
24866 auxType: auxSymOff,
24867 argLen: 1,
24868 rematerializeable: true,
24869 symEffect: SymAddr,
24870 asm: loong64.AMOVV,
24871 reg: regInfo{
24872 inputs: []inputInfo{
24873 {0, 4611686018427387908},
24874 },
24875 outputs: []outputInfo{
24876 {0, 1071644664},
24877 },
24878 },
24879 },
24880 {
24881 name: "MOVBload",
24882 auxType: auxSymOff,
24883 argLen: 2,
24884 faultOnNilArg0: true,
24885 symEffect: SymRead,
24886 asm: loong64.AMOVB,
24887 reg: regInfo{
24888 inputs: []inputInfo{
24889 {0, 4611686019501129724},
24890 },
24891 outputs: []outputInfo{
24892 {0, 1071644664},
24893 },
24894 },
24895 },
24896 {
24897 name: "MOVBUload",
24898 auxType: auxSymOff,
24899 argLen: 2,
24900 faultOnNilArg0: true,
24901 symEffect: SymRead,
24902 asm: loong64.AMOVBU,
24903 reg: regInfo{
24904 inputs: []inputInfo{
24905 {0, 4611686019501129724},
24906 },
24907 outputs: []outputInfo{
24908 {0, 1071644664},
24909 },
24910 },
24911 },
24912 {
24913 name: "MOVHload",
24914 auxType: auxSymOff,
24915 argLen: 2,
24916 faultOnNilArg0: true,
24917 symEffect: SymRead,
24918 asm: loong64.AMOVH,
24919 reg: regInfo{
24920 inputs: []inputInfo{
24921 {0, 4611686019501129724},
24922 },
24923 outputs: []outputInfo{
24924 {0, 1071644664},
24925 },
24926 },
24927 },
24928 {
24929 name: "MOVHUload",
24930 auxType: auxSymOff,
24931 argLen: 2,
24932 faultOnNilArg0: true,
24933 symEffect: SymRead,
24934 asm: loong64.AMOVHU,
24935 reg: regInfo{
24936 inputs: []inputInfo{
24937 {0, 4611686019501129724},
24938 },
24939 outputs: []outputInfo{
24940 {0, 1071644664},
24941 },
24942 },
24943 },
24944 {
24945 name: "MOVWload",
24946 auxType: auxSymOff,
24947 argLen: 2,
24948 faultOnNilArg0: true,
24949 symEffect: SymRead,
24950 asm: loong64.AMOVW,
24951 reg: regInfo{
24952 inputs: []inputInfo{
24953 {0, 4611686019501129724},
24954 },
24955 outputs: []outputInfo{
24956 {0, 1071644664},
24957 },
24958 },
24959 },
24960 {
24961 name: "MOVWUload",
24962 auxType: auxSymOff,
24963 argLen: 2,
24964 faultOnNilArg0: true,
24965 symEffect: SymRead,
24966 asm: loong64.AMOVWU,
24967 reg: regInfo{
24968 inputs: []inputInfo{
24969 {0, 4611686019501129724},
24970 },
24971 outputs: []outputInfo{
24972 {0, 1071644664},
24973 },
24974 },
24975 },
24976 {
24977 name: "MOVVload",
24978 auxType: auxSymOff,
24979 argLen: 2,
24980 faultOnNilArg0: true,
24981 symEffect: SymRead,
24982 asm: loong64.AMOVV,
24983 reg: regInfo{
24984 inputs: []inputInfo{
24985 {0, 4611686019501129724},
24986 },
24987 outputs: []outputInfo{
24988 {0, 1071644664},
24989 },
24990 },
24991 },
24992 {
24993 name: "MOVFload",
24994 auxType: auxSymOff,
24995 argLen: 2,
24996 faultOnNilArg0: true,
24997 symEffect: SymRead,
24998 asm: loong64.AMOVF,
24999 reg: regInfo{
25000 inputs: []inputInfo{
25001 {0, 4611686019501129724},
25002 },
25003 outputs: []outputInfo{
25004 {0, 4611686017353646080},
25005 },
25006 },
25007 },
25008 {
25009 name: "MOVDload",
25010 auxType: auxSymOff,
25011 argLen: 2,
25012 faultOnNilArg0: true,
25013 symEffect: SymRead,
25014 asm: loong64.AMOVD,
25015 reg: regInfo{
25016 inputs: []inputInfo{
25017 {0, 4611686019501129724},
25018 },
25019 outputs: []outputInfo{
25020 {0, 4611686017353646080},
25021 },
25022 },
25023 },
25024 {
25025 name: "MOVVloadidx",
25026 argLen: 3,
25027 asm: loong64.AMOVV,
25028 reg: regInfo{
25029 inputs: []inputInfo{
25030 {1, 1073741816},
25031 {0, 4611686019501129724},
25032 },
25033 outputs: []outputInfo{
25034 {0, 1071644664},
25035 },
25036 },
25037 },
25038 {
25039 name: "MOVWloadidx",
25040 argLen: 3,
25041 asm: loong64.AMOVW,
25042 reg: regInfo{
25043 inputs: []inputInfo{
25044 {1, 1073741816},
25045 {0, 4611686019501129724},
25046 },
25047 outputs: []outputInfo{
25048 {0, 1071644664},
25049 },
25050 },
25051 },
25052 {
25053 name: "MOVWUloadidx",
25054 argLen: 3,
25055 asm: loong64.AMOVWU,
25056 reg: regInfo{
25057 inputs: []inputInfo{
25058 {1, 1073741816},
25059 {0, 4611686019501129724},
25060 },
25061 outputs: []outputInfo{
25062 {0, 1071644664},
25063 },
25064 },
25065 },
25066 {
25067 name: "MOVHloadidx",
25068 argLen: 3,
25069 asm: loong64.AMOVH,
25070 reg: regInfo{
25071 inputs: []inputInfo{
25072 {1, 1073741816},
25073 {0, 4611686019501129724},
25074 },
25075 outputs: []outputInfo{
25076 {0, 1071644664},
25077 },
25078 },
25079 },
25080 {
25081 name: "MOVHUloadidx",
25082 argLen: 3,
25083 asm: loong64.AMOVHU,
25084 reg: regInfo{
25085 inputs: []inputInfo{
25086 {1, 1073741816},
25087 {0, 4611686019501129724},
25088 },
25089 outputs: []outputInfo{
25090 {0, 1071644664},
25091 },
25092 },
25093 },
25094 {
25095 name: "MOVBloadidx",
25096 argLen: 3,
25097 asm: loong64.AMOVB,
25098 reg: regInfo{
25099 inputs: []inputInfo{
25100 {1, 1073741816},
25101 {0, 4611686019501129724},
25102 },
25103 outputs: []outputInfo{
25104 {0, 1071644664},
25105 },
25106 },
25107 },
25108 {
25109 name: "MOVBUloadidx",
25110 argLen: 3,
25111 asm: loong64.AMOVBU,
25112 reg: regInfo{
25113 inputs: []inputInfo{
25114 {1, 1073741816},
25115 {0, 4611686019501129724},
25116 },
25117 outputs: []outputInfo{
25118 {0, 1071644664},
25119 },
25120 },
25121 },
25122 {
25123 name: "MOVFloadidx",
25124 argLen: 3,
25125 asm: loong64.AMOVF,
25126 reg: regInfo{
25127 inputs: []inputInfo{
25128 {1, 1073741816},
25129 {0, 4611686019501129724},
25130 },
25131 outputs: []outputInfo{
25132 {0, 4611686017353646080},
25133 },
25134 },
25135 },
25136 {
25137 name: "MOVDloadidx",
25138 argLen: 3,
25139 asm: loong64.AMOVD,
25140 reg: regInfo{
25141 inputs: []inputInfo{
25142 {1, 1073741816},
25143 {0, 4611686019501129724},
25144 },
25145 outputs: []outputInfo{
25146 {0, 4611686017353646080},
25147 },
25148 },
25149 },
25150 {
25151 name: "MOVBstore",
25152 auxType: auxSymOff,
25153 argLen: 3,
25154 faultOnNilArg0: true,
25155 symEffect: SymWrite,
25156 asm: loong64.AMOVB,
25157 reg: regInfo{
25158 inputs: []inputInfo{
25159 {1, 1073741816},
25160 {0, 4611686019501129724},
25161 },
25162 },
25163 },
25164 {
25165 name: "MOVHstore",
25166 auxType: auxSymOff,
25167 argLen: 3,
25168 faultOnNilArg0: true,
25169 symEffect: SymWrite,
25170 asm: loong64.AMOVH,
25171 reg: regInfo{
25172 inputs: []inputInfo{
25173 {1, 1073741816},
25174 {0, 4611686019501129724},
25175 },
25176 },
25177 },
25178 {
25179 name: "MOVWstore",
25180 auxType: auxSymOff,
25181 argLen: 3,
25182 faultOnNilArg0: true,
25183 symEffect: SymWrite,
25184 asm: loong64.AMOVW,
25185 reg: regInfo{
25186 inputs: []inputInfo{
25187 {1, 1073741816},
25188 {0, 4611686019501129724},
25189 },
25190 },
25191 },
25192 {
25193 name: "MOVVstore",
25194 auxType: auxSymOff,
25195 argLen: 3,
25196 faultOnNilArg0: true,
25197 symEffect: SymWrite,
25198 asm: loong64.AMOVV,
25199 reg: regInfo{
25200 inputs: []inputInfo{
25201 {1, 1073741816},
25202 {0, 4611686019501129724},
25203 },
25204 },
25205 },
25206 {
25207 name: "MOVFstore",
25208 auxType: auxSymOff,
25209 argLen: 3,
25210 faultOnNilArg0: true,
25211 symEffect: SymWrite,
25212 asm: loong64.AMOVF,
25213 reg: regInfo{
25214 inputs: []inputInfo{
25215 {0, 4611686019501129724},
25216 {1, 4611686017353646080},
25217 },
25218 },
25219 },
25220 {
25221 name: "MOVDstore",
25222 auxType: auxSymOff,
25223 argLen: 3,
25224 faultOnNilArg0: true,
25225 symEffect: SymWrite,
25226 asm: loong64.AMOVD,
25227 reg: regInfo{
25228 inputs: []inputInfo{
25229 {0, 4611686019501129724},
25230 {1, 4611686017353646080},
25231 },
25232 },
25233 },
25234 {
25235 name: "MOVBstoreidx",
25236 argLen: 4,
25237 asm: loong64.AMOVB,
25238 reg: regInfo{
25239 inputs: []inputInfo{
25240 {1, 1073741816},
25241 {2, 1073741816},
25242 {0, 4611686019501129724},
25243 },
25244 },
25245 },
25246 {
25247 name: "MOVHstoreidx",
25248 argLen: 4,
25249 asm: loong64.AMOVH,
25250 reg: regInfo{
25251 inputs: []inputInfo{
25252 {1, 1073741816},
25253 {2, 1073741816},
25254 {0, 4611686019501129724},
25255 },
25256 },
25257 },
25258 {
25259 name: "MOVWstoreidx",
25260 argLen: 4,
25261 asm: loong64.AMOVW,
25262 reg: regInfo{
25263 inputs: []inputInfo{
25264 {1, 1073741816},
25265 {2, 1073741816},
25266 {0, 4611686019501129724},
25267 },
25268 },
25269 },
25270 {
25271 name: "MOVVstoreidx",
25272 argLen: 4,
25273 asm: loong64.AMOVV,
25274 reg: regInfo{
25275 inputs: []inputInfo{
25276 {1, 1073741816},
25277 {2, 1073741816},
25278 {0, 4611686019501129724},
25279 },
25280 },
25281 },
25282 {
25283 name: "MOVFstoreidx",
25284 argLen: 4,
25285 asm: loong64.AMOVF,
25286 reg: regInfo{
25287 inputs: []inputInfo{
25288 {1, 1073741816},
25289 {0, 4611686019501129724},
25290 {2, 4611686017353646080},
25291 },
25292 },
25293 },
25294 {
25295 name: "MOVDstoreidx",
25296 argLen: 4,
25297 asm: loong64.AMOVD,
25298 reg: regInfo{
25299 inputs: []inputInfo{
25300 {1, 1073741816},
25301 {0, 4611686019501129724},
25302 {2, 4611686017353646080},
25303 },
25304 },
25305 },
25306 {
25307 name: "MOVBstorezero",
25308 auxType: auxSymOff,
25309 argLen: 2,
25310 faultOnNilArg0: true,
25311 symEffect: SymWrite,
25312 asm: loong64.AMOVB,
25313 reg: regInfo{
25314 inputs: []inputInfo{
25315 {0, 4611686019501129724},
25316 },
25317 },
25318 },
25319 {
25320 name: "MOVHstorezero",
25321 auxType: auxSymOff,
25322 argLen: 2,
25323 faultOnNilArg0: true,
25324 symEffect: SymWrite,
25325 asm: loong64.AMOVH,
25326 reg: regInfo{
25327 inputs: []inputInfo{
25328 {0, 4611686019501129724},
25329 },
25330 },
25331 },
25332 {
25333 name: "MOVWstorezero",
25334 auxType: auxSymOff,
25335 argLen: 2,
25336 faultOnNilArg0: true,
25337 symEffect: SymWrite,
25338 asm: loong64.AMOVW,
25339 reg: regInfo{
25340 inputs: []inputInfo{
25341 {0, 4611686019501129724},
25342 },
25343 },
25344 },
25345 {
25346 name: "MOVVstorezero",
25347 auxType: auxSymOff,
25348 argLen: 2,
25349 faultOnNilArg0: true,
25350 symEffect: SymWrite,
25351 asm: loong64.AMOVV,
25352 reg: regInfo{
25353 inputs: []inputInfo{
25354 {0, 4611686019501129724},
25355 },
25356 },
25357 },
25358 {
25359 name: "MOVBstorezeroidx",
25360 argLen: 3,
25361 asm: loong64.AMOVB,
25362 reg: regInfo{
25363 inputs: []inputInfo{
25364 {1, 1073741816},
25365 {0, 4611686019501129724},
25366 },
25367 },
25368 },
25369 {
25370 name: "MOVHstorezeroidx",
25371 argLen: 3,
25372 asm: loong64.AMOVH,
25373 reg: regInfo{
25374 inputs: []inputInfo{
25375 {1, 1073741816},
25376 {0, 4611686019501129724},
25377 },
25378 },
25379 },
25380 {
25381 name: "MOVWstorezeroidx",
25382 argLen: 3,
25383 asm: loong64.AMOVW,
25384 reg: regInfo{
25385 inputs: []inputInfo{
25386 {1, 1073741816},
25387 {0, 4611686019501129724},
25388 },
25389 },
25390 },
25391 {
25392 name: "MOVVstorezeroidx",
25393 argLen: 3,
25394 asm: loong64.AMOVV,
25395 reg: regInfo{
25396 inputs: []inputInfo{
25397 {1, 1073741816},
25398 {0, 4611686019501129724},
25399 },
25400 },
25401 },
25402 {
25403 name: "MOVWfpgp",
25404 argLen: 1,
25405 asm: loong64.AMOVW,
25406 reg: regInfo{
25407 inputs: []inputInfo{
25408 {0, 4611686017353646080},
25409 },
25410 outputs: []outputInfo{
25411 {0, 1071644664},
25412 },
25413 },
25414 },
25415 {
25416 name: "MOVWgpfp",
25417 argLen: 1,
25418 asm: loong64.AMOVW,
25419 reg: regInfo{
25420 inputs: []inputInfo{
25421 {0, 1071644664},
25422 },
25423 outputs: []outputInfo{
25424 {0, 4611686017353646080},
25425 },
25426 },
25427 },
25428 {
25429 name: "MOVVfpgp",
25430 argLen: 1,
25431 asm: loong64.AMOVV,
25432 reg: regInfo{
25433 inputs: []inputInfo{
25434 {0, 4611686017353646080},
25435 },
25436 outputs: []outputInfo{
25437 {0, 1071644664},
25438 },
25439 },
25440 },
25441 {
25442 name: "MOVVgpfp",
25443 argLen: 1,
25444 asm: loong64.AMOVV,
25445 reg: regInfo{
25446 inputs: []inputInfo{
25447 {0, 1071644664},
25448 },
25449 outputs: []outputInfo{
25450 {0, 4611686017353646080},
25451 },
25452 },
25453 },
25454 {
25455 name: "MOVBreg",
25456 argLen: 1,
25457 asm: loong64.AMOVB,
25458 reg: regInfo{
25459 inputs: []inputInfo{
25460 {0, 1073741816},
25461 },
25462 outputs: []outputInfo{
25463 {0, 1071644664},
25464 },
25465 },
25466 },
25467 {
25468 name: "MOVBUreg",
25469 argLen: 1,
25470 asm: loong64.AMOVBU,
25471 reg: regInfo{
25472 inputs: []inputInfo{
25473 {0, 1073741816},
25474 },
25475 outputs: []outputInfo{
25476 {0, 1071644664},
25477 },
25478 },
25479 },
25480 {
25481 name: "MOVHreg",
25482 argLen: 1,
25483 asm: loong64.AMOVH,
25484 reg: regInfo{
25485 inputs: []inputInfo{
25486 {0, 1073741816},
25487 },
25488 outputs: []outputInfo{
25489 {0, 1071644664},
25490 },
25491 },
25492 },
25493 {
25494 name: "MOVHUreg",
25495 argLen: 1,
25496 asm: loong64.AMOVHU,
25497 reg: regInfo{
25498 inputs: []inputInfo{
25499 {0, 1073741816},
25500 },
25501 outputs: []outputInfo{
25502 {0, 1071644664},
25503 },
25504 },
25505 },
25506 {
25507 name: "MOVWreg",
25508 argLen: 1,
25509 asm: loong64.AMOVW,
25510 reg: regInfo{
25511 inputs: []inputInfo{
25512 {0, 1073741816},
25513 },
25514 outputs: []outputInfo{
25515 {0, 1071644664},
25516 },
25517 },
25518 },
25519 {
25520 name: "MOVWUreg",
25521 argLen: 1,
25522 asm: loong64.AMOVWU,
25523 reg: regInfo{
25524 inputs: []inputInfo{
25525 {0, 1073741816},
25526 },
25527 outputs: []outputInfo{
25528 {0, 1071644664},
25529 },
25530 },
25531 },
25532 {
25533 name: "MOVVreg",
25534 argLen: 1,
25535 asm: loong64.AMOVV,
25536 reg: regInfo{
25537 inputs: []inputInfo{
25538 {0, 1073741816},
25539 },
25540 outputs: []outputInfo{
25541 {0, 1071644664},
25542 },
25543 },
25544 },
25545 {
25546 name: "MOVVnop",
25547 argLen: 1,
25548 resultInArg0: true,
25549 reg: regInfo{
25550 inputs: []inputInfo{
25551 {0, 1071644664},
25552 },
25553 outputs: []outputInfo{
25554 {0, 1071644664},
25555 },
25556 },
25557 },
25558 {
25559 name: "MOVWF",
25560 argLen: 1,
25561 asm: loong64.AMOVWF,
25562 reg: regInfo{
25563 inputs: []inputInfo{
25564 {0, 4611686017353646080},
25565 },
25566 outputs: []outputInfo{
25567 {0, 4611686017353646080},
25568 },
25569 },
25570 },
25571 {
25572 name: "MOVWD",
25573 argLen: 1,
25574 asm: loong64.AMOVWD,
25575 reg: regInfo{
25576 inputs: []inputInfo{
25577 {0, 4611686017353646080},
25578 },
25579 outputs: []outputInfo{
25580 {0, 4611686017353646080},
25581 },
25582 },
25583 },
25584 {
25585 name: "MOVVF",
25586 argLen: 1,
25587 asm: loong64.AMOVVF,
25588 reg: regInfo{
25589 inputs: []inputInfo{
25590 {0, 4611686017353646080},
25591 },
25592 outputs: []outputInfo{
25593 {0, 4611686017353646080},
25594 },
25595 },
25596 },
25597 {
25598 name: "MOVVD",
25599 argLen: 1,
25600 asm: loong64.AMOVVD,
25601 reg: regInfo{
25602 inputs: []inputInfo{
25603 {0, 4611686017353646080},
25604 },
25605 outputs: []outputInfo{
25606 {0, 4611686017353646080},
25607 },
25608 },
25609 },
25610 {
25611 name: "TRUNCFW",
25612 argLen: 1,
25613 asm: loong64.ATRUNCFW,
25614 reg: regInfo{
25615 inputs: []inputInfo{
25616 {0, 4611686017353646080},
25617 },
25618 outputs: []outputInfo{
25619 {0, 4611686017353646080},
25620 },
25621 },
25622 },
25623 {
25624 name: "TRUNCDW",
25625 argLen: 1,
25626 asm: loong64.ATRUNCDW,
25627 reg: regInfo{
25628 inputs: []inputInfo{
25629 {0, 4611686017353646080},
25630 },
25631 outputs: []outputInfo{
25632 {0, 4611686017353646080},
25633 },
25634 },
25635 },
25636 {
25637 name: "TRUNCFV",
25638 argLen: 1,
25639 asm: loong64.ATRUNCFV,
25640 reg: regInfo{
25641 inputs: []inputInfo{
25642 {0, 4611686017353646080},
25643 },
25644 outputs: []outputInfo{
25645 {0, 4611686017353646080},
25646 },
25647 },
25648 },
25649 {
25650 name: "TRUNCDV",
25651 argLen: 1,
25652 asm: loong64.ATRUNCDV,
25653 reg: regInfo{
25654 inputs: []inputInfo{
25655 {0, 4611686017353646080},
25656 },
25657 outputs: []outputInfo{
25658 {0, 4611686017353646080},
25659 },
25660 },
25661 },
25662 {
25663 name: "MOVFD",
25664 argLen: 1,
25665 asm: loong64.AMOVFD,
25666 reg: regInfo{
25667 inputs: []inputInfo{
25668 {0, 4611686017353646080},
25669 },
25670 outputs: []outputInfo{
25671 {0, 4611686017353646080},
25672 },
25673 },
25674 },
25675 {
25676 name: "MOVDF",
25677 argLen: 1,
25678 asm: loong64.AMOVDF,
25679 reg: regInfo{
25680 inputs: []inputInfo{
25681 {0, 4611686017353646080},
25682 },
25683 outputs: []outputInfo{
25684 {0, 4611686017353646080},
25685 },
25686 },
25687 },
25688 {
25689 name: "LoweredRound32F",
25690 argLen: 1,
25691 resultInArg0: true,
25692 reg: regInfo{
25693 inputs: []inputInfo{
25694 {0, 4611686017353646080},
25695 },
25696 outputs: []outputInfo{
25697 {0, 4611686017353646080},
25698 },
25699 },
25700 },
25701 {
25702 name: "LoweredRound64F",
25703 argLen: 1,
25704 resultInArg0: true,
25705 reg: regInfo{
25706 inputs: []inputInfo{
25707 {0, 4611686017353646080},
25708 },
25709 outputs: []outputInfo{
25710 {0, 4611686017353646080},
25711 },
25712 },
25713 },
25714 {
25715 name: "CALLstatic",
25716 auxType: auxCallOff,
25717 argLen: -1,
25718 clobberFlags: true,
25719 call: true,
25720 reg: regInfo{
25721 clobbers: 4611686018427387896,
25722 },
25723 },
25724 {
25725 name: "CALLtail",
25726 auxType: auxCallOff,
25727 argLen: -1,
25728 clobberFlags: true,
25729 call: true,
25730 tailCall: true,
25731 reg: regInfo{
25732 clobbers: 4611686018427387896,
25733 },
25734 },
25735 {
25736 name: "CALLclosure",
25737 auxType: auxCallOff,
25738 argLen: -1,
25739 clobberFlags: true,
25740 call: true,
25741 reg: regInfo{
25742 inputs: []inputInfo{
25743 {1, 268435456},
25744 {0, 1071644668},
25745 },
25746 clobbers: 4611686018427387896,
25747 },
25748 },
25749 {
25750 name: "CALLinter",
25751 auxType: auxCallOff,
25752 argLen: -1,
25753 clobberFlags: true,
25754 call: true,
25755 reg: regInfo{
25756 inputs: []inputInfo{
25757 {0, 1071644664},
25758 },
25759 clobbers: 4611686018427387896,
25760 },
25761 },
25762 {
25763 name: "DUFFZERO",
25764 auxType: auxInt64,
25765 argLen: 2,
25766 faultOnNilArg0: true,
25767 reg: regInfo{
25768 inputs: []inputInfo{
25769 {0, 524288},
25770 },
25771 clobbers: 524290,
25772 },
25773 },
25774 {
25775 name: "DUFFCOPY",
25776 auxType: auxInt64,
25777 argLen: 3,
25778 faultOnNilArg0: true,
25779 faultOnNilArg1: true,
25780 reg: regInfo{
25781 inputs: []inputInfo{
25782 {0, 1048576},
25783 {1, 524288},
25784 },
25785 clobbers: 1572866,
25786 },
25787 },
25788 {
25789 name: "LoweredZero",
25790 auxType: auxInt64,
25791 argLen: 3,
25792 faultOnNilArg0: true,
25793 reg: regInfo{
25794 inputs: []inputInfo{
25795 {0, 524288},
25796 {1, 1071644664},
25797 },
25798 clobbers: 524288,
25799 },
25800 },
25801 {
25802 name: "LoweredMove",
25803 auxType: auxInt64,
25804 argLen: 4,
25805 faultOnNilArg0: true,
25806 faultOnNilArg1: true,
25807 reg: regInfo{
25808 inputs: []inputInfo{
25809 {0, 1048576},
25810 {1, 524288},
25811 {2, 1071644664},
25812 },
25813 clobbers: 1572864,
25814 },
25815 },
25816 {
25817 name: "LoweredAtomicLoad8",
25818 argLen: 2,
25819 faultOnNilArg0: true,
25820 reg: regInfo{
25821 inputs: []inputInfo{
25822 {0, 4611686019501129724},
25823 },
25824 outputs: []outputInfo{
25825 {0, 1071644664},
25826 },
25827 },
25828 },
25829 {
25830 name: "LoweredAtomicLoad32",
25831 argLen: 2,
25832 faultOnNilArg0: true,
25833 reg: regInfo{
25834 inputs: []inputInfo{
25835 {0, 4611686019501129724},
25836 },
25837 outputs: []outputInfo{
25838 {0, 1071644664},
25839 },
25840 },
25841 },
25842 {
25843 name: "LoweredAtomicLoad64",
25844 argLen: 2,
25845 faultOnNilArg0: true,
25846 reg: regInfo{
25847 inputs: []inputInfo{
25848 {0, 4611686019501129724},
25849 },
25850 outputs: []outputInfo{
25851 {0, 1071644664},
25852 },
25853 },
25854 },
25855 {
25856 name: "LoweredAtomicStore8",
25857 argLen: 3,
25858 faultOnNilArg0: true,
25859 hasSideEffects: true,
25860 reg: regInfo{
25861 inputs: []inputInfo{
25862 {1, 1073741816},
25863 {0, 4611686019501129724},
25864 },
25865 },
25866 },
25867 {
25868 name: "LoweredAtomicStore32",
25869 argLen: 3,
25870 faultOnNilArg0: true,
25871 hasSideEffects: true,
25872 reg: regInfo{
25873 inputs: []inputInfo{
25874 {1, 1073741816},
25875 {0, 4611686019501129724},
25876 },
25877 },
25878 },
25879 {
25880 name: "LoweredAtomicStore64",
25881 argLen: 3,
25882 faultOnNilArg0: true,
25883 hasSideEffects: true,
25884 reg: regInfo{
25885 inputs: []inputInfo{
25886 {1, 1073741816},
25887 {0, 4611686019501129724},
25888 },
25889 },
25890 },
25891 {
25892 name: "LoweredAtomicStore8Variant",
25893 argLen: 3,
25894 faultOnNilArg0: true,
25895 hasSideEffects: true,
25896 reg: regInfo{
25897 inputs: []inputInfo{
25898 {1, 1073741816},
25899 {0, 4611686019501129724},
25900 },
25901 },
25902 },
25903 {
25904 name: "LoweredAtomicStore32Variant",
25905 argLen: 3,
25906 faultOnNilArg0: true,
25907 hasSideEffects: true,
25908 reg: regInfo{
25909 inputs: []inputInfo{
25910 {1, 1073741816},
25911 {0, 4611686019501129724},
25912 },
25913 },
25914 },
25915 {
25916 name: "LoweredAtomicStore64Variant",
25917 argLen: 3,
25918 faultOnNilArg0: true,
25919 hasSideEffects: true,
25920 reg: regInfo{
25921 inputs: []inputInfo{
25922 {1, 1073741816},
25923 {0, 4611686019501129724},
25924 },
25925 },
25926 },
25927 {
25928 name: "LoweredAtomicExchange32",
25929 argLen: 3,
25930 resultNotInArgs: true,
25931 faultOnNilArg0: true,
25932 hasSideEffects: true,
25933 reg: regInfo{
25934 inputs: []inputInfo{
25935 {1, 1073741816},
25936 {0, 4611686019501129724},
25937 },
25938 outputs: []outputInfo{
25939 {0, 1071644664},
25940 },
25941 },
25942 },
25943 {
25944 name: "LoweredAtomicExchange64",
25945 argLen: 3,
25946 resultNotInArgs: true,
25947 faultOnNilArg0: true,
25948 hasSideEffects: true,
25949 reg: regInfo{
25950 inputs: []inputInfo{
25951 {1, 1073741816},
25952 {0, 4611686019501129724},
25953 },
25954 outputs: []outputInfo{
25955 {0, 1071644664},
25956 },
25957 },
25958 },
25959 {
25960 name: "LoweredAtomicExchange8Variant",
25961 argLen: 3,
25962 resultNotInArgs: true,
25963 faultOnNilArg0: true,
25964 hasSideEffects: true,
25965 reg: regInfo{
25966 inputs: []inputInfo{
25967 {1, 1073741816},
25968 {0, 4611686019501129724},
25969 },
25970 outputs: []outputInfo{
25971 {0, 1071644664},
25972 },
25973 },
25974 },
25975 {
25976 name: "LoweredAtomicAdd32",
25977 argLen: 3,
25978 resultNotInArgs: true,
25979 faultOnNilArg0: true,
25980 hasSideEffects: true,
25981 reg: regInfo{
25982 inputs: []inputInfo{
25983 {1, 1073741816},
25984 {0, 4611686019501129724},
25985 },
25986 outputs: []outputInfo{
25987 {0, 1071644664},
25988 },
25989 },
25990 },
25991 {
25992 name: "LoweredAtomicAdd64",
25993 argLen: 3,
25994 resultNotInArgs: true,
25995 faultOnNilArg0: true,
25996 hasSideEffects: true,
25997 reg: regInfo{
25998 inputs: []inputInfo{
25999 {1, 1073741816},
26000 {0, 4611686019501129724},
26001 },
26002 outputs: []outputInfo{
26003 {0, 1071644664},
26004 },
26005 },
26006 },
26007 {
26008 name: "LoweredAtomicCas32",
26009 argLen: 4,
26010 resultNotInArgs: true,
26011 faultOnNilArg0: true,
26012 hasSideEffects: true,
26013 unsafePoint: true,
26014 reg: regInfo{
26015 inputs: []inputInfo{
26016 {1, 1073741816},
26017 {2, 1073741816},
26018 {0, 4611686019501129724},
26019 },
26020 outputs: []outputInfo{
26021 {0, 1071644664},
26022 },
26023 },
26024 },
26025 {
26026 name: "LoweredAtomicCas64",
26027 argLen: 4,
26028 resultNotInArgs: true,
26029 faultOnNilArg0: true,
26030 hasSideEffects: true,
26031 unsafePoint: true,
26032 reg: regInfo{
26033 inputs: []inputInfo{
26034 {1, 1073741816},
26035 {2, 1073741816},
26036 {0, 4611686019501129724},
26037 },
26038 outputs: []outputInfo{
26039 {0, 1071644664},
26040 },
26041 },
26042 },
26043 {
26044 name: "LoweredAtomicCas64Variant",
26045 argLen: 4,
26046 resultNotInArgs: true,
26047 faultOnNilArg0: true,
26048 hasSideEffects: true,
26049 unsafePoint: true,
26050 reg: regInfo{
26051 inputs: []inputInfo{
26052 {1, 1073741816},
26053 {2, 1073741816},
26054 {0, 4611686019501129724},
26055 },
26056 outputs: []outputInfo{
26057 {0, 1071644664},
26058 },
26059 },
26060 },
26061 {
26062 name: "LoweredAtomicCas32Variant",
26063 argLen: 4,
26064 resultNotInArgs: true,
26065 faultOnNilArg0: true,
26066 hasSideEffects: true,
26067 unsafePoint: true,
26068 reg: regInfo{
26069 inputs: []inputInfo{
26070 {1, 1073741816},
26071 {2, 1073741816},
26072 {0, 4611686019501129724},
26073 },
26074 outputs: []outputInfo{
26075 {0, 1071644664},
26076 },
26077 },
26078 },
26079 {
26080 name: "LoweredAtomicAnd32",
26081 argLen: 3,
26082 resultNotInArgs: true,
26083 faultOnNilArg0: true,
26084 hasSideEffects: true,
26085 asm: loong64.AAMANDDBW,
26086 reg: regInfo{
26087 inputs: []inputInfo{
26088 {1, 1073741816},
26089 {0, 4611686019501129724},
26090 },
26091 outputs: []outputInfo{
26092 {0, 1071644664},
26093 },
26094 },
26095 },
26096 {
26097 name: "LoweredAtomicOr32",
26098 argLen: 3,
26099 resultNotInArgs: true,
26100 faultOnNilArg0: true,
26101 hasSideEffects: true,
26102 asm: loong64.AAMORDBW,
26103 reg: regInfo{
26104 inputs: []inputInfo{
26105 {1, 1073741816},
26106 {0, 4611686019501129724},
26107 },
26108 outputs: []outputInfo{
26109 {0, 1071644664},
26110 },
26111 },
26112 },
26113 {
26114 name: "LoweredAtomicAnd32value",
26115 argLen: 3,
26116 resultNotInArgs: true,
26117 faultOnNilArg0: true,
26118 hasSideEffects: true,
26119 asm: loong64.AAMANDDBW,
26120 reg: regInfo{
26121 inputs: []inputInfo{
26122 {1, 1073741816},
26123 {0, 4611686019501129724},
26124 },
26125 outputs: []outputInfo{
26126 {0, 1071644664},
26127 },
26128 },
26129 },
26130 {
26131 name: "LoweredAtomicAnd64value",
26132 argLen: 3,
26133 resultNotInArgs: true,
26134 faultOnNilArg0: true,
26135 hasSideEffects: true,
26136 asm: loong64.AAMANDDBV,
26137 reg: regInfo{
26138 inputs: []inputInfo{
26139 {1, 1073741816},
26140 {0, 4611686019501129724},
26141 },
26142 outputs: []outputInfo{
26143 {0, 1071644664},
26144 },
26145 },
26146 },
26147 {
26148 name: "LoweredAtomicOr32value",
26149 argLen: 3,
26150 resultNotInArgs: true,
26151 faultOnNilArg0: true,
26152 hasSideEffects: true,
26153 asm: loong64.AAMORDBW,
26154 reg: regInfo{
26155 inputs: []inputInfo{
26156 {1, 1073741816},
26157 {0, 4611686019501129724},
26158 },
26159 outputs: []outputInfo{
26160 {0, 1071644664},
26161 },
26162 },
26163 },
26164 {
26165 name: "LoweredAtomicOr64value",
26166 argLen: 3,
26167 resultNotInArgs: true,
26168 faultOnNilArg0: true,
26169 hasSideEffects: true,
26170 asm: loong64.AAMORDBV,
26171 reg: regInfo{
26172 inputs: []inputInfo{
26173 {1, 1073741816},
26174 {0, 4611686019501129724},
26175 },
26176 outputs: []outputInfo{
26177 {0, 1071644664},
26178 },
26179 },
26180 },
26181 {
26182 name: "LoweredNilCheck",
26183 argLen: 2,
26184 nilCheck: true,
26185 faultOnNilArg0: true,
26186 reg: regInfo{
26187 inputs: []inputInfo{
26188 {0, 1073741816},
26189 },
26190 },
26191 },
26192 {
26193 name: "FPFlagTrue",
26194 argLen: 1,
26195 reg: regInfo{
26196 outputs: []outputInfo{
26197 {0, 1071644664},
26198 },
26199 },
26200 },
26201 {
26202 name: "FPFlagFalse",
26203 argLen: 1,
26204 reg: regInfo{
26205 outputs: []outputInfo{
26206 {0, 1071644664},
26207 },
26208 },
26209 },
26210 {
26211 name: "LoweredGetClosurePtr",
26212 argLen: 0,
26213 zeroWidth: true,
26214 reg: regInfo{
26215 outputs: []outputInfo{
26216 {0, 268435456},
26217 },
26218 },
26219 },
26220 {
26221 name: "LoweredGetCallerSP",
26222 argLen: 1,
26223 rematerializeable: true,
26224 reg: regInfo{
26225 outputs: []outputInfo{
26226 {0, 1071644664},
26227 },
26228 },
26229 },
26230 {
26231 name: "LoweredGetCallerPC",
26232 argLen: 0,
26233 rematerializeable: true,
26234 reg: regInfo{
26235 outputs: []outputInfo{
26236 {0, 1071644664},
26237 },
26238 },
26239 },
26240 {
26241 name: "LoweredWB",
26242 auxType: auxInt64,
26243 argLen: 1,
26244 clobberFlags: true,
26245 reg: regInfo{
26246 clobbers: 4611686017353646082,
26247 outputs: []outputInfo{
26248 {0, 268435456},
26249 },
26250 },
26251 },
26252 {
26253 name: "LoweredPubBarrier",
26254 argLen: 1,
26255 hasSideEffects: true,
26256 asm: loong64.ADBAR,
26257 reg: regInfo{},
26258 },
26259 {
26260 name: "LoweredPanicBoundsA",
26261 auxType: auxInt64,
26262 argLen: 3,
26263 call: true,
26264 reg: regInfo{
26265 inputs: []inputInfo{
26266 {0, 4194304},
26267 {1, 8388608},
26268 },
26269 },
26270 },
26271 {
26272 name: "LoweredPanicBoundsB",
26273 auxType: auxInt64,
26274 argLen: 3,
26275 call: true,
26276 reg: regInfo{
26277 inputs: []inputInfo{
26278 {0, 1048576},
26279 {1, 4194304},
26280 },
26281 },
26282 },
26283 {
26284 name: "LoweredPanicBoundsC",
26285 auxType: auxInt64,
26286 argLen: 3,
26287 call: true,
26288 reg: regInfo{
26289 inputs: []inputInfo{
26290 {0, 524288},
26291 {1, 1048576},
26292 },
26293 },
26294 },
26295
26296 {
26297 name: "ADD",
26298 argLen: 2,
26299 commutative: true,
26300 asm: mips.AADDU,
26301 reg: regInfo{
26302 inputs: []inputInfo{
26303 {0, 469762046},
26304 {1, 469762046},
26305 },
26306 outputs: []outputInfo{
26307 {0, 335544318},
26308 },
26309 },
26310 },
26311 {
26312 name: "ADDconst",
26313 auxType: auxInt32,
26314 argLen: 1,
26315 asm: mips.AADDU,
26316 reg: regInfo{
26317 inputs: []inputInfo{
26318 {0, 536870910},
26319 },
26320 outputs: []outputInfo{
26321 {0, 335544318},
26322 },
26323 },
26324 },
26325 {
26326 name: "SUB",
26327 argLen: 2,
26328 asm: mips.ASUBU,
26329 reg: regInfo{
26330 inputs: []inputInfo{
26331 {0, 469762046},
26332 {1, 469762046},
26333 },
26334 outputs: []outputInfo{
26335 {0, 335544318},
26336 },
26337 },
26338 },
26339 {
26340 name: "SUBconst",
26341 auxType: auxInt32,
26342 argLen: 1,
26343 asm: mips.ASUBU,
26344 reg: regInfo{
26345 inputs: []inputInfo{
26346 {0, 469762046},
26347 },
26348 outputs: []outputInfo{
26349 {0, 335544318},
26350 },
26351 },
26352 },
26353 {
26354 name: "MUL",
26355 argLen: 2,
26356 commutative: true,
26357 asm: mips.AMUL,
26358 reg: regInfo{
26359 inputs: []inputInfo{
26360 {0, 469762046},
26361 {1, 469762046},
26362 },
26363 clobbers: 105553116266496,
26364 outputs: []outputInfo{
26365 {0, 335544318},
26366 },
26367 },
26368 },
26369 {
26370 name: "MULT",
26371 argLen: 2,
26372 commutative: true,
26373 asm: mips.AMUL,
26374 reg: regInfo{
26375 inputs: []inputInfo{
26376 {0, 469762046},
26377 {1, 469762046},
26378 },
26379 outputs: []outputInfo{
26380 {0, 35184372088832},
26381 {1, 70368744177664},
26382 },
26383 },
26384 },
26385 {
26386 name: "MULTU",
26387 argLen: 2,
26388 commutative: true,
26389 asm: mips.AMULU,
26390 reg: regInfo{
26391 inputs: []inputInfo{
26392 {0, 469762046},
26393 {1, 469762046},
26394 },
26395 outputs: []outputInfo{
26396 {0, 35184372088832},
26397 {1, 70368744177664},
26398 },
26399 },
26400 },
26401 {
26402 name: "DIV",
26403 argLen: 2,
26404 asm: mips.ADIV,
26405 reg: regInfo{
26406 inputs: []inputInfo{
26407 {0, 469762046},
26408 {1, 469762046},
26409 },
26410 outputs: []outputInfo{
26411 {0, 35184372088832},
26412 {1, 70368744177664},
26413 },
26414 },
26415 },
26416 {
26417 name: "DIVU",
26418 argLen: 2,
26419 asm: mips.ADIVU,
26420 reg: regInfo{
26421 inputs: []inputInfo{
26422 {0, 469762046},
26423 {1, 469762046},
26424 },
26425 outputs: []outputInfo{
26426 {0, 35184372088832},
26427 {1, 70368744177664},
26428 },
26429 },
26430 },
26431 {
26432 name: "ADDF",
26433 argLen: 2,
26434 commutative: true,
26435 asm: mips.AADDF,
26436 reg: regInfo{
26437 inputs: []inputInfo{
26438 {0, 35183835217920},
26439 {1, 35183835217920},
26440 },
26441 outputs: []outputInfo{
26442 {0, 35183835217920},
26443 },
26444 },
26445 },
26446 {
26447 name: "ADDD",
26448 argLen: 2,
26449 commutative: true,
26450 asm: mips.AADDD,
26451 reg: regInfo{
26452 inputs: []inputInfo{
26453 {0, 35183835217920},
26454 {1, 35183835217920},
26455 },
26456 outputs: []outputInfo{
26457 {0, 35183835217920},
26458 },
26459 },
26460 },
26461 {
26462 name: "SUBF",
26463 argLen: 2,
26464 asm: mips.ASUBF,
26465 reg: regInfo{
26466 inputs: []inputInfo{
26467 {0, 35183835217920},
26468 {1, 35183835217920},
26469 },
26470 outputs: []outputInfo{
26471 {0, 35183835217920},
26472 },
26473 },
26474 },
26475 {
26476 name: "SUBD",
26477 argLen: 2,
26478 asm: mips.ASUBD,
26479 reg: regInfo{
26480 inputs: []inputInfo{
26481 {0, 35183835217920},
26482 {1, 35183835217920},
26483 },
26484 outputs: []outputInfo{
26485 {0, 35183835217920},
26486 },
26487 },
26488 },
26489 {
26490 name: "MULF",
26491 argLen: 2,
26492 commutative: true,
26493 asm: mips.AMULF,
26494 reg: regInfo{
26495 inputs: []inputInfo{
26496 {0, 35183835217920},
26497 {1, 35183835217920},
26498 },
26499 outputs: []outputInfo{
26500 {0, 35183835217920},
26501 },
26502 },
26503 },
26504 {
26505 name: "MULD",
26506 argLen: 2,
26507 commutative: true,
26508 asm: mips.AMULD,
26509 reg: regInfo{
26510 inputs: []inputInfo{
26511 {0, 35183835217920},
26512 {1, 35183835217920},
26513 },
26514 outputs: []outputInfo{
26515 {0, 35183835217920},
26516 },
26517 },
26518 },
26519 {
26520 name: "DIVF",
26521 argLen: 2,
26522 asm: mips.ADIVF,
26523 reg: regInfo{
26524 inputs: []inputInfo{
26525 {0, 35183835217920},
26526 {1, 35183835217920},
26527 },
26528 outputs: []outputInfo{
26529 {0, 35183835217920},
26530 },
26531 },
26532 },
26533 {
26534 name: "DIVD",
26535 argLen: 2,
26536 asm: mips.ADIVD,
26537 reg: regInfo{
26538 inputs: []inputInfo{
26539 {0, 35183835217920},
26540 {1, 35183835217920},
26541 },
26542 outputs: []outputInfo{
26543 {0, 35183835217920},
26544 },
26545 },
26546 },
26547 {
26548 name: "AND",
26549 argLen: 2,
26550 commutative: true,
26551 asm: mips.AAND,
26552 reg: regInfo{
26553 inputs: []inputInfo{
26554 {0, 469762046},
26555 {1, 469762046},
26556 },
26557 outputs: []outputInfo{
26558 {0, 335544318},
26559 },
26560 },
26561 },
26562 {
26563 name: "ANDconst",
26564 auxType: auxInt32,
26565 argLen: 1,
26566 asm: mips.AAND,
26567 reg: regInfo{
26568 inputs: []inputInfo{
26569 {0, 469762046},
26570 },
26571 outputs: []outputInfo{
26572 {0, 335544318},
26573 },
26574 },
26575 },
26576 {
26577 name: "OR",
26578 argLen: 2,
26579 commutative: true,
26580 asm: mips.AOR,
26581 reg: regInfo{
26582 inputs: []inputInfo{
26583 {0, 469762046},
26584 {1, 469762046},
26585 },
26586 outputs: []outputInfo{
26587 {0, 335544318},
26588 },
26589 },
26590 },
26591 {
26592 name: "ORconst",
26593 auxType: auxInt32,
26594 argLen: 1,
26595 asm: mips.AOR,
26596 reg: regInfo{
26597 inputs: []inputInfo{
26598 {0, 469762046},
26599 },
26600 outputs: []outputInfo{
26601 {0, 335544318},
26602 },
26603 },
26604 },
26605 {
26606 name: "XOR",
26607 argLen: 2,
26608 commutative: true,
26609 asm: mips.AXOR,
26610 reg: regInfo{
26611 inputs: []inputInfo{
26612 {0, 469762046},
26613 {1, 469762046},
26614 },
26615 outputs: []outputInfo{
26616 {0, 335544318},
26617 },
26618 },
26619 },
26620 {
26621 name: "XORconst",
26622 auxType: auxInt32,
26623 argLen: 1,
26624 asm: mips.AXOR,
26625 reg: regInfo{
26626 inputs: []inputInfo{
26627 {0, 469762046},
26628 },
26629 outputs: []outputInfo{
26630 {0, 335544318},
26631 },
26632 },
26633 },
26634 {
26635 name: "NOR",
26636 argLen: 2,
26637 commutative: true,
26638 asm: mips.ANOR,
26639 reg: regInfo{
26640 inputs: []inputInfo{
26641 {0, 469762046},
26642 {1, 469762046},
26643 },
26644 outputs: []outputInfo{
26645 {0, 335544318},
26646 },
26647 },
26648 },
26649 {
26650 name: "NORconst",
26651 auxType: auxInt32,
26652 argLen: 1,
26653 asm: mips.ANOR,
26654 reg: regInfo{
26655 inputs: []inputInfo{
26656 {0, 469762046},
26657 },
26658 outputs: []outputInfo{
26659 {0, 335544318},
26660 },
26661 },
26662 },
26663 {
26664 name: "NEG",
26665 argLen: 1,
26666 reg: regInfo{
26667 inputs: []inputInfo{
26668 {0, 469762046},
26669 },
26670 outputs: []outputInfo{
26671 {0, 335544318},
26672 },
26673 },
26674 },
26675 {
26676 name: "NEGF",
26677 argLen: 1,
26678 asm: mips.ANEGF,
26679 reg: regInfo{
26680 inputs: []inputInfo{
26681 {0, 35183835217920},
26682 },
26683 outputs: []outputInfo{
26684 {0, 35183835217920},
26685 },
26686 },
26687 },
26688 {
26689 name: "NEGD",
26690 argLen: 1,
26691 asm: mips.ANEGD,
26692 reg: regInfo{
26693 inputs: []inputInfo{
26694 {0, 35183835217920},
26695 },
26696 outputs: []outputInfo{
26697 {0, 35183835217920},
26698 },
26699 },
26700 },
26701 {
26702 name: "ABSD",
26703 argLen: 1,
26704 asm: mips.AABSD,
26705 reg: regInfo{
26706 inputs: []inputInfo{
26707 {0, 35183835217920},
26708 },
26709 outputs: []outputInfo{
26710 {0, 35183835217920},
26711 },
26712 },
26713 },
26714 {
26715 name: "SQRTD",
26716 argLen: 1,
26717 asm: mips.ASQRTD,
26718 reg: regInfo{
26719 inputs: []inputInfo{
26720 {0, 35183835217920},
26721 },
26722 outputs: []outputInfo{
26723 {0, 35183835217920},
26724 },
26725 },
26726 },
26727 {
26728 name: "SQRTF",
26729 argLen: 1,
26730 asm: mips.ASQRTF,
26731 reg: regInfo{
26732 inputs: []inputInfo{
26733 {0, 35183835217920},
26734 },
26735 outputs: []outputInfo{
26736 {0, 35183835217920},
26737 },
26738 },
26739 },
26740 {
26741 name: "SLL",
26742 argLen: 2,
26743 asm: mips.ASLL,
26744 reg: regInfo{
26745 inputs: []inputInfo{
26746 {0, 469762046},
26747 {1, 469762046},
26748 },
26749 outputs: []outputInfo{
26750 {0, 335544318},
26751 },
26752 },
26753 },
26754 {
26755 name: "SLLconst",
26756 auxType: auxInt32,
26757 argLen: 1,
26758 asm: mips.ASLL,
26759 reg: regInfo{
26760 inputs: []inputInfo{
26761 {0, 469762046},
26762 },
26763 outputs: []outputInfo{
26764 {0, 335544318},
26765 },
26766 },
26767 },
26768 {
26769 name: "SRL",
26770 argLen: 2,
26771 asm: mips.ASRL,
26772 reg: regInfo{
26773 inputs: []inputInfo{
26774 {0, 469762046},
26775 {1, 469762046},
26776 },
26777 outputs: []outputInfo{
26778 {0, 335544318},
26779 },
26780 },
26781 },
26782 {
26783 name: "SRLconst",
26784 auxType: auxInt32,
26785 argLen: 1,
26786 asm: mips.ASRL,
26787 reg: regInfo{
26788 inputs: []inputInfo{
26789 {0, 469762046},
26790 },
26791 outputs: []outputInfo{
26792 {0, 335544318},
26793 },
26794 },
26795 },
26796 {
26797 name: "SRA",
26798 argLen: 2,
26799 asm: mips.ASRA,
26800 reg: regInfo{
26801 inputs: []inputInfo{
26802 {0, 469762046},
26803 {1, 469762046},
26804 },
26805 outputs: []outputInfo{
26806 {0, 335544318},
26807 },
26808 },
26809 },
26810 {
26811 name: "SRAconst",
26812 auxType: auxInt32,
26813 argLen: 1,
26814 asm: mips.ASRA,
26815 reg: regInfo{
26816 inputs: []inputInfo{
26817 {0, 469762046},
26818 },
26819 outputs: []outputInfo{
26820 {0, 335544318},
26821 },
26822 },
26823 },
26824 {
26825 name: "CLZ",
26826 argLen: 1,
26827 asm: mips.ACLZ,
26828 reg: regInfo{
26829 inputs: []inputInfo{
26830 {0, 469762046},
26831 },
26832 outputs: []outputInfo{
26833 {0, 335544318},
26834 },
26835 },
26836 },
26837 {
26838 name: "SGT",
26839 argLen: 2,
26840 asm: mips.ASGT,
26841 reg: regInfo{
26842 inputs: []inputInfo{
26843 {0, 469762046},
26844 {1, 469762046},
26845 },
26846 outputs: []outputInfo{
26847 {0, 335544318},
26848 },
26849 },
26850 },
26851 {
26852 name: "SGTconst",
26853 auxType: auxInt32,
26854 argLen: 1,
26855 asm: mips.ASGT,
26856 reg: regInfo{
26857 inputs: []inputInfo{
26858 {0, 469762046},
26859 },
26860 outputs: []outputInfo{
26861 {0, 335544318},
26862 },
26863 },
26864 },
26865 {
26866 name: "SGTzero",
26867 argLen: 1,
26868 asm: mips.ASGT,
26869 reg: regInfo{
26870 inputs: []inputInfo{
26871 {0, 469762046},
26872 },
26873 outputs: []outputInfo{
26874 {0, 335544318},
26875 },
26876 },
26877 },
26878 {
26879 name: "SGTU",
26880 argLen: 2,
26881 asm: mips.ASGTU,
26882 reg: regInfo{
26883 inputs: []inputInfo{
26884 {0, 469762046},
26885 {1, 469762046},
26886 },
26887 outputs: []outputInfo{
26888 {0, 335544318},
26889 },
26890 },
26891 },
26892 {
26893 name: "SGTUconst",
26894 auxType: auxInt32,
26895 argLen: 1,
26896 asm: mips.ASGTU,
26897 reg: regInfo{
26898 inputs: []inputInfo{
26899 {0, 469762046},
26900 },
26901 outputs: []outputInfo{
26902 {0, 335544318},
26903 },
26904 },
26905 },
26906 {
26907 name: "SGTUzero",
26908 argLen: 1,
26909 asm: mips.ASGTU,
26910 reg: regInfo{
26911 inputs: []inputInfo{
26912 {0, 469762046},
26913 },
26914 outputs: []outputInfo{
26915 {0, 335544318},
26916 },
26917 },
26918 },
26919 {
26920 name: "CMPEQF",
26921 argLen: 2,
26922 asm: mips.ACMPEQF,
26923 reg: regInfo{
26924 inputs: []inputInfo{
26925 {0, 35183835217920},
26926 {1, 35183835217920},
26927 },
26928 },
26929 },
26930 {
26931 name: "CMPEQD",
26932 argLen: 2,
26933 asm: mips.ACMPEQD,
26934 reg: regInfo{
26935 inputs: []inputInfo{
26936 {0, 35183835217920},
26937 {1, 35183835217920},
26938 },
26939 },
26940 },
26941 {
26942 name: "CMPGEF",
26943 argLen: 2,
26944 asm: mips.ACMPGEF,
26945 reg: regInfo{
26946 inputs: []inputInfo{
26947 {0, 35183835217920},
26948 {1, 35183835217920},
26949 },
26950 },
26951 },
26952 {
26953 name: "CMPGED",
26954 argLen: 2,
26955 asm: mips.ACMPGED,
26956 reg: regInfo{
26957 inputs: []inputInfo{
26958 {0, 35183835217920},
26959 {1, 35183835217920},
26960 },
26961 },
26962 },
26963 {
26964 name: "CMPGTF",
26965 argLen: 2,
26966 asm: mips.ACMPGTF,
26967 reg: regInfo{
26968 inputs: []inputInfo{
26969 {0, 35183835217920},
26970 {1, 35183835217920},
26971 },
26972 },
26973 },
26974 {
26975 name: "CMPGTD",
26976 argLen: 2,
26977 asm: mips.ACMPGTD,
26978 reg: regInfo{
26979 inputs: []inputInfo{
26980 {0, 35183835217920},
26981 {1, 35183835217920},
26982 },
26983 },
26984 },
26985 {
26986 name: "MOVWconst",
26987 auxType: auxInt32,
26988 argLen: 0,
26989 rematerializeable: true,
26990 asm: mips.AMOVW,
26991 reg: regInfo{
26992 outputs: []outputInfo{
26993 {0, 335544318},
26994 },
26995 },
26996 },
26997 {
26998 name: "MOVFconst",
26999 auxType: auxFloat32,
27000 argLen: 0,
27001 rematerializeable: true,
27002 asm: mips.AMOVF,
27003 reg: regInfo{
27004 outputs: []outputInfo{
27005 {0, 35183835217920},
27006 },
27007 },
27008 },
27009 {
27010 name: "MOVDconst",
27011 auxType: auxFloat64,
27012 argLen: 0,
27013 rematerializeable: true,
27014 asm: mips.AMOVD,
27015 reg: regInfo{
27016 outputs: []outputInfo{
27017 {0, 35183835217920},
27018 },
27019 },
27020 },
27021 {
27022 name: "MOVWaddr",
27023 auxType: auxSymOff,
27024 argLen: 1,
27025 rematerializeable: true,
27026 symEffect: SymAddr,
27027 asm: mips.AMOVW,
27028 reg: regInfo{
27029 inputs: []inputInfo{
27030 {0, 140737555464192},
27031 },
27032 outputs: []outputInfo{
27033 {0, 335544318},
27034 },
27035 },
27036 },
27037 {
27038 name: "MOVBload",
27039 auxType: auxSymOff,
27040 argLen: 2,
27041 faultOnNilArg0: true,
27042 symEffect: SymRead,
27043 asm: mips.AMOVB,
27044 reg: regInfo{
27045 inputs: []inputInfo{
27046 {0, 140738025226238},
27047 },
27048 outputs: []outputInfo{
27049 {0, 335544318},
27050 },
27051 },
27052 },
27053 {
27054 name: "MOVBUload",
27055 auxType: auxSymOff,
27056 argLen: 2,
27057 faultOnNilArg0: true,
27058 symEffect: SymRead,
27059 asm: mips.AMOVBU,
27060 reg: regInfo{
27061 inputs: []inputInfo{
27062 {0, 140738025226238},
27063 },
27064 outputs: []outputInfo{
27065 {0, 335544318},
27066 },
27067 },
27068 },
27069 {
27070 name: "MOVHload",
27071 auxType: auxSymOff,
27072 argLen: 2,
27073 faultOnNilArg0: true,
27074 symEffect: SymRead,
27075 asm: mips.AMOVH,
27076 reg: regInfo{
27077 inputs: []inputInfo{
27078 {0, 140738025226238},
27079 },
27080 outputs: []outputInfo{
27081 {0, 335544318},
27082 },
27083 },
27084 },
27085 {
27086 name: "MOVHUload",
27087 auxType: auxSymOff,
27088 argLen: 2,
27089 faultOnNilArg0: true,
27090 symEffect: SymRead,
27091 asm: mips.AMOVHU,
27092 reg: regInfo{
27093 inputs: []inputInfo{
27094 {0, 140738025226238},
27095 },
27096 outputs: []outputInfo{
27097 {0, 335544318},
27098 },
27099 },
27100 },
27101 {
27102 name: "MOVWload",
27103 auxType: auxSymOff,
27104 argLen: 2,
27105 faultOnNilArg0: true,
27106 symEffect: SymRead,
27107 asm: mips.AMOVW,
27108 reg: regInfo{
27109 inputs: []inputInfo{
27110 {0, 140738025226238},
27111 },
27112 outputs: []outputInfo{
27113 {0, 335544318},
27114 },
27115 },
27116 },
27117 {
27118 name: "MOVFload",
27119 auxType: auxSymOff,
27120 argLen: 2,
27121 faultOnNilArg0: true,
27122 symEffect: SymRead,
27123 asm: mips.AMOVF,
27124 reg: regInfo{
27125 inputs: []inputInfo{
27126 {0, 140738025226238},
27127 },
27128 outputs: []outputInfo{
27129 {0, 35183835217920},
27130 },
27131 },
27132 },
27133 {
27134 name: "MOVDload",
27135 auxType: auxSymOff,
27136 argLen: 2,
27137 faultOnNilArg0: true,
27138 symEffect: SymRead,
27139 asm: mips.AMOVD,
27140 reg: regInfo{
27141 inputs: []inputInfo{
27142 {0, 140738025226238},
27143 },
27144 outputs: []outputInfo{
27145 {0, 35183835217920},
27146 },
27147 },
27148 },
27149 {
27150 name: "MOVBstore",
27151 auxType: auxSymOff,
27152 argLen: 3,
27153 faultOnNilArg0: true,
27154 symEffect: SymWrite,
27155 asm: mips.AMOVB,
27156 reg: regInfo{
27157 inputs: []inputInfo{
27158 {1, 469762046},
27159 {0, 140738025226238},
27160 },
27161 },
27162 },
27163 {
27164 name: "MOVHstore",
27165 auxType: auxSymOff,
27166 argLen: 3,
27167 faultOnNilArg0: true,
27168 symEffect: SymWrite,
27169 asm: mips.AMOVH,
27170 reg: regInfo{
27171 inputs: []inputInfo{
27172 {1, 469762046},
27173 {0, 140738025226238},
27174 },
27175 },
27176 },
27177 {
27178 name: "MOVWstore",
27179 auxType: auxSymOff,
27180 argLen: 3,
27181 faultOnNilArg0: true,
27182 symEffect: SymWrite,
27183 asm: mips.AMOVW,
27184 reg: regInfo{
27185 inputs: []inputInfo{
27186 {1, 469762046},
27187 {0, 140738025226238},
27188 },
27189 },
27190 },
27191 {
27192 name: "MOVFstore",
27193 auxType: auxSymOff,
27194 argLen: 3,
27195 faultOnNilArg0: true,
27196 symEffect: SymWrite,
27197 asm: mips.AMOVF,
27198 reg: regInfo{
27199 inputs: []inputInfo{
27200 {1, 35183835217920},
27201 {0, 140738025226238},
27202 },
27203 },
27204 },
27205 {
27206 name: "MOVDstore",
27207 auxType: auxSymOff,
27208 argLen: 3,
27209 faultOnNilArg0: true,
27210 symEffect: SymWrite,
27211 asm: mips.AMOVD,
27212 reg: regInfo{
27213 inputs: []inputInfo{
27214 {1, 35183835217920},
27215 {0, 140738025226238},
27216 },
27217 },
27218 },
27219 {
27220 name: "MOVBstorezero",
27221 auxType: auxSymOff,
27222 argLen: 2,
27223 faultOnNilArg0: true,
27224 symEffect: SymWrite,
27225 asm: mips.AMOVB,
27226 reg: regInfo{
27227 inputs: []inputInfo{
27228 {0, 140738025226238},
27229 },
27230 },
27231 },
27232 {
27233 name: "MOVHstorezero",
27234 auxType: auxSymOff,
27235 argLen: 2,
27236 faultOnNilArg0: true,
27237 symEffect: SymWrite,
27238 asm: mips.AMOVH,
27239 reg: regInfo{
27240 inputs: []inputInfo{
27241 {0, 140738025226238},
27242 },
27243 },
27244 },
27245 {
27246 name: "MOVWstorezero",
27247 auxType: auxSymOff,
27248 argLen: 2,
27249 faultOnNilArg0: true,
27250 symEffect: SymWrite,
27251 asm: mips.AMOVW,
27252 reg: regInfo{
27253 inputs: []inputInfo{
27254 {0, 140738025226238},
27255 },
27256 },
27257 },
27258 {
27259 name: "MOVWfpgp",
27260 argLen: 1,
27261 asm: mips.AMOVW,
27262 reg: regInfo{
27263 inputs: []inputInfo{
27264 {0, 35183835217920},
27265 },
27266 outputs: []outputInfo{
27267 {0, 335544318},
27268 },
27269 },
27270 },
27271 {
27272 name: "MOVWgpfp",
27273 argLen: 1,
27274 asm: mips.AMOVW,
27275 reg: regInfo{
27276 inputs: []inputInfo{
27277 {0, 335544318},
27278 },
27279 outputs: []outputInfo{
27280 {0, 35183835217920},
27281 },
27282 },
27283 },
27284 {
27285 name: "MOVBreg",
27286 argLen: 1,
27287 asm: mips.AMOVB,
27288 reg: regInfo{
27289 inputs: []inputInfo{
27290 {0, 469762046},
27291 },
27292 outputs: []outputInfo{
27293 {0, 335544318},
27294 },
27295 },
27296 },
27297 {
27298 name: "MOVBUreg",
27299 argLen: 1,
27300 asm: mips.AMOVBU,
27301 reg: regInfo{
27302 inputs: []inputInfo{
27303 {0, 469762046},
27304 },
27305 outputs: []outputInfo{
27306 {0, 335544318},
27307 },
27308 },
27309 },
27310 {
27311 name: "MOVHreg",
27312 argLen: 1,
27313 asm: mips.AMOVH,
27314 reg: regInfo{
27315 inputs: []inputInfo{
27316 {0, 469762046},
27317 },
27318 outputs: []outputInfo{
27319 {0, 335544318},
27320 },
27321 },
27322 },
27323 {
27324 name: "MOVHUreg",
27325 argLen: 1,
27326 asm: mips.AMOVHU,
27327 reg: regInfo{
27328 inputs: []inputInfo{
27329 {0, 469762046},
27330 },
27331 outputs: []outputInfo{
27332 {0, 335544318},
27333 },
27334 },
27335 },
27336 {
27337 name: "MOVWreg",
27338 argLen: 1,
27339 asm: mips.AMOVW,
27340 reg: regInfo{
27341 inputs: []inputInfo{
27342 {0, 469762046},
27343 },
27344 outputs: []outputInfo{
27345 {0, 335544318},
27346 },
27347 },
27348 },
27349 {
27350 name: "MOVWnop",
27351 argLen: 1,
27352 resultInArg0: true,
27353 reg: regInfo{
27354 inputs: []inputInfo{
27355 {0, 335544318},
27356 },
27357 outputs: []outputInfo{
27358 {0, 335544318},
27359 },
27360 },
27361 },
27362 {
27363 name: "CMOVZ",
27364 argLen: 3,
27365 resultInArg0: true,
27366 asm: mips.ACMOVZ,
27367 reg: regInfo{
27368 inputs: []inputInfo{
27369 {0, 335544318},
27370 {1, 335544318},
27371 {2, 335544318},
27372 },
27373 outputs: []outputInfo{
27374 {0, 335544318},
27375 },
27376 },
27377 },
27378 {
27379 name: "CMOVZzero",
27380 argLen: 2,
27381 resultInArg0: true,
27382 asm: mips.ACMOVZ,
27383 reg: regInfo{
27384 inputs: []inputInfo{
27385 {0, 335544318},
27386 {1, 469762046},
27387 },
27388 outputs: []outputInfo{
27389 {0, 335544318},
27390 },
27391 },
27392 },
27393 {
27394 name: "MOVWF",
27395 argLen: 1,
27396 asm: mips.AMOVWF,
27397 reg: regInfo{
27398 inputs: []inputInfo{
27399 {0, 35183835217920},
27400 },
27401 outputs: []outputInfo{
27402 {0, 35183835217920},
27403 },
27404 },
27405 },
27406 {
27407 name: "MOVWD",
27408 argLen: 1,
27409 asm: mips.AMOVWD,
27410 reg: regInfo{
27411 inputs: []inputInfo{
27412 {0, 35183835217920},
27413 },
27414 outputs: []outputInfo{
27415 {0, 35183835217920},
27416 },
27417 },
27418 },
27419 {
27420 name: "TRUNCFW",
27421 argLen: 1,
27422 asm: mips.ATRUNCFW,
27423 reg: regInfo{
27424 inputs: []inputInfo{
27425 {0, 35183835217920},
27426 },
27427 outputs: []outputInfo{
27428 {0, 35183835217920},
27429 },
27430 },
27431 },
27432 {
27433 name: "TRUNCDW",
27434 argLen: 1,
27435 asm: mips.ATRUNCDW,
27436 reg: regInfo{
27437 inputs: []inputInfo{
27438 {0, 35183835217920},
27439 },
27440 outputs: []outputInfo{
27441 {0, 35183835217920},
27442 },
27443 },
27444 },
27445 {
27446 name: "MOVFD",
27447 argLen: 1,
27448 asm: mips.AMOVFD,
27449 reg: regInfo{
27450 inputs: []inputInfo{
27451 {0, 35183835217920},
27452 },
27453 outputs: []outputInfo{
27454 {0, 35183835217920},
27455 },
27456 },
27457 },
27458 {
27459 name: "MOVDF",
27460 argLen: 1,
27461 asm: mips.AMOVDF,
27462 reg: regInfo{
27463 inputs: []inputInfo{
27464 {0, 35183835217920},
27465 },
27466 outputs: []outputInfo{
27467 {0, 35183835217920},
27468 },
27469 },
27470 },
27471 {
27472 name: "CALLstatic",
27473 auxType: auxCallOff,
27474 argLen: 1,
27475 clobberFlags: true,
27476 call: true,
27477 reg: regInfo{
27478 clobbers: 140737421246462,
27479 },
27480 },
27481 {
27482 name: "CALLtail",
27483 auxType: auxCallOff,
27484 argLen: 1,
27485 clobberFlags: true,
27486 call: true,
27487 tailCall: true,
27488 reg: regInfo{
27489 clobbers: 140737421246462,
27490 },
27491 },
27492 {
27493 name: "CALLclosure",
27494 auxType: auxCallOff,
27495 argLen: 3,
27496 clobberFlags: true,
27497 call: true,
27498 reg: regInfo{
27499 inputs: []inputInfo{
27500 {1, 4194304},
27501 {0, 402653182},
27502 },
27503 clobbers: 140737421246462,
27504 },
27505 },
27506 {
27507 name: "CALLinter",
27508 auxType: auxCallOff,
27509 argLen: 2,
27510 clobberFlags: true,
27511 call: true,
27512 reg: regInfo{
27513 inputs: []inputInfo{
27514 {0, 335544318},
27515 },
27516 clobbers: 140737421246462,
27517 },
27518 },
27519 {
27520 name: "LoweredAtomicLoad8",
27521 argLen: 2,
27522 faultOnNilArg0: true,
27523 reg: regInfo{
27524 inputs: []inputInfo{
27525 {0, 140738025226238},
27526 },
27527 outputs: []outputInfo{
27528 {0, 335544318},
27529 },
27530 },
27531 },
27532 {
27533 name: "LoweredAtomicLoad32",
27534 argLen: 2,
27535 faultOnNilArg0: true,
27536 reg: regInfo{
27537 inputs: []inputInfo{
27538 {0, 140738025226238},
27539 },
27540 outputs: []outputInfo{
27541 {0, 335544318},
27542 },
27543 },
27544 },
27545 {
27546 name: "LoweredAtomicStore8",
27547 argLen: 3,
27548 faultOnNilArg0: true,
27549 hasSideEffects: true,
27550 reg: regInfo{
27551 inputs: []inputInfo{
27552 {1, 469762046},
27553 {0, 140738025226238},
27554 },
27555 },
27556 },
27557 {
27558 name: "LoweredAtomicStore32",
27559 argLen: 3,
27560 faultOnNilArg0: true,
27561 hasSideEffects: true,
27562 reg: regInfo{
27563 inputs: []inputInfo{
27564 {1, 469762046},
27565 {0, 140738025226238},
27566 },
27567 },
27568 },
27569 {
27570 name: "LoweredAtomicStorezero",
27571 argLen: 2,
27572 faultOnNilArg0: true,
27573 hasSideEffects: true,
27574 reg: regInfo{
27575 inputs: []inputInfo{
27576 {0, 140738025226238},
27577 },
27578 },
27579 },
27580 {
27581 name: "LoweredAtomicExchange",
27582 argLen: 3,
27583 resultNotInArgs: true,
27584 faultOnNilArg0: true,
27585 hasSideEffects: true,
27586 unsafePoint: true,
27587 reg: regInfo{
27588 inputs: []inputInfo{
27589 {1, 469762046},
27590 {0, 140738025226238},
27591 },
27592 outputs: []outputInfo{
27593 {0, 335544318},
27594 },
27595 },
27596 },
27597 {
27598 name: "LoweredAtomicAdd",
27599 argLen: 3,
27600 resultNotInArgs: true,
27601 faultOnNilArg0: true,
27602 hasSideEffects: true,
27603 unsafePoint: true,
27604 reg: regInfo{
27605 inputs: []inputInfo{
27606 {1, 469762046},
27607 {0, 140738025226238},
27608 },
27609 outputs: []outputInfo{
27610 {0, 335544318},
27611 },
27612 },
27613 },
27614 {
27615 name: "LoweredAtomicAddconst",
27616 auxType: auxInt32,
27617 argLen: 2,
27618 resultNotInArgs: true,
27619 faultOnNilArg0: true,
27620 hasSideEffects: true,
27621 unsafePoint: true,
27622 reg: regInfo{
27623 inputs: []inputInfo{
27624 {0, 140738025226238},
27625 },
27626 outputs: []outputInfo{
27627 {0, 335544318},
27628 },
27629 },
27630 },
27631 {
27632 name: "LoweredAtomicCas",
27633 argLen: 4,
27634 resultNotInArgs: true,
27635 faultOnNilArg0: true,
27636 hasSideEffects: true,
27637 unsafePoint: true,
27638 reg: regInfo{
27639 inputs: []inputInfo{
27640 {1, 469762046},
27641 {2, 469762046},
27642 {0, 140738025226238},
27643 },
27644 outputs: []outputInfo{
27645 {0, 335544318},
27646 },
27647 },
27648 },
27649 {
27650 name: "LoweredAtomicAnd",
27651 argLen: 3,
27652 faultOnNilArg0: true,
27653 hasSideEffects: true,
27654 unsafePoint: true,
27655 asm: mips.AAND,
27656 reg: regInfo{
27657 inputs: []inputInfo{
27658 {1, 469762046},
27659 {0, 140738025226238},
27660 },
27661 },
27662 },
27663 {
27664 name: "LoweredAtomicOr",
27665 argLen: 3,
27666 faultOnNilArg0: true,
27667 hasSideEffects: true,
27668 unsafePoint: true,
27669 asm: mips.AOR,
27670 reg: regInfo{
27671 inputs: []inputInfo{
27672 {1, 469762046},
27673 {0, 140738025226238},
27674 },
27675 },
27676 },
27677 {
27678 name: "LoweredZero",
27679 auxType: auxInt32,
27680 argLen: 3,
27681 faultOnNilArg0: true,
27682 reg: regInfo{
27683 inputs: []inputInfo{
27684 {0, 2},
27685 {1, 335544318},
27686 },
27687 clobbers: 2,
27688 },
27689 },
27690 {
27691 name: "LoweredMove",
27692 auxType: auxInt32,
27693 argLen: 4,
27694 faultOnNilArg0: true,
27695 faultOnNilArg1: true,
27696 reg: regInfo{
27697 inputs: []inputInfo{
27698 {0, 4},
27699 {1, 2},
27700 {2, 335544318},
27701 },
27702 clobbers: 6,
27703 },
27704 },
27705 {
27706 name: "LoweredNilCheck",
27707 argLen: 2,
27708 nilCheck: true,
27709 faultOnNilArg0: true,
27710 reg: regInfo{
27711 inputs: []inputInfo{
27712 {0, 469762046},
27713 },
27714 },
27715 },
27716 {
27717 name: "FPFlagTrue",
27718 argLen: 1,
27719 reg: regInfo{
27720 outputs: []outputInfo{
27721 {0, 335544318},
27722 },
27723 },
27724 },
27725 {
27726 name: "FPFlagFalse",
27727 argLen: 1,
27728 reg: regInfo{
27729 outputs: []outputInfo{
27730 {0, 335544318},
27731 },
27732 },
27733 },
27734 {
27735 name: "LoweredGetClosurePtr",
27736 argLen: 0,
27737 zeroWidth: true,
27738 reg: regInfo{
27739 outputs: []outputInfo{
27740 {0, 4194304},
27741 },
27742 },
27743 },
27744 {
27745 name: "LoweredGetCallerSP",
27746 argLen: 1,
27747 rematerializeable: true,
27748 reg: regInfo{
27749 outputs: []outputInfo{
27750 {0, 335544318},
27751 },
27752 },
27753 },
27754 {
27755 name: "LoweredGetCallerPC",
27756 argLen: 0,
27757 rematerializeable: true,
27758 reg: regInfo{
27759 outputs: []outputInfo{
27760 {0, 335544318},
27761 },
27762 },
27763 },
27764 {
27765 name: "LoweredWB",
27766 auxType: auxInt64,
27767 argLen: 1,
27768 clobberFlags: true,
27769 reg: regInfo{
27770 clobbers: 140737219919872,
27771 outputs: []outputInfo{
27772 {0, 16777216},
27773 },
27774 },
27775 },
27776 {
27777 name: "LoweredPanicBoundsA",
27778 auxType: auxInt64,
27779 argLen: 3,
27780 call: true,
27781 reg: regInfo{
27782 inputs: []inputInfo{
27783 {0, 8},
27784 {1, 16},
27785 },
27786 },
27787 },
27788 {
27789 name: "LoweredPanicBoundsB",
27790 auxType: auxInt64,
27791 argLen: 3,
27792 call: true,
27793 reg: regInfo{
27794 inputs: []inputInfo{
27795 {0, 4},
27796 {1, 8},
27797 },
27798 },
27799 },
27800 {
27801 name: "LoweredPanicBoundsC",
27802 auxType: auxInt64,
27803 argLen: 3,
27804 call: true,
27805 reg: regInfo{
27806 inputs: []inputInfo{
27807 {0, 2},
27808 {1, 4},
27809 },
27810 },
27811 },
27812 {
27813 name: "LoweredPanicExtendA",
27814 auxType: auxInt64,
27815 argLen: 4,
27816 call: true,
27817 reg: regInfo{
27818 inputs: []inputInfo{
27819 {0, 32},
27820 {1, 8},
27821 {2, 16},
27822 },
27823 },
27824 },
27825 {
27826 name: "LoweredPanicExtendB",
27827 auxType: auxInt64,
27828 argLen: 4,
27829 call: true,
27830 reg: regInfo{
27831 inputs: []inputInfo{
27832 {0, 32},
27833 {1, 4},
27834 {2, 8},
27835 },
27836 },
27837 },
27838 {
27839 name: "LoweredPanicExtendC",
27840 auxType: auxInt64,
27841 argLen: 4,
27842 call: true,
27843 reg: regInfo{
27844 inputs: []inputInfo{
27845 {0, 32},
27846 {1, 2},
27847 {2, 4},
27848 },
27849 },
27850 },
27851
27852 {
27853 name: "ADDV",
27854 argLen: 2,
27855 commutative: true,
27856 asm: mips.AADDVU,
27857 reg: regInfo{
27858 inputs: []inputInfo{
27859 {0, 234881022},
27860 {1, 234881022},
27861 },
27862 outputs: []outputInfo{
27863 {0, 167772158},
27864 },
27865 },
27866 },
27867 {
27868 name: "ADDVconst",
27869 auxType: auxInt64,
27870 argLen: 1,
27871 asm: mips.AADDVU,
27872 reg: regInfo{
27873 inputs: []inputInfo{
27874 {0, 268435454},
27875 },
27876 outputs: []outputInfo{
27877 {0, 167772158},
27878 },
27879 },
27880 },
27881 {
27882 name: "SUBV",
27883 argLen: 2,
27884 asm: mips.ASUBVU,
27885 reg: regInfo{
27886 inputs: []inputInfo{
27887 {0, 234881022},
27888 {1, 234881022},
27889 },
27890 outputs: []outputInfo{
27891 {0, 167772158},
27892 },
27893 },
27894 },
27895 {
27896 name: "SUBVconst",
27897 auxType: auxInt64,
27898 argLen: 1,
27899 asm: mips.ASUBVU,
27900 reg: regInfo{
27901 inputs: []inputInfo{
27902 {0, 234881022},
27903 },
27904 outputs: []outputInfo{
27905 {0, 167772158},
27906 },
27907 },
27908 },
27909 {
27910 name: "MULV",
27911 argLen: 2,
27912 commutative: true,
27913 asm: mips.AMULV,
27914 reg: regInfo{
27915 inputs: []inputInfo{
27916 {0, 234881022},
27917 {1, 234881022},
27918 },
27919 outputs: []outputInfo{
27920 {0, 1152921504606846976},
27921 {1, 2305843009213693952},
27922 },
27923 },
27924 },
27925 {
27926 name: "MULVU",
27927 argLen: 2,
27928 commutative: true,
27929 asm: mips.AMULVU,
27930 reg: regInfo{
27931 inputs: []inputInfo{
27932 {0, 234881022},
27933 {1, 234881022},
27934 },
27935 outputs: []outputInfo{
27936 {0, 1152921504606846976},
27937 {1, 2305843009213693952},
27938 },
27939 },
27940 },
27941 {
27942 name: "DIVV",
27943 argLen: 2,
27944 asm: mips.ADIVV,
27945 reg: regInfo{
27946 inputs: []inputInfo{
27947 {0, 234881022},
27948 {1, 234881022},
27949 },
27950 outputs: []outputInfo{
27951 {0, 1152921504606846976},
27952 {1, 2305843009213693952},
27953 },
27954 },
27955 },
27956 {
27957 name: "DIVVU",
27958 argLen: 2,
27959 asm: mips.ADIVVU,
27960 reg: regInfo{
27961 inputs: []inputInfo{
27962 {0, 234881022},
27963 {1, 234881022},
27964 },
27965 outputs: []outputInfo{
27966 {0, 1152921504606846976},
27967 {1, 2305843009213693952},
27968 },
27969 },
27970 },
27971 {
27972 name: "ADDF",
27973 argLen: 2,
27974 commutative: true,
27975 asm: mips.AADDF,
27976 reg: regInfo{
27977 inputs: []inputInfo{
27978 {0, 1152921504338411520},
27979 {1, 1152921504338411520},
27980 },
27981 outputs: []outputInfo{
27982 {0, 1152921504338411520},
27983 },
27984 },
27985 },
27986 {
27987 name: "ADDD",
27988 argLen: 2,
27989 commutative: true,
27990 asm: mips.AADDD,
27991 reg: regInfo{
27992 inputs: []inputInfo{
27993 {0, 1152921504338411520},
27994 {1, 1152921504338411520},
27995 },
27996 outputs: []outputInfo{
27997 {0, 1152921504338411520},
27998 },
27999 },
28000 },
28001 {
28002 name: "SUBF",
28003 argLen: 2,
28004 asm: mips.ASUBF,
28005 reg: regInfo{
28006 inputs: []inputInfo{
28007 {0, 1152921504338411520},
28008 {1, 1152921504338411520},
28009 },
28010 outputs: []outputInfo{
28011 {0, 1152921504338411520},
28012 },
28013 },
28014 },
28015 {
28016 name: "SUBD",
28017 argLen: 2,
28018 asm: mips.ASUBD,
28019 reg: regInfo{
28020 inputs: []inputInfo{
28021 {0, 1152921504338411520},
28022 {1, 1152921504338411520},
28023 },
28024 outputs: []outputInfo{
28025 {0, 1152921504338411520},
28026 },
28027 },
28028 },
28029 {
28030 name: "MULF",
28031 argLen: 2,
28032 commutative: true,
28033 asm: mips.AMULF,
28034 reg: regInfo{
28035 inputs: []inputInfo{
28036 {0, 1152921504338411520},
28037 {1, 1152921504338411520},
28038 },
28039 outputs: []outputInfo{
28040 {0, 1152921504338411520},
28041 },
28042 },
28043 },
28044 {
28045 name: "MULD",
28046 argLen: 2,
28047 commutative: true,
28048 asm: mips.AMULD,
28049 reg: regInfo{
28050 inputs: []inputInfo{
28051 {0, 1152921504338411520},
28052 {1, 1152921504338411520},
28053 },
28054 outputs: []outputInfo{
28055 {0, 1152921504338411520},
28056 },
28057 },
28058 },
28059 {
28060 name: "DIVF",
28061 argLen: 2,
28062 asm: mips.ADIVF,
28063 reg: regInfo{
28064 inputs: []inputInfo{
28065 {0, 1152921504338411520},
28066 {1, 1152921504338411520},
28067 },
28068 outputs: []outputInfo{
28069 {0, 1152921504338411520},
28070 },
28071 },
28072 },
28073 {
28074 name: "DIVD",
28075 argLen: 2,
28076 asm: mips.ADIVD,
28077 reg: regInfo{
28078 inputs: []inputInfo{
28079 {0, 1152921504338411520},
28080 {1, 1152921504338411520},
28081 },
28082 outputs: []outputInfo{
28083 {0, 1152921504338411520},
28084 },
28085 },
28086 },
28087 {
28088 name: "AND",
28089 argLen: 2,
28090 commutative: true,
28091 asm: mips.AAND,
28092 reg: regInfo{
28093 inputs: []inputInfo{
28094 {0, 234881022},
28095 {1, 234881022},
28096 },
28097 outputs: []outputInfo{
28098 {0, 167772158},
28099 },
28100 },
28101 },
28102 {
28103 name: "ANDconst",
28104 auxType: auxInt64,
28105 argLen: 1,
28106 asm: mips.AAND,
28107 reg: regInfo{
28108 inputs: []inputInfo{
28109 {0, 234881022},
28110 },
28111 outputs: []outputInfo{
28112 {0, 167772158},
28113 },
28114 },
28115 },
28116 {
28117 name: "OR",
28118 argLen: 2,
28119 commutative: true,
28120 asm: mips.AOR,
28121 reg: regInfo{
28122 inputs: []inputInfo{
28123 {0, 234881022},
28124 {1, 234881022},
28125 },
28126 outputs: []outputInfo{
28127 {0, 167772158},
28128 },
28129 },
28130 },
28131 {
28132 name: "ORconst",
28133 auxType: auxInt64,
28134 argLen: 1,
28135 asm: mips.AOR,
28136 reg: regInfo{
28137 inputs: []inputInfo{
28138 {0, 234881022},
28139 },
28140 outputs: []outputInfo{
28141 {0, 167772158},
28142 },
28143 },
28144 },
28145 {
28146 name: "XOR",
28147 argLen: 2,
28148 commutative: true,
28149 asm: mips.AXOR,
28150 reg: regInfo{
28151 inputs: []inputInfo{
28152 {0, 234881022},
28153 {1, 234881022},
28154 },
28155 outputs: []outputInfo{
28156 {0, 167772158},
28157 },
28158 },
28159 },
28160 {
28161 name: "XORconst",
28162 auxType: auxInt64,
28163 argLen: 1,
28164 asm: mips.AXOR,
28165 reg: regInfo{
28166 inputs: []inputInfo{
28167 {0, 234881022},
28168 },
28169 outputs: []outputInfo{
28170 {0, 167772158},
28171 },
28172 },
28173 },
28174 {
28175 name: "NOR",
28176 argLen: 2,
28177 commutative: true,
28178 asm: mips.ANOR,
28179 reg: regInfo{
28180 inputs: []inputInfo{
28181 {0, 234881022},
28182 {1, 234881022},
28183 },
28184 outputs: []outputInfo{
28185 {0, 167772158},
28186 },
28187 },
28188 },
28189 {
28190 name: "NORconst",
28191 auxType: auxInt64,
28192 argLen: 1,
28193 asm: mips.ANOR,
28194 reg: regInfo{
28195 inputs: []inputInfo{
28196 {0, 234881022},
28197 },
28198 outputs: []outputInfo{
28199 {0, 167772158},
28200 },
28201 },
28202 },
28203 {
28204 name: "NEGV",
28205 argLen: 1,
28206 reg: regInfo{
28207 inputs: []inputInfo{
28208 {0, 234881022},
28209 },
28210 outputs: []outputInfo{
28211 {0, 167772158},
28212 },
28213 },
28214 },
28215 {
28216 name: "NEGF",
28217 argLen: 1,
28218 asm: mips.ANEGF,
28219 reg: regInfo{
28220 inputs: []inputInfo{
28221 {0, 1152921504338411520},
28222 },
28223 outputs: []outputInfo{
28224 {0, 1152921504338411520},
28225 },
28226 },
28227 },
28228 {
28229 name: "NEGD",
28230 argLen: 1,
28231 asm: mips.ANEGD,
28232 reg: regInfo{
28233 inputs: []inputInfo{
28234 {0, 1152921504338411520},
28235 },
28236 outputs: []outputInfo{
28237 {0, 1152921504338411520},
28238 },
28239 },
28240 },
28241 {
28242 name: "ABSD",
28243 argLen: 1,
28244 asm: mips.AABSD,
28245 reg: regInfo{
28246 inputs: []inputInfo{
28247 {0, 1152921504338411520},
28248 },
28249 outputs: []outputInfo{
28250 {0, 1152921504338411520},
28251 },
28252 },
28253 },
28254 {
28255 name: "SQRTD",
28256 argLen: 1,
28257 asm: mips.ASQRTD,
28258 reg: regInfo{
28259 inputs: []inputInfo{
28260 {0, 1152921504338411520},
28261 },
28262 outputs: []outputInfo{
28263 {0, 1152921504338411520},
28264 },
28265 },
28266 },
28267 {
28268 name: "SQRTF",
28269 argLen: 1,
28270 asm: mips.ASQRTF,
28271 reg: regInfo{
28272 inputs: []inputInfo{
28273 {0, 1152921504338411520},
28274 },
28275 outputs: []outputInfo{
28276 {0, 1152921504338411520},
28277 },
28278 },
28279 },
28280 {
28281 name: "SLLV",
28282 argLen: 2,
28283 asm: mips.ASLLV,
28284 reg: regInfo{
28285 inputs: []inputInfo{
28286 {0, 234881022},
28287 {1, 234881022},
28288 },
28289 outputs: []outputInfo{
28290 {0, 167772158},
28291 },
28292 },
28293 },
28294 {
28295 name: "SLLVconst",
28296 auxType: auxInt64,
28297 argLen: 1,
28298 asm: mips.ASLLV,
28299 reg: regInfo{
28300 inputs: []inputInfo{
28301 {0, 234881022},
28302 },
28303 outputs: []outputInfo{
28304 {0, 167772158},
28305 },
28306 },
28307 },
28308 {
28309 name: "SRLV",
28310 argLen: 2,
28311 asm: mips.ASRLV,
28312 reg: regInfo{
28313 inputs: []inputInfo{
28314 {0, 234881022},
28315 {1, 234881022},
28316 },
28317 outputs: []outputInfo{
28318 {0, 167772158},
28319 },
28320 },
28321 },
28322 {
28323 name: "SRLVconst",
28324 auxType: auxInt64,
28325 argLen: 1,
28326 asm: mips.ASRLV,
28327 reg: regInfo{
28328 inputs: []inputInfo{
28329 {0, 234881022},
28330 },
28331 outputs: []outputInfo{
28332 {0, 167772158},
28333 },
28334 },
28335 },
28336 {
28337 name: "SRAV",
28338 argLen: 2,
28339 asm: mips.ASRAV,
28340 reg: regInfo{
28341 inputs: []inputInfo{
28342 {0, 234881022},
28343 {1, 234881022},
28344 },
28345 outputs: []outputInfo{
28346 {0, 167772158},
28347 },
28348 },
28349 },
28350 {
28351 name: "SRAVconst",
28352 auxType: auxInt64,
28353 argLen: 1,
28354 asm: mips.ASRAV,
28355 reg: regInfo{
28356 inputs: []inputInfo{
28357 {0, 234881022},
28358 },
28359 outputs: []outputInfo{
28360 {0, 167772158},
28361 },
28362 },
28363 },
28364 {
28365 name: "SGT",
28366 argLen: 2,
28367 asm: mips.ASGT,
28368 reg: regInfo{
28369 inputs: []inputInfo{
28370 {0, 234881022},
28371 {1, 234881022},
28372 },
28373 outputs: []outputInfo{
28374 {0, 167772158},
28375 },
28376 },
28377 },
28378 {
28379 name: "SGTconst",
28380 auxType: auxInt64,
28381 argLen: 1,
28382 asm: mips.ASGT,
28383 reg: regInfo{
28384 inputs: []inputInfo{
28385 {0, 234881022},
28386 },
28387 outputs: []outputInfo{
28388 {0, 167772158},
28389 },
28390 },
28391 },
28392 {
28393 name: "SGTU",
28394 argLen: 2,
28395 asm: mips.ASGTU,
28396 reg: regInfo{
28397 inputs: []inputInfo{
28398 {0, 234881022},
28399 {1, 234881022},
28400 },
28401 outputs: []outputInfo{
28402 {0, 167772158},
28403 },
28404 },
28405 },
28406 {
28407 name: "SGTUconst",
28408 auxType: auxInt64,
28409 argLen: 1,
28410 asm: mips.ASGTU,
28411 reg: regInfo{
28412 inputs: []inputInfo{
28413 {0, 234881022},
28414 },
28415 outputs: []outputInfo{
28416 {0, 167772158},
28417 },
28418 },
28419 },
28420 {
28421 name: "CMPEQF",
28422 argLen: 2,
28423 asm: mips.ACMPEQF,
28424 reg: regInfo{
28425 inputs: []inputInfo{
28426 {0, 1152921504338411520},
28427 {1, 1152921504338411520},
28428 },
28429 },
28430 },
28431 {
28432 name: "CMPEQD",
28433 argLen: 2,
28434 asm: mips.ACMPEQD,
28435 reg: regInfo{
28436 inputs: []inputInfo{
28437 {0, 1152921504338411520},
28438 {1, 1152921504338411520},
28439 },
28440 },
28441 },
28442 {
28443 name: "CMPGEF",
28444 argLen: 2,
28445 asm: mips.ACMPGEF,
28446 reg: regInfo{
28447 inputs: []inputInfo{
28448 {0, 1152921504338411520},
28449 {1, 1152921504338411520},
28450 },
28451 },
28452 },
28453 {
28454 name: "CMPGED",
28455 argLen: 2,
28456 asm: mips.ACMPGED,
28457 reg: regInfo{
28458 inputs: []inputInfo{
28459 {0, 1152921504338411520},
28460 {1, 1152921504338411520},
28461 },
28462 },
28463 },
28464 {
28465 name: "CMPGTF",
28466 argLen: 2,
28467 asm: mips.ACMPGTF,
28468 reg: regInfo{
28469 inputs: []inputInfo{
28470 {0, 1152921504338411520},
28471 {1, 1152921504338411520},
28472 },
28473 },
28474 },
28475 {
28476 name: "CMPGTD",
28477 argLen: 2,
28478 asm: mips.ACMPGTD,
28479 reg: regInfo{
28480 inputs: []inputInfo{
28481 {0, 1152921504338411520},
28482 {1, 1152921504338411520},
28483 },
28484 },
28485 },
28486 {
28487 name: "MOVVconst",
28488 auxType: auxInt64,
28489 argLen: 0,
28490 rematerializeable: true,
28491 asm: mips.AMOVV,
28492 reg: regInfo{
28493 outputs: []outputInfo{
28494 {0, 167772158},
28495 },
28496 },
28497 },
28498 {
28499 name: "MOVFconst",
28500 auxType: auxFloat64,
28501 argLen: 0,
28502 rematerializeable: true,
28503 asm: mips.AMOVF,
28504 reg: regInfo{
28505 outputs: []outputInfo{
28506 {0, 1152921504338411520},
28507 },
28508 },
28509 },
28510 {
28511 name: "MOVDconst",
28512 auxType: auxFloat64,
28513 argLen: 0,
28514 rematerializeable: true,
28515 asm: mips.AMOVD,
28516 reg: regInfo{
28517 outputs: []outputInfo{
28518 {0, 1152921504338411520},
28519 },
28520 },
28521 },
28522 {
28523 name: "MOVVaddr",
28524 auxType: auxSymOff,
28525 argLen: 1,
28526 rematerializeable: true,
28527 symEffect: SymAddr,
28528 asm: mips.AMOVV,
28529 reg: regInfo{
28530 inputs: []inputInfo{
28531 {0, 4611686018460942336},
28532 },
28533 outputs: []outputInfo{
28534 {0, 167772158},
28535 },
28536 },
28537 },
28538 {
28539 name: "MOVBload",
28540 auxType: auxSymOff,
28541 argLen: 2,
28542 faultOnNilArg0: true,
28543 symEffect: SymRead,
28544 asm: mips.AMOVB,
28545 reg: regInfo{
28546 inputs: []inputInfo{
28547 {0, 4611686018695823358},
28548 },
28549 outputs: []outputInfo{
28550 {0, 167772158},
28551 },
28552 },
28553 },
28554 {
28555 name: "MOVBUload",
28556 auxType: auxSymOff,
28557 argLen: 2,
28558 faultOnNilArg0: true,
28559 symEffect: SymRead,
28560 asm: mips.AMOVBU,
28561 reg: regInfo{
28562 inputs: []inputInfo{
28563 {0, 4611686018695823358},
28564 },
28565 outputs: []outputInfo{
28566 {0, 167772158},
28567 },
28568 },
28569 },
28570 {
28571 name: "MOVHload",
28572 auxType: auxSymOff,
28573 argLen: 2,
28574 faultOnNilArg0: true,
28575 symEffect: SymRead,
28576 asm: mips.AMOVH,
28577 reg: regInfo{
28578 inputs: []inputInfo{
28579 {0, 4611686018695823358},
28580 },
28581 outputs: []outputInfo{
28582 {0, 167772158},
28583 },
28584 },
28585 },
28586 {
28587 name: "MOVHUload",
28588 auxType: auxSymOff,
28589 argLen: 2,
28590 faultOnNilArg0: true,
28591 symEffect: SymRead,
28592 asm: mips.AMOVHU,
28593 reg: regInfo{
28594 inputs: []inputInfo{
28595 {0, 4611686018695823358},
28596 },
28597 outputs: []outputInfo{
28598 {0, 167772158},
28599 },
28600 },
28601 },
28602 {
28603 name: "MOVWload",
28604 auxType: auxSymOff,
28605 argLen: 2,
28606 faultOnNilArg0: true,
28607 symEffect: SymRead,
28608 asm: mips.AMOVW,
28609 reg: regInfo{
28610 inputs: []inputInfo{
28611 {0, 4611686018695823358},
28612 },
28613 outputs: []outputInfo{
28614 {0, 167772158},
28615 },
28616 },
28617 },
28618 {
28619 name: "MOVWUload",
28620 auxType: auxSymOff,
28621 argLen: 2,
28622 faultOnNilArg0: true,
28623 symEffect: SymRead,
28624 asm: mips.AMOVWU,
28625 reg: regInfo{
28626 inputs: []inputInfo{
28627 {0, 4611686018695823358},
28628 },
28629 outputs: []outputInfo{
28630 {0, 167772158},
28631 },
28632 },
28633 },
28634 {
28635 name: "MOVVload",
28636 auxType: auxSymOff,
28637 argLen: 2,
28638 faultOnNilArg0: true,
28639 symEffect: SymRead,
28640 asm: mips.AMOVV,
28641 reg: regInfo{
28642 inputs: []inputInfo{
28643 {0, 4611686018695823358},
28644 },
28645 outputs: []outputInfo{
28646 {0, 167772158},
28647 },
28648 },
28649 },
28650 {
28651 name: "MOVFload",
28652 auxType: auxSymOff,
28653 argLen: 2,
28654 faultOnNilArg0: true,
28655 symEffect: SymRead,
28656 asm: mips.AMOVF,
28657 reg: regInfo{
28658 inputs: []inputInfo{
28659 {0, 4611686018695823358},
28660 },
28661 outputs: []outputInfo{
28662 {0, 1152921504338411520},
28663 },
28664 },
28665 },
28666 {
28667 name: "MOVDload",
28668 auxType: auxSymOff,
28669 argLen: 2,
28670 faultOnNilArg0: true,
28671 symEffect: SymRead,
28672 asm: mips.AMOVD,
28673 reg: regInfo{
28674 inputs: []inputInfo{
28675 {0, 4611686018695823358},
28676 },
28677 outputs: []outputInfo{
28678 {0, 1152921504338411520},
28679 },
28680 },
28681 },
28682 {
28683 name: "MOVBstore",
28684 auxType: auxSymOff,
28685 argLen: 3,
28686 faultOnNilArg0: true,
28687 symEffect: SymWrite,
28688 asm: mips.AMOVB,
28689 reg: regInfo{
28690 inputs: []inputInfo{
28691 {1, 234881022},
28692 {0, 4611686018695823358},
28693 },
28694 },
28695 },
28696 {
28697 name: "MOVHstore",
28698 auxType: auxSymOff,
28699 argLen: 3,
28700 faultOnNilArg0: true,
28701 symEffect: SymWrite,
28702 asm: mips.AMOVH,
28703 reg: regInfo{
28704 inputs: []inputInfo{
28705 {1, 234881022},
28706 {0, 4611686018695823358},
28707 },
28708 },
28709 },
28710 {
28711 name: "MOVWstore",
28712 auxType: auxSymOff,
28713 argLen: 3,
28714 faultOnNilArg0: true,
28715 symEffect: SymWrite,
28716 asm: mips.AMOVW,
28717 reg: regInfo{
28718 inputs: []inputInfo{
28719 {1, 234881022},
28720 {0, 4611686018695823358},
28721 },
28722 },
28723 },
28724 {
28725 name: "MOVVstore",
28726 auxType: auxSymOff,
28727 argLen: 3,
28728 faultOnNilArg0: true,
28729 symEffect: SymWrite,
28730 asm: mips.AMOVV,
28731 reg: regInfo{
28732 inputs: []inputInfo{
28733 {1, 234881022},
28734 {0, 4611686018695823358},
28735 },
28736 },
28737 },
28738 {
28739 name: "MOVFstore",
28740 auxType: auxSymOff,
28741 argLen: 3,
28742 faultOnNilArg0: true,
28743 symEffect: SymWrite,
28744 asm: mips.AMOVF,
28745 reg: regInfo{
28746 inputs: []inputInfo{
28747 {0, 4611686018695823358},
28748 {1, 1152921504338411520},
28749 },
28750 },
28751 },
28752 {
28753 name: "MOVDstore",
28754 auxType: auxSymOff,
28755 argLen: 3,
28756 faultOnNilArg0: true,
28757 symEffect: SymWrite,
28758 asm: mips.AMOVD,
28759 reg: regInfo{
28760 inputs: []inputInfo{
28761 {0, 4611686018695823358},
28762 {1, 1152921504338411520},
28763 },
28764 },
28765 },
28766 {
28767 name: "MOVBstorezero",
28768 auxType: auxSymOff,
28769 argLen: 2,
28770 faultOnNilArg0: true,
28771 symEffect: SymWrite,
28772 asm: mips.AMOVB,
28773 reg: regInfo{
28774 inputs: []inputInfo{
28775 {0, 4611686018695823358},
28776 },
28777 },
28778 },
28779 {
28780 name: "MOVHstorezero",
28781 auxType: auxSymOff,
28782 argLen: 2,
28783 faultOnNilArg0: true,
28784 symEffect: SymWrite,
28785 asm: mips.AMOVH,
28786 reg: regInfo{
28787 inputs: []inputInfo{
28788 {0, 4611686018695823358},
28789 },
28790 },
28791 },
28792 {
28793 name: "MOVWstorezero",
28794 auxType: auxSymOff,
28795 argLen: 2,
28796 faultOnNilArg0: true,
28797 symEffect: SymWrite,
28798 asm: mips.AMOVW,
28799 reg: regInfo{
28800 inputs: []inputInfo{
28801 {0, 4611686018695823358},
28802 },
28803 },
28804 },
28805 {
28806 name: "MOVVstorezero",
28807 auxType: auxSymOff,
28808 argLen: 2,
28809 faultOnNilArg0: true,
28810 symEffect: SymWrite,
28811 asm: mips.AMOVV,
28812 reg: regInfo{
28813 inputs: []inputInfo{
28814 {0, 4611686018695823358},
28815 },
28816 },
28817 },
28818 {
28819 name: "MOVWfpgp",
28820 argLen: 1,
28821 asm: mips.AMOVW,
28822 reg: regInfo{
28823 inputs: []inputInfo{
28824 {0, 1152921504338411520},
28825 },
28826 outputs: []outputInfo{
28827 {0, 167772158},
28828 },
28829 },
28830 },
28831 {
28832 name: "MOVWgpfp",
28833 argLen: 1,
28834 asm: mips.AMOVW,
28835 reg: regInfo{
28836 inputs: []inputInfo{
28837 {0, 167772158},
28838 },
28839 outputs: []outputInfo{
28840 {0, 1152921504338411520},
28841 },
28842 },
28843 },
28844 {
28845 name: "MOVVfpgp",
28846 argLen: 1,
28847 asm: mips.AMOVV,
28848 reg: regInfo{
28849 inputs: []inputInfo{
28850 {0, 1152921504338411520},
28851 },
28852 outputs: []outputInfo{
28853 {0, 167772158},
28854 },
28855 },
28856 },
28857 {
28858 name: "MOVVgpfp",
28859 argLen: 1,
28860 asm: mips.AMOVV,
28861 reg: regInfo{
28862 inputs: []inputInfo{
28863 {0, 167772158},
28864 },
28865 outputs: []outputInfo{
28866 {0, 1152921504338411520},
28867 },
28868 },
28869 },
28870 {
28871 name: "MOVBreg",
28872 argLen: 1,
28873 asm: mips.AMOVB,
28874 reg: regInfo{
28875 inputs: []inputInfo{
28876 {0, 234881022},
28877 },
28878 outputs: []outputInfo{
28879 {0, 167772158},
28880 },
28881 },
28882 },
28883 {
28884 name: "MOVBUreg",
28885 argLen: 1,
28886 asm: mips.AMOVBU,
28887 reg: regInfo{
28888 inputs: []inputInfo{
28889 {0, 234881022},
28890 },
28891 outputs: []outputInfo{
28892 {0, 167772158},
28893 },
28894 },
28895 },
28896 {
28897 name: "MOVHreg",
28898 argLen: 1,
28899 asm: mips.AMOVH,
28900 reg: regInfo{
28901 inputs: []inputInfo{
28902 {0, 234881022},
28903 },
28904 outputs: []outputInfo{
28905 {0, 167772158},
28906 },
28907 },
28908 },
28909 {
28910 name: "MOVHUreg",
28911 argLen: 1,
28912 asm: mips.AMOVHU,
28913 reg: regInfo{
28914 inputs: []inputInfo{
28915 {0, 234881022},
28916 },
28917 outputs: []outputInfo{
28918 {0, 167772158},
28919 },
28920 },
28921 },
28922 {
28923 name: "MOVWreg",
28924 argLen: 1,
28925 asm: mips.AMOVW,
28926 reg: regInfo{
28927 inputs: []inputInfo{
28928 {0, 234881022},
28929 },
28930 outputs: []outputInfo{
28931 {0, 167772158},
28932 },
28933 },
28934 },
28935 {
28936 name: "MOVWUreg",
28937 argLen: 1,
28938 asm: mips.AMOVWU,
28939 reg: regInfo{
28940 inputs: []inputInfo{
28941 {0, 234881022},
28942 },
28943 outputs: []outputInfo{
28944 {0, 167772158},
28945 },
28946 },
28947 },
28948 {
28949 name: "MOVVreg",
28950 argLen: 1,
28951 asm: mips.AMOVV,
28952 reg: regInfo{
28953 inputs: []inputInfo{
28954 {0, 234881022},
28955 },
28956 outputs: []outputInfo{
28957 {0, 167772158},
28958 },
28959 },
28960 },
28961 {
28962 name: "MOVVnop",
28963 argLen: 1,
28964 resultInArg0: true,
28965 reg: regInfo{
28966 inputs: []inputInfo{
28967 {0, 167772158},
28968 },
28969 outputs: []outputInfo{
28970 {0, 167772158},
28971 },
28972 },
28973 },
28974 {
28975 name: "MOVWF",
28976 argLen: 1,
28977 asm: mips.AMOVWF,
28978 reg: regInfo{
28979 inputs: []inputInfo{
28980 {0, 1152921504338411520},
28981 },
28982 outputs: []outputInfo{
28983 {0, 1152921504338411520},
28984 },
28985 },
28986 },
28987 {
28988 name: "MOVWD",
28989 argLen: 1,
28990 asm: mips.AMOVWD,
28991 reg: regInfo{
28992 inputs: []inputInfo{
28993 {0, 1152921504338411520},
28994 },
28995 outputs: []outputInfo{
28996 {0, 1152921504338411520},
28997 },
28998 },
28999 },
29000 {
29001 name: "MOVVF",
29002 argLen: 1,
29003 asm: mips.AMOVVF,
29004 reg: regInfo{
29005 inputs: []inputInfo{
29006 {0, 1152921504338411520},
29007 },
29008 outputs: []outputInfo{
29009 {0, 1152921504338411520},
29010 },
29011 },
29012 },
29013 {
29014 name: "MOVVD",
29015 argLen: 1,
29016 asm: mips.AMOVVD,
29017 reg: regInfo{
29018 inputs: []inputInfo{
29019 {0, 1152921504338411520},
29020 },
29021 outputs: []outputInfo{
29022 {0, 1152921504338411520},
29023 },
29024 },
29025 },
29026 {
29027 name: "TRUNCFW",
29028 argLen: 1,
29029 asm: mips.ATRUNCFW,
29030 reg: regInfo{
29031 inputs: []inputInfo{
29032 {0, 1152921504338411520},
29033 },
29034 outputs: []outputInfo{
29035 {0, 1152921504338411520},
29036 },
29037 },
29038 },
29039 {
29040 name: "TRUNCDW",
29041 argLen: 1,
29042 asm: mips.ATRUNCDW,
29043 reg: regInfo{
29044 inputs: []inputInfo{
29045 {0, 1152921504338411520},
29046 },
29047 outputs: []outputInfo{
29048 {0, 1152921504338411520},
29049 },
29050 },
29051 },
29052 {
29053 name: "TRUNCFV",
29054 argLen: 1,
29055 asm: mips.ATRUNCFV,
29056 reg: regInfo{
29057 inputs: []inputInfo{
29058 {0, 1152921504338411520},
29059 },
29060 outputs: []outputInfo{
29061 {0, 1152921504338411520},
29062 },
29063 },
29064 },
29065 {
29066 name: "TRUNCDV",
29067 argLen: 1,
29068 asm: mips.ATRUNCDV,
29069 reg: regInfo{
29070 inputs: []inputInfo{
29071 {0, 1152921504338411520},
29072 },
29073 outputs: []outputInfo{
29074 {0, 1152921504338411520},
29075 },
29076 },
29077 },
29078 {
29079 name: "MOVFD",
29080 argLen: 1,
29081 asm: mips.AMOVFD,
29082 reg: regInfo{
29083 inputs: []inputInfo{
29084 {0, 1152921504338411520},
29085 },
29086 outputs: []outputInfo{
29087 {0, 1152921504338411520},
29088 },
29089 },
29090 },
29091 {
29092 name: "MOVDF",
29093 argLen: 1,
29094 asm: mips.AMOVDF,
29095 reg: regInfo{
29096 inputs: []inputInfo{
29097 {0, 1152921504338411520},
29098 },
29099 outputs: []outputInfo{
29100 {0, 1152921504338411520},
29101 },
29102 },
29103 },
29104 {
29105 name: "CALLstatic",
29106 auxType: auxCallOff,
29107 argLen: 1,
29108 clobberFlags: true,
29109 call: true,
29110 reg: regInfo{
29111 clobbers: 4611686018393833470,
29112 },
29113 },
29114 {
29115 name: "CALLtail",
29116 auxType: auxCallOff,
29117 argLen: 1,
29118 clobberFlags: true,
29119 call: true,
29120 tailCall: true,
29121 reg: regInfo{
29122 clobbers: 4611686018393833470,
29123 },
29124 },
29125 {
29126 name: "CALLclosure",
29127 auxType: auxCallOff,
29128 argLen: 3,
29129 clobberFlags: true,
29130 call: true,
29131 reg: regInfo{
29132 inputs: []inputInfo{
29133 {1, 4194304},
29134 {0, 201326590},
29135 },
29136 clobbers: 4611686018393833470,
29137 },
29138 },
29139 {
29140 name: "CALLinter",
29141 auxType: auxCallOff,
29142 argLen: 2,
29143 clobberFlags: true,
29144 call: true,
29145 reg: regInfo{
29146 inputs: []inputInfo{
29147 {0, 167772158},
29148 },
29149 clobbers: 4611686018393833470,
29150 },
29151 },
29152 {
29153 name: "DUFFZERO",
29154 auxType: auxInt64,
29155 argLen: 2,
29156 faultOnNilArg0: true,
29157 reg: regInfo{
29158 inputs: []inputInfo{
29159 {0, 167772158},
29160 },
29161 clobbers: 134217730,
29162 },
29163 },
29164 {
29165 name: "DUFFCOPY",
29166 auxType: auxInt64,
29167 argLen: 3,
29168 faultOnNilArg0: true,
29169 faultOnNilArg1: true,
29170 reg: regInfo{
29171 inputs: []inputInfo{
29172 {0, 4},
29173 {1, 2},
29174 },
29175 clobbers: 134217734,
29176 },
29177 },
29178 {
29179 name: "LoweredZero",
29180 auxType: auxInt64,
29181 argLen: 3,
29182 clobberFlags: true,
29183 faultOnNilArg0: true,
29184 reg: regInfo{
29185 inputs: []inputInfo{
29186 {0, 2},
29187 {1, 167772158},
29188 },
29189 clobbers: 2,
29190 },
29191 },
29192 {
29193 name: "LoweredMove",
29194 auxType: auxInt64,
29195 argLen: 4,
29196 clobberFlags: true,
29197 faultOnNilArg0: true,
29198 faultOnNilArg1: true,
29199 reg: regInfo{
29200 inputs: []inputInfo{
29201 {0, 4},
29202 {1, 2},
29203 {2, 167772158},
29204 },
29205 clobbers: 6,
29206 },
29207 },
29208 {
29209 name: "LoweredAtomicAnd32",
29210 argLen: 3,
29211 faultOnNilArg0: true,
29212 hasSideEffects: true,
29213 unsafePoint: true,
29214 asm: mips.AAND,
29215 reg: regInfo{
29216 inputs: []inputInfo{
29217 {1, 234881022},
29218 {0, 4611686018695823358},
29219 },
29220 },
29221 },
29222 {
29223 name: "LoweredAtomicOr32",
29224 argLen: 3,
29225 faultOnNilArg0: true,
29226 hasSideEffects: true,
29227 unsafePoint: true,
29228 asm: mips.AOR,
29229 reg: regInfo{
29230 inputs: []inputInfo{
29231 {1, 234881022},
29232 {0, 4611686018695823358},
29233 },
29234 },
29235 },
29236 {
29237 name: "LoweredAtomicLoad8",
29238 argLen: 2,
29239 faultOnNilArg0: true,
29240 reg: regInfo{
29241 inputs: []inputInfo{
29242 {0, 4611686018695823358},
29243 },
29244 outputs: []outputInfo{
29245 {0, 167772158},
29246 },
29247 },
29248 },
29249 {
29250 name: "LoweredAtomicLoad32",
29251 argLen: 2,
29252 faultOnNilArg0: true,
29253 reg: regInfo{
29254 inputs: []inputInfo{
29255 {0, 4611686018695823358},
29256 },
29257 outputs: []outputInfo{
29258 {0, 167772158},
29259 },
29260 },
29261 },
29262 {
29263 name: "LoweredAtomicLoad64",
29264 argLen: 2,
29265 faultOnNilArg0: true,
29266 reg: regInfo{
29267 inputs: []inputInfo{
29268 {0, 4611686018695823358},
29269 },
29270 outputs: []outputInfo{
29271 {0, 167772158},
29272 },
29273 },
29274 },
29275 {
29276 name: "LoweredAtomicStore8",
29277 argLen: 3,
29278 faultOnNilArg0: true,
29279 hasSideEffects: true,
29280 reg: regInfo{
29281 inputs: []inputInfo{
29282 {1, 234881022},
29283 {0, 4611686018695823358},
29284 },
29285 },
29286 },
29287 {
29288 name: "LoweredAtomicStore32",
29289 argLen: 3,
29290 faultOnNilArg0: true,
29291 hasSideEffects: true,
29292 reg: regInfo{
29293 inputs: []inputInfo{
29294 {1, 234881022},
29295 {0, 4611686018695823358},
29296 },
29297 },
29298 },
29299 {
29300 name: "LoweredAtomicStore64",
29301 argLen: 3,
29302 faultOnNilArg0: true,
29303 hasSideEffects: true,
29304 reg: regInfo{
29305 inputs: []inputInfo{
29306 {1, 234881022},
29307 {0, 4611686018695823358},
29308 },
29309 },
29310 },
29311 {
29312 name: "LoweredAtomicStorezero32",
29313 argLen: 2,
29314 faultOnNilArg0: true,
29315 hasSideEffects: true,
29316 reg: regInfo{
29317 inputs: []inputInfo{
29318 {0, 4611686018695823358},
29319 },
29320 },
29321 },
29322 {
29323 name: "LoweredAtomicStorezero64",
29324 argLen: 2,
29325 faultOnNilArg0: true,
29326 hasSideEffects: true,
29327 reg: regInfo{
29328 inputs: []inputInfo{
29329 {0, 4611686018695823358},
29330 },
29331 },
29332 },
29333 {
29334 name: "LoweredAtomicExchange32",
29335 argLen: 3,
29336 resultNotInArgs: true,
29337 faultOnNilArg0: true,
29338 hasSideEffects: true,
29339 unsafePoint: true,
29340 reg: regInfo{
29341 inputs: []inputInfo{
29342 {1, 234881022},
29343 {0, 4611686018695823358},
29344 },
29345 outputs: []outputInfo{
29346 {0, 167772158},
29347 },
29348 },
29349 },
29350 {
29351 name: "LoweredAtomicExchange64",
29352 argLen: 3,
29353 resultNotInArgs: true,
29354 faultOnNilArg0: true,
29355 hasSideEffects: true,
29356 unsafePoint: true,
29357 reg: regInfo{
29358 inputs: []inputInfo{
29359 {1, 234881022},
29360 {0, 4611686018695823358},
29361 },
29362 outputs: []outputInfo{
29363 {0, 167772158},
29364 },
29365 },
29366 },
29367 {
29368 name: "LoweredAtomicAdd32",
29369 argLen: 3,
29370 resultNotInArgs: true,
29371 faultOnNilArg0: true,
29372 hasSideEffects: true,
29373 unsafePoint: true,
29374 reg: regInfo{
29375 inputs: []inputInfo{
29376 {1, 234881022},
29377 {0, 4611686018695823358},
29378 },
29379 outputs: []outputInfo{
29380 {0, 167772158},
29381 },
29382 },
29383 },
29384 {
29385 name: "LoweredAtomicAdd64",
29386 argLen: 3,
29387 resultNotInArgs: true,
29388 faultOnNilArg0: true,
29389 hasSideEffects: true,
29390 unsafePoint: true,
29391 reg: regInfo{
29392 inputs: []inputInfo{
29393 {1, 234881022},
29394 {0, 4611686018695823358},
29395 },
29396 outputs: []outputInfo{
29397 {0, 167772158},
29398 },
29399 },
29400 },
29401 {
29402 name: "LoweredAtomicAddconst32",
29403 auxType: auxInt32,
29404 argLen: 2,
29405 resultNotInArgs: true,
29406 faultOnNilArg0: true,
29407 hasSideEffects: true,
29408 unsafePoint: true,
29409 reg: regInfo{
29410 inputs: []inputInfo{
29411 {0, 4611686018695823358},
29412 },
29413 outputs: []outputInfo{
29414 {0, 167772158},
29415 },
29416 },
29417 },
29418 {
29419 name: "LoweredAtomicAddconst64",
29420 auxType: auxInt64,
29421 argLen: 2,
29422 resultNotInArgs: true,
29423 faultOnNilArg0: true,
29424 hasSideEffects: true,
29425 unsafePoint: true,
29426 reg: regInfo{
29427 inputs: []inputInfo{
29428 {0, 4611686018695823358},
29429 },
29430 outputs: []outputInfo{
29431 {0, 167772158},
29432 },
29433 },
29434 },
29435 {
29436 name: "LoweredAtomicCas32",
29437 argLen: 4,
29438 resultNotInArgs: true,
29439 faultOnNilArg0: true,
29440 hasSideEffects: true,
29441 unsafePoint: true,
29442 reg: regInfo{
29443 inputs: []inputInfo{
29444 {1, 234881022},
29445 {2, 234881022},
29446 {0, 4611686018695823358},
29447 },
29448 outputs: []outputInfo{
29449 {0, 167772158},
29450 },
29451 },
29452 },
29453 {
29454 name: "LoweredAtomicCas64",
29455 argLen: 4,
29456 resultNotInArgs: true,
29457 faultOnNilArg0: true,
29458 hasSideEffects: true,
29459 unsafePoint: true,
29460 reg: regInfo{
29461 inputs: []inputInfo{
29462 {1, 234881022},
29463 {2, 234881022},
29464 {0, 4611686018695823358},
29465 },
29466 outputs: []outputInfo{
29467 {0, 167772158},
29468 },
29469 },
29470 },
29471 {
29472 name: "LoweredNilCheck",
29473 argLen: 2,
29474 nilCheck: true,
29475 faultOnNilArg0: true,
29476 reg: regInfo{
29477 inputs: []inputInfo{
29478 {0, 234881022},
29479 },
29480 },
29481 },
29482 {
29483 name: "FPFlagTrue",
29484 argLen: 1,
29485 reg: regInfo{
29486 outputs: []outputInfo{
29487 {0, 167772158},
29488 },
29489 },
29490 },
29491 {
29492 name: "FPFlagFalse",
29493 argLen: 1,
29494 reg: regInfo{
29495 outputs: []outputInfo{
29496 {0, 167772158},
29497 },
29498 },
29499 },
29500 {
29501 name: "LoweredGetClosurePtr",
29502 argLen: 0,
29503 zeroWidth: true,
29504 reg: regInfo{
29505 outputs: []outputInfo{
29506 {0, 4194304},
29507 },
29508 },
29509 },
29510 {
29511 name: "LoweredGetCallerSP",
29512 argLen: 1,
29513 rematerializeable: true,
29514 reg: regInfo{
29515 outputs: []outputInfo{
29516 {0, 167772158},
29517 },
29518 },
29519 },
29520 {
29521 name: "LoweredGetCallerPC",
29522 argLen: 0,
29523 rematerializeable: true,
29524 reg: regInfo{
29525 outputs: []outputInfo{
29526 {0, 167772158},
29527 },
29528 },
29529 },
29530 {
29531 name: "LoweredWB",
29532 auxType: auxInt64,
29533 argLen: 1,
29534 clobberFlags: true,
29535 reg: regInfo{
29536 clobbers: 4611686018293170176,
29537 outputs: []outputInfo{
29538 {0, 16777216},
29539 },
29540 },
29541 },
29542 {
29543 name: "LoweredPanicBoundsA",
29544 auxType: auxInt64,
29545 argLen: 3,
29546 call: true,
29547 reg: regInfo{
29548 inputs: []inputInfo{
29549 {0, 8},
29550 {1, 16},
29551 },
29552 },
29553 },
29554 {
29555 name: "LoweredPanicBoundsB",
29556 auxType: auxInt64,
29557 argLen: 3,
29558 call: true,
29559 reg: regInfo{
29560 inputs: []inputInfo{
29561 {0, 4},
29562 {1, 8},
29563 },
29564 },
29565 },
29566 {
29567 name: "LoweredPanicBoundsC",
29568 auxType: auxInt64,
29569 argLen: 3,
29570 call: true,
29571 reg: regInfo{
29572 inputs: []inputInfo{
29573 {0, 2},
29574 {1, 4},
29575 },
29576 },
29577 },
29578
29579 {
29580 name: "ADD",
29581 argLen: 2,
29582 commutative: true,
29583 asm: ppc64.AADD,
29584 reg: regInfo{
29585 inputs: []inputInfo{
29586 {0, 1073733630},
29587 {1, 1073733630},
29588 },
29589 outputs: []outputInfo{
29590 {0, 1073733624},
29591 },
29592 },
29593 },
29594 {
29595 name: "ADDCC",
29596 argLen: 2,
29597 commutative: true,
29598 asm: ppc64.AADDCC,
29599 reg: regInfo{
29600 inputs: []inputInfo{
29601 {0, 1073733630},
29602 {1, 1073733630},
29603 },
29604 outputs: []outputInfo{
29605 {0, 1073733624},
29606 },
29607 },
29608 },
29609 {
29610 name: "ADDconst",
29611 auxType: auxInt64,
29612 argLen: 1,
29613 asm: ppc64.AADD,
29614 reg: regInfo{
29615 inputs: []inputInfo{
29616 {0, 1073733630},
29617 },
29618 outputs: []outputInfo{
29619 {0, 1073733624},
29620 },
29621 },
29622 },
29623 {
29624 name: "ADDCCconst",
29625 auxType: auxInt64,
29626 argLen: 1,
29627 asm: ppc64.AADDCCC,
29628 reg: regInfo{
29629 inputs: []inputInfo{
29630 {0, 1073733630},
29631 },
29632 clobbers: 9223372036854775808,
29633 outputs: []outputInfo{
29634 {0, 1073733624},
29635 },
29636 },
29637 },
29638 {
29639 name: "FADD",
29640 argLen: 2,
29641 commutative: true,
29642 asm: ppc64.AFADD,
29643 reg: regInfo{
29644 inputs: []inputInfo{
29645 {0, 9223372032559808512},
29646 {1, 9223372032559808512},
29647 },
29648 outputs: []outputInfo{
29649 {0, 9223372032559808512},
29650 },
29651 },
29652 },
29653 {
29654 name: "FADDS",
29655 argLen: 2,
29656 commutative: true,
29657 asm: ppc64.AFADDS,
29658 reg: regInfo{
29659 inputs: []inputInfo{
29660 {0, 9223372032559808512},
29661 {1, 9223372032559808512},
29662 },
29663 outputs: []outputInfo{
29664 {0, 9223372032559808512},
29665 },
29666 },
29667 },
29668 {
29669 name: "SUB",
29670 argLen: 2,
29671 asm: ppc64.ASUB,
29672 reg: regInfo{
29673 inputs: []inputInfo{
29674 {0, 1073733630},
29675 {1, 1073733630},
29676 },
29677 outputs: []outputInfo{
29678 {0, 1073733624},
29679 },
29680 },
29681 },
29682 {
29683 name: "SUBCC",
29684 argLen: 2,
29685 asm: ppc64.ASUBCC,
29686 reg: regInfo{
29687 inputs: []inputInfo{
29688 {0, 1073733630},
29689 {1, 1073733630},
29690 },
29691 outputs: []outputInfo{
29692 {0, 1073733624},
29693 },
29694 },
29695 },
29696 {
29697 name: "SUBFCconst",
29698 auxType: auxInt64,
29699 argLen: 1,
29700 asm: ppc64.ASUBC,
29701 reg: regInfo{
29702 inputs: []inputInfo{
29703 {0, 1073733630},
29704 },
29705 clobbers: 9223372036854775808,
29706 outputs: []outputInfo{
29707 {0, 1073733624},
29708 },
29709 },
29710 },
29711 {
29712 name: "FSUB",
29713 argLen: 2,
29714 asm: ppc64.AFSUB,
29715 reg: regInfo{
29716 inputs: []inputInfo{
29717 {0, 9223372032559808512},
29718 {1, 9223372032559808512},
29719 },
29720 outputs: []outputInfo{
29721 {0, 9223372032559808512},
29722 },
29723 },
29724 },
29725 {
29726 name: "FSUBS",
29727 argLen: 2,
29728 asm: ppc64.AFSUBS,
29729 reg: regInfo{
29730 inputs: []inputInfo{
29731 {0, 9223372032559808512},
29732 {1, 9223372032559808512},
29733 },
29734 outputs: []outputInfo{
29735 {0, 9223372032559808512},
29736 },
29737 },
29738 },
29739 {
29740 name: "XSMINJDP",
29741 argLen: 2,
29742 asm: ppc64.AXSMINJDP,
29743 reg: regInfo{
29744 inputs: []inputInfo{
29745 {0, 9223372032559808512},
29746 {1, 9223372032559808512},
29747 },
29748 outputs: []outputInfo{
29749 {0, 9223372032559808512},
29750 },
29751 },
29752 },
29753 {
29754 name: "XSMAXJDP",
29755 argLen: 2,
29756 asm: ppc64.AXSMAXJDP,
29757 reg: regInfo{
29758 inputs: []inputInfo{
29759 {0, 9223372032559808512},
29760 {1, 9223372032559808512},
29761 },
29762 outputs: []outputInfo{
29763 {0, 9223372032559808512},
29764 },
29765 },
29766 },
29767 {
29768 name: "MULLD",
29769 argLen: 2,
29770 commutative: true,
29771 asm: ppc64.AMULLD,
29772 reg: regInfo{
29773 inputs: []inputInfo{
29774 {0, 1073733630},
29775 {1, 1073733630},
29776 },
29777 outputs: []outputInfo{
29778 {0, 1073733624},
29779 },
29780 },
29781 },
29782 {
29783 name: "MULLW",
29784 argLen: 2,
29785 commutative: true,
29786 asm: ppc64.AMULLW,
29787 reg: regInfo{
29788 inputs: []inputInfo{
29789 {0, 1073733630},
29790 {1, 1073733630},
29791 },
29792 outputs: []outputInfo{
29793 {0, 1073733624},
29794 },
29795 },
29796 },
29797 {
29798 name: "MULLDconst",
29799 auxType: auxInt32,
29800 argLen: 1,
29801 asm: ppc64.AMULLD,
29802 reg: regInfo{
29803 inputs: []inputInfo{
29804 {0, 1073733630},
29805 },
29806 outputs: []outputInfo{
29807 {0, 1073733624},
29808 },
29809 },
29810 },
29811 {
29812 name: "MULLWconst",
29813 auxType: auxInt32,
29814 argLen: 1,
29815 asm: ppc64.AMULLW,
29816 reg: regInfo{
29817 inputs: []inputInfo{
29818 {0, 1073733630},
29819 },
29820 outputs: []outputInfo{
29821 {0, 1073733624},
29822 },
29823 },
29824 },
29825 {
29826 name: "MADDLD",
29827 argLen: 3,
29828 asm: ppc64.AMADDLD,
29829 reg: regInfo{
29830 inputs: []inputInfo{
29831 {0, 1073733630},
29832 {1, 1073733630},
29833 {2, 1073733630},
29834 },
29835 outputs: []outputInfo{
29836 {0, 1073733624},
29837 },
29838 },
29839 },
29840 {
29841 name: "MULHD",
29842 argLen: 2,
29843 commutative: true,
29844 asm: ppc64.AMULHD,
29845 reg: regInfo{
29846 inputs: []inputInfo{
29847 {0, 1073733630},
29848 {1, 1073733630},
29849 },
29850 outputs: []outputInfo{
29851 {0, 1073733624},
29852 },
29853 },
29854 },
29855 {
29856 name: "MULHW",
29857 argLen: 2,
29858 commutative: true,
29859 asm: ppc64.AMULHW,
29860 reg: regInfo{
29861 inputs: []inputInfo{
29862 {0, 1073733630},
29863 {1, 1073733630},
29864 },
29865 outputs: []outputInfo{
29866 {0, 1073733624},
29867 },
29868 },
29869 },
29870 {
29871 name: "MULHDU",
29872 argLen: 2,
29873 commutative: true,
29874 asm: ppc64.AMULHDU,
29875 reg: regInfo{
29876 inputs: []inputInfo{
29877 {0, 1073733630},
29878 {1, 1073733630},
29879 },
29880 outputs: []outputInfo{
29881 {0, 1073733624},
29882 },
29883 },
29884 },
29885 {
29886 name: "MULHDUCC",
29887 argLen: 2,
29888 commutative: true,
29889 asm: ppc64.AMULHDUCC,
29890 reg: regInfo{
29891 inputs: []inputInfo{
29892 {0, 1073733630},
29893 {1, 1073733630},
29894 },
29895 outputs: []outputInfo{
29896 {0, 1073733624},
29897 },
29898 },
29899 },
29900 {
29901 name: "MULHWU",
29902 argLen: 2,
29903 commutative: true,
29904 asm: ppc64.AMULHWU,
29905 reg: regInfo{
29906 inputs: []inputInfo{
29907 {0, 1073733630},
29908 {1, 1073733630},
29909 },
29910 outputs: []outputInfo{
29911 {0, 1073733624},
29912 },
29913 },
29914 },
29915 {
29916 name: "FMUL",
29917 argLen: 2,
29918 commutative: true,
29919 asm: ppc64.AFMUL,
29920 reg: regInfo{
29921 inputs: []inputInfo{
29922 {0, 9223372032559808512},
29923 {1, 9223372032559808512},
29924 },
29925 outputs: []outputInfo{
29926 {0, 9223372032559808512},
29927 },
29928 },
29929 },
29930 {
29931 name: "FMULS",
29932 argLen: 2,
29933 commutative: true,
29934 asm: ppc64.AFMULS,
29935 reg: regInfo{
29936 inputs: []inputInfo{
29937 {0, 9223372032559808512},
29938 {1, 9223372032559808512},
29939 },
29940 outputs: []outputInfo{
29941 {0, 9223372032559808512},
29942 },
29943 },
29944 },
29945 {
29946 name: "FMADD",
29947 argLen: 3,
29948 asm: ppc64.AFMADD,
29949 reg: regInfo{
29950 inputs: []inputInfo{
29951 {0, 9223372032559808512},
29952 {1, 9223372032559808512},
29953 {2, 9223372032559808512},
29954 },
29955 outputs: []outputInfo{
29956 {0, 9223372032559808512},
29957 },
29958 },
29959 },
29960 {
29961 name: "FMADDS",
29962 argLen: 3,
29963 asm: ppc64.AFMADDS,
29964 reg: regInfo{
29965 inputs: []inputInfo{
29966 {0, 9223372032559808512},
29967 {1, 9223372032559808512},
29968 {2, 9223372032559808512},
29969 },
29970 outputs: []outputInfo{
29971 {0, 9223372032559808512},
29972 },
29973 },
29974 },
29975 {
29976 name: "FMSUB",
29977 argLen: 3,
29978 asm: ppc64.AFMSUB,
29979 reg: regInfo{
29980 inputs: []inputInfo{
29981 {0, 9223372032559808512},
29982 {1, 9223372032559808512},
29983 {2, 9223372032559808512},
29984 },
29985 outputs: []outputInfo{
29986 {0, 9223372032559808512},
29987 },
29988 },
29989 },
29990 {
29991 name: "FMSUBS",
29992 argLen: 3,
29993 asm: ppc64.AFMSUBS,
29994 reg: regInfo{
29995 inputs: []inputInfo{
29996 {0, 9223372032559808512},
29997 {1, 9223372032559808512},
29998 {2, 9223372032559808512},
29999 },
30000 outputs: []outputInfo{
30001 {0, 9223372032559808512},
30002 },
30003 },
30004 },
30005 {
30006 name: "SRAD",
30007 argLen: 2,
30008 asm: ppc64.ASRAD,
30009 reg: regInfo{
30010 inputs: []inputInfo{
30011 {0, 1073733630},
30012 {1, 1073733630},
30013 },
30014 clobbers: 9223372036854775808,
30015 outputs: []outputInfo{
30016 {0, 1073733624},
30017 },
30018 },
30019 },
30020 {
30021 name: "SRAW",
30022 argLen: 2,
30023 asm: ppc64.ASRAW,
30024 reg: regInfo{
30025 inputs: []inputInfo{
30026 {0, 1073733630},
30027 {1, 1073733630},
30028 },
30029 clobbers: 9223372036854775808,
30030 outputs: []outputInfo{
30031 {0, 1073733624},
30032 },
30033 },
30034 },
30035 {
30036 name: "SRD",
30037 argLen: 2,
30038 asm: ppc64.ASRD,
30039 reg: regInfo{
30040 inputs: []inputInfo{
30041 {0, 1073733630},
30042 {1, 1073733630},
30043 },
30044 outputs: []outputInfo{
30045 {0, 1073733624},
30046 },
30047 },
30048 },
30049 {
30050 name: "SRW",
30051 argLen: 2,
30052 asm: ppc64.ASRW,
30053 reg: regInfo{
30054 inputs: []inputInfo{
30055 {0, 1073733630},
30056 {1, 1073733630},
30057 },
30058 outputs: []outputInfo{
30059 {0, 1073733624},
30060 },
30061 },
30062 },
30063 {
30064 name: "SLD",
30065 argLen: 2,
30066 asm: ppc64.ASLD,
30067 reg: regInfo{
30068 inputs: []inputInfo{
30069 {0, 1073733630},
30070 {1, 1073733630},
30071 },
30072 outputs: []outputInfo{
30073 {0, 1073733624},
30074 },
30075 },
30076 },
30077 {
30078 name: "SLW",
30079 argLen: 2,
30080 asm: ppc64.ASLW,
30081 reg: regInfo{
30082 inputs: []inputInfo{
30083 {0, 1073733630},
30084 {1, 1073733630},
30085 },
30086 outputs: []outputInfo{
30087 {0, 1073733624},
30088 },
30089 },
30090 },
30091 {
30092 name: "ROTL",
30093 argLen: 2,
30094 asm: ppc64.AROTL,
30095 reg: regInfo{
30096 inputs: []inputInfo{
30097 {0, 1073733630},
30098 {1, 1073733630},
30099 },
30100 outputs: []outputInfo{
30101 {0, 1073733624},
30102 },
30103 },
30104 },
30105 {
30106 name: "ROTLW",
30107 argLen: 2,
30108 asm: ppc64.AROTLW,
30109 reg: regInfo{
30110 inputs: []inputInfo{
30111 {0, 1073733630},
30112 {1, 1073733630},
30113 },
30114 outputs: []outputInfo{
30115 {0, 1073733624},
30116 },
30117 },
30118 },
30119 {
30120 name: "CLRLSLWI",
30121 auxType: auxInt32,
30122 argLen: 1,
30123 asm: ppc64.ACLRLSLWI,
30124 reg: regInfo{
30125 inputs: []inputInfo{
30126 {0, 1073733630},
30127 },
30128 outputs: []outputInfo{
30129 {0, 1073733624},
30130 },
30131 },
30132 },
30133 {
30134 name: "CLRLSLDI",
30135 auxType: auxInt32,
30136 argLen: 1,
30137 asm: ppc64.ACLRLSLDI,
30138 reg: regInfo{
30139 inputs: []inputInfo{
30140 {0, 1073733630},
30141 },
30142 outputs: []outputInfo{
30143 {0, 1073733624},
30144 },
30145 },
30146 },
30147 {
30148 name: "ADDC",
30149 argLen: 2,
30150 commutative: true,
30151 asm: ppc64.AADDC,
30152 reg: regInfo{
30153 inputs: []inputInfo{
30154 {0, 1073733630},
30155 {1, 1073733630},
30156 },
30157 clobbers: 9223372036854775808,
30158 outputs: []outputInfo{
30159 {1, 9223372036854775808},
30160 {0, 1073733624},
30161 },
30162 },
30163 },
30164 {
30165 name: "SUBC",
30166 argLen: 2,
30167 asm: ppc64.ASUBC,
30168 reg: regInfo{
30169 inputs: []inputInfo{
30170 {0, 1073733630},
30171 {1, 1073733630},
30172 },
30173 clobbers: 9223372036854775808,
30174 outputs: []outputInfo{
30175 {1, 9223372036854775808},
30176 {0, 1073733624},
30177 },
30178 },
30179 },
30180 {
30181 name: "ADDCconst",
30182 auxType: auxInt64,
30183 argLen: 1,
30184 asm: ppc64.AADDC,
30185 reg: regInfo{
30186 inputs: []inputInfo{
30187 {0, 1073733630},
30188 },
30189 outputs: []outputInfo{
30190 {1, 9223372036854775808},
30191 {0, 1073733624},
30192 },
30193 },
30194 },
30195 {
30196 name: "SUBCconst",
30197 auxType: auxInt64,
30198 argLen: 1,
30199 asm: ppc64.ASUBC,
30200 reg: regInfo{
30201 inputs: []inputInfo{
30202 {0, 1073733630},
30203 },
30204 outputs: []outputInfo{
30205 {1, 9223372036854775808},
30206 {0, 1073733624},
30207 },
30208 },
30209 },
30210 {
30211 name: "ADDE",
30212 argLen: 3,
30213 commutative: true,
30214 asm: ppc64.AADDE,
30215 reg: regInfo{
30216 inputs: []inputInfo{
30217 {2, 9223372036854775808},
30218 {0, 1073733630},
30219 {1, 1073733630},
30220 },
30221 clobbers: 9223372036854775808,
30222 outputs: []outputInfo{
30223 {1, 9223372036854775808},
30224 {0, 1073733624},
30225 },
30226 },
30227 },
30228 {
30229 name: "ADDZE",
30230 argLen: 2,
30231 asm: ppc64.AADDZE,
30232 reg: regInfo{
30233 inputs: []inputInfo{
30234 {1, 9223372036854775808},
30235 {0, 1073733630},
30236 },
30237 clobbers: 9223372036854775808,
30238 outputs: []outputInfo{
30239 {1, 9223372036854775808},
30240 {0, 1073733624},
30241 },
30242 },
30243 },
30244 {
30245 name: "SUBE",
30246 argLen: 3,
30247 asm: ppc64.ASUBE,
30248 reg: regInfo{
30249 inputs: []inputInfo{
30250 {2, 9223372036854775808},
30251 {0, 1073733630},
30252 {1, 1073733630},
30253 },
30254 clobbers: 9223372036854775808,
30255 outputs: []outputInfo{
30256 {1, 9223372036854775808},
30257 {0, 1073733624},
30258 },
30259 },
30260 },
30261 {
30262 name: "ADDZEzero",
30263 argLen: 1,
30264 asm: ppc64.AADDZE,
30265 reg: regInfo{
30266 inputs: []inputInfo{
30267 {0, 9223372036854775808},
30268 },
30269 clobbers: 9223372036854775808,
30270 outputs: []outputInfo{
30271 {0, 1073733624},
30272 },
30273 },
30274 },
30275 {
30276 name: "SUBZEzero",
30277 argLen: 1,
30278 asm: ppc64.ASUBZE,
30279 reg: regInfo{
30280 inputs: []inputInfo{
30281 {0, 9223372036854775808},
30282 },
30283 clobbers: 9223372036854775808,
30284 outputs: []outputInfo{
30285 {0, 1073733624},
30286 },
30287 },
30288 },
30289 {
30290 name: "SRADconst",
30291 auxType: auxInt64,
30292 argLen: 1,
30293 asm: ppc64.ASRAD,
30294 reg: regInfo{
30295 inputs: []inputInfo{
30296 {0, 1073733630},
30297 },
30298 clobbers: 9223372036854775808,
30299 outputs: []outputInfo{
30300 {0, 1073733624},
30301 },
30302 },
30303 },
30304 {
30305 name: "SRAWconst",
30306 auxType: auxInt64,
30307 argLen: 1,
30308 asm: ppc64.ASRAW,
30309 reg: regInfo{
30310 inputs: []inputInfo{
30311 {0, 1073733630},
30312 },
30313 clobbers: 9223372036854775808,
30314 outputs: []outputInfo{
30315 {0, 1073733624},
30316 },
30317 },
30318 },
30319 {
30320 name: "SRDconst",
30321 auxType: auxInt64,
30322 argLen: 1,
30323 asm: ppc64.ASRD,
30324 reg: regInfo{
30325 inputs: []inputInfo{
30326 {0, 1073733630},
30327 },
30328 outputs: []outputInfo{
30329 {0, 1073733624},
30330 },
30331 },
30332 },
30333 {
30334 name: "SRWconst",
30335 auxType: auxInt64,
30336 argLen: 1,
30337 asm: ppc64.ASRW,
30338 reg: regInfo{
30339 inputs: []inputInfo{
30340 {0, 1073733630},
30341 },
30342 outputs: []outputInfo{
30343 {0, 1073733624},
30344 },
30345 },
30346 },
30347 {
30348 name: "SLDconst",
30349 auxType: auxInt64,
30350 argLen: 1,
30351 asm: ppc64.ASLD,
30352 reg: regInfo{
30353 inputs: []inputInfo{
30354 {0, 1073733630},
30355 },
30356 outputs: []outputInfo{
30357 {0, 1073733624},
30358 },
30359 },
30360 },
30361 {
30362 name: "SLWconst",
30363 auxType: auxInt64,
30364 argLen: 1,
30365 asm: ppc64.ASLW,
30366 reg: regInfo{
30367 inputs: []inputInfo{
30368 {0, 1073733630},
30369 },
30370 outputs: []outputInfo{
30371 {0, 1073733624},
30372 },
30373 },
30374 },
30375 {
30376 name: "ROTLconst",
30377 auxType: auxInt64,
30378 argLen: 1,
30379 asm: ppc64.AROTL,
30380 reg: regInfo{
30381 inputs: []inputInfo{
30382 {0, 1073733630},
30383 },
30384 outputs: []outputInfo{
30385 {0, 1073733624},
30386 },
30387 },
30388 },
30389 {
30390 name: "ROTLWconst",
30391 auxType: auxInt64,
30392 argLen: 1,
30393 asm: ppc64.AROTLW,
30394 reg: regInfo{
30395 inputs: []inputInfo{
30396 {0, 1073733630},
30397 },
30398 outputs: []outputInfo{
30399 {0, 1073733624},
30400 },
30401 },
30402 },
30403 {
30404 name: "EXTSWSLconst",
30405 auxType: auxInt64,
30406 argLen: 1,
30407 asm: ppc64.AEXTSWSLI,
30408 reg: regInfo{
30409 inputs: []inputInfo{
30410 {0, 1073733630},
30411 },
30412 outputs: []outputInfo{
30413 {0, 1073733624},
30414 },
30415 },
30416 },
30417 {
30418 name: "RLWINM",
30419 auxType: auxInt64,
30420 argLen: 1,
30421 asm: ppc64.ARLWNM,
30422 reg: regInfo{
30423 inputs: []inputInfo{
30424 {0, 1073733630},
30425 },
30426 outputs: []outputInfo{
30427 {0, 1073733624},
30428 },
30429 },
30430 },
30431 {
30432 name: "RLWNM",
30433 auxType: auxInt64,
30434 argLen: 2,
30435 asm: ppc64.ARLWNM,
30436 reg: regInfo{
30437 inputs: []inputInfo{
30438 {0, 1073733630},
30439 {1, 1073733630},
30440 },
30441 outputs: []outputInfo{
30442 {0, 1073733624},
30443 },
30444 },
30445 },
30446 {
30447 name: "RLWMI",
30448 auxType: auxInt64,
30449 argLen: 2,
30450 resultInArg0: true,
30451 asm: ppc64.ARLWMI,
30452 reg: regInfo{
30453 inputs: []inputInfo{
30454 {0, 1073733624},
30455 {1, 1073733630},
30456 },
30457 outputs: []outputInfo{
30458 {0, 1073733624},
30459 },
30460 },
30461 },
30462 {
30463 name: "RLDICL",
30464 auxType: auxInt64,
30465 argLen: 1,
30466 asm: ppc64.ARLDICL,
30467 reg: regInfo{
30468 inputs: []inputInfo{
30469 {0, 1073733630},
30470 },
30471 outputs: []outputInfo{
30472 {0, 1073733624},
30473 },
30474 },
30475 },
30476 {
30477 name: "RLDICLCC",
30478 auxType: auxInt64,
30479 argLen: 1,
30480 asm: ppc64.ARLDICLCC,
30481 reg: regInfo{
30482 inputs: []inputInfo{
30483 {0, 1073733630},
30484 },
30485 outputs: []outputInfo{
30486 {0, 1073733624},
30487 },
30488 },
30489 },
30490 {
30491 name: "RLDICR",
30492 auxType: auxInt64,
30493 argLen: 1,
30494 asm: ppc64.ARLDICR,
30495 reg: regInfo{
30496 inputs: []inputInfo{
30497 {0, 1073733630},
30498 },
30499 outputs: []outputInfo{
30500 {0, 1073733624},
30501 },
30502 },
30503 },
30504 {
30505 name: "CNTLZD",
30506 argLen: 1,
30507 asm: ppc64.ACNTLZD,
30508 reg: regInfo{
30509 inputs: []inputInfo{
30510 {0, 1073733630},
30511 },
30512 outputs: []outputInfo{
30513 {0, 1073733624},
30514 },
30515 },
30516 },
30517 {
30518 name: "CNTLZDCC",
30519 argLen: 1,
30520 asm: ppc64.ACNTLZDCC,
30521 reg: regInfo{
30522 inputs: []inputInfo{
30523 {0, 1073733630},
30524 },
30525 outputs: []outputInfo{
30526 {0, 1073733624},
30527 },
30528 },
30529 },
30530 {
30531 name: "CNTLZW",
30532 argLen: 1,
30533 asm: ppc64.ACNTLZW,
30534 reg: regInfo{
30535 inputs: []inputInfo{
30536 {0, 1073733630},
30537 },
30538 outputs: []outputInfo{
30539 {0, 1073733624},
30540 },
30541 },
30542 },
30543 {
30544 name: "CNTTZD",
30545 argLen: 1,
30546 asm: ppc64.ACNTTZD,
30547 reg: regInfo{
30548 inputs: []inputInfo{
30549 {0, 1073733630},
30550 },
30551 outputs: []outputInfo{
30552 {0, 1073733624},
30553 },
30554 },
30555 },
30556 {
30557 name: "CNTTZW",
30558 argLen: 1,
30559 asm: ppc64.ACNTTZW,
30560 reg: regInfo{
30561 inputs: []inputInfo{
30562 {0, 1073733630},
30563 },
30564 outputs: []outputInfo{
30565 {0, 1073733624},
30566 },
30567 },
30568 },
30569 {
30570 name: "POPCNTD",
30571 argLen: 1,
30572 asm: ppc64.APOPCNTD,
30573 reg: regInfo{
30574 inputs: []inputInfo{
30575 {0, 1073733630},
30576 },
30577 outputs: []outputInfo{
30578 {0, 1073733624},
30579 },
30580 },
30581 },
30582 {
30583 name: "POPCNTW",
30584 argLen: 1,
30585 asm: ppc64.APOPCNTW,
30586 reg: regInfo{
30587 inputs: []inputInfo{
30588 {0, 1073733630},
30589 },
30590 outputs: []outputInfo{
30591 {0, 1073733624},
30592 },
30593 },
30594 },
30595 {
30596 name: "POPCNTB",
30597 argLen: 1,
30598 asm: ppc64.APOPCNTB,
30599 reg: regInfo{
30600 inputs: []inputInfo{
30601 {0, 1073733630},
30602 },
30603 outputs: []outputInfo{
30604 {0, 1073733624},
30605 },
30606 },
30607 },
30608 {
30609 name: "FDIV",
30610 argLen: 2,
30611 asm: ppc64.AFDIV,
30612 reg: regInfo{
30613 inputs: []inputInfo{
30614 {0, 9223372032559808512},
30615 {1, 9223372032559808512},
30616 },
30617 outputs: []outputInfo{
30618 {0, 9223372032559808512},
30619 },
30620 },
30621 },
30622 {
30623 name: "FDIVS",
30624 argLen: 2,
30625 asm: ppc64.AFDIVS,
30626 reg: regInfo{
30627 inputs: []inputInfo{
30628 {0, 9223372032559808512},
30629 {1, 9223372032559808512},
30630 },
30631 outputs: []outputInfo{
30632 {0, 9223372032559808512},
30633 },
30634 },
30635 },
30636 {
30637 name: "DIVD",
30638 argLen: 2,
30639 asm: ppc64.ADIVD,
30640 reg: regInfo{
30641 inputs: []inputInfo{
30642 {0, 1073733630},
30643 {1, 1073733630},
30644 },
30645 outputs: []outputInfo{
30646 {0, 1073733624},
30647 },
30648 },
30649 },
30650 {
30651 name: "DIVW",
30652 argLen: 2,
30653 asm: ppc64.ADIVW,
30654 reg: regInfo{
30655 inputs: []inputInfo{
30656 {0, 1073733630},
30657 {1, 1073733630},
30658 },
30659 outputs: []outputInfo{
30660 {0, 1073733624},
30661 },
30662 },
30663 },
30664 {
30665 name: "DIVDU",
30666 argLen: 2,
30667 asm: ppc64.ADIVDU,
30668 reg: regInfo{
30669 inputs: []inputInfo{
30670 {0, 1073733630},
30671 {1, 1073733630},
30672 },
30673 outputs: []outputInfo{
30674 {0, 1073733624},
30675 },
30676 },
30677 },
30678 {
30679 name: "DIVWU",
30680 argLen: 2,
30681 asm: ppc64.ADIVWU,
30682 reg: regInfo{
30683 inputs: []inputInfo{
30684 {0, 1073733630},
30685 {1, 1073733630},
30686 },
30687 outputs: []outputInfo{
30688 {0, 1073733624},
30689 },
30690 },
30691 },
30692 {
30693 name: "MODUD",
30694 argLen: 2,
30695 asm: ppc64.AMODUD,
30696 reg: regInfo{
30697 inputs: []inputInfo{
30698 {0, 1073733630},
30699 {1, 1073733630},
30700 },
30701 outputs: []outputInfo{
30702 {0, 1073733624},
30703 },
30704 },
30705 },
30706 {
30707 name: "MODSD",
30708 argLen: 2,
30709 asm: ppc64.AMODSD,
30710 reg: regInfo{
30711 inputs: []inputInfo{
30712 {0, 1073733630},
30713 {1, 1073733630},
30714 },
30715 outputs: []outputInfo{
30716 {0, 1073733624},
30717 },
30718 },
30719 },
30720 {
30721 name: "MODUW",
30722 argLen: 2,
30723 asm: ppc64.AMODUW,
30724 reg: regInfo{
30725 inputs: []inputInfo{
30726 {0, 1073733630},
30727 {1, 1073733630},
30728 },
30729 outputs: []outputInfo{
30730 {0, 1073733624},
30731 },
30732 },
30733 },
30734 {
30735 name: "MODSW",
30736 argLen: 2,
30737 asm: ppc64.AMODSW,
30738 reg: regInfo{
30739 inputs: []inputInfo{
30740 {0, 1073733630},
30741 {1, 1073733630},
30742 },
30743 outputs: []outputInfo{
30744 {0, 1073733624},
30745 },
30746 },
30747 },
30748 {
30749 name: "FCTIDZ",
30750 argLen: 1,
30751 asm: ppc64.AFCTIDZ,
30752 reg: regInfo{
30753 inputs: []inputInfo{
30754 {0, 9223372032559808512},
30755 },
30756 outputs: []outputInfo{
30757 {0, 9223372032559808512},
30758 },
30759 },
30760 },
30761 {
30762 name: "FCTIWZ",
30763 argLen: 1,
30764 asm: ppc64.AFCTIWZ,
30765 reg: regInfo{
30766 inputs: []inputInfo{
30767 {0, 9223372032559808512},
30768 },
30769 outputs: []outputInfo{
30770 {0, 9223372032559808512},
30771 },
30772 },
30773 },
30774 {
30775 name: "FCFID",
30776 argLen: 1,
30777 asm: ppc64.AFCFID,
30778 reg: regInfo{
30779 inputs: []inputInfo{
30780 {0, 9223372032559808512},
30781 },
30782 outputs: []outputInfo{
30783 {0, 9223372032559808512},
30784 },
30785 },
30786 },
30787 {
30788 name: "FCFIDS",
30789 argLen: 1,
30790 asm: ppc64.AFCFIDS,
30791 reg: regInfo{
30792 inputs: []inputInfo{
30793 {0, 9223372032559808512},
30794 },
30795 outputs: []outputInfo{
30796 {0, 9223372032559808512},
30797 },
30798 },
30799 },
30800 {
30801 name: "FRSP",
30802 argLen: 1,
30803 asm: ppc64.AFRSP,
30804 reg: regInfo{
30805 inputs: []inputInfo{
30806 {0, 9223372032559808512},
30807 },
30808 outputs: []outputInfo{
30809 {0, 9223372032559808512},
30810 },
30811 },
30812 },
30813 {
30814 name: "MFVSRD",
30815 argLen: 1,
30816 asm: ppc64.AMFVSRD,
30817 reg: regInfo{
30818 inputs: []inputInfo{
30819 {0, 9223372032559808512},
30820 },
30821 outputs: []outputInfo{
30822 {0, 1073733624},
30823 },
30824 },
30825 },
30826 {
30827 name: "MTVSRD",
30828 argLen: 1,
30829 asm: ppc64.AMTVSRD,
30830 reg: regInfo{
30831 inputs: []inputInfo{
30832 {0, 1073733624},
30833 },
30834 outputs: []outputInfo{
30835 {0, 9223372032559808512},
30836 },
30837 },
30838 },
30839 {
30840 name: "AND",
30841 argLen: 2,
30842 commutative: true,
30843 asm: ppc64.AAND,
30844 reg: regInfo{
30845 inputs: []inputInfo{
30846 {0, 1073733630},
30847 {1, 1073733630},
30848 },
30849 outputs: []outputInfo{
30850 {0, 1073733624},
30851 },
30852 },
30853 },
30854 {
30855 name: "ANDN",
30856 argLen: 2,
30857 asm: ppc64.AANDN,
30858 reg: regInfo{
30859 inputs: []inputInfo{
30860 {0, 1073733630},
30861 {1, 1073733630},
30862 },
30863 outputs: []outputInfo{
30864 {0, 1073733624},
30865 },
30866 },
30867 },
30868 {
30869 name: "ANDNCC",
30870 argLen: 2,
30871 asm: ppc64.AANDNCC,
30872 reg: regInfo{
30873 inputs: []inputInfo{
30874 {0, 1073733630},
30875 {1, 1073733630},
30876 },
30877 outputs: []outputInfo{
30878 {0, 1073733624},
30879 },
30880 },
30881 },
30882 {
30883 name: "ANDCC",
30884 argLen: 2,
30885 commutative: true,
30886 asm: ppc64.AANDCC,
30887 reg: regInfo{
30888 inputs: []inputInfo{
30889 {0, 1073733630},
30890 {1, 1073733630},
30891 },
30892 outputs: []outputInfo{
30893 {0, 1073733624},
30894 },
30895 },
30896 },
30897 {
30898 name: "OR",
30899 argLen: 2,
30900 commutative: true,
30901 asm: ppc64.AOR,
30902 reg: regInfo{
30903 inputs: []inputInfo{
30904 {0, 1073733630},
30905 {1, 1073733630},
30906 },
30907 outputs: []outputInfo{
30908 {0, 1073733624},
30909 },
30910 },
30911 },
30912 {
30913 name: "ORN",
30914 argLen: 2,
30915 asm: ppc64.AORN,
30916 reg: regInfo{
30917 inputs: []inputInfo{
30918 {0, 1073733630},
30919 {1, 1073733630},
30920 },
30921 outputs: []outputInfo{
30922 {0, 1073733624},
30923 },
30924 },
30925 },
30926 {
30927 name: "ORCC",
30928 argLen: 2,
30929 commutative: true,
30930 asm: ppc64.AORCC,
30931 reg: regInfo{
30932 inputs: []inputInfo{
30933 {0, 1073733630},
30934 {1, 1073733630},
30935 },
30936 outputs: []outputInfo{
30937 {0, 1073733624},
30938 },
30939 },
30940 },
30941 {
30942 name: "NOR",
30943 argLen: 2,
30944 commutative: true,
30945 asm: ppc64.ANOR,
30946 reg: regInfo{
30947 inputs: []inputInfo{
30948 {0, 1073733630},
30949 {1, 1073733630},
30950 },
30951 outputs: []outputInfo{
30952 {0, 1073733624},
30953 },
30954 },
30955 },
30956 {
30957 name: "NORCC",
30958 argLen: 2,
30959 commutative: true,
30960 asm: ppc64.ANORCC,
30961 reg: regInfo{
30962 inputs: []inputInfo{
30963 {0, 1073733630},
30964 {1, 1073733630},
30965 },
30966 outputs: []outputInfo{
30967 {0, 1073733624},
30968 },
30969 },
30970 },
30971 {
30972 name: "XOR",
30973 argLen: 2,
30974 commutative: true,
30975 asm: ppc64.AXOR,
30976 reg: regInfo{
30977 inputs: []inputInfo{
30978 {0, 1073733630},
30979 {1, 1073733630},
30980 },
30981 outputs: []outputInfo{
30982 {0, 1073733624},
30983 },
30984 },
30985 },
30986 {
30987 name: "XORCC",
30988 argLen: 2,
30989 commutative: true,
30990 asm: ppc64.AXORCC,
30991 reg: regInfo{
30992 inputs: []inputInfo{
30993 {0, 1073733630},
30994 {1, 1073733630},
30995 },
30996 outputs: []outputInfo{
30997 {0, 1073733624},
30998 },
30999 },
31000 },
31001 {
31002 name: "EQV",
31003 argLen: 2,
31004 commutative: true,
31005 asm: ppc64.AEQV,
31006 reg: regInfo{
31007 inputs: []inputInfo{
31008 {0, 1073733630},
31009 {1, 1073733630},
31010 },
31011 outputs: []outputInfo{
31012 {0, 1073733624},
31013 },
31014 },
31015 },
31016 {
31017 name: "NEG",
31018 argLen: 1,
31019 asm: ppc64.ANEG,
31020 reg: regInfo{
31021 inputs: []inputInfo{
31022 {0, 1073733630},
31023 },
31024 outputs: []outputInfo{
31025 {0, 1073733624},
31026 },
31027 },
31028 },
31029 {
31030 name: "NEGCC",
31031 argLen: 1,
31032 asm: ppc64.ANEGCC,
31033 reg: regInfo{
31034 inputs: []inputInfo{
31035 {0, 1073733630},
31036 },
31037 outputs: []outputInfo{
31038 {0, 1073733624},
31039 },
31040 },
31041 },
31042 {
31043 name: "BRD",
31044 argLen: 1,
31045 asm: ppc64.ABRD,
31046 reg: regInfo{
31047 inputs: []inputInfo{
31048 {0, 1073733630},
31049 },
31050 outputs: []outputInfo{
31051 {0, 1073733624},
31052 },
31053 },
31054 },
31055 {
31056 name: "BRW",
31057 argLen: 1,
31058 asm: ppc64.ABRW,
31059 reg: regInfo{
31060 inputs: []inputInfo{
31061 {0, 1073733630},
31062 },
31063 outputs: []outputInfo{
31064 {0, 1073733624},
31065 },
31066 },
31067 },
31068 {
31069 name: "BRH",
31070 argLen: 1,
31071 asm: ppc64.ABRH,
31072 reg: regInfo{
31073 inputs: []inputInfo{
31074 {0, 1073733630},
31075 },
31076 outputs: []outputInfo{
31077 {0, 1073733624},
31078 },
31079 },
31080 },
31081 {
31082 name: "FNEG",
31083 argLen: 1,
31084 asm: ppc64.AFNEG,
31085 reg: regInfo{
31086 inputs: []inputInfo{
31087 {0, 9223372032559808512},
31088 },
31089 outputs: []outputInfo{
31090 {0, 9223372032559808512},
31091 },
31092 },
31093 },
31094 {
31095 name: "FSQRT",
31096 argLen: 1,
31097 asm: ppc64.AFSQRT,
31098 reg: regInfo{
31099 inputs: []inputInfo{
31100 {0, 9223372032559808512},
31101 },
31102 outputs: []outputInfo{
31103 {0, 9223372032559808512},
31104 },
31105 },
31106 },
31107 {
31108 name: "FSQRTS",
31109 argLen: 1,
31110 asm: ppc64.AFSQRTS,
31111 reg: regInfo{
31112 inputs: []inputInfo{
31113 {0, 9223372032559808512},
31114 },
31115 outputs: []outputInfo{
31116 {0, 9223372032559808512},
31117 },
31118 },
31119 },
31120 {
31121 name: "FFLOOR",
31122 argLen: 1,
31123 asm: ppc64.AFRIM,
31124 reg: regInfo{
31125 inputs: []inputInfo{
31126 {0, 9223372032559808512},
31127 },
31128 outputs: []outputInfo{
31129 {0, 9223372032559808512},
31130 },
31131 },
31132 },
31133 {
31134 name: "FCEIL",
31135 argLen: 1,
31136 asm: ppc64.AFRIP,
31137 reg: regInfo{
31138 inputs: []inputInfo{
31139 {0, 9223372032559808512},
31140 },
31141 outputs: []outputInfo{
31142 {0, 9223372032559808512},
31143 },
31144 },
31145 },
31146 {
31147 name: "FTRUNC",
31148 argLen: 1,
31149 asm: ppc64.AFRIZ,
31150 reg: regInfo{
31151 inputs: []inputInfo{
31152 {0, 9223372032559808512},
31153 },
31154 outputs: []outputInfo{
31155 {0, 9223372032559808512},
31156 },
31157 },
31158 },
31159 {
31160 name: "FROUND",
31161 argLen: 1,
31162 asm: ppc64.AFRIN,
31163 reg: regInfo{
31164 inputs: []inputInfo{
31165 {0, 9223372032559808512},
31166 },
31167 outputs: []outputInfo{
31168 {0, 9223372032559808512},
31169 },
31170 },
31171 },
31172 {
31173 name: "FABS",
31174 argLen: 1,
31175 asm: ppc64.AFABS,
31176 reg: regInfo{
31177 inputs: []inputInfo{
31178 {0, 9223372032559808512},
31179 },
31180 outputs: []outputInfo{
31181 {0, 9223372032559808512},
31182 },
31183 },
31184 },
31185 {
31186 name: "FNABS",
31187 argLen: 1,
31188 asm: ppc64.AFNABS,
31189 reg: regInfo{
31190 inputs: []inputInfo{
31191 {0, 9223372032559808512},
31192 },
31193 outputs: []outputInfo{
31194 {0, 9223372032559808512},
31195 },
31196 },
31197 },
31198 {
31199 name: "FCPSGN",
31200 argLen: 2,
31201 asm: ppc64.AFCPSGN,
31202 reg: regInfo{
31203 inputs: []inputInfo{
31204 {0, 9223372032559808512},
31205 {1, 9223372032559808512},
31206 },
31207 outputs: []outputInfo{
31208 {0, 9223372032559808512},
31209 },
31210 },
31211 },
31212 {
31213 name: "ORconst",
31214 auxType: auxInt64,
31215 argLen: 1,
31216 asm: ppc64.AOR,
31217 reg: regInfo{
31218 inputs: []inputInfo{
31219 {0, 1073733630},
31220 },
31221 outputs: []outputInfo{
31222 {0, 1073733624},
31223 },
31224 },
31225 },
31226 {
31227 name: "XORconst",
31228 auxType: auxInt64,
31229 argLen: 1,
31230 asm: ppc64.AXOR,
31231 reg: regInfo{
31232 inputs: []inputInfo{
31233 {0, 1073733630},
31234 },
31235 outputs: []outputInfo{
31236 {0, 1073733624},
31237 },
31238 },
31239 },
31240 {
31241 name: "ANDCCconst",
31242 auxType: auxInt64,
31243 argLen: 1,
31244 asm: ppc64.AANDCC,
31245 reg: regInfo{
31246 inputs: []inputInfo{
31247 {0, 1073733630},
31248 },
31249 outputs: []outputInfo{
31250 {0, 1073733624},
31251 },
31252 },
31253 },
31254 {
31255 name: "ANDconst",
31256 auxType: auxInt64,
31257 argLen: 1,
31258 clobberFlags: true,
31259 asm: ppc64.AANDCC,
31260 reg: regInfo{
31261 inputs: []inputInfo{
31262 {0, 1073733630},
31263 },
31264 outputs: []outputInfo{
31265 {0, 1073733624},
31266 },
31267 },
31268 },
31269 {
31270 name: "MOVBreg",
31271 argLen: 1,
31272 asm: ppc64.AMOVB,
31273 reg: regInfo{
31274 inputs: []inputInfo{
31275 {0, 1073733630},
31276 },
31277 outputs: []outputInfo{
31278 {0, 1073733624},
31279 },
31280 },
31281 },
31282 {
31283 name: "MOVBZreg",
31284 argLen: 1,
31285 asm: ppc64.AMOVBZ,
31286 reg: regInfo{
31287 inputs: []inputInfo{
31288 {0, 1073733630},
31289 },
31290 outputs: []outputInfo{
31291 {0, 1073733624},
31292 },
31293 },
31294 },
31295 {
31296 name: "MOVHreg",
31297 argLen: 1,
31298 asm: ppc64.AMOVH,
31299 reg: regInfo{
31300 inputs: []inputInfo{
31301 {0, 1073733630},
31302 },
31303 outputs: []outputInfo{
31304 {0, 1073733624},
31305 },
31306 },
31307 },
31308 {
31309 name: "MOVHZreg",
31310 argLen: 1,
31311 asm: ppc64.AMOVHZ,
31312 reg: regInfo{
31313 inputs: []inputInfo{
31314 {0, 1073733630},
31315 },
31316 outputs: []outputInfo{
31317 {0, 1073733624},
31318 },
31319 },
31320 },
31321 {
31322 name: "MOVWreg",
31323 argLen: 1,
31324 asm: ppc64.AMOVW,
31325 reg: regInfo{
31326 inputs: []inputInfo{
31327 {0, 1073733630},
31328 },
31329 outputs: []outputInfo{
31330 {0, 1073733624},
31331 },
31332 },
31333 },
31334 {
31335 name: "MOVWZreg",
31336 argLen: 1,
31337 asm: ppc64.AMOVWZ,
31338 reg: regInfo{
31339 inputs: []inputInfo{
31340 {0, 1073733630},
31341 },
31342 outputs: []outputInfo{
31343 {0, 1073733624},
31344 },
31345 },
31346 },
31347 {
31348 name: "MOVBZload",
31349 auxType: auxSymOff,
31350 argLen: 2,
31351 faultOnNilArg0: true,
31352 symEffect: SymRead,
31353 asm: ppc64.AMOVBZ,
31354 reg: regInfo{
31355 inputs: []inputInfo{
31356 {0, 1073733630},
31357 },
31358 outputs: []outputInfo{
31359 {0, 1073733624},
31360 },
31361 },
31362 },
31363 {
31364 name: "MOVHload",
31365 auxType: auxSymOff,
31366 argLen: 2,
31367 faultOnNilArg0: true,
31368 symEffect: SymRead,
31369 asm: ppc64.AMOVH,
31370 reg: regInfo{
31371 inputs: []inputInfo{
31372 {0, 1073733630},
31373 },
31374 outputs: []outputInfo{
31375 {0, 1073733624},
31376 },
31377 },
31378 },
31379 {
31380 name: "MOVHZload",
31381 auxType: auxSymOff,
31382 argLen: 2,
31383 faultOnNilArg0: true,
31384 symEffect: SymRead,
31385 asm: ppc64.AMOVHZ,
31386 reg: regInfo{
31387 inputs: []inputInfo{
31388 {0, 1073733630},
31389 },
31390 outputs: []outputInfo{
31391 {0, 1073733624},
31392 },
31393 },
31394 },
31395 {
31396 name: "MOVWload",
31397 auxType: auxSymOff,
31398 argLen: 2,
31399 faultOnNilArg0: true,
31400 symEffect: SymRead,
31401 asm: ppc64.AMOVW,
31402 reg: regInfo{
31403 inputs: []inputInfo{
31404 {0, 1073733630},
31405 },
31406 outputs: []outputInfo{
31407 {0, 1073733624},
31408 },
31409 },
31410 },
31411 {
31412 name: "MOVWZload",
31413 auxType: auxSymOff,
31414 argLen: 2,
31415 faultOnNilArg0: true,
31416 symEffect: SymRead,
31417 asm: ppc64.AMOVWZ,
31418 reg: regInfo{
31419 inputs: []inputInfo{
31420 {0, 1073733630},
31421 },
31422 outputs: []outputInfo{
31423 {0, 1073733624},
31424 },
31425 },
31426 },
31427 {
31428 name: "MOVDload",
31429 auxType: auxSymOff,
31430 argLen: 2,
31431 faultOnNilArg0: true,
31432 symEffect: SymRead,
31433 asm: ppc64.AMOVD,
31434 reg: regInfo{
31435 inputs: []inputInfo{
31436 {0, 1073733630},
31437 },
31438 outputs: []outputInfo{
31439 {0, 1073733624},
31440 },
31441 },
31442 },
31443 {
31444 name: "MOVDBRload",
31445 argLen: 2,
31446 faultOnNilArg0: true,
31447 asm: ppc64.AMOVDBR,
31448 reg: regInfo{
31449 inputs: []inputInfo{
31450 {0, 1073733630},
31451 },
31452 outputs: []outputInfo{
31453 {0, 1073733624},
31454 },
31455 },
31456 },
31457 {
31458 name: "MOVWBRload",
31459 argLen: 2,
31460 faultOnNilArg0: true,
31461 asm: ppc64.AMOVWBR,
31462 reg: regInfo{
31463 inputs: []inputInfo{
31464 {0, 1073733630},
31465 },
31466 outputs: []outputInfo{
31467 {0, 1073733624},
31468 },
31469 },
31470 },
31471 {
31472 name: "MOVHBRload",
31473 argLen: 2,
31474 faultOnNilArg0: true,
31475 asm: ppc64.AMOVHBR,
31476 reg: regInfo{
31477 inputs: []inputInfo{
31478 {0, 1073733630},
31479 },
31480 outputs: []outputInfo{
31481 {0, 1073733624},
31482 },
31483 },
31484 },
31485 {
31486 name: "MOVBZloadidx",
31487 argLen: 3,
31488 asm: ppc64.AMOVBZ,
31489 reg: regInfo{
31490 inputs: []inputInfo{
31491 {1, 1073733624},
31492 {0, 1073733630},
31493 },
31494 outputs: []outputInfo{
31495 {0, 1073733624},
31496 },
31497 },
31498 },
31499 {
31500 name: "MOVHloadidx",
31501 argLen: 3,
31502 asm: ppc64.AMOVH,
31503 reg: regInfo{
31504 inputs: []inputInfo{
31505 {1, 1073733624},
31506 {0, 1073733630},
31507 },
31508 outputs: []outputInfo{
31509 {0, 1073733624},
31510 },
31511 },
31512 },
31513 {
31514 name: "MOVHZloadidx",
31515 argLen: 3,
31516 asm: ppc64.AMOVHZ,
31517 reg: regInfo{
31518 inputs: []inputInfo{
31519 {1, 1073733624},
31520 {0, 1073733630},
31521 },
31522 outputs: []outputInfo{
31523 {0, 1073733624},
31524 },
31525 },
31526 },
31527 {
31528 name: "MOVWloadidx",
31529 argLen: 3,
31530 asm: ppc64.AMOVW,
31531 reg: regInfo{
31532 inputs: []inputInfo{
31533 {1, 1073733624},
31534 {0, 1073733630},
31535 },
31536 outputs: []outputInfo{
31537 {0, 1073733624},
31538 },
31539 },
31540 },
31541 {
31542 name: "MOVWZloadidx",
31543 argLen: 3,
31544 asm: ppc64.AMOVWZ,
31545 reg: regInfo{
31546 inputs: []inputInfo{
31547 {1, 1073733624},
31548 {0, 1073733630},
31549 },
31550 outputs: []outputInfo{
31551 {0, 1073733624},
31552 },
31553 },
31554 },
31555 {
31556 name: "MOVDloadidx",
31557 argLen: 3,
31558 asm: ppc64.AMOVD,
31559 reg: regInfo{
31560 inputs: []inputInfo{
31561 {1, 1073733624},
31562 {0, 1073733630},
31563 },
31564 outputs: []outputInfo{
31565 {0, 1073733624},
31566 },
31567 },
31568 },
31569 {
31570 name: "MOVHBRloadidx",
31571 argLen: 3,
31572 asm: ppc64.AMOVHBR,
31573 reg: regInfo{
31574 inputs: []inputInfo{
31575 {1, 1073733624},
31576 {0, 1073733630},
31577 },
31578 outputs: []outputInfo{
31579 {0, 1073733624},
31580 },
31581 },
31582 },
31583 {
31584 name: "MOVWBRloadidx",
31585 argLen: 3,
31586 asm: ppc64.AMOVWBR,
31587 reg: regInfo{
31588 inputs: []inputInfo{
31589 {1, 1073733624},
31590 {0, 1073733630},
31591 },
31592 outputs: []outputInfo{
31593 {0, 1073733624},
31594 },
31595 },
31596 },
31597 {
31598 name: "MOVDBRloadidx",
31599 argLen: 3,
31600 asm: ppc64.AMOVDBR,
31601 reg: regInfo{
31602 inputs: []inputInfo{
31603 {1, 1073733624},
31604 {0, 1073733630},
31605 },
31606 outputs: []outputInfo{
31607 {0, 1073733624},
31608 },
31609 },
31610 },
31611 {
31612 name: "FMOVDloadidx",
31613 argLen: 3,
31614 asm: ppc64.AFMOVD,
31615 reg: regInfo{
31616 inputs: []inputInfo{
31617 {0, 1073733630},
31618 {1, 1073733630},
31619 },
31620 outputs: []outputInfo{
31621 {0, 9223372032559808512},
31622 },
31623 },
31624 },
31625 {
31626 name: "FMOVSloadidx",
31627 argLen: 3,
31628 asm: ppc64.AFMOVS,
31629 reg: regInfo{
31630 inputs: []inputInfo{
31631 {0, 1073733630},
31632 {1, 1073733630},
31633 },
31634 outputs: []outputInfo{
31635 {0, 9223372032559808512},
31636 },
31637 },
31638 },
31639 {
31640 name: "DCBT",
31641 auxType: auxInt64,
31642 argLen: 2,
31643 hasSideEffects: true,
31644 asm: ppc64.ADCBT,
31645 reg: regInfo{
31646 inputs: []inputInfo{
31647 {0, 1073733630},
31648 },
31649 },
31650 },
31651 {
31652 name: "MOVDBRstore",
31653 argLen: 3,
31654 faultOnNilArg0: true,
31655 asm: ppc64.AMOVDBR,
31656 reg: regInfo{
31657 inputs: []inputInfo{
31658 {0, 1073733630},
31659 {1, 1073733630},
31660 },
31661 },
31662 },
31663 {
31664 name: "MOVWBRstore",
31665 argLen: 3,
31666 faultOnNilArg0: true,
31667 asm: ppc64.AMOVWBR,
31668 reg: regInfo{
31669 inputs: []inputInfo{
31670 {0, 1073733630},
31671 {1, 1073733630},
31672 },
31673 },
31674 },
31675 {
31676 name: "MOVHBRstore",
31677 argLen: 3,
31678 faultOnNilArg0: true,
31679 asm: ppc64.AMOVHBR,
31680 reg: regInfo{
31681 inputs: []inputInfo{
31682 {0, 1073733630},
31683 {1, 1073733630},
31684 },
31685 },
31686 },
31687 {
31688 name: "FMOVDload",
31689 auxType: auxSymOff,
31690 argLen: 2,
31691 faultOnNilArg0: true,
31692 symEffect: SymRead,
31693 asm: ppc64.AFMOVD,
31694 reg: regInfo{
31695 inputs: []inputInfo{
31696 {0, 1073733630},
31697 },
31698 outputs: []outputInfo{
31699 {0, 9223372032559808512},
31700 },
31701 },
31702 },
31703 {
31704 name: "FMOVSload",
31705 auxType: auxSymOff,
31706 argLen: 2,
31707 faultOnNilArg0: true,
31708 symEffect: SymRead,
31709 asm: ppc64.AFMOVS,
31710 reg: regInfo{
31711 inputs: []inputInfo{
31712 {0, 1073733630},
31713 },
31714 outputs: []outputInfo{
31715 {0, 9223372032559808512},
31716 },
31717 },
31718 },
31719 {
31720 name: "MOVBstore",
31721 auxType: auxSymOff,
31722 argLen: 3,
31723 faultOnNilArg0: true,
31724 symEffect: SymWrite,
31725 asm: ppc64.AMOVB,
31726 reg: regInfo{
31727 inputs: []inputInfo{
31728 {0, 1073733630},
31729 {1, 1073733630},
31730 },
31731 },
31732 },
31733 {
31734 name: "MOVHstore",
31735 auxType: auxSymOff,
31736 argLen: 3,
31737 faultOnNilArg0: true,
31738 symEffect: SymWrite,
31739 asm: ppc64.AMOVH,
31740 reg: regInfo{
31741 inputs: []inputInfo{
31742 {0, 1073733630},
31743 {1, 1073733630},
31744 },
31745 },
31746 },
31747 {
31748 name: "MOVWstore",
31749 auxType: auxSymOff,
31750 argLen: 3,
31751 faultOnNilArg0: true,
31752 symEffect: SymWrite,
31753 asm: ppc64.AMOVW,
31754 reg: regInfo{
31755 inputs: []inputInfo{
31756 {0, 1073733630},
31757 {1, 1073733630},
31758 },
31759 },
31760 },
31761 {
31762 name: "MOVDstore",
31763 auxType: auxSymOff,
31764 argLen: 3,
31765 faultOnNilArg0: true,
31766 symEffect: SymWrite,
31767 asm: ppc64.AMOVD,
31768 reg: regInfo{
31769 inputs: []inputInfo{
31770 {0, 1073733630},
31771 {1, 1073733630},
31772 },
31773 },
31774 },
31775 {
31776 name: "FMOVDstore",
31777 auxType: auxSymOff,
31778 argLen: 3,
31779 faultOnNilArg0: true,
31780 symEffect: SymWrite,
31781 asm: ppc64.AFMOVD,
31782 reg: regInfo{
31783 inputs: []inputInfo{
31784 {0, 1073733630},
31785 {1, 9223372032559808512},
31786 },
31787 },
31788 },
31789 {
31790 name: "FMOVSstore",
31791 auxType: auxSymOff,
31792 argLen: 3,
31793 faultOnNilArg0: true,
31794 symEffect: SymWrite,
31795 asm: ppc64.AFMOVS,
31796 reg: regInfo{
31797 inputs: []inputInfo{
31798 {0, 1073733630},
31799 {1, 9223372032559808512},
31800 },
31801 },
31802 },
31803 {
31804 name: "MOVBstoreidx",
31805 argLen: 4,
31806 asm: ppc64.AMOVB,
31807 reg: regInfo{
31808 inputs: []inputInfo{
31809 {0, 1073733630},
31810 {1, 1073733630},
31811 {2, 1073733630},
31812 },
31813 },
31814 },
31815 {
31816 name: "MOVHstoreidx",
31817 argLen: 4,
31818 asm: ppc64.AMOVH,
31819 reg: regInfo{
31820 inputs: []inputInfo{
31821 {0, 1073733630},
31822 {1, 1073733630},
31823 {2, 1073733630},
31824 },
31825 },
31826 },
31827 {
31828 name: "MOVWstoreidx",
31829 argLen: 4,
31830 asm: ppc64.AMOVW,
31831 reg: regInfo{
31832 inputs: []inputInfo{
31833 {0, 1073733630},
31834 {1, 1073733630},
31835 {2, 1073733630},
31836 },
31837 },
31838 },
31839 {
31840 name: "MOVDstoreidx",
31841 argLen: 4,
31842 asm: ppc64.AMOVD,
31843 reg: regInfo{
31844 inputs: []inputInfo{
31845 {0, 1073733630},
31846 {1, 1073733630},
31847 {2, 1073733630},
31848 },
31849 },
31850 },
31851 {
31852 name: "FMOVDstoreidx",
31853 argLen: 4,
31854 asm: ppc64.AFMOVD,
31855 reg: regInfo{
31856 inputs: []inputInfo{
31857 {0, 1073733630},
31858 {1, 1073733630},
31859 {2, 9223372032559808512},
31860 },
31861 },
31862 },
31863 {
31864 name: "FMOVSstoreidx",
31865 argLen: 4,
31866 asm: ppc64.AFMOVS,
31867 reg: regInfo{
31868 inputs: []inputInfo{
31869 {0, 1073733630},
31870 {1, 1073733630},
31871 {2, 9223372032559808512},
31872 },
31873 },
31874 },
31875 {
31876 name: "MOVHBRstoreidx",
31877 argLen: 4,
31878 asm: ppc64.AMOVHBR,
31879 reg: regInfo{
31880 inputs: []inputInfo{
31881 {0, 1073733630},
31882 {1, 1073733630},
31883 {2, 1073733630},
31884 },
31885 },
31886 },
31887 {
31888 name: "MOVWBRstoreidx",
31889 argLen: 4,
31890 asm: ppc64.AMOVWBR,
31891 reg: regInfo{
31892 inputs: []inputInfo{
31893 {0, 1073733630},
31894 {1, 1073733630},
31895 {2, 1073733630},
31896 },
31897 },
31898 },
31899 {
31900 name: "MOVDBRstoreidx",
31901 argLen: 4,
31902 asm: ppc64.AMOVDBR,
31903 reg: regInfo{
31904 inputs: []inputInfo{
31905 {0, 1073733630},
31906 {1, 1073733630},
31907 {2, 1073733630},
31908 },
31909 },
31910 },
31911 {
31912 name: "MOVBstorezero",
31913 auxType: auxSymOff,
31914 argLen: 2,
31915 faultOnNilArg0: true,
31916 symEffect: SymWrite,
31917 asm: ppc64.AMOVB,
31918 reg: regInfo{
31919 inputs: []inputInfo{
31920 {0, 1073733630},
31921 },
31922 },
31923 },
31924 {
31925 name: "MOVHstorezero",
31926 auxType: auxSymOff,
31927 argLen: 2,
31928 faultOnNilArg0: true,
31929 symEffect: SymWrite,
31930 asm: ppc64.AMOVH,
31931 reg: regInfo{
31932 inputs: []inputInfo{
31933 {0, 1073733630},
31934 },
31935 },
31936 },
31937 {
31938 name: "MOVWstorezero",
31939 auxType: auxSymOff,
31940 argLen: 2,
31941 faultOnNilArg0: true,
31942 symEffect: SymWrite,
31943 asm: ppc64.AMOVW,
31944 reg: regInfo{
31945 inputs: []inputInfo{
31946 {0, 1073733630},
31947 },
31948 },
31949 },
31950 {
31951 name: "MOVDstorezero",
31952 auxType: auxSymOff,
31953 argLen: 2,
31954 faultOnNilArg0: true,
31955 symEffect: SymWrite,
31956 asm: ppc64.AMOVD,
31957 reg: regInfo{
31958 inputs: []inputInfo{
31959 {0, 1073733630},
31960 },
31961 },
31962 },
31963 {
31964 name: "MOVDaddr",
31965 auxType: auxSymOff,
31966 argLen: 1,
31967 rematerializeable: true,
31968 symEffect: SymAddr,
31969 asm: ppc64.AMOVD,
31970 reg: regInfo{
31971 inputs: []inputInfo{
31972 {0, 1073733630},
31973 },
31974 outputs: []outputInfo{
31975 {0, 1073733624},
31976 },
31977 },
31978 },
31979 {
31980 name: "MOVDconst",
31981 auxType: auxInt64,
31982 argLen: 0,
31983 rematerializeable: true,
31984 asm: ppc64.AMOVD,
31985 reg: regInfo{
31986 outputs: []outputInfo{
31987 {0, 1073733624},
31988 },
31989 },
31990 },
31991 {
31992 name: "FMOVDconst",
31993 auxType: auxFloat64,
31994 argLen: 0,
31995 rematerializeable: true,
31996 asm: ppc64.AFMOVD,
31997 reg: regInfo{
31998 outputs: []outputInfo{
31999 {0, 9223372032559808512},
32000 },
32001 },
32002 },
32003 {
32004 name: "FMOVSconst",
32005 auxType: auxFloat32,
32006 argLen: 0,
32007 rematerializeable: true,
32008 asm: ppc64.AFMOVS,
32009 reg: regInfo{
32010 outputs: []outputInfo{
32011 {0, 9223372032559808512},
32012 },
32013 },
32014 },
32015 {
32016 name: "FCMPU",
32017 argLen: 2,
32018 asm: ppc64.AFCMPU,
32019 reg: regInfo{
32020 inputs: []inputInfo{
32021 {0, 9223372032559808512},
32022 {1, 9223372032559808512},
32023 },
32024 },
32025 },
32026 {
32027 name: "CMP",
32028 argLen: 2,
32029 asm: ppc64.ACMP,
32030 reg: regInfo{
32031 inputs: []inputInfo{
32032 {0, 1073733630},
32033 {1, 1073733630},
32034 },
32035 },
32036 },
32037 {
32038 name: "CMPU",
32039 argLen: 2,
32040 asm: ppc64.ACMPU,
32041 reg: regInfo{
32042 inputs: []inputInfo{
32043 {0, 1073733630},
32044 {1, 1073733630},
32045 },
32046 },
32047 },
32048 {
32049 name: "CMPW",
32050 argLen: 2,
32051 asm: ppc64.ACMPW,
32052 reg: regInfo{
32053 inputs: []inputInfo{
32054 {0, 1073733630},
32055 {1, 1073733630},
32056 },
32057 },
32058 },
32059 {
32060 name: "CMPWU",
32061 argLen: 2,
32062 asm: ppc64.ACMPWU,
32063 reg: regInfo{
32064 inputs: []inputInfo{
32065 {0, 1073733630},
32066 {1, 1073733630},
32067 },
32068 },
32069 },
32070 {
32071 name: "CMPconst",
32072 auxType: auxInt64,
32073 argLen: 1,
32074 asm: ppc64.ACMP,
32075 reg: regInfo{
32076 inputs: []inputInfo{
32077 {0, 1073733630},
32078 },
32079 },
32080 },
32081 {
32082 name: "CMPUconst",
32083 auxType: auxInt64,
32084 argLen: 1,
32085 asm: ppc64.ACMPU,
32086 reg: regInfo{
32087 inputs: []inputInfo{
32088 {0, 1073733630},
32089 },
32090 },
32091 },
32092 {
32093 name: "CMPWconst",
32094 auxType: auxInt32,
32095 argLen: 1,
32096 asm: ppc64.ACMPW,
32097 reg: regInfo{
32098 inputs: []inputInfo{
32099 {0, 1073733630},
32100 },
32101 },
32102 },
32103 {
32104 name: "CMPWUconst",
32105 auxType: auxInt32,
32106 argLen: 1,
32107 asm: ppc64.ACMPWU,
32108 reg: regInfo{
32109 inputs: []inputInfo{
32110 {0, 1073733630},
32111 },
32112 },
32113 },
32114 {
32115 name: "ISEL",
32116 auxType: auxInt32,
32117 argLen: 3,
32118 asm: ppc64.AISEL,
32119 reg: regInfo{
32120 inputs: []inputInfo{
32121 {0, 1073733624},
32122 {1, 1073733624},
32123 },
32124 outputs: []outputInfo{
32125 {0, 1073733624},
32126 },
32127 },
32128 },
32129 {
32130 name: "ISELZ",
32131 auxType: auxInt32,
32132 argLen: 2,
32133 asm: ppc64.AISEL,
32134 reg: regInfo{
32135 inputs: []inputInfo{
32136 {0, 1073733624},
32137 },
32138 outputs: []outputInfo{
32139 {0, 1073733624},
32140 },
32141 },
32142 },
32143 {
32144 name: "SETBC",
32145 auxType: auxInt32,
32146 argLen: 1,
32147 asm: ppc64.ASETBC,
32148 reg: regInfo{
32149 outputs: []outputInfo{
32150 {0, 1073733624},
32151 },
32152 },
32153 },
32154 {
32155 name: "SETBCR",
32156 auxType: auxInt32,
32157 argLen: 1,
32158 asm: ppc64.ASETBCR,
32159 reg: regInfo{
32160 outputs: []outputInfo{
32161 {0, 1073733624},
32162 },
32163 },
32164 },
32165 {
32166 name: "Equal",
32167 argLen: 1,
32168 reg: regInfo{
32169 outputs: []outputInfo{
32170 {0, 1073733624},
32171 },
32172 },
32173 },
32174 {
32175 name: "NotEqual",
32176 argLen: 1,
32177 reg: regInfo{
32178 outputs: []outputInfo{
32179 {0, 1073733624},
32180 },
32181 },
32182 },
32183 {
32184 name: "LessThan",
32185 argLen: 1,
32186 reg: regInfo{
32187 outputs: []outputInfo{
32188 {0, 1073733624},
32189 },
32190 },
32191 },
32192 {
32193 name: "FLessThan",
32194 argLen: 1,
32195 reg: regInfo{
32196 outputs: []outputInfo{
32197 {0, 1073733624},
32198 },
32199 },
32200 },
32201 {
32202 name: "LessEqual",
32203 argLen: 1,
32204 reg: regInfo{
32205 outputs: []outputInfo{
32206 {0, 1073733624},
32207 },
32208 },
32209 },
32210 {
32211 name: "FLessEqual",
32212 argLen: 1,
32213 reg: regInfo{
32214 outputs: []outputInfo{
32215 {0, 1073733624},
32216 },
32217 },
32218 },
32219 {
32220 name: "GreaterThan",
32221 argLen: 1,
32222 reg: regInfo{
32223 outputs: []outputInfo{
32224 {0, 1073733624},
32225 },
32226 },
32227 },
32228 {
32229 name: "FGreaterThan",
32230 argLen: 1,
32231 reg: regInfo{
32232 outputs: []outputInfo{
32233 {0, 1073733624},
32234 },
32235 },
32236 },
32237 {
32238 name: "GreaterEqual",
32239 argLen: 1,
32240 reg: regInfo{
32241 outputs: []outputInfo{
32242 {0, 1073733624},
32243 },
32244 },
32245 },
32246 {
32247 name: "FGreaterEqual",
32248 argLen: 1,
32249 reg: regInfo{
32250 outputs: []outputInfo{
32251 {0, 1073733624},
32252 },
32253 },
32254 },
32255 {
32256 name: "LoweredGetClosurePtr",
32257 argLen: 0,
32258 zeroWidth: true,
32259 reg: regInfo{
32260 outputs: []outputInfo{
32261 {0, 2048},
32262 },
32263 },
32264 },
32265 {
32266 name: "LoweredGetCallerSP",
32267 argLen: 1,
32268 rematerializeable: true,
32269 reg: regInfo{
32270 outputs: []outputInfo{
32271 {0, 1073733624},
32272 },
32273 },
32274 },
32275 {
32276 name: "LoweredGetCallerPC",
32277 argLen: 0,
32278 rematerializeable: true,
32279 reg: regInfo{
32280 outputs: []outputInfo{
32281 {0, 1073733624},
32282 },
32283 },
32284 },
32285 {
32286 name: "LoweredNilCheck",
32287 argLen: 2,
32288 clobberFlags: true,
32289 nilCheck: true,
32290 faultOnNilArg0: true,
32291 reg: regInfo{
32292 inputs: []inputInfo{
32293 {0, 1073733630},
32294 },
32295 clobbers: 2147483648,
32296 },
32297 },
32298 {
32299 name: "LoweredRound32F",
32300 argLen: 1,
32301 resultInArg0: true,
32302 zeroWidth: true,
32303 reg: regInfo{
32304 inputs: []inputInfo{
32305 {0, 9223372032559808512},
32306 },
32307 outputs: []outputInfo{
32308 {0, 9223372032559808512},
32309 },
32310 },
32311 },
32312 {
32313 name: "LoweredRound64F",
32314 argLen: 1,
32315 resultInArg0: true,
32316 zeroWidth: true,
32317 reg: regInfo{
32318 inputs: []inputInfo{
32319 {0, 9223372032559808512},
32320 },
32321 outputs: []outputInfo{
32322 {0, 9223372032559808512},
32323 },
32324 },
32325 },
32326 {
32327 name: "CALLstatic",
32328 auxType: auxCallOff,
32329 argLen: -1,
32330 clobberFlags: true,
32331 call: true,
32332 reg: regInfo{
32333 clobbers: 18446744071562059768,
32334 },
32335 },
32336 {
32337 name: "CALLtail",
32338 auxType: auxCallOff,
32339 argLen: -1,
32340 clobberFlags: true,
32341 call: true,
32342 tailCall: true,
32343 reg: regInfo{
32344 clobbers: 18446744071562059768,
32345 },
32346 },
32347 {
32348 name: "CALLclosure",
32349 auxType: auxCallOff,
32350 argLen: -1,
32351 clobberFlags: true,
32352 call: true,
32353 reg: regInfo{
32354 inputs: []inputInfo{
32355 {0, 4096},
32356 {1, 2048},
32357 },
32358 clobbers: 18446744071562059768,
32359 },
32360 },
32361 {
32362 name: "CALLinter",
32363 auxType: auxCallOff,
32364 argLen: -1,
32365 clobberFlags: true,
32366 call: true,
32367 reg: regInfo{
32368 inputs: []inputInfo{
32369 {0, 4096},
32370 },
32371 clobbers: 18446744071562059768,
32372 },
32373 },
32374 {
32375 name: "LoweredZero",
32376 auxType: auxInt64,
32377 argLen: 2,
32378 clobberFlags: true,
32379 faultOnNilArg0: true,
32380 unsafePoint: true,
32381 reg: regInfo{
32382 inputs: []inputInfo{
32383 {0, 1048576},
32384 },
32385 clobbers: 1048576,
32386 },
32387 },
32388 {
32389 name: "LoweredZeroShort",
32390 auxType: auxInt64,
32391 argLen: 2,
32392 faultOnNilArg0: true,
32393 unsafePoint: true,
32394 reg: regInfo{
32395 inputs: []inputInfo{
32396 {0, 1073733624},
32397 },
32398 },
32399 },
32400 {
32401 name: "LoweredQuadZeroShort",
32402 auxType: auxInt64,
32403 argLen: 2,
32404 faultOnNilArg0: true,
32405 unsafePoint: true,
32406 reg: regInfo{
32407 inputs: []inputInfo{
32408 {0, 1073733624},
32409 },
32410 },
32411 },
32412 {
32413 name: "LoweredQuadZero",
32414 auxType: auxInt64,
32415 argLen: 2,
32416 clobberFlags: true,
32417 faultOnNilArg0: true,
32418 unsafePoint: true,
32419 reg: regInfo{
32420 inputs: []inputInfo{
32421 {0, 1048576},
32422 },
32423 clobbers: 1048576,
32424 },
32425 },
32426 {
32427 name: "LoweredMove",
32428 auxType: auxInt64,
32429 argLen: 3,
32430 clobberFlags: true,
32431 faultOnNilArg0: true,
32432 faultOnNilArg1: true,
32433 unsafePoint: true,
32434 reg: regInfo{
32435 inputs: []inputInfo{
32436 {0, 1048576},
32437 {1, 2097152},
32438 },
32439 clobbers: 3145728,
32440 },
32441 },
32442 {
32443 name: "LoweredMoveShort",
32444 auxType: auxInt64,
32445 argLen: 3,
32446 faultOnNilArg0: true,
32447 faultOnNilArg1: true,
32448 unsafePoint: true,
32449 reg: regInfo{
32450 inputs: []inputInfo{
32451 {0, 1073733624},
32452 {1, 1073733624},
32453 },
32454 },
32455 },
32456 {
32457 name: "LoweredQuadMove",
32458 auxType: auxInt64,
32459 argLen: 3,
32460 clobberFlags: true,
32461 faultOnNilArg0: true,
32462 faultOnNilArg1: true,
32463 unsafePoint: true,
32464 reg: regInfo{
32465 inputs: []inputInfo{
32466 {0, 1048576},
32467 {1, 2097152},
32468 },
32469 clobbers: 3145728,
32470 },
32471 },
32472 {
32473 name: "LoweredQuadMoveShort",
32474 auxType: auxInt64,
32475 argLen: 3,
32476 faultOnNilArg0: true,
32477 faultOnNilArg1: true,
32478 unsafePoint: true,
32479 reg: regInfo{
32480 inputs: []inputInfo{
32481 {0, 1073733624},
32482 {1, 1073733624},
32483 },
32484 },
32485 },
32486 {
32487 name: "LoweredAtomicStore8",
32488 auxType: auxInt64,
32489 argLen: 3,
32490 faultOnNilArg0: true,
32491 hasSideEffects: true,
32492 reg: regInfo{
32493 inputs: []inputInfo{
32494 {0, 1073733630},
32495 {1, 1073733630},
32496 },
32497 },
32498 },
32499 {
32500 name: "LoweredAtomicStore32",
32501 auxType: auxInt64,
32502 argLen: 3,
32503 faultOnNilArg0: true,
32504 hasSideEffects: true,
32505 reg: regInfo{
32506 inputs: []inputInfo{
32507 {0, 1073733630},
32508 {1, 1073733630},
32509 },
32510 },
32511 },
32512 {
32513 name: "LoweredAtomicStore64",
32514 auxType: auxInt64,
32515 argLen: 3,
32516 faultOnNilArg0: true,
32517 hasSideEffects: true,
32518 reg: regInfo{
32519 inputs: []inputInfo{
32520 {0, 1073733630},
32521 {1, 1073733630},
32522 },
32523 },
32524 },
32525 {
32526 name: "LoweredAtomicLoad8",
32527 auxType: auxInt64,
32528 argLen: 2,
32529 clobberFlags: true,
32530 faultOnNilArg0: true,
32531 reg: regInfo{
32532 inputs: []inputInfo{
32533 {0, 1073733630},
32534 },
32535 outputs: []outputInfo{
32536 {0, 1073733624},
32537 },
32538 },
32539 },
32540 {
32541 name: "LoweredAtomicLoad32",
32542 auxType: auxInt64,
32543 argLen: 2,
32544 clobberFlags: true,
32545 faultOnNilArg0: true,
32546 reg: regInfo{
32547 inputs: []inputInfo{
32548 {0, 1073733630},
32549 },
32550 outputs: []outputInfo{
32551 {0, 1073733624},
32552 },
32553 },
32554 },
32555 {
32556 name: "LoweredAtomicLoad64",
32557 auxType: auxInt64,
32558 argLen: 2,
32559 clobberFlags: true,
32560 faultOnNilArg0: true,
32561 reg: regInfo{
32562 inputs: []inputInfo{
32563 {0, 1073733630},
32564 },
32565 outputs: []outputInfo{
32566 {0, 1073733624},
32567 },
32568 },
32569 },
32570 {
32571 name: "LoweredAtomicLoadPtr",
32572 auxType: auxInt64,
32573 argLen: 2,
32574 clobberFlags: true,
32575 faultOnNilArg0: true,
32576 reg: regInfo{
32577 inputs: []inputInfo{
32578 {0, 1073733630},
32579 },
32580 outputs: []outputInfo{
32581 {0, 1073733624},
32582 },
32583 },
32584 },
32585 {
32586 name: "LoweredAtomicAdd32",
32587 argLen: 3,
32588 resultNotInArgs: true,
32589 clobberFlags: true,
32590 faultOnNilArg0: true,
32591 hasSideEffects: true,
32592 reg: regInfo{
32593 inputs: []inputInfo{
32594 {1, 1073733624},
32595 {0, 1073733630},
32596 },
32597 outputs: []outputInfo{
32598 {0, 1073733624},
32599 },
32600 },
32601 },
32602 {
32603 name: "LoweredAtomicAdd64",
32604 argLen: 3,
32605 resultNotInArgs: true,
32606 clobberFlags: true,
32607 faultOnNilArg0: true,
32608 hasSideEffects: true,
32609 reg: regInfo{
32610 inputs: []inputInfo{
32611 {1, 1073733624},
32612 {0, 1073733630},
32613 },
32614 outputs: []outputInfo{
32615 {0, 1073733624},
32616 },
32617 },
32618 },
32619 {
32620 name: "LoweredAtomicExchange8",
32621 argLen: 3,
32622 resultNotInArgs: true,
32623 clobberFlags: true,
32624 faultOnNilArg0: true,
32625 hasSideEffects: true,
32626 reg: regInfo{
32627 inputs: []inputInfo{
32628 {1, 1073733624},
32629 {0, 1073733630},
32630 },
32631 outputs: []outputInfo{
32632 {0, 1073733624},
32633 },
32634 },
32635 },
32636 {
32637 name: "LoweredAtomicExchange32",
32638 argLen: 3,
32639 resultNotInArgs: true,
32640 clobberFlags: true,
32641 faultOnNilArg0: true,
32642 hasSideEffects: true,
32643 reg: regInfo{
32644 inputs: []inputInfo{
32645 {1, 1073733624},
32646 {0, 1073733630},
32647 },
32648 outputs: []outputInfo{
32649 {0, 1073733624},
32650 },
32651 },
32652 },
32653 {
32654 name: "LoweredAtomicExchange64",
32655 argLen: 3,
32656 resultNotInArgs: true,
32657 clobberFlags: true,
32658 faultOnNilArg0: true,
32659 hasSideEffects: true,
32660 reg: regInfo{
32661 inputs: []inputInfo{
32662 {1, 1073733624},
32663 {0, 1073733630},
32664 },
32665 outputs: []outputInfo{
32666 {0, 1073733624},
32667 },
32668 },
32669 },
32670 {
32671 name: "LoweredAtomicCas64",
32672 auxType: auxInt64,
32673 argLen: 4,
32674 resultNotInArgs: true,
32675 clobberFlags: true,
32676 faultOnNilArg0: true,
32677 hasSideEffects: true,
32678 reg: regInfo{
32679 inputs: []inputInfo{
32680 {1, 1073733624},
32681 {2, 1073733624},
32682 {0, 1073733630},
32683 },
32684 outputs: []outputInfo{
32685 {0, 1073733624},
32686 },
32687 },
32688 },
32689 {
32690 name: "LoweredAtomicCas32",
32691 auxType: auxInt64,
32692 argLen: 4,
32693 resultNotInArgs: true,
32694 clobberFlags: true,
32695 faultOnNilArg0: true,
32696 hasSideEffects: true,
32697 reg: regInfo{
32698 inputs: []inputInfo{
32699 {1, 1073733624},
32700 {2, 1073733624},
32701 {0, 1073733630},
32702 },
32703 outputs: []outputInfo{
32704 {0, 1073733624},
32705 },
32706 },
32707 },
32708 {
32709 name: "LoweredAtomicAnd8",
32710 argLen: 3,
32711 faultOnNilArg0: true,
32712 hasSideEffects: true,
32713 asm: ppc64.AAND,
32714 reg: regInfo{
32715 inputs: []inputInfo{
32716 {0, 1073733630},
32717 {1, 1073733630},
32718 },
32719 },
32720 },
32721 {
32722 name: "LoweredAtomicAnd32",
32723 argLen: 3,
32724 faultOnNilArg0: true,
32725 hasSideEffects: true,
32726 asm: ppc64.AAND,
32727 reg: regInfo{
32728 inputs: []inputInfo{
32729 {0, 1073733630},
32730 {1, 1073733630},
32731 },
32732 },
32733 },
32734 {
32735 name: "LoweredAtomicOr8",
32736 argLen: 3,
32737 faultOnNilArg0: true,
32738 hasSideEffects: true,
32739 asm: ppc64.AOR,
32740 reg: regInfo{
32741 inputs: []inputInfo{
32742 {0, 1073733630},
32743 {1, 1073733630},
32744 },
32745 },
32746 },
32747 {
32748 name: "LoweredAtomicOr32",
32749 argLen: 3,
32750 faultOnNilArg0: true,
32751 hasSideEffects: true,
32752 asm: ppc64.AOR,
32753 reg: regInfo{
32754 inputs: []inputInfo{
32755 {0, 1073733630},
32756 {1, 1073733630},
32757 },
32758 },
32759 },
32760 {
32761 name: "LoweredWB",
32762 auxType: auxInt64,
32763 argLen: 1,
32764 clobberFlags: true,
32765 reg: regInfo{
32766 clobbers: 18446744072632408064,
32767 outputs: []outputInfo{
32768 {0, 536870912},
32769 },
32770 },
32771 },
32772 {
32773 name: "LoweredPubBarrier",
32774 argLen: 1,
32775 hasSideEffects: true,
32776 asm: ppc64.ALWSYNC,
32777 reg: regInfo{},
32778 },
32779 {
32780 name: "LoweredPanicBoundsA",
32781 auxType: auxInt64,
32782 argLen: 3,
32783 call: true,
32784 reg: regInfo{
32785 inputs: []inputInfo{
32786 {0, 32},
32787 {1, 64},
32788 },
32789 },
32790 },
32791 {
32792 name: "LoweredPanicBoundsB",
32793 auxType: auxInt64,
32794 argLen: 3,
32795 call: true,
32796 reg: regInfo{
32797 inputs: []inputInfo{
32798 {0, 16},
32799 {1, 32},
32800 },
32801 },
32802 },
32803 {
32804 name: "LoweredPanicBoundsC",
32805 auxType: auxInt64,
32806 argLen: 3,
32807 call: true,
32808 reg: regInfo{
32809 inputs: []inputInfo{
32810 {0, 8},
32811 {1, 16},
32812 },
32813 },
32814 },
32815 {
32816 name: "InvertFlags",
32817 argLen: 1,
32818 reg: regInfo{},
32819 },
32820 {
32821 name: "FlagEQ",
32822 argLen: 0,
32823 reg: regInfo{},
32824 },
32825 {
32826 name: "FlagLT",
32827 argLen: 0,
32828 reg: regInfo{},
32829 },
32830 {
32831 name: "FlagGT",
32832 argLen: 0,
32833 reg: regInfo{},
32834 },
32835
32836 {
32837 name: "ADD",
32838 argLen: 2,
32839 commutative: true,
32840 asm: riscv.AADD,
32841 reg: regInfo{
32842 inputs: []inputInfo{
32843 {0, 1006632944},
32844 {1, 1006632944},
32845 },
32846 outputs: []outputInfo{
32847 {0, 1006632944},
32848 },
32849 },
32850 },
32851 {
32852 name: "ADDI",
32853 auxType: auxInt64,
32854 argLen: 1,
32855 asm: riscv.AADDI,
32856 reg: regInfo{
32857 inputs: []inputInfo{
32858 {0, 9223372037861408754},
32859 },
32860 outputs: []outputInfo{
32861 {0, 1006632944},
32862 },
32863 },
32864 },
32865 {
32866 name: "ADDIW",
32867 auxType: auxInt64,
32868 argLen: 1,
32869 asm: riscv.AADDIW,
32870 reg: regInfo{
32871 inputs: []inputInfo{
32872 {0, 1006632944},
32873 },
32874 outputs: []outputInfo{
32875 {0, 1006632944},
32876 },
32877 },
32878 },
32879 {
32880 name: "NEG",
32881 argLen: 1,
32882 asm: riscv.ANEG,
32883 reg: regInfo{
32884 inputs: []inputInfo{
32885 {0, 1006632944},
32886 },
32887 outputs: []outputInfo{
32888 {0, 1006632944},
32889 },
32890 },
32891 },
32892 {
32893 name: "NEGW",
32894 argLen: 1,
32895 asm: riscv.ANEGW,
32896 reg: regInfo{
32897 inputs: []inputInfo{
32898 {0, 1006632944},
32899 },
32900 outputs: []outputInfo{
32901 {0, 1006632944},
32902 },
32903 },
32904 },
32905 {
32906 name: "SUB",
32907 argLen: 2,
32908 asm: riscv.ASUB,
32909 reg: regInfo{
32910 inputs: []inputInfo{
32911 {0, 1006632944},
32912 {1, 1006632944},
32913 },
32914 outputs: []outputInfo{
32915 {0, 1006632944},
32916 },
32917 },
32918 },
32919 {
32920 name: "SUBW",
32921 argLen: 2,
32922 asm: riscv.ASUBW,
32923 reg: regInfo{
32924 inputs: []inputInfo{
32925 {0, 1006632944},
32926 {1, 1006632944},
32927 },
32928 outputs: []outputInfo{
32929 {0, 1006632944},
32930 },
32931 },
32932 },
32933 {
32934 name: "MUL",
32935 argLen: 2,
32936 commutative: true,
32937 asm: riscv.AMUL,
32938 reg: regInfo{
32939 inputs: []inputInfo{
32940 {0, 1006632944},
32941 {1, 1006632944},
32942 },
32943 outputs: []outputInfo{
32944 {0, 1006632944},
32945 },
32946 },
32947 },
32948 {
32949 name: "MULW",
32950 argLen: 2,
32951 commutative: true,
32952 asm: riscv.AMULW,
32953 reg: regInfo{
32954 inputs: []inputInfo{
32955 {0, 1006632944},
32956 {1, 1006632944},
32957 },
32958 outputs: []outputInfo{
32959 {0, 1006632944},
32960 },
32961 },
32962 },
32963 {
32964 name: "MULH",
32965 argLen: 2,
32966 commutative: true,
32967 asm: riscv.AMULH,
32968 reg: regInfo{
32969 inputs: []inputInfo{
32970 {0, 1006632944},
32971 {1, 1006632944},
32972 },
32973 outputs: []outputInfo{
32974 {0, 1006632944},
32975 },
32976 },
32977 },
32978 {
32979 name: "MULHU",
32980 argLen: 2,
32981 commutative: true,
32982 asm: riscv.AMULHU,
32983 reg: regInfo{
32984 inputs: []inputInfo{
32985 {0, 1006632944},
32986 {1, 1006632944},
32987 },
32988 outputs: []outputInfo{
32989 {0, 1006632944},
32990 },
32991 },
32992 },
32993 {
32994 name: "LoweredMuluhilo",
32995 argLen: 2,
32996 resultNotInArgs: true,
32997 reg: regInfo{
32998 inputs: []inputInfo{
32999 {0, 1006632944},
33000 {1, 1006632944},
33001 },
33002 outputs: []outputInfo{
33003 {0, 1006632944},
33004 {1, 1006632944},
33005 },
33006 },
33007 },
33008 {
33009 name: "LoweredMuluover",
33010 argLen: 2,
33011 resultNotInArgs: true,
33012 reg: regInfo{
33013 inputs: []inputInfo{
33014 {0, 1006632944},
33015 {1, 1006632944},
33016 },
33017 outputs: []outputInfo{
33018 {0, 1006632944},
33019 {1, 1006632944},
33020 },
33021 },
33022 },
33023 {
33024 name: "DIV",
33025 argLen: 2,
33026 asm: riscv.ADIV,
33027 reg: regInfo{
33028 inputs: []inputInfo{
33029 {0, 1006632944},
33030 {1, 1006632944},
33031 },
33032 outputs: []outputInfo{
33033 {0, 1006632944},
33034 },
33035 },
33036 },
33037 {
33038 name: "DIVU",
33039 argLen: 2,
33040 asm: riscv.ADIVU,
33041 reg: regInfo{
33042 inputs: []inputInfo{
33043 {0, 1006632944},
33044 {1, 1006632944},
33045 },
33046 outputs: []outputInfo{
33047 {0, 1006632944},
33048 },
33049 },
33050 },
33051 {
33052 name: "DIVW",
33053 argLen: 2,
33054 asm: riscv.ADIVW,
33055 reg: regInfo{
33056 inputs: []inputInfo{
33057 {0, 1006632944},
33058 {1, 1006632944},
33059 },
33060 outputs: []outputInfo{
33061 {0, 1006632944},
33062 },
33063 },
33064 },
33065 {
33066 name: "DIVUW",
33067 argLen: 2,
33068 asm: riscv.ADIVUW,
33069 reg: regInfo{
33070 inputs: []inputInfo{
33071 {0, 1006632944},
33072 {1, 1006632944},
33073 },
33074 outputs: []outputInfo{
33075 {0, 1006632944},
33076 },
33077 },
33078 },
33079 {
33080 name: "REM",
33081 argLen: 2,
33082 asm: riscv.AREM,
33083 reg: regInfo{
33084 inputs: []inputInfo{
33085 {0, 1006632944},
33086 {1, 1006632944},
33087 },
33088 outputs: []outputInfo{
33089 {0, 1006632944},
33090 },
33091 },
33092 },
33093 {
33094 name: "REMU",
33095 argLen: 2,
33096 asm: riscv.AREMU,
33097 reg: regInfo{
33098 inputs: []inputInfo{
33099 {0, 1006632944},
33100 {1, 1006632944},
33101 },
33102 outputs: []outputInfo{
33103 {0, 1006632944},
33104 },
33105 },
33106 },
33107 {
33108 name: "REMW",
33109 argLen: 2,
33110 asm: riscv.AREMW,
33111 reg: regInfo{
33112 inputs: []inputInfo{
33113 {0, 1006632944},
33114 {1, 1006632944},
33115 },
33116 outputs: []outputInfo{
33117 {0, 1006632944},
33118 },
33119 },
33120 },
33121 {
33122 name: "REMUW",
33123 argLen: 2,
33124 asm: riscv.AREMUW,
33125 reg: regInfo{
33126 inputs: []inputInfo{
33127 {0, 1006632944},
33128 {1, 1006632944},
33129 },
33130 outputs: []outputInfo{
33131 {0, 1006632944},
33132 },
33133 },
33134 },
33135 {
33136 name: "MOVaddr",
33137 auxType: auxSymOff,
33138 argLen: 1,
33139 rematerializeable: true,
33140 symEffect: SymAddr,
33141 asm: riscv.AMOV,
33142 reg: regInfo{
33143 inputs: []inputInfo{
33144 {0, 9223372037861408754},
33145 },
33146 outputs: []outputInfo{
33147 {0, 1006632944},
33148 },
33149 },
33150 },
33151 {
33152 name: "MOVDconst",
33153 auxType: auxInt64,
33154 argLen: 0,
33155 rematerializeable: true,
33156 asm: riscv.AMOV,
33157 reg: regInfo{
33158 outputs: []outputInfo{
33159 {0, 1006632944},
33160 },
33161 },
33162 },
33163 {
33164 name: "MOVBload",
33165 auxType: auxSymOff,
33166 argLen: 2,
33167 faultOnNilArg0: true,
33168 symEffect: SymRead,
33169 asm: riscv.AMOVB,
33170 reg: regInfo{
33171 inputs: []inputInfo{
33172 {0, 9223372037861408754},
33173 },
33174 outputs: []outputInfo{
33175 {0, 1006632944},
33176 },
33177 },
33178 },
33179 {
33180 name: "MOVHload",
33181 auxType: auxSymOff,
33182 argLen: 2,
33183 faultOnNilArg0: true,
33184 symEffect: SymRead,
33185 asm: riscv.AMOVH,
33186 reg: regInfo{
33187 inputs: []inputInfo{
33188 {0, 9223372037861408754},
33189 },
33190 outputs: []outputInfo{
33191 {0, 1006632944},
33192 },
33193 },
33194 },
33195 {
33196 name: "MOVWload",
33197 auxType: auxSymOff,
33198 argLen: 2,
33199 faultOnNilArg0: true,
33200 symEffect: SymRead,
33201 asm: riscv.AMOVW,
33202 reg: regInfo{
33203 inputs: []inputInfo{
33204 {0, 9223372037861408754},
33205 },
33206 outputs: []outputInfo{
33207 {0, 1006632944},
33208 },
33209 },
33210 },
33211 {
33212 name: "MOVDload",
33213 auxType: auxSymOff,
33214 argLen: 2,
33215 faultOnNilArg0: true,
33216 symEffect: SymRead,
33217 asm: riscv.AMOV,
33218 reg: regInfo{
33219 inputs: []inputInfo{
33220 {0, 9223372037861408754},
33221 },
33222 outputs: []outputInfo{
33223 {0, 1006632944},
33224 },
33225 },
33226 },
33227 {
33228 name: "MOVBUload",
33229 auxType: auxSymOff,
33230 argLen: 2,
33231 faultOnNilArg0: true,
33232 symEffect: SymRead,
33233 asm: riscv.AMOVBU,
33234 reg: regInfo{
33235 inputs: []inputInfo{
33236 {0, 9223372037861408754},
33237 },
33238 outputs: []outputInfo{
33239 {0, 1006632944},
33240 },
33241 },
33242 },
33243 {
33244 name: "MOVHUload",
33245 auxType: auxSymOff,
33246 argLen: 2,
33247 faultOnNilArg0: true,
33248 symEffect: SymRead,
33249 asm: riscv.AMOVHU,
33250 reg: regInfo{
33251 inputs: []inputInfo{
33252 {0, 9223372037861408754},
33253 },
33254 outputs: []outputInfo{
33255 {0, 1006632944},
33256 },
33257 },
33258 },
33259 {
33260 name: "MOVWUload",
33261 auxType: auxSymOff,
33262 argLen: 2,
33263 faultOnNilArg0: true,
33264 symEffect: SymRead,
33265 asm: riscv.AMOVWU,
33266 reg: regInfo{
33267 inputs: []inputInfo{
33268 {0, 9223372037861408754},
33269 },
33270 outputs: []outputInfo{
33271 {0, 1006632944},
33272 },
33273 },
33274 },
33275 {
33276 name: "MOVBstore",
33277 auxType: auxSymOff,
33278 argLen: 3,
33279 faultOnNilArg0: true,
33280 symEffect: SymWrite,
33281 asm: riscv.AMOVB,
33282 reg: regInfo{
33283 inputs: []inputInfo{
33284 {1, 1006632946},
33285 {0, 9223372037861408754},
33286 },
33287 },
33288 },
33289 {
33290 name: "MOVHstore",
33291 auxType: auxSymOff,
33292 argLen: 3,
33293 faultOnNilArg0: true,
33294 symEffect: SymWrite,
33295 asm: riscv.AMOVH,
33296 reg: regInfo{
33297 inputs: []inputInfo{
33298 {1, 1006632946},
33299 {0, 9223372037861408754},
33300 },
33301 },
33302 },
33303 {
33304 name: "MOVWstore",
33305 auxType: auxSymOff,
33306 argLen: 3,
33307 faultOnNilArg0: true,
33308 symEffect: SymWrite,
33309 asm: riscv.AMOVW,
33310 reg: regInfo{
33311 inputs: []inputInfo{
33312 {1, 1006632946},
33313 {0, 9223372037861408754},
33314 },
33315 },
33316 },
33317 {
33318 name: "MOVDstore",
33319 auxType: auxSymOff,
33320 argLen: 3,
33321 faultOnNilArg0: true,
33322 symEffect: SymWrite,
33323 asm: riscv.AMOV,
33324 reg: regInfo{
33325 inputs: []inputInfo{
33326 {1, 1006632946},
33327 {0, 9223372037861408754},
33328 },
33329 },
33330 },
33331 {
33332 name: "MOVBstorezero",
33333 auxType: auxSymOff,
33334 argLen: 2,
33335 faultOnNilArg0: true,
33336 symEffect: SymWrite,
33337 asm: riscv.AMOVB,
33338 reg: regInfo{
33339 inputs: []inputInfo{
33340 {0, 9223372037861408754},
33341 },
33342 },
33343 },
33344 {
33345 name: "MOVHstorezero",
33346 auxType: auxSymOff,
33347 argLen: 2,
33348 faultOnNilArg0: true,
33349 symEffect: SymWrite,
33350 asm: riscv.AMOVH,
33351 reg: regInfo{
33352 inputs: []inputInfo{
33353 {0, 9223372037861408754},
33354 },
33355 },
33356 },
33357 {
33358 name: "MOVWstorezero",
33359 auxType: auxSymOff,
33360 argLen: 2,
33361 faultOnNilArg0: true,
33362 symEffect: SymWrite,
33363 asm: riscv.AMOVW,
33364 reg: regInfo{
33365 inputs: []inputInfo{
33366 {0, 9223372037861408754},
33367 },
33368 },
33369 },
33370 {
33371 name: "MOVDstorezero",
33372 auxType: auxSymOff,
33373 argLen: 2,
33374 faultOnNilArg0: true,
33375 symEffect: SymWrite,
33376 asm: riscv.AMOV,
33377 reg: regInfo{
33378 inputs: []inputInfo{
33379 {0, 9223372037861408754},
33380 },
33381 },
33382 },
33383 {
33384 name: "MOVBreg",
33385 argLen: 1,
33386 asm: riscv.AMOVB,
33387 reg: regInfo{
33388 inputs: []inputInfo{
33389 {0, 1006632944},
33390 },
33391 outputs: []outputInfo{
33392 {0, 1006632944},
33393 },
33394 },
33395 },
33396 {
33397 name: "MOVHreg",
33398 argLen: 1,
33399 asm: riscv.AMOVH,
33400 reg: regInfo{
33401 inputs: []inputInfo{
33402 {0, 1006632944},
33403 },
33404 outputs: []outputInfo{
33405 {0, 1006632944},
33406 },
33407 },
33408 },
33409 {
33410 name: "MOVWreg",
33411 argLen: 1,
33412 asm: riscv.AMOVW,
33413 reg: regInfo{
33414 inputs: []inputInfo{
33415 {0, 1006632944},
33416 },
33417 outputs: []outputInfo{
33418 {0, 1006632944},
33419 },
33420 },
33421 },
33422 {
33423 name: "MOVDreg",
33424 argLen: 1,
33425 asm: riscv.AMOV,
33426 reg: regInfo{
33427 inputs: []inputInfo{
33428 {0, 1006632944},
33429 },
33430 outputs: []outputInfo{
33431 {0, 1006632944},
33432 },
33433 },
33434 },
33435 {
33436 name: "MOVBUreg",
33437 argLen: 1,
33438 asm: riscv.AMOVBU,
33439 reg: regInfo{
33440 inputs: []inputInfo{
33441 {0, 1006632944},
33442 },
33443 outputs: []outputInfo{
33444 {0, 1006632944},
33445 },
33446 },
33447 },
33448 {
33449 name: "MOVHUreg",
33450 argLen: 1,
33451 asm: riscv.AMOVHU,
33452 reg: regInfo{
33453 inputs: []inputInfo{
33454 {0, 1006632944},
33455 },
33456 outputs: []outputInfo{
33457 {0, 1006632944},
33458 },
33459 },
33460 },
33461 {
33462 name: "MOVWUreg",
33463 argLen: 1,
33464 asm: riscv.AMOVWU,
33465 reg: regInfo{
33466 inputs: []inputInfo{
33467 {0, 1006632944},
33468 },
33469 outputs: []outputInfo{
33470 {0, 1006632944},
33471 },
33472 },
33473 },
33474 {
33475 name: "MOVDnop",
33476 argLen: 1,
33477 resultInArg0: true,
33478 reg: regInfo{
33479 inputs: []inputInfo{
33480 {0, 1006632944},
33481 },
33482 outputs: []outputInfo{
33483 {0, 1006632944},
33484 },
33485 },
33486 },
33487 {
33488 name: "SLL",
33489 argLen: 2,
33490 asm: riscv.ASLL,
33491 reg: regInfo{
33492 inputs: []inputInfo{
33493 {0, 1006632944},
33494 {1, 1006632944},
33495 },
33496 outputs: []outputInfo{
33497 {0, 1006632944},
33498 },
33499 },
33500 },
33501 {
33502 name: "SLLW",
33503 argLen: 2,
33504 asm: riscv.ASLLW,
33505 reg: regInfo{
33506 inputs: []inputInfo{
33507 {0, 1006632944},
33508 {1, 1006632944},
33509 },
33510 outputs: []outputInfo{
33511 {0, 1006632944},
33512 },
33513 },
33514 },
33515 {
33516 name: "SRA",
33517 argLen: 2,
33518 asm: riscv.ASRA,
33519 reg: regInfo{
33520 inputs: []inputInfo{
33521 {0, 1006632944},
33522 {1, 1006632944},
33523 },
33524 outputs: []outputInfo{
33525 {0, 1006632944},
33526 },
33527 },
33528 },
33529 {
33530 name: "SRAW",
33531 argLen: 2,
33532 asm: riscv.ASRAW,
33533 reg: regInfo{
33534 inputs: []inputInfo{
33535 {0, 1006632944},
33536 {1, 1006632944},
33537 },
33538 outputs: []outputInfo{
33539 {0, 1006632944},
33540 },
33541 },
33542 },
33543 {
33544 name: "SRL",
33545 argLen: 2,
33546 asm: riscv.ASRL,
33547 reg: regInfo{
33548 inputs: []inputInfo{
33549 {0, 1006632944},
33550 {1, 1006632944},
33551 },
33552 outputs: []outputInfo{
33553 {0, 1006632944},
33554 },
33555 },
33556 },
33557 {
33558 name: "SRLW",
33559 argLen: 2,
33560 asm: riscv.ASRLW,
33561 reg: regInfo{
33562 inputs: []inputInfo{
33563 {0, 1006632944},
33564 {1, 1006632944},
33565 },
33566 outputs: []outputInfo{
33567 {0, 1006632944},
33568 },
33569 },
33570 },
33571 {
33572 name: "SLLI",
33573 auxType: auxInt64,
33574 argLen: 1,
33575 asm: riscv.ASLLI,
33576 reg: regInfo{
33577 inputs: []inputInfo{
33578 {0, 1006632944},
33579 },
33580 outputs: []outputInfo{
33581 {0, 1006632944},
33582 },
33583 },
33584 },
33585 {
33586 name: "SLLIW",
33587 auxType: auxInt64,
33588 argLen: 1,
33589 asm: riscv.ASLLIW,
33590 reg: regInfo{
33591 inputs: []inputInfo{
33592 {0, 1006632944},
33593 },
33594 outputs: []outputInfo{
33595 {0, 1006632944},
33596 },
33597 },
33598 },
33599 {
33600 name: "SRAI",
33601 auxType: auxInt64,
33602 argLen: 1,
33603 asm: riscv.ASRAI,
33604 reg: regInfo{
33605 inputs: []inputInfo{
33606 {0, 1006632944},
33607 },
33608 outputs: []outputInfo{
33609 {0, 1006632944},
33610 },
33611 },
33612 },
33613 {
33614 name: "SRAIW",
33615 auxType: auxInt64,
33616 argLen: 1,
33617 asm: riscv.ASRAIW,
33618 reg: regInfo{
33619 inputs: []inputInfo{
33620 {0, 1006632944},
33621 },
33622 outputs: []outputInfo{
33623 {0, 1006632944},
33624 },
33625 },
33626 },
33627 {
33628 name: "SRLI",
33629 auxType: auxInt64,
33630 argLen: 1,
33631 asm: riscv.ASRLI,
33632 reg: regInfo{
33633 inputs: []inputInfo{
33634 {0, 1006632944},
33635 },
33636 outputs: []outputInfo{
33637 {0, 1006632944},
33638 },
33639 },
33640 },
33641 {
33642 name: "SRLIW",
33643 auxType: auxInt64,
33644 argLen: 1,
33645 asm: riscv.ASRLIW,
33646 reg: regInfo{
33647 inputs: []inputInfo{
33648 {0, 1006632944},
33649 },
33650 outputs: []outputInfo{
33651 {0, 1006632944},
33652 },
33653 },
33654 },
33655 {
33656 name: "SH1ADD",
33657 argLen: 2,
33658 asm: riscv.ASH1ADD,
33659 reg: regInfo{
33660 inputs: []inputInfo{
33661 {0, 1006632944},
33662 {1, 1006632944},
33663 },
33664 outputs: []outputInfo{
33665 {0, 1006632944},
33666 },
33667 },
33668 },
33669 {
33670 name: "SH2ADD",
33671 argLen: 2,
33672 asm: riscv.ASH2ADD,
33673 reg: regInfo{
33674 inputs: []inputInfo{
33675 {0, 1006632944},
33676 {1, 1006632944},
33677 },
33678 outputs: []outputInfo{
33679 {0, 1006632944},
33680 },
33681 },
33682 },
33683 {
33684 name: "SH3ADD",
33685 argLen: 2,
33686 asm: riscv.ASH3ADD,
33687 reg: regInfo{
33688 inputs: []inputInfo{
33689 {0, 1006632944},
33690 {1, 1006632944},
33691 },
33692 outputs: []outputInfo{
33693 {0, 1006632944},
33694 },
33695 },
33696 },
33697 {
33698 name: "AND",
33699 argLen: 2,
33700 commutative: true,
33701 asm: riscv.AAND,
33702 reg: regInfo{
33703 inputs: []inputInfo{
33704 {0, 1006632944},
33705 {1, 1006632944},
33706 },
33707 outputs: []outputInfo{
33708 {0, 1006632944},
33709 },
33710 },
33711 },
33712 {
33713 name: "ANDN",
33714 argLen: 2,
33715 asm: riscv.AANDN,
33716 reg: regInfo{
33717 inputs: []inputInfo{
33718 {0, 1006632944},
33719 {1, 1006632944},
33720 },
33721 outputs: []outputInfo{
33722 {0, 1006632944},
33723 },
33724 },
33725 },
33726 {
33727 name: "ANDI",
33728 auxType: auxInt64,
33729 argLen: 1,
33730 asm: riscv.AANDI,
33731 reg: regInfo{
33732 inputs: []inputInfo{
33733 {0, 1006632944},
33734 },
33735 outputs: []outputInfo{
33736 {0, 1006632944},
33737 },
33738 },
33739 },
33740 {
33741 name: "NOT",
33742 argLen: 1,
33743 asm: riscv.ANOT,
33744 reg: regInfo{
33745 inputs: []inputInfo{
33746 {0, 1006632944},
33747 },
33748 outputs: []outputInfo{
33749 {0, 1006632944},
33750 },
33751 },
33752 },
33753 {
33754 name: "OR",
33755 argLen: 2,
33756 commutative: true,
33757 asm: riscv.AOR,
33758 reg: regInfo{
33759 inputs: []inputInfo{
33760 {0, 1006632944},
33761 {1, 1006632944},
33762 },
33763 outputs: []outputInfo{
33764 {0, 1006632944},
33765 },
33766 },
33767 },
33768 {
33769 name: "ORN",
33770 argLen: 2,
33771 asm: riscv.AORN,
33772 reg: regInfo{
33773 inputs: []inputInfo{
33774 {0, 1006632944},
33775 {1, 1006632944},
33776 },
33777 outputs: []outputInfo{
33778 {0, 1006632944},
33779 },
33780 },
33781 },
33782 {
33783 name: "ORI",
33784 auxType: auxInt64,
33785 argLen: 1,
33786 asm: riscv.AORI,
33787 reg: regInfo{
33788 inputs: []inputInfo{
33789 {0, 1006632944},
33790 },
33791 outputs: []outputInfo{
33792 {0, 1006632944},
33793 },
33794 },
33795 },
33796 {
33797 name: "ROL",
33798 argLen: 2,
33799 asm: riscv.AROL,
33800 reg: regInfo{
33801 inputs: []inputInfo{
33802 {0, 1006632944},
33803 {1, 1006632944},
33804 },
33805 outputs: []outputInfo{
33806 {0, 1006632944},
33807 },
33808 },
33809 },
33810 {
33811 name: "ROLW",
33812 argLen: 2,
33813 asm: riscv.AROLW,
33814 reg: regInfo{
33815 inputs: []inputInfo{
33816 {0, 1006632944},
33817 {1, 1006632944},
33818 },
33819 outputs: []outputInfo{
33820 {0, 1006632944},
33821 },
33822 },
33823 },
33824 {
33825 name: "ROR",
33826 argLen: 2,
33827 asm: riscv.AROR,
33828 reg: regInfo{
33829 inputs: []inputInfo{
33830 {0, 1006632944},
33831 {1, 1006632944},
33832 },
33833 outputs: []outputInfo{
33834 {0, 1006632944},
33835 },
33836 },
33837 },
33838 {
33839 name: "RORI",
33840 auxType: auxInt64,
33841 argLen: 1,
33842 asm: riscv.ARORI,
33843 reg: regInfo{
33844 inputs: []inputInfo{
33845 {0, 1006632944},
33846 },
33847 outputs: []outputInfo{
33848 {0, 1006632944},
33849 },
33850 },
33851 },
33852 {
33853 name: "RORIW",
33854 auxType: auxInt64,
33855 argLen: 1,
33856 asm: riscv.ARORIW,
33857 reg: regInfo{
33858 inputs: []inputInfo{
33859 {0, 1006632944},
33860 },
33861 outputs: []outputInfo{
33862 {0, 1006632944},
33863 },
33864 },
33865 },
33866 {
33867 name: "RORW",
33868 argLen: 2,
33869 asm: riscv.ARORW,
33870 reg: regInfo{
33871 inputs: []inputInfo{
33872 {0, 1006632944},
33873 {1, 1006632944},
33874 },
33875 outputs: []outputInfo{
33876 {0, 1006632944},
33877 },
33878 },
33879 },
33880 {
33881 name: "XNOR",
33882 argLen: 2,
33883 commutative: true,
33884 asm: riscv.AXNOR,
33885 reg: regInfo{
33886 inputs: []inputInfo{
33887 {0, 1006632944},
33888 {1, 1006632944},
33889 },
33890 outputs: []outputInfo{
33891 {0, 1006632944},
33892 },
33893 },
33894 },
33895 {
33896 name: "XOR",
33897 argLen: 2,
33898 commutative: true,
33899 asm: riscv.AXOR,
33900 reg: regInfo{
33901 inputs: []inputInfo{
33902 {0, 1006632944},
33903 {1, 1006632944},
33904 },
33905 outputs: []outputInfo{
33906 {0, 1006632944},
33907 },
33908 },
33909 },
33910 {
33911 name: "XORI",
33912 auxType: auxInt64,
33913 argLen: 1,
33914 asm: riscv.AXORI,
33915 reg: regInfo{
33916 inputs: []inputInfo{
33917 {0, 1006632944},
33918 },
33919 outputs: []outputInfo{
33920 {0, 1006632944},
33921 },
33922 },
33923 },
33924 {
33925 name: "MIN",
33926 argLen: 2,
33927 commutative: true,
33928 asm: riscv.AMIN,
33929 reg: regInfo{
33930 inputs: []inputInfo{
33931 {0, 1006632944},
33932 {1, 1006632944},
33933 },
33934 outputs: []outputInfo{
33935 {0, 1006632944},
33936 },
33937 },
33938 },
33939 {
33940 name: "MAX",
33941 argLen: 2,
33942 commutative: true,
33943 asm: riscv.AMAX,
33944 reg: regInfo{
33945 inputs: []inputInfo{
33946 {0, 1006632944},
33947 {1, 1006632944},
33948 },
33949 outputs: []outputInfo{
33950 {0, 1006632944},
33951 },
33952 },
33953 },
33954 {
33955 name: "MINU",
33956 argLen: 2,
33957 commutative: true,
33958 asm: riscv.AMINU,
33959 reg: regInfo{
33960 inputs: []inputInfo{
33961 {0, 1006632944},
33962 {1, 1006632944},
33963 },
33964 outputs: []outputInfo{
33965 {0, 1006632944},
33966 },
33967 },
33968 },
33969 {
33970 name: "MAXU",
33971 argLen: 2,
33972 commutative: true,
33973 asm: riscv.AMAXU,
33974 reg: regInfo{
33975 inputs: []inputInfo{
33976 {0, 1006632944},
33977 {1, 1006632944},
33978 },
33979 outputs: []outputInfo{
33980 {0, 1006632944},
33981 },
33982 },
33983 },
33984 {
33985 name: "SEQZ",
33986 argLen: 1,
33987 asm: riscv.ASEQZ,
33988 reg: regInfo{
33989 inputs: []inputInfo{
33990 {0, 1006632944},
33991 },
33992 outputs: []outputInfo{
33993 {0, 1006632944},
33994 },
33995 },
33996 },
33997 {
33998 name: "SNEZ",
33999 argLen: 1,
34000 asm: riscv.ASNEZ,
34001 reg: regInfo{
34002 inputs: []inputInfo{
34003 {0, 1006632944},
34004 },
34005 outputs: []outputInfo{
34006 {0, 1006632944},
34007 },
34008 },
34009 },
34010 {
34011 name: "SLT",
34012 argLen: 2,
34013 asm: riscv.ASLT,
34014 reg: regInfo{
34015 inputs: []inputInfo{
34016 {0, 1006632944},
34017 {1, 1006632944},
34018 },
34019 outputs: []outputInfo{
34020 {0, 1006632944},
34021 },
34022 },
34023 },
34024 {
34025 name: "SLTI",
34026 auxType: auxInt64,
34027 argLen: 1,
34028 asm: riscv.ASLTI,
34029 reg: regInfo{
34030 inputs: []inputInfo{
34031 {0, 1006632944},
34032 },
34033 outputs: []outputInfo{
34034 {0, 1006632944},
34035 },
34036 },
34037 },
34038 {
34039 name: "SLTU",
34040 argLen: 2,
34041 asm: riscv.ASLTU,
34042 reg: regInfo{
34043 inputs: []inputInfo{
34044 {0, 1006632944},
34045 {1, 1006632944},
34046 },
34047 outputs: []outputInfo{
34048 {0, 1006632944},
34049 },
34050 },
34051 },
34052 {
34053 name: "SLTIU",
34054 auxType: auxInt64,
34055 argLen: 1,
34056 asm: riscv.ASLTIU,
34057 reg: regInfo{
34058 inputs: []inputInfo{
34059 {0, 1006632944},
34060 },
34061 outputs: []outputInfo{
34062 {0, 1006632944},
34063 },
34064 },
34065 },
34066 {
34067 name: "LoweredRound32F",
34068 argLen: 1,
34069 resultInArg0: true,
34070 reg: regInfo{
34071 inputs: []inputInfo{
34072 {0, 9223372034707292160},
34073 },
34074 outputs: []outputInfo{
34075 {0, 9223372034707292160},
34076 },
34077 },
34078 },
34079 {
34080 name: "LoweredRound64F",
34081 argLen: 1,
34082 resultInArg0: true,
34083 reg: regInfo{
34084 inputs: []inputInfo{
34085 {0, 9223372034707292160},
34086 },
34087 outputs: []outputInfo{
34088 {0, 9223372034707292160},
34089 },
34090 },
34091 },
34092 {
34093 name: "CALLstatic",
34094 auxType: auxCallOff,
34095 argLen: -1,
34096 call: true,
34097 reg: regInfo{
34098 clobbers: 9223372035781033968,
34099 },
34100 },
34101 {
34102 name: "CALLtail",
34103 auxType: auxCallOff,
34104 argLen: -1,
34105 call: true,
34106 tailCall: true,
34107 reg: regInfo{
34108 clobbers: 9223372035781033968,
34109 },
34110 },
34111 {
34112 name: "CALLclosure",
34113 auxType: auxCallOff,
34114 argLen: -1,
34115 call: true,
34116 reg: regInfo{
34117 inputs: []inputInfo{
34118 {1, 33554432},
34119 {0, 1006632946},
34120 },
34121 clobbers: 9223372035781033968,
34122 },
34123 },
34124 {
34125 name: "CALLinter",
34126 auxType: auxCallOff,
34127 argLen: -1,
34128 call: true,
34129 reg: regInfo{
34130 inputs: []inputInfo{
34131 {0, 1006632944},
34132 },
34133 clobbers: 9223372035781033968,
34134 },
34135 },
34136 {
34137 name: "DUFFZERO",
34138 auxType: auxInt64,
34139 argLen: 2,
34140 faultOnNilArg0: true,
34141 reg: regInfo{
34142 inputs: []inputInfo{
34143 {0, 16777216},
34144 },
34145 clobbers: 16777216,
34146 },
34147 },
34148 {
34149 name: "DUFFCOPY",
34150 auxType: auxInt64,
34151 argLen: 3,
34152 faultOnNilArg0: true,
34153 faultOnNilArg1: true,
34154 reg: regInfo{
34155 inputs: []inputInfo{
34156 {0, 16777216},
34157 {1, 8388608},
34158 },
34159 clobbers: 25165824,
34160 },
34161 },
34162 {
34163 name: "LoweredZero",
34164 auxType: auxInt64,
34165 argLen: 3,
34166 faultOnNilArg0: true,
34167 reg: regInfo{
34168 inputs: []inputInfo{
34169 {0, 16},
34170 {1, 1006632944},
34171 },
34172 clobbers: 16,
34173 },
34174 },
34175 {
34176 name: "LoweredMove",
34177 auxType: auxInt64,
34178 argLen: 4,
34179 faultOnNilArg0: true,
34180 faultOnNilArg1: true,
34181 reg: regInfo{
34182 inputs: []inputInfo{
34183 {0, 16},
34184 {1, 32},
34185 {2, 1006632880},
34186 },
34187 clobbers: 112,
34188 },
34189 },
34190 {
34191 name: "LoweredAtomicLoad8",
34192 argLen: 2,
34193 faultOnNilArg0: true,
34194 reg: regInfo{
34195 inputs: []inputInfo{
34196 {0, 9223372037861408754},
34197 },
34198 outputs: []outputInfo{
34199 {0, 1006632944},
34200 },
34201 },
34202 },
34203 {
34204 name: "LoweredAtomicLoad32",
34205 argLen: 2,
34206 faultOnNilArg0: true,
34207 reg: regInfo{
34208 inputs: []inputInfo{
34209 {0, 9223372037861408754},
34210 },
34211 outputs: []outputInfo{
34212 {0, 1006632944},
34213 },
34214 },
34215 },
34216 {
34217 name: "LoweredAtomicLoad64",
34218 argLen: 2,
34219 faultOnNilArg0: true,
34220 reg: regInfo{
34221 inputs: []inputInfo{
34222 {0, 9223372037861408754},
34223 },
34224 outputs: []outputInfo{
34225 {0, 1006632944},
34226 },
34227 },
34228 },
34229 {
34230 name: "LoweredAtomicStore8",
34231 argLen: 3,
34232 faultOnNilArg0: true,
34233 hasSideEffects: true,
34234 reg: regInfo{
34235 inputs: []inputInfo{
34236 {1, 1006632946},
34237 {0, 9223372037861408754},
34238 },
34239 },
34240 },
34241 {
34242 name: "LoweredAtomicStore32",
34243 argLen: 3,
34244 faultOnNilArg0: true,
34245 hasSideEffects: true,
34246 reg: regInfo{
34247 inputs: []inputInfo{
34248 {1, 1006632946},
34249 {0, 9223372037861408754},
34250 },
34251 },
34252 },
34253 {
34254 name: "LoweredAtomicStore64",
34255 argLen: 3,
34256 faultOnNilArg0: true,
34257 hasSideEffects: true,
34258 reg: regInfo{
34259 inputs: []inputInfo{
34260 {1, 1006632946},
34261 {0, 9223372037861408754},
34262 },
34263 },
34264 },
34265 {
34266 name: "LoweredAtomicExchange32",
34267 argLen: 3,
34268 resultNotInArgs: true,
34269 faultOnNilArg0: true,
34270 hasSideEffects: true,
34271 reg: regInfo{
34272 inputs: []inputInfo{
34273 {1, 1073741808},
34274 {0, 9223372037928517618},
34275 },
34276 outputs: []outputInfo{
34277 {0, 1006632944},
34278 },
34279 },
34280 },
34281 {
34282 name: "LoweredAtomicExchange64",
34283 argLen: 3,
34284 resultNotInArgs: true,
34285 faultOnNilArg0: true,
34286 hasSideEffects: true,
34287 reg: regInfo{
34288 inputs: []inputInfo{
34289 {1, 1073741808},
34290 {0, 9223372037928517618},
34291 },
34292 outputs: []outputInfo{
34293 {0, 1006632944},
34294 },
34295 },
34296 },
34297 {
34298 name: "LoweredAtomicAdd32",
34299 argLen: 3,
34300 resultNotInArgs: true,
34301 faultOnNilArg0: true,
34302 hasSideEffects: true,
34303 unsafePoint: true,
34304 reg: regInfo{
34305 inputs: []inputInfo{
34306 {1, 1073741808},
34307 {0, 9223372037928517618},
34308 },
34309 outputs: []outputInfo{
34310 {0, 1006632944},
34311 },
34312 },
34313 },
34314 {
34315 name: "LoweredAtomicAdd64",
34316 argLen: 3,
34317 resultNotInArgs: true,
34318 faultOnNilArg0: true,
34319 hasSideEffects: true,
34320 unsafePoint: true,
34321 reg: regInfo{
34322 inputs: []inputInfo{
34323 {1, 1073741808},
34324 {0, 9223372037928517618},
34325 },
34326 outputs: []outputInfo{
34327 {0, 1006632944},
34328 },
34329 },
34330 },
34331 {
34332 name: "LoweredAtomicCas32",
34333 argLen: 4,
34334 resultNotInArgs: true,
34335 faultOnNilArg0: true,
34336 hasSideEffects: true,
34337 unsafePoint: true,
34338 reg: regInfo{
34339 inputs: []inputInfo{
34340 {1, 1073741808},
34341 {2, 1073741808},
34342 {0, 9223372037928517618},
34343 },
34344 outputs: []outputInfo{
34345 {0, 1006632944},
34346 },
34347 },
34348 },
34349 {
34350 name: "LoweredAtomicCas64",
34351 argLen: 4,
34352 resultNotInArgs: true,
34353 faultOnNilArg0: true,
34354 hasSideEffects: true,
34355 unsafePoint: true,
34356 reg: regInfo{
34357 inputs: []inputInfo{
34358 {1, 1073741808},
34359 {2, 1073741808},
34360 {0, 9223372037928517618},
34361 },
34362 outputs: []outputInfo{
34363 {0, 1006632944},
34364 },
34365 },
34366 },
34367 {
34368 name: "LoweredAtomicAnd32",
34369 argLen: 3,
34370 faultOnNilArg0: true,
34371 hasSideEffects: true,
34372 asm: riscv.AAMOANDW,
34373 reg: regInfo{
34374 inputs: []inputInfo{
34375 {1, 1073741808},
34376 {0, 9223372037928517618},
34377 },
34378 },
34379 },
34380 {
34381 name: "LoweredAtomicOr32",
34382 argLen: 3,
34383 faultOnNilArg0: true,
34384 hasSideEffects: true,
34385 asm: riscv.AAMOORW,
34386 reg: regInfo{
34387 inputs: []inputInfo{
34388 {1, 1073741808},
34389 {0, 9223372037928517618},
34390 },
34391 },
34392 },
34393 {
34394 name: "LoweredNilCheck",
34395 argLen: 2,
34396 nilCheck: true,
34397 faultOnNilArg0: true,
34398 reg: regInfo{
34399 inputs: []inputInfo{
34400 {0, 1006632946},
34401 },
34402 },
34403 },
34404 {
34405 name: "LoweredGetClosurePtr",
34406 argLen: 0,
34407 reg: regInfo{
34408 outputs: []outputInfo{
34409 {0, 33554432},
34410 },
34411 },
34412 },
34413 {
34414 name: "LoweredGetCallerSP",
34415 argLen: 1,
34416 rematerializeable: true,
34417 reg: regInfo{
34418 outputs: []outputInfo{
34419 {0, 1006632944},
34420 },
34421 },
34422 },
34423 {
34424 name: "LoweredGetCallerPC",
34425 argLen: 0,
34426 rematerializeable: true,
34427 reg: regInfo{
34428 outputs: []outputInfo{
34429 {0, 1006632944},
34430 },
34431 },
34432 },
34433 {
34434 name: "LoweredWB",
34435 auxType: auxInt64,
34436 argLen: 1,
34437 clobberFlags: true,
34438 reg: regInfo{
34439 clobbers: 9223372034707292160,
34440 outputs: []outputInfo{
34441 {0, 8388608},
34442 },
34443 },
34444 },
34445 {
34446 name: "LoweredPubBarrier",
34447 argLen: 1,
34448 hasSideEffects: true,
34449 asm: riscv.AFENCE,
34450 reg: regInfo{},
34451 },
34452 {
34453 name: "LoweredPanicBoundsA",
34454 auxType: auxInt64,
34455 argLen: 3,
34456 call: true,
34457 reg: regInfo{
34458 inputs: []inputInfo{
34459 {0, 64},
34460 {1, 134217728},
34461 },
34462 },
34463 },
34464 {
34465 name: "LoweredPanicBoundsB",
34466 auxType: auxInt64,
34467 argLen: 3,
34468 call: true,
34469 reg: regInfo{
34470 inputs: []inputInfo{
34471 {0, 32},
34472 {1, 64},
34473 },
34474 },
34475 },
34476 {
34477 name: "LoweredPanicBoundsC",
34478 auxType: auxInt64,
34479 argLen: 3,
34480 call: true,
34481 reg: regInfo{
34482 inputs: []inputInfo{
34483 {0, 16},
34484 {1, 32},
34485 },
34486 },
34487 },
34488 {
34489 name: "FADDS",
34490 argLen: 2,
34491 commutative: true,
34492 asm: riscv.AFADDS,
34493 reg: regInfo{
34494 inputs: []inputInfo{
34495 {0, 9223372034707292160},
34496 {1, 9223372034707292160},
34497 },
34498 outputs: []outputInfo{
34499 {0, 9223372034707292160},
34500 },
34501 },
34502 },
34503 {
34504 name: "FSUBS",
34505 argLen: 2,
34506 asm: riscv.AFSUBS,
34507 reg: regInfo{
34508 inputs: []inputInfo{
34509 {0, 9223372034707292160},
34510 {1, 9223372034707292160},
34511 },
34512 outputs: []outputInfo{
34513 {0, 9223372034707292160},
34514 },
34515 },
34516 },
34517 {
34518 name: "FMULS",
34519 argLen: 2,
34520 commutative: true,
34521 asm: riscv.AFMULS,
34522 reg: regInfo{
34523 inputs: []inputInfo{
34524 {0, 9223372034707292160},
34525 {1, 9223372034707292160},
34526 },
34527 outputs: []outputInfo{
34528 {0, 9223372034707292160},
34529 },
34530 },
34531 },
34532 {
34533 name: "FDIVS",
34534 argLen: 2,
34535 asm: riscv.AFDIVS,
34536 reg: regInfo{
34537 inputs: []inputInfo{
34538 {0, 9223372034707292160},
34539 {1, 9223372034707292160},
34540 },
34541 outputs: []outputInfo{
34542 {0, 9223372034707292160},
34543 },
34544 },
34545 },
34546 {
34547 name: "FMADDS",
34548 argLen: 3,
34549 commutative: true,
34550 asm: riscv.AFMADDS,
34551 reg: regInfo{
34552 inputs: []inputInfo{
34553 {0, 9223372034707292160},
34554 {1, 9223372034707292160},
34555 {2, 9223372034707292160},
34556 },
34557 outputs: []outputInfo{
34558 {0, 9223372034707292160},
34559 },
34560 },
34561 },
34562 {
34563 name: "FMSUBS",
34564 argLen: 3,
34565 commutative: true,
34566 asm: riscv.AFMSUBS,
34567 reg: regInfo{
34568 inputs: []inputInfo{
34569 {0, 9223372034707292160},
34570 {1, 9223372034707292160},
34571 {2, 9223372034707292160},
34572 },
34573 outputs: []outputInfo{
34574 {0, 9223372034707292160},
34575 },
34576 },
34577 },
34578 {
34579 name: "FNMADDS",
34580 argLen: 3,
34581 commutative: true,
34582 asm: riscv.AFNMADDS,
34583 reg: regInfo{
34584 inputs: []inputInfo{
34585 {0, 9223372034707292160},
34586 {1, 9223372034707292160},
34587 {2, 9223372034707292160},
34588 },
34589 outputs: []outputInfo{
34590 {0, 9223372034707292160},
34591 },
34592 },
34593 },
34594 {
34595 name: "FNMSUBS",
34596 argLen: 3,
34597 commutative: true,
34598 asm: riscv.AFNMSUBS,
34599 reg: regInfo{
34600 inputs: []inputInfo{
34601 {0, 9223372034707292160},
34602 {1, 9223372034707292160},
34603 {2, 9223372034707292160},
34604 },
34605 outputs: []outputInfo{
34606 {0, 9223372034707292160},
34607 },
34608 },
34609 },
34610 {
34611 name: "FSQRTS",
34612 argLen: 1,
34613 asm: riscv.AFSQRTS,
34614 reg: regInfo{
34615 inputs: []inputInfo{
34616 {0, 9223372034707292160},
34617 },
34618 outputs: []outputInfo{
34619 {0, 9223372034707292160},
34620 },
34621 },
34622 },
34623 {
34624 name: "FNEGS",
34625 argLen: 1,
34626 asm: riscv.AFNEGS,
34627 reg: regInfo{
34628 inputs: []inputInfo{
34629 {0, 9223372034707292160},
34630 },
34631 outputs: []outputInfo{
34632 {0, 9223372034707292160},
34633 },
34634 },
34635 },
34636 {
34637 name: "FMVSX",
34638 argLen: 1,
34639 asm: riscv.AFMVSX,
34640 reg: regInfo{
34641 inputs: []inputInfo{
34642 {0, 1006632944},
34643 },
34644 outputs: []outputInfo{
34645 {0, 9223372034707292160},
34646 },
34647 },
34648 },
34649 {
34650 name: "FCVTSW",
34651 argLen: 1,
34652 asm: riscv.AFCVTSW,
34653 reg: regInfo{
34654 inputs: []inputInfo{
34655 {0, 1006632944},
34656 },
34657 outputs: []outputInfo{
34658 {0, 9223372034707292160},
34659 },
34660 },
34661 },
34662 {
34663 name: "FCVTSL",
34664 argLen: 1,
34665 asm: riscv.AFCVTSL,
34666 reg: regInfo{
34667 inputs: []inputInfo{
34668 {0, 1006632944},
34669 },
34670 outputs: []outputInfo{
34671 {0, 9223372034707292160},
34672 },
34673 },
34674 },
34675 {
34676 name: "FCVTWS",
34677 argLen: 1,
34678 asm: riscv.AFCVTWS,
34679 reg: regInfo{
34680 inputs: []inputInfo{
34681 {0, 9223372034707292160},
34682 },
34683 outputs: []outputInfo{
34684 {0, 1006632944},
34685 },
34686 },
34687 },
34688 {
34689 name: "FCVTLS",
34690 argLen: 1,
34691 asm: riscv.AFCVTLS,
34692 reg: regInfo{
34693 inputs: []inputInfo{
34694 {0, 9223372034707292160},
34695 },
34696 outputs: []outputInfo{
34697 {0, 1006632944},
34698 },
34699 },
34700 },
34701 {
34702 name: "FMOVWload",
34703 auxType: auxSymOff,
34704 argLen: 2,
34705 faultOnNilArg0: true,
34706 symEffect: SymRead,
34707 asm: riscv.AMOVF,
34708 reg: regInfo{
34709 inputs: []inputInfo{
34710 {0, 9223372037861408754},
34711 },
34712 outputs: []outputInfo{
34713 {0, 9223372034707292160},
34714 },
34715 },
34716 },
34717 {
34718 name: "FMOVWstore",
34719 auxType: auxSymOff,
34720 argLen: 3,
34721 faultOnNilArg0: true,
34722 symEffect: SymWrite,
34723 asm: riscv.AMOVF,
34724 reg: regInfo{
34725 inputs: []inputInfo{
34726 {0, 9223372037861408754},
34727 {1, 9223372034707292160},
34728 },
34729 },
34730 },
34731 {
34732 name: "FEQS",
34733 argLen: 2,
34734 commutative: true,
34735 asm: riscv.AFEQS,
34736 reg: regInfo{
34737 inputs: []inputInfo{
34738 {0, 9223372034707292160},
34739 {1, 9223372034707292160},
34740 },
34741 outputs: []outputInfo{
34742 {0, 1006632944},
34743 },
34744 },
34745 },
34746 {
34747 name: "FNES",
34748 argLen: 2,
34749 commutative: true,
34750 asm: riscv.AFNES,
34751 reg: regInfo{
34752 inputs: []inputInfo{
34753 {0, 9223372034707292160},
34754 {1, 9223372034707292160},
34755 },
34756 outputs: []outputInfo{
34757 {0, 1006632944},
34758 },
34759 },
34760 },
34761 {
34762 name: "FLTS",
34763 argLen: 2,
34764 asm: riscv.AFLTS,
34765 reg: regInfo{
34766 inputs: []inputInfo{
34767 {0, 9223372034707292160},
34768 {1, 9223372034707292160},
34769 },
34770 outputs: []outputInfo{
34771 {0, 1006632944},
34772 },
34773 },
34774 },
34775 {
34776 name: "FLES",
34777 argLen: 2,
34778 asm: riscv.AFLES,
34779 reg: regInfo{
34780 inputs: []inputInfo{
34781 {0, 9223372034707292160},
34782 {1, 9223372034707292160},
34783 },
34784 outputs: []outputInfo{
34785 {0, 1006632944},
34786 },
34787 },
34788 },
34789 {
34790 name: "LoweredFMAXS",
34791 argLen: 2,
34792 commutative: true,
34793 resultNotInArgs: true,
34794 asm: riscv.AFMAXS,
34795 reg: regInfo{
34796 inputs: []inputInfo{
34797 {0, 9223372034707292160},
34798 {1, 9223372034707292160},
34799 },
34800 outputs: []outputInfo{
34801 {0, 9223372034707292160},
34802 },
34803 },
34804 },
34805 {
34806 name: "LoweredFMINS",
34807 argLen: 2,
34808 commutative: true,
34809 resultNotInArgs: true,
34810 asm: riscv.AFMINS,
34811 reg: regInfo{
34812 inputs: []inputInfo{
34813 {0, 9223372034707292160},
34814 {1, 9223372034707292160},
34815 },
34816 outputs: []outputInfo{
34817 {0, 9223372034707292160},
34818 },
34819 },
34820 },
34821 {
34822 name: "FADDD",
34823 argLen: 2,
34824 commutative: true,
34825 asm: riscv.AFADDD,
34826 reg: regInfo{
34827 inputs: []inputInfo{
34828 {0, 9223372034707292160},
34829 {1, 9223372034707292160},
34830 },
34831 outputs: []outputInfo{
34832 {0, 9223372034707292160},
34833 },
34834 },
34835 },
34836 {
34837 name: "FSUBD",
34838 argLen: 2,
34839 asm: riscv.AFSUBD,
34840 reg: regInfo{
34841 inputs: []inputInfo{
34842 {0, 9223372034707292160},
34843 {1, 9223372034707292160},
34844 },
34845 outputs: []outputInfo{
34846 {0, 9223372034707292160},
34847 },
34848 },
34849 },
34850 {
34851 name: "FMULD",
34852 argLen: 2,
34853 commutative: true,
34854 asm: riscv.AFMULD,
34855 reg: regInfo{
34856 inputs: []inputInfo{
34857 {0, 9223372034707292160},
34858 {1, 9223372034707292160},
34859 },
34860 outputs: []outputInfo{
34861 {0, 9223372034707292160},
34862 },
34863 },
34864 },
34865 {
34866 name: "FDIVD",
34867 argLen: 2,
34868 asm: riscv.AFDIVD,
34869 reg: regInfo{
34870 inputs: []inputInfo{
34871 {0, 9223372034707292160},
34872 {1, 9223372034707292160},
34873 },
34874 outputs: []outputInfo{
34875 {0, 9223372034707292160},
34876 },
34877 },
34878 },
34879 {
34880 name: "FMADDD",
34881 argLen: 3,
34882 commutative: true,
34883 asm: riscv.AFMADDD,
34884 reg: regInfo{
34885 inputs: []inputInfo{
34886 {0, 9223372034707292160},
34887 {1, 9223372034707292160},
34888 {2, 9223372034707292160},
34889 },
34890 outputs: []outputInfo{
34891 {0, 9223372034707292160},
34892 },
34893 },
34894 },
34895 {
34896 name: "FMSUBD",
34897 argLen: 3,
34898 commutative: true,
34899 asm: riscv.AFMSUBD,
34900 reg: regInfo{
34901 inputs: []inputInfo{
34902 {0, 9223372034707292160},
34903 {1, 9223372034707292160},
34904 {2, 9223372034707292160},
34905 },
34906 outputs: []outputInfo{
34907 {0, 9223372034707292160},
34908 },
34909 },
34910 },
34911 {
34912 name: "FNMADDD",
34913 argLen: 3,
34914 commutative: true,
34915 asm: riscv.AFNMADDD,
34916 reg: regInfo{
34917 inputs: []inputInfo{
34918 {0, 9223372034707292160},
34919 {1, 9223372034707292160},
34920 {2, 9223372034707292160},
34921 },
34922 outputs: []outputInfo{
34923 {0, 9223372034707292160},
34924 },
34925 },
34926 },
34927 {
34928 name: "FNMSUBD",
34929 argLen: 3,
34930 commutative: true,
34931 asm: riscv.AFNMSUBD,
34932 reg: regInfo{
34933 inputs: []inputInfo{
34934 {0, 9223372034707292160},
34935 {1, 9223372034707292160},
34936 {2, 9223372034707292160},
34937 },
34938 outputs: []outputInfo{
34939 {0, 9223372034707292160},
34940 },
34941 },
34942 },
34943 {
34944 name: "FSQRTD",
34945 argLen: 1,
34946 asm: riscv.AFSQRTD,
34947 reg: regInfo{
34948 inputs: []inputInfo{
34949 {0, 9223372034707292160},
34950 },
34951 outputs: []outputInfo{
34952 {0, 9223372034707292160},
34953 },
34954 },
34955 },
34956 {
34957 name: "FNEGD",
34958 argLen: 1,
34959 asm: riscv.AFNEGD,
34960 reg: regInfo{
34961 inputs: []inputInfo{
34962 {0, 9223372034707292160},
34963 },
34964 outputs: []outputInfo{
34965 {0, 9223372034707292160},
34966 },
34967 },
34968 },
34969 {
34970 name: "FABSD",
34971 argLen: 1,
34972 asm: riscv.AFABSD,
34973 reg: regInfo{
34974 inputs: []inputInfo{
34975 {0, 9223372034707292160},
34976 },
34977 outputs: []outputInfo{
34978 {0, 9223372034707292160},
34979 },
34980 },
34981 },
34982 {
34983 name: "FSGNJD",
34984 argLen: 2,
34985 asm: riscv.AFSGNJD,
34986 reg: regInfo{
34987 inputs: []inputInfo{
34988 {0, 9223372034707292160},
34989 {1, 9223372034707292160},
34990 },
34991 outputs: []outputInfo{
34992 {0, 9223372034707292160},
34993 },
34994 },
34995 },
34996 {
34997 name: "FMVDX",
34998 argLen: 1,
34999 asm: riscv.AFMVDX,
35000 reg: regInfo{
35001 inputs: []inputInfo{
35002 {0, 1006632944},
35003 },
35004 outputs: []outputInfo{
35005 {0, 9223372034707292160},
35006 },
35007 },
35008 },
35009 {
35010 name: "FCVTDW",
35011 argLen: 1,
35012 asm: riscv.AFCVTDW,
35013 reg: regInfo{
35014 inputs: []inputInfo{
35015 {0, 1006632944},
35016 },
35017 outputs: []outputInfo{
35018 {0, 9223372034707292160},
35019 },
35020 },
35021 },
35022 {
35023 name: "FCVTDL",
35024 argLen: 1,
35025 asm: riscv.AFCVTDL,
35026 reg: regInfo{
35027 inputs: []inputInfo{
35028 {0, 1006632944},
35029 },
35030 outputs: []outputInfo{
35031 {0, 9223372034707292160},
35032 },
35033 },
35034 },
35035 {
35036 name: "FCVTWD",
35037 argLen: 1,
35038 asm: riscv.AFCVTWD,
35039 reg: regInfo{
35040 inputs: []inputInfo{
35041 {0, 9223372034707292160},
35042 },
35043 outputs: []outputInfo{
35044 {0, 1006632944},
35045 },
35046 },
35047 },
35048 {
35049 name: "FCVTLD",
35050 argLen: 1,
35051 asm: riscv.AFCVTLD,
35052 reg: regInfo{
35053 inputs: []inputInfo{
35054 {0, 9223372034707292160},
35055 },
35056 outputs: []outputInfo{
35057 {0, 1006632944},
35058 },
35059 },
35060 },
35061 {
35062 name: "FCVTDS",
35063 argLen: 1,
35064 asm: riscv.AFCVTDS,
35065 reg: regInfo{
35066 inputs: []inputInfo{
35067 {0, 9223372034707292160},
35068 },
35069 outputs: []outputInfo{
35070 {0, 9223372034707292160},
35071 },
35072 },
35073 },
35074 {
35075 name: "FCVTSD",
35076 argLen: 1,
35077 asm: riscv.AFCVTSD,
35078 reg: regInfo{
35079 inputs: []inputInfo{
35080 {0, 9223372034707292160},
35081 },
35082 outputs: []outputInfo{
35083 {0, 9223372034707292160},
35084 },
35085 },
35086 },
35087 {
35088 name: "FMOVDload",
35089 auxType: auxSymOff,
35090 argLen: 2,
35091 faultOnNilArg0: true,
35092 symEffect: SymRead,
35093 asm: riscv.AMOVD,
35094 reg: regInfo{
35095 inputs: []inputInfo{
35096 {0, 9223372037861408754},
35097 },
35098 outputs: []outputInfo{
35099 {0, 9223372034707292160},
35100 },
35101 },
35102 },
35103 {
35104 name: "FMOVDstore",
35105 auxType: auxSymOff,
35106 argLen: 3,
35107 faultOnNilArg0: true,
35108 symEffect: SymWrite,
35109 asm: riscv.AMOVD,
35110 reg: regInfo{
35111 inputs: []inputInfo{
35112 {0, 9223372037861408754},
35113 {1, 9223372034707292160},
35114 },
35115 },
35116 },
35117 {
35118 name: "FEQD",
35119 argLen: 2,
35120 commutative: true,
35121 asm: riscv.AFEQD,
35122 reg: regInfo{
35123 inputs: []inputInfo{
35124 {0, 9223372034707292160},
35125 {1, 9223372034707292160},
35126 },
35127 outputs: []outputInfo{
35128 {0, 1006632944},
35129 },
35130 },
35131 },
35132 {
35133 name: "FNED",
35134 argLen: 2,
35135 commutative: true,
35136 asm: riscv.AFNED,
35137 reg: regInfo{
35138 inputs: []inputInfo{
35139 {0, 9223372034707292160},
35140 {1, 9223372034707292160},
35141 },
35142 outputs: []outputInfo{
35143 {0, 1006632944},
35144 },
35145 },
35146 },
35147 {
35148 name: "FLTD",
35149 argLen: 2,
35150 asm: riscv.AFLTD,
35151 reg: regInfo{
35152 inputs: []inputInfo{
35153 {0, 9223372034707292160},
35154 {1, 9223372034707292160},
35155 },
35156 outputs: []outputInfo{
35157 {0, 1006632944},
35158 },
35159 },
35160 },
35161 {
35162 name: "FLED",
35163 argLen: 2,
35164 asm: riscv.AFLED,
35165 reg: regInfo{
35166 inputs: []inputInfo{
35167 {0, 9223372034707292160},
35168 {1, 9223372034707292160},
35169 },
35170 outputs: []outputInfo{
35171 {0, 1006632944},
35172 },
35173 },
35174 },
35175 {
35176 name: "LoweredFMIND",
35177 argLen: 2,
35178 commutative: true,
35179 resultNotInArgs: true,
35180 asm: riscv.AFMIND,
35181 reg: regInfo{
35182 inputs: []inputInfo{
35183 {0, 9223372034707292160},
35184 {1, 9223372034707292160},
35185 },
35186 outputs: []outputInfo{
35187 {0, 9223372034707292160},
35188 },
35189 },
35190 },
35191 {
35192 name: "LoweredFMAXD",
35193 argLen: 2,
35194 commutative: true,
35195 resultNotInArgs: true,
35196 asm: riscv.AFMAXD,
35197 reg: regInfo{
35198 inputs: []inputInfo{
35199 {0, 9223372034707292160},
35200 {1, 9223372034707292160},
35201 },
35202 outputs: []outputInfo{
35203 {0, 9223372034707292160},
35204 },
35205 },
35206 },
35207
35208 {
35209 name: "FADDS",
35210 argLen: 2,
35211 commutative: true,
35212 resultInArg0: true,
35213 asm: s390x.AFADDS,
35214 reg: regInfo{
35215 inputs: []inputInfo{
35216 {0, 4294901760},
35217 {1, 4294901760},
35218 },
35219 outputs: []outputInfo{
35220 {0, 4294901760},
35221 },
35222 },
35223 },
35224 {
35225 name: "FADD",
35226 argLen: 2,
35227 commutative: true,
35228 resultInArg0: true,
35229 asm: s390x.AFADD,
35230 reg: regInfo{
35231 inputs: []inputInfo{
35232 {0, 4294901760},
35233 {1, 4294901760},
35234 },
35235 outputs: []outputInfo{
35236 {0, 4294901760},
35237 },
35238 },
35239 },
35240 {
35241 name: "FSUBS",
35242 argLen: 2,
35243 resultInArg0: true,
35244 asm: s390x.AFSUBS,
35245 reg: regInfo{
35246 inputs: []inputInfo{
35247 {0, 4294901760},
35248 {1, 4294901760},
35249 },
35250 outputs: []outputInfo{
35251 {0, 4294901760},
35252 },
35253 },
35254 },
35255 {
35256 name: "FSUB",
35257 argLen: 2,
35258 resultInArg0: true,
35259 asm: s390x.AFSUB,
35260 reg: regInfo{
35261 inputs: []inputInfo{
35262 {0, 4294901760},
35263 {1, 4294901760},
35264 },
35265 outputs: []outputInfo{
35266 {0, 4294901760},
35267 },
35268 },
35269 },
35270 {
35271 name: "FMULS",
35272 argLen: 2,
35273 commutative: true,
35274 resultInArg0: true,
35275 asm: s390x.AFMULS,
35276 reg: regInfo{
35277 inputs: []inputInfo{
35278 {0, 4294901760},
35279 {1, 4294901760},
35280 },
35281 outputs: []outputInfo{
35282 {0, 4294901760},
35283 },
35284 },
35285 },
35286 {
35287 name: "FMUL",
35288 argLen: 2,
35289 commutative: true,
35290 resultInArg0: true,
35291 asm: s390x.AFMUL,
35292 reg: regInfo{
35293 inputs: []inputInfo{
35294 {0, 4294901760},
35295 {1, 4294901760},
35296 },
35297 outputs: []outputInfo{
35298 {0, 4294901760},
35299 },
35300 },
35301 },
35302 {
35303 name: "FDIVS",
35304 argLen: 2,
35305 resultInArg0: true,
35306 asm: s390x.AFDIVS,
35307 reg: regInfo{
35308 inputs: []inputInfo{
35309 {0, 4294901760},
35310 {1, 4294901760},
35311 },
35312 outputs: []outputInfo{
35313 {0, 4294901760},
35314 },
35315 },
35316 },
35317 {
35318 name: "FDIV",
35319 argLen: 2,
35320 resultInArg0: true,
35321 asm: s390x.AFDIV,
35322 reg: regInfo{
35323 inputs: []inputInfo{
35324 {0, 4294901760},
35325 {1, 4294901760},
35326 },
35327 outputs: []outputInfo{
35328 {0, 4294901760},
35329 },
35330 },
35331 },
35332 {
35333 name: "FNEGS",
35334 argLen: 1,
35335 clobberFlags: true,
35336 asm: s390x.AFNEGS,
35337 reg: regInfo{
35338 inputs: []inputInfo{
35339 {0, 4294901760},
35340 },
35341 outputs: []outputInfo{
35342 {0, 4294901760},
35343 },
35344 },
35345 },
35346 {
35347 name: "FNEG",
35348 argLen: 1,
35349 clobberFlags: true,
35350 asm: s390x.AFNEG,
35351 reg: regInfo{
35352 inputs: []inputInfo{
35353 {0, 4294901760},
35354 },
35355 outputs: []outputInfo{
35356 {0, 4294901760},
35357 },
35358 },
35359 },
35360 {
35361 name: "FMADDS",
35362 argLen: 3,
35363 resultInArg0: true,
35364 asm: s390x.AFMADDS,
35365 reg: regInfo{
35366 inputs: []inputInfo{
35367 {0, 4294901760},
35368 {1, 4294901760},
35369 {2, 4294901760},
35370 },
35371 outputs: []outputInfo{
35372 {0, 4294901760},
35373 },
35374 },
35375 },
35376 {
35377 name: "FMADD",
35378 argLen: 3,
35379 resultInArg0: true,
35380 asm: s390x.AFMADD,
35381 reg: regInfo{
35382 inputs: []inputInfo{
35383 {0, 4294901760},
35384 {1, 4294901760},
35385 {2, 4294901760},
35386 },
35387 outputs: []outputInfo{
35388 {0, 4294901760},
35389 },
35390 },
35391 },
35392 {
35393 name: "FMSUBS",
35394 argLen: 3,
35395 resultInArg0: true,
35396 asm: s390x.AFMSUBS,
35397 reg: regInfo{
35398 inputs: []inputInfo{
35399 {0, 4294901760},
35400 {1, 4294901760},
35401 {2, 4294901760},
35402 },
35403 outputs: []outputInfo{
35404 {0, 4294901760},
35405 },
35406 },
35407 },
35408 {
35409 name: "FMSUB",
35410 argLen: 3,
35411 resultInArg0: true,
35412 asm: s390x.AFMSUB,
35413 reg: regInfo{
35414 inputs: []inputInfo{
35415 {0, 4294901760},
35416 {1, 4294901760},
35417 {2, 4294901760},
35418 },
35419 outputs: []outputInfo{
35420 {0, 4294901760},
35421 },
35422 },
35423 },
35424 {
35425 name: "LPDFR",
35426 argLen: 1,
35427 asm: s390x.ALPDFR,
35428 reg: regInfo{
35429 inputs: []inputInfo{
35430 {0, 4294901760},
35431 },
35432 outputs: []outputInfo{
35433 {0, 4294901760},
35434 },
35435 },
35436 },
35437 {
35438 name: "LNDFR",
35439 argLen: 1,
35440 asm: s390x.ALNDFR,
35441 reg: regInfo{
35442 inputs: []inputInfo{
35443 {0, 4294901760},
35444 },
35445 outputs: []outputInfo{
35446 {0, 4294901760},
35447 },
35448 },
35449 },
35450 {
35451 name: "CPSDR",
35452 argLen: 2,
35453 asm: s390x.ACPSDR,
35454 reg: regInfo{
35455 inputs: []inputInfo{
35456 {0, 4294901760},
35457 {1, 4294901760},
35458 },
35459 outputs: []outputInfo{
35460 {0, 4294901760},
35461 },
35462 },
35463 },
35464 {
35465 name: "FIDBR",
35466 auxType: auxInt8,
35467 argLen: 1,
35468 asm: s390x.AFIDBR,
35469 reg: regInfo{
35470 inputs: []inputInfo{
35471 {0, 4294901760},
35472 },
35473 outputs: []outputInfo{
35474 {0, 4294901760},
35475 },
35476 },
35477 },
35478 {
35479 name: "FMOVSload",
35480 auxType: auxSymOff,
35481 argLen: 2,
35482 faultOnNilArg0: true,
35483 symEffect: SymRead,
35484 asm: s390x.AFMOVS,
35485 reg: regInfo{
35486 inputs: []inputInfo{
35487 {0, 4295023614},
35488 },
35489 outputs: []outputInfo{
35490 {0, 4294901760},
35491 },
35492 },
35493 },
35494 {
35495 name: "FMOVDload",
35496 auxType: auxSymOff,
35497 argLen: 2,
35498 faultOnNilArg0: true,
35499 symEffect: SymRead,
35500 asm: s390x.AFMOVD,
35501 reg: regInfo{
35502 inputs: []inputInfo{
35503 {0, 4295023614},
35504 },
35505 outputs: []outputInfo{
35506 {0, 4294901760},
35507 },
35508 },
35509 },
35510 {
35511 name: "FMOVSconst",
35512 auxType: auxFloat32,
35513 argLen: 0,
35514 rematerializeable: true,
35515 asm: s390x.AFMOVS,
35516 reg: regInfo{
35517 outputs: []outputInfo{
35518 {0, 4294901760},
35519 },
35520 },
35521 },
35522 {
35523 name: "FMOVDconst",
35524 auxType: auxFloat64,
35525 argLen: 0,
35526 rematerializeable: true,
35527 asm: s390x.AFMOVD,
35528 reg: regInfo{
35529 outputs: []outputInfo{
35530 {0, 4294901760},
35531 },
35532 },
35533 },
35534 {
35535 name: "FMOVSloadidx",
35536 auxType: auxSymOff,
35537 argLen: 3,
35538 symEffect: SymRead,
35539 asm: s390x.AFMOVS,
35540 reg: regInfo{
35541 inputs: []inputInfo{
35542 {0, 56318},
35543 {1, 56318},
35544 },
35545 outputs: []outputInfo{
35546 {0, 4294901760},
35547 },
35548 },
35549 },
35550 {
35551 name: "FMOVDloadidx",
35552 auxType: auxSymOff,
35553 argLen: 3,
35554 symEffect: SymRead,
35555 asm: s390x.AFMOVD,
35556 reg: regInfo{
35557 inputs: []inputInfo{
35558 {0, 56318},
35559 {1, 56318},
35560 },
35561 outputs: []outputInfo{
35562 {0, 4294901760},
35563 },
35564 },
35565 },
35566 {
35567 name: "FMOVSstore",
35568 auxType: auxSymOff,
35569 argLen: 3,
35570 faultOnNilArg0: true,
35571 symEffect: SymWrite,
35572 asm: s390x.AFMOVS,
35573 reg: regInfo{
35574 inputs: []inputInfo{
35575 {0, 4295023614},
35576 {1, 4294901760},
35577 },
35578 },
35579 },
35580 {
35581 name: "FMOVDstore",
35582 auxType: auxSymOff,
35583 argLen: 3,
35584 faultOnNilArg0: true,
35585 symEffect: SymWrite,
35586 asm: s390x.AFMOVD,
35587 reg: regInfo{
35588 inputs: []inputInfo{
35589 {0, 4295023614},
35590 {1, 4294901760},
35591 },
35592 },
35593 },
35594 {
35595 name: "FMOVSstoreidx",
35596 auxType: auxSymOff,
35597 argLen: 4,
35598 symEffect: SymWrite,
35599 asm: s390x.AFMOVS,
35600 reg: regInfo{
35601 inputs: []inputInfo{
35602 {0, 56318},
35603 {1, 56318},
35604 {2, 4294901760},
35605 },
35606 },
35607 },
35608 {
35609 name: "FMOVDstoreidx",
35610 auxType: auxSymOff,
35611 argLen: 4,
35612 symEffect: SymWrite,
35613 asm: s390x.AFMOVD,
35614 reg: regInfo{
35615 inputs: []inputInfo{
35616 {0, 56318},
35617 {1, 56318},
35618 {2, 4294901760},
35619 },
35620 },
35621 },
35622 {
35623 name: "ADD",
35624 argLen: 2,
35625 commutative: true,
35626 clobberFlags: true,
35627 asm: s390x.AADD,
35628 reg: regInfo{
35629 inputs: []inputInfo{
35630 {1, 23551},
35631 {0, 56319},
35632 },
35633 outputs: []outputInfo{
35634 {0, 23551},
35635 },
35636 },
35637 },
35638 {
35639 name: "ADDW",
35640 argLen: 2,
35641 commutative: true,
35642 clobberFlags: true,
35643 asm: s390x.AADDW,
35644 reg: regInfo{
35645 inputs: []inputInfo{
35646 {1, 23551},
35647 {0, 56319},
35648 },
35649 outputs: []outputInfo{
35650 {0, 23551},
35651 },
35652 },
35653 },
35654 {
35655 name: "ADDconst",
35656 auxType: auxInt32,
35657 argLen: 1,
35658 clobberFlags: true,
35659 asm: s390x.AADD,
35660 reg: regInfo{
35661 inputs: []inputInfo{
35662 {0, 56319},
35663 },
35664 outputs: []outputInfo{
35665 {0, 23551},
35666 },
35667 },
35668 },
35669 {
35670 name: "ADDWconst",
35671 auxType: auxInt32,
35672 argLen: 1,
35673 clobberFlags: true,
35674 asm: s390x.AADDW,
35675 reg: regInfo{
35676 inputs: []inputInfo{
35677 {0, 56319},
35678 },
35679 outputs: []outputInfo{
35680 {0, 23551},
35681 },
35682 },
35683 },
35684 {
35685 name: "ADDload",
35686 auxType: auxSymOff,
35687 argLen: 3,
35688 resultInArg0: true,
35689 clobberFlags: true,
35690 faultOnNilArg1: true,
35691 symEffect: SymRead,
35692 asm: s390x.AADD,
35693 reg: regInfo{
35694 inputs: []inputInfo{
35695 {0, 23551},
35696 {1, 56318},
35697 },
35698 outputs: []outputInfo{
35699 {0, 23551},
35700 },
35701 },
35702 },
35703 {
35704 name: "ADDWload",
35705 auxType: auxSymOff,
35706 argLen: 3,
35707 resultInArg0: true,
35708 clobberFlags: true,
35709 faultOnNilArg1: true,
35710 symEffect: SymRead,
35711 asm: s390x.AADDW,
35712 reg: regInfo{
35713 inputs: []inputInfo{
35714 {0, 23551},
35715 {1, 56318},
35716 },
35717 outputs: []outputInfo{
35718 {0, 23551},
35719 },
35720 },
35721 },
35722 {
35723 name: "SUB",
35724 argLen: 2,
35725 clobberFlags: true,
35726 asm: s390x.ASUB,
35727 reg: regInfo{
35728 inputs: []inputInfo{
35729 {0, 23551},
35730 {1, 23551},
35731 },
35732 outputs: []outputInfo{
35733 {0, 23551},
35734 },
35735 },
35736 },
35737 {
35738 name: "SUBW",
35739 argLen: 2,
35740 clobberFlags: true,
35741 asm: s390x.ASUBW,
35742 reg: regInfo{
35743 inputs: []inputInfo{
35744 {0, 23551},
35745 {1, 23551},
35746 },
35747 outputs: []outputInfo{
35748 {0, 23551},
35749 },
35750 },
35751 },
35752 {
35753 name: "SUBconst",
35754 auxType: auxInt32,
35755 argLen: 1,
35756 resultInArg0: true,
35757 clobberFlags: true,
35758 asm: s390x.ASUB,
35759 reg: regInfo{
35760 inputs: []inputInfo{
35761 {0, 23551},
35762 },
35763 outputs: []outputInfo{
35764 {0, 23551},
35765 },
35766 },
35767 },
35768 {
35769 name: "SUBWconst",
35770 auxType: auxInt32,
35771 argLen: 1,
35772 resultInArg0: true,
35773 clobberFlags: true,
35774 asm: s390x.ASUBW,
35775 reg: regInfo{
35776 inputs: []inputInfo{
35777 {0, 23551},
35778 },
35779 outputs: []outputInfo{
35780 {0, 23551},
35781 },
35782 },
35783 },
35784 {
35785 name: "SUBload",
35786 auxType: auxSymOff,
35787 argLen: 3,
35788 resultInArg0: true,
35789 clobberFlags: true,
35790 faultOnNilArg1: true,
35791 symEffect: SymRead,
35792 asm: s390x.ASUB,
35793 reg: regInfo{
35794 inputs: []inputInfo{
35795 {0, 23551},
35796 {1, 56318},
35797 },
35798 outputs: []outputInfo{
35799 {0, 23551},
35800 },
35801 },
35802 },
35803 {
35804 name: "SUBWload",
35805 auxType: auxSymOff,
35806 argLen: 3,
35807 resultInArg0: true,
35808 clobberFlags: true,
35809 faultOnNilArg1: true,
35810 symEffect: SymRead,
35811 asm: s390x.ASUBW,
35812 reg: regInfo{
35813 inputs: []inputInfo{
35814 {0, 23551},
35815 {1, 56318},
35816 },
35817 outputs: []outputInfo{
35818 {0, 23551},
35819 },
35820 },
35821 },
35822 {
35823 name: "MULLD",
35824 argLen: 2,
35825 commutative: true,
35826 resultInArg0: true,
35827 clobberFlags: true,
35828 asm: s390x.AMULLD,
35829 reg: regInfo{
35830 inputs: []inputInfo{
35831 {0, 23551},
35832 {1, 23551},
35833 },
35834 outputs: []outputInfo{
35835 {0, 23551},
35836 },
35837 },
35838 },
35839 {
35840 name: "MULLW",
35841 argLen: 2,
35842 commutative: true,
35843 resultInArg0: true,
35844 clobberFlags: true,
35845 asm: s390x.AMULLW,
35846 reg: regInfo{
35847 inputs: []inputInfo{
35848 {0, 23551},
35849 {1, 23551},
35850 },
35851 outputs: []outputInfo{
35852 {0, 23551},
35853 },
35854 },
35855 },
35856 {
35857 name: "MULLDconst",
35858 auxType: auxInt32,
35859 argLen: 1,
35860 resultInArg0: true,
35861 clobberFlags: true,
35862 asm: s390x.AMULLD,
35863 reg: regInfo{
35864 inputs: []inputInfo{
35865 {0, 23551},
35866 },
35867 outputs: []outputInfo{
35868 {0, 23551},
35869 },
35870 },
35871 },
35872 {
35873 name: "MULLWconst",
35874 auxType: auxInt32,
35875 argLen: 1,
35876 resultInArg0: true,
35877 clobberFlags: true,
35878 asm: s390x.AMULLW,
35879 reg: regInfo{
35880 inputs: []inputInfo{
35881 {0, 23551},
35882 },
35883 outputs: []outputInfo{
35884 {0, 23551},
35885 },
35886 },
35887 },
35888 {
35889 name: "MULLDload",
35890 auxType: auxSymOff,
35891 argLen: 3,
35892 resultInArg0: true,
35893 clobberFlags: true,
35894 faultOnNilArg1: true,
35895 symEffect: SymRead,
35896 asm: s390x.AMULLD,
35897 reg: regInfo{
35898 inputs: []inputInfo{
35899 {0, 23551},
35900 {1, 56318},
35901 },
35902 outputs: []outputInfo{
35903 {0, 23551},
35904 },
35905 },
35906 },
35907 {
35908 name: "MULLWload",
35909 auxType: auxSymOff,
35910 argLen: 3,
35911 resultInArg0: true,
35912 clobberFlags: true,
35913 faultOnNilArg1: true,
35914 symEffect: SymRead,
35915 asm: s390x.AMULLW,
35916 reg: regInfo{
35917 inputs: []inputInfo{
35918 {0, 23551},
35919 {1, 56318},
35920 },
35921 outputs: []outputInfo{
35922 {0, 23551},
35923 },
35924 },
35925 },
35926 {
35927 name: "MULHD",
35928 argLen: 2,
35929 commutative: true,
35930 resultInArg0: true,
35931 clobberFlags: true,
35932 asm: s390x.AMULHD,
35933 reg: regInfo{
35934 inputs: []inputInfo{
35935 {0, 21503},
35936 {1, 21503},
35937 },
35938 clobbers: 2048,
35939 outputs: []outputInfo{
35940 {0, 21503},
35941 },
35942 },
35943 },
35944 {
35945 name: "MULHDU",
35946 argLen: 2,
35947 commutative: true,
35948 resultInArg0: true,
35949 clobberFlags: true,
35950 asm: s390x.AMULHDU,
35951 reg: regInfo{
35952 inputs: []inputInfo{
35953 {0, 21503},
35954 {1, 21503},
35955 },
35956 clobbers: 2048,
35957 outputs: []outputInfo{
35958 {0, 21503},
35959 },
35960 },
35961 },
35962 {
35963 name: "DIVD",
35964 argLen: 2,
35965 resultInArg0: true,
35966 clobberFlags: true,
35967 asm: s390x.ADIVD,
35968 reg: regInfo{
35969 inputs: []inputInfo{
35970 {0, 21503},
35971 {1, 21503},
35972 },
35973 clobbers: 2048,
35974 outputs: []outputInfo{
35975 {0, 21503},
35976 },
35977 },
35978 },
35979 {
35980 name: "DIVW",
35981 argLen: 2,
35982 resultInArg0: true,
35983 clobberFlags: true,
35984 asm: s390x.ADIVW,
35985 reg: regInfo{
35986 inputs: []inputInfo{
35987 {0, 21503},
35988 {1, 21503},
35989 },
35990 clobbers: 2048,
35991 outputs: []outputInfo{
35992 {0, 21503},
35993 },
35994 },
35995 },
35996 {
35997 name: "DIVDU",
35998 argLen: 2,
35999 resultInArg0: true,
36000 clobberFlags: true,
36001 asm: s390x.ADIVDU,
36002 reg: regInfo{
36003 inputs: []inputInfo{
36004 {0, 21503},
36005 {1, 21503},
36006 },
36007 clobbers: 2048,
36008 outputs: []outputInfo{
36009 {0, 21503},
36010 },
36011 },
36012 },
36013 {
36014 name: "DIVWU",
36015 argLen: 2,
36016 resultInArg0: true,
36017 clobberFlags: true,
36018 asm: s390x.ADIVWU,
36019 reg: regInfo{
36020 inputs: []inputInfo{
36021 {0, 21503},
36022 {1, 21503},
36023 },
36024 clobbers: 2048,
36025 outputs: []outputInfo{
36026 {0, 21503},
36027 },
36028 },
36029 },
36030 {
36031 name: "MODD",
36032 argLen: 2,
36033 resultInArg0: true,
36034 clobberFlags: true,
36035 asm: s390x.AMODD,
36036 reg: regInfo{
36037 inputs: []inputInfo{
36038 {0, 21503},
36039 {1, 21503},
36040 },
36041 clobbers: 2048,
36042 outputs: []outputInfo{
36043 {0, 21503},
36044 },
36045 },
36046 },
36047 {
36048 name: "MODW",
36049 argLen: 2,
36050 resultInArg0: true,
36051 clobberFlags: true,
36052 asm: s390x.AMODW,
36053 reg: regInfo{
36054 inputs: []inputInfo{
36055 {0, 21503},
36056 {1, 21503},
36057 },
36058 clobbers: 2048,
36059 outputs: []outputInfo{
36060 {0, 21503},
36061 },
36062 },
36063 },
36064 {
36065 name: "MODDU",
36066 argLen: 2,
36067 resultInArg0: true,
36068 clobberFlags: true,
36069 asm: s390x.AMODDU,
36070 reg: regInfo{
36071 inputs: []inputInfo{
36072 {0, 21503},
36073 {1, 21503},
36074 },
36075 clobbers: 2048,
36076 outputs: []outputInfo{
36077 {0, 21503},
36078 },
36079 },
36080 },
36081 {
36082 name: "MODWU",
36083 argLen: 2,
36084 resultInArg0: true,
36085 clobberFlags: true,
36086 asm: s390x.AMODWU,
36087 reg: regInfo{
36088 inputs: []inputInfo{
36089 {0, 21503},
36090 {1, 21503},
36091 },
36092 clobbers: 2048,
36093 outputs: []outputInfo{
36094 {0, 21503},
36095 },
36096 },
36097 },
36098 {
36099 name: "AND",
36100 argLen: 2,
36101 commutative: true,
36102 clobberFlags: true,
36103 asm: s390x.AAND,
36104 reg: regInfo{
36105 inputs: []inputInfo{
36106 {0, 23551},
36107 {1, 23551},
36108 },
36109 outputs: []outputInfo{
36110 {0, 23551},
36111 },
36112 },
36113 },
36114 {
36115 name: "ANDW",
36116 argLen: 2,
36117 commutative: true,
36118 clobberFlags: true,
36119 asm: s390x.AANDW,
36120 reg: regInfo{
36121 inputs: []inputInfo{
36122 {0, 23551},
36123 {1, 23551},
36124 },
36125 outputs: []outputInfo{
36126 {0, 23551},
36127 },
36128 },
36129 },
36130 {
36131 name: "ANDconst",
36132 auxType: auxInt64,
36133 argLen: 1,
36134 resultInArg0: true,
36135 clobberFlags: true,
36136 asm: s390x.AAND,
36137 reg: regInfo{
36138 inputs: []inputInfo{
36139 {0, 23551},
36140 },
36141 outputs: []outputInfo{
36142 {0, 23551},
36143 },
36144 },
36145 },
36146 {
36147 name: "ANDWconst",
36148 auxType: auxInt32,
36149 argLen: 1,
36150 resultInArg0: true,
36151 clobberFlags: true,
36152 asm: s390x.AANDW,
36153 reg: regInfo{
36154 inputs: []inputInfo{
36155 {0, 23551},
36156 },
36157 outputs: []outputInfo{
36158 {0, 23551},
36159 },
36160 },
36161 },
36162 {
36163 name: "ANDload",
36164 auxType: auxSymOff,
36165 argLen: 3,
36166 resultInArg0: true,
36167 clobberFlags: true,
36168 faultOnNilArg1: true,
36169 symEffect: SymRead,
36170 asm: s390x.AAND,
36171 reg: regInfo{
36172 inputs: []inputInfo{
36173 {0, 23551},
36174 {1, 56318},
36175 },
36176 outputs: []outputInfo{
36177 {0, 23551},
36178 },
36179 },
36180 },
36181 {
36182 name: "ANDWload",
36183 auxType: auxSymOff,
36184 argLen: 3,
36185 resultInArg0: true,
36186 clobberFlags: true,
36187 faultOnNilArg1: true,
36188 symEffect: SymRead,
36189 asm: s390x.AANDW,
36190 reg: regInfo{
36191 inputs: []inputInfo{
36192 {0, 23551},
36193 {1, 56318},
36194 },
36195 outputs: []outputInfo{
36196 {0, 23551},
36197 },
36198 },
36199 },
36200 {
36201 name: "OR",
36202 argLen: 2,
36203 commutative: true,
36204 clobberFlags: true,
36205 asm: s390x.AOR,
36206 reg: regInfo{
36207 inputs: []inputInfo{
36208 {0, 23551},
36209 {1, 23551},
36210 },
36211 outputs: []outputInfo{
36212 {0, 23551},
36213 },
36214 },
36215 },
36216 {
36217 name: "ORW",
36218 argLen: 2,
36219 commutative: true,
36220 clobberFlags: true,
36221 asm: s390x.AORW,
36222 reg: regInfo{
36223 inputs: []inputInfo{
36224 {0, 23551},
36225 {1, 23551},
36226 },
36227 outputs: []outputInfo{
36228 {0, 23551},
36229 },
36230 },
36231 },
36232 {
36233 name: "ORconst",
36234 auxType: auxInt64,
36235 argLen: 1,
36236 resultInArg0: true,
36237 clobberFlags: true,
36238 asm: s390x.AOR,
36239 reg: regInfo{
36240 inputs: []inputInfo{
36241 {0, 23551},
36242 },
36243 outputs: []outputInfo{
36244 {0, 23551},
36245 },
36246 },
36247 },
36248 {
36249 name: "ORWconst",
36250 auxType: auxInt32,
36251 argLen: 1,
36252 resultInArg0: true,
36253 clobberFlags: true,
36254 asm: s390x.AORW,
36255 reg: regInfo{
36256 inputs: []inputInfo{
36257 {0, 23551},
36258 },
36259 outputs: []outputInfo{
36260 {0, 23551},
36261 },
36262 },
36263 },
36264 {
36265 name: "ORload",
36266 auxType: auxSymOff,
36267 argLen: 3,
36268 resultInArg0: true,
36269 clobberFlags: true,
36270 faultOnNilArg1: true,
36271 symEffect: SymRead,
36272 asm: s390x.AOR,
36273 reg: regInfo{
36274 inputs: []inputInfo{
36275 {0, 23551},
36276 {1, 56318},
36277 },
36278 outputs: []outputInfo{
36279 {0, 23551},
36280 },
36281 },
36282 },
36283 {
36284 name: "ORWload",
36285 auxType: auxSymOff,
36286 argLen: 3,
36287 resultInArg0: true,
36288 clobberFlags: true,
36289 faultOnNilArg1: true,
36290 symEffect: SymRead,
36291 asm: s390x.AORW,
36292 reg: regInfo{
36293 inputs: []inputInfo{
36294 {0, 23551},
36295 {1, 56318},
36296 },
36297 outputs: []outputInfo{
36298 {0, 23551},
36299 },
36300 },
36301 },
36302 {
36303 name: "XOR",
36304 argLen: 2,
36305 commutative: true,
36306 clobberFlags: true,
36307 asm: s390x.AXOR,
36308 reg: regInfo{
36309 inputs: []inputInfo{
36310 {0, 23551},
36311 {1, 23551},
36312 },
36313 outputs: []outputInfo{
36314 {0, 23551},
36315 },
36316 },
36317 },
36318 {
36319 name: "XORW",
36320 argLen: 2,
36321 commutative: true,
36322 clobberFlags: true,
36323 asm: s390x.AXORW,
36324 reg: regInfo{
36325 inputs: []inputInfo{
36326 {0, 23551},
36327 {1, 23551},
36328 },
36329 outputs: []outputInfo{
36330 {0, 23551},
36331 },
36332 },
36333 },
36334 {
36335 name: "XORconst",
36336 auxType: auxInt64,
36337 argLen: 1,
36338 resultInArg0: true,
36339 clobberFlags: true,
36340 asm: s390x.AXOR,
36341 reg: regInfo{
36342 inputs: []inputInfo{
36343 {0, 23551},
36344 },
36345 outputs: []outputInfo{
36346 {0, 23551},
36347 },
36348 },
36349 },
36350 {
36351 name: "XORWconst",
36352 auxType: auxInt32,
36353 argLen: 1,
36354 resultInArg0: true,
36355 clobberFlags: true,
36356 asm: s390x.AXORW,
36357 reg: regInfo{
36358 inputs: []inputInfo{
36359 {0, 23551},
36360 },
36361 outputs: []outputInfo{
36362 {0, 23551},
36363 },
36364 },
36365 },
36366 {
36367 name: "XORload",
36368 auxType: auxSymOff,
36369 argLen: 3,
36370 resultInArg0: true,
36371 clobberFlags: true,
36372 faultOnNilArg1: true,
36373 symEffect: SymRead,
36374 asm: s390x.AXOR,
36375 reg: regInfo{
36376 inputs: []inputInfo{
36377 {0, 23551},
36378 {1, 56318},
36379 },
36380 outputs: []outputInfo{
36381 {0, 23551},
36382 },
36383 },
36384 },
36385 {
36386 name: "XORWload",
36387 auxType: auxSymOff,
36388 argLen: 3,
36389 resultInArg0: true,
36390 clobberFlags: true,
36391 faultOnNilArg1: true,
36392 symEffect: SymRead,
36393 asm: s390x.AXORW,
36394 reg: regInfo{
36395 inputs: []inputInfo{
36396 {0, 23551},
36397 {1, 56318},
36398 },
36399 outputs: []outputInfo{
36400 {0, 23551},
36401 },
36402 },
36403 },
36404 {
36405 name: "ADDC",
36406 argLen: 2,
36407 commutative: true,
36408 asm: s390x.AADDC,
36409 reg: regInfo{
36410 inputs: []inputInfo{
36411 {0, 23551},
36412 {1, 23551},
36413 },
36414 outputs: []outputInfo{
36415 {0, 23551},
36416 },
36417 },
36418 },
36419 {
36420 name: "ADDCconst",
36421 auxType: auxInt16,
36422 argLen: 1,
36423 asm: s390x.AADDC,
36424 reg: regInfo{
36425 inputs: []inputInfo{
36426 {0, 23551},
36427 },
36428 outputs: []outputInfo{
36429 {0, 23551},
36430 },
36431 },
36432 },
36433 {
36434 name: "ADDE",
36435 argLen: 3,
36436 commutative: true,
36437 resultInArg0: true,
36438 asm: s390x.AADDE,
36439 reg: regInfo{
36440 inputs: []inputInfo{
36441 {0, 23551},
36442 {1, 23551},
36443 },
36444 outputs: []outputInfo{
36445 {0, 23551},
36446 },
36447 },
36448 },
36449 {
36450 name: "SUBC",
36451 argLen: 2,
36452 asm: s390x.ASUBC,
36453 reg: regInfo{
36454 inputs: []inputInfo{
36455 {0, 23551},
36456 {1, 23551},
36457 },
36458 outputs: []outputInfo{
36459 {0, 23551},
36460 },
36461 },
36462 },
36463 {
36464 name: "SUBE",
36465 argLen: 3,
36466 resultInArg0: true,
36467 asm: s390x.ASUBE,
36468 reg: regInfo{
36469 inputs: []inputInfo{
36470 {0, 23551},
36471 {1, 23551},
36472 },
36473 outputs: []outputInfo{
36474 {0, 23551},
36475 },
36476 },
36477 },
36478 {
36479 name: "CMP",
36480 argLen: 2,
36481 asm: s390x.ACMP,
36482 reg: regInfo{
36483 inputs: []inputInfo{
36484 {0, 56319},
36485 {1, 56319},
36486 },
36487 },
36488 },
36489 {
36490 name: "CMPW",
36491 argLen: 2,
36492 asm: s390x.ACMPW,
36493 reg: regInfo{
36494 inputs: []inputInfo{
36495 {0, 56319},
36496 {1, 56319},
36497 },
36498 },
36499 },
36500 {
36501 name: "CMPU",
36502 argLen: 2,
36503 asm: s390x.ACMPU,
36504 reg: regInfo{
36505 inputs: []inputInfo{
36506 {0, 56319},
36507 {1, 56319},
36508 },
36509 },
36510 },
36511 {
36512 name: "CMPWU",
36513 argLen: 2,
36514 asm: s390x.ACMPWU,
36515 reg: regInfo{
36516 inputs: []inputInfo{
36517 {0, 56319},
36518 {1, 56319},
36519 },
36520 },
36521 },
36522 {
36523 name: "CMPconst",
36524 auxType: auxInt32,
36525 argLen: 1,
36526 asm: s390x.ACMP,
36527 reg: regInfo{
36528 inputs: []inputInfo{
36529 {0, 56319},
36530 },
36531 },
36532 },
36533 {
36534 name: "CMPWconst",
36535 auxType: auxInt32,
36536 argLen: 1,
36537 asm: s390x.ACMPW,
36538 reg: regInfo{
36539 inputs: []inputInfo{
36540 {0, 56319},
36541 },
36542 },
36543 },
36544 {
36545 name: "CMPUconst",
36546 auxType: auxInt32,
36547 argLen: 1,
36548 asm: s390x.ACMPU,
36549 reg: regInfo{
36550 inputs: []inputInfo{
36551 {0, 56319},
36552 },
36553 },
36554 },
36555 {
36556 name: "CMPWUconst",
36557 auxType: auxInt32,
36558 argLen: 1,
36559 asm: s390x.ACMPWU,
36560 reg: regInfo{
36561 inputs: []inputInfo{
36562 {0, 56319},
36563 },
36564 },
36565 },
36566 {
36567 name: "FCMPS",
36568 argLen: 2,
36569 asm: s390x.ACEBR,
36570 reg: regInfo{
36571 inputs: []inputInfo{
36572 {0, 4294901760},
36573 {1, 4294901760},
36574 },
36575 },
36576 },
36577 {
36578 name: "FCMP",
36579 argLen: 2,
36580 asm: s390x.AFCMPU,
36581 reg: regInfo{
36582 inputs: []inputInfo{
36583 {0, 4294901760},
36584 {1, 4294901760},
36585 },
36586 },
36587 },
36588 {
36589 name: "LTDBR",
36590 argLen: 1,
36591 asm: s390x.ALTDBR,
36592 reg: regInfo{
36593 inputs: []inputInfo{
36594 {0, 4294901760},
36595 },
36596 },
36597 },
36598 {
36599 name: "LTEBR",
36600 argLen: 1,
36601 asm: s390x.ALTEBR,
36602 reg: regInfo{
36603 inputs: []inputInfo{
36604 {0, 4294901760},
36605 },
36606 },
36607 },
36608 {
36609 name: "SLD",
36610 argLen: 2,
36611 asm: s390x.ASLD,
36612 reg: regInfo{
36613 inputs: []inputInfo{
36614 {1, 23550},
36615 {0, 23551},
36616 },
36617 outputs: []outputInfo{
36618 {0, 23551},
36619 },
36620 },
36621 },
36622 {
36623 name: "SLW",
36624 argLen: 2,
36625 asm: s390x.ASLW,
36626 reg: regInfo{
36627 inputs: []inputInfo{
36628 {1, 23550},
36629 {0, 23551},
36630 },
36631 outputs: []outputInfo{
36632 {0, 23551},
36633 },
36634 },
36635 },
36636 {
36637 name: "SLDconst",
36638 auxType: auxUInt8,
36639 argLen: 1,
36640 asm: s390x.ASLD,
36641 reg: regInfo{
36642 inputs: []inputInfo{
36643 {0, 23551},
36644 },
36645 outputs: []outputInfo{
36646 {0, 23551},
36647 },
36648 },
36649 },
36650 {
36651 name: "SLWconst",
36652 auxType: auxUInt8,
36653 argLen: 1,
36654 asm: s390x.ASLW,
36655 reg: regInfo{
36656 inputs: []inputInfo{
36657 {0, 23551},
36658 },
36659 outputs: []outputInfo{
36660 {0, 23551},
36661 },
36662 },
36663 },
36664 {
36665 name: "SRD",
36666 argLen: 2,
36667 asm: s390x.ASRD,
36668 reg: regInfo{
36669 inputs: []inputInfo{
36670 {1, 23550},
36671 {0, 23551},
36672 },
36673 outputs: []outputInfo{
36674 {0, 23551},
36675 },
36676 },
36677 },
36678 {
36679 name: "SRW",
36680 argLen: 2,
36681 asm: s390x.ASRW,
36682 reg: regInfo{
36683 inputs: []inputInfo{
36684 {1, 23550},
36685 {0, 23551},
36686 },
36687 outputs: []outputInfo{
36688 {0, 23551},
36689 },
36690 },
36691 },
36692 {
36693 name: "SRDconst",
36694 auxType: auxUInt8,
36695 argLen: 1,
36696 asm: s390x.ASRD,
36697 reg: regInfo{
36698 inputs: []inputInfo{
36699 {0, 23551},
36700 },
36701 outputs: []outputInfo{
36702 {0, 23551},
36703 },
36704 },
36705 },
36706 {
36707 name: "SRWconst",
36708 auxType: auxUInt8,
36709 argLen: 1,
36710 asm: s390x.ASRW,
36711 reg: regInfo{
36712 inputs: []inputInfo{
36713 {0, 23551},
36714 },
36715 outputs: []outputInfo{
36716 {0, 23551},
36717 },
36718 },
36719 },
36720 {
36721 name: "SRAD",
36722 argLen: 2,
36723 clobberFlags: true,
36724 asm: s390x.ASRAD,
36725 reg: regInfo{
36726 inputs: []inputInfo{
36727 {1, 23550},
36728 {0, 23551},
36729 },
36730 outputs: []outputInfo{
36731 {0, 23551},
36732 },
36733 },
36734 },
36735 {
36736 name: "SRAW",
36737 argLen: 2,
36738 clobberFlags: true,
36739 asm: s390x.ASRAW,
36740 reg: regInfo{
36741 inputs: []inputInfo{
36742 {1, 23550},
36743 {0, 23551},
36744 },
36745 outputs: []outputInfo{
36746 {0, 23551},
36747 },
36748 },
36749 },
36750 {
36751 name: "SRADconst",
36752 auxType: auxUInt8,
36753 argLen: 1,
36754 clobberFlags: true,
36755 asm: s390x.ASRAD,
36756 reg: regInfo{
36757 inputs: []inputInfo{
36758 {0, 23551},
36759 },
36760 outputs: []outputInfo{
36761 {0, 23551},
36762 },
36763 },
36764 },
36765 {
36766 name: "SRAWconst",
36767 auxType: auxUInt8,
36768 argLen: 1,
36769 clobberFlags: true,
36770 asm: s390x.ASRAW,
36771 reg: regInfo{
36772 inputs: []inputInfo{
36773 {0, 23551},
36774 },
36775 outputs: []outputInfo{
36776 {0, 23551},
36777 },
36778 },
36779 },
36780 {
36781 name: "RLLG",
36782 argLen: 2,
36783 asm: s390x.ARLLG,
36784 reg: regInfo{
36785 inputs: []inputInfo{
36786 {1, 23550},
36787 {0, 23551},
36788 },
36789 outputs: []outputInfo{
36790 {0, 23551},
36791 },
36792 },
36793 },
36794 {
36795 name: "RLL",
36796 argLen: 2,
36797 asm: s390x.ARLL,
36798 reg: regInfo{
36799 inputs: []inputInfo{
36800 {1, 23550},
36801 {0, 23551},
36802 },
36803 outputs: []outputInfo{
36804 {0, 23551},
36805 },
36806 },
36807 },
36808 {
36809 name: "RLLconst",
36810 auxType: auxUInt8,
36811 argLen: 1,
36812 asm: s390x.ARLL,
36813 reg: regInfo{
36814 inputs: []inputInfo{
36815 {0, 23551},
36816 },
36817 outputs: []outputInfo{
36818 {0, 23551},
36819 },
36820 },
36821 },
36822 {
36823 name: "RXSBG",
36824 auxType: auxS390XRotateParams,
36825 argLen: 2,
36826 resultInArg0: true,
36827 clobberFlags: true,
36828 asm: s390x.ARXSBG,
36829 reg: regInfo{
36830 inputs: []inputInfo{
36831 {0, 23551},
36832 {1, 23551},
36833 },
36834 outputs: []outputInfo{
36835 {0, 23551},
36836 },
36837 },
36838 },
36839 {
36840 name: "RISBGZ",
36841 auxType: auxS390XRotateParams,
36842 argLen: 1,
36843 clobberFlags: true,
36844 asm: s390x.ARISBGZ,
36845 reg: regInfo{
36846 inputs: []inputInfo{
36847 {0, 23551},
36848 },
36849 outputs: []outputInfo{
36850 {0, 23551},
36851 },
36852 },
36853 },
36854 {
36855 name: "NEG",
36856 argLen: 1,
36857 clobberFlags: true,
36858 asm: s390x.ANEG,
36859 reg: regInfo{
36860 inputs: []inputInfo{
36861 {0, 23551},
36862 },
36863 outputs: []outputInfo{
36864 {0, 23551},
36865 },
36866 },
36867 },
36868 {
36869 name: "NEGW",
36870 argLen: 1,
36871 clobberFlags: true,
36872 asm: s390x.ANEGW,
36873 reg: regInfo{
36874 inputs: []inputInfo{
36875 {0, 23551},
36876 },
36877 outputs: []outputInfo{
36878 {0, 23551},
36879 },
36880 },
36881 },
36882 {
36883 name: "NOT",
36884 argLen: 1,
36885 resultInArg0: true,
36886 clobberFlags: true,
36887 reg: regInfo{
36888 inputs: []inputInfo{
36889 {0, 23551},
36890 },
36891 outputs: []outputInfo{
36892 {0, 23551},
36893 },
36894 },
36895 },
36896 {
36897 name: "NOTW",
36898 argLen: 1,
36899 resultInArg0: true,
36900 clobberFlags: true,
36901 reg: regInfo{
36902 inputs: []inputInfo{
36903 {0, 23551},
36904 },
36905 outputs: []outputInfo{
36906 {0, 23551},
36907 },
36908 },
36909 },
36910 {
36911 name: "FSQRT",
36912 argLen: 1,
36913 asm: s390x.AFSQRT,
36914 reg: regInfo{
36915 inputs: []inputInfo{
36916 {0, 4294901760},
36917 },
36918 outputs: []outputInfo{
36919 {0, 4294901760},
36920 },
36921 },
36922 },
36923 {
36924 name: "FSQRTS",
36925 argLen: 1,
36926 asm: s390x.AFSQRTS,
36927 reg: regInfo{
36928 inputs: []inputInfo{
36929 {0, 4294901760},
36930 },
36931 outputs: []outputInfo{
36932 {0, 4294901760},
36933 },
36934 },
36935 },
36936 {
36937 name: "LOCGR",
36938 auxType: auxS390XCCMask,
36939 argLen: 3,
36940 resultInArg0: true,
36941 asm: s390x.ALOCGR,
36942 reg: regInfo{
36943 inputs: []inputInfo{
36944 {0, 23551},
36945 {1, 23551},
36946 },
36947 outputs: []outputInfo{
36948 {0, 23551},
36949 },
36950 },
36951 },
36952 {
36953 name: "MOVBreg",
36954 argLen: 1,
36955 asm: s390x.AMOVB,
36956 reg: regInfo{
36957 inputs: []inputInfo{
36958 {0, 56319},
36959 },
36960 outputs: []outputInfo{
36961 {0, 23551},
36962 },
36963 },
36964 },
36965 {
36966 name: "MOVBZreg",
36967 argLen: 1,
36968 asm: s390x.AMOVBZ,
36969 reg: regInfo{
36970 inputs: []inputInfo{
36971 {0, 56319},
36972 },
36973 outputs: []outputInfo{
36974 {0, 23551},
36975 },
36976 },
36977 },
36978 {
36979 name: "MOVHreg",
36980 argLen: 1,
36981 asm: s390x.AMOVH,
36982 reg: regInfo{
36983 inputs: []inputInfo{
36984 {0, 56319},
36985 },
36986 outputs: []outputInfo{
36987 {0, 23551},
36988 },
36989 },
36990 },
36991 {
36992 name: "MOVHZreg",
36993 argLen: 1,
36994 asm: s390x.AMOVHZ,
36995 reg: regInfo{
36996 inputs: []inputInfo{
36997 {0, 56319},
36998 },
36999 outputs: []outputInfo{
37000 {0, 23551},
37001 },
37002 },
37003 },
37004 {
37005 name: "MOVWreg",
37006 argLen: 1,
37007 asm: s390x.AMOVW,
37008 reg: regInfo{
37009 inputs: []inputInfo{
37010 {0, 56319},
37011 },
37012 outputs: []outputInfo{
37013 {0, 23551},
37014 },
37015 },
37016 },
37017 {
37018 name: "MOVWZreg",
37019 argLen: 1,
37020 asm: s390x.AMOVWZ,
37021 reg: regInfo{
37022 inputs: []inputInfo{
37023 {0, 56319},
37024 },
37025 outputs: []outputInfo{
37026 {0, 23551},
37027 },
37028 },
37029 },
37030 {
37031 name: "MOVDconst",
37032 auxType: auxInt64,
37033 argLen: 0,
37034 rematerializeable: true,
37035 asm: s390x.AMOVD,
37036 reg: regInfo{
37037 outputs: []outputInfo{
37038 {0, 23551},
37039 },
37040 },
37041 },
37042 {
37043 name: "LDGR",
37044 argLen: 1,
37045 asm: s390x.ALDGR,
37046 reg: regInfo{
37047 inputs: []inputInfo{
37048 {0, 23551},
37049 },
37050 outputs: []outputInfo{
37051 {0, 4294901760},
37052 },
37053 },
37054 },
37055 {
37056 name: "LGDR",
37057 argLen: 1,
37058 asm: s390x.ALGDR,
37059 reg: regInfo{
37060 inputs: []inputInfo{
37061 {0, 4294901760},
37062 },
37063 outputs: []outputInfo{
37064 {0, 23551},
37065 },
37066 },
37067 },
37068 {
37069 name: "CFDBRA",
37070 argLen: 1,
37071 clobberFlags: true,
37072 asm: s390x.ACFDBRA,
37073 reg: regInfo{
37074 inputs: []inputInfo{
37075 {0, 4294901760},
37076 },
37077 outputs: []outputInfo{
37078 {0, 23551},
37079 },
37080 },
37081 },
37082 {
37083 name: "CGDBRA",
37084 argLen: 1,
37085 clobberFlags: true,
37086 asm: s390x.ACGDBRA,
37087 reg: regInfo{
37088 inputs: []inputInfo{
37089 {0, 4294901760},
37090 },
37091 outputs: []outputInfo{
37092 {0, 23551},
37093 },
37094 },
37095 },
37096 {
37097 name: "CFEBRA",
37098 argLen: 1,
37099 clobberFlags: true,
37100 asm: s390x.ACFEBRA,
37101 reg: regInfo{
37102 inputs: []inputInfo{
37103 {0, 4294901760},
37104 },
37105 outputs: []outputInfo{
37106 {0, 23551},
37107 },
37108 },
37109 },
37110 {
37111 name: "CGEBRA",
37112 argLen: 1,
37113 clobberFlags: true,
37114 asm: s390x.ACGEBRA,
37115 reg: regInfo{
37116 inputs: []inputInfo{
37117 {0, 4294901760},
37118 },
37119 outputs: []outputInfo{
37120 {0, 23551},
37121 },
37122 },
37123 },
37124 {
37125 name: "CEFBRA",
37126 argLen: 1,
37127 clobberFlags: true,
37128 asm: s390x.ACEFBRA,
37129 reg: regInfo{
37130 inputs: []inputInfo{
37131 {0, 23551},
37132 },
37133 outputs: []outputInfo{
37134 {0, 4294901760},
37135 },
37136 },
37137 },
37138 {
37139 name: "CDFBRA",
37140 argLen: 1,
37141 clobberFlags: true,
37142 asm: s390x.ACDFBRA,
37143 reg: regInfo{
37144 inputs: []inputInfo{
37145 {0, 23551},
37146 },
37147 outputs: []outputInfo{
37148 {0, 4294901760},
37149 },
37150 },
37151 },
37152 {
37153 name: "CEGBRA",
37154 argLen: 1,
37155 clobberFlags: true,
37156 asm: s390x.ACEGBRA,
37157 reg: regInfo{
37158 inputs: []inputInfo{
37159 {0, 23551},
37160 },
37161 outputs: []outputInfo{
37162 {0, 4294901760},
37163 },
37164 },
37165 },
37166 {
37167 name: "CDGBRA",
37168 argLen: 1,
37169 clobberFlags: true,
37170 asm: s390x.ACDGBRA,
37171 reg: regInfo{
37172 inputs: []inputInfo{
37173 {0, 23551},
37174 },
37175 outputs: []outputInfo{
37176 {0, 4294901760},
37177 },
37178 },
37179 },
37180 {
37181 name: "CLFEBR",
37182 argLen: 1,
37183 clobberFlags: true,
37184 asm: s390x.ACLFEBR,
37185 reg: regInfo{
37186 inputs: []inputInfo{
37187 {0, 4294901760},
37188 },
37189 outputs: []outputInfo{
37190 {0, 23551},
37191 },
37192 },
37193 },
37194 {
37195 name: "CLFDBR",
37196 argLen: 1,
37197 clobberFlags: true,
37198 asm: s390x.ACLFDBR,
37199 reg: regInfo{
37200 inputs: []inputInfo{
37201 {0, 4294901760},
37202 },
37203 outputs: []outputInfo{
37204 {0, 23551},
37205 },
37206 },
37207 },
37208 {
37209 name: "CLGEBR",
37210 argLen: 1,
37211 clobberFlags: true,
37212 asm: s390x.ACLGEBR,
37213 reg: regInfo{
37214 inputs: []inputInfo{
37215 {0, 4294901760},
37216 },
37217 outputs: []outputInfo{
37218 {0, 23551},
37219 },
37220 },
37221 },
37222 {
37223 name: "CLGDBR",
37224 argLen: 1,
37225 clobberFlags: true,
37226 asm: s390x.ACLGDBR,
37227 reg: regInfo{
37228 inputs: []inputInfo{
37229 {0, 4294901760},
37230 },
37231 outputs: []outputInfo{
37232 {0, 23551},
37233 },
37234 },
37235 },
37236 {
37237 name: "CELFBR",
37238 argLen: 1,
37239 clobberFlags: true,
37240 asm: s390x.ACELFBR,
37241 reg: regInfo{
37242 inputs: []inputInfo{
37243 {0, 23551},
37244 },
37245 outputs: []outputInfo{
37246 {0, 4294901760},
37247 },
37248 },
37249 },
37250 {
37251 name: "CDLFBR",
37252 argLen: 1,
37253 clobberFlags: true,
37254 asm: s390x.ACDLFBR,
37255 reg: regInfo{
37256 inputs: []inputInfo{
37257 {0, 23551},
37258 },
37259 outputs: []outputInfo{
37260 {0, 4294901760},
37261 },
37262 },
37263 },
37264 {
37265 name: "CELGBR",
37266 argLen: 1,
37267 clobberFlags: true,
37268 asm: s390x.ACELGBR,
37269 reg: regInfo{
37270 inputs: []inputInfo{
37271 {0, 23551},
37272 },
37273 outputs: []outputInfo{
37274 {0, 4294901760},
37275 },
37276 },
37277 },
37278 {
37279 name: "CDLGBR",
37280 argLen: 1,
37281 clobberFlags: true,
37282 asm: s390x.ACDLGBR,
37283 reg: regInfo{
37284 inputs: []inputInfo{
37285 {0, 23551},
37286 },
37287 outputs: []outputInfo{
37288 {0, 4294901760},
37289 },
37290 },
37291 },
37292 {
37293 name: "LEDBR",
37294 argLen: 1,
37295 asm: s390x.ALEDBR,
37296 reg: regInfo{
37297 inputs: []inputInfo{
37298 {0, 4294901760},
37299 },
37300 outputs: []outputInfo{
37301 {0, 4294901760},
37302 },
37303 },
37304 },
37305 {
37306 name: "LDEBR",
37307 argLen: 1,
37308 asm: s390x.ALDEBR,
37309 reg: regInfo{
37310 inputs: []inputInfo{
37311 {0, 4294901760},
37312 },
37313 outputs: []outputInfo{
37314 {0, 4294901760},
37315 },
37316 },
37317 },
37318 {
37319 name: "MOVDaddr",
37320 auxType: auxSymOff,
37321 argLen: 1,
37322 rematerializeable: true,
37323 symEffect: SymAddr,
37324 reg: regInfo{
37325 inputs: []inputInfo{
37326 {0, 4295000064},
37327 },
37328 outputs: []outputInfo{
37329 {0, 23551},
37330 },
37331 },
37332 },
37333 {
37334 name: "MOVDaddridx",
37335 auxType: auxSymOff,
37336 argLen: 2,
37337 symEffect: SymAddr,
37338 reg: regInfo{
37339 inputs: []inputInfo{
37340 {0, 4295000064},
37341 {1, 56318},
37342 },
37343 outputs: []outputInfo{
37344 {0, 23551},
37345 },
37346 },
37347 },
37348 {
37349 name: "MOVBZload",
37350 auxType: auxSymOff,
37351 argLen: 2,
37352 faultOnNilArg0: true,
37353 symEffect: SymRead,
37354 asm: s390x.AMOVBZ,
37355 reg: regInfo{
37356 inputs: []inputInfo{
37357 {0, 4295023614},
37358 },
37359 outputs: []outputInfo{
37360 {0, 23551},
37361 },
37362 },
37363 },
37364 {
37365 name: "MOVBload",
37366 auxType: auxSymOff,
37367 argLen: 2,
37368 faultOnNilArg0: true,
37369 symEffect: SymRead,
37370 asm: s390x.AMOVB,
37371 reg: regInfo{
37372 inputs: []inputInfo{
37373 {0, 4295023614},
37374 },
37375 outputs: []outputInfo{
37376 {0, 23551},
37377 },
37378 },
37379 },
37380 {
37381 name: "MOVHZload",
37382 auxType: auxSymOff,
37383 argLen: 2,
37384 faultOnNilArg0: true,
37385 symEffect: SymRead,
37386 asm: s390x.AMOVHZ,
37387 reg: regInfo{
37388 inputs: []inputInfo{
37389 {0, 4295023614},
37390 },
37391 outputs: []outputInfo{
37392 {0, 23551},
37393 },
37394 },
37395 },
37396 {
37397 name: "MOVHload",
37398 auxType: auxSymOff,
37399 argLen: 2,
37400 faultOnNilArg0: true,
37401 symEffect: SymRead,
37402 asm: s390x.AMOVH,
37403 reg: regInfo{
37404 inputs: []inputInfo{
37405 {0, 4295023614},
37406 },
37407 outputs: []outputInfo{
37408 {0, 23551},
37409 },
37410 },
37411 },
37412 {
37413 name: "MOVWZload",
37414 auxType: auxSymOff,
37415 argLen: 2,
37416 faultOnNilArg0: true,
37417 symEffect: SymRead,
37418 asm: s390x.AMOVWZ,
37419 reg: regInfo{
37420 inputs: []inputInfo{
37421 {0, 4295023614},
37422 },
37423 outputs: []outputInfo{
37424 {0, 23551},
37425 },
37426 },
37427 },
37428 {
37429 name: "MOVWload",
37430 auxType: auxSymOff,
37431 argLen: 2,
37432 faultOnNilArg0: true,
37433 symEffect: SymRead,
37434 asm: s390x.AMOVW,
37435 reg: regInfo{
37436 inputs: []inputInfo{
37437 {0, 4295023614},
37438 },
37439 outputs: []outputInfo{
37440 {0, 23551},
37441 },
37442 },
37443 },
37444 {
37445 name: "MOVDload",
37446 auxType: auxSymOff,
37447 argLen: 2,
37448 faultOnNilArg0: true,
37449 symEffect: SymRead,
37450 asm: s390x.AMOVD,
37451 reg: regInfo{
37452 inputs: []inputInfo{
37453 {0, 4295023614},
37454 },
37455 outputs: []outputInfo{
37456 {0, 23551},
37457 },
37458 },
37459 },
37460 {
37461 name: "MOVWBR",
37462 argLen: 1,
37463 asm: s390x.AMOVWBR,
37464 reg: regInfo{
37465 inputs: []inputInfo{
37466 {0, 23551},
37467 },
37468 outputs: []outputInfo{
37469 {0, 23551},
37470 },
37471 },
37472 },
37473 {
37474 name: "MOVDBR",
37475 argLen: 1,
37476 asm: s390x.AMOVDBR,
37477 reg: regInfo{
37478 inputs: []inputInfo{
37479 {0, 23551},
37480 },
37481 outputs: []outputInfo{
37482 {0, 23551},
37483 },
37484 },
37485 },
37486 {
37487 name: "MOVHBRload",
37488 auxType: auxSymOff,
37489 argLen: 2,
37490 faultOnNilArg0: true,
37491 symEffect: SymRead,
37492 asm: s390x.AMOVHBR,
37493 reg: regInfo{
37494 inputs: []inputInfo{
37495 {0, 4295023614},
37496 },
37497 outputs: []outputInfo{
37498 {0, 23551},
37499 },
37500 },
37501 },
37502 {
37503 name: "MOVWBRload",
37504 auxType: auxSymOff,
37505 argLen: 2,
37506 faultOnNilArg0: true,
37507 symEffect: SymRead,
37508 asm: s390x.AMOVWBR,
37509 reg: regInfo{
37510 inputs: []inputInfo{
37511 {0, 4295023614},
37512 },
37513 outputs: []outputInfo{
37514 {0, 23551},
37515 },
37516 },
37517 },
37518 {
37519 name: "MOVDBRload",
37520 auxType: auxSymOff,
37521 argLen: 2,
37522 faultOnNilArg0: true,
37523 symEffect: SymRead,
37524 asm: s390x.AMOVDBR,
37525 reg: regInfo{
37526 inputs: []inputInfo{
37527 {0, 4295023614},
37528 },
37529 outputs: []outputInfo{
37530 {0, 23551},
37531 },
37532 },
37533 },
37534 {
37535 name: "MOVBstore",
37536 auxType: auxSymOff,
37537 argLen: 3,
37538 faultOnNilArg0: true,
37539 symEffect: SymWrite,
37540 asm: s390x.AMOVB,
37541 reg: regInfo{
37542 inputs: []inputInfo{
37543 {0, 4295023614},
37544 {1, 56319},
37545 },
37546 },
37547 },
37548 {
37549 name: "MOVHstore",
37550 auxType: auxSymOff,
37551 argLen: 3,
37552 faultOnNilArg0: true,
37553 symEffect: SymWrite,
37554 asm: s390x.AMOVH,
37555 reg: regInfo{
37556 inputs: []inputInfo{
37557 {0, 4295023614},
37558 {1, 56319},
37559 },
37560 },
37561 },
37562 {
37563 name: "MOVWstore",
37564 auxType: auxSymOff,
37565 argLen: 3,
37566 faultOnNilArg0: true,
37567 symEffect: SymWrite,
37568 asm: s390x.AMOVW,
37569 reg: regInfo{
37570 inputs: []inputInfo{
37571 {0, 4295023614},
37572 {1, 56319},
37573 },
37574 },
37575 },
37576 {
37577 name: "MOVDstore",
37578 auxType: auxSymOff,
37579 argLen: 3,
37580 faultOnNilArg0: true,
37581 symEffect: SymWrite,
37582 asm: s390x.AMOVD,
37583 reg: regInfo{
37584 inputs: []inputInfo{
37585 {0, 4295023614},
37586 {1, 56319},
37587 },
37588 },
37589 },
37590 {
37591 name: "MOVHBRstore",
37592 auxType: auxSymOff,
37593 argLen: 3,
37594 faultOnNilArg0: true,
37595 symEffect: SymWrite,
37596 asm: s390x.AMOVHBR,
37597 reg: regInfo{
37598 inputs: []inputInfo{
37599 {0, 56318},
37600 {1, 56319},
37601 },
37602 },
37603 },
37604 {
37605 name: "MOVWBRstore",
37606 auxType: auxSymOff,
37607 argLen: 3,
37608 faultOnNilArg0: true,
37609 symEffect: SymWrite,
37610 asm: s390x.AMOVWBR,
37611 reg: regInfo{
37612 inputs: []inputInfo{
37613 {0, 56318},
37614 {1, 56319},
37615 },
37616 },
37617 },
37618 {
37619 name: "MOVDBRstore",
37620 auxType: auxSymOff,
37621 argLen: 3,
37622 faultOnNilArg0: true,
37623 symEffect: SymWrite,
37624 asm: s390x.AMOVDBR,
37625 reg: regInfo{
37626 inputs: []inputInfo{
37627 {0, 56318},
37628 {1, 56319},
37629 },
37630 },
37631 },
37632 {
37633 name: "MVC",
37634 auxType: auxSymValAndOff,
37635 argLen: 3,
37636 clobberFlags: true,
37637 faultOnNilArg0: true,
37638 faultOnNilArg1: true,
37639 symEffect: SymNone,
37640 asm: s390x.AMVC,
37641 reg: regInfo{
37642 inputs: []inputInfo{
37643 {0, 56318},
37644 {1, 56318},
37645 },
37646 },
37647 },
37648 {
37649 name: "MOVBZloadidx",
37650 auxType: auxSymOff,
37651 argLen: 3,
37652 commutative: true,
37653 symEffect: SymRead,
37654 asm: s390x.AMOVBZ,
37655 reg: regInfo{
37656 inputs: []inputInfo{
37657 {1, 56318},
37658 {0, 4295023614},
37659 },
37660 outputs: []outputInfo{
37661 {0, 23551},
37662 },
37663 },
37664 },
37665 {
37666 name: "MOVBloadidx",
37667 auxType: auxSymOff,
37668 argLen: 3,
37669 commutative: true,
37670 symEffect: SymRead,
37671 asm: s390x.AMOVB,
37672 reg: regInfo{
37673 inputs: []inputInfo{
37674 {1, 56318},
37675 {0, 4295023614},
37676 },
37677 outputs: []outputInfo{
37678 {0, 23551},
37679 },
37680 },
37681 },
37682 {
37683 name: "MOVHZloadidx",
37684 auxType: auxSymOff,
37685 argLen: 3,
37686 commutative: true,
37687 symEffect: SymRead,
37688 asm: s390x.AMOVHZ,
37689 reg: regInfo{
37690 inputs: []inputInfo{
37691 {1, 56318},
37692 {0, 4295023614},
37693 },
37694 outputs: []outputInfo{
37695 {0, 23551},
37696 },
37697 },
37698 },
37699 {
37700 name: "MOVHloadidx",
37701 auxType: auxSymOff,
37702 argLen: 3,
37703 commutative: true,
37704 symEffect: SymRead,
37705 asm: s390x.AMOVH,
37706 reg: regInfo{
37707 inputs: []inputInfo{
37708 {1, 56318},
37709 {0, 4295023614},
37710 },
37711 outputs: []outputInfo{
37712 {0, 23551},
37713 },
37714 },
37715 },
37716 {
37717 name: "MOVWZloadidx",
37718 auxType: auxSymOff,
37719 argLen: 3,
37720 commutative: true,
37721 symEffect: SymRead,
37722 asm: s390x.AMOVWZ,
37723 reg: regInfo{
37724 inputs: []inputInfo{
37725 {1, 56318},
37726 {0, 4295023614},
37727 },
37728 outputs: []outputInfo{
37729 {0, 23551},
37730 },
37731 },
37732 },
37733 {
37734 name: "MOVWloadidx",
37735 auxType: auxSymOff,
37736 argLen: 3,
37737 commutative: true,
37738 symEffect: SymRead,
37739 asm: s390x.AMOVW,
37740 reg: regInfo{
37741 inputs: []inputInfo{
37742 {1, 56318},
37743 {0, 4295023614},
37744 },
37745 outputs: []outputInfo{
37746 {0, 23551},
37747 },
37748 },
37749 },
37750 {
37751 name: "MOVDloadidx",
37752 auxType: auxSymOff,
37753 argLen: 3,
37754 commutative: true,
37755 symEffect: SymRead,
37756 asm: s390x.AMOVD,
37757 reg: regInfo{
37758 inputs: []inputInfo{
37759 {1, 56318},
37760 {0, 4295023614},
37761 },
37762 outputs: []outputInfo{
37763 {0, 23551},
37764 },
37765 },
37766 },
37767 {
37768 name: "MOVHBRloadidx",
37769 auxType: auxSymOff,
37770 argLen: 3,
37771 commutative: true,
37772 symEffect: SymRead,
37773 asm: s390x.AMOVHBR,
37774 reg: regInfo{
37775 inputs: []inputInfo{
37776 {1, 56318},
37777 {0, 4295023614},
37778 },
37779 outputs: []outputInfo{
37780 {0, 23551},
37781 },
37782 },
37783 },
37784 {
37785 name: "MOVWBRloadidx",
37786 auxType: auxSymOff,
37787 argLen: 3,
37788 commutative: true,
37789 symEffect: SymRead,
37790 asm: s390x.AMOVWBR,
37791 reg: regInfo{
37792 inputs: []inputInfo{
37793 {1, 56318},
37794 {0, 4295023614},
37795 },
37796 outputs: []outputInfo{
37797 {0, 23551},
37798 },
37799 },
37800 },
37801 {
37802 name: "MOVDBRloadidx",
37803 auxType: auxSymOff,
37804 argLen: 3,
37805 commutative: true,
37806 symEffect: SymRead,
37807 asm: s390x.AMOVDBR,
37808 reg: regInfo{
37809 inputs: []inputInfo{
37810 {1, 56318},
37811 {0, 4295023614},
37812 },
37813 outputs: []outputInfo{
37814 {0, 23551},
37815 },
37816 },
37817 },
37818 {
37819 name: "MOVBstoreidx",
37820 auxType: auxSymOff,
37821 argLen: 4,
37822 commutative: true,
37823 symEffect: SymWrite,
37824 asm: s390x.AMOVB,
37825 reg: regInfo{
37826 inputs: []inputInfo{
37827 {0, 56318},
37828 {1, 56318},
37829 {2, 56319},
37830 },
37831 },
37832 },
37833 {
37834 name: "MOVHstoreidx",
37835 auxType: auxSymOff,
37836 argLen: 4,
37837 commutative: true,
37838 symEffect: SymWrite,
37839 asm: s390x.AMOVH,
37840 reg: regInfo{
37841 inputs: []inputInfo{
37842 {0, 56318},
37843 {1, 56318},
37844 {2, 56319},
37845 },
37846 },
37847 },
37848 {
37849 name: "MOVWstoreidx",
37850 auxType: auxSymOff,
37851 argLen: 4,
37852 commutative: true,
37853 symEffect: SymWrite,
37854 asm: s390x.AMOVW,
37855 reg: regInfo{
37856 inputs: []inputInfo{
37857 {0, 56318},
37858 {1, 56318},
37859 {2, 56319},
37860 },
37861 },
37862 },
37863 {
37864 name: "MOVDstoreidx",
37865 auxType: auxSymOff,
37866 argLen: 4,
37867 commutative: true,
37868 symEffect: SymWrite,
37869 asm: s390x.AMOVD,
37870 reg: regInfo{
37871 inputs: []inputInfo{
37872 {0, 56318},
37873 {1, 56318},
37874 {2, 56319},
37875 },
37876 },
37877 },
37878 {
37879 name: "MOVHBRstoreidx",
37880 auxType: auxSymOff,
37881 argLen: 4,
37882 commutative: true,
37883 symEffect: SymWrite,
37884 asm: s390x.AMOVHBR,
37885 reg: regInfo{
37886 inputs: []inputInfo{
37887 {0, 56318},
37888 {1, 56318},
37889 {2, 56319},
37890 },
37891 },
37892 },
37893 {
37894 name: "MOVWBRstoreidx",
37895 auxType: auxSymOff,
37896 argLen: 4,
37897 commutative: true,
37898 symEffect: SymWrite,
37899 asm: s390x.AMOVWBR,
37900 reg: regInfo{
37901 inputs: []inputInfo{
37902 {0, 56318},
37903 {1, 56318},
37904 {2, 56319},
37905 },
37906 },
37907 },
37908 {
37909 name: "MOVDBRstoreidx",
37910 auxType: auxSymOff,
37911 argLen: 4,
37912 commutative: true,
37913 symEffect: SymWrite,
37914 asm: s390x.AMOVDBR,
37915 reg: regInfo{
37916 inputs: []inputInfo{
37917 {0, 56318},
37918 {1, 56318},
37919 {2, 56319},
37920 },
37921 },
37922 },
37923 {
37924 name: "MOVBstoreconst",
37925 auxType: auxSymValAndOff,
37926 argLen: 2,
37927 faultOnNilArg0: true,
37928 symEffect: SymWrite,
37929 asm: s390x.AMOVB,
37930 reg: regInfo{
37931 inputs: []inputInfo{
37932 {0, 4295023614},
37933 },
37934 },
37935 },
37936 {
37937 name: "MOVHstoreconst",
37938 auxType: auxSymValAndOff,
37939 argLen: 2,
37940 faultOnNilArg0: true,
37941 symEffect: SymWrite,
37942 asm: s390x.AMOVH,
37943 reg: regInfo{
37944 inputs: []inputInfo{
37945 {0, 4295023614},
37946 },
37947 },
37948 },
37949 {
37950 name: "MOVWstoreconst",
37951 auxType: auxSymValAndOff,
37952 argLen: 2,
37953 faultOnNilArg0: true,
37954 symEffect: SymWrite,
37955 asm: s390x.AMOVW,
37956 reg: regInfo{
37957 inputs: []inputInfo{
37958 {0, 4295023614},
37959 },
37960 },
37961 },
37962 {
37963 name: "MOVDstoreconst",
37964 auxType: auxSymValAndOff,
37965 argLen: 2,
37966 faultOnNilArg0: true,
37967 symEffect: SymWrite,
37968 asm: s390x.AMOVD,
37969 reg: regInfo{
37970 inputs: []inputInfo{
37971 {0, 4295023614},
37972 },
37973 },
37974 },
37975 {
37976 name: "CLEAR",
37977 auxType: auxSymValAndOff,
37978 argLen: 2,
37979 clobberFlags: true,
37980 faultOnNilArg0: true,
37981 symEffect: SymWrite,
37982 asm: s390x.ACLEAR,
37983 reg: regInfo{
37984 inputs: []inputInfo{
37985 {0, 23550},
37986 },
37987 },
37988 },
37989 {
37990 name: "CALLstatic",
37991 auxType: auxCallOff,
37992 argLen: 1,
37993 clobberFlags: true,
37994 call: true,
37995 reg: regInfo{
37996 clobbers: 4294933503,
37997 },
37998 },
37999 {
38000 name: "CALLtail",
38001 auxType: auxCallOff,
38002 argLen: 1,
38003 clobberFlags: true,
38004 call: true,
38005 tailCall: true,
38006 reg: regInfo{
38007 clobbers: 4294933503,
38008 },
38009 },
38010 {
38011 name: "CALLclosure",
38012 auxType: auxCallOff,
38013 argLen: 3,
38014 clobberFlags: true,
38015 call: true,
38016 reg: regInfo{
38017 inputs: []inputInfo{
38018 {1, 4096},
38019 {0, 56318},
38020 },
38021 clobbers: 4294933503,
38022 },
38023 },
38024 {
38025 name: "CALLinter",
38026 auxType: auxCallOff,
38027 argLen: 2,
38028 clobberFlags: true,
38029 call: true,
38030 reg: regInfo{
38031 inputs: []inputInfo{
38032 {0, 23550},
38033 },
38034 clobbers: 4294933503,
38035 },
38036 },
38037 {
38038 name: "InvertFlags",
38039 argLen: 1,
38040 reg: regInfo{},
38041 },
38042 {
38043 name: "LoweredGetG",
38044 argLen: 1,
38045 reg: regInfo{
38046 outputs: []outputInfo{
38047 {0, 23551},
38048 },
38049 },
38050 },
38051 {
38052 name: "LoweredGetClosurePtr",
38053 argLen: 0,
38054 zeroWidth: true,
38055 reg: regInfo{
38056 outputs: []outputInfo{
38057 {0, 4096},
38058 },
38059 },
38060 },
38061 {
38062 name: "LoweredGetCallerSP",
38063 argLen: 1,
38064 rematerializeable: true,
38065 reg: regInfo{
38066 outputs: []outputInfo{
38067 {0, 23551},
38068 },
38069 },
38070 },
38071 {
38072 name: "LoweredGetCallerPC",
38073 argLen: 0,
38074 rematerializeable: true,
38075 reg: regInfo{
38076 outputs: []outputInfo{
38077 {0, 23551},
38078 },
38079 },
38080 },
38081 {
38082 name: "LoweredNilCheck",
38083 argLen: 2,
38084 clobberFlags: true,
38085 nilCheck: true,
38086 faultOnNilArg0: true,
38087 reg: regInfo{
38088 inputs: []inputInfo{
38089 {0, 56318},
38090 },
38091 },
38092 },
38093 {
38094 name: "LoweredRound32F",
38095 argLen: 1,
38096 resultInArg0: true,
38097 zeroWidth: true,
38098 reg: regInfo{
38099 inputs: []inputInfo{
38100 {0, 4294901760},
38101 },
38102 outputs: []outputInfo{
38103 {0, 4294901760},
38104 },
38105 },
38106 },
38107 {
38108 name: "LoweredRound64F",
38109 argLen: 1,
38110 resultInArg0: true,
38111 zeroWidth: true,
38112 reg: regInfo{
38113 inputs: []inputInfo{
38114 {0, 4294901760},
38115 },
38116 outputs: []outputInfo{
38117 {0, 4294901760},
38118 },
38119 },
38120 },
38121 {
38122 name: "LoweredWB",
38123 auxType: auxInt64,
38124 argLen: 1,
38125 clobberFlags: true,
38126 reg: regInfo{
38127 clobbers: 4294918146,
38128 outputs: []outputInfo{
38129 {0, 512},
38130 },
38131 },
38132 },
38133 {
38134 name: "LoweredPanicBoundsA",
38135 auxType: auxInt64,
38136 argLen: 3,
38137 call: true,
38138 reg: regInfo{
38139 inputs: []inputInfo{
38140 {0, 4},
38141 {1, 8},
38142 },
38143 },
38144 },
38145 {
38146 name: "LoweredPanicBoundsB",
38147 auxType: auxInt64,
38148 argLen: 3,
38149 call: true,
38150 reg: regInfo{
38151 inputs: []inputInfo{
38152 {0, 2},
38153 {1, 4},
38154 },
38155 },
38156 },
38157 {
38158 name: "LoweredPanicBoundsC",
38159 auxType: auxInt64,
38160 argLen: 3,
38161 call: true,
38162 reg: regInfo{
38163 inputs: []inputInfo{
38164 {0, 1},
38165 {1, 2},
38166 },
38167 },
38168 },
38169 {
38170 name: "FlagEQ",
38171 argLen: 0,
38172 reg: regInfo{},
38173 },
38174 {
38175 name: "FlagLT",
38176 argLen: 0,
38177 reg: regInfo{},
38178 },
38179 {
38180 name: "FlagGT",
38181 argLen: 0,
38182 reg: regInfo{},
38183 },
38184 {
38185 name: "FlagOV",
38186 argLen: 0,
38187 reg: regInfo{},
38188 },
38189 {
38190 name: "SYNC",
38191 argLen: 1,
38192 asm: s390x.ASYNC,
38193 reg: regInfo{},
38194 },
38195 {
38196 name: "MOVBZatomicload",
38197 auxType: auxSymOff,
38198 argLen: 2,
38199 faultOnNilArg0: true,
38200 symEffect: SymRead,
38201 asm: s390x.AMOVBZ,
38202 reg: regInfo{
38203 inputs: []inputInfo{
38204 {0, 4295023614},
38205 },
38206 outputs: []outputInfo{
38207 {0, 23551},
38208 },
38209 },
38210 },
38211 {
38212 name: "MOVWZatomicload",
38213 auxType: auxSymOff,
38214 argLen: 2,
38215 faultOnNilArg0: true,
38216 symEffect: SymRead,
38217 asm: s390x.AMOVWZ,
38218 reg: regInfo{
38219 inputs: []inputInfo{
38220 {0, 4295023614},
38221 },
38222 outputs: []outputInfo{
38223 {0, 23551},
38224 },
38225 },
38226 },
38227 {
38228 name: "MOVDatomicload",
38229 auxType: auxSymOff,
38230 argLen: 2,
38231 faultOnNilArg0: true,
38232 symEffect: SymRead,
38233 asm: s390x.AMOVD,
38234 reg: regInfo{
38235 inputs: []inputInfo{
38236 {0, 4295023614},
38237 },
38238 outputs: []outputInfo{
38239 {0, 23551},
38240 },
38241 },
38242 },
38243 {
38244 name: "MOVBatomicstore",
38245 auxType: auxSymOff,
38246 argLen: 3,
38247 clobberFlags: true,
38248 faultOnNilArg0: true,
38249 hasSideEffects: true,
38250 symEffect: SymWrite,
38251 asm: s390x.AMOVB,
38252 reg: regInfo{
38253 inputs: []inputInfo{
38254 {0, 4295023614},
38255 {1, 56319},
38256 },
38257 },
38258 },
38259 {
38260 name: "MOVWatomicstore",
38261 auxType: auxSymOff,
38262 argLen: 3,
38263 clobberFlags: true,
38264 faultOnNilArg0: true,
38265 hasSideEffects: true,
38266 symEffect: SymWrite,
38267 asm: s390x.AMOVW,
38268 reg: regInfo{
38269 inputs: []inputInfo{
38270 {0, 4295023614},
38271 {1, 56319},
38272 },
38273 },
38274 },
38275 {
38276 name: "MOVDatomicstore",
38277 auxType: auxSymOff,
38278 argLen: 3,
38279 clobberFlags: true,
38280 faultOnNilArg0: true,
38281 hasSideEffects: true,
38282 symEffect: SymWrite,
38283 asm: s390x.AMOVD,
38284 reg: regInfo{
38285 inputs: []inputInfo{
38286 {0, 4295023614},
38287 {1, 56319},
38288 },
38289 },
38290 },
38291 {
38292 name: "LAA",
38293 auxType: auxSymOff,
38294 argLen: 3,
38295 clobberFlags: true,
38296 faultOnNilArg0: true,
38297 hasSideEffects: true,
38298 symEffect: SymRdWr,
38299 asm: s390x.ALAA,
38300 reg: regInfo{
38301 inputs: []inputInfo{
38302 {0, 4295023614},
38303 {1, 56319},
38304 },
38305 outputs: []outputInfo{
38306 {0, 23551},
38307 },
38308 },
38309 },
38310 {
38311 name: "LAAG",
38312 auxType: auxSymOff,
38313 argLen: 3,
38314 clobberFlags: true,
38315 faultOnNilArg0: true,
38316 hasSideEffects: true,
38317 symEffect: SymRdWr,
38318 asm: s390x.ALAAG,
38319 reg: regInfo{
38320 inputs: []inputInfo{
38321 {0, 4295023614},
38322 {1, 56319},
38323 },
38324 outputs: []outputInfo{
38325 {0, 23551},
38326 },
38327 },
38328 },
38329 {
38330 name: "AddTupleFirst32",
38331 argLen: 2,
38332 reg: regInfo{},
38333 },
38334 {
38335 name: "AddTupleFirst64",
38336 argLen: 2,
38337 reg: regInfo{},
38338 },
38339 {
38340 name: "LAN",
38341 argLen: 3,
38342 clobberFlags: true,
38343 hasSideEffects: true,
38344 asm: s390x.ALAN,
38345 reg: regInfo{
38346 inputs: []inputInfo{
38347 {0, 4295023614},
38348 {1, 56319},
38349 },
38350 },
38351 },
38352 {
38353 name: "LANfloor",
38354 argLen: 3,
38355 clobberFlags: true,
38356 hasSideEffects: true,
38357 asm: s390x.ALAN,
38358 reg: regInfo{
38359 inputs: []inputInfo{
38360 {0, 2},
38361 {1, 56319},
38362 },
38363 clobbers: 2,
38364 },
38365 },
38366 {
38367 name: "LAO",
38368 argLen: 3,
38369 clobberFlags: true,
38370 hasSideEffects: true,
38371 asm: s390x.ALAO,
38372 reg: regInfo{
38373 inputs: []inputInfo{
38374 {0, 4295023614},
38375 {1, 56319},
38376 },
38377 },
38378 },
38379 {
38380 name: "LAOfloor",
38381 argLen: 3,
38382 clobberFlags: true,
38383 hasSideEffects: true,
38384 asm: s390x.ALAO,
38385 reg: regInfo{
38386 inputs: []inputInfo{
38387 {0, 2},
38388 {1, 56319},
38389 },
38390 clobbers: 2,
38391 },
38392 },
38393 {
38394 name: "LoweredAtomicCas32",
38395 auxType: auxSymOff,
38396 argLen: 4,
38397 clobberFlags: true,
38398 faultOnNilArg0: true,
38399 hasSideEffects: true,
38400 symEffect: SymRdWr,
38401 asm: s390x.ACS,
38402 reg: regInfo{
38403 inputs: []inputInfo{
38404 {1, 1},
38405 {0, 56318},
38406 {2, 56319},
38407 },
38408 clobbers: 1,
38409 outputs: []outputInfo{
38410 {1, 0},
38411 {0, 23551},
38412 },
38413 },
38414 },
38415 {
38416 name: "LoweredAtomicCas64",
38417 auxType: auxSymOff,
38418 argLen: 4,
38419 clobberFlags: true,
38420 faultOnNilArg0: true,
38421 hasSideEffects: true,
38422 symEffect: SymRdWr,
38423 asm: s390x.ACSG,
38424 reg: regInfo{
38425 inputs: []inputInfo{
38426 {1, 1},
38427 {0, 56318},
38428 {2, 56319},
38429 },
38430 clobbers: 1,
38431 outputs: []outputInfo{
38432 {1, 0},
38433 {0, 23551},
38434 },
38435 },
38436 },
38437 {
38438 name: "LoweredAtomicExchange32",
38439 auxType: auxSymOff,
38440 argLen: 3,
38441 clobberFlags: true,
38442 faultOnNilArg0: true,
38443 hasSideEffects: true,
38444 symEffect: SymRdWr,
38445 asm: s390x.ACS,
38446 reg: regInfo{
38447 inputs: []inputInfo{
38448 {0, 56318},
38449 {1, 56318},
38450 },
38451 outputs: []outputInfo{
38452 {1, 0},
38453 {0, 1},
38454 },
38455 },
38456 },
38457 {
38458 name: "LoweredAtomicExchange64",
38459 auxType: auxSymOff,
38460 argLen: 3,
38461 clobberFlags: true,
38462 faultOnNilArg0: true,
38463 hasSideEffects: true,
38464 symEffect: SymRdWr,
38465 asm: s390x.ACSG,
38466 reg: regInfo{
38467 inputs: []inputInfo{
38468 {0, 56318},
38469 {1, 56318},
38470 },
38471 outputs: []outputInfo{
38472 {1, 0},
38473 {0, 1},
38474 },
38475 },
38476 },
38477 {
38478 name: "FLOGR",
38479 argLen: 1,
38480 clobberFlags: true,
38481 asm: s390x.AFLOGR,
38482 reg: regInfo{
38483 inputs: []inputInfo{
38484 {0, 23551},
38485 },
38486 clobbers: 2,
38487 outputs: []outputInfo{
38488 {0, 1},
38489 },
38490 },
38491 },
38492 {
38493 name: "POPCNT",
38494 argLen: 1,
38495 clobberFlags: true,
38496 asm: s390x.APOPCNT,
38497 reg: regInfo{
38498 inputs: []inputInfo{
38499 {0, 23551},
38500 },
38501 outputs: []outputInfo{
38502 {0, 23551},
38503 },
38504 },
38505 },
38506 {
38507 name: "MLGR",
38508 argLen: 2,
38509 asm: s390x.AMLGR,
38510 reg: regInfo{
38511 inputs: []inputInfo{
38512 {1, 8},
38513 {0, 23551},
38514 },
38515 outputs: []outputInfo{
38516 {0, 4},
38517 {1, 8},
38518 },
38519 },
38520 },
38521 {
38522 name: "SumBytes2",
38523 argLen: 1,
38524 reg: regInfo{},
38525 },
38526 {
38527 name: "SumBytes4",
38528 argLen: 1,
38529 reg: regInfo{},
38530 },
38531 {
38532 name: "SumBytes8",
38533 argLen: 1,
38534 reg: regInfo{},
38535 },
38536 {
38537 name: "STMG2",
38538 auxType: auxSymOff,
38539 argLen: 4,
38540 clobberFlags: true,
38541 faultOnNilArg0: true,
38542 symEffect: SymWrite,
38543 asm: s390x.ASTMG,
38544 reg: regInfo{
38545 inputs: []inputInfo{
38546 {1, 2},
38547 {2, 4},
38548 {0, 56318},
38549 },
38550 },
38551 },
38552 {
38553 name: "STMG3",
38554 auxType: auxSymOff,
38555 argLen: 5,
38556 clobberFlags: true,
38557 faultOnNilArg0: true,
38558 symEffect: SymWrite,
38559 asm: s390x.ASTMG,
38560 reg: regInfo{
38561 inputs: []inputInfo{
38562 {1, 2},
38563 {2, 4},
38564 {3, 8},
38565 {0, 56318},
38566 },
38567 },
38568 },
38569 {
38570 name: "STMG4",
38571 auxType: auxSymOff,
38572 argLen: 6,
38573 clobberFlags: true,
38574 faultOnNilArg0: true,
38575 symEffect: SymWrite,
38576 asm: s390x.ASTMG,
38577 reg: regInfo{
38578 inputs: []inputInfo{
38579 {1, 2},
38580 {2, 4},
38581 {3, 8},
38582 {4, 16},
38583 {0, 56318},
38584 },
38585 },
38586 },
38587 {
38588 name: "STM2",
38589 auxType: auxSymOff,
38590 argLen: 4,
38591 clobberFlags: true,
38592 faultOnNilArg0: true,
38593 symEffect: SymWrite,
38594 asm: s390x.ASTMY,
38595 reg: regInfo{
38596 inputs: []inputInfo{
38597 {1, 2},
38598 {2, 4},
38599 {0, 56318},
38600 },
38601 },
38602 },
38603 {
38604 name: "STM3",
38605 auxType: auxSymOff,
38606 argLen: 5,
38607 clobberFlags: true,
38608 faultOnNilArg0: true,
38609 symEffect: SymWrite,
38610 asm: s390x.ASTMY,
38611 reg: regInfo{
38612 inputs: []inputInfo{
38613 {1, 2},
38614 {2, 4},
38615 {3, 8},
38616 {0, 56318},
38617 },
38618 },
38619 },
38620 {
38621 name: "STM4",
38622 auxType: auxSymOff,
38623 argLen: 6,
38624 clobberFlags: true,
38625 faultOnNilArg0: true,
38626 symEffect: SymWrite,
38627 asm: s390x.ASTMY,
38628 reg: regInfo{
38629 inputs: []inputInfo{
38630 {1, 2},
38631 {2, 4},
38632 {3, 8},
38633 {4, 16},
38634 {0, 56318},
38635 },
38636 },
38637 },
38638 {
38639 name: "LoweredMove",
38640 auxType: auxInt64,
38641 argLen: 4,
38642 clobberFlags: true,
38643 faultOnNilArg0: true,
38644 faultOnNilArg1: true,
38645 reg: regInfo{
38646 inputs: []inputInfo{
38647 {0, 2},
38648 {1, 4},
38649 {2, 56319},
38650 },
38651 clobbers: 6,
38652 },
38653 },
38654 {
38655 name: "LoweredZero",
38656 auxType: auxInt64,
38657 argLen: 3,
38658 clobberFlags: true,
38659 faultOnNilArg0: true,
38660 reg: regInfo{
38661 inputs: []inputInfo{
38662 {0, 2},
38663 {1, 56319},
38664 },
38665 clobbers: 2,
38666 },
38667 },
38668
38669 {
38670 name: "LoweredStaticCall",
38671 auxType: auxCallOff,
38672 argLen: 1,
38673 call: true,
38674 reg: regInfo{
38675 clobbers: 844424930131967,
38676 },
38677 },
38678 {
38679 name: "LoweredTailCall",
38680 auxType: auxCallOff,
38681 argLen: 1,
38682 call: true,
38683 tailCall: true,
38684 reg: regInfo{
38685 clobbers: 844424930131967,
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39593 inputs: []inputInfo{
39594 {0, 4294901760},
39595 {1, 4294901760},
39596 },
39597 outputs: []outputInfo{
39598 {0, 4294901760},
39599 },
39600 },
39601 },
39602 {
39603 name: "F32Sub",
39604 argLen: 2,
39605 asm: wasm.AF32Sub,
39606 reg: regInfo{
39607 inputs: []inputInfo{
39608 {0, 4294901760},
39609 {1, 4294901760},
39610 },
39611 outputs: []outputInfo{
39612 {0, 4294901760},
39613 },
39614 },
39615 },
39616 {
39617 name: "F32Mul",
39618 argLen: 2,
39619 asm: wasm.AF32Mul,
39620 reg: regInfo{
39621 inputs: []inputInfo{
39622 {0, 4294901760},
39623 {1, 4294901760},
39624 },
39625 outputs: []outputInfo{
39626 {0, 4294901760},
39627 },
39628 },
39629 },
39630 {
39631 name: "F32Div",
39632 argLen: 2,
39633 asm: wasm.AF32Div,
39634 reg: regInfo{
39635 inputs: []inputInfo{
39636 {0, 4294901760},
39637 {1, 4294901760},
39638 },
39639 outputs: []outputInfo{
39640 {0, 4294901760},
39641 },
39642 },
39643 },
39644 {
39645 name: "F64Neg",
39646 argLen: 1,
39647 asm: wasm.AF64Neg,
39648 reg: regInfo{
39649 inputs: []inputInfo{
39650 {0, 281470681743360},
39651 },
39652 outputs: []outputInfo{
39653 {0, 281470681743360},
39654 },
39655 },
39656 },
39657 {
39658 name: "F64Add",
39659 argLen: 2,
39660 asm: wasm.AF64Add,
39661 reg: regInfo{
39662 inputs: []inputInfo{
39663 {0, 281470681743360},
39664 {1, 281470681743360},
39665 },
39666 outputs: []outputInfo{
39667 {0, 281470681743360},
39668 },
39669 },
39670 },
39671 {
39672 name: "F64Sub",
39673 argLen: 2,
39674 asm: wasm.AF64Sub,
39675 reg: regInfo{
39676 inputs: []inputInfo{
39677 {0, 281470681743360},
39678 {1, 281470681743360},
39679 },
39680 outputs: []outputInfo{
39681 {0, 281470681743360},
39682 },
39683 },
39684 },
39685 {
39686 name: "F64Mul",
39687 argLen: 2,
39688 asm: wasm.AF64Mul,
39689 reg: regInfo{
39690 inputs: []inputInfo{
39691 {0, 281470681743360},
39692 {1, 281470681743360},
39693 },
39694 outputs: []outputInfo{
39695 {0, 281470681743360},
39696 },
39697 },
39698 },
39699 {
39700 name: "F64Div",
39701 argLen: 2,
39702 asm: wasm.AF64Div,
39703 reg: regInfo{
39704 inputs: []inputInfo{
39705 {0, 281470681743360},
39706 {1, 281470681743360},
39707 },
39708 outputs: []outputInfo{
39709 {0, 281470681743360},
39710 },
39711 },
39712 },
39713 {
39714 name: "I64TruncSatF64S",
39715 argLen: 1,
39716 asm: wasm.AI64TruncSatF64S,
39717 reg: regInfo{
39718 inputs: []inputInfo{
39719 {0, 281470681743360},
39720 },
39721 outputs: []outputInfo{
39722 {0, 65535},
39723 },
39724 },
39725 },
39726 {
39727 name: "I64TruncSatF64U",
39728 argLen: 1,
39729 asm: wasm.AI64TruncSatF64U,
39730 reg: regInfo{
39731 inputs: []inputInfo{
39732 {0, 281470681743360},
39733 },
39734 outputs: []outputInfo{
39735 {0, 65535},
39736 },
39737 },
39738 },
39739 {
39740 name: "I64TruncSatF32S",
39741 argLen: 1,
39742 asm: wasm.AI64TruncSatF32S,
39743 reg: regInfo{
39744 inputs: []inputInfo{
39745 {0, 4294901760},
39746 },
39747 outputs: []outputInfo{
39748 {0, 65535},
39749 },
39750 },
39751 },
39752 {
39753 name: "I64TruncSatF32U",
39754 argLen: 1,
39755 asm: wasm.AI64TruncSatF32U,
39756 reg: regInfo{
39757 inputs: []inputInfo{
39758 {0, 4294901760},
39759 },
39760 outputs: []outputInfo{
39761 {0, 65535},
39762 },
39763 },
39764 },
39765 {
39766 name: "F32ConvertI64S",
39767 argLen: 1,
39768 asm: wasm.AF32ConvertI64S,
39769 reg: regInfo{
39770 inputs: []inputInfo{
39771 {0, 65535},
39772 },
39773 outputs: []outputInfo{
39774 {0, 4294901760},
39775 },
39776 },
39777 },
39778 {
39779 name: "F32ConvertI64U",
39780 argLen: 1,
39781 asm: wasm.AF32ConvertI64U,
39782 reg: regInfo{
39783 inputs: []inputInfo{
39784 {0, 65535},
39785 },
39786 outputs: []outputInfo{
39787 {0, 4294901760},
39788 },
39789 },
39790 },
39791 {
39792 name: "F64ConvertI64S",
39793 argLen: 1,
39794 asm: wasm.AF64ConvertI64S,
39795 reg: regInfo{
39796 inputs: []inputInfo{
39797 {0, 65535},
39798 },
39799 outputs: []outputInfo{
39800 {0, 281470681743360},
39801 },
39802 },
39803 },
39804 {
39805 name: "F64ConvertI64U",
39806 argLen: 1,
39807 asm: wasm.AF64ConvertI64U,
39808 reg: regInfo{
39809 inputs: []inputInfo{
39810 {0, 65535},
39811 },
39812 outputs: []outputInfo{
39813 {0, 281470681743360},
39814 },
39815 },
39816 },
39817 {
39818 name: "F32DemoteF64",
39819 argLen: 1,
39820 asm: wasm.AF32DemoteF64,
39821 reg: regInfo{
39822 inputs: []inputInfo{
39823 {0, 281470681743360},
39824 },
39825 outputs: []outputInfo{
39826 {0, 4294901760},
39827 },
39828 },
39829 },
39830 {
39831 name: "F64PromoteF32",
39832 argLen: 1,
39833 asm: wasm.AF64PromoteF32,
39834 reg: regInfo{
39835 inputs: []inputInfo{
39836 {0, 4294901760},
39837 },
39838 outputs: []outputInfo{
39839 {0, 281470681743360},
39840 },
39841 },
39842 },
39843 {
39844 name: "I64Extend8S",
39845 argLen: 1,
39846 asm: wasm.AI64Extend8S,
39847 reg: regInfo{
39848 inputs: []inputInfo{
39849 {0, 281474976776191},
39850 },
39851 outputs: []outputInfo{
39852 {0, 65535},
39853 },
39854 },
39855 },
39856 {
39857 name: "I64Extend16S",
39858 argLen: 1,
39859 asm: wasm.AI64Extend16S,
39860 reg: regInfo{
39861 inputs: []inputInfo{
39862 {0, 281474976776191},
39863 },
39864 outputs: []outputInfo{
39865 {0, 65535},
39866 },
39867 },
39868 },
39869 {
39870 name: "I64Extend32S",
39871 argLen: 1,
39872 asm: wasm.AI64Extend32S,
39873 reg: regInfo{
39874 inputs: []inputInfo{
39875 {0, 281474976776191},
39876 },
39877 outputs: []outputInfo{
39878 {0, 65535},
39879 },
39880 },
39881 },
39882 {
39883 name: "F32Sqrt",
39884 argLen: 1,
39885 asm: wasm.AF32Sqrt,
39886 reg: regInfo{
39887 inputs: []inputInfo{
39888 {0, 4294901760},
39889 },
39890 outputs: []outputInfo{
39891 {0, 4294901760},
39892 },
39893 },
39894 },
39895 {
39896 name: "F32Trunc",
39897 argLen: 1,
39898 asm: wasm.AF32Trunc,
39899 reg: regInfo{
39900 inputs: []inputInfo{
39901 {0, 4294901760},
39902 },
39903 outputs: []outputInfo{
39904 {0, 4294901760},
39905 },
39906 },
39907 },
39908 {
39909 name: "F32Ceil",
39910 argLen: 1,
39911 asm: wasm.AF32Ceil,
39912 reg: regInfo{
39913 inputs: []inputInfo{
39914 {0, 4294901760},
39915 },
39916 outputs: []outputInfo{
39917 {0, 4294901760},
39918 },
39919 },
39920 },
39921 {
39922 name: "F32Floor",
39923 argLen: 1,
39924 asm: wasm.AF32Floor,
39925 reg: regInfo{
39926 inputs: []inputInfo{
39927 {0, 4294901760},
39928 },
39929 outputs: []outputInfo{
39930 {0, 4294901760},
39931 },
39932 },
39933 },
39934 {
39935 name: "F32Nearest",
39936 argLen: 1,
39937 asm: wasm.AF32Nearest,
39938 reg: regInfo{
39939 inputs: []inputInfo{
39940 {0, 4294901760},
39941 },
39942 outputs: []outputInfo{
39943 {0, 4294901760},
39944 },
39945 },
39946 },
39947 {
39948 name: "F32Abs",
39949 argLen: 1,
39950 asm: wasm.AF32Abs,
39951 reg: regInfo{
39952 inputs: []inputInfo{
39953 {0, 4294901760},
39954 },
39955 outputs: []outputInfo{
39956 {0, 4294901760},
39957 },
39958 },
39959 },
39960 {
39961 name: "F32Copysign",
39962 argLen: 2,
39963 asm: wasm.AF32Copysign,
39964 reg: regInfo{
39965 inputs: []inputInfo{
39966 {0, 4294901760},
39967 {1, 4294901760},
39968 },
39969 outputs: []outputInfo{
39970 {0, 4294901760},
39971 },
39972 },
39973 },
39974 {
39975 name: "F64Sqrt",
39976 argLen: 1,
39977 asm: wasm.AF64Sqrt,
39978 reg: regInfo{
39979 inputs: []inputInfo{
39980 {0, 281470681743360},
39981 },
39982 outputs: []outputInfo{
39983 {0, 281470681743360},
39984 },
39985 },
39986 },
39987 {
39988 name: "F64Trunc",
39989 argLen: 1,
39990 asm: wasm.AF64Trunc,
39991 reg: regInfo{
39992 inputs: []inputInfo{
39993 {0, 281470681743360},
39994 },
39995 outputs: []outputInfo{
39996 {0, 281470681743360},
39997 },
39998 },
39999 },
40000 {
40001 name: "F64Ceil",
40002 argLen: 1,
40003 asm: wasm.AF64Ceil,
40004 reg: regInfo{
40005 inputs: []inputInfo{
40006 {0, 281470681743360},
40007 },
40008 outputs: []outputInfo{
40009 {0, 281470681743360},
40010 },
40011 },
40012 },
40013 {
40014 name: "F64Floor",
40015 argLen: 1,
40016 asm: wasm.AF64Floor,
40017 reg: regInfo{
40018 inputs: []inputInfo{
40019 {0, 281470681743360},
40020 },
40021 outputs: []outputInfo{
40022 {0, 281470681743360},
40023 },
40024 },
40025 },
40026 {
40027 name: "F64Nearest",
40028 argLen: 1,
40029 asm: wasm.AF64Nearest,
40030 reg: regInfo{
40031 inputs: []inputInfo{
40032 {0, 281470681743360},
40033 },
40034 outputs: []outputInfo{
40035 {0, 281470681743360},
40036 },
40037 },
40038 },
40039 {
40040 name: "F64Abs",
40041 argLen: 1,
40042 asm: wasm.AF64Abs,
40043 reg: regInfo{
40044 inputs: []inputInfo{
40045 {0, 281470681743360},
40046 },
40047 outputs: []outputInfo{
40048 {0, 281470681743360},
40049 },
40050 },
40051 },
40052 {
40053 name: "F64Copysign",
40054 argLen: 2,
40055 asm: wasm.AF64Copysign,
40056 reg: regInfo{
40057 inputs: []inputInfo{
40058 {0, 281470681743360},
40059 {1, 281470681743360},
40060 },
40061 outputs: []outputInfo{
40062 {0, 281470681743360},
40063 },
40064 },
40065 },
40066 {
40067 name: "I64Ctz",
40068 argLen: 1,
40069 asm: wasm.AI64Ctz,
40070 reg: regInfo{
40071 inputs: []inputInfo{
40072 {0, 281474976776191},
40073 },
40074 outputs: []outputInfo{
40075 {0, 65535},
40076 },
40077 },
40078 },
40079 {
40080 name: "I64Clz",
40081 argLen: 1,
40082 asm: wasm.AI64Clz,
40083 reg: regInfo{
40084 inputs: []inputInfo{
40085 {0, 281474976776191},
40086 },
40087 outputs: []outputInfo{
40088 {0, 65535},
40089 },
40090 },
40091 },
40092 {
40093 name: "I32Rotl",
40094 argLen: 2,
40095 asm: wasm.AI32Rotl,
40096 reg: regInfo{
40097 inputs: []inputInfo{
40098 {0, 281474976776191},
40099 {1, 281474976776191},
40100 },
40101 outputs: []outputInfo{
40102 {0, 65535},
40103 },
40104 },
40105 },
40106 {
40107 name: "I64Rotl",
40108 argLen: 2,
40109 asm: wasm.AI64Rotl,
40110 reg: regInfo{
40111 inputs: []inputInfo{
40112 {0, 281474976776191},
40113 {1, 281474976776191},
40114 },
40115 outputs: []outputInfo{
40116 {0, 65535},
40117 },
40118 },
40119 },
40120 {
40121 name: "I64Popcnt",
40122 argLen: 1,
40123 asm: wasm.AI64Popcnt,
40124 reg: regInfo{
40125 inputs: []inputInfo{
40126 {0, 281474976776191},
40127 },
40128 outputs: []outputInfo{
40129 {0, 65535},
40130 },
40131 },
40132 },
40133
40134 {
40135 name: "Add8",
40136 argLen: 2,
40137 commutative: true,
40138 generic: true,
40139 },
40140 {
40141 name: "Add16",
40142 argLen: 2,
40143 commutative: true,
40144 generic: true,
40145 },
40146 {
40147 name: "Add32",
40148 argLen: 2,
40149 commutative: true,
40150 generic: true,
40151 },
40152 {
40153 name: "Add64",
40154 argLen: 2,
40155 commutative: true,
40156 generic: true,
40157 },
40158 {
40159 name: "AddPtr",
40160 argLen: 2,
40161 generic: true,
40162 },
40163 {
40164 name: "Add32F",
40165 argLen: 2,
40166 commutative: true,
40167 generic: true,
40168 },
40169 {
40170 name: "Add64F",
40171 argLen: 2,
40172 commutative: true,
40173 generic: true,
40174 },
40175 {
40176 name: "Sub8",
40177 argLen: 2,
40178 generic: true,
40179 },
40180 {
40181 name: "Sub16",
40182 argLen: 2,
40183 generic: true,
40184 },
40185 {
40186 name: "Sub32",
40187 argLen: 2,
40188 generic: true,
40189 },
40190 {
40191 name: "Sub64",
40192 argLen: 2,
40193 generic: true,
40194 },
40195 {
40196 name: "SubPtr",
40197 argLen: 2,
40198 generic: true,
40199 },
40200 {
40201 name: "Sub32F",
40202 argLen: 2,
40203 generic: true,
40204 },
40205 {
40206 name: "Sub64F",
40207 argLen: 2,
40208 generic: true,
40209 },
40210 {
40211 name: "Mul8",
40212 argLen: 2,
40213 commutative: true,
40214 generic: true,
40215 },
40216 {
40217 name: "Mul16",
40218 argLen: 2,
40219 commutative: true,
40220 generic: true,
40221 },
40222 {
40223 name: "Mul32",
40224 argLen: 2,
40225 commutative: true,
40226 generic: true,
40227 },
40228 {
40229 name: "Mul64",
40230 argLen: 2,
40231 commutative: true,
40232 generic: true,
40233 },
40234 {
40235 name: "Mul32F",
40236 argLen: 2,
40237 commutative: true,
40238 generic: true,
40239 },
40240 {
40241 name: "Mul64F",
40242 argLen: 2,
40243 commutative: true,
40244 generic: true,
40245 },
40246 {
40247 name: "Div32F",
40248 argLen: 2,
40249 generic: true,
40250 },
40251 {
40252 name: "Div64F",
40253 argLen: 2,
40254 generic: true,
40255 },
40256 {
40257 name: "Hmul32",
40258 argLen: 2,
40259 commutative: true,
40260 generic: true,
40261 },
40262 {
40263 name: "Hmul32u",
40264 argLen: 2,
40265 commutative: true,
40266 generic: true,
40267 },
40268 {
40269 name: "Hmul64",
40270 argLen: 2,
40271 commutative: true,
40272 generic: true,
40273 },
40274 {
40275 name: "Hmul64u",
40276 argLen: 2,
40277 commutative: true,
40278 generic: true,
40279 },
40280 {
40281 name: "Mul32uhilo",
40282 argLen: 2,
40283 commutative: true,
40284 generic: true,
40285 },
40286 {
40287 name: "Mul64uhilo",
40288 argLen: 2,
40289 commutative: true,
40290 generic: true,
40291 },
40292 {
40293 name: "Mul32uover",
40294 argLen: 2,
40295 commutative: true,
40296 generic: true,
40297 },
40298 {
40299 name: "Mul64uover",
40300 argLen: 2,
40301 commutative: true,
40302 generic: true,
40303 },
40304 {
40305 name: "Avg32u",
40306 argLen: 2,
40307 generic: true,
40308 },
40309 {
40310 name: "Avg64u",
40311 argLen: 2,
40312 generic: true,
40313 },
40314 {
40315 name: "Div8",
40316 argLen: 2,
40317 generic: true,
40318 },
40319 {
40320 name: "Div8u",
40321 argLen: 2,
40322 generic: true,
40323 },
40324 {
40325 name: "Div16",
40326 auxType: auxBool,
40327 argLen: 2,
40328 generic: true,
40329 },
40330 {
40331 name: "Div16u",
40332 argLen: 2,
40333 generic: true,
40334 },
40335 {
40336 name: "Div32",
40337 auxType: auxBool,
40338 argLen: 2,
40339 generic: true,
40340 },
40341 {
40342 name: "Div32u",
40343 argLen: 2,
40344 generic: true,
40345 },
40346 {
40347 name: "Div64",
40348 auxType: auxBool,
40349 argLen: 2,
40350 generic: true,
40351 },
40352 {
40353 name: "Div64u",
40354 argLen: 2,
40355 generic: true,
40356 },
40357 {
40358 name: "Div128u",
40359 argLen: 3,
40360 generic: true,
40361 },
40362 {
40363 name: "Mod8",
40364 argLen: 2,
40365 generic: true,
40366 },
40367 {
40368 name: "Mod8u",
40369 argLen: 2,
40370 generic: true,
40371 },
40372 {
40373 name: "Mod16",
40374 auxType: auxBool,
40375 argLen: 2,
40376 generic: true,
40377 },
40378 {
40379 name: "Mod16u",
40380 argLen: 2,
40381 generic: true,
40382 },
40383 {
40384 name: "Mod32",
40385 auxType: auxBool,
40386 argLen: 2,
40387 generic: true,
40388 },
40389 {
40390 name: "Mod32u",
40391 argLen: 2,
40392 generic: true,
40393 },
40394 {
40395 name: "Mod64",
40396 auxType: auxBool,
40397 argLen: 2,
40398 generic: true,
40399 },
40400 {
40401 name: "Mod64u",
40402 argLen: 2,
40403 generic: true,
40404 },
40405 {
40406 name: "And8",
40407 argLen: 2,
40408 commutative: true,
40409 generic: true,
40410 },
40411 {
40412 name: "And16",
40413 argLen: 2,
40414 commutative: true,
40415 generic: true,
40416 },
40417 {
40418 name: "And32",
40419 argLen: 2,
40420 commutative: true,
40421 generic: true,
40422 },
40423 {
40424 name: "And64",
40425 argLen: 2,
40426 commutative: true,
40427 generic: true,
40428 },
40429 {
40430 name: "Or8",
40431 argLen: 2,
40432 commutative: true,
40433 generic: true,
40434 },
40435 {
40436 name: "Or16",
40437 argLen: 2,
40438 commutative: true,
40439 generic: true,
40440 },
40441 {
40442 name: "Or32",
40443 argLen: 2,
40444 commutative: true,
40445 generic: true,
40446 },
40447 {
40448 name: "Or64",
40449 argLen: 2,
40450 commutative: true,
40451 generic: true,
40452 },
40453 {
40454 name: "Xor8",
40455 argLen: 2,
40456 commutative: true,
40457 generic: true,
40458 },
40459 {
40460 name: "Xor16",
40461 argLen: 2,
40462 commutative: true,
40463 generic: true,
40464 },
40465 {
40466 name: "Xor32",
40467 argLen: 2,
40468 commutative: true,
40469 generic: true,
40470 },
40471 {
40472 name: "Xor64",
40473 argLen: 2,
40474 commutative: true,
40475 generic: true,
40476 },
40477 {
40478 name: "Lsh8x8",
40479 auxType: auxBool,
40480 argLen: 2,
40481 generic: true,
40482 },
40483 {
40484 name: "Lsh8x16",
40485 auxType: auxBool,
40486 argLen: 2,
40487 generic: true,
40488 },
40489 {
40490 name: "Lsh8x32",
40491 auxType: auxBool,
40492 argLen: 2,
40493 generic: true,
40494 },
40495 {
40496 name: "Lsh8x64",
40497 auxType: auxBool,
40498 argLen: 2,
40499 generic: true,
40500 },
40501 {
40502 name: "Lsh16x8",
40503 auxType: auxBool,
40504 argLen: 2,
40505 generic: true,
40506 },
40507 {
40508 name: "Lsh16x16",
40509 auxType: auxBool,
40510 argLen: 2,
40511 generic: true,
40512 },
40513 {
40514 name: "Lsh16x32",
40515 auxType: auxBool,
40516 argLen: 2,
40517 generic: true,
40518 },
40519 {
40520 name: "Lsh16x64",
40521 auxType: auxBool,
40522 argLen: 2,
40523 generic: true,
40524 },
40525 {
40526 name: "Lsh32x8",
40527 auxType: auxBool,
40528 argLen: 2,
40529 generic: true,
40530 },
40531 {
40532 name: "Lsh32x16",
40533 auxType: auxBool,
40534 argLen: 2,
40535 generic: true,
40536 },
40537 {
40538 name: "Lsh32x32",
40539 auxType: auxBool,
40540 argLen: 2,
40541 generic: true,
40542 },
40543 {
40544 name: "Lsh32x64",
40545 auxType: auxBool,
40546 argLen: 2,
40547 generic: true,
40548 },
40549 {
40550 name: "Lsh64x8",
40551 auxType: auxBool,
40552 argLen: 2,
40553 generic: true,
40554 },
40555 {
40556 name: "Lsh64x16",
40557 auxType: auxBool,
40558 argLen: 2,
40559 generic: true,
40560 },
40561 {
40562 name: "Lsh64x32",
40563 auxType: auxBool,
40564 argLen: 2,
40565 generic: true,
40566 },
40567 {
40568 name: "Lsh64x64",
40569 auxType: auxBool,
40570 argLen: 2,
40571 generic: true,
40572 },
40573 {
40574 name: "Rsh8x8",
40575 auxType: auxBool,
40576 argLen: 2,
40577 generic: true,
40578 },
40579 {
40580 name: "Rsh8x16",
40581 auxType: auxBool,
40582 argLen: 2,
40583 generic: true,
40584 },
40585 {
40586 name: "Rsh8x32",
40587 auxType: auxBool,
40588 argLen: 2,
40589 generic: true,
40590 },
40591 {
40592 name: "Rsh8x64",
40593 auxType: auxBool,
40594 argLen: 2,
40595 generic: true,
40596 },
40597 {
40598 name: "Rsh16x8",
40599 auxType: auxBool,
40600 argLen: 2,
40601 generic: true,
40602 },
40603 {
40604 name: "Rsh16x16",
40605 auxType: auxBool,
40606 argLen: 2,
40607 generic: true,
40608 },
40609 {
40610 name: "Rsh16x32",
40611 auxType: auxBool,
40612 argLen: 2,
40613 generic: true,
40614 },
40615 {
40616 name: "Rsh16x64",
40617 auxType: auxBool,
40618 argLen: 2,
40619 generic: true,
40620 },
40621 {
40622 name: "Rsh32x8",
40623 auxType: auxBool,
40624 argLen: 2,
40625 generic: true,
40626 },
40627 {
40628 name: "Rsh32x16",
40629 auxType: auxBool,
40630 argLen: 2,
40631 generic: true,
40632 },
40633 {
40634 name: "Rsh32x32",
40635 auxType: auxBool,
40636 argLen: 2,
40637 generic: true,
40638 },
40639 {
40640 name: "Rsh32x64",
40641 auxType: auxBool,
40642 argLen: 2,
40643 generic: true,
40644 },
40645 {
40646 name: "Rsh64x8",
40647 auxType: auxBool,
40648 argLen: 2,
40649 generic: true,
40650 },
40651 {
40652 name: "Rsh64x16",
40653 auxType: auxBool,
40654 argLen: 2,
40655 generic: true,
40656 },
40657 {
40658 name: "Rsh64x32",
40659 auxType: auxBool,
40660 argLen: 2,
40661 generic: true,
40662 },
40663 {
40664 name: "Rsh64x64",
40665 auxType: auxBool,
40666 argLen: 2,
40667 generic: true,
40668 },
40669 {
40670 name: "Rsh8Ux8",
40671 auxType: auxBool,
40672 argLen: 2,
40673 generic: true,
40674 },
40675 {
40676 name: "Rsh8Ux16",
40677 auxType: auxBool,
40678 argLen: 2,
40679 generic: true,
40680 },
40681 {
40682 name: "Rsh8Ux32",
40683 auxType: auxBool,
40684 argLen: 2,
40685 generic: true,
40686 },
40687 {
40688 name: "Rsh8Ux64",
40689 auxType: auxBool,
40690 argLen: 2,
40691 generic: true,
40692 },
40693 {
40694 name: "Rsh16Ux8",
40695 auxType: auxBool,
40696 argLen: 2,
40697 generic: true,
40698 },
40699 {
40700 name: "Rsh16Ux16",
40701 auxType: auxBool,
40702 argLen: 2,
40703 generic: true,
40704 },
40705 {
40706 name: "Rsh16Ux32",
40707 auxType: auxBool,
40708 argLen: 2,
40709 generic: true,
40710 },
40711 {
40712 name: "Rsh16Ux64",
40713 auxType: auxBool,
40714 argLen: 2,
40715 generic: true,
40716 },
40717 {
40718 name: "Rsh32Ux8",
40719 auxType: auxBool,
40720 argLen: 2,
40721 generic: true,
40722 },
40723 {
40724 name: "Rsh32Ux16",
40725 auxType: auxBool,
40726 argLen: 2,
40727 generic: true,
40728 },
40729 {
40730 name: "Rsh32Ux32",
40731 auxType: auxBool,
40732 argLen: 2,
40733 generic: true,
40734 },
40735 {
40736 name: "Rsh32Ux64",
40737 auxType: auxBool,
40738 argLen: 2,
40739 generic: true,
40740 },
40741 {
40742 name: "Rsh64Ux8",
40743 auxType: auxBool,
40744 argLen: 2,
40745 generic: true,
40746 },
40747 {
40748 name: "Rsh64Ux16",
40749 auxType: auxBool,
40750 argLen: 2,
40751 generic: true,
40752 },
40753 {
40754 name: "Rsh64Ux32",
40755 auxType: auxBool,
40756 argLen: 2,
40757 generic: true,
40758 },
40759 {
40760 name: "Rsh64Ux64",
40761 auxType: auxBool,
40762 argLen: 2,
40763 generic: true,
40764 },
40765 {
40766 name: "Eq8",
40767 argLen: 2,
40768 commutative: true,
40769 generic: true,
40770 },
40771 {
40772 name: "Eq16",
40773 argLen: 2,
40774 commutative: true,
40775 generic: true,
40776 },
40777 {
40778 name: "Eq32",
40779 argLen: 2,
40780 commutative: true,
40781 generic: true,
40782 },
40783 {
40784 name: "Eq64",
40785 argLen: 2,
40786 commutative: true,
40787 generic: true,
40788 },
40789 {
40790 name: "EqPtr",
40791 argLen: 2,
40792 commutative: true,
40793 generic: true,
40794 },
40795 {
40796 name: "EqInter",
40797 argLen: 2,
40798 generic: true,
40799 },
40800 {
40801 name: "EqSlice",
40802 argLen: 2,
40803 generic: true,
40804 },
40805 {
40806 name: "Eq32F",
40807 argLen: 2,
40808 commutative: true,
40809 generic: true,
40810 },
40811 {
40812 name: "Eq64F",
40813 argLen: 2,
40814 commutative: true,
40815 generic: true,
40816 },
40817 {
40818 name: "Neq8",
40819 argLen: 2,
40820 commutative: true,
40821 generic: true,
40822 },
40823 {
40824 name: "Neq16",
40825 argLen: 2,
40826 commutative: true,
40827 generic: true,
40828 },
40829 {
40830 name: "Neq32",
40831 argLen: 2,
40832 commutative: true,
40833 generic: true,
40834 },
40835 {
40836 name: "Neq64",
40837 argLen: 2,
40838 commutative: true,
40839 generic: true,
40840 },
40841 {
40842 name: "NeqPtr",
40843 argLen: 2,
40844 commutative: true,
40845 generic: true,
40846 },
40847 {
40848 name: "NeqInter",
40849 argLen: 2,
40850 generic: true,
40851 },
40852 {
40853 name: "NeqSlice",
40854 argLen: 2,
40855 generic: true,
40856 },
40857 {
40858 name: "Neq32F",
40859 argLen: 2,
40860 commutative: true,
40861 generic: true,
40862 },
40863 {
40864 name: "Neq64F",
40865 argLen: 2,
40866 commutative: true,
40867 generic: true,
40868 },
40869 {
40870 name: "Less8",
40871 argLen: 2,
40872 generic: true,
40873 },
40874 {
40875 name: "Less8U",
40876 argLen: 2,
40877 generic: true,
40878 },
40879 {
40880 name: "Less16",
40881 argLen: 2,
40882 generic: true,
40883 },
40884 {
40885 name: "Less16U",
40886 argLen: 2,
40887 generic: true,
40888 },
40889 {
40890 name: "Less32",
40891 argLen: 2,
40892 generic: true,
40893 },
40894 {
40895 name: "Less32U",
40896 argLen: 2,
40897 generic: true,
40898 },
40899 {
40900 name: "Less64",
40901 argLen: 2,
40902 generic: true,
40903 },
40904 {
40905 name: "Less64U",
40906 argLen: 2,
40907 generic: true,
40908 },
40909 {
40910 name: "Less32F",
40911 argLen: 2,
40912 generic: true,
40913 },
40914 {
40915 name: "Less64F",
40916 argLen: 2,
40917 generic: true,
40918 },
40919 {
40920 name: "Leq8",
40921 argLen: 2,
40922 generic: true,
40923 },
40924 {
40925 name: "Leq8U",
40926 argLen: 2,
40927 generic: true,
40928 },
40929 {
40930 name: "Leq16",
40931 argLen: 2,
40932 generic: true,
40933 },
40934 {
40935 name: "Leq16U",
40936 argLen: 2,
40937 generic: true,
40938 },
40939 {
40940 name: "Leq32",
40941 argLen: 2,
40942 generic: true,
40943 },
40944 {
40945 name: "Leq32U",
40946 argLen: 2,
40947 generic: true,
40948 },
40949 {
40950 name: "Leq64",
40951 argLen: 2,
40952 generic: true,
40953 },
40954 {
40955 name: "Leq64U",
40956 argLen: 2,
40957 generic: true,
40958 },
40959 {
40960 name: "Leq32F",
40961 argLen: 2,
40962 generic: true,
40963 },
40964 {
40965 name: "Leq64F",
40966 argLen: 2,
40967 generic: true,
40968 },
40969 {
40970 name: "CondSelect",
40971 argLen: 3,
40972 generic: true,
40973 },
40974 {
40975 name: "AndB",
40976 argLen: 2,
40977 commutative: true,
40978 generic: true,
40979 },
40980 {
40981 name: "OrB",
40982 argLen: 2,
40983 commutative: true,
40984 generic: true,
40985 },
40986 {
40987 name: "EqB",
40988 argLen: 2,
40989 commutative: true,
40990 generic: true,
40991 },
40992 {
40993 name: "NeqB",
40994 argLen: 2,
40995 commutative: true,
40996 generic: true,
40997 },
40998 {
40999 name: "Not",
41000 argLen: 1,
41001 generic: true,
41002 },
41003 {
41004 name: "Neg8",
41005 argLen: 1,
41006 generic: true,
41007 },
41008 {
41009 name: "Neg16",
41010 argLen: 1,
41011 generic: true,
41012 },
41013 {
41014 name: "Neg32",
41015 argLen: 1,
41016 generic: true,
41017 },
41018 {
41019 name: "Neg64",
41020 argLen: 1,
41021 generic: true,
41022 },
41023 {
41024 name: "Neg32F",
41025 argLen: 1,
41026 generic: true,
41027 },
41028 {
41029 name: "Neg64F",
41030 argLen: 1,
41031 generic: true,
41032 },
41033 {
41034 name: "Com8",
41035 argLen: 1,
41036 generic: true,
41037 },
41038 {
41039 name: "Com16",
41040 argLen: 1,
41041 generic: true,
41042 },
41043 {
41044 name: "Com32",
41045 argLen: 1,
41046 generic: true,
41047 },
41048 {
41049 name: "Com64",
41050 argLen: 1,
41051 generic: true,
41052 },
41053 {
41054 name: "Ctz8",
41055 argLen: 1,
41056 generic: true,
41057 },
41058 {
41059 name: "Ctz16",
41060 argLen: 1,
41061 generic: true,
41062 },
41063 {
41064 name: "Ctz32",
41065 argLen: 1,
41066 generic: true,
41067 },
41068 {
41069 name: "Ctz64",
41070 argLen: 1,
41071 generic: true,
41072 },
41073 {
41074 name: "Ctz64On32",
41075 argLen: 2,
41076 generic: true,
41077 },
41078 {
41079 name: "Ctz8NonZero",
41080 argLen: 1,
41081 generic: true,
41082 },
41083 {
41084 name: "Ctz16NonZero",
41085 argLen: 1,
41086 generic: true,
41087 },
41088 {
41089 name: "Ctz32NonZero",
41090 argLen: 1,
41091 generic: true,
41092 },
41093 {
41094 name: "Ctz64NonZero",
41095 argLen: 1,
41096 generic: true,
41097 },
41098 {
41099 name: "BitLen8",
41100 argLen: 1,
41101 generic: true,
41102 },
41103 {
41104 name: "BitLen16",
41105 argLen: 1,
41106 generic: true,
41107 },
41108 {
41109 name: "BitLen32",
41110 argLen: 1,
41111 generic: true,
41112 },
41113 {
41114 name: "BitLen64",
41115 argLen: 1,
41116 generic: true,
41117 },
41118 {
41119 name: "Bswap16",
41120 argLen: 1,
41121 generic: true,
41122 },
41123 {
41124 name: "Bswap32",
41125 argLen: 1,
41126 generic: true,
41127 },
41128 {
41129 name: "Bswap64",
41130 argLen: 1,
41131 generic: true,
41132 },
41133 {
41134 name: "BitRev8",
41135 argLen: 1,
41136 generic: true,
41137 },
41138 {
41139 name: "BitRev16",
41140 argLen: 1,
41141 generic: true,
41142 },
41143 {
41144 name: "BitRev32",
41145 argLen: 1,
41146 generic: true,
41147 },
41148 {
41149 name: "BitRev64",
41150 argLen: 1,
41151 generic: true,
41152 },
41153 {
41154 name: "PopCount8",
41155 argLen: 1,
41156 generic: true,
41157 },
41158 {
41159 name: "PopCount16",
41160 argLen: 1,
41161 generic: true,
41162 },
41163 {
41164 name: "PopCount32",
41165 argLen: 1,
41166 generic: true,
41167 },
41168 {
41169 name: "PopCount64",
41170 argLen: 1,
41171 generic: true,
41172 },
41173 {
41174 name: "RotateLeft64",
41175 argLen: 2,
41176 generic: true,
41177 },
41178 {
41179 name: "RotateLeft32",
41180 argLen: 2,
41181 generic: true,
41182 },
41183 {
41184 name: "RotateLeft16",
41185 argLen: 2,
41186 generic: true,
41187 },
41188 {
41189 name: "RotateLeft8",
41190 argLen: 2,
41191 generic: true,
41192 },
41193 {
41194 name: "Sqrt",
41195 argLen: 1,
41196 generic: true,
41197 },
41198 {
41199 name: "Sqrt32",
41200 argLen: 1,
41201 generic: true,
41202 },
41203 {
41204 name: "Floor",
41205 argLen: 1,
41206 generic: true,
41207 },
41208 {
41209 name: "Ceil",
41210 argLen: 1,
41211 generic: true,
41212 },
41213 {
41214 name: "Trunc",
41215 argLen: 1,
41216 generic: true,
41217 },
41218 {
41219 name: "Round",
41220 argLen: 1,
41221 generic: true,
41222 },
41223 {
41224 name: "RoundToEven",
41225 argLen: 1,
41226 generic: true,
41227 },
41228 {
41229 name: "Abs",
41230 argLen: 1,
41231 generic: true,
41232 },
41233 {
41234 name: "Copysign",
41235 argLen: 2,
41236 generic: true,
41237 },
41238 {
41239 name: "Min64",
41240 argLen: 2,
41241 generic: true,
41242 },
41243 {
41244 name: "Max64",
41245 argLen: 2,
41246 generic: true,
41247 },
41248 {
41249 name: "Min64u",
41250 argLen: 2,
41251 generic: true,
41252 },
41253 {
41254 name: "Max64u",
41255 argLen: 2,
41256 generic: true,
41257 },
41258 {
41259 name: "Min64F",
41260 argLen: 2,
41261 generic: true,
41262 },
41263 {
41264 name: "Min32F",
41265 argLen: 2,
41266 generic: true,
41267 },
41268 {
41269 name: "Max64F",
41270 argLen: 2,
41271 generic: true,
41272 },
41273 {
41274 name: "Max32F",
41275 argLen: 2,
41276 generic: true,
41277 },
41278 {
41279 name: "FMA",
41280 argLen: 3,
41281 generic: true,
41282 },
41283 {
41284 name: "Phi",
41285 argLen: -1,
41286 zeroWidth: true,
41287 generic: true,
41288 },
41289 {
41290 name: "Copy",
41291 argLen: 1,
41292 generic: true,
41293 },
41294 {
41295 name: "Convert",
41296 argLen: 2,
41297 resultInArg0: true,
41298 zeroWidth: true,
41299 generic: true,
41300 },
41301 {
41302 name: "ConstBool",
41303 auxType: auxBool,
41304 argLen: 0,
41305 generic: true,
41306 },
41307 {
41308 name: "ConstString",
41309 auxType: auxString,
41310 argLen: 0,
41311 generic: true,
41312 },
41313 {
41314 name: "ConstNil",
41315 argLen: 0,
41316 generic: true,
41317 },
41318 {
41319 name: "Const8",
41320 auxType: auxInt8,
41321 argLen: 0,
41322 generic: true,
41323 },
41324 {
41325 name: "Const16",
41326 auxType: auxInt16,
41327 argLen: 0,
41328 generic: true,
41329 },
41330 {
41331 name: "Const32",
41332 auxType: auxInt32,
41333 argLen: 0,
41334 generic: true,
41335 },
41336 {
41337 name: "Const64",
41338 auxType: auxInt64,
41339 argLen: 0,
41340 generic: true,
41341 },
41342 {
41343 name: "Const32F",
41344 auxType: auxFloat32,
41345 argLen: 0,
41346 generic: true,
41347 },
41348 {
41349 name: "Const64F",
41350 auxType: auxFloat64,
41351 argLen: 0,
41352 generic: true,
41353 },
41354 {
41355 name: "ConstInterface",
41356 argLen: 0,
41357 generic: true,
41358 },
41359 {
41360 name: "ConstSlice",
41361 argLen: 0,
41362 generic: true,
41363 },
41364 {
41365 name: "InitMem",
41366 argLen: 0,
41367 zeroWidth: true,
41368 generic: true,
41369 },
41370 {
41371 name: "Arg",
41372 auxType: auxSymOff,
41373 argLen: 0,
41374 zeroWidth: true,
41375 symEffect: SymRead,
41376 generic: true,
41377 },
41378 {
41379 name: "ArgIntReg",
41380 auxType: auxNameOffsetInt8,
41381 argLen: 0,
41382 zeroWidth: true,
41383 generic: true,
41384 },
41385 {
41386 name: "ArgFloatReg",
41387 auxType: auxNameOffsetInt8,
41388 argLen: 0,
41389 zeroWidth: true,
41390 generic: true,
41391 },
41392 {
41393 name: "Addr",
41394 auxType: auxSym,
41395 argLen: 1,
41396 symEffect: SymAddr,
41397 generic: true,
41398 },
41399 {
41400 name: "LocalAddr",
41401 auxType: auxSym,
41402 argLen: 2,
41403 symEffect: SymAddr,
41404 generic: true,
41405 },
41406 {
41407 name: "SP",
41408 argLen: 0,
41409 zeroWidth: true,
41410 generic: true,
41411 },
41412 {
41413 name: "SB",
41414 argLen: 0,
41415 zeroWidth: true,
41416 generic: true,
41417 },
41418 {
41419 name: "SPanchored",
41420 argLen: 2,
41421 zeroWidth: true,
41422 generic: true,
41423 },
41424 {
41425 name: "Load",
41426 argLen: 2,
41427 generic: true,
41428 },
41429 {
41430 name: "Dereference",
41431 argLen: 2,
41432 generic: true,
41433 },
41434 {
41435 name: "Store",
41436 auxType: auxTyp,
41437 argLen: 3,
41438 generic: true,
41439 },
41440 {
41441 name: "Move",
41442 auxType: auxTypSize,
41443 argLen: 3,
41444 generic: true,
41445 },
41446 {
41447 name: "Zero",
41448 auxType: auxTypSize,
41449 argLen: 2,
41450 generic: true,
41451 },
41452 {
41453 name: "StoreWB",
41454 auxType: auxTyp,
41455 argLen: 3,
41456 generic: true,
41457 },
41458 {
41459 name: "MoveWB",
41460 auxType: auxTypSize,
41461 argLen: 3,
41462 generic: true,
41463 },
41464 {
41465 name: "ZeroWB",
41466 auxType: auxTypSize,
41467 argLen: 2,
41468 generic: true,
41469 },
41470 {
41471 name: "WBend",
41472 argLen: 1,
41473 generic: true,
41474 },
41475 {
41476 name: "WB",
41477 auxType: auxInt64,
41478 argLen: 1,
41479 generic: true,
41480 },
41481 {
41482 name: "HasCPUFeature",
41483 auxType: auxSym,
41484 argLen: 0,
41485 symEffect: SymNone,
41486 generic: true,
41487 },
41488 {
41489 name: "PanicBounds",
41490 auxType: auxInt64,
41491 argLen: 3,
41492 call: true,
41493 generic: true,
41494 },
41495 {
41496 name: "PanicExtend",
41497 auxType: auxInt64,
41498 argLen: 4,
41499 call: true,
41500 generic: true,
41501 },
41502 {
41503 name: "ClosureCall",
41504 auxType: auxCallOff,
41505 argLen: -1,
41506 call: true,
41507 generic: true,
41508 },
41509 {
41510 name: "StaticCall",
41511 auxType: auxCallOff,
41512 argLen: -1,
41513 call: true,
41514 generic: true,
41515 },
41516 {
41517 name: "InterCall",
41518 auxType: auxCallOff,
41519 argLen: -1,
41520 call: true,
41521 generic: true,
41522 },
41523 {
41524 name: "TailCall",
41525 auxType: auxCallOff,
41526 argLen: -1,
41527 call: true,
41528 generic: true,
41529 },
41530 {
41531 name: "ClosureLECall",
41532 auxType: auxCallOff,
41533 argLen: -1,
41534 call: true,
41535 generic: true,
41536 },
41537 {
41538 name: "StaticLECall",
41539 auxType: auxCallOff,
41540 argLen: -1,
41541 call: true,
41542 generic: true,
41543 },
41544 {
41545 name: "InterLECall",
41546 auxType: auxCallOff,
41547 argLen: -1,
41548 call: true,
41549 generic: true,
41550 },
41551 {
41552 name: "TailLECall",
41553 auxType: auxCallOff,
41554 argLen: -1,
41555 call: true,
41556 generic: true,
41557 },
41558 {
41559 name: "SignExt8to16",
41560 argLen: 1,
41561 generic: true,
41562 },
41563 {
41564 name: "SignExt8to32",
41565 argLen: 1,
41566 generic: true,
41567 },
41568 {
41569 name: "SignExt8to64",
41570 argLen: 1,
41571 generic: true,
41572 },
41573 {
41574 name: "SignExt16to32",
41575 argLen: 1,
41576 generic: true,
41577 },
41578 {
41579 name: "SignExt16to64",
41580 argLen: 1,
41581 generic: true,
41582 },
41583 {
41584 name: "SignExt32to64",
41585 argLen: 1,
41586 generic: true,
41587 },
41588 {
41589 name: "ZeroExt8to16",
41590 argLen: 1,
41591 generic: true,
41592 },
41593 {
41594 name: "ZeroExt8to32",
41595 argLen: 1,
41596 generic: true,
41597 },
41598 {
41599 name: "ZeroExt8to64",
41600 argLen: 1,
41601 generic: true,
41602 },
41603 {
41604 name: "ZeroExt16to32",
41605 argLen: 1,
41606 generic: true,
41607 },
41608 {
41609 name: "ZeroExt16to64",
41610 argLen: 1,
41611 generic: true,
41612 },
41613 {
41614 name: "ZeroExt32to64",
41615 argLen: 1,
41616 generic: true,
41617 },
41618 {
41619 name: "Trunc16to8",
41620 argLen: 1,
41621 generic: true,
41622 },
41623 {
41624 name: "Trunc32to8",
41625 argLen: 1,
41626 generic: true,
41627 },
41628 {
41629 name: "Trunc32to16",
41630 argLen: 1,
41631 generic: true,
41632 },
41633 {
41634 name: "Trunc64to8",
41635 argLen: 1,
41636 generic: true,
41637 },
41638 {
41639 name: "Trunc64to16",
41640 argLen: 1,
41641 generic: true,
41642 },
41643 {
41644 name: "Trunc64to32",
41645 argLen: 1,
41646 generic: true,
41647 },
41648 {
41649 name: "Cvt32to32F",
41650 argLen: 1,
41651 generic: true,
41652 },
41653 {
41654 name: "Cvt32to64F",
41655 argLen: 1,
41656 generic: true,
41657 },
41658 {
41659 name: "Cvt64to32F",
41660 argLen: 1,
41661 generic: true,
41662 },
41663 {
41664 name: "Cvt64to64F",
41665 argLen: 1,
41666 generic: true,
41667 },
41668 {
41669 name: "Cvt32Fto32",
41670 argLen: 1,
41671 generic: true,
41672 },
41673 {
41674 name: "Cvt32Fto64",
41675 argLen: 1,
41676 generic: true,
41677 },
41678 {
41679 name: "Cvt64Fto32",
41680 argLen: 1,
41681 generic: true,
41682 },
41683 {
41684 name: "Cvt64Fto64",
41685 argLen: 1,
41686 generic: true,
41687 },
41688 {
41689 name: "Cvt32Fto64F",
41690 argLen: 1,
41691 generic: true,
41692 },
41693 {
41694 name: "Cvt64Fto32F",
41695 argLen: 1,
41696 generic: true,
41697 },
41698 {
41699 name: "CvtBoolToUint8",
41700 argLen: 1,
41701 generic: true,
41702 },
41703 {
41704 name: "Round32F",
41705 argLen: 1,
41706 generic: true,
41707 },
41708 {
41709 name: "Round64F",
41710 argLen: 1,
41711 generic: true,
41712 },
41713 {
41714 name: "IsNonNil",
41715 argLen: 1,
41716 generic: true,
41717 },
41718 {
41719 name: "IsInBounds",
41720 argLen: 2,
41721 generic: true,
41722 },
41723 {
41724 name: "IsSliceInBounds",
41725 argLen: 2,
41726 generic: true,
41727 },
41728 {
41729 name: "NilCheck",
41730 argLen: 2,
41731 nilCheck: true,
41732 generic: true,
41733 },
41734 {
41735 name: "GetG",
41736 argLen: 1,
41737 zeroWidth: true,
41738 generic: true,
41739 },
41740 {
41741 name: "GetClosurePtr",
41742 argLen: 0,
41743 generic: true,
41744 },
41745 {
41746 name: "GetCallerPC",
41747 argLen: 0,
41748 generic: true,
41749 },
41750 {
41751 name: "GetCallerSP",
41752 argLen: 1,
41753 generic: true,
41754 },
41755 {
41756 name: "PtrIndex",
41757 argLen: 2,
41758 generic: true,
41759 },
41760 {
41761 name: "OffPtr",
41762 auxType: auxInt64,
41763 argLen: 1,
41764 generic: true,
41765 },
41766 {
41767 name: "SliceMake",
41768 argLen: 3,
41769 generic: true,
41770 },
41771 {
41772 name: "SlicePtr",
41773 argLen: 1,
41774 generic: true,
41775 },
41776 {
41777 name: "SliceLen",
41778 argLen: 1,
41779 generic: true,
41780 },
41781 {
41782 name: "SliceCap",
41783 argLen: 1,
41784 generic: true,
41785 },
41786 {
41787 name: "SlicePtrUnchecked",
41788 argLen: 1,
41789 generic: true,
41790 },
41791 {
41792 name: "ComplexMake",
41793 argLen: 2,
41794 generic: true,
41795 },
41796 {
41797 name: "ComplexReal",
41798 argLen: 1,
41799 generic: true,
41800 },
41801 {
41802 name: "ComplexImag",
41803 argLen: 1,
41804 generic: true,
41805 },
41806 {
41807 name: "StringMake",
41808 argLen: 2,
41809 generic: true,
41810 },
41811 {
41812 name: "StringPtr",
41813 argLen: 1,
41814 generic: true,
41815 },
41816 {
41817 name: "StringLen",
41818 argLen: 1,
41819 generic: true,
41820 },
41821 {
41822 name: "IMake",
41823 argLen: 2,
41824 generic: true,
41825 },
41826 {
41827 name: "ITab",
41828 argLen: 1,
41829 generic: true,
41830 },
41831 {
41832 name: "IData",
41833 argLen: 1,
41834 generic: true,
41835 },
41836 {
41837 name: "StructMake",
41838 argLen: -1,
41839 generic: true,
41840 },
41841 {
41842 name: "StructSelect",
41843 auxType: auxInt64,
41844 argLen: 1,
41845 generic: true,
41846 },
41847 {
41848 name: "ArrayMake0",
41849 argLen: 0,
41850 generic: true,
41851 },
41852 {
41853 name: "ArrayMake1",
41854 argLen: 1,
41855 generic: true,
41856 },
41857 {
41858 name: "ArraySelect",
41859 auxType: auxInt64,
41860 argLen: 1,
41861 generic: true,
41862 },
41863 {
41864 name: "StoreReg",
41865 argLen: 1,
41866 generic: true,
41867 },
41868 {
41869 name: "LoadReg",
41870 argLen: 1,
41871 generic: true,
41872 },
41873 {
41874 name: "FwdRef",
41875 auxType: auxSym,
41876 argLen: 0,
41877 symEffect: SymNone,
41878 generic: true,
41879 },
41880 {
41881 name: "Unknown",
41882 argLen: 0,
41883 generic: true,
41884 },
41885 {
41886 name: "VarDef",
41887 auxType: auxSym,
41888 argLen: 1,
41889 zeroWidth: true,
41890 symEffect: SymNone,
41891 generic: true,
41892 },
41893 {
41894 name: "VarLive",
41895 auxType: auxSym,
41896 argLen: 1,
41897 zeroWidth: true,
41898 symEffect: SymRead,
41899 generic: true,
41900 },
41901 {
41902 name: "KeepAlive",
41903 argLen: 2,
41904 zeroWidth: true,
41905 generic: true,
41906 },
41907 {
41908 name: "InlMark",
41909 auxType: auxInt32,
41910 argLen: 1,
41911 generic: true,
41912 },
41913 {
41914 name: "Int64Make",
41915 argLen: 2,
41916 generic: true,
41917 },
41918 {
41919 name: "Int64Hi",
41920 argLen: 1,
41921 generic: true,
41922 },
41923 {
41924 name: "Int64Lo",
41925 argLen: 1,
41926 generic: true,
41927 },
41928 {
41929 name: "Add32carry",
41930 argLen: 2,
41931 commutative: true,
41932 generic: true,
41933 },
41934 {
41935 name: "Add32withcarry",
41936 argLen: 3,
41937 commutative: true,
41938 generic: true,
41939 },
41940 {
41941 name: "Sub32carry",
41942 argLen: 2,
41943 generic: true,
41944 },
41945 {
41946 name: "Sub32withcarry",
41947 argLen: 3,
41948 generic: true,
41949 },
41950 {
41951 name: "Add64carry",
41952 argLen: 3,
41953 commutative: true,
41954 generic: true,
41955 },
41956 {
41957 name: "Sub64borrow",
41958 argLen: 3,
41959 generic: true,
41960 },
41961 {
41962 name: "Signmask",
41963 argLen: 1,
41964 generic: true,
41965 },
41966 {
41967 name: "Zeromask",
41968 argLen: 1,
41969 generic: true,
41970 },
41971 {
41972 name: "Slicemask",
41973 argLen: 1,
41974 generic: true,
41975 },
41976 {
41977 name: "SpectreIndex",
41978 argLen: 2,
41979 generic: true,
41980 },
41981 {
41982 name: "SpectreSliceIndex",
41983 argLen: 2,
41984 generic: true,
41985 },
41986 {
41987 name: "Cvt32Uto32F",
41988 argLen: 1,
41989 generic: true,
41990 },
41991 {
41992 name: "Cvt32Uto64F",
41993 argLen: 1,
41994 generic: true,
41995 },
41996 {
41997 name: "Cvt32Fto32U",
41998 argLen: 1,
41999 generic: true,
42000 },
42001 {
42002 name: "Cvt64Fto32U",
42003 argLen: 1,
42004 generic: true,
42005 },
42006 {
42007 name: "Cvt64Uto32F",
42008 argLen: 1,
42009 generic: true,
42010 },
42011 {
42012 name: "Cvt64Uto64F",
42013 argLen: 1,
42014 generic: true,
42015 },
42016 {
42017 name: "Cvt32Fto64U",
42018 argLen: 1,
42019 generic: true,
42020 },
42021 {
42022 name: "Cvt64Fto64U",
42023 argLen: 1,
42024 generic: true,
42025 },
42026 {
42027 name: "Select0",
42028 argLen: 1,
42029 zeroWidth: true,
42030 generic: true,
42031 },
42032 {
42033 name: "Select1",
42034 argLen: 1,
42035 zeroWidth: true,
42036 generic: true,
42037 },
42038 {
42039 name: "SelectN",
42040 auxType: auxInt64,
42041 argLen: 1,
42042 generic: true,
42043 },
42044 {
42045 name: "SelectNAddr",
42046 auxType: auxInt64,
42047 argLen: 1,
42048 generic: true,
42049 },
42050 {
42051 name: "MakeResult",
42052 argLen: -1,
42053 generic: true,
42054 },
42055 {
42056 name: "AtomicLoad8",
42057 argLen: 2,
42058 generic: true,
42059 },
42060 {
42061 name: "AtomicLoad32",
42062 argLen: 2,
42063 generic: true,
42064 },
42065 {
42066 name: "AtomicLoad64",
42067 argLen: 2,
42068 generic: true,
42069 },
42070 {
42071 name: "AtomicLoadPtr",
42072 argLen: 2,
42073 generic: true,
42074 },
42075 {
42076 name: "AtomicLoadAcq32",
42077 argLen: 2,
42078 generic: true,
42079 },
42080 {
42081 name: "AtomicLoadAcq64",
42082 argLen: 2,
42083 generic: true,
42084 },
42085 {
42086 name: "AtomicStore8",
42087 argLen: 3,
42088 hasSideEffects: true,
42089 generic: true,
42090 },
42091 {
42092 name: "AtomicStore32",
42093 argLen: 3,
42094 hasSideEffects: true,
42095 generic: true,
42096 },
42097 {
42098 name: "AtomicStore64",
42099 argLen: 3,
42100 hasSideEffects: true,
42101 generic: true,
42102 },
42103 {
42104 name: "AtomicStorePtrNoWB",
42105 argLen: 3,
42106 hasSideEffects: true,
42107 generic: true,
42108 },
42109 {
42110 name: "AtomicStoreRel32",
42111 argLen: 3,
42112 hasSideEffects: true,
42113 generic: true,
42114 },
42115 {
42116 name: "AtomicStoreRel64",
42117 argLen: 3,
42118 hasSideEffects: true,
42119 generic: true,
42120 },
42121 {
42122 name: "AtomicExchange8",
42123 argLen: 3,
42124 hasSideEffects: true,
42125 generic: true,
42126 },
42127 {
42128 name: "AtomicExchange32",
42129 argLen: 3,
42130 hasSideEffects: true,
42131 generic: true,
42132 },
42133 {
42134 name: "AtomicExchange64",
42135 argLen: 3,
42136 hasSideEffects: true,
42137 generic: true,
42138 },
42139 {
42140 name: "AtomicAdd32",
42141 argLen: 3,
42142 hasSideEffects: true,
42143 generic: true,
42144 },
42145 {
42146 name: "AtomicAdd64",
42147 argLen: 3,
42148 hasSideEffects: true,
42149 generic: true,
42150 },
42151 {
42152 name: "AtomicCompareAndSwap32",
42153 argLen: 4,
42154 hasSideEffects: true,
42155 generic: true,
42156 },
42157 {
42158 name: "AtomicCompareAndSwap64",
42159 argLen: 4,
42160 hasSideEffects: true,
42161 generic: true,
42162 },
42163 {
42164 name: "AtomicCompareAndSwapRel32",
42165 argLen: 4,
42166 hasSideEffects: true,
42167 generic: true,
42168 },
42169 {
42170 name: "AtomicAnd8",
42171 argLen: 3,
42172 hasSideEffects: true,
42173 generic: true,
42174 },
42175 {
42176 name: "AtomicOr8",
42177 argLen: 3,
42178 hasSideEffects: true,
42179 generic: true,
42180 },
42181 {
42182 name: "AtomicAnd32",
42183 argLen: 3,
42184 hasSideEffects: true,
42185 generic: true,
42186 },
42187 {
42188 name: "AtomicOr32",
42189 argLen: 3,
42190 hasSideEffects: true,
42191 generic: true,
42192 },
42193 {
42194 name: "AtomicAnd64value",
42195 argLen: 3,
42196 hasSideEffects: true,
42197 generic: true,
42198 },
42199 {
42200 name: "AtomicAnd32value",
42201 argLen: 3,
42202 hasSideEffects: true,
42203 generic: true,
42204 },
42205 {
42206 name: "AtomicAnd8value",
42207 argLen: 3,
42208 hasSideEffects: true,
42209 generic: true,
42210 },
42211 {
42212 name: "AtomicOr64value",
42213 argLen: 3,
42214 hasSideEffects: true,
42215 generic: true,
42216 },
42217 {
42218 name: "AtomicOr32value",
42219 argLen: 3,
42220 hasSideEffects: true,
42221 generic: true,
42222 },
42223 {
42224 name: "AtomicOr8value",
42225 argLen: 3,
42226 hasSideEffects: true,
42227 generic: true,
42228 },
42229 {
42230 name: "AtomicStore8Variant",
42231 argLen: 3,
42232 hasSideEffects: true,
42233 generic: true,
42234 },
42235 {
42236 name: "AtomicStore32Variant",
42237 argLen: 3,
42238 hasSideEffects: true,
42239 generic: true,
42240 },
42241 {
42242 name: "AtomicStore64Variant",
42243 argLen: 3,
42244 hasSideEffects: true,
42245 generic: true,
42246 },
42247 {
42248 name: "AtomicAdd32Variant",
42249 argLen: 3,
42250 hasSideEffects: true,
42251 generic: true,
42252 },
42253 {
42254 name: "AtomicAdd64Variant",
42255 argLen: 3,
42256 hasSideEffects: true,
42257 generic: true,
42258 },
42259 {
42260 name: "AtomicExchange8Variant",
42261 argLen: 3,
42262 hasSideEffects: true,
42263 generic: true,
42264 },
42265 {
42266 name: "AtomicExchange32Variant",
42267 argLen: 3,
42268 hasSideEffects: true,
42269 generic: true,
42270 },
42271 {
42272 name: "AtomicExchange64Variant",
42273 argLen: 3,
42274 hasSideEffects: true,
42275 generic: true,
42276 },
42277 {
42278 name: "AtomicCompareAndSwap32Variant",
42279 argLen: 4,
42280 hasSideEffects: true,
42281 generic: true,
42282 },
42283 {
42284 name: "AtomicCompareAndSwap64Variant",
42285 argLen: 4,
42286 hasSideEffects: true,
42287 generic: true,
42288 },
42289 {
42290 name: "AtomicAnd64valueVariant",
42291 argLen: 3,
42292 hasSideEffects: true,
42293 generic: true,
42294 },
42295 {
42296 name: "AtomicOr64valueVariant",
42297 argLen: 3,
42298 hasSideEffects: true,
42299 generic: true,
42300 },
42301 {
42302 name: "AtomicAnd32valueVariant",
42303 argLen: 3,
42304 hasSideEffects: true,
42305 generic: true,
42306 },
42307 {
42308 name: "AtomicOr32valueVariant",
42309 argLen: 3,
42310 hasSideEffects: true,
42311 generic: true,
42312 },
42313 {
42314 name: "AtomicAnd8valueVariant",
42315 argLen: 3,
42316 hasSideEffects: true,
42317 generic: true,
42318 },
42319 {
42320 name: "AtomicOr8valueVariant",
42321 argLen: 3,
42322 hasSideEffects: true,
42323 generic: true,
42324 },
42325 {
42326 name: "PubBarrier",
42327 argLen: 1,
42328 hasSideEffects: true,
42329 generic: true,
42330 },
42331 {
42332 name: "Clobber",
42333 auxType: auxSymOff,
42334 argLen: 0,
42335 symEffect: SymNone,
42336 generic: true,
42337 },
42338 {
42339 name: "ClobberReg",
42340 argLen: 0,
42341 generic: true,
42342 },
42343 {
42344 name: "PrefetchCache",
42345 argLen: 2,
42346 hasSideEffects: true,
42347 generic: true,
42348 },
42349 {
42350 name: "PrefetchCacheStreamed",
42351 argLen: 2,
42352 hasSideEffects: true,
42353 generic: true,
42354 },
42355 }
42356
42357 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
42358 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
42359 func (o Op) String() string { return opcodeTable[o].name }
42360 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
42361 func (o Op) IsCall() bool { return opcodeTable[o].call }
42362 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
42363 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
42364 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
42365 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
42366
42367 var registers386 = [...]Register{
42368 {0, x86.REG_AX, 0, "AX"},
42369 {1, x86.REG_CX, 1, "CX"},
42370 {2, x86.REG_DX, 2, "DX"},
42371 {3, x86.REG_BX, 3, "BX"},
42372 {4, x86.REGSP, -1, "SP"},
42373 {5, x86.REG_BP, 4, "BP"},
42374 {6, x86.REG_SI, 5, "SI"},
42375 {7, x86.REG_DI, 6, "DI"},
42376 {8, x86.REG_X0, -1, "X0"},
42377 {9, x86.REG_X1, -1, "X1"},
42378 {10, x86.REG_X2, -1, "X2"},
42379 {11, x86.REG_X3, -1, "X3"},
42380 {12, x86.REG_X4, -1, "X4"},
42381 {13, x86.REG_X5, -1, "X5"},
42382 {14, x86.REG_X6, -1, "X6"},
42383 {15, x86.REG_X7, -1, "X7"},
42384 {16, 0, -1, "SB"},
42385 }
42386 var paramIntReg386 = []int8(nil)
42387 var paramFloatReg386 = []int8(nil)
42388 var gpRegMask386 = regMask(239)
42389 var fpRegMask386 = regMask(65280)
42390 var specialRegMask386 = regMask(0)
42391 var framepointerReg386 = int8(5)
42392 var linkReg386 = int8(-1)
42393 var registersAMD64 = [...]Register{
42394 {0, x86.REG_AX, 0, "AX"},
42395 {1, x86.REG_CX, 1, "CX"},
42396 {2, x86.REG_DX, 2, "DX"},
42397 {3, x86.REG_BX, 3, "BX"},
42398 {4, x86.REGSP, -1, "SP"},
42399 {5, x86.REG_BP, 4, "BP"},
42400 {6, x86.REG_SI, 5, "SI"},
42401 {7, x86.REG_DI, 6, "DI"},
42402 {8, x86.REG_R8, 7, "R8"},
42403 {9, x86.REG_R9, 8, "R9"},
42404 {10, x86.REG_R10, 9, "R10"},
42405 {11, x86.REG_R11, 10, "R11"},
42406 {12, x86.REG_R12, 11, "R12"},
42407 {13, x86.REG_R13, 12, "R13"},
42408 {14, x86.REGG, -1, "g"},
42409 {15, x86.REG_R15, 13, "R15"},
42410 {16, x86.REG_X0, -1, "X0"},
42411 {17, x86.REG_X1, -1, "X1"},
42412 {18, x86.REG_X2, -1, "X2"},
42413 {19, x86.REG_X3, -1, "X3"},
42414 {20, x86.REG_X4, -1, "X4"},
42415 {21, x86.REG_X5, -1, "X5"},
42416 {22, x86.REG_X6, -1, "X6"},
42417 {23, x86.REG_X7, -1, "X7"},
42418 {24, x86.REG_X8, -1, "X8"},
42419 {25, x86.REG_X9, -1, "X9"},
42420 {26, x86.REG_X10, -1, "X10"},
42421 {27, x86.REG_X11, -1, "X11"},
42422 {28, x86.REG_X12, -1, "X12"},
42423 {29, x86.REG_X13, -1, "X13"},
42424 {30, x86.REG_X14, -1, "X14"},
42425 {31, x86.REG_X15, -1, "X15"},
42426 {32, 0, -1, "SB"},
42427 }
42428 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
42429 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
42430 var gpRegMaskAMD64 = regMask(49135)
42431 var fpRegMaskAMD64 = regMask(2147418112)
42432 var specialRegMaskAMD64 = regMask(2147483648)
42433 var framepointerRegAMD64 = int8(5)
42434 var linkRegAMD64 = int8(-1)
42435 var registersARM = [...]Register{
42436 {0, arm.REG_R0, 0, "R0"},
42437 {1, arm.REG_R1, 1, "R1"},
42438 {2, arm.REG_R2, 2, "R2"},
42439 {3, arm.REG_R3, 3, "R3"},
42440 {4, arm.REG_R4, 4, "R4"},
42441 {5, arm.REG_R5, 5, "R5"},
42442 {6, arm.REG_R6, 6, "R6"},
42443 {7, arm.REG_R7, 7, "R7"},
42444 {8, arm.REG_R8, 8, "R8"},
42445 {9, arm.REG_R9, 9, "R9"},
42446 {10, arm.REGG, -1, "g"},
42447 {11, arm.REG_R11, -1, "R11"},
42448 {12, arm.REG_R12, 10, "R12"},
42449 {13, arm.REGSP, -1, "SP"},
42450 {14, arm.REG_R14, 11, "R14"},
42451 {15, arm.REG_R15, -1, "R15"},
42452 {16, arm.REG_F0, -1, "F0"},
42453 {17, arm.REG_F1, -1, "F1"},
42454 {18, arm.REG_F2, -1, "F2"},
42455 {19, arm.REG_F3, -1, "F3"},
42456 {20, arm.REG_F4, -1, "F4"},
42457 {21, arm.REG_F5, -1, "F5"},
42458 {22, arm.REG_F6, -1, "F6"},
42459 {23, arm.REG_F7, -1, "F7"},
42460 {24, arm.REG_F8, -1, "F8"},
42461 {25, arm.REG_F9, -1, "F9"},
42462 {26, arm.REG_F10, -1, "F10"},
42463 {27, arm.REG_F11, -1, "F11"},
42464 {28, arm.REG_F12, -1, "F12"},
42465 {29, arm.REG_F13, -1, "F13"},
42466 {30, arm.REG_F14, -1, "F14"},
42467 {31, arm.REG_F15, -1, "F15"},
42468 {32, 0, -1, "SB"},
42469 }
42470 var paramIntRegARM = []int8(nil)
42471 var paramFloatRegARM = []int8(nil)
42472 var gpRegMaskARM = regMask(21503)
42473 var fpRegMaskARM = regMask(4294901760)
42474 var specialRegMaskARM = regMask(0)
42475 var framepointerRegARM = int8(-1)
42476 var linkRegARM = int8(14)
42477 var registersARM64 = [...]Register{
42478 {0, arm64.REG_R0, 0, "R0"},
42479 {1, arm64.REG_R1, 1, "R1"},
42480 {2, arm64.REG_R2, 2, "R2"},
42481 {3, arm64.REG_R3, 3, "R3"},
42482 {4, arm64.REG_R4, 4, "R4"},
42483 {5, arm64.REG_R5, 5, "R5"},
42484 {6, arm64.REG_R6, 6, "R6"},
42485 {7, arm64.REG_R7, 7, "R7"},
42486 {8, arm64.REG_R8, 8, "R8"},
42487 {9, arm64.REG_R9, 9, "R9"},
42488 {10, arm64.REG_R10, 10, "R10"},
42489 {11, arm64.REG_R11, 11, "R11"},
42490 {12, arm64.REG_R12, 12, "R12"},
42491 {13, arm64.REG_R13, 13, "R13"},
42492 {14, arm64.REG_R14, 14, "R14"},
42493 {15, arm64.REG_R15, 15, "R15"},
42494 {16, arm64.REG_R16, 16, "R16"},
42495 {17, arm64.REG_R17, 17, "R17"},
42496 {18, arm64.REG_R18, -1, "R18"},
42497 {19, arm64.REG_R19, 18, "R19"},
42498 {20, arm64.REG_R20, 19, "R20"},
42499 {21, arm64.REG_R21, 20, "R21"},
42500 {22, arm64.REG_R22, 21, "R22"},
42501 {23, arm64.REG_R23, 22, "R23"},
42502 {24, arm64.REG_R24, 23, "R24"},
42503 {25, arm64.REG_R25, 24, "R25"},
42504 {26, arm64.REG_R26, 25, "R26"},
42505 {27, arm64.REGG, -1, "g"},
42506 {28, arm64.REG_R29, -1, "R29"},
42507 {29, arm64.REG_R30, 26, "R30"},
42508 {30, arm64.REGSP, -1, "SP"},
42509 {31, arm64.REG_F0, -1, "F0"},
42510 {32, arm64.REG_F1, -1, "F1"},
42511 {33, arm64.REG_F2, -1, "F2"},
42512 {34, arm64.REG_F3, -1, "F3"},
42513 {35, arm64.REG_F4, -1, "F4"},
42514 {36, arm64.REG_F5, -1, "F5"},
42515 {37, arm64.REG_F6, -1, "F6"},
42516 {38, arm64.REG_F7, -1, "F7"},
42517 {39, arm64.REG_F8, -1, "F8"},
42518 {40, arm64.REG_F9, -1, "F9"},
42519 {41, arm64.REG_F10, -1, "F10"},
42520 {42, arm64.REG_F11, -1, "F11"},
42521 {43, arm64.REG_F12, -1, "F12"},
42522 {44, arm64.REG_F13, -1, "F13"},
42523 {45, arm64.REG_F14, -1, "F14"},
42524 {46, arm64.REG_F15, -1, "F15"},
42525 {47, arm64.REG_F16, -1, "F16"},
42526 {48, arm64.REG_F17, -1, "F17"},
42527 {49, arm64.REG_F18, -1, "F18"},
42528 {50, arm64.REG_F19, -1, "F19"},
42529 {51, arm64.REG_F20, -1, "F20"},
42530 {52, arm64.REG_F21, -1, "F21"},
42531 {53, arm64.REG_F22, -1, "F22"},
42532 {54, arm64.REG_F23, -1, "F23"},
42533 {55, arm64.REG_F24, -1, "F24"},
42534 {56, arm64.REG_F25, -1, "F25"},
42535 {57, arm64.REG_F26, -1, "F26"},
42536 {58, arm64.REG_F27, -1, "F27"},
42537 {59, arm64.REG_F28, -1, "F28"},
42538 {60, arm64.REG_F29, -1, "F29"},
42539 {61, arm64.REG_F30, -1, "F30"},
42540 {62, arm64.REG_F31, -1, "F31"},
42541 {63, 0, -1, "SB"},
42542 }
42543 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
42544 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
42545 var gpRegMaskARM64 = regMask(670826495)
42546 var fpRegMaskARM64 = regMask(9223372034707292160)
42547 var specialRegMaskARM64 = regMask(0)
42548 var framepointerRegARM64 = int8(-1)
42549 var linkRegARM64 = int8(29)
42550 var registersLOONG64 = [...]Register{
42551 {0, loong64.REG_R0, -1, "R0"},
42552 {1, loong64.REG_R1, -1, "R1"},
42553 {2, loong64.REGSP, -1, "SP"},
42554 {3, loong64.REG_R4, 0, "R4"},
42555 {4, loong64.REG_R5, 1, "R5"},
42556 {5, loong64.REG_R6, 2, "R6"},
42557 {6, loong64.REG_R7, 3, "R7"},
42558 {7, loong64.REG_R8, 4, "R8"},
42559 {8, loong64.REG_R9, 5, "R9"},
42560 {9, loong64.REG_R10, 6, "R10"},
42561 {10, loong64.REG_R11, 7, "R11"},
42562 {11, loong64.REG_R12, 8, "R12"},
42563 {12, loong64.REG_R13, 9, "R13"},
42564 {13, loong64.REG_R14, 10, "R14"},
42565 {14, loong64.REG_R15, 11, "R15"},
42566 {15, loong64.REG_R16, 12, "R16"},
42567 {16, loong64.REG_R17, 13, "R17"},
42568 {17, loong64.REG_R18, 14, "R18"},
42569 {18, loong64.REG_R19, 15, "R19"},
42570 {19, loong64.REG_R20, 16, "R20"},
42571 {20, loong64.REG_R21, 17, "R21"},
42572 {21, loong64.REGG, -1, "g"},
42573 {22, loong64.REG_R23, 18, "R23"},
42574 {23, loong64.REG_R24, 19, "R24"},
42575 {24, loong64.REG_R25, 20, "R25"},
42576 {25, loong64.REG_R26, 21, "R26"},
42577 {26, loong64.REG_R27, 22, "R27"},
42578 {27, loong64.REG_R28, 23, "R28"},
42579 {28, loong64.REG_R29, 24, "R29"},
42580 {29, loong64.REG_R31, 25, "R31"},
42581 {30, loong64.REG_F0, -1, "F0"},
42582 {31, loong64.REG_F1, -1, "F1"},
42583 {32, loong64.REG_F2, -1, "F2"},
42584 {33, loong64.REG_F3, -1, "F3"},
42585 {34, loong64.REG_F4, -1, "F4"},
42586 {35, loong64.REG_F5, -1, "F5"},
42587 {36, loong64.REG_F6, -1, "F6"},
42588 {37, loong64.REG_F7, -1, "F7"},
42589 {38, loong64.REG_F8, -1, "F8"},
42590 {39, loong64.REG_F9, -1, "F9"},
42591 {40, loong64.REG_F10, -1, "F10"},
42592 {41, loong64.REG_F11, -1, "F11"},
42593 {42, loong64.REG_F12, -1, "F12"},
42594 {43, loong64.REG_F13, -1, "F13"},
42595 {44, loong64.REG_F14, -1, "F14"},
42596 {45, loong64.REG_F15, -1, "F15"},
42597 {46, loong64.REG_F16, -1, "F16"},
42598 {47, loong64.REG_F17, -1, "F17"},
42599 {48, loong64.REG_F18, -1, "F18"},
42600 {49, loong64.REG_F19, -1, "F19"},
42601 {50, loong64.REG_F20, -1, "F20"},
42602 {51, loong64.REG_F21, -1, "F21"},
42603 {52, loong64.REG_F22, -1, "F22"},
42604 {53, loong64.REG_F23, -1, "F23"},
42605 {54, loong64.REG_F24, -1, "F24"},
42606 {55, loong64.REG_F25, -1, "F25"},
42607 {56, loong64.REG_F26, -1, "F26"},
42608 {57, loong64.REG_F27, -1, "F27"},
42609 {58, loong64.REG_F28, -1, "F28"},
42610 {59, loong64.REG_F29, -1, "F29"},
42611 {60, loong64.REG_F30, -1, "F30"},
42612 {61, loong64.REG_F31, -1, "F31"},
42613 {62, 0, -1, "SB"},
42614 }
42615 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
42616 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
42617 var gpRegMaskLOONG64 = regMask(1071644664)
42618 var fpRegMaskLOONG64 = regMask(4611686017353646080)
42619 var specialRegMaskLOONG64 = regMask(0)
42620 var framepointerRegLOONG64 = int8(-1)
42621 var linkRegLOONG64 = int8(1)
42622 var registersMIPS = [...]Register{
42623 {0, mips.REG_R0, -1, "R0"},
42624 {1, mips.REG_R1, 0, "R1"},
42625 {2, mips.REG_R2, 1, "R2"},
42626 {3, mips.REG_R3, 2, "R3"},
42627 {4, mips.REG_R4, 3, "R4"},
42628 {5, mips.REG_R5, 4, "R5"},
42629 {6, mips.REG_R6, 5, "R6"},
42630 {7, mips.REG_R7, 6, "R7"},
42631 {8, mips.REG_R8, 7, "R8"},
42632 {9, mips.REG_R9, 8, "R9"},
42633 {10, mips.REG_R10, 9, "R10"},
42634 {11, mips.REG_R11, 10, "R11"},
42635 {12, mips.REG_R12, 11, "R12"},
42636 {13, mips.REG_R13, 12, "R13"},
42637 {14, mips.REG_R14, 13, "R14"},
42638 {15, mips.REG_R15, 14, "R15"},
42639 {16, mips.REG_R16, 15, "R16"},
42640 {17, mips.REG_R17, 16, "R17"},
42641 {18, mips.REG_R18, 17, "R18"},
42642 {19, mips.REG_R19, 18, "R19"},
42643 {20, mips.REG_R20, 19, "R20"},
42644 {21, mips.REG_R21, 20, "R21"},
42645 {22, mips.REG_R22, 21, "R22"},
42646 {23, mips.REG_R24, 22, "R24"},
42647 {24, mips.REG_R25, 23, "R25"},
42648 {25, mips.REG_R28, 24, "R28"},
42649 {26, mips.REGSP, -1, "SP"},
42650 {27, mips.REGG, -1, "g"},
42651 {28, mips.REG_R31, 25, "R31"},
42652 {29, mips.REG_F0, -1, "F0"},
42653 {30, mips.REG_F2, -1, "F2"},
42654 {31, mips.REG_F4, -1, "F4"},
42655 {32, mips.REG_F6, -1, "F6"},
42656 {33, mips.REG_F8, -1, "F8"},
42657 {34, mips.REG_F10, -1, "F10"},
42658 {35, mips.REG_F12, -1, "F12"},
42659 {36, mips.REG_F14, -1, "F14"},
42660 {37, mips.REG_F16, -1, "F16"},
42661 {38, mips.REG_F18, -1, "F18"},
42662 {39, mips.REG_F20, -1, "F20"},
42663 {40, mips.REG_F22, -1, "F22"},
42664 {41, mips.REG_F24, -1, "F24"},
42665 {42, mips.REG_F26, -1, "F26"},
42666 {43, mips.REG_F28, -1, "F28"},
42667 {44, mips.REG_F30, -1, "F30"},
42668 {45, mips.REG_HI, -1, "HI"},
42669 {46, mips.REG_LO, -1, "LO"},
42670 {47, 0, -1, "SB"},
42671 }
42672 var paramIntRegMIPS = []int8(nil)
42673 var paramFloatRegMIPS = []int8(nil)
42674 var gpRegMaskMIPS = regMask(335544318)
42675 var fpRegMaskMIPS = regMask(35183835217920)
42676 var specialRegMaskMIPS = regMask(105553116266496)
42677 var framepointerRegMIPS = int8(-1)
42678 var linkRegMIPS = int8(28)
42679 var registersMIPS64 = [...]Register{
42680 {0, mips.REG_R0, -1, "R0"},
42681 {1, mips.REG_R1, 0, "R1"},
42682 {2, mips.REG_R2, 1, "R2"},
42683 {3, mips.REG_R3, 2, "R3"},
42684 {4, mips.REG_R4, 3, "R4"},
42685 {5, mips.REG_R5, 4, "R5"},
42686 {6, mips.REG_R6, 5, "R6"},
42687 {7, mips.REG_R7, 6, "R7"},
42688 {8, mips.REG_R8, 7, "R8"},
42689 {9, mips.REG_R9, 8, "R9"},
42690 {10, mips.REG_R10, 9, "R10"},
42691 {11, mips.REG_R11, 10, "R11"},
42692 {12, mips.REG_R12, 11, "R12"},
42693 {13, mips.REG_R13, 12, "R13"},
42694 {14, mips.REG_R14, 13, "R14"},
42695 {15, mips.REG_R15, 14, "R15"},
42696 {16, mips.REG_R16, 15, "R16"},
42697 {17, mips.REG_R17, 16, "R17"},
42698 {18, mips.REG_R18, 17, "R18"},
42699 {19, mips.REG_R19, 18, "R19"},
42700 {20, mips.REG_R20, 19, "R20"},
42701 {21, mips.REG_R21, 20, "R21"},
42702 {22, mips.REG_R22, 21, "R22"},
42703 {23, mips.REG_R24, 22, "R24"},
42704 {24, mips.REG_R25, 23, "R25"},
42705 {25, mips.REGSP, -1, "SP"},
42706 {26, mips.REGG, -1, "g"},
42707 {27, mips.REG_R31, 24, "R31"},
42708 {28, mips.REG_F0, -1, "F0"},
42709 {29, mips.REG_F1, -1, "F1"},
42710 {30, mips.REG_F2, -1, "F2"},
42711 {31, mips.REG_F3, -1, "F3"},
42712 {32, mips.REG_F4, -1, "F4"},
42713 {33, mips.REG_F5, -1, "F5"},
42714 {34, mips.REG_F6, -1, "F6"},
42715 {35, mips.REG_F7, -1, "F7"},
42716 {36, mips.REG_F8, -1, "F8"},
42717 {37, mips.REG_F9, -1, "F9"},
42718 {38, mips.REG_F10, -1, "F10"},
42719 {39, mips.REG_F11, -1, "F11"},
42720 {40, mips.REG_F12, -1, "F12"},
42721 {41, mips.REG_F13, -1, "F13"},
42722 {42, mips.REG_F14, -1, "F14"},
42723 {43, mips.REG_F15, -1, "F15"},
42724 {44, mips.REG_F16, -1, "F16"},
42725 {45, mips.REG_F17, -1, "F17"},
42726 {46, mips.REG_F18, -1, "F18"},
42727 {47, mips.REG_F19, -1, "F19"},
42728 {48, mips.REG_F20, -1, "F20"},
42729 {49, mips.REG_F21, -1, "F21"},
42730 {50, mips.REG_F22, -1, "F22"},
42731 {51, mips.REG_F23, -1, "F23"},
42732 {52, mips.REG_F24, -1, "F24"},
42733 {53, mips.REG_F25, -1, "F25"},
42734 {54, mips.REG_F26, -1, "F26"},
42735 {55, mips.REG_F27, -1, "F27"},
42736 {56, mips.REG_F28, -1, "F28"},
42737 {57, mips.REG_F29, -1, "F29"},
42738 {58, mips.REG_F30, -1, "F30"},
42739 {59, mips.REG_F31, -1, "F31"},
42740 {60, mips.REG_HI, -1, "HI"},
42741 {61, mips.REG_LO, -1, "LO"},
42742 {62, 0, -1, "SB"},
42743 }
42744 var paramIntRegMIPS64 = []int8(nil)
42745 var paramFloatRegMIPS64 = []int8(nil)
42746 var gpRegMaskMIPS64 = regMask(167772158)
42747 var fpRegMaskMIPS64 = regMask(1152921504338411520)
42748 var specialRegMaskMIPS64 = regMask(3458764513820540928)
42749 var framepointerRegMIPS64 = int8(-1)
42750 var linkRegMIPS64 = int8(27)
42751 var registersPPC64 = [...]Register{
42752 {0, ppc64.REG_R0, -1, "R0"},
42753 {1, ppc64.REGSP, -1, "SP"},
42754 {2, 0, -1, "SB"},
42755 {3, ppc64.REG_R3, 0, "R3"},
42756 {4, ppc64.REG_R4, 1, "R4"},
42757 {5, ppc64.REG_R5, 2, "R5"},
42758 {6, ppc64.REG_R6, 3, "R6"},
42759 {7, ppc64.REG_R7, 4, "R7"},
42760 {8, ppc64.REG_R8, 5, "R8"},
42761 {9, ppc64.REG_R9, 6, "R9"},
42762 {10, ppc64.REG_R10, 7, "R10"},
42763 {11, ppc64.REG_R11, 8, "R11"},
42764 {12, ppc64.REG_R12, 9, "R12"},
42765 {13, ppc64.REG_R13, -1, "R13"},
42766 {14, ppc64.REG_R14, 10, "R14"},
42767 {15, ppc64.REG_R15, 11, "R15"},
42768 {16, ppc64.REG_R16, 12, "R16"},
42769 {17, ppc64.REG_R17, 13, "R17"},
42770 {18, ppc64.REG_R18, 14, "R18"},
42771 {19, ppc64.REG_R19, 15, "R19"},
42772 {20, ppc64.REG_R20, 16, "R20"},
42773 {21, ppc64.REG_R21, 17, "R21"},
42774 {22, ppc64.REG_R22, 18, "R22"},
42775 {23, ppc64.REG_R23, 19, "R23"},
42776 {24, ppc64.REG_R24, 20, "R24"},
42777 {25, ppc64.REG_R25, 21, "R25"},
42778 {26, ppc64.REG_R26, 22, "R26"},
42779 {27, ppc64.REG_R27, 23, "R27"},
42780 {28, ppc64.REG_R28, 24, "R28"},
42781 {29, ppc64.REG_R29, 25, "R29"},
42782 {30, ppc64.REGG, -1, "g"},
42783 {31, ppc64.REG_R31, -1, "R31"},
42784 {32, ppc64.REG_F0, -1, "F0"},
42785 {33, ppc64.REG_F1, -1, "F1"},
42786 {34, ppc64.REG_F2, -1, "F2"},
42787 {35, ppc64.REG_F3, -1, "F3"},
42788 {36, ppc64.REG_F4, -1, "F4"},
42789 {37, ppc64.REG_F5, -1, "F5"},
42790 {38, ppc64.REG_F6, -1, "F6"},
42791 {39, ppc64.REG_F7, -1, "F7"},
42792 {40, ppc64.REG_F8, -1, "F8"},
42793 {41, ppc64.REG_F9, -1, "F9"},
42794 {42, ppc64.REG_F10, -1, "F10"},
42795 {43, ppc64.REG_F11, -1, "F11"},
42796 {44, ppc64.REG_F12, -1, "F12"},
42797 {45, ppc64.REG_F13, -1, "F13"},
42798 {46, ppc64.REG_F14, -1, "F14"},
42799 {47, ppc64.REG_F15, -1, "F15"},
42800 {48, ppc64.REG_F16, -1, "F16"},
42801 {49, ppc64.REG_F17, -1, "F17"},
42802 {50, ppc64.REG_F18, -1, "F18"},
42803 {51, ppc64.REG_F19, -1, "F19"},
42804 {52, ppc64.REG_F20, -1, "F20"},
42805 {53, ppc64.REG_F21, -1, "F21"},
42806 {54, ppc64.REG_F22, -1, "F22"},
42807 {55, ppc64.REG_F23, -1, "F23"},
42808 {56, ppc64.REG_F24, -1, "F24"},
42809 {57, ppc64.REG_F25, -1, "F25"},
42810 {58, ppc64.REG_F26, -1, "F26"},
42811 {59, ppc64.REG_F27, -1, "F27"},
42812 {60, ppc64.REG_F28, -1, "F28"},
42813 {61, ppc64.REG_F29, -1, "F29"},
42814 {62, ppc64.REG_F30, -1, "F30"},
42815 {63, ppc64.REG_XER, -1, "XER"},
42816 }
42817 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
42818 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
42819 var gpRegMaskPPC64 = regMask(1073733624)
42820 var fpRegMaskPPC64 = regMask(9223372032559808512)
42821 var specialRegMaskPPC64 = regMask(9223372036854775808)
42822 var framepointerRegPPC64 = int8(-1)
42823 var linkRegPPC64 = int8(-1)
42824 var registersRISCV64 = [...]Register{
42825 {0, riscv.REG_X0, -1, "X0"},
42826 {1, riscv.REGSP, -1, "SP"},
42827 {2, riscv.REG_X3, -1, "X3"},
42828 {3, riscv.REG_X4, -1, "X4"},
42829 {4, riscv.REG_X5, 0, "X5"},
42830 {5, riscv.REG_X6, 1, "X6"},
42831 {6, riscv.REG_X7, 2, "X7"},
42832 {7, riscv.REG_X8, 3, "X8"},
42833 {8, riscv.REG_X9, 4, "X9"},
42834 {9, riscv.REG_X10, 5, "X10"},
42835 {10, riscv.REG_X11, 6, "X11"},
42836 {11, riscv.REG_X12, 7, "X12"},
42837 {12, riscv.REG_X13, 8, "X13"},
42838 {13, riscv.REG_X14, 9, "X14"},
42839 {14, riscv.REG_X15, 10, "X15"},
42840 {15, riscv.REG_X16, 11, "X16"},
42841 {16, riscv.REG_X17, 12, "X17"},
42842 {17, riscv.REG_X18, 13, "X18"},
42843 {18, riscv.REG_X19, 14, "X19"},
42844 {19, riscv.REG_X20, 15, "X20"},
42845 {20, riscv.REG_X21, 16, "X21"},
42846 {21, riscv.REG_X22, 17, "X22"},
42847 {22, riscv.REG_X23, 18, "X23"},
42848 {23, riscv.REG_X24, 19, "X24"},
42849 {24, riscv.REG_X25, 20, "X25"},
42850 {25, riscv.REG_X26, 21, "X26"},
42851 {26, riscv.REGG, -1, "g"},
42852 {27, riscv.REG_X28, 22, "X28"},
42853 {28, riscv.REG_X29, 23, "X29"},
42854 {29, riscv.REG_X30, 24, "X30"},
42855 {30, riscv.REG_X31, -1, "X31"},
42856 {31, riscv.REG_F0, -1, "F0"},
42857 {32, riscv.REG_F1, -1, "F1"},
42858 {33, riscv.REG_F2, -1, "F2"},
42859 {34, riscv.REG_F3, -1, "F3"},
42860 {35, riscv.REG_F4, -1, "F4"},
42861 {36, riscv.REG_F5, -1, "F5"},
42862 {37, riscv.REG_F6, -1, "F6"},
42863 {38, riscv.REG_F7, -1, "F7"},
42864 {39, riscv.REG_F8, -1, "F8"},
42865 {40, riscv.REG_F9, -1, "F9"},
42866 {41, riscv.REG_F10, -1, "F10"},
42867 {42, riscv.REG_F11, -1, "F11"},
42868 {43, riscv.REG_F12, -1, "F12"},
42869 {44, riscv.REG_F13, -1, "F13"},
42870 {45, riscv.REG_F14, -1, "F14"},
42871 {46, riscv.REG_F15, -1, "F15"},
42872 {47, riscv.REG_F16, -1, "F16"},
42873 {48, riscv.REG_F17, -1, "F17"},
42874 {49, riscv.REG_F18, -1, "F18"},
42875 {50, riscv.REG_F19, -1, "F19"},
42876 {51, riscv.REG_F20, -1, "F20"},
42877 {52, riscv.REG_F21, -1, "F21"},
42878 {53, riscv.REG_F22, -1, "F22"},
42879 {54, riscv.REG_F23, -1, "F23"},
42880 {55, riscv.REG_F24, -1, "F24"},
42881 {56, riscv.REG_F25, -1, "F25"},
42882 {57, riscv.REG_F26, -1, "F26"},
42883 {58, riscv.REG_F27, -1, "F27"},
42884 {59, riscv.REG_F28, -1, "F28"},
42885 {60, riscv.REG_F29, -1, "F29"},
42886 {61, riscv.REG_F30, -1, "F30"},
42887 {62, riscv.REG_F31, -1, "F31"},
42888 {63, 0, -1, "SB"},
42889 }
42890 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
42891 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
42892 var gpRegMaskRISCV64 = regMask(1006632944)
42893 var fpRegMaskRISCV64 = regMask(9223372034707292160)
42894 var specialRegMaskRISCV64 = regMask(0)
42895 var framepointerRegRISCV64 = int8(-1)
42896 var linkRegRISCV64 = int8(0)
42897 var registersS390X = [...]Register{
42898 {0, s390x.REG_R0, 0, "R0"},
42899 {1, s390x.REG_R1, 1, "R1"},
42900 {2, s390x.REG_R2, 2, "R2"},
42901 {3, s390x.REG_R3, 3, "R3"},
42902 {4, s390x.REG_R4, 4, "R4"},
42903 {5, s390x.REG_R5, 5, "R5"},
42904 {6, s390x.REG_R6, 6, "R6"},
42905 {7, s390x.REG_R7, 7, "R7"},
42906 {8, s390x.REG_R8, 8, "R8"},
42907 {9, s390x.REG_R9, 9, "R9"},
42908 {10, s390x.REG_R10, -1, "R10"},
42909 {11, s390x.REG_R11, 10, "R11"},
42910 {12, s390x.REG_R12, 11, "R12"},
42911 {13, s390x.REGG, -1, "g"},
42912 {14, s390x.REG_R14, 12, "R14"},
42913 {15, s390x.REGSP, -1, "SP"},
42914 {16, s390x.REG_F0, -1, "F0"},
42915 {17, s390x.REG_F1, -1, "F1"},
42916 {18, s390x.REG_F2, -1, "F2"},
42917 {19, s390x.REG_F3, -1, "F3"},
42918 {20, s390x.REG_F4, -1, "F4"},
42919 {21, s390x.REG_F5, -1, "F5"},
42920 {22, s390x.REG_F6, -1, "F6"},
42921 {23, s390x.REG_F7, -1, "F7"},
42922 {24, s390x.REG_F8, -1, "F8"},
42923 {25, s390x.REG_F9, -1, "F9"},
42924 {26, s390x.REG_F10, -1, "F10"},
42925 {27, s390x.REG_F11, -1, "F11"},
42926 {28, s390x.REG_F12, -1, "F12"},
42927 {29, s390x.REG_F13, -1, "F13"},
42928 {30, s390x.REG_F14, -1, "F14"},
42929 {31, s390x.REG_F15, -1, "F15"},
42930 {32, 0, -1, "SB"},
42931 }
42932 var paramIntRegS390X = []int8(nil)
42933 var paramFloatRegS390X = []int8(nil)
42934 var gpRegMaskS390X = regMask(23551)
42935 var fpRegMaskS390X = regMask(4294901760)
42936 var specialRegMaskS390X = regMask(0)
42937 var framepointerRegS390X = int8(-1)
42938 var linkRegS390X = int8(14)
42939 var registersWasm = [...]Register{
42940 {0, wasm.REG_R0, 0, "R0"},
42941 {1, wasm.REG_R1, 1, "R1"},
42942 {2, wasm.REG_R2, 2, "R2"},
42943 {3, wasm.REG_R3, 3, "R3"},
42944 {4, wasm.REG_R4, 4, "R4"},
42945 {5, wasm.REG_R5, 5, "R5"},
42946 {6, wasm.REG_R6, 6, "R6"},
42947 {7, wasm.REG_R7, 7, "R7"},
42948 {8, wasm.REG_R8, 8, "R8"},
42949 {9, wasm.REG_R9, 9, "R9"},
42950 {10, wasm.REG_R10, 10, "R10"},
42951 {11, wasm.REG_R11, 11, "R11"},
42952 {12, wasm.REG_R12, 12, "R12"},
42953 {13, wasm.REG_R13, 13, "R13"},
42954 {14, wasm.REG_R14, 14, "R14"},
42955 {15, wasm.REG_R15, 15, "R15"},
42956 {16, wasm.REG_F0, -1, "F0"},
42957 {17, wasm.REG_F1, -1, "F1"},
42958 {18, wasm.REG_F2, -1, "F2"},
42959 {19, wasm.REG_F3, -1, "F3"},
42960 {20, wasm.REG_F4, -1, "F4"},
42961 {21, wasm.REG_F5, -1, "F5"},
42962 {22, wasm.REG_F6, -1, "F6"},
42963 {23, wasm.REG_F7, -1, "F7"},
42964 {24, wasm.REG_F8, -1, "F8"},
42965 {25, wasm.REG_F9, -1, "F9"},
42966 {26, wasm.REG_F10, -1, "F10"},
42967 {27, wasm.REG_F11, -1, "F11"},
42968 {28, wasm.REG_F12, -1, "F12"},
42969 {29, wasm.REG_F13, -1, "F13"},
42970 {30, wasm.REG_F14, -1, "F14"},
42971 {31, wasm.REG_F15, -1, "F15"},
42972 {32, wasm.REG_F16, -1, "F16"},
42973 {33, wasm.REG_F17, -1, "F17"},
42974 {34, wasm.REG_F18, -1, "F18"},
42975 {35, wasm.REG_F19, -1, "F19"},
42976 {36, wasm.REG_F20, -1, "F20"},
42977 {37, wasm.REG_F21, -1, "F21"},
42978 {38, wasm.REG_F22, -1, "F22"},
42979 {39, wasm.REG_F23, -1, "F23"},
42980 {40, wasm.REG_F24, -1, "F24"},
42981 {41, wasm.REG_F25, -1, "F25"},
42982 {42, wasm.REG_F26, -1, "F26"},
42983 {43, wasm.REG_F27, -1, "F27"},
42984 {44, wasm.REG_F28, -1, "F28"},
42985 {45, wasm.REG_F29, -1, "F29"},
42986 {46, wasm.REG_F30, -1, "F30"},
42987 {47, wasm.REG_F31, -1, "F31"},
42988 {48, wasm.REGSP, -1, "SP"},
42989 {49, wasm.REGG, -1, "g"},
42990 {50, 0, -1, "SB"},
42991 }
42992 var paramIntRegWasm = []int8(nil)
42993 var paramFloatRegWasm = []int8(nil)
42994 var gpRegMaskWasm = regMask(65535)
42995 var fpRegMaskWasm = regMask(281474976645120)
42996 var fp32RegMaskWasm = regMask(4294901760)
42997 var fp64RegMaskWasm = regMask(281470681743360)
42998 var specialRegMaskWasm = regMask(0)
42999 var framepointerRegWasm = int8(-1)
43000 var linkRegWasm = int8(-1)
43001
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