1!sum
2- go: SetElem
3 asm: "VPINSRB"
4 in:
5 - &t
6 class: vreg
7 base: $b
8 - class: greg
9 base: $b
10 lanes: 1 # Scalar, darn it!
11 - class: immediate
12 immOffset: 0
13 immMax: 15
14 name: index
15 out:
16 - *t
17- go: SetElem
18 asm: "VPINSRW"
19 in:
20 - &t
21 class: vreg
22 base: $b
23 - class: greg
24 base: $b
25 lanes: 1 # Scalar, darn it!
26 - class: immediate
27 immOffset: 0
28 immMax: 7
29 name: index
30 out:
31 - *t
32- go: SetElem
33 asm: "VPINSRD"
34 in:
35 - &t
36 class: vreg
37 base: $b
38 - class: greg
39 base: $b
40 lanes: 1 # Scalar, darn it!
41 - class: immediate
42 immOffset: 0
43 immMax: 3
44 name: index
45 out:
46 - *t
47- go: SetElem
48 asm: "VPINSRQ"
49 in:
50 - &t
51 class: vreg
52 base: $b
53 - class: greg
54 base: $b
55 lanes: 1 # Scalar, darn it!
56 - class: immediate
57 immOffset: 0
58 immMax: 1
59 name: index
60 out:
61 - *t
62
63- go: SetElem
64 asm: "VPINSRD"
65 in:
66 - &t
67 class: vreg
68 base: int
69 OverwriteBase: float
70 - class: greg
71 base: int
72 OverwriteBase: float
73 lanes: 1 # Scalar, darn it!
74 - class: immediate
75 immOffset: 0
76 immMax: 3
77 name: index
78 out:
79 - *t
80- go: SetElem
81 asm: "VPINSRQ"
82 in:
83 - &t
84 class: vreg
85 base: int
86 OverwriteBase: float
87 - class: greg
88 base: int
89 OverwriteBase: float
90 lanes: 1 # Scalar, darn it!
91 - class: immediate
92 immOffset: 0
93 immMax: 1
94 name: index
95 out:
96 - *t
97
98- go: GetElem # VPEXTRB 128 bit
99 asm: VPEXTRB
100 in:
101 - bits: 128
102 base: $b
103 class: vreg
104 elemBits: 8
105 - class: immediate
106 immOffset: 0
107 immMax: 15
108 name: index
109 out:
110 - bits: 32
111 base: $b
112 class: greg
113 overwriteBits: 8 # The XED data specification is wrong, correct it to the right bits
114
115- go: GetElem # VPEXTRW 128 bit
116 asm: VPEXTRW
117 in:
118 - bits: 128
119 base: $b
120 class: vreg
121 elemBits: 16
122 - class: immediate
123 immOffset: 0
124 immMax: 7
125 name: index
126 out:
127 - bits: 32
128 base: $b
129 class: greg
130 overwriteBits: 16 # The XED data specification is wrong, correct it to the right bits
131
132- go: GetElem
133 asm: "VPEXTRD"
134 in:
135 - class: vreg
136 base: $b
137 elemBits: $e
138 - class: immediate
139 immOffset: 0
140 immMax: 3
141 name: index
142 out:
143 - class: greg
144 base: $b
145 bits: $e
146
147- go: GetElem
148 asm: "VPEXTRQ"
149 in:
150 - class: vreg
151 base: $b
152 elemBits: $e
153 - class: immediate
154 immOffset: 0
155 immMax: 1
156 name: index
157 out:
158 - class: greg
159 base: $b
160 bits: $e
161
162- go: GetElem
163 asm: "VPEXTRD"
164 in:
165 - class: vreg
166 base: int
167 elemBits: $e
168 OverwriteBase: float
169 - class: immediate
170 immOffset: 0
171 immMax: 3
172 name: index
173 out:
174 - class: greg
175 base: int
176 bits: $e
177 OverwriteBase: float
178
179- go: GetElem
180 asm: "VPEXTRQ"
181 in:
182 - class: vreg
183 base: int
184 elemBits: $e
185 OverwriteBase: float
186 - class: immediate
187 immOffset: 0
188 immMax: 1
189 name: index
190 out:
191 - class: greg
192 base: int
193 bits: $e
194 OverwriteBase: float
195
196- go: "SetHi|SetLo"
197 regexpTag: "move"
198 asm: "VINSERTI128|VINSERTI64X4"
199 inVariant: []
200 in:
201 - &i8x2N
202 class: vreg
203 base: $t
204 OverwriteElementBits: 8
205 - &i8xN
206 class: vreg
207 base: $t
208 OverwriteElementBits: 8
209 - &imm01 # This immediate should be only 0 or 1
210 class: immediate
211 const: 0 # place holder
212 name: index
213 out:
214 - *i8x2N
215
216- go: "GetHi|GetLo"
217 asm: "VEXTRACTI128|VEXTRACTI64X4"
218 regexpTag: "move"
219 inVariant: []
220 in:
221 - *i8x2N
222 - *imm01
223 out:
224 - *i8xN
225
226- go: "SetHi|SetLo"
227 asm: "VINSERTI128|VINSERTI64X4"
228 regexpTag: "move"
229 inVariant: []
230 in:
231 - &i16x2N
232 class: vreg
233 base: $t
234 OverwriteElementBits: 16
235 - &i16xN
236 class: vreg
237 base: $t
238 OverwriteElementBits: 16
239 - *imm01
240 out:
241 - *i16x2N
242
243- go: "GetHi|GetLo"
244 regexpTag: "move"
245 asm: "VEXTRACTI128|VEXTRACTI64X4"
246 inVariant: []
247 in:
248 - *i16x2N
249 - *imm01
250 out:
251 - *i16xN
252
253- go: "SetHi|SetLo"
254 regexpTag: "move"
255 asm: "VINSERTI128|VINSERTI64X4"
256 inVariant: []
257 in:
258 - &i32x2N
259 class: vreg
260 base: $t
261 OverwriteElementBits: 32
262 - &i32xN
263 class: vreg
264 base: $t
265 OverwriteElementBits: 32
266 - *imm01
267 out:
268 - *i32x2N
269
270- go: "GetHi|GetLo"
271 regexpTag: "move"
272 asm: "VEXTRACTI128|VEXTRACTI64X4"
273 inVariant: []
274 in:
275 - *i32x2N
276 - *imm01
277 out:
278 - *i32xN
279
280- go: "SetHi|SetLo"
281 regexpTag: "move"
282 asm: "VINSERTI128|VINSERTI64X4"
283 inVariant: []
284 in:
285 - &i64x2N
286 class: vreg
287 base: $t
288 OverwriteElementBits: 64
289 - &i64xN
290 class: vreg
291 base: $t
292 OverwriteElementBits: 64
293 - *imm01
294 out:
295 - *i64x2N
296
297- go: "GetHi|GetLo"
298 regexpTag: "move"
299 asm: "VEXTRACTI128|VEXTRACTI64X4"
300 inVariant: []
301 in:
302 - *i64x2N
303 - *imm01
304 out:
305 - *i64xN
306
307- go: "SetHi|SetLo"
308 regexpTag: "move"
309 asm: "VINSERTF128|VINSERTF64X4"
310 inVariant: []
311 in:
312 - &f32x2N
313 class: vreg
314 base: $t
315 OverwriteElementBits: 32
316 - &f32xN
317 class: vreg
318 base: $t
319 OverwriteElementBits: 32
320 - *imm01
321 out:
322 - *f32x2N
323
324- go: "GetHi|GetLo"
325 regexpTag: "move"
326 asm: "VEXTRACTF128|VEXTRACTF64X4"
327 inVariant: []
328 in:
329 - *f32x2N
330 - *imm01
331 out:
332 - *f32xN
333
334- go: "SetHi|SetLo"
335 regexpTag: "move"
336 asm: "VINSERTF128|VINSERTF64X4"
337 inVariant: []
338 in:
339 - &f64x2N
340 class: vreg
341 base: $t
342 OverwriteElementBits: 64
343 - &f64xN
344 class: vreg
345 base: $t
346 OverwriteElementBits: 64
347 - *imm01
348 out:
349 - *f64x2N
350
351- go: "GetHi|GetLo"
352 regexpTag: "move"
353 asm: "VEXTRACTF128|VEXTRACTF64X4"
354 inVariant: []
355 in:
356 - *f64x2N
357 - *imm01
358 out:
359 - *f64xN
360
361- go: Permute
362 asm: "VPERM[BWDQ]|VPERMP[SD]"
363 operandOrder: "21Type1"
364 in:
365 - &anyindices
366 class: vreg
367 name: indices
368 overwriteBase: uint
369 - go: $t
370 out:
371 - go: $t
372
373- go: ConcatPermute
374 asm: "VPERMI2[BWDQ]|VPERMI2P[SD]"
375 # Because we are overwriting the receiver's type, we
376 # have to move the receiver to be a parameter so that
377 # we can have no duplication.
378 operandOrder: "231Type1"
379 in:
380 - *anyindices # result in arg 0
381 - go: $t
382 - go: $t
383 out:
384 - go: $t
385
386- go: Compress
387 asm: "VPCOMPRESS[BWDQ]|VCOMPRESSP[SD]"
388 in:
389 # The mask in Compress is a control mask rather than a write mask, so it's not optional.
390 - class: mask
391 - go: $t
392 out:
393 - go: $t
394
395# For now a non-public method because
396# (1) [OverwriteClass] must be set together with [OverwriteBase]
397# (2) "simdgen does not support [OverwriteClass] in inputs".
398# That means the signature is wrong.
399- go: blend
400 asm: VPBLENDVB
401 zeroing: false
402 in:
403 - &v
404 go: $t
405 class: vreg
406 base: int
407 - *v
408 -
409 class: vreg
410 base: int
411 name: mask
412 out:
413 - *v
414
415# For AVX512
416- go: blend
417 asm: VPBLENDM[BWDQ]
418 zeroing: false
419 in:
420 - &v
421 go: $t
422 bits: 512
423 class: vreg
424 base: int
425 - *v
426 inVariant:
427 -
428 class: mask
429 out:
430 - *v
431
432 # For AVX512
433- go: move
434 asm: VMOVDQU(8|16|32|64)
435 zeroing: true
436 in:
437 - &v
438 go: $t
439 class: vreg
440 base: int|uint
441 inVariant:
442 -
443 class: mask
444 out:
445 - *v
446
447- go: Expand
448 asm: "VPEXPAND[BWDQ]|VEXPANDP[SD]"
449 in:
450 # The mask in Expand is a control mask rather than a write mask, so it's not optional.
451 - class: mask
452 - go: $t
453 out:
454 - go: $t
455
456- go: broadcast1To2
457 asm: VPBROADCASTQ
458 in:
459 - class: vreg
460 bits: 128
461 elemBits: 64
462 base: $b
463 out:
464 - class: vreg
465 bits: 128
466 elemBits: 64
467 base: $b
468
469# weirdly, this one case on AVX2 is memory-operand-only
470- go: broadcast1To2
471 asm: VPBROADCASTQ
472 in:
473 - class: vreg
474 bits: 128
475 elemBits: 64
476 base: int
477 OverwriteBase: float
478 out:
479 - class: vreg
480 bits: 128
481 elemBits: 64
482 base: int
483 OverwriteBase: float
484
485- go: broadcast1To4
486 asm: VPBROADCAST[BWDQ]
487 in:
488 - class: vreg
489 bits: 128
490 base: $b
491 out:
492 - class: vreg
493 lanes: 4
494 base: $b
495
496- go: broadcast1To8
497 asm: VPBROADCAST[BWDQ]
498 in:
499 - class: vreg
500 bits: 128
501 base: $b
502 out:
503 - class: vreg
504 lanes: 8
505 base: $b
506
507- go: broadcast1To16
508 asm: VPBROADCAST[BWDQ]
509 in:
510 - class: vreg
511 bits: 128
512 base: $b
513 out:
514 - class: vreg
515 lanes: 16
516 base: $b
517
518- go: broadcast1To32
519 asm: VPBROADCAST[BWDQ]
520 in:
521 - class: vreg
522 bits: 128
523 base: $b
524 out:
525 - class: vreg
526 lanes: 32
527 base: $b
528
529- go: broadcast1To64
530 asm: VPBROADCASTB
531 in:
532 - class: vreg
533 bits: 128
534 base: $b
535 out:
536 - class: vreg
537 lanes: 64
538 base: $b
539
540- go: broadcast1To4
541 asm: VBROADCASTS[SD]
542 in:
543 - class: vreg
544 bits: 128
545 base: float
546 out:
547 - class: vreg
548 lanes: 4
549 base: float
550
551- go: broadcast1To8
552 asm: VBROADCASTS[SD]
553 in:
554 - class: vreg
555 bits: 128
556 base: float
557 out:
558 - class: vreg
559 lanes: 8
560 base: float
561
562- go: broadcast1To16
563 asm: VBROADCASTS[SD]
564 in:
565 - class: vreg
566 bits: 128
567 base: float
568 out:
569 - class: vreg
570 lanes: 16
571 base: float
572
573# VPSHUFB for 128-bit byte shuffles will be picked with higher priority than VPERMB, given its lower CPU feature requirement. (It's AVX)
574- go: PermuteOrZero
575 asm: VPSHUFB
576 in:
577 - &128any
578 bits: 128
579 go: $t
580 - bits: 128
581 name: indices
582 base: int # always signed
583 out:
584 - *128any
585
586- go: PermuteOrZeroGrouped
587 asm: VPSHUFB
588 in:
589 - &256Or512any
590 bits: "256|512"
591 go: $t
592 - bits: "256|512"
593 base: int
594 name: indices
595 out:
596 - *256Or512any
597
598- go: permuteScalars
599 asm: VPSHUFD
600 addDoc: !string |-
601 //
602 // result = {x[indices[0:2]], x[indices[2:4]], x[indices[4:6]], x[indices[6:8]]}
603 //
604 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
605 in:
606 - *128any
607 - class: immediate
608 immOffset: 0
609 name: indices
610 hideMaskMethods: true
611 out:
612 - *128any
613
614- go: permuteScalarsGrouped
615 asm: VPSHUFD
616 addDoc: !string |-
617 //
618 // result = {x_group0[indices[0:2]], x_group0[indices[2:4]], x_group0[indices[4:6]], x_group0[indices[6:8]], x_group1[indices[0:2]], ...}
619 //
620 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
621 // Each group is of size 128-bit.
622 in:
623 - *256Or512any
624 - class: immediate
625 immOffset: 0
626 name: indices
627 hideMaskMethods: true
628 out:
629 - *256Or512any
630
631- go: permuteScalarsLo # For AVX
632 asm: VPSHUFLW
633 addDoc: !string |-
634 //
635 // result = {x[indices[0:2]], x[indices[2:4]], x[indices[4:6]], x[indices[6:8]], x[4], x[5], x[6], x[7]}
636 //
637 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
638 in:
639 - &32x4To16x8
640 bits: 128
641 go: $t
642 elemBits: 32
643 OverwriteElementBits: 16 # XED data incorrectly specified this as 32-bit, we need to fix it.
644 - class: immediate
645 immOffset: 0
646 name: indices
647 hideMaskMethods: true
648 out:
649 - *32x4To16x8
650
651- go: permuteScalarsLo
652 asm: VPSHUFLW
653 addDoc: !string |-
654 //
655 // result = {x[indices[0:2]], x[indices[2:4]], x[indices[4:6]], x[indices[6:8]], x[4], x[5], x[6], x[7]}
656 //
657 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
658 in:
659 - &128lanes8
660 bits: 128
661 go: $t
662 elemBits: 16
663 - class: immediate
664 immOffset: 0
665 name: indices
666 hideMaskMethods: true
667 out:
668 - *128lanes8
669
670- go: permuteScalarsLoGrouped
671 asm: VPSHUFLW
672 addDoc: !string |-
673 //
674 // result = {x_group0[indices[0:2]], x_group0[indices[2:4]], x_group0[indices[4:6]], x_group0[indices[6:8]], x[4], x[5], x[6], x[7],
675 // x_group1[indices[0:2]], ...}
676 //
677 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
678 // Each group is of size 128-bit.
679 in:
680 - &256Or512lanes8
681 bits: "256|512"
682 go: $t
683 elemBits: 16
684 - class: immediate
685 immOffset: 0
686 name: indices
687 hideMaskMethods: true
688 out:
689 - *256Or512lanes8
690
691- go: permuteScalarsHi
692 asm: VPSHUFHW
693 addDoc: !string |-
694 //
695 // result = {x[0], x[1], x[2], x[3], x[indices[0:2]+4], x[indices[2:4]+4], x[indices[4:6]+4], x[indices[6:8]+4]}
696 //
697 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
698 in:
699 - *128lanes8
700 - class: immediate
701 immOffset: 0
702 name: indices
703 hideMaskMethods: true
704 out:
705 - *128lanes8
706
707- go: permuteScalarsHi # For AVX
708 asm: VPSHUFHW
709 addDoc: !string |-
710 //
711 // result = {x[0], x[1], x[2], x[3], x[indices[0:2]+4], x[indices[2:4]+4], x[indices[4:6]+4], x[indices[6:8]+4]}
712 //
713 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
714 in:
715 - &32x4To16x8
716 bits: 128
717 go: $t
718 elemBits: 32
719 OverwriteElementBits: 16 # XED data incorrectly specified this as 32-bit, we need to fix it.
720 - class: immediate
721 immOffset: 0
722 name: indices
723 hideMaskMethods: true
724 out:
725 - *32x4To16x8
726
727- go: permuteScalarsHiGrouped
728 asm: VPSHUFHW
729 addDoc: !string |-
730 // result =
731 //
732 // {x_group0[0], x_group0[1], x_group0[2], x_group0[3], x_group0[indices[0:2]+4], x_group0[indices[2:4]+4], x_group0[indices[4:6]+4], x_group0[indices[6:8]+4],
733 // x_group1[0], x_group1[1], x_group1[2], x_group1[3], x_group1[indices[0:2]+4], ...}
734 //
735 // Indices is four 2-bit values packed into a byte, thus indices[0:2] is the first index.
736 // Each group is of size 128-bit.
737 in:
738 - *256Or512lanes8
739 - class: immediate
740 immOffset: 0
741 name: indices
742 hideMaskMethods: true
743 out:
744 - *256Or512lanes8
745
746- go: InterleaveHi
747 asm: VPUNPCKH(QDQ|DQ|WD|WB)
748 in:
749 - *128any
750 - *128any
751 inVariant: []
752 out:
753 - *128any
754
755- go: InterleaveLo
756 asm: VPUNPCKL(QDQ|DQ|WD|WB)
757 in:
758 - *128any
759 - *128any
760 inVariant: []
761 out:
762 - *128any
763
764- go: InterleaveHiGrouped
765 asm: VPUNPCKH(QDQ|DQ|WD|WB)
766 in:
767 - *256Or512any
768 - *256Or512any
769 inVariant: []
770 out:
771 - *256Or512any
772
773- go: InterleaveLoGrouped
774 asm: VPUNPCKL(QDQ|DQ|WD|WB)
775 in:
776 - *256Or512any
777 - *256Or512any
778 inVariant: []
779 out:
780 - *256Or512any
781
782# These are all described separately to carry the name of the constant parameter
783
784- go: concatSelectedConstant
785 asm: VSHUFPS
786 width: 32
787 in:
788 - &v
789 go: $t
790 class: vreg
791 base: float
792 bits: 128
793 - *v
794 - class: immediate
795 immOffset: 0
796 name: h1h0l1l0
797 inVariant: []
798 out:
799 - *v
800
801- go: concatSelectedConstant
802 asm: VSHUFPS
803 in:
804 - &v
805 go: $t
806 class: vreg
807 base: float
808 bits: 128
809 OverwriteBase: int
810 - *v
811 - class: immediate
812 immOffset: 0
813 name: h1h0l1l0
814 inVariant: []
815 out:
816 - *v
817
818- go: concatSelectedConstant
819 asm: VSHUFPS
820 in:
821 - &v
822 go: $t
823 class: vreg
824 base: float
825 bits: 128
826 OverwriteBase: uint
827 - *v
828 - class: immediate
829 immOffset: 0
830 name: h1h0l1l0
831 inVariant: []
832 out:
833 - *v
834
835
836- go: concatSelectedConstantGrouped
837 asm: VSHUFPS
838 in:
839 - &v
840 go: $t
841 class: vreg
842 base: float
843 bits: "256|512"
844 - *v
845 - class: immediate
846 immOffset: 0
847 name: h1h0l1l0
848 inVariant: []
849 out:
850 - *v
851
852- go: concatSelectedConstantGrouped
853 asm: VSHUFPS
854 in:
855 - &v
856 go: $t
857 class: vreg
858 base: float
859 bits: "256|512"
860 OverwriteBase: int
861 - *v
862 - class: immediate
863 immOffset: 0
864 name: h1h0l1l0
865 inVariant: []
866 out:
867 - *v
868
869- go: concatSelectedConstantGrouped
870 asm: VSHUFPS
871 in:
872 - &v
873 go: $t
874 class: vreg
875 base: float
876 bits: "256|512"
877 OverwriteBase: uint
878 - *v
879 - class: immediate
880 immOffset: 0
881 name: h1h0l1l0
882 inVariant: []
883 out:
884 - *v
885
886
887 # 64 bit versions
888
889- go: concatSelectedConstant
890 asm: VSHUFPD
891 in:
892 - &v
893 go: $t
894 class: vreg
895 base: float
896 bits: 128
897 - *v
898 - class: immediate
899 immOffset: 0
900 name: hilo
901 inVariant: []
902 out:
903 - *v
904
905- go: concatSelectedConstant
906 asm: VSHUFPD
907 in:
908 - &v
909 go: $t
910 class: vreg
911 base: float
912 bits: 128
913 OverwriteBase: int
914 - *v
915 - class: immediate
916 immOffset: 0
917 name: hilo
918 inVariant: []
919 out:
920 - *v
921
922- go: concatSelectedConstant
923 asm: VSHUFPD
924 in:
925 - &v
926 go: $t
927 class: vreg
928 base: float
929 bits: 128
930 OverwriteBase: uint
931 - *v
932 - class: immediate
933 immOffset: 0
934 name: hilo
935 inVariant: []
936 out:
937 - *v
938
939- go: concatSelectedConstantGrouped
940 asm: VSHUFPD
941 in:
942 - &v
943 go: $t
944 class: vreg
945 base: float
946 bits: "256|512"
947 - *v
948 - class: immediate
949 immOffset: 0
950 name: hilos
951 inVariant: []
952 out:
953 - *v
954
955- go: concatSelectedConstantGrouped
956 asm: VSHUFPD
957 in:
958 - &v
959 go: $t
960 class: vreg
961 base: float
962 bits: "256|512"
963 OverwriteBase: int
964 - *v
965 - class: immediate
966 immOffset: 0
967 name: hilos
968 inVariant: []
969 out:
970 - *v
971
972- go: concatSelectedConstantGrouped
973 asm: VSHUFPD
974 in:
975 - &v
976 go: $t
977 class: vreg
978 base: float
979 bits: "256|512"
980 OverwriteBase: uint
981 - *v
982 - class: immediate
983 immOffset: 0
984 name: hilos
985 inVariant: []
986 out:
987 - *v
988
989- go: ConcatPermute128Scalars
990 asm: VPERM2F128
991 operandOrder: II
992 addDoc: !string |-
993 // For example,
994 //
995 // {40, 41, 50, 51}.NAME(3, 0, {60, 61, 70, 71})
996 //
997 // returns {70, 71, 40, 41}.
998 in:
999 - &v
1000 go: $t
1001 class: vreg
1002 base: float
1003 bits: 256
1004 - *v
1005 - class: immediate
1006 immOffset: 0
1007 name: "lo, hi"
1008 inVariant: []
1009 out:
1010 - *v
1011
1012- go: ConcatPermute128Scalars
1013 asm: VPERM2F128
1014 operandOrder: II
1015 addDoc: !string |-
1016 // For example,
1017 //
1018 // {40, 41, 42, 43, 50, 51, 52, 53}.NAME(3, 0, {60, 61, 62, 63, 70, 71, 72, 73})
1019 //
1020 // returns {70, 71, 72, 73, 40, 41, 42, 43}.
1021 in:
1022 - &v
1023 go: $t
1024 class: vreg
1025 base: float
1026 bits: 256
1027 OverwriteElementBits: 32
1028 - *v
1029 - class: immediate
1030 immOffset: 0
1031 name: "lo, hi"
1032 inVariant: []
1033 out:
1034 - *v
1035
1036- go: ConcatPermute128Scalars
1037 asm: VPERM2I128
1038 operandOrder: II
1039 addDoc: !string |-
1040 // For example,
1041 //
1042 // {40, 41, 50, 51}.NAME(3, 0, {60, 61, 70, 71})
1043 //
1044 // returns {70, 71, 40, 41}.
1045 in:
1046 - &v
1047 go: $t
1048 class: vreg
1049 base: int|uint
1050 bits: 256
1051 OverwriteElementBits: 64
1052 - *v
1053 - class: immediate
1054 immOffset: 0
1055 name: "lo, hi"
1056 inVariant: []
1057 out:
1058 - *v
1059
1060- go: ConcatPermute128Scalars
1061 asm: VPERM2I128
1062 operandOrder: II
1063 addDoc: !string |-
1064 // For example,
1065 //
1066 // {40, 41, 42, 43, 50, 51, 52, 53}.NAME(3, 0, {60, 61, 62, 63, 70, 71, 72, 73})
1067 //
1068 // returns {70, 71, 72, 73, 40, 41, 42, 43}.
1069 in:
1070 - &v
1071 go: $t
1072 class: vreg
1073 base: int|uint
1074 bits: 256
1075 OverwriteElementBits: 32
1076 - *v
1077 - class: immediate
1078 immOffset: 0
1079 name: "lo, hi"
1080 inVariant: []
1081 out:
1082 - *v
1083
1084- go: ConcatPermute128Scalars
1085 asm: VPERM2I128
1086 operandOrder: II
1087 addDoc: !string |-
1088 // For example,
1089 //
1090 // {40, 41, 42, 43, 44, 45, 46, 47, 50, 51, 52, 53, 54, 55, 56, 57}.NAME(3, 0,
1091 // {60, 61, 62, 63, 64, 65, 66, 67, 70, 71, 72, 73, 74, 75, 76, 77})
1092 //
1093 // returns {70, 71, 72, 73, 74, 75, 76, 77, 40, 41, 42, 43, 44, 45, 46, 47}.
1094 in:
1095 - &v
1096 go: $t
1097 class: vreg
1098 base: int|uint
1099 bits: 256
1100 OverwriteElementBits: 16
1101 - *v
1102 - class: immediate
1103 immOffset: 0
1104 name: "lo, hi"
1105 inVariant: []
1106 out:
1107 - *v
1108
1109- go: ConcatPermute128Scalars
1110 asm: VPERM2I128
1111 operandOrder: II
1112 addDoc: !string |-
1113 // For example,
1114 //
1115 // {0x40, 0x41, ..., 0x4f, 0x50, 0x51, ..., 0x5f}.NAME(3, 0,
1116 // {0x60, 0x61, ..., 0x6f, 0x70, 0x71, ..., 0x7f})
1117 //
1118 // returns {0x70, 0x71, ..., 0x7f, 0x40, 0x41, ..., 0x4f}.
1119 in:
1120 - &v
1121 go: $t
1122 class: vreg
1123 base: int|uint
1124 bits: 256
1125 OverwriteElementBits: 8
1126 - *v
1127 - class: immediate
1128 immOffset: 0
1129 name: "lo, hi"
1130 inVariant: []
1131 out:
1132 - *v
1133
1134- go: ConcatShiftBytesRight
1135 asm: VPALIGNR
1136 operandOrder: 2I
1137 in:
1138 - &uint128
1139 go: $t
1140 base: uint
1141 bits: 128
1142 - *uint128
1143 - class: immediate
1144 immOffset: 0
1145 name: shift
1146 out:
1147 - *uint128
1148
1149- go: ConcatShiftBytesRightGrouped
1150 asm: VPALIGNR
1151 operandOrder: 2I
1152 in:
1153 - &uint256512
1154 go: $t
1155 base: uint
1156 bits: 256|512
1157 - *uint256512
1158 - class: immediate
1159 immOffset: 0
1160 name: shift
1161 out:
1162 - *uint256512
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